| /kernel/trunk/arch/sparc64/src/console.c |
|---|
| 185,4 → 185,3 |
| /** @} |
| */ |
| /kernel/trunk/arch/sparc64/src/sparc64.c |
|---|
| 97,4 → 97,3 |
| /** @} |
| */ |
| /kernel/trunk/arch/mips32/include/context_offset.h |
|---|
| 50,7 → 50,3 |
| #define EOFFSET_EPC 0x80 |
| #define EOFFSET_K1 0x84 |
| #define REGISTER_SPACE 136 |
| /** @} |
| */ |
| /kernel/trunk/arch/mips32/include/asm/regname.h |
|---|
| 96,4 → 96,3 |
| /** @} |
| */ |
| /kernel/trunk/arch/mips32/include/interrupt.h |
|---|
| 55,4 → 55,3 |
| /** @} |
| */ |
| /kernel/trunk/arch/mips32/include/exception.h |
|---|
| 125,4 → 125,3 |
| /** @} |
| */ |
| /kernel/trunk/arch/mips32/include/fpu_context.h |
|---|
| 48,4 → 48,3 |
| /** @} |
| */ |
| /kernel/trunk/arch/mips32/include/byteorder.h |
|---|
| 58,4 → 58,3 |
| /** @} |
| */ |
| /kernel/trunk/arch/mips32/include/console.h |
|---|
| 42,4 → 42,3 |
| /** @} |
| */ |
| /kernel/trunk/arch/mips32/include/cache.h |
|---|
| 35,10 → 35,11 |
| #ifndef __mips32_CACHE_H__ |
| #define __mips32_CACHE_H__ |
| extern void cache_error(void); |
| #include <typedefs.h> |
| extern void cache_error(istate_t *istate); |
| #endif |
| /** @} |
| */ |
| /kernel/trunk/arch/mips32/include/types.h |
|---|
| 64,4 → 64,3 |
| /** @} |
| */ |
| /kernel/trunk/arch/mips32/include/stack.h |
|---|
| 42,4 → 42,3 |
| /** @} |
| */ |
| /kernel/trunk/arch/mips32/include/elf.h |
|---|
| 49,4 → 49,3 |
| /** @} |
| */ |
| /kernel/trunk/arch/mips32/include/memstr.h |
|---|
| 46,4 → 46,3 |
| /** @} |
| */ |
| /kernel/trunk/arch/mips32/include/arg.h |
|---|
| 58,4 → 58,3 |
| /** @} |
| */ |
| /kernel/trunk/arch/mips32/include/atomic.h |
|---|
| 62,7 → 62,7 |
| " move %2, %0\n" |
| " sc %0, %1\n" |
| " beq %0, %4, 1b\n" /* if the atomic operation failed, try again */ |
| /* nop */ /* nop is inserted automatically by compiler */ |
| " nop\n" |
| : "=r" (tmp), "=m" (val->count), "=r" (v) |
| : "i" (i), "i" (0) |
| ); |
| 74,4 → 74,3 |
| /** @} |
| */ |
| /kernel/trunk/arch/mips32/include/arch.h |
|---|
| 39,4 → 39,3 |
| /** @} |
| */ |
| /kernel/trunk/arch/mips32/include/asm.h |
|---|
| 70,4 → 70,3 |
| /** @} |
| */ |
| /kernel/trunk/arch/mips32/include/faddr.h |
|---|
| 43,4 → 43,3 |
| /** @} |
| */ |
| /kernel/trunk/arch/mips32/include/mm/tlb.h |
|---|
| 183,4 → 183,3 |
| /** @} |
| */ |
| /kernel/trunk/arch/mips32/include/debugger.h |
|---|
| 67,4 → 67,3 |
| /** @} |
| */ |
| /kernel/trunk/arch/mips32/include/context.h |
|---|
| 78,4 → 78,3 |
| /** @} |
| */ |
| /kernel/trunk/arch/mips32/include/debug.h |
|---|
| 53,4 → 53,3 |
| /** @} |
| */ |
| /kernel/trunk/arch/mips32/src/exception.c |
|---|
| 48,7 → 48,10 |
| #include <arch/debugger.h> |
| static char * exctable[] = { |
| "Interrupt","TLB Modified","TLB Invalid","TLB Invalid Store", |
| "Interrupt", |
| "TLB Modified", |
| "TLB Invalid", |
| "TLB Invalid Store", |
| "Address Error - load/instr. fetch", |
| "Address Error - store", |
| "Bus Error - fetch instruction", |
| 174,4 → 177,3 |
| /** @} |
| */ |
| /kernel/trunk/arch/mips32/src/cache.c |
|---|
| 33,11 → 33,13 |
| */ |
| #include <arch/cache.h> |
| #include <arch/exception.h> |
| #include <typedefs.h> |
| #include <panic.h> |
| void cache_error(void) |
| void cache_error(istate_t *istate) |
| { |
| panic("cache_error exception\n"); |
| panic("cache_error exception (epc=%p)\n", istate->epc); |
| } |
| /** @} |
| /kernel/trunk/arch/mips32/src/start.S |
|---|
| 309,7 → 309,7 |
| sw $sp,EOFFSET_SP($k0) |
| add $sp, $k0, 0 |
| jal tlb_refill /* tlb_refill(register_space) */ |
| jal tlb_refill |
| add $a0, $sp, 0 |
| REGISTERS_LOAD $sp |
| 324,7 → 324,7 |
| add $sp, $k0, 0 |
| jal cache_error |
| nop |
| add $a0, $sp, 0 |
| REGISTERS_LOAD $sp |