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Ignore whitespace Rev 1102 → Rev 1101

/kernel/trunk/arch/amd64/src/userspace.c
45,9 → 45,6
ipl = interrupts_disable();
 
/* Clear CF,PF,AF,ZF,SF,DF,OF */
ipl &= ~ (0xbc4);
 
__asm__ volatile (""
"pushq %0\n"
"pushq %1\n"
/kernel/trunk/arch/mips32/include/exception.h
90,7 → 90,7
 
__u32 status; /* cp0_status */
__u32 epc; /* cp0_epc */
__u32 k1; /* We use it as thread-local pointer */
__u32 padding; /* padding to align stack on 8 bytes boundary */
};
 
extern void exception(istate_t *istate);
/kernel/trunk/arch/mips32/include/context_offset.h
48,5 → 48,4
#define EOFFSET_HI 0x78
#define EOFFSET_STATUS 0x7c
#define EOFFSET_EPC 0x80
#define EOFFSET_K1 0x84
#define REGISTER_SPACE 136
/kernel/trunk/arch/mips32/src/start.S
49,7 → 49,6
# Save registers to space defined by \r
# We will change status: Disable ERL,EXL,UM,IE
# These changes will be automatically reversed in REGISTER_LOAD
# SP is NOT saved as part of these registers
.macro REGISTERS_STORE_AND_EXC_RESET r
sw $at,EOFFSET_AT(\r)
sw $v0,EOFFSET_V0(\r)
88,7 → 87,7
sw $gp,EOFFSET_GP(\r)
sw $ra,EOFFSET_RA(\r)
sw $k1,EOFFSET_K1(\r)
sw $sp,EOFFSET_SP(\r)
 
mfc0 $t0, $status
mfc0 $t1, $epc
144,7 → 143,6
#endif
lw $gp,EOFFSET_GP(\r)
lw $ra,EOFFSET_RA(\r)
lw $k1,EOFFSET_K1(\r)
lw $at,EOFFSET_LO(\r)
mtlo $at
209,24 → 207,23
exception_handler:
KERNEL_STACK_TO_K0
mfc0 $k1, $cause
sub $k0, REGISTER_SPACE
sw $sp,EOFFSET_SP($k0)
move $sp, $k0
mfc0 $k0, $cause
sra $k1, $k1, 0x2 # cp0_exc_cause() part 1
andi $k1, $k1, 0x1f # cp0_exc_cause() part 2
sub $k1, 8 # 8=SYSCALL
sra $k0, $k0, 0x2 # cp0_exc_cause() part 1
andi $k0, $k0, 0x1f # cp0_exc_cause() part 2
sub $k0, 8 # 8=SYSCALL
beqz $k1, syscall_shortcut
add $k1, 8 # Revert $k1 back to correct exc number
beqz $k0, syscall_shortcut
add $k0, 8 # Revert $k1 back to correct exc number
REGISTERS_STORE_AND_EXC_RESET $k0
move $sp, $k0
REGISTERS_STORE_AND_EXC_RESET $sp
move $a1, $sp
jal exc_dispatch # exc_dispatch(excno, register_space)
move $a0, $k0
move $a0, $k1
 
REGISTERS_LOAD $sp
# The $sp is automatically restored to former value
234,11 → 231,14
 
# it seems that mips reserves some space on stack for varfuncs???
#define SS_ARG4 16
#define SS_SP EOFFSET_SP
#define SS_STATUS EOFFSET_STATUS
#define SS_EPC EOFFSET_EPC
#define SS_SP 20
#define SS_STATUS 24
#define SS_EPC 28
syscall_shortcut:
# We have a lot of space on the stack, with free use
sw $sp, SS_SP($k0)
move $sp, $k0
 
mfc0 $t1, $epc
mfc0 $t0, $status
sw $t1,SS_EPC($sp) # Save EPC
276,7 → 276,6
KERNEL_STACK_TO_K0
sub $k0, REGISTER_SPACE
REGISTERS_STORE_AND_EXC_RESET $k0
sw $sp,EOFFSET_SP($k0)
add $sp, $k0, 0
 
add $a0, $sp, 0
289,9 → 288,8
 
cache_error_handler:
KERNEL_STACK_TO_K0
sub $k0, REGISTER_SPACE
REGISTERS_STORE_AND_EXC_RESET $k0
sw $sp,EOFFSET_SP($k0)
sub $sp, REGISTER_SPACE
REGISTERS_STORE_AND_EXC_RESET $sp
add $sp, $k0, 0
 
jal cache_error