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Ignore whitespace Rev 145 → Rev 146

/design/trunk/src/ap_arch.xml
69,7 → 69,7
data in its address space but it is impossible to read the base of the
FS segmentation register. The solution is to add the self-reference
address to the end of thread local data, so that the application can
read the address as %gs:0. </para>
read the address as %gs:0.</para>
 
<figure float="1">
<title>IA32 &amp; AMD64</title>
167,14 → 167,63
</mediaobject>
</figure>
</section>
 
<section>
<title>Lazy FPU Context Switching</title>
 
<para>Implementing lazy FPU switching on MIPS architecture is
straightforward. When coprocessor CP1 is disabled, any FPU intruction
raises a Coprocessor Unusable exception. The generic lazy FPU context
switch is then called that takes care of the correct context
save/restore.</para>
</section>
</section>
 
<section>
<title>Power PC</title>
 
<para></para>
<para>PowerPC allows kernel to enable mode, where data and intruction
memory reads are not translated through virtual memory mapping
(<emphasis>real mode</emphasis>). The real mode is automatically enabled
when an exception occurs. However, the kernel uses the same memory
structure as on other 32-bit platforms - physical memory is mapped into
the top 2GB, userspace memory is available in the bottom half of the
32-bit address space.</para>
 
<section>
<title>OpenFirmware Boot</title>
 
<para>The OpenFirmware loads an image of HelenOS operating system and
passes control to the HelenOS specific boot loader. The boot loader then
performs following tasks:</para>
 
<itemizedlist>
<listitem>
<para>Fetches information from OpenFirmware regarding memory
structure, device information etc.</para>
</listitem>
 
<listitem>
<para>Switches memory mapping to the real mode.</para>
</listitem>
 
<listitem>
<para>Copies the kernel to proper physical address.</para>
</listitem>
 
<listitem>
<para>Creates basic memory mapping and switches to the new kernel
mapping, in which the kernel can run.</para>
</listitem>
 
<listitem>
<para>Passes control to the kernel <function>main_bsp</function>
function.</para>
</listitem>
</itemizedlist>
</section>
 
<section>
<title>Thread Local Storage</title>
 
<para>The Power PC thread local storage uses R2 register to hold an
184,26 → 233,35
</section>
 
<section>
<title>IA-64</title>
<title>IA64</title>
 
<para></para>
 
<figure float="1">
<title>IA64</title>
<section>
<title>Thread Local Storage</title>
 
<mediaobject id="tldia64">
<imageobject role="pdf">
<imagedata fileref="images/tld_ia64.pdf" format="PDF" />
</imageobject>
<para>Although thread local storage is not officially supported in
statically linked binaries, GCC supports it without any major obstacles.
As a thread pointer is designated register r13, the thread local data
section starts at an address r13+16.</para>
 
<imageobject role="html">
<imagedata fileref="images/tld_ia64.png" format="PNG" />
</imageobject>
<para><figure float="1">
<title>IA64</title>
 
<imageobject role="fop">
<imagedata fileref="images/tld_ia64.svg" format="SVG" />
</imageobject>
</mediaobject>
</figure>
<mediaobject id="tldia64">
<imageobject role="pdf">
<imagedata fileref="images/tld_ia64.pdf" format="PDF" />
</imageobject>
 
<imageobject role="html">
<imagedata fileref="images/tld_ia64.png" format="PNG" />
</imageobject>
 
<imageobject role="fop">
<imagedata fileref="images/tld_ia64.svg" format="SVG" />
</imageobject>
</mediaobject>
</figure></para>
</section>
</section>
</appendix>