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Regard whitespace Rev 68 → Rev 69

/design/trunk/src/ch_memory_management.xml
14,6 → 14,7
<title>Physical memory management</title>
 
<section id="zones_and_frames">
<indexterm><primary>memory management</primary><secondary>memory zone</secondary></indexterm>
<title>Zones and frames</title>
 
<para>HelenOS represents continuous areas of physical memory in
44,6 → 45,7
</section>
 
<section id="frame_allocator">
<indexterm><primary>memory management</primary><secondary>frame allocator</secondary></indexterm>
<title>Frame allocator</title>
 
<para>The frame allocator satisfies kernel requests to allocate
83,6 → 85,7
</section>
 
<section id="buddy_allocator">
<indexterm><primary>memory management</primary><secondary>buddy system</secondary></indexterm>
<title>Buddy allocator</title>
 
<para>In the buddy system, the memory is broken down into power-of-two
157,6 → 160,7
</section>
 
<section id="slab">
<indexterm><primary>memory management</primary><secondary>slab</secondary></indexterm>
<title>Slab allocator</title>
 
<para>The majority of memory allocation requests in the kernel is for
240,6 → 244,7
</itemizedlist></para>
 
<section>
<indexterm><primary>memory management</primary><secondary>slab magazine</secondary></indexterm>
<title>Magazine layer</title>
 
<para>Due to the extensive bottleneck on SMP architures, caused by
378,6 → 383,7
<title>Address spaces</title>
 
<section>
<indexterm><primary>memory management</primary><secondary>address space area</secondary></indexterm>
<title>Address space areas</title>
 
<para>Each address space consists of mutually disjunctive continuous
424,6 → 430,7
</section>
 
<section>
<indexterm><primary>memory management</primary><secondary>asid</secondary></indexterm>
<title>Address Space ID (ASID)</title>
 
<para>When switching to the different task, kernel also require to
473,7 → 480,7
Non-existing mapping generates page fault exception, calling kernel
exception handler, thus allowing kernel to manipulate rules of
memory access. Information for pages mapping is stored by kernel in
the <link linkend="page_tables">page tables</link></para>
the page tables</para>
 
<para>The majority of the architectures use multi-level page tables,
which means need to access physical memory several times before
521,6 → 528,7
</section>
 
<section>
<indexterm><primary>memory management</primary><secondary>hash table</secondary></indexterm>
<title>Global hash table</title>
 
<para>Implementation of the global hash table was encouraged by the
544,6 → 552,7
</section>
 
<section id="tlb">
<indexterm><primary>memory management</primary><secondary>tlb</secondary></indexterm>
<title>Translation Lookaside buffer</title>
 
<para>Due to the extensive overhead during the page mapping lookup in