Subversion Repositories HelenOS

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Ignore whitespace Rev 256 → Rev 257

/SPARTAN/trunk/src/build.amd64
8,7 → 8,7
(
set -e
cd ../arch
for a in drivers bios mm/frame.c mm/tlb.c mm/memory_init.c boot/memmap.S; do
for a in drivers bios fpu_context.c mm/frame.c mm/tlb.c mm/memory_init.c boot/memmap.S; do
if [ \! -e amd64/src/$a ]; then
echo ln -sf `pwd`/ia32/src/$a amd64/src/$a
ln -sf `pwd`/ia32/src/$a amd64/src/$a
/SPARTAN/trunk/src/mm/vm.c
70,7 → 70,7
// memsetb((__address) dst_ptl0, PAGE_SIZE, 0);
// memcpy((void *) &dst_ptl0[KAS_START_INDEX], (void *) &src_ptl0[KAS_START_INDEX], KAS_INDICES);
memcpy((void *) dst_ptl0, (void *) GET_PTL0_ADDRESS() , PAGE_SIZE);
memcpy((void *) dst_ptl0,(void *) src_ptl0, PAGE_SIZE);
 
m->ptl0 = (pte_t *) KA2PA((__address) dst_ptl0);
}
/SPARTAN/trunk/arch/amd64/include/asm.h
51,8 → 51,8
return v;
}
 
static inline void cpu_sleep(void) { __asm__("hlt"); };
static inline void cpu_halt(void) { __asm__("hlt"); };
static inline void cpu_sleep(void) { __asm__ volatile ("hlt"); };
static inline void cpu_halt(void) { __asm__ volatile ("hlt"); };
 
 
static inline __u8 inb(__u16 port)
/SPARTAN/trunk/arch/amd64/Makefile.inc
34,4 → 34,6
arch/asm_utils.S \
arch/fmath.c \
arch/mm/memory_init.c \
arch/cpu/cpu.c
arch/cpu/cpu.c \
arch/proc/scheduler.c \
arch/userspace.c
/SPARTAN/trunk/arch/amd64/src/fpu_context.c
File deleted
/SPARTAN/trunk/arch/amd64/src/asm_utils.S
55,6 → 55,26
.global set_efer_flag
 
# THIS IS USERSPACE CODE
.global utext
utext:
xor %ax,%ax;
mov %ax,%ds;
mov %ax,%es;
mov %ax,%fs;
mov %ax,%gs;
0:
int $48
jmp 0b
# not reached
utext_end:
 
.data
.global utext_size
utext_size:
.long utext_end - utext
 
## Determine CPUID support
#
# Return 0 in EAX if CPUID is not support, 1 if supported.
/SPARTAN/trunk/arch/amd64/src/proc/scheduler.c
0,0 → 1,38
/*
* Copyright (C) 2005 Ondrej Palkovsky
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
#include <proc/scheduler.h>
#include <cpu.h>
#include <proc/thread.h>
#include <arch.h>
#include <arch/context.h> /* SP_DELTA */
 
void before_thread_runs_arch(void)
{
CPU->arch.tss->rsp0 = (__address) &THREAD->kstack[THREAD_STACK_SIZE-SP_DELTA];
}
/SPARTAN/trunk/arch/amd64/src/cpu/cpu.c
62,8 → 62,7
 
void set_TS_flag(void)
{
asm
(
__asm__ volatile (
"mov %%cr0,%%rax;"
"or $8,%%rax;"
"mov %%rax,%%cr0;"
70,13 → 69,12
:
:
:"%rax"
);
);
}
 
void reset_TS_flag(void)
{
asm
(
__asm__ volatile (
"mov %%cr0,%%rax;"
"btc $4,%%rax;"
"mov %%rax,%%cr0;"
83,5 → 81,49
:
:
:"%rax"
);
);
}
 
void cpu_arch_init(void)
{
CPU->arch.tss = tss_p;
CPU->fpu_owner=NULL;
}
 
 
void cpu_identify(void)
{
cpu_info_t info;
int i;
 
CPU->arch.vendor = VendorUnknown;
if (has_cpuid()) {
cpuid(0, &info);
 
/*
* Check for AMD processor.
*/
if (info.cpuid_ebx==AMD_CPUID_EBX && info.cpuid_ecx==AMD_CPUID_ECX && info.cpuid_edx==AMD_CPUID_EDX) {
CPU->arch.vendor = VendorAMD;
}
 
/*
* Check for Intel processor.
*/
if (info.cpuid_ebx==INTEL_CPUID_EBX && info.cpuid_ecx==INTEL_CPUID_ECX && info.cpuid_edx==INTEL_CPUID_EDX) {
CPU->arch.vendor = VendorIntel;
}
cpuid(1, &info);
CPU->arch.family = (info.cpuid_eax>>8)&0xf;
CPU->arch.model = (info.cpuid_eax>>4)&0xf;
CPU->arch.stepping = (info.cpuid_eax>>0)&0xf;
}
}
 
void cpu_print_report(cpu_t* m)
{
printf("cpu%d: (%s family=%d model=%d stepping=%d) %dMHz\n",
m->id, vendor_str[m->arch.vendor], m->arch.family, m->arch.model, m->arch.stepping,
m->frequency_mhz);
}
/SPARTAN/trunk/arch/amd64/src/userspace.c
0,0 → 1,64
/*
* Copyright (C) 2005 Ondrej Palkovsky
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
#include <userspace.h>
#include <arch/pm.h>
#include <arch/types.h>
#include <arch.h>
#include <proc/thread.h>
#include <mm/vm.h>
 
 
/** Enter userspace
*
* Change CPU protection level to 3, enter userspace.
*
*/
void userspace(void)
{
pri_t pri;
pri = cpu_priority_high();
 
__asm__ volatile (""
"movq %0, %%rax;"
"movq %1, %%rbx;"
"movq %2, %%rcx;"
"movq %3, %%rdx;"
"movq %4, %%rsi;"
"pushq %%rax;"
"pushq %%rbx;"
"pushq %%rcx;"
"pushq %%rdx;"
"pushq %%rsi;"
"iretq;"
: : "i" (gdtselector(UDATA_DES) | PL_USER), "i" (USTACK_ADDRESS+(THREAD_STACK_SIZE-1)), "r" (pri), "i" (gdtselector(UTEXT_DES) | PL_USER), "i" (UTEXT_ADDRESS));
/* Unreachable */
for(;;);
}
/SPARTAN/trunk/arch/amd64/src/dummy.s
28,26 → 28,5
 
.text
 
.global userspace
.global before_thread_runs_arch
.global cpu_identify
.global cpu_arch_init
.global cpu_sleep
.global cpu_print_report
.global dummy
.global fpu_init
before_thread_runs_arch:
userspace:
cpu_identify:
cpu_arch_init:
cpu_sleep:
cpu_print_report:
dummy:
0:
ret
 
fpu_init:
fninit
ret
/SPARTAN/trunk/arch/ia32/src/fpu_context.c
49,30 → 49,20
 
void fpu_lazy_context_save(fpu_context_t *fctx)
{
asm
(
"push %%eax;"
"mov 0x8(%%esp),%%eax;"
"fnsave (%%eax);"
"pop %%eax;"
:"=m"(fctx)
:
:"eax"
);
return;
__asm__ (
"fnsave %0"
: "=m"(fctx)
);
}
 
void fpu_lazy_context_restore(fpu_context_t *fctx)
{
asm
(
"push %%eax;"
"mov 0x8(%%esp),%%eax;"
"frstor (%%eax);"
"pop %%eax;"
:"=m"(fctx)
:
:"eax"
);
return;
__asm__ (
"frstor %0"
: "=m"(fctx)
);
}
 
void fpu_init(void)