| /branches/sparc/kernel/arch/sparc64/include/sun4v/regdef.h |
|---|
| 43,6 → 43,7 |
| #define TSTATE_PSTATE_SHIFT 8 |
| #define TSTATE_PRIV_BIT (PSTATE_PRIV_BIT << TSTATE_PSTATE_SHIFT) |
| #define TSTATE_CWP_MASK 0x1f |
| #define TSTATE_IE_BIT (PSTATE_IE_BIT << TSTATE_PSTATE_SHIFT) |
| #define WSTATE_NORMAL(n) (n) |
| #define WSTATE_OTHER(n) ((n) << 3) |
| /branches/sparc/kernel/arch/sparc64/include/trap/sun4v/mmu.h |
|---|
| 69,6 → 69,7 |
| #define TTE_DATA_TADDR_OFFSET 13 |
| .macro FAST_INSTRUCTION_ACCESS_MMU_MISS_HANDLER |
| PREEMPTIBLE_HANDLER fast_instruction_access_mmu_miss |
| .endm |
| /* |
| /branches/sparc/kernel/arch/sparc64/src/sun4v/asm.S |
|---|
| 26,6 → 26,10 |
| # THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| # |
| #include <arch/mm/mmu.h> |
| #include <arch/regdef.h> |
| #include <arch/stack.h> |
| .text |
| /* TODO: remove it as soon as there is a scheduler for sun4v. It is here only to make the code compilable/ */ |
| 42,6 → 46,48 |
| .global read_from_ag_g7 |
| read_from_ag_g7: |
| /** Switch to userspace. |
| * |
| * %o0 Userspace entry address. |
| * %o1 Userspace stack pointer address. |
| * %o2 Userspace address of uarg structure. |
| */ |
| .global switch_to_userspace |
| switch_to_userspace: |
| #if 0 |
| save %o1, -STACK_WINDOW_SAVE_AREA_SIZE, %sp |
| flushw |
| wrpr %g0, 0, %cleanwin ! avoid information leak |
| mov %i2, %o0 ! uarg |
| xor %o1, %o1, %o1 ! %o1 is defined to hold pcb_ptr |
| ! set it to 0 |
| clr %i2 |
| clr %i3 |
| clr %i4 |
| clr %i5 |
| clr %i6 |
| wrpr %g0, 1, %tl ! enforce mapping via nucleus |
| rdpr %cwp, %g1 |
| wrpr %g1, TSTATE_IE_BIT, %tstate |
| wrpr %i0, 0, %tnpc |
| /* |
| * Set primary context according to secondary context. |
| * Secondary context has been already installed by |
| * higher-level functions. |
| */ |
| wr %g0, ASI_SECONDARY_CONTEXT_REG, %asi |
| ldxa [VA_SECONDARY_CONTEXT_REG] %asi, %g1 |
| wr %g0, ASI_PRIMARY_CONTEXT_REG, %asi |
| stxa %g1, [VA_PRIMARY_CONTEXT_REG] %asi |
| flush %i7 |
| /* |
| * Spills and fills will be handled by the userspace handlers. |
| */ |
| wrpr %g0, WSTATE_OTHER(0) | WSTATE_NORMAL(1), %wstate |
| done ! jump to userspace |
| #endif |
| /branches/sparc/kernel/arch/sparc64/src/trap/sun4v/trap_table.S |
|---|
| 280,7 → 280,7 |
| .org trap_table + TT_FAST_INSTRUCTION_ACCESS_MMU_MISS*ENTRY_SIZE |
| .global fast_instruction_access_mmu_miss_handler_tl0 |
| fast_instruction_access_mmu_miss_handler_tl0: |
| /*FAST_INSTRUCTION_ACCESS_MMU_MISS_HANDLER*/ |
| FAST_INSTRUCTION_ACCESS_MMU_MISS_HANDLER |
| /* TT = 0x68, TL = 0, fast_data_access_MMU_miss */ |
| .org trap_table + TT_FAST_DATA_ACCESS_MMU_MISS*ENTRY_SIZE |
| /branches/sparc/kernel/arch/sparc64/src/drivers/niagara.c |
|---|
| 60,11 → 60,18 |
| extern kbd_type_t kbd_type; |
| /** Writes a single character to the standard output. */ |
| static inline void do_putchar(const char c) { |
| /* repeat until the buffer is non-full */ |
| while (__hypercall_fast1(CONS_PUTCHAR, c) == EWOULDBLOCK) |
| ; |
| } |
| /** Writes a single character to the standard output. */ |
| static void niagara_putchar(struct chardev * cd, const char c) |
| { |
| __hypercall_fast1(CONS_PUTCHAR, c); |
| do_putchar(c); |
| if (c == '\n') |
| __hypercall_fast1(CONS_PUTCHAR, '\r'); |
| do_putchar('\r'); |
| } |
| /** |
| /branches/sparc/boot/arch/sparc64/loader/asm.S |
|---|
| 107,6 → 107,7 |
| * 3. Flush instruction pipeline. |
| */ |
| #if defined (SUN4U) |
| /* |
| * US3 processors have a write-invalidate cache, so explicitly |
| * invalidating it is not required. Whether to invalidate I-cache |
| 113,6 → 114,7 |
| * or not is decided according to the value of the global |
| * "subarchitecture" variable (set in the bootstrap). |
| */ |
| set subarchitecture, %g2 |
| ldub [%g2], %g2 |
| cmp %g2, 3 |
| 121,6 → 123,8 |
| 0: |
| call icache_flush |
| nop |
| #endif |
| 1: |
| membar #StoreStore |