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Ignore whitespace Rev 3680 → Rev 3681

/branches/dynload/uspace/app/dload/dload.c
0,0 → 1,108
/*
* Copyright (c) 2008 Jiri Svoboda
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup rtld rtld
* @brief
* @{
*/
/**
* @file
*/
 
#include <stdio.h>
#include <unistd.h>
#include <fcntl.h>
#include <loader/pcb.h>
 
/* from librtld */
#include <rtld.h>
#include <dynamic.h>
#include <elf_load.h>
#include <module.h>
 
void program_run(void *entry, pcb_t *pcb);
 
int main(int argc, char *argv[])
{
static module_t prog;
 
DPRINTF("Hello, world! (from dload)\n");
if (__pcb->dynamic == NULL) {
printf("This is the dynamic loader. It is not supposed "
"to be executed directly.\n");
return -1;
}
 
/*
* First we need to process dynamic sections of the executable
* program and insert it into the module graph.
*/
 
DPRINTF("Parse program .dynamic section at 0x%x\n", __pcb->dynamic);
dynamic_parse(__pcb->dynamic, 0, &prog.dyn);
prog.bias = 0;
prog.dyn.soname = "[program]";
 
/* Initialize list of loaded modules */
list_initialize(&runtime_env.modules_head);
list_append(&prog.modules_link, &runtime_env.modules_head);
 
/* Pointer to program module. Used as root of the module graph. */
runtime_env.program = &prog;
 
/*
* Now we can continue with loading all other modules.
*/
 
DPRINTF("Load all program dependencies\n");
module_load_deps(&prog);
 
/*
* Now relocate/link all modules together.
*/
 
/* Process relocations in all modules */
DPRINTF("Relocate all modules\n");
modules_process_relocs();
 
/*
* Finally, run the main program.
*/
DPRINTF("Run program.. (at 0x%lx)\n", (uintptr_t)__pcb->entry);
 
#ifndef RTLD_DEBUG
close_console();
#endif
program_run(__pcb->entry, __pcb);
 
/* not reached */
return 0;
}
 
/** @}
*/
/branches/dynload/uspace/app/dload/Makefile
0,0 → 1,100
#
# Copyright (c) 2005 Martin Decky
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions
# are met:
#
# - Redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer.
# - Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in the
# documentation and/or other materials provided with the distribution.
# - The name of the author may not be used to endorse or promote products
# derived from this software without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#
 
include ../../../version
include ../../Makefile.config
 
## Setup toolchain
#
 
LIBC_PREFIX = ../../lib/libc
SOFTINT_PREFIX = ../../lib/softint
RTLD_PREFIX = ../../lib/rtld
include $(LIBC_PREFIX)/Makefile.toolchain
include arch/$(ARCH)/Makefile.inc
 
CFLAGS += -Iinclude -I../../srv/loader/include -I../../lib/rtld/include -O0 -ggdb
LFLAGS +=
 
LIBS = $(RTLD_PREFIX)/librtld.a $(LIBC_PREFIX)/libc.a $(SOFTINT_PREFIX)/libsoftint.a
DEFS += -DRELEASE=\"$(RELEASE)\"
 
ifdef REVISION
DEFS += "-DREVISION=\"$(REVISION)\""
endif
 
ifdef TIMESTAMP
DEFS += "-DTIMESTAMP=\"$(TIMESTAMP)\""
endif
 
## Sources
#
 
OUTPUT = dload
GENERIC_SOURCES = \
dload.c
 
GENERIC_OBJECTS := $(addsuffix .o,$(basename $(GENERIC_SOURCES)))
ARCH_OBJECTS := $(addsuffix .o,$(basename $(ARCH_SOURCES)))
 
.PHONY: all clean depend disasm sections inc
 
all: inc $(OUTPUT) disasm sections
 
inc:
ln -sfn ../arch/$(ARCH)/include include/arch
 
-include Makefile.depend
 
clean:
-rm -f $(OUTPUT) $(OUTPUT).map $(OUTPUT).disasm $(OUTPUT).sections Makefile.depend *.o arch/$(ARCH)/_link.ld include/arch
find arch/$(ARCH)/ -name '*.o' -follow -exec rm \{\} \;
 
depend:
$(CC) $(DEFS) $(CFLAGS) -M $(ARCH_SOURCES) $(GENERIC_SOURCES)> Makefile.depend
 
$(OUTPUT): $(ARCH_OBJECTS) $(GENERIC_OBJECTS) $(LIBS) arch/$(ARCH)/_link.ld
$(LD) -T arch/$(ARCH)/_link.ld $(ARCH_OBJECTS) $(GENERIC_OBJECTS) $(LIBS) $(LFLAGS) -o $@ -Map $(OUTPUT).map
 
disasm:
$(OBJDUMP) -d -S -s $(OUTPUT) >$(OUTPUT).disasm
 
sections:
$(OBJDUMP) -h $(OUTPUT) >$(OUTPUT).sections
 
arch/$(ARCH)/_link.ld: arch/$(ARCH)/_link.ld.in
$(CC) $(DEFS) $(CFLAGS) -DLIBC_PREFIX=$(LIBC_PREFIX) -E -x c $< | grep -v "^\#" > $@
 
%.o: %.S
$(CC) $(DEFS) $(AFLAGS) $(CFLAGS) -D__ASM__ -c $< -o $@
 
%.o: %.s
$(AS) $(AFLAGS) $< -o $@
 
%.o: %.c
$(CC) $(DEFS) $(CFLAGS) -c $< -o $@
/branches/dynload/uspace/app/dload/arch/ppc32/_link.ld.in
0,0 → 1,87
STARTUP(LIBC_PREFIX/arch/ARCH/src/entry.o)
ENTRY(__entry)
 
PHDRS {
text PT_LOAD FLAGS(5);
data PT_LOAD FLAGS(6);
}
 
SECTIONS {
. = 0x40001000;
 
.init : {
*(.init);
} :text
.text : {
*(.text);
*(.rodata*);
} :text
.rel.plt : {
*(.rel.plt);
}
/*
*.rel.dyn MUST FOLLOW IMMEDIATELY after .rel.plt
* without alignment gap or DT_REL will be broken
*/
.rel.dyn : {
*(.rel.*);
} :text
 
.dynamic : {
*(.dynamic);
} :text
 
.dynsym : {
*(.dynsym);
} :text
 
.dynstr : {
*(.dynstr);
} :text
 
/* data segment */
. = ALIGN(0x1000);
 
.data : {
*(.data);
*(.sdata);
} :data
 
.dynamic : {
*(.dynamic);
} :text
 
.dynsym : {
*(.dynsym);
} :text
 
.dynstr : {
*(.dynstr);
} :text
 
.tdata : {
_tdata_start = .;
*(.tdata);
_tdata_end = .;
} :data
.tbss : {
_tbss_start = .;
*(.tbss);
_tbss_end = .;
} :data
_tls_alignment = MAX(ALIGNOF(.tdata), ALIGNOF(.tbss));
.bss : {
*(.sbss);
*(COMMON);
*(.bss);
} :data
 
/* On ppc32 the plt section is uninitialized and must be here! */
.plt : {
*(.plt);
} :data
 
. = ALIGN(0x1000);
_heap = .;
}
/branches/dynload/uspace/app/dload/arch/ppc32/Makefile.inc
0,0 → 1,32
#
# Copyright (c) 2008 Jiri Svoboda
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions
# are met:
#
# - Redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer.
# - Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in the
# documentation and/or other materials provided with the distribution.
# - The name of the author may not be used to endorse or promote products
# derived from this software without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#
 
CFLAGS += -D__32_BITS__
 
ARCH_SOURCES := \
arch/$(ARCH)/start.s
/branches/dynload/uspace/app/dload/arch/ppc32/start.s
0,0 → 1,40
#
# Copyright (c) 2008 Jiri Svoboda
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions
# are met:
#
# - Redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer.
# - Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in the
# documentation and/or other materials provided with the distribution.
# - The name of the author may not be used to endorse or promote products
# derived from this software without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#
 
.globl program_run
 
## void program_run(void *entry_point, void *pcb);
#
# %r3 contains entry_point
# %r4 contains pcb
#
# Jump to a program entry point
program_run:
mtctr %r3
mr %r6, %r4 # Pass pcb to the entry point in %r6
bctr
/branches/dynload/uspace/app/dload/arch/ia32/_link.ld.in
0,0 → 1,84
STARTUP(LIBC_PREFIX/arch/ARCH/src/entry.o)
ENTRY(__entry)
 
PHDRS {
text PT_LOAD FLAGS(5);
data PT_LOAD FLAGS(6);
}
 
SECTIONS {
. = 0x60001000 + SIZEOF_HEADERS;
 
.init : {
*(.init);
} :text
.text : {
*(.text);
*(.text.*);
*(.rodata*);
} :text
 
.rel.plt : {
*(.rel.plt);
}
/*
*.rel.dyn MUST FOLLOW IMMEDIATELY after .rel.plt
* without alignment gap or DT_REL will be broken
*/
.rel.dyn : {
*(.rel.*);
} :text
 
.plt : {
*(.plt);
} :text
 
.dynamic : {
*(.dynamic);
} :text
 
.dynsym : {
*(.dynsym);
} :text
 
.dynstr : {
*(.dynstr);
} :text
 
. = . + 0x1000;
 
.data : {
*(.data);
} :data
 
.data.rel : {
*(.data.rel);
} :data
 
.got : {
*(.got);
} :data
.got.plt : {
*(.got.plt);
} :data
 
.bss : {
*(COMMON);
*(.bss);
} :data
 
.tdata : {
_tdata_start = .;
*(.tdata);
_tdata_end = .;
} :data
.tbss : {
_tbss_start = .;
*(.tbss);
_tbss_end = .;
} :data
_tls_alignment = MAX(ALIGNOF(.tdata), ALIGNOF(.tbss));
. = ALIGN(0x1000);
_heap = .;
}
/branches/dynload/uspace/app/dload/arch/ia32/Makefile.inc
0,0 → 1,32
#
# Copyright (c) 2008 Jiri Svoboda
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions
# are met:
#
# - Redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer.
# - Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in the
# documentation and/or other materials provided with the distribution.
# - The name of the author may not be used to endorse or promote products
# derived from this software without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#
 
CFLAGS += -D__32_BITS__
 
ARCH_SOURCES := \
arch/$(ARCH)/start.c
/branches/dynload/uspace/app/dload/arch/ia32/start.c
0,0 → 1,49
/*
* Copyright (c) 2008 Jiri Svoboda
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup rtld rtld
* @brief
* @{
*/
/**
* @file
*/
 
#include <loader/pcb.h>
 
void program_run(void *entry, pcb_t *pcb)
{
asm (
"mov %%eax, %%ebx\n"
"jmp *%0\n"
:: "m" (entry), "a" (pcb)
);
}
 
/** @}
*/
/branches/dynload/uspace/lib/rtld/rtld.c
34,75 → 34,9
* @file
*/
 
#include <stdio.h>
#include <unistd.h>
#include <fcntl.h>
#include <loader/pcb.h>
 
#include <rtld.h>
#include <dynamic.h>
#include <elf_load.h>
#include <module.h>
#include <rtld_arch.h>
 
runtime_env_t runtime_env;
 
void program_run(void *entry, pcb_t *pcb);
 
static void rtld_main(void)
{
static module_t prog;
 
DPRINTF("Hello, world! (from rtld)\n");
 
/*
* First we need to process dynamic sections of the executable
* program and insert it into the module graph.
*/
 
DPRINTF("Parse program .dynamic section at 0x%x\n", __pcb->dynamic);
dynamic_parse(__pcb->dynamic, 0, &prog.dyn);
prog.bias = 0;
prog.dyn.soname = "[program]";
 
/* Initialize list of loaded modules */
list_initialize(&runtime_env.modules_head);
list_append(&prog.modules_link, &runtime_env.modules_head);
 
/* Pointer to program module. Used as root of the module graph. */
runtime_env.program = &prog;
 
/*
* Now we can continue with loading all other modules.
*/
 
DPRINTF("Load all program dependencies\n");
module_load_deps(&prog);
 
/*
* Now relocate/link all modules together.
*/
 
/* Process relocations in all modules */
DPRINTF("Relocate all modules\n");
modules_process_relocs();
 
/*
* Finally, run the main program.
*/
DPRINTF("Run program.. (at 0x%lx)\n", (uintptr_t)__pcb->entry);
 
#ifndef RTLD_DEBUG
close_console();
#endif
program_run(__pcb->entry, __pcb);
}
 
int main(int argc, char *argv[])
{
rtld_main();
return 0;
}
 
/** @}
*/
/branches/dynload/uspace/lib/rtld/Makefile
33,7 → 33,6
#
 
LIBC_PREFIX = ../../lib/libc
SOFTINT_PREFIX = ../../lib/softint
include $(LIBC_PREFIX)/Makefile.toolchain
include arch/$(ARCH)/Makefile.inc
 
42,7 → 41,6
CFLAGS += -Iinclude -I../../srv/loader/include -O0 -ggdb
LFLAGS +=
 
LIBS = $(LIBC_PREFIX)/libc.pic.a $(SOFTINT_PREFIX)/libsoftint.pic.a
DEFS += -DRELEASE=\"$(RELEASE)\"
 
ifdef REVISION
56,7 → 54,7
## Sources
#
 
OUTPUT = rtld
OUTPUT = librtld.a
GENERIC_SOURCES = \
rtld.c \
elf_load.c \
69,7 → 67,7
 
.PHONY: all clean depend disasm sections inc
 
all: inc $(OUTPUT) disasm sections
all: inc $(OUTPUT)
 
inc:
ln -sfn ../arch/$(ARCH)/include include/arch
83,18 → 81,9
depend:
$(CC) $(DEFS) $(CFLAGS) -M $(ARCH_SOURCES) $(GENERIC_SOURCES)> Makefile.depend
 
$(OUTPUT): $(ARCH_OBJECTS) $(GENERIC_OBJECTS) $(LIBS) arch/$(ARCH)/_link.ld
$(LD) -T arch/$(ARCH)/_link.ld $(ARCH_OBJECTS) $(GENERIC_OBJECTS) $(LIBS) $(LFLAGS) -o $@ -Map $(OUTPUT).map
$(OUTPUT): depend $(ARCH_OBJECTS) $(GENERIC_OBJECTS)
$(AR) rc $(OUTPUT) $(ARCH_OBJECTS) $(GENERIC_OBJECTS)
 
disasm:
$(OBJDUMP) -d -S -s $(OUTPUT) >$(OUTPUT).disasm
 
sections:
$(OBJDUMP) -h $(OUTPUT) >$(OUTPUT).sections
 
arch/$(ARCH)/_link.ld: arch/$(ARCH)/_link.ld.in
$(CC) $(DEFS) $(CFLAGS) -DLIBC_PREFIX=$(LIBC_PREFIX) -E -x c $< | grep -v "^\#" > $@
 
%.o: %.S
$(CC) $(DEFS) $(AFLAGS) $(CFLAGS) -D__ASM__ -c $< -o $@
 
/branches/dynload/uspace/lib/rtld/arch/ppc32/_link.ld.in
File deleted
/branches/dynload/uspace/lib/rtld/arch/ppc32/include/elf_dyn.h
40,7 → 40,11
*/
 
#define R_PPC_ADDR32 1
#define R_PPC_ADDR16_LO 4
#define R_PPC_ADDR16_HI 5
#define R_PPC_ADDR16_HA 6
#define R_PPC_REL24 10
#define R_PPC_COPY 19
#define R_PPC_JMP_SLOT 21
#define R_PPC_RELATIVE 22
 
/branches/dynload/uspace/lib/rtld/arch/ppc32/Makefile.inc
29,5 → 29,4
CFLAGS += -D__32_BITS__
 
ARCH_SOURCES := \
arch/$(ARCH)/src/reloc.c \
arch/$(ARCH)/src/start.s
arch/$(ARCH)/src/reloc.c
/branches/dynload/uspace/lib/rtld/arch/ppc32/src/start.s
File deleted
/branches/dynload/uspace/lib/rtld/arch/ppc32/src/reloc.c
144,6 → 144,7
elf_symbol_t *sym_table;
elf_symbol_t *sym;
uint32_t *r_ptr;
uint16_t *r_ptr16;
char *str_tab;
elf_symbol_t *sym_def;
154,6 → 155,8
uint32_t *_plt_ent;
uint32_t plt_n;
uint32_t pidx;
uint32_t t_addr;
uint32_t sym_size;
 
plt = m->dyn.plt_got;
plt_n = m->dyn.plt_rel_sz / sizeof(elf_rela_t);
184,6 → 187,7
 
rel_type = ELF32_R_TYPE(r_info);
r_ptr = (uint32_t *)(r_offset + m->bias);
r_ptr16 = (uint16_t *)(r_offset + m->bias);
 
if (sym->st_name != 0) {
DPRINTF("rel_type: %x, rel_offset: 0x%x\n", rel_type, r_offset);
201,6 → 205,22
}
 
switch (rel_type) {
case R_PPC_ADDR16_LO:
DPRINTF("fixup R_PPC_ADDR16_LO (#lo(s+a))\n");
*r_ptr16 = (sym_addr + r_addend) & 0xffff;
break;
 
case R_PPC_ADDR16_HI:
DPRINTF("fixup R_PPC_ADDR16_HI (#hi(s+a))\n");
*r_ptr16 = (sym_addr + r_addend) >> 16;
break;
 
case R_PPC_ADDR16_HA:
DPRINTF("fixup R_PPC_ADDR16_HA (#ha(s+a))\n");
t_addr = sym_addr + r_addend;
*r_ptr16 = (t_addr >> 16) + ((t_addr & 0x8000) ? 1 : 0);
break;
 
case R_PPC_JMP_SLOT:
DPRINTF("fixup R_PPC_JMP_SLOT (b+v)\n");
pidx = (r_ptr - _plt_ent) / 2;
217,6 → 237,22
DPRINTF("fixup R_PPC_ADDR32 (b+v+a)\n");
*r_ptr = r_addend + sym_addr;
break;
 
case R_PPC_COPY:
/*
* Copy symbol data from shared object to specified
* location.
*/
DPRINTF("fixup R_PPC_COPY (s)\n");
sym_size = sym->st_size;
if (sym_size != sym_def->st_size) {
printf("warning: mismatched symbol sizes\n");
/* Take the lower value. */
if (sym_size > sym_def->st_size)
sym_size = sym_def->st_size;
}
memcpy(r_ptr, (const void *)sym_addr, sym_size);
break;
case R_PPC_RELATIVE:
DPRINTF("fixup R_PPC_RELATIVE (b+a)\n");
229,7 → 265,7
/*TODO*/
break;
default:
printf("unknown relocation type\n");
printf("unknown relocation type %d\n", rel_type);
break;
}
}
/branches/dynload/uspace/lib/rtld/arch/ia32/_link.ld.in
File deleted
/branches/dynload/uspace/lib/rtld/arch/ia32/Makefile.inc
29,5 → 29,4
CFLAGS += -D__32_BITS__
 
ARCH_SOURCES := \
arch/$(ARCH)/src/reloc.c \
arch/$(ARCH)/src/start.c
arch/$(ARCH)/src/reloc.c
/branches/dynload/uspace/lib/rtld/arch/ia32/src/start.c
File deleted
/branches/dynload/uspace/lib/rtld/arch/ia32/src/reloc.c
124,7 → 124,12
// DPRINTF("fixup R_386_RELATIVE (b+a)\n");
*r_ptr += m->bias;
break;
 
default:
printf("Unknown relocation type %d\n", rel_type);
break;
}
 
}
 
}
/branches/dynload/uspace/lib/libc/shared/Makefile
42,8 → 42,11
 
LFLAGS = -shared -soname libc.so.0 --whole-archive
 
LIBS = $(LIBC_PREFIX)/libc.pic.a $(SOFTINT_PREFIX)/libsoftint.a
# $(RTLD_PREFIX)/rtld.so
LIBS = \
$(LIBC_PREFIX)/libc.pic.a \
$(SOFTINT_PREFIX)/libsoftint.a \
$(RTLD_PREFIX)/librtld.a
 
DEFS += -DRELEASE=\"$(RELEASE)\"
 
ifdef REVISION
/branches/dynload/uspace/lib/libc/Makefile.app
30,7 → 30,7
#
 
ifeq ($(CONFIG_SHARED_LIBC),y)
LFLAGS := -Bdynamic -I/lib/rtld -rpath-link $(RTLD_PREFIX)
LFLAGS := -Bdynamic -I/app/dload -rpath-link $(RTLD_PREFIX)
LIBS = $(LIBC_PREFIX)/shared/libc.so.0
LD_SCRIPT = $(LIBC_PREFIX)/shared/arch/$(ARCH)/_link.ld
else
/branches/dynload/uspace/srv/loader/include/elf_load.h
83,7 → 83,6
 
int elf_load_file(char *file_name, size_t so_bias, eld_flags_t flags,
elf_info_t *info);
void elf_run(elf_info_t *info, pcb_t *pcb);
void elf_create_pcb(elf_info_t *info, pcb_t *pcb);
 
#endif
/branches/dynload/uspace/srv/loader/main.c
59,6 → 59,8
#include <elf.h>
#include <elf_load.h>
 
void program_run(void *entry, pcb_t *pcb);
 
/** Pathname of the file that will be loaded */
static char *pathname = NULL;
 
276,13 → 278,13
close_console();
 
ipc_answer_0(rid, EOK);
elf_run(&interp_info, &pcb);
program_run(interp_info.entry, &pcb);
 
} else {
/* Statically linked program */
close_console();
ipc_answer_0(rid, EOK);
elf_run(&prog_info, &pcb);
program_run(prog_info.entry, &pcb);
}
 
/* Not reached */
/branches/dynload/uspace/srv/loader/elf_load.c
126,20 → 126,6
return rc;
}
 
/** Run an ELF executable.
*
* Transfers control to the entry point of an ELF executable loaded
* earlier with elf_load_file(). This function does not return.
*
* @param info Info structure filled earlier by elf_load_file()
*/
void elf_run(elf_info_t *info, pcb_t *pcb)
{
program_run(info->entry, pcb);
 
/* not reached */
}
 
/** Create the program control block (PCB).
*
* Fills the program control block @a pcb with information from
309,8 → 295,8
return load_segment(elf, entry);
break;
case PT_INTERP:
/* Assume silently interp == "/lib/rtld" */
elf->info->interp = "/lib/rtld";
/* Assume silently interp == "/app/dload" */
elf->info->interp = "/app/dload";
break;
case PT_DYNAMIC:
case PT_SHLIB:
/branches/dynload/uspace/Makefile
52,6 → 52,7
app/tetris \
app/tester \
app/dltest \
app/dload \
app/trace \
app/klog \
app/init \
/branches/dynload/boot/arch/ppc32/loader/Makefile
101,6 → 101,7
RD_APPS = \
$(USPACEDIR)/app/tetris/tetris \
$(USPACEDIR)/app/tester/tester \
$(USPACEDIR)/app/dload/dload \
$(USPACEDIR)/app/dltest/dltest \
$(USPACEDIR)/app/trace/trace \
$(USPACEDIR)/app/klog/klog \
107,7 → 108,6
$(USPACEDIR)/app/bdsh/bdsh
 
RD_LIBS = \
$(USPACEDIR)/lib/rtld/rtld \
$(USPACEDIR)/lib/libc/shared/libc.so.0
 
OBJECTS := $(addsuffix .o,$(basename $(SOURCES)))
/branches/dynload/boot/arch/ia32/Makefile.inc
51,12 → 51,12
$(USPACEDIR)/app/tetris/tetris \
$(USPACEDIR)/app/tester/tester \
$(USPACEDIR)/app/dltest/dltest \
$(USPACEDIR)/app/dload/dload \
$(USPACEDIR)/app/trace/trace \
$(USPACEDIR)/app/klog/klog \
$(USPACEDIR)/app/bdsh/bdsh
 
RD_LIBS = \
$(USPACEDIR)/lib/rtld/rtld \
$(USPACEDIR)/lib/libc/shared/libc.so.0
 
build: $(BASE)/image.iso