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Ignore whitespace Rev 1916 → Rev 1917

/trunk/kernel/arch/sparc64/include/arch.h
42,7 → 42,7
#define ASI_NUCLEUS_QUAD_LDD 0x24 /** ASI for 16-byte atomic loads. */
#define ASI_UPA_CONFIG 0x4a /** ASI of the UPA_CONFIG register. */
 
#define NWINDOW 8 /** Number of register window sets. */
#define NWINDOWS 8 /** Number of register window sets. */
 
#endif
 
/trunk/kernel/arch/sparc64/src/trap/trap_table.S
673,7 → 673,7
*/
wrpr %g0, WSTATE_OTHER(0) | WSTATE_NORMAL(2), %wstate
 
wrpr %g0, NWINDOW - 1, %cleanwin ! prevent unnecessary clean_window exceptions
wrpr %g0, NWINDOWS - 1, %cleanwin ! prevent unnecessary clean_window exceptions
 
/*
* Switch to kernel stack. The old stack is
830,7 → 830,7
*/
and %g1, TSTATE_CWP_MASK, %l0
inc %l0
and %l0, NWINDOW - 1, %l0 ! %l0 mod NWINDOW
and %l0, NWINDOWS - 1, %l0 ! %l0 mod NWINDOWS
rdpr %cwp, %l1
cmp %l0, %l1
bz 0f ! CWP is ok
901,7 → 901,7
*/
sub %g1, %g2, %g3
dec %g3
and %g3, NWINDOW - 1, %g3
and %g3, NWINDOWS - 1, %g3
wrpr %g3, 0, %cwp
 
/*
933,7 → 933,7
ldx [%g7 + I7_OFFSET], %i7
 
dec %g3
and %g3, NWINDOW - 1, %g3
and %g3, NWINDOWS - 1, %g3
wrpr %g3, 0, %cwp ! switch to the preceeding window
 
ba 0b
946,13 → 946,13
*/
wrpr %g1, 0, %cwp
add %g4, %g2, %g2
cmp %g2, NWINDOW - 2
bg 2f ! fix the CANRESTORE=NWINDOW-1 anomaly
mov NWINDOW - 2, %g1 ! use dealy slot for both cases
cmp %g2, NWINDOWS - 2
bg 2f ! fix the CANRESTORE=NWINDOWS-1 anomaly
mov NWINDOWS - 2, %g1 ! use dealy slot for both cases
sub %g1, %g2, %g1
wrpr %g0, 0, %otherwin
wrpr %g1, 0, %cansave ! NWINDOW - 2 - CANRESTORE
wrpr %g1, 0, %cansave ! NWINDOWS - 2 - CANRESTORE
wrpr %g2, 0, %canrestore ! OTHERWIN + windows in the buffer
wrpr %g2, 0, %cleanwin ! avoid information leak
 
972,14 → 972,14
* save %g6, -PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE, %sp
*
* instruction trapped and spilled a register window into the userspace
* window buffer, we have just restored NWINDOW - 1 register windows.
* window buffer, we have just restored NWINDOWS - 1 register windows.
* However, CANRESTORE can be only NWINDOW - 2 at most.
*
* The solution is to manually switch to (CWP - 1) mod NWINDOW
* The solution is to manually switch to (CWP - 1) mod NWINDOWS
* and set the window state registers so that:
*
* CANRESTORE = NWINDOW - 2
* CLEANWIN = NWINDOW - 2
* CANRESTORE = NWINDOWS - 2
* CLEANWIN = NWINDOWS - 2
* CANSAVE = 0
* OTHERWIN = 0
*
993,7 → 993,7
 
rdpr %cwp, %g1
dec %g1
and %g1, NWINDOW - 1, %g1
and %g1, NWINDOWS - 1, %g1
wrpr %g1, 0, %cwp ! CWP--
.if \is_syscall
/trunk/kernel/arch/sparc64/src/cpu/cpu.c
40,6 → 40,9
#include <genarch/ofw/ofw_tree.h>
#include <arch/types.h>
#include <arch/drivers/tick.h>
#include <arch/mm/page.h>
#include <arch/mm/tlb.h>
#include <macros.h>
 
/** Perform sparc64 specific initialization of the processor structure for the current processor. */
void cpu_arch_init(void)
52,6 → 55,9
upa_config.value = upa_config_read();
CPU->arch.mid = upa_config.mid;
/*
* Detect processor frequency.
*/
node = ofw_tree_find_child_by_device_type(ofw_tree_lookup("/"), "cpu");
while (node) {
ofw_tree_property_t *prop;
70,6 → 76,22
 
CPU->arch.clock_frequency = clock_frequency;
tick_init();
/*
* Lock CPU stack in DTLB.
*/
uintptr_t base = ALIGN_DOWN(config.base, 1<<KERNEL_PAGE_WIDTH);
if (!overlaps((uintptr_t) CPU->stack, PAGE_SIZE, base, (1<<KERNEL_PAGE_WIDTH))) {
/*
* Kernel stack of this processor is not locked in DTLB.
* First, demap any already existing mappings.
* Second, create a locked mapping for it.
*/
dtlb_demap(TLB_DEMAP_PAGE, TLB_DEMAP_NUCLEUS, (uintptr_t) CPU->stack);
dtlb_insert_mapping((uintptr_t) CPU->stack, KA2PA(CPU->stack), PAGESIZE_8K, true, true);
}
 
}
 
/** Read version information from the current processor. */
/trunk/kernel/arch/sparc64/src/mm/tsb.c
87,7 → 87,7
* be repeated.
*/
 
tsb->tag.invalid = 1; /* invalidate the entry (tag target has this set to 0 */
tsb->tag.invalid = 1; /* invalidate the entry (tag target has this set to 0) */
 
write_barrier();
 
/trunk/kernel/arch/sparc64/src/mm/page.c
119,10 → 119,11
{ PAGESIZE_512K, 64*PAGE_SIZE, 2 }, /* 1M */
{ PAGESIZE_512K, 64*PAGE_SIZE, 4 }, /* 2M */
{ PAGESIZE_4M, 0, 1 } /* 4M */
{ PAGESIZE_4M, 512*PAGE_SIZE, 2 } /* 8M */
};
ASSERT(ALIGN_UP(physaddr, PAGE_SIZE) == physaddr);
ASSERT(size <= 4*1024*1024);
ASSERT(size <= 8*1024*1024);
if (size <= FRAME_SIZE)
order = 0;
/trunk/kernel/arch/sparc64/src/start.S
29,6 → 29,7
#include <arch/arch.h>
#include <arch/regdef.h>
#include <arch/boot/boot.h>
#include <arch/stack.h>
 
#include <arch/mm/mmu.h>
#include <arch/mm/tlb.h>
56,7 → 57,6
* following environment:
* - TLBs are on
* - identity mapping for the kernel image
* - identity mapping for memory stack
*/
 
.global kernel_image_start
67,7 → 67,10
* Setup basic runtime environment.
*/
 
flushw ! flush all but the active register window
wrpr %g0, NWINDOWS - 2, %cansave ! set maximum saveable windows
wrpr %g0, 0, %canrestore ! get rid of windows we will never need again
wrpr %g0, 0, %otherwin ! make sure the window state is consistent
wrpr %g0, NWINDOWS - 1, %cleanwin ! prevent needless clean_window traps for kernel
 
wrpr %g0, 0, %tl ! TL = 0, primary context register is used
 
215,6 → 218,14
brz %l7, 1f ! skip if you are not the bootstrap CPU
nop
 
/*
* So far, we have not touched the stack.
* It is a good idead to set the kernel stack to a known state now.
*/
sethi %hi(temporary_boot_stack), %sp
or %sp, %lo(temporary_boot_stack), %sp
sub %sp, STACK_BIAS, %sp
 
sethi %hi(bootinfo), %o0
call memcpy ! copy bootinfo
or %o0, %lo(bootinfo), %o0
272,3 → 283,26
0:
ba 0b
nop
 
 
.section K_DATA_START, "aw", @progbits
 
/*
* Create small stack to be used by the bootstrap processor.
* It is going to be used only for a very limited period of
* time, but we switch to it anyway, just to be sure we are
* properly initialized.
*
* What is important is that this piece of memory is covered
* by the 4M DTLB locked entry and therefore there will be
* no surprises like deadly combinations of spill trap and
* and TLB miss on the stack address.
*/
 
#define INITIAL_STACK_SIZE 1024
 
.align STACK_ALIGNMENT
.space INITIAL_STACK_SIZE
.align STACK_ALIGNMENT
temporary_boot_stack:
.space STACK_WINDOW_SAVE_AREA_SIZE
/trunk/boot/arch/sparc64/loader/boot.S
1,5 → 1,6
#
# Copyright (C) 2006 Martin Decky
# Copyright (C) 2006 Jakub Jermar
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without