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Compare Revisions

• This comparison shows the changes necessary to convert path

  → /trunk/kernel/arch/sparc64/src/mm/page.c @ 2047

  → /trunk/kernel/arch/sparc64/src/mm/page.c @ 2048

  ↔ Reverse comparison

• Compare Path:	Rev

  With Path:	Rev

Ignore whitespace Rev 2047 → Rev 2048

/trunk/kernel/arch/sparc64/src/mm/page.c
45,8 → 45,8
#ifdef CONFIG_SMP
/** Entries locked in DTLB of BSP.
*
* Application processors need to have the same locked entries
* in their DTLBs as the bootstrap processor.
* Application processors need to have the same locked entries in their DTLBs as
* the bootstrap processor.
*/
static struct {
uintptr_t virt_page;
84,19 → 84,16
/** Map memory-mapped device into virtual memory.
*
* So far, only DTLB is used to map devices into memory.
* Chances are that there will be only a limited amount of
* devices that the kernel itself needs to lock in DTLB.
* So far, only DTLB is used to map devices into memory. Chances are that there
* will be only a limited amount of devices that the kernel itself needs to
* lock in DTLB.
*
* @param physaddr Physical address of the page where the
* device is located. Must be at least
* page-aligned.
* @param size Size of the device's registers. Must not
* exceed 4M and must include extra space
* caused by the alignment.
* @param physaddr Physical address of the page where the device is located.
* Must be at least page-aligned.
* @param size Size of the device's registers. Must not exceed 4M and must
* include extra space caused by the alignment.
*
* @return Virtual address of the page where the device is
* mapped.
* @return Virtual address of the page where the device is mapped.
*/
uintptr_t hw_map(uintptr_t physaddr, size_t size)
{
114,17 → 111,17
{ PAGESIZE_8K, PAGE_SIZE, 2 }, /* 16K */
{ PAGESIZE_8K, PAGE_SIZE, 4 }, /* 32K */
{ PAGESIZE_64K, 0, 1}, /* 64K */
{ PAGESIZE_64K, 8*PAGE_SIZE, 2 }, /* 128K */
{ PAGESIZE_64K, 8*PAGE_SIZE, 4 }, /* 256K */
{ PAGESIZE_64K, 8 * PAGE_SIZE, 2 }, /* 128K */
{ PAGESIZE_64K, 8 * PAGE_SIZE, 4 }, /* 256K */
{ PAGESIZE_512K, 0, 1 }, /* 512K */
{ PAGESIZE_512K, 64*PAGE_SIZE, 2 }, /* 1M */
{ PAGESIZE_512K, 64*PAGE_SIZE, 4 }, /* 2M */
{ PAGESIZE_512K, 64 * PAGE_SIZE, 2 }, /* 1M */
{ PAGESIZE_512K, 64 * PAGE_SIZE, 4 }, /* 2M */
{ PAGESIZE_4M, 0, 1 }, /* 4M */
{ PAGESIZE_4M, 512*PAGE_SIZE, 2 } /* 8M */
{ PAGESIZE_4M, 512 * PAGE_SIZE, 2 } /* 8M */
};
ASSERT(ALIGN_UP(physaddr, PAGE_SIZE) == physaddr);
ASSERT(size <= 8*1024*1024);
ASSERT(size <= 8 * 1024 * 1024);
if (size <= FRAME_SIZE)
order = 0;
144,9 → 141,9
/*
* First, insert the mapping into DTLB.
*/
dtlb_insert_mapping(virtaddr + i*sizemap[order].increment,
physaddr + i*sizemap[order].increment,
sizemap[order].pagesize_code, true, false);
dtlb_insert_mapping(virtaddr + i * sizemap[order].increment,
physaddr + i * sizemap[order].increment,
sizemap[order].pagesize_code, true, false);
#ifdef CONFIG_SMP
/*
153,9 → 150,9
* Second, save the information about the mapping for APs.
*/
bsp_locked_dtlb_entry[bsp_locked_dtlb_entries].virt_page =
virtaddr + i*sizemap[order].increment;
virtaddr + i * sizemap[order].increment;
bsp_locked_dtlb_entry[bsp_locked_dtlb_entries].phys_page =
physaddr + i*sizemap[order].increment;
physaddr + i * sizemap[order].increment;
bsp_locked_dtlb_entry[bsp_locked_dtlb_entries].pagesize_code =
sizemap[order].pagesize_code;
bsp_locked_dtlb_entries++;