| /trunk/kernel/arch/sparc64/include/mm/frame.h |
|---|
| 35,7 → 35,20 |
| #ifndef KERN_sparc64_FRAME_H_ |
| #define KERN_sparc64_FRAME_H_ |
| #define FRAME_WIDTH 13 /* 8K */ |
| /* |
| * Page size supported by the MMU. |
| * For 8K there is the nasty illegal virtual aliasing problem. |
| * Therefore, the kernel uses 8K only internally on the TLB and TSB levels. |
| */ |
| #define MMU_FRAME_WIDTH 13 /* 8K */ |
| #define MMU_FRAME_SIZE (1 << MMU_FRAME_WIDTH) |
| /* |
| * Page size exported to the generic memory management subsystems. |
| * This page size is not directly supported by the MMU, but we can emulate |
| * each 16K page with a pair of adjacent 8K pages. |
| */ |
| #define FRAME_WIDTH 14 /* 16K */ |
| #define FRAME_SIZE (1 << FRAME_WIDTH) |
| #ifdef KERNEL |
| /trunk/kernel/arch/sparc64/include/mm/page.h |
|---|
| 37,11 → 37,27 |
| #include <arch/mm/frame.h> |
| /* |
| * On the TLB and TSB level, we still use 8K pages, which are supported by the |
| * MMU. |
| */ |
| #define MMU_PAGE_WIDTH MMU_FRAME_WIDTH |
| #define MMU_PAGE_SIZE MMU_FRAME_SIZE |
| /* |
| * On the page table level, we use 16K pages. 16K pages are not supported by |
| * the MMU but we emulate them with pairs of 8K pages. |
| */ |
| #define PAGE_WIDTH FRAME_WIDTH |
| #define PAGE_SIZE FRAME_SIZE |
| #define PAGE_COLOR_BITS 1 /**< 14 - 13; 2^14 == 16K == alias boundary. */ |
| #define MMU_PAGES_PER_PAGE (1 << (PAGE_WIDTH - MMU_PAGE_WIDTH)) |
| /* |
| * With 16K pages, there is only one page color. |
| */ |
| #define PAGE_COLOR_BITS 0 /**< 14 - 14; 2^14 == 16K == alias boundary. */ |
| #ifdef KERNEL |
| #ifndef __ASM__ |
| /trunk/kernel/arch/sparc64/include/mm/as.h |
|---|
| 81,10 → 81,11 |
| #include <genarch/mm/as_ht.h> |
| #ifdef CONFIG_TSB |
| # include <arch/mm/tsb.h> |
| # define as_invalidate_translation_cache(as, page, cnt) tsb_invalidate(as, page, cnt) |
| #include <arch/mm/tsb.h> |
| #define as_invalidate_translation_cache(as, page, cnt) \ |
| tsb_invalidate((as), (page), (cnt)) |
| #else |
| # define as_invalidate_translation_cache(as, page, cnt) |
| #define as_invalidate_translation_cache(as, page, cnt) |
| #endif |
| extern void as_arch_init(void); |
| /trunk/kernel/arch/sparc64/include/mm/cache.h |
|---|
| 43,44 → 43,10 |
| #define dcache_flush_frame(p, f) \ |
| dcache_flush_tag(PAGE_COLOR((p)), ADDR2PFN((f))); |
| /** |
| * Enumerations to differentiate among different scopes of D-Cache |
| * invalidation. |
| */ |
| typedef enum { |
| DCACHE_INVL_INVALID, |
| DCACHE_INVL_ALL, |
| DCACHE_INVL_COLOR, |
| DCACHE_INVL_FRAME |
| } dcache_invalidate_type_t; |
| /** |
| * Number of messages that can be queued in the cpu_arch_t structure at a time. |
| */ |
| #define DCACHE_MSG_QUEUE_LEN 10 |
| /** D-cache shootdown message type. */ |
| typedef struct { |
| dcache_invalidate_type_t type; |
| int color; |
| uintptr_t frame; |
| } dcache_shootdown_msg_t; |
| extern void dcache_flush(void); |
| extern void dcache_flush_color(int c); |
| extern void dcache_flush_tag(int c, pfn_t tag); |
| #ifdef CONFIG_SMP |
| extern void dcache_shootdown_start(dcache_invalidate_type_t type, int color, |
| uintptr_t frame); |
| extern void dcache_shootdown_finalize(void); |
| extern void dcache_shootdown_ipi_recv(void); |
| #else |
| #define dcache_shootdown_start(t, c, f) |
| #define dcache_shootdown_finalize() |
| #define dcache_shootdown_ipi_recv() |
| #endif /* CONFIG_SMP */ |
| #endif |
| /** @} |
| /trunk/kernel/arch/sparc64/include/mm/tsb.h |
|---|
| 112,8 → 112,8 |
| struct pte; |
| extern void tsb_invalidate(struct as *as, uintptr_t page, count_t pages); |
| extern void itsb_pte_copy(struct pte *t); |
| extern void dtsb_pte_copy(struct pte *t, bool ro); |
| extern void itsb_pte_copy(struct pte *t, index_t index); |
| extern void dtsb_pte_copy(struct pte *t, index_t index, bool ro); |
| #endif /* !def __ASM__ */ |