| /trunk/kernel/arch/mips32/include/mm/tlb.h |
|---|
| 35,6 → 35,9 |
| #ifndef KERN_mips32_TLB_H_ |
| #define KERN_mips32_TLB_H_ |
| #include <arch/types.h> |
| #include <typedefs.h> |
| #include <arch/mm/asid.h> |
| #include <arch/exception.h> |
| #ifdef TLBCNT |
| 46,7 → 49,7 |
| #define TLB_WIRED 1 |
| #define TLB_KSTACK_WIRED_INDEX 0 |
| #define TLB_PAGE_MASK_16K (0x3<<13) |
| #define TLB_PAGE_MASK_16K (0x3 << 13) |
| #define PAGE_UNCACHED 2 |
| #define PAGE_CACHEABLE_EXC_WRITE 5 |
| 159,6 → 162,8 |
| extern void tlb_invalid(istate_t *istate); |
| extern void tlb_refill(istate_t *istate); |
| extern void tlb_modified(istate_t *istate); |
| extern void tlb_prepare_entry_lo(entry_lo_t *lo, bool g, bool v, bool d, bool cacheable, uintptr_t pfn); |
| extern void tlb_prepare_entry_hi(entry_hi_t *hi, asid_t asid, uintptr_t addr); |
| #endif |
| /trunk/kernel/arch/mips32/include/mm/as.h |
|---|
| 38,7 → 38,7 |
| #define KERNEL_ADDRESS_SPACE_SHADOWED_ARCH 0 |
| #define KERNEL_ADDRESS_SPACE_START_ARCH (unsigned long) 0x80000000 |
| #define KERNEL_ADDRESS_SPACE_END_ARCH (unsigned long) 0xffffffff |
| #define KERNEL_ADDRESS_SPACE_END_ARCH (unsigned long) 0x9fffffff |
| #define USER_ADDRESS_SPACE_START_ARCH (unsigned long) 0x00000000 |
| #define USER_ADDRESS_SPACE_END_ARCH (unsigned long) 0x7fffffff |
| /trunk/kernel/arch/mips32/include/drivers/arc.h |
|---|
| File deleted |
| /trunk/kernel/arch/mips32/include/drivers/serial.h |
|---|
| 37,6 → 37,8 |
| #include <console/chardev.h> |
| #define SERIAL_ADDRESS 0xB8000000 |
| #define SERIAL_MAX 4 |
| #define SERIAL_COM1 0x3f8 |
| #define SERIAL_COM1_IRQ 4 |
| 43,16 → 45,19 |
| #define SERIAL_COM2 0x2f8 |
| #define SERIAL_COM2_IRQ 3 |
| #define P_WRITEB(where,what) (*((volatile char *) (0xB8000000+where))=what) |
| #define P_READB(where) (*((volatile char *)(0xB8000000+where))) |
| #define P_WRITEB(where, what) (*((volatile char *) (SERIAL_ADDRESS + where)) = what) |
| #define P_READB(where) (*((volatile char *) (SERIAL_ADDRESS + where))) |
| #define SERIAL_READ(x) P_READB(x) |
| #define SERIAL_WRITE(x,c) P_WRITEB(x,c) |
| #define SERIAL_READ(x) P_READB(x) |
| #define SERIAL_WRITE(x, c) P_WRITEB(x, c) |
| /* Interrupt enable register */ |
| #define SERIAL_READ_IER(x) (P_READB((x) + 1)) |
| #define SERIAL_WRITE_IER(x,c) (P_WRITEB((x)+1,c)) |
| #define SERIAL_WRITE_IER(x,c) (P_WRITEB((x) + 1, c)) |
| /* Interrupt identification register */ |
| #define SERIAL_READ_IIR(x) (P_READB((x) + 2)) |
| /* Line status register */ |
| #define SERIAL_READ_LSR(x) (P_READB((x) + 5)) |
| #define TRANSMIT_EMPTY_BIT 5 |
| /trunk/kernel/arch/mips32/include/drivers/msim.h |
|---|
| 35,6 → 35,11 |
| #ifndef KERN_mips32_MSIM_H_ |
| #define KERN_mips32_MSIM_H_ |
| /** Address of devices. */ |
| #define MSIM_VIDEORAM 0xB0000000 |
| #define MSIM_KBD_ADDRESS 0xB0000000 |
| #define MSIM_KBD_IRQ 2 |
| #include <console/chardev.h> |
| void msim_console(devno_t devno); |