| /trunk/kernel/arch/mips32/include/context_offset.h |
|---|
| 114,10 → 114,10 |
| sw $s8,OFFSET_S8(\ctx) |
| sw $gp,OFFSET_GP(\ctx) |
| #ifndef KERNEL |
| #ifndef KERNEL |
| sw $k1,OFFSET_TLS(\ctx) |
| # ifdef CONFIG_MIPS_FPU |
| #ifdef CONFIG_FPU |
| mfc1 $t0,$20 |
| sw $t0, OFFSET_F20(\ctx) |
| 150,7 → 150,7 |
| mfc1 $t0,$30 |
| sw $t0, OFFSET_F30(\ctx) |
| # endif /* CONFIG_MIPS_FPU */ |
| #endif /* CONFIG_FPU */ |
| #endif /* KERNEL */ |
| sw $ra,OFFSET_PC(\ctx) |
| 172,7 → 172,7 |
| #ifndef KERNEL |
| lw $k1,OFFSET_TLS(\ctx) |
| # ifdef CONFIG_MIPS_FPU |
| #ifdef CONFIG_FPU |
| lw $t0, OFFSET_F20(\ctx) |
| mtc1 $t0,$20 |
| 205,9 → 205,9 |
| lw $t0, OFFSET_F30(\ctx) |
| mtc1 $t0,$30 |
| # endif /* CONFIG_MIPS_FPU */ |
| #endif /* CONFIG_FPU */ |
| #endif /* KERNEL */ |
| lw $ra,OFFSET_PC(\ctx) |
| lw $sp,OFFSET_SP(\ctx) |
| .endm |
| /trunk/kernel/arch/mips32/include/asm.h |
|---|
| 70,6 → 70,17 |
| extern void interrupts_restore(ipl_t ipl); |
| extern ipl_t interrupts_read(void); |
| /** No I/O port address space on MIPS. */ |
| static inline void outb(ioport_t port, uint8_t v) |
| { |
| } |
| /** No I/O port address space on MIPS. */ |
| static inline uint8_t inb(ioport_t port) |
| { |
| return 0; |
| } |
| #endif |
| /** @} |
| /trunk/kernel/arch/mips32/src/fpu_context.c |
|---|
| 40,7 → 40,7 |
| void fpu_disable(void) |
| { |
| #ifdef ARCH_HAS_FPU |
| #ifdef CONFIG_FPU |
| cp0_status_write(cp0_status_read() & ~cp0_status_fpu_bit); |
| #endif |
| } |
| 47,7 → 47,7 |
| void fpu_enable(void) |
| { |
| #ifdef ARCH_HAS_FPU |
| #ifdef CONFIG_FPU |
| cp0_status_write(cp0_status_read() | cp0_status_fpu_bit); |
| #endif |
| } |
| /trunk/kernel/arch/mips32/src/asm.S |
|---|
| 159,7 → 159,7 |
| .global fpu_context_save |
| fpu_context_save: |
| #ifdef ARCH_HAS_FPU |
| #ifdef CONFIG_FPU |
| fpu_gp_save 0,$a0 |
| fpu_gp_save 1,$a0 |
| fpu_gp_save 2,$a0 |
| 230,7 → 230,7 |
| .global fpu_context_restore |
| fpu_context_restore: |
| #ifdef ARCH_HAS_FPU |
| #ifdef CONFIG_FPU |
| fpu_gp_restore 0,$a0 |
| fpu_gp_restore 1,$a0 |
| fpu_gp_restore 2,$a0 |
| /trunk/kernel/arch/mips32/src/mips32.c |
|---|
| 111,12 → 111,12 |
| */ |
| cp0_status_write(cp0_status_read() & |
| ~(cp0_status_bev_bootstrap_bit | cp0_status_erl_error_bit)); |
| /* |
| * Mask all interrupts |
| /* |
| * Mask all interrupts |
| */ |
| cp0_mask_all_int(); |
| debugger_init(); |
| } |
| 132,11 → 132,26 |
| .x = 640, |
| .y = 480, |
| .scan = 1920, |
| .visual = VISUAL_RGB_8_8_8, |
| .visual = VISUAL_BGR_8_8_8, |
| }; |
| fb_init(&gxemul_prop); |
| #endif |
| sysinfo_set_item_val("machine." STRING(MACHINE), NULL, 1); |
| #ifdef msim |
| sysinfo_set_item_val("machine.msim", NULL, 1); |
| #endif |
| #ifdef simics |
| sysinfo_set_item_val("machine.simics", NULL, 1); |
| #endif |
| #ifdef bgxemul |
| sysinfo_set_item_val("machine.bgxemul", NULL, 1); |
| #endif |
| #ifdef lgxemul |
| sysinfo_set_item_val("machine.lgxemul", NULL, 1); |
| #endif |
| } |
| void arch_post_cpu_init(void) |
| 161,8 → 176,7 |
| (uintptr_t) kernel_uarg->uspace_uarg, |
| (uintptr_t) kernel_uarg->uspace_entry); |
| while (1) |
| ; |
| while (1); |
| } |
| /** Perform mips32 specific tasks needed before the new task is run. */ |
| 195,9 → 209,22 |
| { |
| ___halt(); |
| while (1) |
| ; |
| while (1); |
| } |
| /** Construct function pointer |
| * |
| * @param fptr function pointer structure |
| * @param addr function address |
| * @param caller calling function address |
| * |
| * @return address of the function pointer |
| * |
| */ |
| void *arch_construct_function(fncptr_t *fptr, void *addr, void *caller) |
| { |
| return addr; |
| } |
| /** @} |
| */ |
| /trunk/kernel/arch/mips32/src/mm/frame.c |
|---|
| 75,7 → 75,7 |
| */ |
| static bool frame_available(pfn_t frame) |
| { |
| #if MACHINE == msim |
| #ifdef msim |
| /* MSIM device (dprinter) */ |
| if (frame == (KA2PA(MSIM_VIDEORAM) >> ZERO_PAGE_WIDTH)) |
| return false; |
| 85,13 → 85,13 |
| return false; |
| #endif |
| #if MACHINE == simics |
| #ifdef simics |
| /* Simics device (serial line) */ |
| if (frame == (KA2PA(SERIAL_ADDRESS) >> ZERO_PAGE_WIDTH)) |
| return false; |
| #endif |
| #if (MACHINE == lgxemul) || (MACHINE == bgxemul) |
| #if defined(lgxemul) || defined(bgxemul) |
| /* gxemul devices */ |
| if (overlaps(frame << ZERO_PAGE_WIDTH, ZERO_PAGE_SIZE, |
| 0x10000000, MB2SIZE(256))) |
| 218,7 → 218,7 |
| ZERO_PAGE_VALUE = 0xdeadbeef; |
| if (ZERO_PAGE_VALUE != 0xdeadbeef) |
| avail = false; |
| #if (MACHINE == lgxemul) || (MACHINE == bgxemul) |
| #if defined(lgxemul) || defined(bgxemul) |
| else { |
| ZERO_PAGE_VALUE_KSEG1(frame) = 0xaabbccdd; |
| if (ZERO_PAGE_VALUE_KSEG1(frame) != 0xaabbccdd) |
| /trunk/kernel/arch/mips32/src/drivers/msim.c |
|---|
| 76,7 → 76,6 |
| cp0_mask_int(MSIM_KBD_IRQ); |
| } |
| #include <print.h> |
| /** Read character using polling, assume interrupts disabled */ |
| static char msim_do_read(chardev_t *dev) |
| { |