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Ignore whitespace Rev 2744 → Rev 2745

/trunk/kernel/arch/sparc64/src/smp/ipi.c
116,7 → 116,7
*/
void ipi_broadcast_arch(int ipi)
{
int i;
unsigned int i;
void (* func)(void);
/trunk/kernel/arch/sparc64/src/mm/tlb.c
490,7 → 490,7
*/
void tlb_invalidate_pages(asid_t asid, uintptr_t page, count_t cnt)
{
int i;
unsigned int i;
tlb_context_reg_t pc_save, ctx;
/* switch to nucleus because we are mapped by the primary context */
/trunk/kernel/arch/sparc64/src/mm/frame.c
48,7 → 48,7
*/
void frame_arch_init(void)
{
int i;
unsigned int i;
pfn_t confdata;
 
if (config.cpu_active == 1) {
/trunk/kernel/arch/sparc64/src/mm/page.c
66,7 → 66,7
} else {
 
#ifdef CONFIG_SMP
int i;
unsigned int i;
 
/*
* Copy locked DTLB entries from the BSP.
98,7 → 98,7
uintptr_t hw_map(uintptr_t physaddr, size_t size)
{
unsigned int order;
int i;
unsigned int i;
 
ASSERT(config.cpu_active == 1);
 
/trunk/kernel/arch/ia64/src/ia64.c
62,12 → 62,13
/* Setup usermode init tasks. */
 
//#ifdef I460GX
int i;
unsigned int i;
init.cnt = bootinfo->taskmap.count;
for(i=0;i<init.cnt;i++)
{
init.tasks[i].addr = ((unsigned long)bootinfo->taskmap.tasks[i].addr)|VRN_MASK;
init.tasks[i].size = bootinfo->taskmap.tasks[i].size;
for (i = 0; i < init.cnt; i++) {
init.tasks[i].addr = ((unsigned long) bootinfo->taskmap.tasks[i].addr) | VRN_MASK;
init.tasks[i].size = bootinfo->taskmap.tasks[i].size;
}
/*
#else
/trunk/kernel/arch/ia64/src/mm/tlb.c
59,7 → 59,7
uintptr_t adr;
uint32_t count1, count2, stride1, stride2;
int i, j;
unsigned int i, j;
adr = PAL_PTCE_INFO_BASE();
count1 = PAL_PTCE_INFO_COUNT1();
69,8 → 69,8
ipl = interrupts_disable();
 
for(i = 0; i < count1; i++) {
for(j = 0; j < count2; j++) {
for (i = 0; i < count1; i++) {
for (j = 0; j < count2; j++) {
asm volatile (
"ptc.e %0 ;;"
:
/trunk/kernel/arch/arm32/src/arm32.c
55,7 → 55,7
/** Performs arm32 specific initialization before main_bsp() is called. */
void arch_pre_main(void)
{
int i;
unsigned int i;
 
init.cnt = bootinfo.cnt;
 
/trunk/kernel/arch/arm32/src/debug/print.c
56,10 → 56,10
*/
static int debug_write(const char *str, size_t count, void *unused)
{
int i;
for (i = 0; i < count; ++i) {
unsigned int i;
for (i = 0; i < count; ++i)
putc(str[i]);
}
return i;
}
 
/trunk/kernel/arch/arm32/src/cpu/cpu.c
56,7 → 56,7
};
 
/** Length of the #imp_data array */
static int imp_data_length = sizeof(imp_data) / sizeof(char *);
static unsigned int imp_data_length = sizeof(imp_data) / sizeof(char *);
 
/** Architecture names */
static char *arch_data[] = {
71,7 → 71,7
};
 
/** Length of the #arch_data array */
static int arch_data_length = sizeof(arch_data) / sizeof(char *);
static unsigned int arch_data_length = sizeof(arch_data) / sizeof(char *);
 
 
/** Retrieves processor identification from CP15 register 0.
/trunk/kernel/arch/ia32xen/src/smp/mps.c
77,11 → 77,11
struct __io_intr_entry *io_intr_entries = NULL;
struct __l_intr_entry *l_intr_entries = NULL;
 
int processor_entry_cnt = 0;
int bus_entry_cnt = 0;
int io_apic_entry_cnt = 0;
int io_intr_entry_cnt = 0;
int l_intr_entry_cnt = 0;
unsigned int processor_entry_cnt = 0;
unsigned int bus_entry_cnt = 0;
unsigned int io_apic_entry_cnt = 0;
unsigned int io_intr_entry_cnt = 0;
unsigned int l_intr_entry_cnt = 0;
 
waitq_t ap_completion_wq;
 
417,7 → 417,7
 
int mps_irq_to_pin(unsigned int irq)
{
int i;
unsigned int i;
for (i = 0; i < io_intr_entry_cnt; i++) {
if (io_intr_entries[i].src_bus_irq == irq && io_intr_entries[i].intr_type == 0)
/trunk/kernel/arch/ia32xen/src/smp/smp.c
98,7 → 98,7
*/
void kmp(void *arg)
{
int i;
unsigned int i;
ASSERT(ops != NULL);
 
/trunk/kernel/arch/ia32xen/src/mm/tlb.c
65,7 → 65,7
*/
void tlb_invalidate_pages(asid_t asid, uintptr_t page, count_t cnt)
{
int i;
unsigned int i;
 
for (i = 0; i < cnt; i++)
invlpg(page + i * PAGE_SIZE);
/trunk/kernel/arch/amd64/src/mm/page.c
82,7 → 82,7
void page_arch_init(void)
{
uintptr_t cur;
int i;
unsigned int i;
int identity_flags = PAGE_CACHEABLE | PAGE_EXEC | PAGE_GLOBAL | PAGE_WRITE;
 
if (config.cpu_active == 1) {
/trunk/kernel/arch/mips32/src/cpu/cpu.c
104,22 → 104,20
void cpu_print_report(cpu_t *m)
{
struct data_t *data;
int i;
unsigned int i;
 
if (m->arch.imp_num & 0x80) {
/* Count records */
for (i=0;imp_data80[i].vendor;i++)
;
for (i = 0; imp_data80[i].vendor; i++);
if ((m->arch.imp_num & 0x7f) >= i) {
printf("imp=%d\n",m->arch.imp_num);
printf("imp=%d\n", m->arch.imp_num);
return;
}
data = &imp_data80[m->arch.imp_num & 0x7f];
} else {
for (i=0;imp_data[i].vendor;i++)
;
for (i = 0; imp_data[i].vendor; i++);
if (m->arch.imp_num >= i) {
printf("imp=%d\n",m->arch.imp_num);
printf("imp=%d\n", m->arch.imp_num);
return;
}
data = &imp_data[m->arch.imp_num];
127,7 → 125,7
 
printf("cpu%d: %s %s (rev=%d.%d, imp=%d)\n",
m->id, data->vendor, data->model, m->arch.rev_num >> 4,
m->arch.rev_num & 0xf, m->arch.imp_num);
m->arch.rev_num & 0xf, m->arch.imp_num);
}
 
/** @}
/trunk/kernel/arch/mips32/src/debugger.c
208,7 → 208,7
bpinfo_t *cur;
ipl_t ipl;
 
if (argv->intval < 0 || argv->intval > BKPOINTS_MAX) {
if (argv->intval > BKPOINTS_MAX) {
printf("Invalid breakpoint number.\n");
return 0;
}
/trunk/kernel/arch/mips32/src/mm/tlb.c
572,7 → 572,7
*/
void tlb_invalidate_pages(asid_t asid, uintptr_t page, count_t cnt)
{
int i;
unsigned int i;
ipl_t ipl;
entry_lo_t lo0, lo1;
entry_hi_t hi, hi_save;
583,7 → 583,7
hi_save.value = cp0_entry_hi_read();
ipl = interrupts_disable();
 
for (i = 0; i < cnt+1; i+=2) {
for (i = 0; i < cnt + 1; i += 2) {
hi.value = 0;
prepare_entry_hi(&hi, asid, page + i * PAGE_SIZE);
cp0_entry_hi_write(hi.value);
/trunk/kernel/arch/mips32/src/drivers/arc.c
118,7 → 118,7
static void arc_print_confdata(arc_component *c)
{
cm_resource_list *configdata;
int i;
unsigned int i;
 
if (!c->configdatasize)
return; /* No configuration data */
161,7 → 161,7
/** Print information about component */
static void arc_print_component(arc_component *c)
{
int i;
unsigned int i;
 
printf("%s: ",ctypes[c->type]);
for (i = 0; i < c->identifier_len; i++)