WebSVN – HelenOS – Path Comparison – / – /tags/0.2.0.2 Rev 1966 and /tags/0.2.0.2/ Rev 1968

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/tags/0.2.0.2/kernel/trunk/arch/amd64/include/smp
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/tags/0.2.0.2/kernel/trunk/arch/amd64/include/boot/memmap.h
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/tags/0.2.0.2/kernel/trunk/arch/amd64/include/mm/memory_init.h
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/tags/0.2.0.2/kernel/trunk/arch/amd64/include/mm/asid.h
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/tags/0.2.0.2/kernel/trunk/arch/amd64/include/barrier.h
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/tags/0.2.0.2/kernel/trunk/arch/amd64/include/debug.h
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/tags/0.2.0.2/kernel/trunk/arch/amd64/include/drivers/i8042.h
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/tags/0.2.0.2/kernel/trunk/arch/amd64/include/drivers/i8254.h
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/tags/0.2.0.2/kernel/trunk/arch/amd64/include/drivers/ega.h
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/tags/0.2.0.2/kernel/trunk/arch/amd64/include/drivers/i8259.h
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/tags/0.2.0.2/kernel/trunk/arch/amd64/include/fpu_context.h
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/tags/0.2.0.2/kernel/trunk/arch/amd64/src/smp/apic.c
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/tags/0.2.0.2/kernel/trunk/arch/amd64/src/smp/mps.c
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/tags/0.2.0.2/kernel/trunk/arch/amd64/src/smp/smp.c
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/tags/0.2.0.2/kernel/trunk/arch/amd64/src/smp/ipi.c
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/tags/0.2.0.2/kernel/trunk/arch/amd64/src/mm/tlb.c
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/tags/0.2.0.2/kernel/trunk/arch/amd64/src/mm/as.c
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/tags/0.2.0.2/kernel/trunk/arch/amd64/src/mm/frame.c
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/tags/0.2.0.2/kernel/trunk/arch/amd64/src/drivers
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/tags/0.2.0.2/kernel/trunk/arch/ia32/include/debugger.h
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/tags/0.2.0.2/kernel/trunk/arch/ia32/src/debugger.c
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/tags/0.2.0.2/kernel/trunk/contrib/conf/gxemul.sh
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/tags/0.2.0.2/kernel/trunk/contrib/toolchain/toolchain.ia32.sh
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/tags/0.2.0.2/kernel/trunk/contrib/toolchain/toolchain.mipsel32.sh
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/tags/0.2.0.2/kernel/trunk/contrib/toolchain/toolchain.amd64.sh
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/tags/0.2.0.2/kernel/trunk/tools/ia32/decpt.py
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 /tags/0.2.0.2/kernel/test/print/print1/test.c
 ,0 → 1,71
+/*
+ * Copyright (C) 2005 Josef Cejka
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#include <print.h>
+#include <test.h>
+#define BUFFER_SIZE 32
+void test(void)
+{
+    int retval;
+    __native nat = 0x12345678u;
+    char buffer[BUFFER_SIZE];
+    printf(" Printf test \n");
+    printf(" text 10.8s %*.*s \n", 5, 3, "text");
+    printf(" very long text 10.8s %10.8s \n", "very long text");
+    printf(" text 8.10s %8.10s \n", "text");
+    printf(" very long text 8.10s %8.10s \n", "very long text");
+    printf(" char: c '%c', 3.2c '%3.2c', -3.2c '%-3.2c', 2.3c '%2.3c', -2.3c '%-2.3c' \n",'a', 'b', 'c', 'd', 'e' );
+    printf(" int: d '%d', 3.2d '%3.2d', -3.2d '%-3.2d', 2.3d '%2.3d', -2.3d '%-2.3d' \n",1, 1, 1, 1, 1 );
+    printf(" -int: d '%d', 3.2d '%3.2d', -3.2d '%-3.2d', 2.3d '%2.3d', -2.3d '%-2.3d' \n",-1, -1, -1, -1, -1 );
+    printf(" 0xint: x '%#x', 5.3x '%#5.3x', -5.3x '%#-5.3x', 3.5x '%#3.5x', -3.5x '%#-3.5x' \n",17, 17, 17, 17, 17 );
+    printf("'%#llx' 64bit, '%#x' 32bit, '%#hhx' 8bit, '%#hx' 16bit, __native '%#zx'. '%#llx' 64bit and '%s' string.\n", 0x1234567887654321ll, 0x12345678, 0x12, 0x1234, nat, 0x1234567887654321ull, "Lovely string" );
+    printf(" Print to NULL '%s'\n",NULL);
+    retval = snprintf(buffer, BUFFER_SIZE, "Short text without parameters.");
+    printf("Result is: '%s', retval = %d\n", buffer, retval);
+    retval = snprintf(buffer, BUFFER_SIZE, "Very very very long text without parameters.");
+    printf("Result is: '%s', retval = %d\n", buffer, retval);
+    printf("Print short text to %d char long buffer via snprintf.\n", BUFFER_SIZE);
+    retval = snprintf(buffer, BUFFER_SIZE, "Short %s", "text");
+    printf("Result is: '%s', retval = %d\n", buffer, retval);
+    printf("Print long text to %d char long buffer via snprintf.\n", BUFFER_SIZE);
+    retval = snprintf(buffer, BUFFER_SIZE, "Very long %s. This text`s length is more than %d. We are interested in the result.", "text" , BUFFER_SIZE);
+    printf("Result is: '%s', retval = %d\n", buffer, retval);
+    return;
+}

 /tags/0.2.0.2/kernel/test/mm/slab2/test.c
 ,0 → 1,221
+/*
+ * Copyright (C) 2006 Ondrej Palkovsky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#include <test.h>
+#include <mm/slab.h>
+#include <print.h>
+#include <proc/thread.h>
+#include <arch.h>
+#include <panic.h>
+#include <mm/frame.h>
+#include <memstr.h>
+#include <synch/condvar.h>
+#include <synch/mutex.h>
+#define ITEM_SIZE 256
+/** Fill memory with 2 caches, when allocation fails,
+ *  free one of the caches. We should have everything in magazines,
+ *  now allocation should clean magazines and allow for full allocation.
+ */
+static void totalmemtest(void)
+{
+    slab_cache_t *cache1;
+    slab_cache_t *cache2;
+    int i;
+    void *data1, *data2;
+    void *olddata1=NULL, *olddata2=NULL;
+    cache1 = slab_cache_create("cache1_tst", ITEM_SIZE, 0, NULL, NULL, 0);
+    cache2 = slab_cache_create("cache2_tst", ITEM_SIZE, 0, NULL, NULL, 0);
+    printf("Allocating...");
+    /* Use atomic alloc, so that we find end of memory */
+    do {
+        data1 = slab_alloc(cache1, FRAME_ATOMIC);
+        data2 = slab_alloc(cache2, FRAME_ATOMIC);
+        if (!data1 || !data2) {
+            if (data1)
+                slab_free(cache1,data1);
+            if (data2)
+                slab_free(cache2,data2);
+            break;
+        }
+        memsetb((__address)data1, ITEM_SIZE, 0);
+        memsetb((__address)data2, ITEM_SIZE, 0);
+        *((void **)data1) = olddata1;
+        *((void **)data2) = olddata2;
+        olddata1 = data1;
+        olddata2 = data2;
+    }while(1);
+    printf("done.\n");
+    /* We do not have memory - now deallocate cache2 */
+    printf("Deallocating cache2...");
+    while (olddata2) {
+        data2 = *((void **)olddata2);
+        slab_free(cache2, olddata2);
+        olddata2 = data2;
+    }
+    printf("done.\n");
+    printf("Allocating to cache1...\n");
+    for (i=0; i<30; i++) {
+        data1 = slab_alloc(cache1, FRAME_ATOMIC);
+        if (!data1) {
+            panic("Incorrect memory size - use another test.");
+        }
+        memsetb((__address)data1, ITEM_SIZE, 0);
+        *((void **)data1) = olddata1;
+        olddata1 = data1;
+    }
+    while (1) {
+        data1 = slab_alloc(cache1, FRAME_ATOMIC);
+        if (!data1) {
+            break;
+        }
+        memsetb((__address)data1, ITEM_SIZE, 0);
+        *((void **)data1) = olddata1;
+        olddata1 = data1;
+    }
+    printf("Deallocating cache1...");
+    while (olddata1) {
+        data1 = *((void **)olddata1);
+        slab_free(cache1, olddata1);
+        olddata1 = data1;
+    }
+    printf("done.\n");
+    slab_print_list();
+    slab_cache_destroy(cache1);
+    slab_cache_destroy(cache2);
+}
+slab_cache_t *thr_cache;
+semaphore_t thr_sem;
+condvar_t thread_starter;
+mutex_t starter_mutex;
+#define THREADS 8
+static void slabtest(void *priv)
+{
+    void *data=NULL, *new;
+    thread_detach(THREAD);
+    mutex_lock(&starter_mutex);
+    condvar_wait(&thread_starter,&starter_mutex);
+    mutex_unlock(&starter_mutex);
+    printf("Starting thread #%d...\n",THREAD->tid);
+    /* Alloc all */
+    printf("Thread #%d allocating...\n", THREAD->tid);
+    while (1) {
+        /* Call with atomic to detect end of memory */
+        new = slab_alloc(thr_cache, FRAME_ATOMIC);
+        if (!new)
+            break;
+        *((void **)new) = data;
+        data = new;
+    }
+    printf("Thread #%d releasing...\n", THREAD->tid);
+    while (data) {
+        new = *((void **)data);
+        *((void **)data) = NULL;
+        slab_free(thr_cache, data);
+        data = new;
+    }
+    printf("Thread #%d allocating...\n", THREAD->tid);
+    while (1) {
+        /* Call with atomic to detect end of memory */
+        new = slab_alloc(thr_cache, FRAME_ATOMIC);
+        if (!new)
+            break;
+        *((void **)new) = data;
+        data = new;
+    }
+    printf("Thread #%d releasing...\n", THREAD->tid);
+    while (data) {
+        new = *((void **)data);
+        *((void **)data) = NULL;
+        slab_free(thr_cache, data);
+        data = new;
+    }
+    printf("Thread #%d finished\n", THREAD->tid);
+    slab_print_list();
+    semaphore_up(&thr_sem);
+}
+static void multitest(int size)
+{
+    /* Start 8 threads that just allocate as much as possible,
+     * then release everything, then again allocate, then release
+     */
+    thread_t *t;
+    int i;
+    printf("Running stress test with size %d\n", size);
+    condvar_initialize(&thread_starter);
+    mutex_initialize(&starter_mutex);
+    thr_cache = slab_cache_create("thread_cache", size, 0,
+                      NULL, NULL,
+);
+    semaphore_initialize(&thr_sem,0);
+    for (i=0; i<THREADS; i++) {
+        if (!(t = thread_create(slabtest, NULL, TASK, 0, "slabtest")))
+            panic("could not create thread\n");
+        thread_ready(t);
+    }
+    thread_sleep(1);
+    condvar_broadcast(&thread_starter);
+    for (i=0; i<THREADS; i++)
+        semaphore_down(&thr_sem);
+    slab_cache_destroy(thr_cache);
+    printf("Stress test complete.\n");
+}
+void test(void)
+{
+    printf("Running reclaim single-thread test .. pass1\n");
+    totalmemtest();
+    printf("Running reclaim single-thread test .. pass2\n");
+    totalmemtest();
+    printf("Reclaim test OK.\n");
+    multitest(128);
+    multitest(2048);
+    multitest(8192);
+    printf("All done.\n");
+}

 /tags/0.2.0.2/kernel/test/mm/falloc2/test.c
 ,0 → 1,123
+/*
+ * Copyright (C) 2006 Sergey Bondari
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#include <print.h>
+#include <test.h>
+#include <mm/page.h>
+#include <mm/frame.h>
+#include <mm/slab.h>
+#include <arch/mm/page.h>
+#include <arch/types.h>
+#include <atomic.h>
+#include <debug.h>
+#include <proc/thread.h>
+#include <memstr.h>
+#include <arch.h>
+#define MAX_FRAMES 256
+#define MAX_ORDER 8
+#define THREAD_RUNS 1
+#define THREADS 8
+static void falloc(void * arg);
+static void failed(void);
+static atomic_t thread_count;
+void falloc(void * arg)
+{
+    int status, order, run, allocated, i;
+    __u8 val = THREAD->tid % THREADS;
+    index_t k;
+    __address * frames =  (__address *) malloc(MAX_FRAMES * sizeof(__address), FRAME_ATOMIC);
+    ASSERT(frames != NULL);
+    thread_detach(THREAD);
+    for (run = 0; run < THREAD_RUNS; run++) {
+        for (order = 0; order <= MAX_ORDER; order++) {
+            printf("Thread #%d (cpu%d): Allocating %d frames blocks ... \n", THREAD->tid, CPU->id, 1 << order);
+            allocated = 0;
+            for (i = 0; i < (MAX_FRAMES >> order); i++) {
+                frames[allocated] = PA2KA(PFN2ADDR(frame_alloc_rc(order, FRAME_ATOMIC | FRAME_KA, &status)));
+                if (status == 0) {
+                    memsetb(frames[allocated], FRAME_SIZE << order, val);
+                    allocated++;
+                } else {
+                    break;
+                }
+            }
+            printf("Thread #%d (cpu%d): %d blocks allocated.\n", THREAD->tid, CPU->id, allocated);
+            printf("Thread #%d (cpu%d): Deallocating ... \n", THREAD->tid, CPU->id);
+            for (i = 0; i < allocated; i++) {
+                for (k = 0; k <= ((FRAME_SIZE << order) - 1); k++) {
+                    if (((__u8 *) frames[i])[k] != val) {
+                        printf("Thread #%d (cpu%d): Unexpected data (%d) in block %p offset %#zx\n", THREAD->tid, CPU->id, ((char *) frames[i])[k], frames[i], k);
+                        failed();
+                    }
+                }
+                frame_free(ADDR2PFN(KA2PA(frames[i])));
+            }
+            printf("Thread #%d (cpu%d): Finished run.\n", THREAD->tid, CPU->id);
+        }
+    }
+    free(frames);
+    printf("Thread #%d (cpu%d): Exiting\n", THREAD->tid, CPU->id);
+    atomic_dec(&thread_count);
+}
+void failed(void)
+{
+    panic("Test failed.\n");
+}
+void test(void)
+{
+    int i;
+    atomic_set(&thread_count, THREADS);
+    for (i = 0; i < THREADS; i++) {
+        thread_t * thrd;
+        thrd = thread_create(falloc, NULL, TASK, 0, "falloc");
+        if (thrd)
+            thread_ready(thrd);
+        else
+            failed();
+    }
+    while (thread_count.count)
+        ;
+    printf("Test passed.\n");
+}

 /tags/0.2.0.2/kernel/test/mm/slab1/test.c
 ,0 → 1,160
+/*
+ * Copyright (C) 2006 Ondrej Palkovsky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#include <test.h>
+#include <mm/slab.h>
+#include <print.h>
+#include <proc/thread.h>
+#include <arch.h>
+#include <panic.h>
+#include <memstr.h>
+#define VAL_COUNT   1024
+void * data[VAL_COUNT];
+static void testit(int size, int count)
+{
+    slab_cache_t *cache;
+    int i;
+    printf("Creating cache, object size: %d.\n", size);
+    cache = slab_cache_create("test_cache", size, 0, NULL, NULL,
+                  SLAB_CACHE_NOMAGAZINE);
+    printf("Allocating %d items...", count);
+    for (i=0; i < count; i++) {
+        data[i] = slab_alloc(cache, 0);
+        memsetb((__address)data[i], size, 0);
+    }
+    printf("done.\n");
+    printf("Freeing %d items...", count);
+    for (i=0; i < count; i++) {
+        slab_free(cache, data[i]);
+    }
+    printf("done.\n");
+    printf("Allocating %d items...", count);
+    for (i=0; i < count; i++) {
+        data[i] = slab_alloc(cache, 0);
+        memsetb((__address)data[i], size, 0);
+    }
+    printf("done.\n");
+    printf("Freeing %d items...", count/2);
+    for (i=count-1; i >= count/2; i--) {
+        slab_free(cache, data[i]);
+    }
+    printf("done.\n");
+    printf("Allocating %d items...", count/2);
+    for (i=count/2; i < count; i++) {
+        data[i] = slab_alloc(cache, 0);
+        memsetb((__address)data[i], size, 0);
+    }
+    printf("done.\n");
+    printf("Freeing %d items...", count);
+    for (i=0; i < count; i++) {
+        slab_free(cache, data[i]);
+    }
+    printf("done.\n");
+    slab_cache_destroy(cache);
+    printf("Test complete.\n");
+}
+static void testsimple(void)
+{
+    testit(100, VAL_COUNT);
+    testit(200, VAL_COUNT);
+    testit(1024, VAL_COUNT);
+    testit(2048, 512);
+    testit(4000, 128);
+    testit(8192, 128);
+    testit(16384, 128);
+    testit(16385, 128);
+}
+#define THREADS     6
+#define THR_MEM_COUNT   1024
+#define THR_MEM_SIZE    128
+void * thr_data[THREADS][THR_MEM_COUNT];
+slab_cache_t *thr_cache;
+semaphore_t thr_sem;
+static void slabtest(void *data)
+{
+    int offs = (int)(__native) data;
+    int i,j;
+    thread_detach(THREAD);
+    printf("Starting thread #%d...\n",THREAD->tid);
+    for (j=0; j<10; j++) {
+        for (i=0; i<THR_MEM_COUNT; i++)
+            thr_data[offs][i] = slab_alloc(thr_cache,0);
+        for (i=0; i<THR_MEM_COUNT/2; i++)
+            slab_free(thr_cache, thr_data[offs][i]);
+        for (i=0; i< THR_MEM_COUNT/2; i++)
+            thr_data[offs][i] = slab_alloc(thr_cache, 0);
+        for (i=0; i<THR_MEM_COUNT;i++)
+            slab_free(thr_cache, thr_data[offs][i]);
+    }
+    printf("Thread #%d finished\n", THREAD->tid);
+    semaphore_up(&thr_sem);
+}
+static void testthreads(void)
+{
+    thread_t *t;
+    int i;
+    thr_cache = slab_cache_create("thread_cache", THR_MEM_SIZE, 0,
+                      NULL, NULL,
+                      SLAB_CACHE_NOMAGAZINE);
+    semaphore_initialize(&thr_sem,0);
+    for (i=0; i<THREADS; i++) {
+        if (!(t = thread_create(slabtest, (void *)(__native)i, TASK, 0, "slabtest")))
+            panic("could not create thread\n");
+        thread_ready(t);
+    }
+    for (i=0; i<THREADS; i++)
+        semaphore_down(&thr_sem);
+    slab_cache_destroy(thr_cache);
+    printf("Test complete.\n");
+}
+void test(void)
+{
+    testsimple();
+    testthreads();
+}

 /tags/0.2.0.2/kernel/test/mm/falloc1/test.c
 ,0 → 1,93
+/*
+ * Copyright (C) 2006 Sergey Bondari
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#include <print.h>
+#include <test.h>
+#include <mm/page.h>
+#include <mm/frame.h>
+#include <mm/slab.h>
+#include <arch/mm/page.h>
+#include <arch/types.h>
+#include <debug.h>
+#include <align.h>
+#define MAX_FRAMES 1024
+#define MAX_ORDER 8
+#define TEST_RUNS 2
+void test(void) {
+    __address * frames = (__address *) malloc(MAX_FRAMES*sizeof(__address), 0);
+    int results[MAX_ORDER+1];
+    int i, order, run;
+    int allocated;
+    int status;
+    ASSERT(TEST_RUNS > 1);
+    ASSERT(frames != NULL)
+    for (run = 0; run < TEST_RUNS; run++) {
+        for (order = 0; order <= MAX_ORDER; order++) {
+            printf("Allocating %d frames blocks ... ", 1 << order);
+            allocated = 0;
+            for (i = 0; i < MAX_FRAMES >> order; i++) {
+                frames[allocated] = PA2KA(PFN2ADDR(frame_alloc_rc(order, FRAME_ATOMIC | FRAME_KA, &status)));
+                if (ALIGN_UP(frames[allocated], FRAME_SIZE << order) != frames[allocated]) {
+                    panic("Test failed. Block at address %p (size %dK) is not aligned\n", frames[allocated], (FRAME_SIZE << order) >> 10);
+                }
+                if (status == 0) {
+                    allocated++;
+                } else {
+                    printf("done. ");
+                    break;
+                }
+            }
+            printf("%d blocks allocated.\n", allocated);
+            if (run) {
+                if (results[order] != allocated) {
+                    panic("Test failed. Frame leak possible.\n");
+                }
+            } else
+                results[order] = allocated;
+            printf("Deallocating ... ");
+            for (i = 0; i < allocated; i++) {
+                frame_free(ADDR2PFN(KA2PA(frames[i])));
+            }
+            printf("done.\n");
+        }
+    }
+    free(frames);
+    printf("Test passed.\n");
+}

 /tags/0.2.0.2/kernel/test/mm/mapping1/test.c
 ,0 → 1,85
+/*
+ * Copyright (C) 2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#include <print.h>
+#include <test.h>
+#include <mm/page.h>
+#include <mm/frame.h>
+#include <mm/as.h>
+#include <arch/mm/page.h>
+#include <arch/types.h>
+#include <debug.h>
+#define PAGE0   0x10000000
+#define PAGE1   (PAGE0+PAGE_SIZE)
+#define VALUE0  0x01234567
+#define VALUE1  0x89abcdef
+void test(void)
+{
+    __address frame0, frame1;
+    __u32 v0, v1;
+    printf("Memory management test mapping #1\n");
+    frame0 = PA2KA(PFN2ADDR(frame_alloc(ONE_FRAME, FRAME_KA)));
+    frame1 = PA2KA(PFN2ADDR(frame_alloc(ONE_FRAME, FRAME_KA)));
+    printf("Writing %#x to physical address %p.\n", VALUE0, KA2PA(frame0));
+    *((__u32 *) frame0) = VALUE0;
+    printf("Writing %#x to physical address %p.\n", VALUE1, KA2PA(frame1));
+    *((__u32 *) frame1) = VALUE1;
+    printf("Mapping virtual address %p to physical address %p.\n", PAGE0, KA2PA(frame0));
+    page_mapping_insert(AS_KERNEL, PAGE0, KA2PA(frame0), PAGE_PRESENT | PAGE_WRITE);
+    printf("Mapping virtual address %p to physical address %p.\n", PAGE1, KA2PA(frame1));
+    page_mapping_insert(AS_KERNEL, PAGE1, KA2PA(frame1), PAGE_PRESENT | PAGE_WRITE);
+    printf("Value at virtual address %p is %#x.\n", PAGE0, v0 = *((__u32 *) PAGE0));
+    printf("Value at virtual address %p is %#x.\n", PAGE1, v1 = *((__u32 *) PAGE1));
+    ASSERT(v0 == VALUE0);
+    ASSERT(v1 == VALUE1);
+    printf("Writing %#x to virtual address %p.\n", 0, PAGE0);
+    *((__u32 *) PAGE0) = 0;
+    printf("Writing %#x to virtual address %p.\n", 0, PAGE1);
+    *((__u32 *) PAGE1) = 0;
+    v0 = *((__u32 *) PAGE0);
+    v1 = *((__u32 *) PAGE1);
+    printf("Value at virtual address %p is %#x.\n", PAGE0, *((__u32 *) PAGE0));
+    printf("Value at virtual address %p is %#x.\n", PAGE1, *((__u32 *) PAGE1));
+    ASSERT(v0 == 0);
+    ASSERT(v1 == 0);
+    printf("Test passed.\n");
+}

 /tags/0.2.0.2/kernel/test/mm/purge1/test.c
 ,0 → 1,85
+/*
+ * Copyright (C) 2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#include <print.h>
+#include <test.h>
+#include <mm/page.h>
+#include <mm/frame.h>
+#include <mm/as.h>
+#include <arch/mm/page.h>
+#include <arch/mm/tlb.h>
+#include <arch/types.h>
+#include <debug.h>
+extern void tlb_invalidate_all(void);
+extern void tlb_invalidate_pages(asid_t asid, __address va, count_t cnt);
+void test(void)
+{
+    tlb_entry_t entryi;
+    tlb_entry_t entryd;
+    int i;
+  entryd.word[0] = 0;
+  entryd.word[1] = 0;
+  entryd.p = true;                 /* present */
+  entryd.ma = MA_WRITEBACK;
+  entryd.a = true;                 /* already accessed */
+  entryd.d = true;                 /* already dirty */
+  entryd.pl = PL_KERNEL;
+  entryd.ar = AR_READ | AR_WRITE;
+  entryd.ppn = 0;
+  entryd.ps = PAGE_WIDTH;
+  entryi.word[0] = 0;
+  entryi.word[1] = 0;
+  entryi.p = true;                 /* present */
+  entryi.ma = MA_WRITEBACK;
+  entryi.a = true;                 /* already accessed */
+  entryi.d = true;                 /* already dirty */
+  entryi.pl = PL_KERNEL;
+  entryi.ar = AR_READ | AR_EXECUTE;
+  entryi.ppn = 0;
+  entryi.ps = PAGE_WIDTH;
+    for(i=0;i<100;i++)
+    {
+        itc_mapping_insert(0+i*(1<<PAGE_WIDTH),8,entryi);
+        dtc_mapping_insert(0+i*(1<<PAGE_WIDTH),9,entryd);
+    }
+    tlb_invalidate_pages(8,0x0c000,14);
+    /*tlb_invalidate_all();*/
+}

 /tags/0.2.0.2/kernel/test/synch/rwlock2/test.c
 ,0 → 1,94
+/*
+ * Copyright (C) 2001-2004 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#include <test.h>
+#include <arch.h>
+#include <atomic.h>
+#include <print.h>
+#include <proc/thread.h>
+#include <synch/rwlock.h>
+#define READERS     50
+#define WRITERS     50
+static rwlock_t rwlock;
+static void writer(void *arg);
+static void failed(void);
+void writer(void *arg)
+{
+    thread_detach(THREAD);
+    printf("Trying to lock rwlock for writing....\n");
+    rwlock_write_lock(&rwlock);
+    rwlock_write_unlock(&rwlock);
+    printf("Trying to lock rwlock for reading....\n");
+    rwlock_read_lock(&rwlock);
+    rwlock_read_unlock(&rwlock);
+    printf("Test passed.\n");
+}
+void failed()
+{
+    printf("Test failed prematurely.\n");
+    thread_exit();
+}
+void test(void)
+{
+    thread_t *thrd;
+    printf("Read/write locks test #2\n");
+    rwlock_initialize(&rwlock);
+    rwlock_read_lock(&rwlock);
+    rwlock_read_lock(&rwlock);
+    rwlock_read_lock(&rwlock);
+    rwlock_read_lock(&rwlock);
+    thrd = thread_create(writer, NULL, TASK, 0, "writer");
+    if (thrd)
+        thread_ready(thrd);
+    else
+        failed();
+    thread_sleep(1);
+    rwlock_read_unlock(&rwlock);
+    rwlock_read_unlock(&rwlock);
+    rwlock_read_unlock(&rwlock);
+    rwlock_read_unlock(&rwlock);
+}

 /tags/0.2.0.2/kernel/test/synch/rwlock3/test.c
 ,0 → 1,93
+/*
+ * Copyright (C) 2001-2004 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#include <test.h>
+#include <arch.h>
+#include <atomic.h>
+#include <print.h>
+#include <proc/thread.h>
+#include <synch/rwlock.h>
+#define READERS     50
+#define WRITERS     50
+static rwlock_t rwlock;
+static void reader(void *arg);
+static void failed(void);
+void reader(void *arg)
+{
+    thread_detach(THREAD);
+    printf("cpu%d, tid %d: trying to lock rwlock for reading....\n", CPU->id, THREAD->tid);
+    rwlock_read_lock(&rwlock);
+    rwlock_read_unlock(&rwlock);
+    printf("cpu%d, tid %d: success\n", CPU->id, THREAD->tid);
+    printf("cpu%d, tid %d: trying to lock rwlock for writing....\n", CPU->id, THREAD->tid);
+    rwlock_write_lock(&rwlock);
+    rwlock_write_unlock(&rwlock);
+    printf("cpu%d, tid %d: success\n", CPU->id, THREAD->tid);
+    printf("Test passed.\n");
+}
+void failed(void)
+{
+    printf("Test failed prematurely.\n");
+    thread_exit();
+}
+void test(void)
+{
+    int i;
+    thread_t *thrd;
+    printf("Read/write locks test #3\n");
+    rwlock_initialize(&rwlock);
+    rwlock_write_lock(&rwlock);
+    for (i=0; i<4; i++) {
+        thrd = thread_create(reader, NULL, TASK, 0, "reader");
+        if (thrd)
+            thread_ready(thrd);
+        else
+            failed();
+    }
+    thread_sleep(1);
+    rwlock_write_unlock(&rwlock);
+}

 /tags/0.2.0.2/kernel/test/synch/semaphore1/test.c
 ,0 → 1,132
+/*
+ * Copyright (C) 2001-2004 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#include <test.h>
+#include <arch.h>
+#include <atomic.h>
+#include <print.h>
+#include <proc/thread.h>
+#include <synch/waitq.h>
+#include <synch/semaphore.h>
+#define AT_ONCE         3
+#define PRODUCERS       50
+#define CONSUMERS       50
+static semaphore_t sem;
+static waitq_t can_start;
+static atomic_t items_produced;
+static atomic_t items_consumed;
+static void consumer(void *arg);
+static void producer(void *arg);
+static void failed(void);
+void producer(void *arg)
+{
+    thread_detach(THREAD);
+    waitq_sleep(&can_start);
+    semaphore_down(&sem);
+    atomic_inc(&items_produced);
+    thread_usleep(250);
+    semaphore_up(&sem);
+}
+void consumer(void *arg)
+{
+    thread_detach(THREAD);
+    waitq_sleep(&can_start);
+    semaphore_down(&sem);
+    atomic_inc(&items_consumed);
+    thread_usleep(500);
+    semaphore_up(&sem);
+}
+void failed(void)
+{
+    printf("Test failed prematurely.\n");
+    thread_exit();
+}
+void test(void)
+{
+    int i, j, k;
+    int consumers, producers;
+    printf("Semaphore test #1\n");
+    waitq_initialize(&can_start);
+    semaphore_initialize(&sem, AT_ONCE);
+    for (i=1; i<=3; i++) {
+        thread_t *thrd;
+        atomic_set(&items_produced, 0);
+        atomic_set(&items_consumed, 0);
+        consumers = i * CONSUMERS;
+        producers = (4-i) * PRODUCERS;
+        printf("Creating %d consumers and %d producers...", consumers, producers);
+        for (j=0; j<(CONSUMERS+PRODUCERS)/2; j++) {
+            for (k=0; k<i; k++) {
+                thrd = thread_create(consumer, NULL, TASK, 0, "consumer");
+                if (thrd)
+                    thread_ready(thrd);
+                else
+                    failed();
+            }
+            for (k=0; k<(4-i); k++) {
+                thrd = thread_create(producer, NULL, TASK, 0, "producer");
+                if (thrd)
+                    thread_ready(thrd);
+                else
+                    failed();
+            }
+        }
+        printf("ok\n");
+        thread_sleep(1);
+        waitq_wakeup(&can_start, WAKEUP_ALL);
+        while (items_consumed.count != consumers || items_produced.count != producers) {
+            printf("%d consumers remaining, %d producers remaining\n", consumers - items_consumed.count, producers - items_produced.count);
+            thread_sleep(1);
+        }
+    }
+    printf("Test passed.\n");
+}

 /tags/0.2.0.2/kernel/test/synch/rwlock4/test.c
 ,0 → 1,163
+/*
+ * Copyright (C) 2001-2004 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#include <test.h>
+#include <arch.h>
+#include <atomic.h>
+#include <print.h>
+#include <proc/thread.h>
+#include <arch/types.h>
+#include <arch/context.h>
+#include <context.h>
+#include <panic.h>
+#include <synch/waitq.h>
+#include <synch/rwlock.h>
+#include <synch/synch.h>
+#include <synch/spinlock.h>
+#define READERS     50
+#define WRITERS     50
+static rwlock_t rwlock;
+SPINLOCK_INITIALIZE(lock);
+static waitq_t can_start;
+__u32 seed = 0xdeadbeef;
+static __u32 random(__u32 max);
+static void writer(void *arg);
+static void reader(void *arg);
+static void failed(void);
+__u32 random(__u32 max)
+{
+    __u32 rc;
+    spinlock_lock(&lock);
+    rc = seed % max;
+    seed = (((seed<<2) ^ (seed>>2)) * 487) + rc;
+    spinlock_unlock(&lock);
+    return rc;
+}
+void writer(void *arg)
+{
+    int rc, to;
+    thread_detach(THREAD);
+    waitq_sleep(&can_start);
+    to = random(40000);
+    printf("cpu%d, tid %d w+ (%d)\n", CPU->id, THREAD->tid, to);
+    rc = rwlock_write_lock_timeout(&rwlock, to);
+    if (SYNCH_FAILED(rc)) {
+        printf("cpu%d, tid %d w!\n", CPU->id, THREAD->tid);
+        return;
+    };
+    printf("cpu%d, tid %d w=\n", CPU->id, THREAD->tid);
+    if (rwlock.readers_in) panic("Oops.");
+    thread_usleep(random(1000000));
+    if (rwlock.readers_in) panic("Oops.");
+    rwlock_write_unlock(&rwlock);
+    printf("cpu%d, tid %d w-\n", CPU->id, THREAD->tid);
+}
+void reader(void *arg)
+{
+    int rc, to;
+    thread_detach(THREAD);
+    waitq_sleep(&can_start);
+    to = random(2000);
+    printf("cpu%d, tid %d r+ (%d)\n", CPU->id, THREAD->tid, to);
+    rc = rwlock_read_lock_timeout(&rwlock, to);
+    if (SYNCH_FAILED(rc)) {
+        printf("cpu%d, tid %d r!\n", CPU->id, THREAD->tid);
+        return;
+    }
+    printf("cpu%d, tid %d r=\n", CPU->id, THREAD->tid);
+    thread_usleep(30000);
+    rwlock_read_unlock(&rwlock);
+    printf("cpu%d, tid %d r-\n", CPU->id, THREAD->tid);
+}
+void failed(void)
+{
+    printf("Test failed prematurely.\n");
+    thread_exit();
+}
+void test(void)
+{
+    context_t ctx;
+    __u32 i, k;
+    printf("Read/write locks test #4\n");
+    waitq_initialize(&can_start);
+    rwlock_initialize(&rwlock);
+    for (; ;) {
+        thread_t *thrd;
+        context_save(&ctx);
+        printf("sp=%#x, readers_in=%d\n", ctx.sp, rwlock.readers_in);
+        k = random(7) + 1;
+        printf("Creating %d readers\n", k);
+        for (i=0; i<k; i++) {
+            thrd = thread_create(reader, NULL, TASK, 0, "reader");
+            if (thrd)
+                thread_ready(thrd);
+            else
+                failed();
+        }
+        k = random(5) + 1;
+        printf("Creating %d writers\n", k);
+        for (i=0; i<k; i++) {
+            thrd = thread_create(writer, NULL, TASK, 0, "writer");
+            if (thrd)
+                thread_ready(thrd);
+            else
+                failed();
+        }
+        thread_usleep(20000);
+        waitq_wakeup(&can_start, WAKEUP_ALL);
+    }
+}

 /tags/0.2.0.2/kernel/test/synch/semaphore2/test.c
 ,0 → 1,124
+/*
+ * Copyright (C) 2001-2004 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#include <test.h>
+#include <arch.h>
+#include <atomic.h>
+#include <print.h>
+#include <proc/thread.h>
+#include <arch/types.h>
+#include <arch/context.h>
+#include <synch/waitq.h>
+#include <synch/semaphore.h>
+#include <synch/synch.h>
+#include <synch/spinlock.h>
+static semaphore_t sem;
+SPINLOCK_INITIALIZE(lock);
+static waitq_t can_start;
+__u32 seed = 0xdeadbeef;
+static __u32 random(__u32 max);
+static void consumer(void *arg);
+static void failed(void);
+__u32 random(__u32 max)
+{
+    __u32 rc;
+    spinlock_lock(&lock);
+    rc = seed % max;
+    seed = (((seed<<2) ^ (seed>>2)) * 487) + rc;
+    spinlock_unlock(&lock);
+    return rc;
+}
+void consumer(void *arg)
+{
+    int rc, to;
+    thread_detach(THREAD);
+    waitq_sleep(&can_start);
+    to = random(20000);
+    printf("cpu%d, tid %d down+ (%d)\n", CPU->id, THREAD->tid, to);
+    rc = semaphore_down_timeout(&sem, to);
+    if (SYNCH_FAILED(rc)) {
+        printf("cpu%d, tid %d down!\n", CPU->id, THREAD->tid);
+        return;
+    }
+    printf("cpu%d, tid %d down=\n", CPU->id, THREAD->tid);
+    thread_usleep(random(30000));
+    semaphore_up(&sem);
+    printf("cpu%d, tid %d up\n", CPU->id, THREAD->tid);
+}
+void failed(void)
+{
+    printf("Test failed prematurely.\n");
+    thread_exit();
+}
+void test(void)
+{
+    __u32 i, k;
+    printf("Semaphore test #2\n");
+    waitq_initialize(&can_start);
+    semaphore_initialize(&sem, 5);
+    for (; ;) {
+        thread_t *thrd;
+        k = random(7) + 1;
+        printf("Creating %d consumers\n", k);
+        for (i=0; i<k; i++) {
+            thrd = thread_create(consumer, NULL, TASK, 0, "consumer");
+            if (thrd)
+                thread_ready(thrd);
+            else
+                failed();
+        }
+        thread_usleep(20000);
+        waitq_wakeup(&can_start, WAKEUP_ALL);
+    }
+}

 /tags/0.2.0.2/kernel/test/synch/rwlock5/test.c
 ,0 → 1,128
+/*
+ * Copyright (C) 2001-2004 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#include <test.h>
+#include <arch.h>
+#include <atomic.h>
+#include <print.h>
+#include <proc/thread.h>
+#include <synch/waitq.h>
+#include <synch/rwlock.h>
+#define READERS     50
+#define WRITERS     50
+static rwlock_t rwlock;
+static waitq_t can_start;
+static atomic_t items_read;
+static atomic_t items_written;
+static void writer(void *arg);
+static void reader(void *arg);
+static void failed(void);
+void writer(void *arg)
+{
+    thread_detach(THREAD);
+    waitq_sleep(&can_start);
+    rwlock_write_lock(&rwlock);
+    atomic_inc(&items_written);
+    rwlock_write_unlock(&rwlock);
+}
+void reader(void *arg)
+{
+    thread_detach(THREAD);
+    waitq_sleep(&can_start);
+    rwlock_read_lock(&rwlock);
+    atomic_inc(&items_read);
+    rwlock_read_unlock(&rwlock);
+}
+void failed(void)
+{
+    printf("Test failed prematurely.\n");
+    thread_exit();
+}
+void test(void)
+{
+    int i, j, k;
+    count_t readers, writers;
+    printf("Read/write locks test #5\n");
+    waitq_initialize(&can_start);
+    rwlock_initialize(&rwlock);
+    for (i=1; i<=3; i++) {
+        thread_t *thrd;
+        atomic_set(&items_read, 0);
+        atomic_set(&items_written, 0);
+        readers = i*READERS;
+        writers = (4-i)*WRITERS;
+        printf("Creating %ld readers and %ld writers...", readers, writers);
+        for (j=0; j<(READERS+WRITERS)/2; j++) {
+            for (k=0; k<i; k++) {
+                thrd = thread_create(reader, NULL, TASK, 0, "reader");
+                if (thrd)
+                    thread_ready(thrd);
+                else
+                    failed();
+            }
+            for (k=0; k<(4-i); k++) {
+                thrd = thread_create(writer, NULL, TASK, 0, "writer");
+                if (thrd)
+                    thread_ready(thrd);
+                else
+                    failed();
+            }
+        }
+        printf("ok\n");
+        thread_sleep(1);
+        waitq_wakeup(&can_start, WAKEUP_ALL);
+        while (items_read.count != readers || items_written.count != writers) {
+            printf("%zd readers remaining, %zd writers remaining, readers_in=%zd\n", readers - items_read.count, writers - items_written.count, rwlock.readers_in);
+            thread_usleep(100000);
+        }
+    }
+    printf("Test passed.\n");
+}

 /tags/0.2.0.2/kernel/test/synch/rwlock1/test.c
 ,0 → 1,78
+/*
+ * Copyright (C) 2001-2004 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#include <test.h>
+#include <arch.h>
+#include <atomic.h>
+#include <print.h>
+#include <proc/thread.h>
+#include <synch/waitq.h>
+#include <synch/rwlock.h>
+#define READERS     50
+#define WRITERS     50
+static rwlock_t rwlock;
+void test(void)
+{
+    printf("Read/write locks test #1\n");
+    rwlock_initialize(&rwlock);
+    rwlock_write_lock(&rwlock);
+    rwlock_write_unlock(&rwlock);
+    rwlock_read_lock(&rwlock);
+    rwlock_read_lock(&rwlock);
+    rwlock_read_lock(&rwlock);
+    rwlock_read_lock(&rwlock);
+    rwlock_read_lock(&rwlock);
+    rwlock_read_unlock(&rwlock);
+    rwlock_read_unlock(&rwlock);
+    rwlock_read_unlock(&rwlock);
+    rwlock_read_unlock(&rwlock);
+    rwlock_read_unlock(&rwlock);
+    rwlock_write_lock(&rwlock);
+    rwlock_write_unlock(&rwlock);
+    rwlock_read_lock(&rwlock);
+    rwlock_read_unlock(&rwlock);
+    rwlock_write_lock(&rwlock);
+    rwlock_write_unlock(&rwlock);
+    rwlock_read_lock(&rwlock);
+    rwlock_read_unlock(&rwlock);
+    printf("Test passed.\n");
+}

 /tags/0.2.0.2/kernel/test/thread/thread1/test.c
 ,0 → 1,67
+/*
+ * Copyright (C) 2005 Jakub Vana
+ * Copyright (C) 2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#include <print.h>
+#include <debug.h>
+#include <panic.h>
+#include <test.h>
+#include <atomic.h>
+#include <proc/thread.h>
+#include <arch.h>
+#define THREADS 5
+static void threadtest(void *data)
+{
+    thread_detach(THREAD);
+    while(1)
+    {
+        while (1)
+            ;
+        printf("%d\n",(int)(THREAD->tid));
+        scheduler();
+    }
+}
+void test(void)
+{
+    thread_t *t;
+    int i;
+    for (i=0; i<THREADS; i++) {
+        if (!(t = thread_create(threadtest, NULL, TASK, 0, "threadtest")))
+            panic("could not create thread\n");
+        thread_ready(t);
+    }
+    printf("ok\n");
+}

 /tags/0.2.0.2/kernel/test/fpu/mips1/test.c
 ,0 → 1,136
+/*
+ * Copyright (C) 2005 Ondrej Palkovsky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#include <print.h>
+#include <debug.h>
+#include <panic.h>
+#include <test.h>
+#include <atomic.h>
+#include <proc/thread.h>
+#include <time/delay.h>
+#include <arch.h>
+#define THREADS     50
+#define DELAY       10000L
+#define ATTEMPTS        5
+static atomic_t threads_ok;
+static waitq_t can_start;
+static void testit1(void *data)
+{
+    int i;
+    int arg __attribute__((aligned(16))) = (int)((__native) data);
+    int after_arg __attribute__((aligned(16)));
+    thread_detach(THREAD);
+    waitq_sleep(&can_start);
+    for (i = 0; i<ATTEMPTS; i++) {
+        __asm__ volatile (
+            "mtc1 %0,$1"
+            :"=r"(arg)
+            );
+        delay(DELAY);
+        __asm__ volatile (
+            "mfc1 %0, $1"
+            :"=r"(after_arg)
+            );
+        if(arg != after_arg)
+            panic("General reg tid%d: arg(%d) != %d\n",
+                  THREAD->tid, arg, after_arg);
+    }
+    atomic_inc(&threads_ok);
+}
+static void testit2(void *data)
+{
+    int i;
+    int arg __attribute__((aligned(16))) = (int)((__native) data);
+    int after_arg __attribute__((aligned(16)));
+    thread_detach(THREAD);
+    waitq_sleep(&can_start);
+    for (i = 0; i<ATTEMPTS; i++) {
+        __asm__ volatile (
+            "mtc1 %0,$1"
+            :"=r"(arg)
+            );
+        scheduler();
+        __asm__ volatile (
+            "mfc1 %0,$1"
+            :"=r"(after_arg)
+            );
+        if(arg != after_arg)
+            panic("General reg tid%d: arg(%d) != %d\n",
+                  THREAD->tid, arg, after_arg);
+    }
+    atomic_inc(&threads_ok);
+}
+void test(void)
+{
+    thread_t *t;
+    int i;
+    waitq_initialize(&can_start);
+    printf("MIPS test #1\n");
+    printf("Creating %d threads... ", THREADS);
+    for (i=0; i<THREADS/2; i++) {
+        if (!(t = thread_create(testit1, (void *)((__native)i*2), TASK, 0, "testit1")))
+            panic("could not create thread\n");
+        thread_ready(t);
+        if (!(t = thread_create(testit2, (void *)((__native)i*2+1), TASK, 0, "testit2")))
+            panic("could not create thread\n");
+        thread_ready(t);
+    }
+    printf("ok\n");
+    thread_sleep(1);
+    waitq_wakeup(&can_start, WAKEUP_ALL);
+    while (atomic_get(&threads_ok) != THREADS)
+        ;
+    printf("Test passed.\n");
+}

 /tags/0.2.0.2/kernel/test/fpu/fpu1/test.c
 ,0 → 1,178
+/*
+ * Copyright (C) 2005 Jakub Vana
+ * Copyright (C) 2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#include <print.h>
+#include <debug.h>
+#include <panic.h>
+#include <test.h>
+#include <atomic.h>
+#include <proc/thread.h>
+#include <arch.h>
+#include <arch/arch.h>
+#define THREADS     150*2
+#define ATTEMPTS    100
+#define E_10e8  271828182
+#define PI_10e8 314159265
+#ifdef __ia32_ARCH_H__
+static inline double sqrt(double x) { double v; __asm__ ("fsqrt\n" : "=t" (v) : "0" (x)); return v; }
+#endif
+#ifdef __amd64_ARCH_H__
+static inline double sqrt(double x) { double v; __asm__ ("fsqrt\n" : "=t" (v) : "0" (x)); return v; }
+#endif
+#ifdef __ia64_ARCH_H__
+static inline long double sqrt(long double a)
+{
+    long double x = 1;
+    long double lx = 0;
+    if(a<0.00000000000000001) return 0;
+    while(x!=lx)
+    {
+        lx=x;
+        x=(x+(a/x))/2;
+    }
+    return x;
+}
+#endif
+static atomic_t threads_ok;
+static waitq_t can_start;
+static void e(void *data)
+{
+    int i;
+    double e,d,le,f;
+    thread_detach(THREAD);
+    waitq_sleep(&can_start);
+    for (i = 0; i<ATTEMPTS; i++) {
+        le=-1;
+        e=0;
+        f=1;
+        for(d=1;e!=le;d*=f,f+=1) {
+            le=e;
+            e=e+1/d;
+        }
+        if((int)(100000000*e)!=E_10e8)
+            panic("tid%d: e*10e8=%zd should be %zd\n", THREAD->tid, (__native) (100000000*e),(__native) E_10e8);
+    }
+    printf("tid%d: e*10e8=%zd should be %zd\n", THREAD->tid, (__native) (100000000*e),(__native) E_10e8);
+    atomic_inc(&threads_ok);
+}
+static void pi(void *data)
+{
+#ifdef __ia64_ARCH_H__
+#undef PI_10e8
+#define PI_10e8 3141592
+#endif
+    int i;
+    double lpi, pi;
+    double n, ab, ad;
+    thread_detach(THREAD);
+    waitq_sleep(&can_start);
+    for (i = 0; i<ATTEMPTS; i++) {
+        lpi = -1;
+        pi = 0;
+        for (n=2, ab = sqrt(2); lpi != pi; n *= 2, ab = ad) {
+            double sc, cd;
+            sc = sqrt(1 - (ab*ab/4));
+            cd = 1 - sc;
+            ad = sqrt(ab*ab/4 + cd*cd);
+            lpi = pi;
+            pi = 2 * n * ad;
+        }
+#ifdef __ia64_ARCH_H__
+        if((int)(1000000*pi)!=PI_10e8)
+            panic("tid%d: pi*10e8=%zd should be %zd\n", THREAD->tid, (__native) (1000000*pi),(__native) (PI_10e8/100));
+#else
+        if((int)(100000000*pi)!=PI_10e8)
+            panic("tid%d: pi*10e8=%zd should be %zd\n", THREAD->tid, (__native) (100000000*pi),(__native) PI_10e8);
+#endif
+    }
+    printf("tid%d: pi*10e8=%zd should be %zd\n", THREAD->tid, (__native) (100000000*pi),(__native) PI_10e8);
+    atomic_inc(&threads_ok);
+}
+void test(void)
+{
+    thread_t *t;
+    int i;
+    waitq_initialize(&can_start);
+    printf("FPU test #1\n");
+    printf("Creating %d threads... ", THREADS);
+    for (i=0; i<THREADS/2; i++) {
+        if (!(t = thread_create(e, NULL, TASK, 0, "e")))
+            panic("could not create thread\n");
+        thread_ready(t);
+        if (!(t = thread_create(pi, NULL, TASK, 0, "pi")))
+            panic("could not create thread\n");
+        thread_ready(t);
+    }
+    printf("ok\n");
+    thread_sleep(1);
+    waitq_wakeup(&can_start, WAKEUP_ALL);
+    while (atomic_get(&threads_ok) != THREADS)
+        ;
+    printf("Test passed.\n");
+}

 /tags/0.2.0.2/kernel/test/fpu/sse1/test.c
 ,0 → 1,136
+/*
+ * Copyright (C) 2005 Ondrej Palkovsky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#include <print.h>
+#include <debug.h>
+#include <panic.h>
+#include <test.h>
+#include <atomic.h>
+#include <proc/thread.h>
+#include <time/delay.h>
+#include <arch.h>
+#define THREADS     50
+#define DELAY       10000L
+#define ATTEMPTS        5
+static atomic_t threads_ok;
+static waitq_t can_start;
+static void testit1(void *data)
+{
+    int i;
+    int arg __attribute__((aligned(16))) = (int)((__native) data);
+    int after_arg __attribute__((aligned(16)));
+    thread_detach(THREAD);
+    waitq_sleep(&can_start);
+    for (i = 0; i<ATTEMPTS; i++) {
+        __asm__ volatile (
+            "movlpd %0, %%xmm2"
+            :"=m"(arg)
+            );
+        delay(DELAY);
+        __asm__ volatile (
+            "movlpd %%xmm2, %0"
+            :"=m"(after_arg)
+            );
+        if(arg != after_arg)
+            panic("tid%d: arg(%d) != %d\n",
+                  THREAD->tid, arg, after_arg);
+    }
+    atomic_inc(&threads_ok);
+}
+static void testit2(void *data)
+{
+    int i;
+    int arg __attribute__((aligned(16))) = (int)((__native) data);
+    int after_arg __attribute__((aligned(16)));
+    thread_detach(THREAD);
+    waitq_sleep(&can_start);
+    for (i = 0; i<ATTEMPTS; i++) {
+        __asm__ volatile (
+            "movlpd %0, %%xmm2"
+            :"=m"(arg)
+            );
+        scheduler();
+        __asm__ volatile (
+            "movlpd %%xmm2, %0"
+            :"=m"(after_arg)
+            );
+        if(arg != after_arg)
+            panic("tid%d: arg(%d) != %d\n",
+                  THREAD->tid, arg, after_arg);
+    }
+    atomic_inc(&threads_ok);
+}
+void test(void)
+{
+    thread_t *t;
+    int i;
+    waitq_initialize(&can_start);
+    printf("SSE test #1\n");
+    printf("Creating %d threads... ", THREADS);
+    for (i=0; i<THREADS/2; i++) {
+        if (!(t = thread_create(testit1, (void *)((__native)i*2), TASK, 0, "testit1")))
+            panic("could not create thread\n");
+        thread_ready(t);
+        if (!(t = thread_create(testit2, (void *)((__native)i*2+1), TASK, 0, "testit2")))
+            panic("could not create thread\n");
+        thread_ready(t);
+    }
+    printf("ok\n");
+    thread_sleep(1);
+    waitq_wakeup(&can_start, WAKEUP_ALL);
+    while (atomic_get(&threads_ok) != THREADS)
+        ;
+    printf("Test passed.\n");
+}

 /tags/0.2.0.2/kernel/test/sysinfo/test.c
 ,0 → 1,55
+/*
+ * Copyright (C) 2005 Jakub Vana
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#include <print.h>
+#include <debug.h>
+#include <panic.h>
+#include <test.h>
+#include <sysinfo/sysinfo.h>
+/*
+static __native counter(sysinfo_item_t *root)
+{
+    static __native i=0;
+    return i++;
+}*/
+void test(void)
+{
+/*  sysinfo_set_item_val("Ahoj.lidi.uaaaa",NULL,9);
+    sysinfo_set_item_val("Ahoj.lidi.ubbbb",NULL,15);
+    sysinfo_set_item_val("Ahoj.lidi",NULL,64);
+    sysinfo_set_item_function("Ahoj",NULL,counter);
+    sysinfo_dump(NULL,0);
+    sysinfo_set_item_val("Ahoj.lidi.ubbbb",NULL,75);
+    sysinfo_dump(NULL,0);
+    sysinfo_dump(NULL,0);
+    sysinfo_dump(NULL,0);*/
+    sysinfo_dump(NULL,0);
+}

 /tags/0.2.0.2/kernel/test/btree/btree1/test.c
 ,0 → 1,159
+/*
+ * Copyright (C) 2006 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#include <test.h>
+#include <print.h>
+#include <adt/btree.h>
+#include <debug.h>
+void *data = (void *) 0xdeadbeef;
+void test(void)
+{
+    btree_t t;
+    int i;
+    btree_create(&t);
+    printf("Inserting keys.\n");
+    btree_insert(&t, 19, data, NULL);
+    btree_insert(&t, 20, data, NULL);
+    btree_insert(&t, 21, data, NULL);
+    btree_insert(&t, 0, data, NULL);
+    btree_insert(&t, 25, data, NULL);
+    btree_insert(&t, 22, data, NULL);
+    btree_insert(&t, 26, data, NULL);
+    btree_insert(&t, 23, data, NULL);
+    btree_insert(&t, 24, data, NULL);
+    btree_insert(&t, 5, data, NULL);
+    btree_insert(&t, 1, data, NULL);
+    btree_insert(&t, 4, data, NULL);
+    btree_insert(&t, 28, data, NULL);
+    btree_insert(&t, 29, data, NULL);
+    btree_insert(&t, 7, data, NULL);
+    btree_insert(&t, 8, data, NULL);
+    btree_insert(&t, 9, data, NULL);
+    btree_insert(&t, 17, data, NULL);
+    btree_insert(&t, 18, data, NULL);
+    btree_insert(&t, 2, data, NULL);
+    btree_insert(&t, 3, data, NULL);
+    btree_insert(&t, 6, data, NULL);
+    btree_insert(&t, 10, data, NULL);
+    btree_insert(&t, 11, data, NULL);
+    btree_insert(&t, 12, data, NULL);
+    btree_insert(&t, 13, data, NULL);
+    btree_insert(&t, 14, data, NULL);
+    btree_insert(&t, 15, data, NULL);
+    btree_insert(&t, 16, data, NULL);
+    btree_insert(&t, 27, data, NULL);
+    for (i = 30; i < 50; i++)
+        btree_insert(&t, i, data, NULL);
+    for (i = 100; i >= 50; i--)
+        btree_insert(&t, i, data, NULL);
+    btree_print(&t);
+    printf("Removing keys.\n");
+    btree_remove(&t, 50, NULL);
+    btree_remove(&t, 49, NULL);
+    btree_remove(&t, 51, NULL);
+    btree_remove(&t, 46, NULL);
+    btree_remove(&t, 45, NULL);
+    btree_remove(&t, 48, NULL);
+    btree_remove(&t, 53, NULL);
+    btree_remove(&t, 47, NULL);
+    btree_remove(&t, 52, NULL);
+    btree_remove(&t, 54, NULL);
+    btree_remove(&t, 65, NULL);
+    btree_remove(&t, 60, NULL);
+    btree_remove(&t, 99, NULL);
+    btree_remove(&t, 97, NULL);
+    btree_remove(&t, 57, NULL);
+    btree_remove(&t, 58, NULL);
+    btree_remove(&t, 61, NULL);
+    btree_remove(&t, 64, NULL);
+    btree_remove(&t, 56, NULL);
+    btree_remove(&t, 41, NULL);
+    for (i = 5; i < 20; i++)
+        btree_remove(&t, i, NULL);
+    btree_remove(&t, 2, NULL);
+    btree_remove(&t, 43, NULL);
+    btree_remove(&t, 22, NULL);
+    btree_remove(&t, 100, NULL);
+    btree_remove(&t, 98, NULL);
+    btree_remove(&t, 96, NULL);
+    btree_remove(&t, 66, NULL);
+    btree_remove(&t, 1, NULL);
+    for (i = 70; i < 90; i++)
+        btree_remove(&t, i, NULL);
+    btree_remove(&t, 20, NULL);
+    btree_remove(&t, 0, NULL);
+    btree_remove(&t, 40, NULL);
+    btree_remove(&t, 3, NULL);
+    btree_remove(&t, 4, NULL);
+    btree_remove(&t, 21, NULL);
+    btree_remove(&t, 44, NULL);
+    btree_remove(&t, 55, NULL);
+    btree_remove(&t, 62, NULL);
+    btree_remove(&t, 26, NULL);
+    btree_remove(&t, 27, NULL);
+    btree_remove(&t, 28, NULL);
+    btree_remove(&t, 29, NULL);
+    btree_remove(&t, 30, NULL);
+    btree_remove(&t, 31, NULL);
+    btree_remove(&t, 32, NULL);
+    btree_remove(&t, 33, NULL);
+    btree_remove(&t, 93, NULL);
+    btree_remove(&t, 95, NULL);
+    btree_remove(&t, 94, NULL);
+    btree_remove(&t, 69, NULL);
+    btree_remove(&t, 68, NULL);
+    btree_remove(&t, 92, NULL);
+    btree_remove(&t, 91, NULL);
+    btree_remove(&t, 67, NULL);
+    btree_remove(&t, 63, NULL);
+    btree_remove(&t, 90, NULL);
+    btree_remove(&t, 59, NULL);
+    btree_remove(&t, 23, NULL);
+    btree_remove(&t, 24, NULL);
+    btree_remove(&t, 25, NULL);
+    btree_remove(&t, 37, NULL);
+    btree_remove(&t, 38, NULL);
+    btree_remove(&t, 42, NULL);
+    btree_remove(&t, 39, NULL);
+    btree_remove(&t, 34, NULL);
+    btree_remove(&t, 35, NULL);
+    btree_remove(&t, 36, NULL);
+    btree_print(&t);
+}

 /tags/0.2.0.2/kernel/test/debug/mips1/test.c
 ,0 → 1,50
+/*
+ * Copyright (C) 2005 Ondrej Palkovsky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#include <print.h>
+#include <debug.h>
+#include <panic.h>
+#include <test.h>
+#include <atomic.h>
+#include <proc/thread.h>
+#include <time/delay.h>
+#include <arch.h>
+void test(void)
+{
+    printf("MIPS debug test #1\n");
+    printf("You should enter kconsole debug mode now.\n");
+    asm __volatile__ ("break");
+    printf("Test passed.\n");
+}

 /tags/0.2.0.2/kernel/test/fault/fault1/test.c
 ,0 → 1,46
+/*
+ * Copyright (C) 2005 Jakub Vana
+ * Copyright (C) 2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#include <print.h>
+#include <debug.h>
+#include <panic.h>
+#include <test.h>
+#include <atomic.h>
+#include <proc/thread.h>
+#include <arch.h>
+void test(void)
+{
+    ((int *)(0))[1]=0;
+}

 /tags/0.2.0.2/kernel/test/atomic/atomic1/test.c
 ,0 → 1,56
+/*
+ * Copyright (C) 2006 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#include <test.h>
+#include <print.h>
+#include <atomic.h>
+#include <debug.h>
+void test(void)
+{
+    atomic_t a;
+    atomic_set(&a, 10);
+    printf("Testing atomic_set() and atomic_get().\n");
+    ASSERT(atomic_get(&a) == 10);
+    printf("Testing atomic_postinc()\n");
+    ASSERT(atomic_postinc(&a) == 10);
+    ASSERT(atomic_get(&a) == 11);
+    printf("Testing atomic_postdec()\n");
+    ASSERT(atomic_postdec(&a) == 11);
+    ASSERT(atomic_get(&a) == 10);
+    printf("Testing atomic_preinc()\n");
+    ASSERT(atomic_preinc(&a) == 11);
+    ASSERT(atomic_get(&a) == 11);
+    printf("Testing atomic_predec()\n");
+    ASSERT(atomic_postdec(&a) == 11);
+    ASSERT(atomic_get(&a) == 10);
+    printf("Test passed.\n");
+    return;
+}

/tags/0.2.0.2/kernel/contrib/conf/gxemul.sh
0,0 → 1,4
#!/bin/sh
# Uspace addresses outside of normal memory (kernel has std. 8 or 16MB)
# we place the pages at 24M
gxemul $@ -E testmips -X image.boot
Property changes:
Added: svn:executable
+*
\ No newline at end of property

 /tags/0.2.0.2/kernel/contrib/conf/msim.conf
 ,0 → 1,11
+#
+# MSIM configuration script
+#
+add dcpu mips1
+add rwm mainmem     0x0         8M      load    "/dev/zero"
+add rom startmem    0x1fc00000  1024k   load    "image.boot"
+add dprinter printer 0x10000000
+add dkeyboard keyboard 0x10000000 2

/tags/0.2.0.2/kernel/contrib/conf/pearpc.conf
0,0 → 1,7
ppc_start_resolution = "800x600x32"
pci_ide0_master_installed = 0

prom_bootmethod = "force"
prom_loadfile = "image.boot"

key_toggle_mouse_grab = "F11"

 /tags/0.2.0.2/kernel/contrib/conf/ski.conf
 ,0 → 1,11
+load HelenOS/boot/kernel.bin
+romload HelenOS/uspace/ns/ns 0x400000
+romload HelenOS/uspace/init/init 0x800000
+romload HelenOS/uspace/console/console 0xc00000
+romload HelenOS/uspace/fb/fb 0x1000000
+romload HelenOS/uspace/kbd/kbd 0x1400000
+romload HelenOS/uspace/tetris/tetris 0x1800000
+romload HelenOS/uspace/klog/klog 0x1c00000
+romload HelenOS/uspace/ipcc/ipcc 0x2000000

 /tags/0.2.0.2/kernel/contrib/conf/dot.bochsrc
 ,0 → 1,719
+# You may now use double quotes around pathnames, in case
+# your pathname includes spaces.
+#=======================================================================
+# CONFIG_INTERFACE
+#
+# The configuration interface is a series of menus or dialog boxes that
+# allows you to change all the settings that control Bochs's behavior.
+# There are two choices of configuration interface: a text mode version
+# called "textconfig" and a graphical version called "wx".  The text
+# mode version uses stdin/stdout and is always compiled in.  The graphical
+# version is only available when you use "--with-wx" on the configure
+# command.  If you do not write a config_interface line, Bochs will
+# choose a default for you.
+#
+# NOTE: if you use the "wx" configuration interface, you must also use
+# the "wx" display library.
+#=======================================================================
+config_interface: textconfig
+#config_interface: wx
+#=======================================================================
+# DISPLAY_LIBRARY
+#
+# The display library is the code that displays the Bochs VGA screen.  Bochs
+# has a selection of about 10 different display library implementations for
+# different platforms.  If you run configure with multiple --with-* options,
+# the display_library command lets you choose which one you want to run with.
+# If you do not write a display_library line, Bochs will choose a default for
+# you.
+#
+# The choices are:
+#   x              use X windows interface, cross platform
+#   win32          use native win32 libraries
+#   carbon         use Carbon library (for MacOS X)
+#   beos           use native BeOS libraries
+#   macintosh      use MacOS pre-10
+#   amigaos        use native AmigaOS libraries
+#   sdl            use SDL library, cross platform
+#   svga           use SVGALIB library for Linux, allows graphics without X11
+#   term           text only, uses curses/ncurses library, cross platform
+#   rfb            provides an interface to AT&T's VNC viewer, cross platform
+#   wx             use wxWindows library, cross platform
+#   nogui          no display at all
+#
+# NOTE: if you use the "wx" configuration interface, you must also use
+# the "wx" display library.
+#=======================================================================
+#display_library: amigaos
+#display_library: beos
+#display_library: carbon
+#display_library: macintosh
+#display_library: nogui
+#display_library: rfb
+#display_library: sdl
+#display_library: term
+#display_library: win32
+#display_library: wx
+display_library: x
+cpu: count=8, ips=10000000
+#=======================================================================
+# ROMIMAGE:
+# You now need to load a ROM BIOS into F0000-FFFFF. Normally, you can
+# use a precompiled BIOS in the bios/ directory of the source tree,
+# named BIOS-bochs-latest.
+# You can also use the environment variable $BXSHARE to specify the
+# location of the BIOS.
+#=======================================================================
+romimage: file=$BXSHARE/BIOS-bochs-latest, address=0xf0000
+#romimage: file=$BXSHARE/BIOS-bochs-8-processors, address=0xf0000
+#romimage: file=bios/P4SMT, address=0xf0000
+#=======================================================================
+# MEGS
+# set this to the default number of Megabytes of memory you want
+# to emulate.  You may also pass the '-megs xyz' option to bochs
+#
+# The default is 32MB, most OS's won't need more than that.
+#=======================================================================
+#megs: 256
+#megs: 128
+#megs: 64
+megs: 32
+#megs: 16
+#megs: 8
+#=======================================================================
+# OPTROMIMAGE[1-4]:
+# You may now load up to 4 optional ROM images. Be sure to use a
+# read-only area, typically between C8000 and EFFFF. These optional
+# ROM images should not overwrite the rombios (located at
+# F0000-FFFFF) and the videobios (located at C0000-C7FFF).
+# Those ROM images will be initialized by the bios if they contain
+# the right signature (0x55AA).
+# It can also be a convenient way to upload some arbitary code/data
+# in the simulation, that can be retrieved by the boot loader
+#=======================================================================
+#optromimage1: file=optionalrom.bin, address=0xd0000
+#optromimage2: file=optionalrom.bin, address=0xd1000
+#optromimage3: file=optionalrom.bin, address=0xd2000
+#optromimage4: file=optionalrom.bin, address=0xd3000
+#=======================================================================
+# VGAROMIMAGE
+# You now need to load a VGA ROM BIOS into C0000.
+#=======================================================================
+vgaromimage: $BXSHARE/VGABIOS-lgpl-latest
+#vgaromimage: bios/VGABIOS-elpin-2.40
+#vgaromimage: $BXSHARE/VGABIOS-elpin-2.40
+#=======================================================================
+# FLOPPYA:
+# Point this to pathname of floppy image file or device
+# This should be of a bootable floppy(image/device) if you're
+# booting from 'a'.
+#
+# You can set the initial status of the media to 'ejected' or 'inserted'.
+#   floppya: 2_88=path, status=ejected             (2.88M 3.5" floppy)
+#   floppya: 1_44=path, status=inserted            (1.44M 3.5" floppy)
+#   floppya: 1_2=path, status=ejected              (1.2M  5.25" floppy)
+#   floppya: 720k=path, status=inserted            (720K  3.5" floppy)
+#   floppya: 360k=path, status=inserted            (360K  5.25" floppy)
+#   floppya: 320k=path, status=inserted            (320K  5.25" floppy)
+#   floppya: 180k=path, status=inserted            (180K  5.25" floppy)
+#   floppya: 160k=path, status=inserted            (160K  5.25" floppy)
+#
+# The path should be the name of a disk image file.  On unix, you can use
+# a raw device name such as /dev/fd0 on Linux.  On WinNT and Win2k, use
+# drive letters such as a: or b: as the path.  Raw floppy access is not
+# supported on Windows 95 and 98.
+#=======================================================================
+#floppya: 1_44=image.boot, status=inserted
+#floppya: 1_44=/dev/fd0, status=inserted
+#=======================================================================
+# FLOPPYB:
+# See FLOPPYA above for syntax
+#=======================================================================
+#floppyb: 1_44=b:, status=inserted
+#floppyb: 1_44=b.img, status=inserted
+#=======================================================================
+# ATA0, ATA1, ATA2, ATA3
+# ATA controller for hard disks and cdroms
+#
+# ata[0-3]: enabled=[0|1], ioaddr1=addr, ioaddr2=addr, irq=number
+#
+# These options enables up to 4 ata channels. For each channel
+# the two base io addresses and the irq must be specified.
+#
+# ata0 is enabled by default, with ioaddr1=0x1f0, ioaddr2=0x3f0, irq=14
+#
+# Examples:
+#   ata0: enabled=1, ioaddr1=0x1f0, ioaddr2=0x3f0, irq=14
+#   ata1: enabled=1, ioaddr1=0x170, ioaddr2=0x370, irq=15
+#   ata2: enabled=1, ioaddr1=0x1e8, ioaddr2=0x3e0, irq=11
+#   ata3: enabled=1, ioaddr1=0x168, ioaddr2=0x360, irq=9
+#=======================================================================
+ata0: enabled=1, ioaddr1=0x1f0, ioaddr2=0x3f0, irq=14
+ata1: enabled=0, ioaddr1=0x170, ioaddr2=0x370, irq=15
+ata2: enabled=0, ioaddr1=0x1e8, ioaddr2=0x3e0, irq=11
+ata3: enabled=0, ioaddr1=0x168, ioaddr2=0x360, irq=9
+#=======================================================================
+# ATA[0-3]-MASTER, ATA[0-3]-SLAVE
+#
+# This defines the type and characteristics of all attached ata devices:
+#   type=       type of attached device [disk|cdrom]
+#   mode=       only valid for disks [flat|concat|external|dll|sparse|vmware3]
+#   mode=       only valid for disks [undoable|growing|volatile]
+#   path=       path of the image
+#   cylinders=  only valid for disks
+#   heads=      only valid for disks
+#   spt=        only valid for disks
+#   status=     only valid for cdroms [inserted|ejected]
+#   biosdetect= type of biosdetection [none|auto], only for disks on ata0 [cmos]
+#   translation=type of transation of the bios, only for disks [none|lba|large|rechs|auto]
+#   model=      string returned by identify device command
+#   journal=    optional filename of the redolog for undoable and volatile disks
+#
+# Point this at a hard disk image file, cdrom iso file, or physical cdrom
+# device.  To create a hard disk image, try running bximage.  It will help you
+# choose the size and then suggest a line that works with it.
+#
+# In UNIX it may be possible to use a raw device as a Bochs hard disk,
+# but WE DON'T RECOMMEND IT.  In Windows there is no easy way.
+#
+# In windows, the drive letter + colon notation should be used for cdroms.
+# Depending on versions of windows and drivers, you may only be able to
+# access the "first" cdrom in the system.  On MacOSX, use path="drive"
+# to access the physical drive.
+#
+# The path, cylinders, heads, and spt are mandatory for type=disk
+# The path is mandatory for type=cdrom
+#
+# Default values are:
+#   mode=flat, biosdetect=auto, translation=auto, model="Generic 1234"
+#
+# The biosdetect option has currently no effect on the bios
+#
+# Examples:
+#   ata0-master: type=disk, mode=flat, path=10M.sample, cylinders=306, heads=4, spt=17
+#   ata0-slave:  type=disk, mode=flat, path=20M.sample, cylinders=615, heads=4, spt=17
+#   ata1-master: type=disk, mode=flat, path=30M.sample, cylinders=615, heads=6, spt=17
+#   ata1-slave:  type=disk, mode=flat, path=46M.sample, cylinders=940, heads=6, spt=17
+#   ata2-master: type=disk, mode=flat, path=62M.sample, cylinders=940, heads=8, spt=17
+#   ata2-slave:  type=disk, mode=flat, path=112M.sample, cylinders=900, heads=15, spt=17
+#   ata3-master: type=disk, mode=flat, path=483M.sample, cylinders=1024, heads=15, spt=63
+#   ata3-slave:  type=cdrom, path=iso.sample, status=inserted
+#=======================================================================
+ata0-master: type=cdrom, path="image.iso", status=inserted
+#ata0-master: type=disk, mode=flat, path="30M.sample", cylinders=615, heads=6, spt=17
+#ata0-slave: type=cdrom, path=D:, status=inserted
+#ata0-slave: type=cdrom, path=/dev/cdrom, status=inserted
+#ata0-slave: type=cdrom, path="drive", status=inserted
+#ata0-slave: type=cdrom, path=/dev/rcd0d, status=inserted
+#=======================================================================
+# BOOT:
+# This defines your boot drive.
+# You can either boot from 'floppy', 'disk' or 'cdrom'
+# legacy 'a' and 'c' are also supported
+# Examples:
+#   boot: floppy
+#   boot: disk
+#   boot: cdrom
+#   boot: c
+#   boot: a
+#=======================================================================
+boot: cdrom
+#boot: disk
+#=======================================================================
+# IPS:
+# Emulated Instructions Per Second.  This is the number of IPS that bochs
+# is capable of running on your machine.  Read the note in config.h
+# on how to find this.  Make sure to recompile after.
+#
+# IPS is used to calibrate many time-dependent events within the bochs
+# simulation.  For example, changing IPS affects the frequency of VGA
+# updates, the duration of time before a key starts to autorepeat, and
+# the measurement of BogoMips and other benchmarks.
+#
+# Examples:
+# Machine                                         Mips
+# ________________________________________________________________
+# 650Mhz Athlon K-7 with Linux 2.4.4/egcs-2.91.66 2 to 2.5 Mips
+# 400Mhz Pentium II with Linux 2.0.36/egcs-1.0.3  1 to 1.8 Mips
+# 166Mhz 64bit Sparc with Solaris 2.x             approx 0.75 Mips
+# 200Mhz Pentium with Linux 2.x                   approx 0.5 Mips
+#
+#=======================================================================
+ips: 2500000
+#=======================================================================
+# CLOCK:
+# This defines the parameters of the clock inside Bochs:
+#
+#  SYNC:
+#  TO BE COMPLETED (see Greg explaination in bug #536329)
+#
+#  TIME0:
+#  Specifies the start (boot) time of the virtual machine. Use a time
+#  value as returned by the time(2) system call. If no time0 value is
+#  set or if time0 equal to 1 (special case) or if time0 equal 'local',
+#  the simulation will be started at the current local host time.
+#  If time0 equal to 2 (special case) or if time0 equal 'utc',
+#  the simulation will be started at the current utc time.
+#
+# Syntax:
+#  clock: sync=[none|slowdown|realtime], time0=[timeValue|local|utc]
+#
+# Example:
+#   clock: sync=none,     time0=local       # Now (localtime)
+#   clock: sync=slowdown, time0=315529200   # Tue Jan  1 00:00:00 1980
+#   clock: sync=none,     time0=631148400   # Mon Jan  1 00:00:00 1990
+#   clock: sync=realtime, time0=938581955   # Wed Sep 29 07:12:35 1999
+#   clock: sync=realtime, time0=946681200   # Sat Jan  1 00:00:00 2000
+#   clock: sync=none,     time0=1           # Now (localtime)
+#   clock: sync=none,     time0=utc         # Now (utc/gmt)
+#
+# Default value are sync=none, time0=local
+#=======================================================================
+clock: sync=none, time0=local
+#=======================================================================
+# FLOPPY_BOOTSIG_CHECK: disabled=[0|1]
+# Enables or disables the 0xaa55 signature check on boot floppies
+# Defaults to disabled=0
+# Examples:
+#   floppy_bootsig_check: disabled=0
+#   floppy_bootsig_check: disabled=1
+#=======================================================================
+#floppy_bootsig_check: disabled=1
+floppy_bootsig_check: disabled=1
+#=======================================================================
+# LOG:
+# Give the path of the log file you'd like Bochs debug and misc. verbage
+# to be written to.  If you really don't want it, make it /dev/null. :^(
+#
+# Examples:
+#   log: ./bochs.out
+#   log: /dev/tty
+#=======================================================================
+#log: /dev/null
+log: bochsout.txt
+#=======================================================================
+# LOGPREFIX:
+# This handles the format of the string prepended to each log line.
+# You may use those special tokens :
+#   %t : 11 decimal digits timer tick
+#   %i : 8 hexadecimal digits of cpu0 current eip
+#   %e : 1 character event type ('i'nfo, 'd'ebug, 'p'anic, 'e'rror)
+#   %d : 5 characters string of the device, between brackets
+#
+# Default : %t%e%d
+# Examples:
+#   logprefix: %t-%e-@%i-%d
+#   logprefix: %i%e%d
+#=======================================================================
+#logprefix: %t%e%d
+#=======================================================================
+# LOG CONTROLS
+#
+# Bochs now has four severity levels for event logging.
+#   panic: cannot proceed.  If you choose to continue after a panic,
+#          don't be surprised if you get strange behavior or crashes.
+#   error: something went wrong, but it is probably safe to continue the
+#          simulation.
+#   info: interesting or useful messages.
+#   debug: messages useful only when debugging the code.  This may
+#          spit out thousands per second.
+#
+# For events of each level, you can choose to crash, report, or ignore.
+# TODO: allow choice based on the facility: e.g. crash on panics from
+#       everything except the cdrom, and only report those.
+#
+# If you are experiencing many panics, it can be helpful to change
+# the panic action to report instead of fatal.  However, be aware
+# that anything executed after a panic is uncharted territory and can
+# cause bochs to become unstable.  The panic is a "graceful exit," so
+# if you disable it you may get a spectacular disaster instead.
+#=======================================================================
+panic: action=report
+error: action=report
+info: action=report
+debug: action=ignore
+#pass: action=fatal
+#=======================================================================
+# DEBUGGER_LOG:
+# Give the path of the log file you'd like Bochs to log debugger output.
+# If you really don't want it, make it /dev/null or '-'. :^(
+#
+# Examples:
+#   debugger_log: ./debugger.out
+#=======================================================================
+#debugger_log: /dev/null
+#debugger_log: debugger.out
+debugger_log: -
+#=======================================================================
+# COM1:
+# This defines a serial port (UART type 16550A). You can specify a device
+# to use as com1. This can be a real serial line, or a pty.  To use a pty
+# (under X/Unix), create two windows (xterms, usually).  One of them will
+# run bochs, and the other will act as com1. Find out the tty the com1
+# window using the `tty' command, and use that as the `dev' parameter.
+# Then do `sleep 1000000' in the com1 window to keep the shell from
+# messing with things, and run bochs in the other window.  Serial I/O to
+# com1 (port 0x3f8) will all go to the other window.
+#=======================================================================
+#com1: enabled=1, dev=/dev/ttyp9
+#=======================================================================
+# PARPORT1:
+# This defines a parallel (printer) port. When turned on and an output file is
+# defined the emulated printer port sends characters printed by the guest OS
+# into the output file. On some platforms a device filename can be used to
+# send the data to the real parallel port (e.g. "/dev/lp0" on Linux, "lpt1" on
+# win32 platforms).
+#
+# Examples:
+#   parport1: enabled=1, file="parport.out"
+#   parport1: enabled=1, file="/dev/lp0"
+#   parport1: enabled=0
+#=======================================================================
+parport1: enabled=1, file="parport.out"
+#=======================================================================
+# SB16:
+# This defines the SB16 sound emulation. It can have several of the
+# following properties.
+# All properties are in the format sb16: property=value
+# midi: The filename is where the midi data is sent. This can be a
+#       device or just a file if you want to record the midi data.
+# midimode:
+#      0=no data
+#      1=output to device (system dependent. midi denotes the device driver)
+#      2=SMF file output, including headers
+#      3=output the midi data stream to the file (no midi headers and no
+#        delta times, just command and data bytes)
+# wave: This is the device/file where wave output is stored
+# wavemode:
+#      0=no data
+#      1=output to device (system dependent. wave denotes the device driver)
+#      2=VOC file output, incl. headers
+#      3=output the raw wave stream to the file
+# log:  The file to write the sb16 emulator messages to.
+# loglevel:
+#      0=no log
+#      1=only midi program and bank changes
+#      2=severe errors
+#      3=all errors
+#      4=all errors plus all port accesses
+#      5=all errors and port accesses plus a lot of extra info
+# dmatimer:
+#      microseconds per second for a DMA cycle.  Make it smaller to fix
+#      non-continous sound.  750000 is usually a good value.  This needs a
+#      reasonably correct setting for IPS.
+#
+# For an example look at the next line:
+#=======================================================================
+#sb16: midimode=1, midi=/dev/midi00, wavemode=1, wave=/dev/dsp, loglevel=2, log=sb16.log, dmatimer=600000
+#=======================================================================
+# VGA_UPDATE_INTERVAL:
+# Video memory is scanned for updates and screen updated every so many
+# virtual seconds.  The default is 300000, about 3Hz.  This is generally
+# plenty.  Keep in mind that you must tweak the 'ips:' directive
+# to be as close to the number of emulated instructions-per-second
+# your workstation can do, for this to be accurate.
+#
+# Examples:
+#   vga_update_interval: 250000
+#=======================================================================
+vga_update_interval: 300000
+# using for Winstone '98 tests
+#vga_update_interval:  100000
+#=======================================================================
+# KEYBOARD_SERIAL_DELAY:
+# Approximate time in microseconds that it takes one character to
+# be transfered from the keyboard to controller over the serial path.
+# Examples:
+#   keyboard_serial_delay: 200
+#=======================================================================
+keyboard_serial_delay: 250
+#=======================================================================
+# KEYBOARD_PASTE_DELAY:
+# Approximate time in microseconds between attempts to paste
+# characters to the keyboard controller. This leaves time for the
+# guest os to deal with the flow of characters.  The ideal setting
+# depends on how your operating system processes characters.  The
+# default of 100000 usec (.1 seconds) was chosen because it works
+# consistently in Windows.
+#
+# If your OS is losing characters during a paste, increase the paste
+# delay until it stops losing characters.
+#
+# Examples:
+#   keyboard_paste_delay: 100000
+#=======================================================================
+keyboard_paste_delay: 100000
+#=======================================================================
+# FLOPPY_COMMAND_DELAY:
+# Time in microseconds to wait before completing some floppy commands
+# such as read/write/seek/etc, which normally have a delay associated.
+# I had this hardwired to 50,000 before.
+#
+# Examples:
+#   floppy_command_delay: 50000
+#=======================================================================
+floppy_command_delay: 500
+#=======================================================================
+# MOUSE:
+# This option prevents Bochs from creating mouse "events" unless a mouse
+# is  enabled. The hardware emulation itself is not disabled by this.
+# You can turn the mouse on by setting enabled to 1, or turn it off by
+# setting enabled to 0. Unless you have a particular reason for enabling
+# the mouse by default, it is recommended that you leave it off.
+# You can also toggle the mouse usage at runtime (middle mouse button on
+# X11 and SDL, F12 on Win32).
+#
+# Examples:
+#   mouse: enabled=1
+#   mouse: enabled=0
+#=======================================================================
+mouse: enabled=0
+#=======================================================================
+# private_colormap: Request that the GUI create and use it's own
+#                   non-shared colormap.  This colormap will be used
+#                   when in the bochs window.  If not enabled, a
+#                   shared colormap scheme may be used.  Not implemented
+#                   on all GUI's.
+#
+# Examples:
+#   private_colormap: enabled=1
+#   private_colormap: enabled=0
+#=======================================================================
+private_colormap: enabled=0
+#=======================================================================
+# fullscreen: ONLY IMPLEMENTED ON AMIGA
+#             Request that Bochs occupy the entire screen instead of a
+#             window.
+#
+# Examples:
+#   fullscreen: enabled=0
+#   fullscreen: enabled=1
+#=======================================================================
+#fullscreen: enabled=0
+#screenmode: name="sample"
+#=======================================================================
+# ne2k: NE2000 compatible ethernet adapter
+#
+# Examples:
+# ne2k: ioaddr=IOADDR, irq=IRQ, mac=MACADDR, ethmod=MODULE, ethdev=DEVICE, script=SCRIPT
+#
+# ioaddr, irq: You probably won't need to change ioaddr and irq, unless there
+# are IRQ conflicts.
+#
+# mac: The MAC address MUST NOT match the address of any machine on the net.
+# Also, the first byte must be an even number (bit 0 set means a multicast
+# address), and you cannot use ff:ff:ff:ff:ff:ff because that's the broadcast
+# address.  For the ethertap module, you must use fe:fd:00:00:00:01.  There may
+# be other restrictions too.  To be safe, just use the b0:c4... address.
+#
+# ethdev: The ethdev value is the name of the network interface on your host
+# platform.  On UNIX machines, you can get the name by running ifconfig.  On
+# Windows machines, you must run niclist to get the name of the ethdev.
+# Niclist source code is in misc/niclist.c and it is included in Windows
+# binary releases.
+#
+# script: The script value is optionnal, and is the name of a script that
+# is executed after bochs initialize the network interface. You can use
+# this script to configure this network interface, or enable masquerading.
+# This is mainly useful for the tun/tap devices that only exist during
+# Bochs execution. The network interface name is supplied to the script
+# as first parameter
+#=======================================================================
+# ne2k: ioaddr=0x240, irq=9, mac=fe:fd:00:00:00:01, ethmod=fbsd, ethdev=en0 #macosx
+# ne2k: ioaddr=0x240, irq=9, mac=b0:c4:20:00:00:00, ethmod=fbsd, ethdev=xl0
+# ne2k: ioaddr=0x240, irq=9, mac=b0:c4:20:00:00:00, ethmod=linux, ethdev=eth0
+# ne2k: ioaddr=0x240, irq=9, mac=b0:c4:20:00:00:01, ethmod=win32, ethdev=MYCARD
+# ne2k: ioaddr=0x240, irq=9, mac=fe:fd:00:00:00:01, ethmod=tap, ethdev=tap0
+# ne2k: ioaddr=0x240, irq=9, mac=fe:fd:00:00:00:01, ethmod=tuntap, ethdev=tun0, script=./tunconfig
+#=======================================================================
+# KEYBOARD_MAPPING:
+# This enables a remap of a physical localized keyboard to a
+# virtualized us keyboard, as the PC architecture expects.
+# If enabled, the keymap file must be specified.
+#
+# Examples:
+#   keyboard_mapping: enabled=1, map=gui/keymaps/x11-pc-de.map
+#=======================================================================
+keyboard_mapping: enabled=0, map=
+#=======================================================================
+# KEYBOARD_TYPE:
+# Type of keyboard return by a "identify keyboard" command to the
+# keyboard controler. It must be one of "xt", "at" or "mf".
+# Defaults to "mf". It should be ok for almost everybody. A known
+# exception is french macs, that do have a "at"-like keyboard.
+#
+# Examples:
+#   keyboard_type: mf
+#=======================================================================
+#keyboard_type: mf
+#=======================================================================
+# USER_SHORTCUT:
+# This defines the keyboard shortcut to be sent when you press the "user"
+# button in the headerbar. The shortcut string can be a combination of
+# these key names: "alt", "bksp", "ctrl", "del", "esc", "f1", "f4", "tab"
+# and "win". Up to 3 keys can be pressed at a time.
+#
+# Example:
+#   user_shortcut: keys=ctrlaltdel
+#=======================================================================
+#user_shortcut: keys=ctrlaltdel
+#=======================================================================
+# other stuff
+#=======================================================================
+#magic_break: enabled=1
+#cmosimage: cmos.img
+#load32bitOSImage: os=nullkernel, path=../kernel.img, iolog=../vga_io.log
+#load32bitOSImage: os=linux, path=../linux.img, iolog=../vga_io.log, initrd=../initrd.img
+#i440fxsupport: enabled=1
+usb1: enabled=1, ioaddr=0xFF80, irq=10
+#text_snapshot_check: enable
+#=======================================================================
+# for Macintosh, use the style of pathnames in the following
+# examples.
+#
+# vgaromimage: :bios:VGABIOS-elpin-2.40
+# romimage: file=:bios:BIOS-bochs-latest, address=0xf0000
+# floppya: 1_44=[fd:], status=inserted
+#=======================================================================
+#=======================================================================
+#
+# The following directives are DEPRECATED
+# Please convert them to the new syntax  or remove them
+#
+#=======================================================================
+#=======================================================================
+#
+# The DISKC option is deprecated. Use ATA* options instead.
+#
+# DISKC: file=, cyl=, heads=, spt=
+# Point this at a hard disk image file.  To create
+# a hard disk image, try running bximage.  It will help you choose the
+# size and then suggest a diskc line that works with it.
+#
+# In UNIX it may be possible to use a raw device as a Bochs hard disk,
+# but WE DON'T RECOMMEND IT.  In Windows there is no easy way.
+#
+# Examples:
+#   diskc: file=10M.sample, cyl=306, heads=4, spt=17
+#   diskc: file=20M.sample, cyl=615, heads=4, spt=17
+#   diskc: file=30M.sample, cyl=615, heads=6, spt=17
+#   diskc: file=46M.sample, cyl=940, heads=6, spt=17
+#   diskc: file=62M.sample, cyl=940, heads=8, spt=17
+#   diskc: file=112M.sample, cyl=900, heads=15, spt=17
+#   diskc: file=483M.sample, cyl=1024, heads=15, spt=63
+#=======================================================================
+#diskc: file="30M.sample", cyl=615, heads=6, spt=17
+#=======================================================================
+#
+# The DISKD option is deprecated. Use ATA* options instead.
+#
+# DISKD:
+# See DISKC above for syntax
+#
+# NOTE: diskd and cdromd must not be used together!
+#=======================================================================
+#diskd: file="diskd.img", cyl=615, heads=6, spt=17
+#=======================================================================
+#
+# The CDROMD option is deprecated. Use ATA* options instead.
+#
+# CDROMD:
+#
+# cdromd: dev=/dev/cdrom, status=inserted
+# cdromd: dev=/dev/cdrom, status=ejected
+# cdromd: dev=e:, status=ejected
+#
+# In windows, the drive letter + colon notation should be used for cdroms.
+# Depending on versions of windows and drivers, you may only be able to
+# access the "first" cdrom in the system.  On MacOSX, use path="drive"
+# to access the physical drive.
+#
+# NOTE: diskd and cdromd must not be used together!
+#=======================================================================
+#cdromd: dev=D:, status=inserted
+#cdromd: dev=/dev/cdrom, status=inserted
+#cdromd: dev="drive", status=inserted
+#=======================================================================
+#
+# The TIME0 directive is DEPRECATED. Use the CLOCK directive instead
+#
+# TIME0:
+# Specifies the start (boot) time of the virtual machine. Use a time
+# value as returned by the time(2) system call. If no time0 value is
+# set or if time0 equal to 1 (special case), the simulation will be
+# started at the current time of the host.
+#
+# Examples:
+#   time0: 1           # Now
+#   time0: 315529200   # Tue Jan  1 00:00:00 1980
+#   time0: 631148400   # Mon Jan  1 00:00:00 1990
+#   time0: 938581955   # Wed Sep 29 07:12:35 1999
+#   time0: 946681200   # Sat Jan  1 00:00:00 2000
+#=======================================================================
+#time0: 938581955
+#=======================================================================
+#
+# The PIT directive is DEPRECATED. Use the CLOCK directive instead
+#
+# PIT:
+# The PIT is the programmable interval timer.  It has an option that tries to
+# keep the PIT in sync with real time.  This feature is still experimental,
+# but it may be useful if you want to prevent Bochs from running too fast, for
+# example a DOS video game.  Be aware that with the realtime pit option, your
+# simulation will not be repeatable; this can a problem if you are debugging.
+#=======================================================================
+#pit: realtime=1
+#=======================================================================
+# NEWHARDDRIVESUPPORT: enabled=[0|1]
+# The old harddrive code is not maintened any more.
+# Default value is enabled=1
+#=======================================================================
+#newharddrivesupport: enabled=1

 /tags/0.2.0.2/kernel/contrib/conf/HelenOS.amd64.simics
 ,0 → 1,57
+#
+# Simics 3.0 AMD64 configuration
+#
+$num_cpus      = 2
+$cpu_class     = "x86-hammer"
+$freq_mhz      = 50
+add-directory "%simics%/targets/x86-440bx/images"
+import-isa-components
+import-pci-components
+import-std-components
+import-x86-components
+$system = (create-x86-apic-system memory_megs = 256
+                                  rtc_time = "2006-03-12 10:00:00 UTC"
+                                  break_on_reboot = 1
+                                  bios = "rombios-2.65.2.3")
+$count = 0
+$create_command = ("create-" + $cpu_class + "-cpu")
+while $count < $num_cpus {
+    $cpu[$count] = ($create_command cpu_frequency = $freq_mhz)
+    $system.connect ("cpu" + $count) $cpu[$count]
+    $count += 1
+}
+$nb = (create-north-bridge-443bx-agp)
+$vga = (create-agp-voodoo3)
+$nb.connect agp-slot0 $vga
+$sb = (create-south-bridge-piix4)
+$sio = (create-std-super-io)
+$cdrom = (create-std-ide-cdrom)
+$console = (create-std-graphics-console)
+$console.connect mouse $sio mse-console
+$console.connect keyboard $sio kbd-console
+$console.connect $vga
+$system.connect chipset $nb
+$system.connect interrupt $sb
+$system.connect reset $sio
+$nb.connect pci-slot7 $sb
+$sb.connect $sio
+$sb.connect ide0-slave $cdrom
+instantiate-components
+run-python-file "%simics%/home/scripts/cdrom_bootloader.py"
+@install_cdrom_bootloader((conf.cpu0,))
+new-file-cdrom "image.iso" image
+cd0.insert image

 /tags/0.2.0.2/kernel/contrib/conf/simics.conf
 ,0 → 1,25
+# Test machine features
+#  - Standard PC system
+#  - 256 Mb memory
+#  - 40 MHz processor(s)
+#  - AM79C960 NIC (ISA Lance)
+#  - Voodoo3 PCI graphics device
+@num_processors = 2
+#@num_processors = 1
+@if not "cpu_class"               in dir(): cpu_class = "x86-hammer"
+@if not "clock_freq_mhz"          in dir(): clock_freq_mhz = 40
+@if not "memory_megs"             in dir(): memory_megs = 256
+@if not "cdrom_image"             in dir(): cdrom_image = "image.iso"
+@if not "use_voodoo3_pci"         in dir(): use_voodoo3_pci = 1
+@if not "use_voodoo3_agp"         in dir(): use_voodoo3_agp = 0
+run-command-file ../x86-test-machine/pc-common.simics
+run-python-file ../scripts/cdrom_bootloader.py
+@install_cdrom_bootloader((conf.cpu0,))
+@if cdrom_image != None:
+    eval_cli_line("new-file-cdrom %s image" % cdrom_image)
+    eval_cli_line("cd0.insert image")

 /tags/0.2.0.2/kernel/contrib/conf/HelenOS.ppc32.simics
 ,0 → 1,32
+#
+# Simics 3.0 PPC32 simple configuration
+#
+$cpu_class     = "ppc750"
+$freq_mhz      = 50
+$image         = "image.boot"
+$image_offset  = -0x7a000000
+add-directory "%simics%/targets/ppc64-simple/images"
+import-std-components
+import-ppc-simple-components
+$system = (create-ppc-simple cpu_class = $cpu_class
+                             cpu_frequency = $freq_mhz
+                             memory_megs = 256)
+$cpu = ($system.get-component-object "cpu")
+$system.connect uart0 (create-std-text-console)
+instantiate-components
+$start = (load-binary $image $image_offset)
+$cpu->msr = ($cpu->msr | (1 << 13) | (1 << 5) | (1 << 4))
+$cpu.set-pc $start - $image_offset
+@itlb = conf.cpu0.itlb
+@itlb[0] = [[0, 0, 0, 0, 0], [0, 0, 0, 0, 0]]
+@conf.cpu0.itlb = itlb

 /tags/0.2.0.2/kernel/contrib/conf/spmips.conf
 ,0 → 1,263
+OBJECT cpu0 TYPE mips-4kc {
+    freq-mhz: 10
+    queue: cpu0
+    physical-memory: phys-mem0
+}
+OBJECT phys-mem0 TYPE memory-space {
+    map: ((0x18000020,      pic0,         0,         0x20,          1),
+              (0x18000021,      pic0,         0,         0x21,          1),
+              (0x180000a0,      pic0,         0,         0xa0,          1),
+              (0x180000a1,      pic0,         0,         0xa1,          1),
+              (0x180004d0,      pic0,         0,        0x4d0,          1),
+              (0x180004d1,      pic0,         0,        0x4d1,          1),
+              (0x18000070,      rtc0,         0,            0,          1),
+              (0x18000071,      rtc0,         0,            1,          1),
+              (0x180003f8,      tty0,         0,            0,          1),
+              (0x180003f9,      tty0,         0,            1,          1),
+              (0x180003fa,      tty0,         0,            2,          1),
+              (0x180003fb,      tty0,         0,            3,          1),
+              (0x180003fc,      tty0,         0,            4,          1),
+              (0x180003fd,      tty0,         0,            5,          1),
+              (0x180003fe,      tty0,         0,            6,          1),
+              (0x180003ff,      tty0,         0,            7,          1),
+              (0x1c000000,      hfs0,         0,            0,         16),
+          (0x01000000,  initmem0,     0,        0,  0x100000))
+}
+OBJECT cbus-space TYPE memory-space {
+    map: ((0x1f000000,    malta0,         0,            0,   0xc00000),
+              (0x1fc00000,      rom0,         0,            0,   0x400000))
+}
+OBJECT memory0 TYPE ram {
+    image: memory0-image
+}
+OBJECT memory0-image TYPE image {
+    queue: cpu0
+    size: 0x08000000
+}
+OBJECT initmem0 TYPE ram {
+    image: initmem0-image
+}
+OBJECT initmem0-image TYPE image {
+    queue: cpu0
+    size: 0x100000
+    files: (("../../../uspace/init/init", "ro", 0,0))
+}
+OBJECT rom0 TYPE rom {
+    image: rom0-image
+}
+OBJECT rom0-image TYPE image {
+    queue: cpu0
+    size: 0x00400000
+}
+OBJECT tty0 TYPE NS16550 {
+    irq-dev: pic0
+    irq-level: 4
+    queue: cpu0
+    console: con0
+    recorder: rec0
+}
+OBJECT pic0 TYPE i8259x2 {
+    queue: cpu0
+        irq-dev: gt64120-0
+        # It seems like Linux expects the master 8259 to have VBA 0.
+        # Maybe that would be set up by YAMON?
+        vba: (0, 1)
+}
+OBJECT con0 TYPE xterm-console {
+        title: "mips32-test-machine"
+        bg-color: "black"
+    fg-color: "green"
+    queue: cpu0
+    device: tty0
+    output-timeout: 120
+}
+OBJECT rtc0 TYPE DS12887 {
+    irq-dev: pic0
+    irq-level: 8
+    queue: cpu0
+}
+OBJECT malta0 TYPE malta {
+    console: display0
+}
+OBJECT display0 TYPE xterm-console {
+        title: "MALTA Display"
+    bg-color: "black"
+    fg-color: "red"
+    width: 8
+    height: 1
+    scrollbar: 0
+    x11-font: "-*-*-*-r-*-*-*-240-*-*-m-*-*-*"
+    win32-font: "Lucida Console:Bold:48"
+    queue: cpu0
+    output-timeout: 120
+}
+# PCI buses
+OBJECT pci-bus0 TYPE pci-bus {
+    queue: cpu0
+        bridge: gt64120-0-pci-0-0
+        interrupt: gt64120-0-pci-0-0
+        conf-space: pci-bus0-conf-space
+        memory-space: pci-bus0-memory-space
+        io-space: pci-bus0-io-space
+        pci-devices: ((0, 0, gt64120-0-pci-0-0),
+                      (0, 1, gt64120-0-pci-0-1))
+}
+OBJECT pci-bus0-conf-space TYPE memory-space {
+        queue: cpu0
+}
+OBJECT pci-bus1-conf-space TYPE memory-space {
+        queue: cpu0
+}
+OBJECT pci-bus0-memory-space TYPE memory-space {
+        queue: cpu0
+}
+OBJECT pci-bus1 TYPE pci-bus {
+    queue: cpu0
+        bridge: gt64120-0-pci-1-0
+        interrupt: gt64120-0-pci-1-0
+        conf-space: pci-bus1-conf-space
+        memory-space: pci-bus1-memory-space
+        io-space: pci-bus1-io-space
+        pci-devices: ((0, 0, gt64120-0-pci-1-0),
+                      (0, 1, gt64120-0-pci-1-1))
+}
+OBJECT pci-bus1-memory-space TYPE memory-space {
+        queue: cpu0
+}
+OBJECT pci-bus0-io-space TYPE memory-space {
+        queue: cpu0
+}
+OBJECT pci-bus1-io-space TYPE memory-space {
+        queue: cpu0
+}
+# GT64120 chipset
+OBJECT gt64120-0 TYPE GT64120 {
+        queue: cpu0
+        cpu-mem: phys-mem0
+        pci-0-0: gt64120-0-pci-0-0
+        pci-0-1: gt64120-0-pci-0-1
+        pci-1-0: gt64120-0-pci-1-0
+        pci-1-1: gt64120-0-pci-1-1
+        scs0: memory0
+        cs3: cbus-space
+        bootcs: cbus-space
+        pci-0-conf: pci-bus0-conf-space
+        pci-0-io: pci-bus0-io-space
+        pci-0-memory: pci-bus0-memory-space
+        pci-1-conf: pci-bus1-conf-space
+        pci-1-io: pci-bus1-io-space
+        pci-1-memory: pci-bus1-memory-space
+        irq-dev: cpu0
+        irq-level: 2
+        # Little endian
+        cpu_interface_configuration: 0x00041000
+        # Map 128MB RAM.
+        scs10-high-decode-address: 0x40
+        scs0-low-decode-address: 0x0
+        scs0-high-decode-address: 0x7f
+        # Map the internal registers at 0x1be00000.
+        internal-space-decode: 0xdf
+        # Disable host-PCI mappings
+        pci-0-io-high-decode-address:       0
+        pci-0-io-low-decode-address:        1
+        pci-0-io-remap:                     1
+        pci-0-memory-0-high-decode-address: 0
+        pci-0-memory-0-low-decode-address:  1
+        pci-0-memory-0-remap:               1
+        pci-0-memory-1-high-decode-address: 0
+        pci-0-memory-1-low-decode-address:  1
+        pci-0-memory-1-remap:               1
+        pci-1-io-high-decode-address:       0
+        pci-1-io-low-decode-address:        1
+        pci-1-io-remap:                     1
+        pci-1-memory-0-high-decode-address: 0
+        pci-1-memory-0-low-decode-address:  1
+        pci-1-memory-0-remap:               1
+        pci-1-memory-1-high-decode-address: 0
+        pci-1-memory-1-low-decode-address:  1
+        pci-1-memory-1-remap:               1
+        # Disable PCI-host mappings
+        pci-0-base-address-registers-enable: 0x1ff
+        pci-1-base-address-registers-enable: 0x1ff
+}
+OBJECT gt64120-0-pci-0-0 TYPE GT64120-pci {
+        queue: cpu0
+        gt64120: gt64120-0
+        bridge-num: 0
+        function-num: 0
+        pci-bus: pci-bus0
+}
+OBJECT gt64120-0-pci-0-1 TYPE GT64120-pci {
+        queue: cpu0
+        gt64120: gt64120-0
+        bridge-num: 0
+        function-num: 1
+        pci-bus: pci-bus0
+}
+OBJECT gt64120-0-pci-1-0 TYPE GT64120-pci {
+        queue: cpu0
+        gt64120: gt64120-0
+        bridge-num: 1
+        function-num: 0
+        pci-bus: pci-bus1
+}
+OBJECT gt64120-0-pci-1-1 TYPE GT64120-pci {
+        queue: cpu0
+        gt64120: gt64120-0
+        bridge-num: 1
+        function-num: 1
+        pci-bus: pci-bus1
+}
+# Various
+OBJECT rec0 TYPE recorder {
+}
+OBJECT hfs0 TYPE hostfs {
+}
+OBJECT sim TYPE sim {
+    handle-outside-memory: 1
+}

 /tags/0.2.0.2/kernel/contrib/conf/SPMIPS.simics
 ,0 → 1,14
+run-python-file ../scripts/extrapath.py
+add-directory ../../import/mips
+read-configuration spmips.conf
+set-pc (cpu0.load-binary ../../../SPARTAN/kernel.bin)
+# Setup uart to use 8 bits
+@conf.tty0.lcr = 0xf;
+# Set date
+rtc0.set-date-time 2001 01 01 01 01 01
+@century = 20
+@ignore=SIM_set_attribute_idx(conf.rtc0, "nvram", 0x32, century)

 /tags/0.2.0.2/kernel/contrib/conf/vmware.conf
 ,0 → 1,15
+#!/opt/vmware/bin/vmware
+config.version = "8"
+virtualHW.version = "4"
+scsi0.present = "FALSE"
+memsize = "96"
+ide0:0.present = "FALSE"
+ide1:0.present = "FALSE"
+floppy0.startConnected = "TRUE"
+floppy0.fileType = "file"
+floppy0.fileName = "image.bin"
+sound.present = "FALSE"
+displayName = "HelenOS"
+guestOS = "other"
+nvram = "HelenOS.nvram"
+isolation.tools.hgfs.disable = "TRUE"

 /tags/0.2.0.2/kernel/contrib/toolchain/toolchain.ia64.sh
 ,0 → 1,93
+#!/bin/bash
+# Cross-Compiler Toolchain for ${PLATFORM}
+#  by Martin Decky <martin@decky.cz>
+#
+#  GPL'ed, copyleft
+#
+check_error() {
+    if [ "$1" -ne "0" ]; then
+    echo
+    echo "Script failed: $2"
+    exit
+    fi
+}
+BINUTILS_VERSION="2.16.1"
+GCC_VERSION="4.1.1"
+INCLUDES="ia64-pc-gnu-linux_includes.tar.bz2"
+BINUTILS="binutils-${BINUTILS_VERSION}.tar.gz"
+GCC="gcc-core-${GCC_VERSION}.tar.bz2"
+INCLUDES_SOURCE="http://download.decky.cz/"
+BINUTILS_SOURCE="ftp://ftp.gnu.org/gnu/binutils/"
+GCC_SOURCE="ftp://ftp.gnu.org/gnu/gcc/gcc-${GCC_VERSION}/"
+PLATFORM="ia64"
+WORKDIR=`pwd`
+TARGET="${PLATFORM}-pc-linux-gnu"
+HOST="i686-pc-linux-gnu"
+PREFIX="/usr/local/${PLATFORM}"
+INCLUDESDIR="${WORKDIR}/include"
+BINUTILSDIR="${WORKDIR}/binutils-${BINUTILS_VERSION}"
+GCCDIR="${WORKDIR}/gcc-${GCC_VERSION}"
+OBJDIR="${WORKDIR}/gcc-obj"
+echo ">>> Downloading tarballs"
+if [ ! -f "${INCLUDES}" ]; then
+    wget -c "${INCLUDES_SOURCE}${INCLUDES}"
+    check_error $? "Error downloading includes."
+fi
+if [ ! -f "${BINUTILS}" ]; then
+    wget -c "${BINUTILS_SOURCE}${BINUTILS}"
+    check_error $? "Error downloading binutils."
+fi
+if [ ! -f "${GCC}" ]; then
+    wget -c "${GCC_SOURCE}${GCC}"
+    check_error $? "Error downloading GCC."
+fi
+echo ">>> Creating destionation directory"
+if [ ! -d "${PREFIX}" ]; then
+    mkdir -p "${PREFIX}"
+    test -d "${PREFIX}"
+    check_error $? "Unable to create ${PREFIX}."
+fi
+echo ">>> Creating GCC work directory"
+if [ ! -d "${OBJDIR}" ]; then
+    mkdir -p "${OBJDIR}"
+    test -d "${OBJDIR}"
+    check_error $? "Unable to create ${OBJDIR}."
+fi
+echo ">>> Unpacking tarballs"
+tar -xvjf "${INCLUDES}"
+check_error $? "Error unpacking includes."
+tar -xvzf "${BINUTILS}"
+check_error $? "Error unpacking binutils."
+tar -xvjf "${GCC}"
+check_error $? "Error unpacking GCC."
+echo ">>> Compiling and installing binutils"
+cd "${BINUTILSDIR}"
+check_error $? "Change directory failed."
+./configure "--host=${HOST}" "--target=${TARGET}" "--prefix=${PREFIX}" "--program-prefix=${TARGET}-" "--disable-nls"
+check_error $? "Error configuring binutils."
+make all install
+check_error $? "Error compiling/installing binutils."
+echo ">>> Compiling and installing GCC"
+cd "${OBJDIR}"
+check_error $? "Change directory failed."
+"${GCCDIR}/configure" "--host=${HOST}" "--target=${TARGET}" "--prefix=${PREFIX}" "--program-prefix=${TARGET}-" --with-gnu-as --with-gnu-ld --disable-nls --disable-threads --enable-languages=c --disable-multilib --disable-libgcj "--with-headers=${INCLUDESDIR}" --disable-shared
+check_error $? "Error configuring GCC."
+PATH="${PATH}:${PREFIX}/bin" make all-gcc install-gcc
+check_error $? "Error compiling/installing GCC."
+echo
+echo ">>> Cross-compiler for ${TARGET} installed."
 Property changes:
 Added: svn:executable
 +*
 \ No newline at end of property

 /tags/0.2.0.2/kernel/contrib/toolchain/toolchain.ppc32.sh
 ,0 → 1,84
+#!/bin/bash
+# Cross-Compiler Toolchain for ${PLATFORM}
+#  by Martin Decky <martin@decky.cz>
+#
+#  GPL'ed, copyleft
+#
+check_error() {
+    if [ "$1" -ne "0" ]; then
+    echo
+    echo "Script failed: $2"
+    exit
+    fi
+}
+BINUTILS_VERSION="2.16.1"
+GCC_VERSION="4.1.1"
+BINUTILS="binutils-${BINUTILS_VERSION}.tar.gz"
+GCC="gcc-core-${GCC_VERSION}.tar.bz2"
+BINUTILS_SOURCE="ftp://ftp.gnu.org/gnu/binutils/"
+GCC_SOURCE="ftp://ftp.gnu.org/gnu/gcc/gcc-${GCC_VERSION}/"
+PLATFORM="ppc"
+WORKDIR=`pwd`
+TARGET="${PLATFORM}-linux-gnu"
+HOST="i686-pc-linux-gnu"
+PREFIX="/usr/local/${PLATFORM}"
+BINUTILSDIR="${WORKDIR}/binutils-${BINUTILS_VERSION}"
+GCCDIR="${WORKDIR}/gcc-${GCC_VERSION}"
+OBJDIR="${WORKDIR}/gcc-obj"
+echo ">>> Downloading tarballs"
+if [ ! -f "${BINUTILS}" ]; then
+    wget -c "${BINUTILS_SOURCE}${BINUTILS}"
+    check_error $? "Error downloading binutils."
+fi
+if [ ! -f "${GCC}" ]; then
+    wget -c "${GCC_SOURCE}${GCC}"
+    check_error $? "Error downloading GCC."
+fi
+echo ">>> Creating destionation directory"
+if [ ! -d "${PREFIX}" ]; then
+    mkdir -p "${PREFIX}"
+    test -d "${PREFIX}"
+    check_error $? "Unable to create ${PREFIX}."
+fi
+echo ">>> Creating GCC work directory"
+if [ ! -d "${OBJDIR}" ]; then
+    mkdir -p "${OBJDIR}"
+    test -d "${OBJDIR}"
+    check_error $? "Unable to create ${OBJDIR}."
+fi
+echo ">>> Unpacking tarballs"
+tar -xvzf "${BINUTILS}"
+check_error $? "Error unpacking binutils."
+tar -xvjf "${GCC}"
+check_error $? "Error unpacking GCC."
+echo ">>> Compiling and installing binutils"
+cd "${BINUTILSDIR}"
+check_error $? "Change directory failed."
+./configure "--host=${HOST}" "--target=${TARGET}" "--prefix=${PREFIX}" "--program-prefix=${TARGET}-" "--disable-nls"
+check_error $? "Error configuring binutils."
+make all install
+check_error $? "Error compiling/installing binutils."
+echo ">>> Compiling and installing GCC"
+cd "${OBJDIR}"
+check_error $? "Change directory failed."
+"${GCCDIR}/configure" "--host=${HOST}" "--target=${TARGET}" "--prefix=${PREFIX}" "--program-prefix=${TARGET}-" --with-gnu-as --with-gnu-ld --disable-nls --disable-threads --enable-languages=c --disable-multilib --disable-libgcj --without-headers --disable-shared
+check_error $? "Error configuring GCC."
+PATH="${PATH}:${PREFIX}/bin" make all-gcc install-gcc
+check_error $? "Error compiling/installing GCC."
+echo
+echo ">>> Cross-compiler for ${TARGET} installed."
 Property changes:
 Added: svn:executable
 +*
 \ No newline at end of property

 /tags/0.2.0.2/kernel/contrib/toolchain/toolchain.amd64.sh
 ,0 → 1,84
+#!/bin/bash
+# Cross-Compiler Toolchain for ${PLATFORM}
+#  by Martin Decky <martin@decky.cz>
+#
+#  GPL'ed, copyleft
+#
+check_error() {
+    if [ "$1" -ne "0" ]; then
+    echo
+    echo "Script failed: $2"
+    exit
+    fi
+}
+BINUTILS_VERSION="2.16.1"
+GCC_VERSION="4.1.1"
+BINUTILS="binutils-${BINUTILS_VERSION}.tar.gz"
+GCC="gcc-core-${GCC_VERSION}.tar.bz2"
+BINUTILS_SOURCE="ftp://ftp.gnu.org/gnu/binutils/"
+GCC_SOURCE="ftp://ftp.gnu.org/gnu/gcc/gcc-${GCC_VERSION}/"
+PLATFORM="amd64"
+WORKDIR=`pwd`
+TARGET="${PLATFORM}-linux-gnu"
+HOST="i686-pc-linux-gnu"
+PREFIX="/usr/local/${PLATFORM}"
+BINUTILSDIR="${WORKDIR}/binutils-${BINUTILS_VERSION}"
+GCCDIR="${WORKDIR}/gcc-${GCC_VERSION}"
+OBJDIR="${WORKDIR}/gcc-obj"
+echo ">>> Downloading tarballs"
+if [ ! -f "${BINUTILS}" ]; then
+    wget -c "${BINUTILS_SOURCE}${BINUTILS}"
+    check_error $? "Error downloading binutils."
+fi
+if [ ! -f "${GCC}" ]; then
+    wget -c "${GCC_SOURCE}${GCC}"
+    check_error $? "Error downloading GCC."
+fi
+echo ">>> Creating destionation directory"
+if [ ! -d "${PREFIX}" ]; then
+    mkdir -p "${PREFIX}"
+    test -d "${PREFIX}"
+    check_error $? "Unable to create ${PREFIX}."
+fi
+echo ">>> Creating GCC work directory"
+if [ ! -d "${OBJDIR}" ]; then
+    mkdir -p "${OBJDIR}"
+    test -d "${OBJDIR}"
+    check_error $? "Unable to create ${OBJDIR}."
+fi
+echo ">>> Unpacking tarballs"
+tar -xvzf "${BINUTILS}"
+check_error $? "Error unpacking binutils."
+tar -xvjf "${GCC}"
+check_error $? "Error unpacking GCC."
+echo ">>> Compiling and installing binutils"
+cd "${BINUTILSDIR}"
+check_error $? "Change directory failed."
+./configure "--host=${HOST}" "--target=${TARGET}" "--prefix=${PREFIX}" "--program-prefix=${TARGET}-" "--disable-nls"
+check_error $? "Error configuring binutils."
+make all install
+check_error $? "Error compiling/installing binutils."
+echo ">>> Compiling and installing GCC"
+cd "${OBJDIR}"
+check_error $? "Change directory failed."
+"${GCCDIR}/configure" "--host=${HOST}" "--target=${TARGET}" "--prefix=${PREFIX}" "--program-prefix=${TARGET}-" --with-gnu-as --with-gnu-ld --disable-nls --disable-threads --enable-languages=c --disable-multilib --disable-libgcj --without-headers --disable-shared
+check_error $? "Error configuring GCC."
+PATH="${PATH}:${PREFIX}/bin" make all-gcc install-gcc
+check_error $? "Error compiling/installing GCC."
+echo
+echo ">>> Cross-compiler for ${TARGET} installed."
 Property changes:
 Added: svn:executable
 +*
 \ No newline at end of property

 /tags/0.2.0.2/kernel/contrib/toolchain/toolchain.ppc64.sh
 ,0 → 1,84
+#!/bin/bash
+# Cross-Compiler Toolchain for ${PLATFORM}
+#  by Martin Decky <martin@decky.cz>
+#
+#  GPL'ed, copyleft
+#
+check_error() {
+    if [ "$1" -ne "0" ]; then
+    echo
+    echo "Script failed: $2"
+    exit
+    fi
+}
+BINUTILS_VERSION="2.16.1"
+GCC_VERSION="4.1.1"
+BINUTILS="binutils-${BINUTILS_VERSION}.tar.gz"
+GCC="gcc-core-${GCC_VERSION}.tar.bz2"
+BINUTILS_SOURCE="ftp://ftp.gnu.org/gnu/binutils/"
+GCC_SOURCE="ftp://ftp.gnu.org/gnu/gcc/gcc-${GCC_VERSION}/"
+PLATFORM="ppc64"
+WORKDIR=`pwd`
+TARGET="${PLATFORM}-linux-gnu"
+HOST="i686-pc-linux-gnu"
+PREFIX="/usr/local/${PLATFORM}"
+BINUTILSDIR="${WORKDIR}/binutils-${BINUTILS_VERSION}"
+GCCDIR="${WORKDIR}/gcc-${GCC_VERSION}"
+OBJDIR="${WORKDIR}/gcc-obj"
+echo ">>> Downloading tarballs"
+if [ ! -f "${BINUTILS}" ]; then
+    wget -c "${BINUTILS_SOURCE}${BINUTILS}"
+    check_error $? "Error downloading binutils."
+fi
+if [ ! -f "${GCC}" ]; then
+    wget -c "${GCC_SOURCE}${GCC}"
+    check_error $? "Error downloading GCC."
+fi
+echo ">>> Creating destionation directory"
+if [ ! -d "${PREFIX}" ]; then
+    mkdir -p "${PREFIX}"
+    test -d "${PREFIX}"
+    check_error $? "Unable to create ${PREFIX}."
+fi
+echo ">>> Creating GCC work directory"
+if [ ! -d "${OBJDIR}" ]; then
+    mkdir -p "${OBJDIR}"
+    test -d "${OBJDIR}"
+    check_error $? "Unable to create ${OBJDIR}."
+fi
+echo ">>> Unpacking tarballs"
+tar -xvzf "${BINUTILS}"
+check_error $? "Error unpacking binutils."
+tar -xvjf "${GCC}"
+check_error $? "Error unpacking GCC."
+echo ">>> Compiling and installing binutils"
+cd "${BINUTILSDIR}"
+check_error $? "Change directory failed."
+./configure "--host=${HOST}" "--target=${TARGET}" "--prefix=${PREFIX}" "--program-prefix=${TARGET}-" "--disable-nls"
+check_error $? "Error configuring binutils."
+make all install
+check_error $? "Error compiling/installing binutils."
+echo ">>> Compiling and installing GCC"
+cd "${OBJDIR}"
+check_error $? "Change directory failed."
+"${GCCDIR}/configure" "--host=${HOST}" "--target=${TARGET}" "--prefix=${PREFIX}" "--program-prefix=${TARGET}-" --with-gnu-as --with-gnu-ld --disable-nls --disable-threads --enable-languages=c --disable-multilib --disable-libgcj --without-headers --disable-shared
+check_error $? "Error configuring GCC."
+PATH="${PATH}:${PREFIX}/bin" make all-gcc install-gcc
+check_error $? "Error compiling/installing GCC."
+echo
+echo ">>> Cross-compiler for ${TARGET} installed."
 Property changes:
 Added: svn:executable
 +*
 \ No newline at end of property

 /tags/0.2.0.2/kernel/contrib/toolchain/toolchain.ia32.sh
 ,0 → 1,84
+#!/bin/bash
+# Cross-Compiler Toolchain for ${PLATFORM}
+#  by Martin Decky <martin@decky.cz>
+#
+#  GPL'ed, copyleft
+#
+check_error() {
+    if [ "$1" -ne "0" ]; then
+    echo
+    echo "Script failed: $2"
+    exit
+    fi
+}
+BINUTILS_VERSION="2.16.1"
+GCC_VERSION="4.1.1"
+BINUTILS="binutils-${BINUTILS_VERSION}.tar.gz"
+GCC="gcc-core-${GCC_VERSION}.tar.bz2"
+BINUTILS_SOURCE="ftp://ftp.gnu.org/gnu/binutils/"
+GCC_SOURCE="ftp://ftp.gnu.org/gnu/gcc/gcc-${GCC_VERSION}/"
+PLATFORM="i686"
+WORKDIR=`pwd`
+TARGET="${PLATFORM}-pc-linux-gnu"
+HOST="i686-pc-linux-gnu"
+PREFIX="/usr/local/${PLATFORM}"
+BINUTILSDIR="${WORKDIR}/binutils-${BINUTILS_VERSION}"
+GCCDIR="${WORKDIR}/gcc-${GCC_VERSION}"
+OBJDIR="${WORKDIR}/gcc-obj"
+echo ">>> Downloading tarballs"
+if [ ! -f "${BINUTILS}" ]; then
+    wget -c "${BINUTILS_SOURCE}${BINUTILS}"
+    check_error $? "Error downloading binutils."
+fi
+if [ ! -f "${GCC}" ]; then
+    wget -c "${GCC_SOURCE}${GCC}"
+    check_error $? "Error downloading GCC."
+fi
+echo ">>> Creating destionation directory"
+if [ ! -d "${PREFIX}" ]; then
+    mkdir -p "${PREFIX}"
+    test -d "${PREFIX}"
+    check_error $? "Unable to create ${PREFIX}."
+fi
+echo ">>> Creating GCC work directory"
+if [ ! -d "${OBJDIR}" ]; then
+    mkdir -p "${OBJDIR}"
+    test -d "${OBJDIR}"
+    check_error $? "Unable to create ${OBJDIR}."
+fi
+echo ">>> Unpacking tarballs"
+tar -xvzf "${BINUTILS}"
+check_error $? "Error unpacking binutils."
+tar -xvjf "${GCC}"
+check_error $? "Error unpacking GCC."
+echo ">>> Compiling and installing binutils"
+cd "${BINUTILSDIR}"
+check_error $? "Change directory failed."
+./configure "--host=${HOST}" "--target=${TARGET}" "--prefix=${PREFIX}" "--program-prefix=${TARGET}-" "--disable-nls"
+check_error $? "Error configuring binutils."
+make all install
+check_error $? "Error compiling/installing binutils."
+echo ">>> Compiling and installing GCC"
+cd "${OBJDIR}"
+check_error $? "Change directory failed."
+"${GCCDIR}/configure" "--host=${HOST}" "--target=${TARGET}" "--prefix=${PREFIX}" "--program-prefix=${TARGET}-" --with-gnu-as --with-gnu-ld --disable-nls --disable-threads --enable-languages=c --disable-multilib --disable-libgcj --without-headers --disable-shared
+check_error $? "Error configuring GCC."
+PATH="${PATH}:${PREFIX}/bin" make all-gcc install-gcc
+check_error $? "Error compiling/installing GCC."
+echo
+echo ">>> Cross-compiler for ${TARGET} installed."
 Property changes:
 Added: svn:executable
 +*
 \ No newline at end of property

 /tags/0.2.0.2/kernel/contrib/toolchain/toolchain.mipsel32.sh
 ,0 → 1,84
+#!/bin/bash
+# Cross-Compiler Toolchain for ${PLATFORM}
+#  by Martin Decky <martin@decky.cz>
+#
+#  GPL'ed, copyleft
+#
+check_error() {
+    if [ "$1" -ne "0" ]; then
+    echo
+    echo "Script failed: $2"
+    exit
+    fi
+}
+BINUTILS_VERSION="2.16.1"
+GCC_VERSION="4.1.1"
+BINUTILS="binutils-${BINUTILS_VERSION}.tar.gz"
+GCC="gcc-core-${GCC_VERSION}.tar.bz2"
+BINUTILS_SOURCE="ftp://ftp.gnu.org/gnu/binutils/"
+GCC_SOURCE="ftp://ftp.gnu.org/gnu/gcc/gcc-${GCC_VERSION}/"
+PLATFORM="mipsel"
+WORKDIR=`pwd`
+TARGET="${PLATFORM}-linux-gnu"
+HOST="i686-pc-linux-gnu"
+PREFIX="/usr/local/${PLATFORM}"
+BINUTILSDIR="${WORKDIR}/binutils-${BINUTILS_VERSION}"
+GCCDIR="${WORKDIR}/gcc-${GCC_VERSION}"
+OBJDIR="${WORKDIR}/gcc-obj"
+echo ">>> Downloading tarballs"
+if [ ! -f "${BINUTILS}" ]; then
+    wget -c "${BINUTILS_SOURCE}${BINUTILS}"
+    check_error $? "Error downloading binutils."
+fi
+if [ ! -f "${GCC}" ]; then
+    wget -c "${GCC_SOURCE}${GCC}"
+    check_error $? "Error downloading GCC."
+fi
+echo ">>> Creating destionation directory"
+if [ ! -d "${PREFIX}" ]; then
+    mkdir -p "${PREFIX}"
+    test -d "${PREFIX}"
+    check_error $? "Unable to create ${PREFIX}."
+fi
+echo ">>> Creating GCC work directory"
+if [ ! -d "${OBJDIR}" ]; then
+    mkdir -p "${OBJDIR}"
+    test -d "${OBJDIR}"
+    check_error $? "Unable to create ${OBJDIR}."
+fi
+echo ">>> Unpacking tarballs"
+tar -xvzf "${BINUTILS}"
+check_error $? "Error unpacking binutils."
+tar -xvjf "${GCC}"
+check_error $? "Error unpacking GCC."
+echo ">>> Compiling and installing binutils"
+cd "${BINUTILSDIR}"
+check_error $? "Change directory failed."
+./configure "--host=${HOST}" "--target=${TARGET}" "--prefix=${PREFIX}" "--program-prefix=${TARGET}-" "--disable-nls"
+check_error $? "Error configuring binutils."
+make all install
+check_error $? "Error compiling/installing binutils."
+echo ">>> Compiling and installing GCC"
+cd "${OBJDIR}"
+check_error $? "Change directory failed."
+"${GCCDIR}/configure" "--host=${HOST}" "--target=${TARGET}" "--prefix=${PREFIX}" "--program-prefix=${TARGET}-" --with-gnu-as --with-gnu-ld --disable-nls --disable-threads --enable-languages=c --disable-multilib --disable-libgcj --without-headers --disable-shared
+check_error $? "Error configuring GCC."
+PATH="${PATH}:${PREFIX}/bin" make all-gcc install-gcc
+check_error $? "Error compiling/installing GCC."
+echo
+echo ">>> Cross-compiler for ${TARGET} installed."
 Property changes:
 Added: svn:executable
 +*
 \ No newline at end of property

 /tags/0.2.0.2/kernel/contrib/toolchain/toolchain.sparc64.sh
 ,0 → 1,84
+#!/bin/bash
+# Cross-Compiler Toolchain for ${PLATFORM}
+#  by Martin Decky <martin@decky.cz>
+#
+#  GPL'ed, copyleft
+#
+check_error() {
+    if [ "$1" -ne "0" ]; then
+    echo
+    echo "Script failed: $2"
+    exit
+    fi
+}
+BINUTILS_VERSION="2.16.1"
+GCC_VERSION="4.1.1"
+BINUTILS="binutils-${BINUTILS_VERSION}.tar.gz"
+GCC="gcc-core-${GCC_VERSION}.tar.bz2"
+BINUTILS_SOURCE="ftp://ftp.gnu.org/gnu/binutils/"
+GCC_SOURCE="ftp://ftp.gnu.org/gnu/gcc/gcc-${GCC_VERSION}/"
+PLATFORM="sparc64"
+WORKDIR=`pwd`
+TARGET="${PLATFORM}-linux-gnu"
+HOST="i686-pc-linux-gnu"
+PREFIX="/usr/local/${PLATFORM}"
+BINUTILSDIR="${WORKDIR}/binutils-${BINUTILS_VERSION}"
+GCCDIR="${WORKDIR}/gcc-${GCC_VERSION}"
+OBJDIR="${WORKDIR}/gcc-obj"
+echo ">>> Downloading tarballs"
+if [ ! -f "${BINUTILS}" ]; then
+    wget -c "${BINUTILS_SOURCE}${BINUTILS}"
+    check_error $? "Error downloading binutils."
+fi
+if [ ! -f "${GCC}" ]; then
+    wget -c "${GCC_SOURCE}${GCC}"
+    check_error $? "Error downloading GCC."
+fi
+echo ">>> Creating destionation directory"
+if [ ! -d "${PREFIX}" ]; then
+    mkdir -p "${PREFIX}"
+    test -d "${PREFIX}"
+    check_error $? "Unable to create ${PREFIX}."
+fi
+echo ">>> Creating GCC work directory"
+if [ ! -d "${OBJDIR}" ]; then
+    mkdir -p "${OBJDIR}"
+    test -d "${OBJDIR}"
+    check_error $? "Unable to create ${OBJDIR}."
+fi
+echo ">>> Unpacking tarballs"
+tar -xvzf "${BINUTILS}"
+check_error $? "Error unpacking binutils."
+tar -xvjf "${GCC}"
+check_error $? "Error unpacking GCC."
+echo ">>> Compiling and installing binutils"
+cd "${BINUTILSDIR}"
+check_error $? "Change directory failed."
+./configure "--host=${HOST}" "--target=${TARGET}" "--prefix=${PREFIX}" "--program-prefix=${TARGET}-" "--disable-nls"
+check_error $? "Error configuring binutils."
+make all install
+check_error $? "Error compiling/installing binutils."
+echo ">>> Compiling and installing GCC"
+cd "${OBJDIR}"
+check_error $? "Change directory failed."
+"${GCCDIR}/configure" "--host=${HOST}" "--target=${TARGET}" "--prefix=${PREFIX}" "--program-prefix=${TARGET}-" --with-gnu-as --with-gnu-ld --disable-nls --disable-threads --enable-languages=c --disable-multilib --disable-libgcj --without-headers --disable-shared
+check_error $? "Error configuring GCC."
+PATH="${PATH}:${PREFIX}/bin" make all-gcc install-gcc
+check_error $? "Error compiling/installing GCC."
+echo
+echo ">>> Cross-compiler for ${TARGET} installed."
 Property changes:
 Added: svn:executable
 +*
 \ No newline at end of property

 /tags/0.2.0.2/kernel/contrib/toolchain/toolchain.mipseb32.sh
 ,0 → 1,84
+#!/bin/bash
+# Cross-Compiler Toolchain for ${PLATFORM}
+#  by Martin Decky <martin@decky.cz>
+#
+#  GPL'ed, copyleft
+#
+check_error() {
+    if [ "$1" -ne "0" ]; then
+    echo
+    echo "Script failed: $2"
+    exit
+    fi
+}
+BINUTILS_VERSION="2.16.1"
+GCC_VERSION="4.1.1"
+BINUTILS="binutils-${BINUTILS_VERSION}.tar.gz"
+GCC="gcc-core-${GCC_VERSION}.tar.bz2"
+BINUTILS_SOURCE="ftp://ftp.gnu.org/gnu/binutils/"
+GCC_SOURCE="ftp://ftp.gnu.org/gnu/gcc/gcc-${GCC_VERSION}/"
+PLATFORM="mips"
+WORKDIR=`pwd`
+TARGET="${PLATFORM}-sgi-irix5"
+HOST="i686-pc-linux-gnu"
+PREFIX="/usr/local/${PLATFORM}"
+BINUTILSDIR="${WORKDIR}/binutils-${BINUTILS_VERSION}"
+GCCDIR="${WORKDIR}/gcc-${GCC_VERSION}"
+OBJDIR="${WORKDIR}/gcc-obj"
+echo ">>> Downloading tarballs"
+if [ ! -f "${BINUTILS}" ]; then
+    wget -c "${BINUTILS_SOURCE}${BINUTILS}"
+    check_error $? "Error downloading binutils."
+fi
+if [ ! -f "${GCC}" ]; then
+    wget -c "${GCC_SOURCE}${GCC}"
+    check_error $? "Error downloading GCC."
+fi
+echo ">>> Creating destionation directory"
+if [ ! -d "${PREFIX}" ]; then
+    mkdir -p "${PREFIX}"
+    test -d "${PREFIX}"
+    check_error $? "Unable to create ${PREFIX}."
+fi
+echo ">>> Creating GCC work directory"
+if [ ! -d "${OBJDIR}" ]; then
+    mkdir -p "${OBJDIR}"
+    test -d "${OBJDIR}"
+    check_error $? "Unable to create ${OBJDIR}."
+fi
+echo ">>> Unpacking tarballs"
+tar -xvzf "${BINUTILS}"
+check_error $? "Error unpacking binutils."
+tar -xvjf "${GCC}"
+check_error $? "Error unpacking GCC."
+echo ">>> Compiling and installing binutils"
+cd "${BINUTILSDIR}"
+check_error $? "Change directory failed."
+./configure "--host=${HOST}" "--target=${TARGET}" "--prefix=${PREFIX}" "--program-prefix=${TARGET}-" "--disable-nls"
+check_error $? "Error configuring binutils."
+make all install
+check_error $? "Error compiling/installing binutils."
+echo ">>> Compiling and installing GCC"
+cd "${OBJDIR}"
+check_error $? "Change directory failed."
+"${GCCDIR}/configure" "--host=${HOST}" "--target=${TARGET}" "--prefix=${PREFIX}" "--program-prefix=${TARGET}-" --with-gnu-as --with-gnu-ld --disable-nls --disable-threads --enable-languages=c --disable-multilib --disable-libgcj --without-headers --disable-shared
+check_error $? "Error configuring GCC."
+PATH="${PATH}:${PREFIX}/bin" make all-gcc install-gcc
+check_error $? "Error compiling/installing GCC."
+echo
+echo ">>> Cross-compiler for ${TARGET} installed."
 Property changes:
 Added: svn:executable
 +*
 \ No newline at end of property

 /tags/0.2.0.2/kernel/contrib/arch/ia64/vmaxlma.c
 ,0 → 1,75
+/*
+ * Swap VMA and LMA in ELF header.
+ *
+ *  by Jakub Jermar <jermar@itbs.cz>
+ *
+ *  GPL'ed, copyleft
+ */
+/*
+ * HP's IA-64 simulator Ski seems to confuse VMA and LMA in the ELF header.
+ * Instead of using LMA, Ski loads sections at their VMA addresses.
+ * This short program provides a workaround for this bug by simply
+ * swapping VMA and LMA in the ELF header of the executable.
+ *
+ * Note that after applying this workaround, you will be able to load
+ * ELF objects with different VMA and LMA in Ski, but the executable
+ * will become wronged for other potential uses.
+ */
+#include <stdio.h>
+#include <stdlib.h>
+#include <sys/types.h>
+#include <sys/stat.h>
+#include <sys/mman.h>
+#include <unistd.h>
+#include <fcntl.h>
+void syntax(char *prg)
+{
+    printf("%s ELF-file\n", prg);
+    exit(1);
+}
+void error(char *msg)
+{
+    printf("Error: %s\n", msg);
+    exit(2);
+}
+#define ELF_VMA (0x50/sizeof(unsigned long long))
+#define ELF_LMA (0x58/sizeof(unsigned long long))
+#define ELF_ENTRY (0x18/sizeof(unsigned long long))
+#define LENGTH  0x98
+int main(int argc, char *argv[])
+{
+    int fd;
+    unsigned long long vma, lma,entry;
+    unsigned long long *elf;
+    if (argc != 2)
+        syntax(argv[0]);
+    fd = open(argv[1], O_RDWR);
+    if (fd == -1)
+        error("open failed");
+    elf = mmap(NULL, LENGTH, PROT_READ | PROT_WRITE, MAP_SHARED, fd, 0);
+    if ((void *) elf  == (void *) -1)
+        error("map failed");
+    lma = elf[ELF_LMA];
+    elf[ELF_VMA] = lma;
+    entry = lma;
+    elf[ELF_ENTRY] = entry;
+    if (munmap(elf, LENGTH) == -1)
+        error("munmap failed");
+    if (close(fd) == -1)
+        error("close failed");
+    return 0;
+}

 /tags/0.2.0.2/kernel/tools/config.py
 ,0 → 1,494
+#!/usr/bin/env python
+"""
+Kernel configuration script
+"""
+import sys
+import os
+import re
+import commands
+INPUT = 'kernel.config'
+OUTPUT = 'Makefile.config'
+TMPOUTPUT = 'Makefile.config.tmp'
+class DefaultDialog:
+    "Wrapper dialog that tries to return default values"
+    def __init__(self, dlg):
+        self.dlg = dlg
+    def set_title(self,text):
+        self.dlg.set_title(text)
+    def yesno(self, text, default=None):
+        if default is not None:
+            return default
+        return self.dlg.yesno(text, default)
+    def noyes(self, text, default=None):
+        if default is not None:
+            return default
+        return self.dlg.noyes(text, default)
+    def choice(self, text, choices, defopt=None):
+        if defopt is not None:
+            return choices[defopt][0]
+        return self.dlg.choice(text, choices, defopt)
+class NoDialog:
+    def __init__(self):
+        self.printed = None
+        self.title = 'HelenOS Configuration'
+    def print_title(self):
+        if not self.printed:
+            sys.stdout.write("\n*** %s ***\n" % self.title)
+            self.printed = True
+    def set_title(self, text):
+        self.title = text
+        self.printed = False
+    def noyes(self, text, default=None):
+        if not default:
+            default = 'n'
+        return self.yesno(text, default)
+    def yesno(self, text, default=None):
+        self.print_title()
+        if default != 'n':
+            default = 'y'
+        while 1:
+            sys.stdout.write("%s (y/n)[%s]: " % (text,default))
+            inp = sys.stdin.readline()
+            if not inp:
+                raise EOFError
+            inp = inp.strip().lower()
+            if not inp:
+                return default
+            if inp == 'y':
+                return 'y'
+            elif inp == 'n':
+                return 'n'
+    def _print_choice(self, text, choices, defopt):
+        sys.stdout.write('%s:\n' % text)
+        for i,(text,descr) in enumerate(choices):
+            sys.stdout.write('\t%2d. %s\n' % (i, descr))
+        if defopt is not None:
+            sys.stdout.write('Enter choice number[%d]: ' % defopt)
+        else:
+            sys.stdout.write('Enter choice number: ')
+    def menu(self, text, choices, button, defopt=None):
+        self.title = 'Main menu'
+        menu = []
+        for key, descr in choices:
+            txt = key + (45-len(key))*' ' + ': ' + descr
+            menu.append((key, txt))
+        return self.choice(text, [button] + menu)
+    def choice(self, text, choices, defopt=None):
+        self.print_title()
+        while 1:
+            self._print_choice(text, choices, defopt)
+            inp = sys.stdin.readline()
+            if not inp:
+                raise EOFError
+            if not inp.strip():
+                if defopt is not None:
+                    return choices[defopt][0]
+                continue
+            try:
+                number = int(inp.strip())
+            except ValueError:
+                continue
+            if number < 0 or number >= len(choices):
+                continue
+            return choices[number][0]
+def eof_checker(fnc):
+    def wrapper(self, *args, **kw):
+        try:
+            return fnc(self, *args, **kw)
+        except EOFError:
+            return getattr(self.bckdialog,fnc.func_name)(*args, **kw)
+    return wrapper
+class Dialog(NoDialog):
+    def __init__(self):
+        NoDialog.__init__(self)
+        self.dlgcmd = os.environ.get('DIALOG','dialog')
+        self.title = ''
+        self.backtitle = 'HelenOS Kernel Configuration'
+        if os.system('%s --print-maxsize >/dev/null 2>&1' % self.dlgcmd) != 0:
+            raise NotImplementedError
+        self.bckdialog = NoDialog()
+    def set_title(self,text):
+        self.title = text
+        self.bckdialog.set_title(text)
+    def calldlg(self,*args,**kw):
+        "Wrapper for calling 'dialog' program"
+        indesc, outdesc = os.pipe()
+        pid = os.fork()
+        if not pid:
+            os.close(2)
+            os.dup(outdesc)
+            os.close(indesc)
+            dlgargs = [self.dlgcmd,'--title',self.title,
+                       '--backtitle', self.backtitle]
+            for key,val in kw.items():
+                dlgargs.append('--'+key)
+                dlgargs.append(val)
+            dlgargs += args
+            os.execlp(self.dlgcmd,*dlgargs)
+        os.close(outdesc)
+        try:
+            errout = os.fdopen(indesc,'r')
+            data = errout.read()
+            errout.close()
+            pid,status = os.wait()
+        except:
+            os.system('reset') # Reset terminal
+            raise
+        if not os.WIFEXITED(status):
+            os.system('reset') # Reset terminal
+            raise EOFError
+        status = os.WEXITSTATUS(status)
+        if status == 255:
+            raise EOFError
+        return status,data
+    def yesno(self, text, default=None):
+        if text[-1] not in ('?',':'):
+            text = text + ':'
+        width = '50'
+        height = '5'
+        if len(text) < 48:
+            text = ' '*int(((48-len(text))/2)) + text
+        else:
+            width = '0'
+            height = '0'
+        if default == 'n':
+            res,data = self.calldlg('--defaultno','--yesno',text,height,width)
+        else:
+            res,data = self.calldlg('--yesno',text,height,width)
+        if res == 0:
+            return 'y'
+        return 'n'
+    yesno = eof_checker(yesno)
+    def menu(self, text, choices, button, defopt=None):
+        self.title = 'Main menu'
+        text = text + ':'
+        width = '70'
+        height = str(8 + len(choices))
+        args = []
+        for key,val in choices:
+            args.append(key)
+            args.append(val)
+        kw = {}
+        if defopt:
+            kw['default-item'] = choices[defopt][0]
+        res,data = self.calldlg('--ok-label','Change',
+                                '--extra-label',button[1],
+                                '--extra-button',
+                                '--menu',text,height,width,
+                                str(len(choices)),*args,**kw)
+        if res == 3:
+            return button[0]
+        if res == 1: # Cancel
+            sys.exit(1)
+        elif res:
+            print data
+            raise EOFError
+        return data
+    menu = eof_checker(menu)
+    def choice(self, text, choices, defopt=None):
+        text = text + ':'
+        width = '50'
+        height = str(8 + len(choices))
+        args = []
+        for key,val in choices:
+            args.append(key)
+            args.append(val)
+        kw = {}
+        if defopt:
+            kw['default-item'] = choices[defopt][0]
+        res,data = self.calldlg('--nocancel','--menu',text,height,width,
+                                str(len(choices)),*args, **kw)
+        if res:
+            print data
+            raise EOFError
+        return data
+    choice = eof_checker(choice)
+def read_defaults(fname,defaults):
+    "Read saved values from last configuration run"
+    f = file(fname,'r')
+    for line in f:
+        res = re.match(r'^(?:#!# )?([^#]\w*)\s*=\s*(.*?)\s*$', line)
+        if res:
+            defaults[res.group(1)] = res.group(2)
+    f.close()
+def check_condition(text, defaults, asked_names):
+    seen_vars = [ x[0] for x in asked_names ]
+    ctype = 'cnf'
+    if ')|' in text or '|(' in text:
+        ctype = 'dnf'
+    if ctype == 'cnf':
+        conds = text.split('&')
+    else:
+        conds = text.split('|')
+    for cond in conds:
+        if cond.startswith('(') and cond.endswith(')'):
+            cond = cond[1:-1]
+        inside = check_inside(cond, defaults, ctype, seen_vars)
+        if ctype == 'cnf' and not inside:
+            return False
+        if ctype == 'dnf' and inside:
+            return True
+    if ctype == 'cnf':
+        return True
+    return False
+def check_inside(text, defaults, ctype, seen_vars):
+    """
+    Check that the condition specified on input line is True
+    only CNF is supported
+    """
+    if ctype == 'cnf':
+        conds = text.split('|')
+    else:
+        conds = text.split('&')
+    for cond in conds:
+        res = re.match(r'^(.*?)(!?=)(.*)$', cond)
+        if not res:
+            raise RuntimeError("Invalid condition: %s" % cond)
+        condname = res.group(1)
+        oper = res.group(2)
+        condval = res.group(3)
+        if condname not in seen_vars:
+            varval = ''
+##             raise RuntimeError("Variable %s not defined before being asked." %\
+##                                condname)
+        elif not defaults.has_key(condname):
+            raise RuntimeError("Condition var %s does not exist: %s" % \
+                               (condname,text))
+        else:
+            varval = defaults[condname]
+        if ctype == 'cnf':
+            if oper == '=' and  condval == varval:
+                return True
+            if oper == '!=' and condval != varval:
+                return True
+        else:
+            if oper== '=' and condval != varval:
+                return False
+            if oper== '!=' and condval == varval:
+                return False
+    if ctype=='cnf':
+        return False
+    return True
+def parse_config(input, output, dlg, defaults={}, askonly=None):
+    "Parse configuration file and create Makefile.config on the fly"
+    def ask_the_question(dialog):
+        "Ask question based on the type of variables to ask"
+        # This is quite a hack, this thingy is written just to
+        # have access to local variables..
+        if vartype == 'y/n':
+            return dialog.yesno(comment, default)
+        elif vartype == 'n/y':
+            return dialog.noyes(comment, default)
+        elif vartype == 'choice':
+            defopt = None
+            if default is not None:
+                for i,(key,val) in enumerate(choices):
+                    if key == default:
+                        defopt = i
+                        break
+            return dialog.choice(comment, choices, defopt)
+        else:
+            raise RuntimeError("Bad method: %s" % vartype)
+    f = file(input, 'r')
+    outf = file(output, 'w')
+    outf.write('#########################################\n')
+    outf.write('## AUTO-GENERATED FILE, DO NOT EDIT!!! ##\n')
+    outf.write('#########################################\n\n')
+    asked_names = []
+    comment = ''
+    default = None
+    choices = []
+    for line in f:
+        if line.startswith('%'):
+            res = re.match(r'^%\s*(?:\[(.*?)\])?\s*(.*)$', line)
+            if not res:
+                raise RuntimeError('Invalid command: %s' % line)
+            if res.group(1):
+                if not check_condition(res.group(1), defaults,
+                                       asked_names):
+                    continue
+            args = res.group(2).strip().split(' ')
+            cmd = args[0].lower()
+            args = args[1:]
+            if cmd == 'saveas':
+                outf.write('%s = %s\n' % (args[1],defaults[args[0]]))
+            elif cmd == 'shellcmd':
+                varname = args[0]
+                args = args[1:]
+                for i,arg in enumerate(args):
+                    if arg.startswith('$'):
+                        args[i] = defaults[arg[1:]]
+                data,status = commands.getstatusoutput(' '.join(args))
+                if status:
+                    raise RuntimeError('Error running: %s' % ' '.join(args))
+                outf.write('%s = %s\n' % (varname,data.strip()))
+            continue
+        if line.startswith('!'):
+            # Ask a question
+            res = re.search(r'!\s*(?:\[(.*?)\])?\s*([^\s]+)\s*\((.*)\)\s*$', line)
+            if not res:
+                raise RuntimeError("Weird line: %s" % line)
+            varname = res.group(2)
+            vartype = res.group(3)
+            default = defaults.get(varname,None)
+            if res.group(1):
+                if not check_condition(res.group(1), defaults,
+                                       asked_names):
+                    if default is not None:
+                        outf.write('#!# %s = %s\n' % (varname, default))
+                    # Clear cumulated values
+                    comment = ''
+                    default = None
+                    choices = []
+                    continue
+            asked_names.append((varname,comment))
+            if default is None or not askonly or askonly == varname:
+                default = ask_the_question(dlg)
+            else:
+                default = ask_the_question(DefaultDialog(dlg))
+            outf.write('%s = %s\n' % (varname, default))
+            # Remeber the selected value
+            defaults[varname] = default
+            # Clear cumulated values
+            comment = ''
+            default = None
+            choices = []
+            continue
+        if line.startswith('@'):
+            # Add new line into the 'choice array'
+            res = re.match(r'@\s*(?:\[(.*?)\])?\s*"(.*?)"\s*(.*)$', line)
+            if not res:
+                raise RuntimeError("Bad line: %s" % line)
+            if res.group(1):
+                if not check_condition(res.group(1),defaults,
+                                       asked_names):
+                    continue
+            choices.append((res.group(2), res.group(3)))
+            continue
+        # All other things print to output file
+        outf.write(line)
+        if re.match(r'^#[^#]', line):
+            # Last comment before question will be displayed to the user
+            comment = line[1:].strip()
+        elif line.startswith('## '):
+            # Set title of the dialog window
+            dlg.set_title(line[2:].strip())
+    outf.write('\n')
+    outf.write('REVISION = %s\n' % commands.getoutput('svnversion . 2> /dev/null'))
+    outf.write('TIMESTAMP = %s\n' % commands.getoutput('date "+%Y-%m-%d %H:%M:%S"'))
+    outf.close()
+    f.close()
+    return asked_names
+def main():
+    defaults = {}
+    try:
+        dlg = Dialog()
+    except NotImplementedError:
+        dlg = NoDialog()
+    if len(sys.argv) >= 2 and sys.argv[1]=='default':
+        defmode = True
+    else:
+        defmode = False
+    # Default run will update the configuration file
+    # with newest options
+    if os.path.exists(OUTPUT):
+        read_defaults(OUTPUT, defaults)
+    # Get ARCH from command line if specified
+    if len(sys.argv) >= 3:
+        defaults['ARCH'] = sys.argv[2]
+    # Dry run only with defaults
+    varnames = parse_config(INPUT, TMPOUTPUT, DefaultDialog(dlg), defaults)
+    # If not in default mode, present selection of all possibilities
+    if not defmode:
+        defopt = 0
+        while 1:
+            # varnames contains variable names that were in the
+            # last question set
+            choices = [ (x[1],defaults[x[0]]) for x in varnames ]
+            res = dlg.menu('Configuration',choices,('save','Save'),defopt)
+            if res == 'save':
+                parse_config(INPUT, TMPOUTPUT, DefaultDialog(dlg), defaults)
+                break
+            # transfer description back to varname
+            for i,(vname,descr) in enumerate(varnames):
+                if res == descr:
+                    defopt = i
+                    break
+            # Ask the user a simple question, produce output
+            # as if the user answered all the other questions
+            # with default answer
+            varnames = parse_config(INPUT, TMPOUTPUT, dlg, defaults,
+                                    askonly=varnames[i][0])
+    if os.path.exists(OUTPUT):
+        os.unlink(OUTPUT)
+    os.rename(TMPOUTPUT, OUTPUT)
+    if not defmode and dlg.yesno('Rebuild kernel?') == 'y':
+        os.execlp('make','make','clean','build')
+if __name__ == '__main__':
+    main()
 Property changes:
 Added: svn:executable
 +*
 \ No newline at end of property

 /tags/0.2.0.2/kernel/tools/ppc64/gencontext.c
 ,0 → 1,81
+#include <stdio.h>
+#include <stdint.h>
+typedef uint32_t __u32;
+typedef uint64_t __u64;
+typedef __u64 ipl_t;
+typedef __u64 __address;
+#define __ppc64_TYPES_H__
+#include "../../arch/ppc64/include/context.h"
+#include "../../arch/ppc64/include/fpu_context.h"
+#define FILENAME "../../arch/ppc64/include/context_offset.h"
+int main(void)
+{
+    FILE *f;
+    struct context *pctx = NULL;
+    struct fpu_context *fpctx = NULL;
+    f = fopen(FILENAME,"w");
+    if (!f) {
+        perror(FILENAME);
+        return 1;
+    }
+    fprintf(f, "/* This file is automatically generated by %s. */\n", __FILE__);
+    fprintf(f,"/* struct context */\n");
+    fprintf(f,"#define OFFSET_SP    0x%x\n", ((int) &pctx->sp) - (int) pctx);
+    fprintf(f,"#define OFFSET_PC    0x%x\n", ((int) &pctx->pc) - (int) pctx);
+    fprintf(f,"#define OFFSET_R2    0x%x\n", ((int) &pctx->r2) - (int) pctx);
+    fprintf(f,"#define OFFSET_R13   0x%x\n", ((int) &pctx->r13) - (int) pctx);
+    fprintf(f,"#define OFFSET_R14   0x%x\n", ((int) &pctx->r14) - (int) pctx);
+    fprintf(f,"#define OFFSET_R15   0x%x\n", ((int) &pctx->r15) - (int) pctx);
+    fprintf(f,"#define OFFSET_R16   0x%x\n", ((int) &pctx->r16) - (int) pctx);
+    fprintf(f,"#define OFFSET_R17   0x%x\n", ((int) &pctx->r17) - (int) pctx);
+    fprintf(f,"#define OFFSET_R18   0x%x\n", ((int) &pctx->r18) - (int) pctx);
+    fprintf(f,"#define OFFSET_R19   0x%x\n", ((int) &pctx->r19) - (int) pctx);
+    fprintf(f,"#define OFFSET_R20   0x%x\n", ((int) &pctx->r20) - (int) pctx);
+    fprintf(f,"#define OFFSET_R21   0x%x\n", ((int) &pctx->r21) - (int) pctx);
+    fprintf(f,"#define OFFSET_R22   0x%x\n", ((int) &pctx->r22) - (int) pctx);
+    fprintf(f,"#define OFFSET_R23   0x%x\n", ((int) &pctx->r23) - (int) pctx);
+    fprintf(f,"#define OFFSET_R24   0x%x\n", ((int) &pctx->r24) - (int) pctx);
+    fprintf(f,"#define OFFSET_R25   0x%x\n", ((int) &pctx->r25) - (int) pctx);
+    fprintf(f,"#define OFFSET_R26   0x%x\n", ((int) &pctx->r26) - (int) pctx);
+    fprintf(f,"#define OFFSET_R27   0x%x\n", ((int) &pctx->r27) - (int) pctx);
+    fprintf(f,"#define OFFSET_R28   0x%x\n", ((int) &pctx->r28) - (int) pctx);
+    fprintf(f,"#define OFFSET_R29   0x%x\n", ((int) &pctx->r29) - (int) pctx);
+    fprintf(f,"#define OFFSET_R30   0x%x\n", ((int) &pctx->r30) - (int) pctx);
+    fprintf(f,"#define OFFSET_R31   0x%x\n", ((int) &pctx->r31) - (int) pctx);
+    fprintf(f,"#define OFFSET_CR    0x%x\n", ((int) &pctx->cr) - (int) pctx);
+    fprintf(f,"\n");
+    fprintf(f,"#define OFFSET_FR14  0x%x\n", ((int) &fpctx->fr14) - (int) fpctx);
+    fprintf(f,"#define OFFSET_FR15  0x%x\n", ((int) &fpctx->fr15) - (int) fpctx);
+    fprintf(f,"#define OFFSET_FR16  0x%x\n", ((int) &fpctx->fr16) - (int) fpctx);
+    fprintf(f,"#define OFFSET_FR17  0x%x\n", ((int) &fpctx->fr17) - (int) fpctx);
+    fprintf(f,"#define OFFSET_FR18  0x%x\n", ((int) &fpctx->fr18) - (int) fpctx);
+    fprintf(f,"#define OFFSET_FR19  0x%x\n", ((int) &fpctx->fr19) - (int) fpctx);
+    fprintf(f,"#define OFFSET_FR20  0x%x\n", ((int) &fpctx->fr20) - (int) fpctx);
+    fprintf(f,"#define OFFSET_FR21  0x%x\n", ((int) &fpctx->fr21) - (int) fpctx);
+    fprintf(f,"#define OFFSET_FR22  0x%x\n", ((int) &fpctx->fr22) - (int) fpctx);
+    fprintf(f,"#define OFFSET_FR23  0x%x\n", ((int) &fpctx->fr23) - (int) fpctx);
+    fprintf(f,"#define OFFSET_FR24  0x%x\n", ((int) &fpctx->fr24) - (int) fpctx);
+    fprintf(f,"#define OFFSET_FR25  0x%x\n", ((int) &fpctx->fr25) - (int) fpctx);
+    fprintf(f,"#define OFFSET_FR26  0x%x\n", ((int) &fpctx->fr26) - (int) fpctx);
+    fprintf(f,"#define OFFSET_FR27  0x%x\n", ((int) &fpctx->fr27) - (int) fpctx);
+    fprintf(f,"#define OFFSET_FR28  0x%x\n", ((int) &fpctx->fr28) - (int) fpctx);
+    fprintf(f,"#define OFFSET_FR29  0x%x\n", ((int) &fpctx->fr29) - (int) fpctx);
+    fprintf(f,"#define OFFSET_FR30  0x%x\n", ((int) &fpctx->fr30) - (int) fpctx);
+    fprintf(f,"#define OFFSET_FR31  0x%x\n", ((int) &fpctx->fr31) - (int) fpctx);
+    fprintf(f,"#define OFFSET_FPSCR 0x%x\n", ((int) &fpctx->fpscr) - (int) fpctx);
+    fclose(f);
+    return 0;
+}

 /tags/0.2.0.2/kernel/tools/ia32/decpt.py
 ,0 → 1,21
+#!/usr/bin/env python
+"""
+Decode 32-bit address into PTE components
+"""
+import sys
+def main():
+    if len(sys.argv) != 2 or not sys.argv[1].startswith('0x'):
+        print "%s 0x..." % sys.argv[0]
+        sys.exit(1)
+    address = int(sys.argv[1],16)
+    offset = address & 0xfff
+    ptl1 = (address >> 12) & 0x3ff
+    ptl0 = (address >> 22) & 0x3ff
+    print "Ptl0:   %3d" % ptl0
+    print "Ptl1:   %3d" % ptl1
+    print "Offset: 0x%x" % offset
+if __name__ == '__main__':
+    main()
 Property changes:
 Added: svn:executable
 +*
 \ No newline at end of property

 /tags/0.2.0.2/kernel/tools/amd64/gencontext.c
 ,0 → 1,43
+#include <stdio.h>
+#include <stdint.h>
+typedef uint64_t __u64;
+typedef __u64 ipl_t;
+typedef __u64 __address;
+#define __amd64_TYPES_H__
+#include "../../arch/amd64/include/context.h"
+#define FILENAME "../../arch/amd64/include/context_offset.h"
+int main(void)
+{
+    FILE *f;
+    struct context ctx;
+    struct context *pctx = &ctx;
+    struct interrupt_context ictx;
+    struct interrupt_context *ipctx = &ictx;
+    f = fopen(FILENAME,"w");
+    if (!f) {
+        perror(FILENAME);
+        return 1;
+    }
+    fprintf(f, "/* This file is automatically generated by %s. */\n", __FILE__);
+    fprintf(f,"#define OFFSET_SP  0x%x\n", ((int) &pctx->sp) - (int) pctx);
+    fprintf(f,"#define OFFSET_PC  0x%x\n", ((int) &pctx->pc) - (int) pctx);
+    fprintf(f,"#define OFFSET_RBX 0x%x\n", ((int) &pctx->rbx) - (int) pctx);
+    fprintf(f,"#define OFFSET_RBP 0x%x\n", ((int) &pctx->rbp) - (int) pctx);
+    fprintf(f,"#define OFFSET_R12 0x%x\n", ((int) &pctx->r12) - (int) pctx);
+    fprintf(f,"#define OFFSET_R13 0x%x\n", ((int) &pctx->r13) - (int) pctx);
+    fprintf(f,"#define OFFSET_R14 0x%x\n", ((int) &pctx->r14) - (int) pctx);
+    fprintf(f,"#define OFFSET_R15 0x%x\n", ((int) &pctx->r15) - (int) pctx);
+    fprintf(f,"#define OFFSET_IPL 0x%x\n", ((int) &pctx->ipl) - (int) pctx);
+    fclose(f);
+    return 0;
+}

 /tags/0.2.0.2/kernel/tools/amd64/decpt.py
 ,0 → 1,25
+#!/usr/bin/env python
+"""
+Decode 64-bit address into components
+"""
+import sys
+def main():
+    if len(sys.argv) != 2 or not sys.argv[1].startswith('0x'):
+        print "%s 0x..." % sys.argv[0]
+        sys.exit(1)
+    address = int(sys.argv[1],16)
+    offset = address & 0xfff
+    ptl3 = (address >> 12) & 0x1ff
+    ptl2 = (address >> 21) & 0x1ff
+    ptl1 = (address >> 30) & 0x1ff
+    ptl0 = (address >> 39) & 0x1ff
+    print "Ptl0:   %3d" % ptl0
+    print "Ptl1:   %3d" % ptl1
+    print "Ptl2:   %3d" % ptl2
+    print "Ptl3:   %3d" % ptl3
+    print "Offset: 0x%x" % offset
+if __name__ == '__main__':
+    main()
 Property changes:
 Added: svn:executable
 +*
 \ No newline at end of property

 /tags/0.2.0.2/kernel/tools/sparc64/gencontext.c
 ,0 → 1,54
+#include <stdio.h>
+#include <stdint.h>
+typedef uint64_t __u64;
+typedef __u64 ipl_t;
+typedef __u64 __address;
+#define __sparc64_TYPES_H__
+#define __ALIGN_H__
+#include "../../arch/sparc64/include/stack.h"
+#include "../../arch/sparc64/include/context.h"
+#define FILENAME "../../arch/sparc64/include/context_offset.h"
+int main(void)
+{
+    FILE *f;
+    struct context *pctx = NULL;
+    f = fopen(FILENAME,"w");
+    if (!f) {
+        perror(FILENAME);
+        return 1;
+    }
+    fprintf(f, "/* This file is automatically generated by %s. */\n", __FILE__);
+    fprintf(f,"/* struct context */\n");
+    fprintf(f,"#define OFFSET_SP       0x%x\n", ((int) &pctx->sp) - (int) pctx);
+    fprintf(f,"#define OFFSET_PC       0x%x\n", ((int) &pctx->pc) - (int) pctx);
+    fprintf(f,"#define OFFSET_I0       0x%x\n", ((int) &pctx->i0) - (int) pctx);
+    fprintf(f,"#define OFFSET_I1       0x%x\n", ((int) &pctx->i1) - (int) pctx);
+    fprintf(f,"#define OFFSET_I2       0x%x\n", ((int) &pctx->i2) - (int) pctx);
+    fprintf(f,"#define OFFSET_I3       0x%x\n", ((int) &pctx->i3) - (int) pctx);
+    fprintf(f,"#define OFFSET_I4       0x%x\n", ((int) &pctx->i4) - (int) pctx);
+    fprintf(f,"#define OFFSET_I5       0x%x\n", ((int) &pctx->i5) - (int) pctx);
+    fprintf(f,"#define OFFSET_FP       0x%x\n", ((int) &pctx->fp) - (int) pctx);
+    fprintf(f,"#define OFFSET_I7       0x%x\n", ((int) &pctx->i7) - (int) pctx);
+    fprintf(f,"#define OFFSET_L0       0x%x\n", ((int) &pctx->l0) - (int) pctx);
+    fprintf(f,"#define OFFSET_L1       0x%x\n", ((int) &pctx->l1) - (int) pctx);
+    fprintf(f,"#define OFFSET_L2       0x%x\n", ((int) &pctx->l2) - (int) pctx);
+    fprintf(f,"#define OFFSET_L3       0x%x\n", ((int) &pctx->l3) - (int) pctx);
+    fprintf(f,"#define OFFSET_L4       0x%x\n", ((int) &pctx->l4) - (int) pctx);
+    fprintf(f,"#define OFFSET_L5       0x%x\n", ((int) &pctx->l5) - (int) pctx);
+    fprintf(f,"#define OFFSET_L6       0x%x\n", ((int) &pctx->l6) - (int) pctx);
+    fprintf(f,"#define OFFSET_L7       0x%x\n", ((int) &pctx->l7) - (int) pctx);
+    fprintf(f,"#define OFFSET_CLEANWIN 0x%x\n", ((int) &pctx->cleanwin) - (int) pctx);
+    fclose(f);
+    return 0;
+}

 /tags/0.2.0.2/kernel/tools/ppc32/gencontext.c
 ,0 → 1,81
+#include <stdio.h>
+#include <stdint.h>
+typedef uint32_t __u32;
+typedef uint64_t __u64;
+typedef __u32 ipl_t;
+typedef __u32 __address;
+#define __ppc32_TYPES_H__
+#include "../../arch/ppc32/include/context.h"
+#include "../../arch/ppc32/include/fpu_context.h"
+#define FILENAME "../../arch/ppc32/include/context_offset.h"
+int main(void)
+{
+    FILE *f;
+    struct context *pctx = NULL;
+    struct fpu_context *fpctx = NULL;
+    f = fopen(FILENAME,"w");
+    if (!f) {
+        perror(FILENAME);
+        return 1;
+    }
+    fprintf(f, "/* This file is automatically generated by %s. */\n", __FILE__);
+    fprintf(f,"/* struct context */\n");
+    fprintf(f,"#define OFFSET_SP    0x%x\n", ((int) &pctx->sp) - (int) pctx);
+    fprintf(f,"#define OFFSET_PC    0x%x\n", ((int) &pctx->pc) - (int) pctx);
+    fprintf(f,"#define OFFSET_R2    0x%x\n", ((int) &pctx->r2) - (int) pctx);
+    fprintf(f,"#define OFFSET_R13   0x%x\n", ((int) &pctx->r13) - (int) pctx);
+    fprintf(f,"#define OFFSET_R14   0x%x\n", ((int) &pctx->r14) - (int) pctx);
+    fprintf(f,"#define OFFSET_R15   0x%x\n", ((int) &pctx->r15) - (int) pctx);
+    fprintf(f,"#define OFFSET_R16   0x%x\n", ((int) &pctx->r16) - (int) pctx);
+    fprintf(f,"#define OFFSET_R17   0x%x\n", ((int) &pctx->r17) - (int) pctx);
+    fprintf(f,"#define OFFSET_R18   0x%x\n", ((int) &pctx->r18) - (int) pctx);
+    fprintf(f,"#define OFFSET_R19   0x%x\n", ((int) &pctx->r19) - (int) pctx);
+    fprintf(f,"#define OFFSET_R20   0x%x\n", ((int) &pctx->r20) - (int) pctx);
+    fprintf(f,"#define OFFSET_R21   0x%x\n", ((int) &pctx->r21) - (int) pctx);
+    fprintf(f,"#define OFFSET_R22   0x%x\n", ((int) &pctx->r22) - (int) pctx);
+    fprintf(f,"#define OFFSET_R23   0x%x\n", ((int) &pctx->r23) - (int) pctx);
+    fprintf(f,"#define OFFSET_R24   0x%x\n", ((int) &pctx->r24) - (int) pctx);
+    fprintf(f,"#define OFFSET_R25   0x%x\n", ((int) &pctx->r25) - (int) pctx);
+    fprintf(f,"#define OFFSET_R26   0x%x\n", ((int) &pctx->r26) - (int) pctx);
+    fprintf(f,"#define OFFSET_R27   0x%x\n", ((int) &pctx->r27) - (int) pctx);
+    fprintf(f,"#define OFFSET_R28   0x%x\n", ((int) &pctx->r28) - (int) pctx);
+    fprintf(f,"#define OFFSET_R29   0x%x\n", ((int) &pctx->r29) - (int) pctx);
+    fprintf(f,"#define OFFSET_R30   0x%x\n", ((int) &pctx->r30) - (int) pctx);
+    fprintf(f,"#define OFFSET_R31   0x%x\n", ((int) &pctx->r31) - (int) pctx);
+    fprintf(f,"#define OFFSET_CR    0x%x\n", ((int) &pctx->cr) - (int) pctx);
+    fprintf(f,"\n");
+    fprintf(f,"#define OFFSET_FR14  0x%x\n", ((int) &fpctx->fr14) - (int) fpctx);
+    fprintf(f,"#define OFFSET_FR15  0x%x\n", ((int) &fpctx->fr15) - (int) fpctx);
+    fprintf(f,"#define OFFSET_FR16  0x%x\n", ((int) &fpctx->fr16) - (int) fpctx);
+    fprintf(f,"#define OFFSET_FR17  0x%x\n", ((int) &fpctx->fr17) - (int) fpctx);
+    fprintf(f,"#define OFFSET_FR18  0x%x\n", ((int) &fpctx->fr18) - (int) fpctx);
+    fprintf(f,"#define OFFSET_FR19  0x%x\n", ((int) &fpctx->fr19) - (int) fpctx);
+    fprintf(f,"#define OFFSET_FR20  0x%x\n", ((int) &fpctx->fr20) - (int) fpctx);
+    fprintf(f,"#define OFFSET_FR21  0x%x\n", ((int) &fpctx->fr21) - (int) fpctx);
+    fprintf(f,"#define OFFSET_FR22  0x%x\n", ((int) &fpctx->fr22) - (int) fpctx);
+    fprintf(f,"#define OFFSET_FR23  0x%x\n", ((int) &fpctx->fr23) - (int) fpctx);
+    fprintf(f,"#define OFFSET_FR24  0x%x\n", ((int) &fpctx->fr24) - (int) fpctx);
+    fprintf(f,"#define OFFSET_FR25  0x%x\n", ((int) &fpctx->fr25) - (int) fpctx);
+    fprintf(f,"#define OFFSET_FR26  0x%x\n", ((int) &fpctx->fr26) - (int) fpctx);
+    fprintf(f,"#define OFFSET_FR27  0x%x\n", ((int) &fpctx->fr27) - (int) fpctx);
+    fprintf(f,"#define OFFSET_FR28  0x%x\n", ((int) &fpctx->fr28) - (int) fpctx);
+    fprintf(f,"#define OFFSET_FR29  0x%x\n", ((int) &fpctx->fr29) - (int) fpctx);
+    fprintf(f,"#define OFFSET_FR30  0x%x\n", ((int) &fpctx->fr30) - (int) fpctx);
+    fprintf(f,"#define OFFSET_FR31  0x%x\n", ((int) &fpctx->fr31) - (int) fpctx);
+    fprintf(f,"#define OFFSET_FPSCR 0x%x\n", ((int) &fpctx->fpscr) - (int) fpctx);
+    fclose(f);
+    return 0;
+}

 /tags/0.2.0.2/kernel/tools/mips32/gencontext.c
 ,0 → 1,84
+#include <stdio.h>
+#include <stdint.h>
+typedef uint32_t __u32;
+typedef __u32 ipl_t;
+typedef __u32 __address;
+#define __mips32_TYPES_H__
+#include "../../arch/mips32/include/context.h"
+#include "../../arch/mips32/include/exception.h"
+#define FILENAME "../../arch/mips32/include/context_offset.h"
+int main(void)
+{
+    FILE *f;
+    struct context *pctx = NULL;
+    struct exception_regdump *edmp = NULL;
+    f = fopen(FILENAME,"w");
+    if (!f) {
+        perror(FILENAME);
+        return 1;
+    }
+    fprintf(f, "/* This file is automatically generated by %s. */\n", __FILE__);
+    fprintf(f,"/* struct context */\n");
+    fprintf(f,"#define OFFSET_SP      0x%x\n", ((int) &pctx->sp) - (int) pctx);
+    fprintf(f,"#define OFFSET_PC      0x%x\n", ((int) &pctx->pc) - (int) pctx);
+    fprintf(f,"#define OFFSET_S0      0x%x\n", ((int) &pctx->s0) - (int) pctx);
+    fprintf(f,"#define OFFSET_S1      0x%x\n", ((int) &pctx->s1) - (int) pctx);
+    fprintf(f,"#define OFFSET_S2      0x%x\n", ((int) &pctx->s2) - (int) pctx);
+    fprintf(f,"#define OFFSET_S3      0x%x\n", ((int) &pctx->s3) - (int) pctx);
+    fprintf(f,"#define OFFSET_S4      0x%x\n", ((int) &pctx->s4) - (int) pctx);
+    fprintf(f,"#define OFFSET_S5      0x%x\n", ((int) &pctx->s5) - (int) pctx);
+    fprintf(f,"#define OFFSET_S6      0x%x\n", ((int) &pctx->s6) - (int) pctx);
+    fprintf(f,"#define OFFSET_S7      0x%x\n", ((int) &pctx->s7) - (int) pctx);
+    fprintf(f,"#define OFFSET_S8      0x%x\n", ((int) &pctx->s8) - (int) pctx);
+    fprintf(f,"#define OFFSET_GP      0x%x\n", ((int) &pctx->gp) - (int) pctx);
+    fprintf(f,"\n\n/* struct register_dump */\n");
+    fprintf(f,"#define EOFFSET_AT     0x%x\n", ((int) &edmp->at) - (int) edmp);
+    fprintf(f,"#define EOFFSET_V0     0x%x\n", ((int) &edmp->v0) - (int) edmp);
+    fprintf(f,"#define EOFFSET_V1     0x%x\n", ((int) &edmp->v1) - (int) edmp);
+    fprintf(f,"#define EOFFSET_A0     0x%x\n", ((int) &edmp->a0) - (int) edmp);
+    fprintf(f,"#define EOFFSET_A1     0x%x\n", ((int) &edmp->a1) - (int) edmp);
+    fprintf(f,"#define EOFFSET_A2     0x%x\n", ((int) &edmp->a2) - (int) edmp);
+    fprintf(f,"#define EOFFSET_A3     0x%x\n", ((int) &edmp->a3) - (int) edmp);
+    fprintf(f,"#define EOFFSET_T0     0x%x\n", ((int) &edmp->t0) - (int) edmp);
+    fprintf(f,"#define EOFFSET_T1     0x%x\n", ((int) &edmp->t1) - (int) edmp);
+    fprintf(f,"#define EOFFSET_T2     0x%x\n", ((int) &edmp->t2) - (int) edmp);
+    fprintf(f,"#define EOFFSET_T3     0x%x\n", ((int) &edmp->t3) - (int) edmp);
+    fprintf(f,"#define EOFFSET_T4     0x%x\n", ((int) &edmp->t4) - (int) edmp);
+    fprintf(f,"#define EOFFSET_T5     0x%x\n", ((int) &edmp->t5) - (int) edmp);
+    fprintf(f,"#define EOFFSET_T6     0x%x\n", ((int) &edmp->t6) - (int) edmp);
+    fprintf(f,"#define EOFFSET_T7     0x%x\n", ((int) &edmp->t7) - (int) edmp);
+    fprintf(f,"#define EOFFSET_S0     0x%x\n", ((int) &edmp->s0) - (int) edmp);
+    fprintf(f,"#define EOFFSET_S1     0x%x\n", ((int) &edmp->s1) - (int) edmp);
+    fprintf(f,"#define EOFFSET_S2     0x%x\n", ((int) &edmp->s2) - (int) edmp);
+    fprintf(f,"#define EOFFSET_S3     0x%x\n", ((int) &edmp->s3) - (int) edmp);
+    fprintf(f,"#define EOFFSET_S4     0x%x\n", ((int) &edmp->s4) - (int) edmp);
+    fprintf(f,"#define EOFFSET_S5     0x%x\n", ((int) &edmp->s5) - (int) edmp);
+    fprintf(f,"#define EOFFSET_S6     0x%x\n", ((int) &edmp->s6) - (int) edmp);
+    fprintf(f,"#define EOFFSET_S7     0x%x\n", ((int) &edmp->s7) - (int) edmp);
+    fprintf(f,"#define EOFFSET_T8     0x%x\n", ((int) &edmp->t8) - (int) edmp);
+    fprintf(f,"#define EOFFSET_T9     0x%x\n", ((int) &edmp->t9) - (int) edmp);
+    fprintf(f,"#define EOFFSET_GP     0x%x\n", ((int) &edmp->gp) - (int) edmp);
+    fprintf(f,"#define EOFFSET_SP     0x%x\n", ((int) &edmp->sp) - (int) edmp);
+    fprintf(f,"#define EOFFSET_S8     0x%x\n", ((int) &edmp->s8) - (int) edmp);
+    fprintf(f,"#define EOFFSET_RA     0x%x\n", ((int) &edmp->ra) - (int) edmp);
+    fprintf(f,"#define EOFFSET_LO     0x%x\n", ((int) &edmp->lo) - (int) edmp);
+    fprintf(f,"#define EOFFSET_HI     0x%x\n", ((int) &edmp->hi) - (int) edmp);
+    fprintf(f,"#define EOFFSET_STATUS 0x%x\n", ((int) &edmp->status) - (int) edmp);
+    fprintf(f,"#define EOFFSET_EPC    0x%x\n", ((int) &edmp->epc) - (int) edmp);
+    fprintf(f,"#define REGISTER_SPACE %d\n", sizeof(*edmp));
+    fclose(f);
+    return 0;
+}

 /tags/0.2.0.2/kernel/tools/genmap.py
 ,0 → 1,87
+#!/usr/bin/env python
+import sys
+import struct
+import re
+MAXSTRING=63
+symtabfmt = "<Q%ds" % (MAXSTRING+1)
+funcline = re.compile(r'([0-9a-f]+)\s+[lg]\s+.\s+\.text\s+([0-9a-f]+)\s+(.*)$')
+bssline = re.compile(r'([0-9a-f]+)\s+[lg]\s+[a-zA-Z]\s+\.bss\s+([0-9a-f]+)\s+(.*)$')
+dataline = re.compile(r'([0-9a-f]+)\s+[lg]\s+[a-zA-Z]\s+\.data\s+([0-9a-f]+)\s+(.*)$')
+fileexp = re.compile(r'([^\s]+):\s+file format')
+def read_obdump(inp):
+    funcs = {}
+    data = {}
+    bss ={}
+    fname = ''
+    for line in inp:
+        line = line.strip()
+        res = funcline.match(line)
+        if res:
+            funcs.setdefault(fname,[]).append((int(res.group(1),16),
+                                               res.group(3)))
+            continue
+        res = bssline.match(line)
+        if res:
+            start = int(res.group(1),16)
+            end = int(res.group(2),16)
+            if end:
+                bss.setdefault(fname,[]).append((start,res.group(3)))
+        res = dataline.match(line)
+        if res:
+            start = int(res.group(1),16)
+            end = int(res.group(2),16)
+            if end:
+                data.setdefault(fname,[]).append((start,res.group(3)))
+        res = fileexp.match(line)
+        if res:
+            fname = res.group(1)
+            continue
+    return {
+        'text' : funcs,
+        'bss' : bss,
+        'data' : data
+        }
+startfile = re.compile(r'\.(text|bss|data)\s+(0x[0-9a-f]+)\s+0x[0-9a-f]+\s+(.*)$')
+def generate(kmapf, obmapf, out):
+    obdump = read_obdump(obmapf)
+    def sorter(x,y):
+        return cmp(x[0],y[0])
+    for line in kmapf:
+        line = line.strip()
+        res = startfile.match(line)
+        if res and obdump[res.group(1)].has_key(res.group(3)):
+            offset = int(res.group(2),16)
+            fname = res.group(3)
+            symbols = obdump[res.group(1)][fname]
+            symbols.sort(sorter)
+            for addr,symbol in symbols:
+                value = fname + ':' + symbol
+                data = struct.pack(symtabfmt,addr+offset,value[:MAXSTRING])
+                out.write(data)
+    out.write(struct.pack(symtabfmt,0,''))
+def main():
+    if len(sys.argv) != 4:
+        print "Usage: %s <kernel.map> <nm dump> <output.bin>" % sys.argv[0]
+        sys.exit(1)
+    kmapf = open(sys.argv[1],'r')
+    obmapf = open(sys.argv[2],'r')
+    out = open(sys.argv[3],'w')
+    generate(kmapf,obmapf,out)
+    kmapf.close()
+    obmapf.close()
+    out.close()
+if __name__ == '__main__':
+    main()
 Property changes:
 Added: svn:executable
 +*
 \ No newline at end of property

 /tags/0.2.0.2/kernel/kernel.config
 ,0 → 1,147
+## General configuration directives
+# Architecture
+@ "amd64" AMD64/Intel EM64T
+@ "ia32" Intel IA-32
+@ "ia64" Intel IA-64
+@ "mips32" MIPS 32-bit
+@ "ppc32" PowerPC 32-bit
+@ "ppc64" PowerPC 64-bit
+@ "sparc64" Sun UltraSPARC
+! ARCH (choice)
+# IA32 Compiler
+@ "cross" Cross-compiler
+@ "native" Native
+! [ARCH=ia32] IA32_COMPILER (choice)
+% [ARCH=ia32] SAVEAS IA32_COMPILER COMPILER
+# AMD64 Compiler
+@ "cross" Cross-compiler
+@ "native" Native
+! [ARCH=amd64] AMD64_COMPILER (choice)
+% [ARCH=amd64] SAVEAS AMD64_COMPILER COMPILER
+# Compiler
+@ "cross" Cross-compiler
+@ "native" Native
+! [(ARCH!=amd64)&(ARCH!=ia32)] OTHER_COMPILER (choice)
+% [(ARCH!=amd64)&(ARCH!=ia32)] SAVEAS OTHER_COMPILER COMPILER
+# CPU type
+@ "pentium4" Pentium 4
+@ "pentium3" Pentium 3
+@ "athlon-xp" Athlon XP
+@ "athlon-mp" Athlon MP
+@ "prescott" Prescott
+! [ARCH=ia32] IA32_CPU (choice)
+# MIPS Machine type
+@ "msim" MSIM Simulator
+@ "simics" Virtutech Simics simulator
+@ "lgxemul" GXEmul Little Endian
+@ "bgxemul" GXEmul Big Endian
+@ "indy" SGI Indy
+! [ARCH=mips32] MIPS_MACHINE (choice)
+# Framebuffer support
+! [(ARCH=mips32&MIPS_MACHINE=lgxemul)|(ARCH=mips32&MIPS_MACHINE=bgxemul)|(ARCH=ia32)|(ARCH=amd64)] CONFIG_FB (y/n)
+# Framebuffer width
+@ "320"
+@ "640"
+@ "800"
+@ "1024"
+@ "1152"
+@ "1280"
+@ "1400"
+@ "1440"
+@ "1600"
+@ "2048"
+! [(ARCH=ia32|ARCH=amd64)&CONFIG_FB=y] CONFIG_VESA_WIDTH (choice)
+# Framebuffer height
+@ "200"
+@ "240"
+@ "400"
+@ "480"
+@ "600"
+@ "768"
+@ "852"
+@ "900"
+@ "960"
+@ "1024"
+@ "1050"
+@ "1200"
+@ "1536"
+! [(ARCH=ia32|ARCH=amd64)&CONFIG_FB=y] CONFIG_VESA_HEIGHT (choice)
+# Framebuffer depth
+@ "8"
+@ "16"
+@ "24"
+! [(ARCH=ia32|ARCH=amd64)&CONFIG_FB=y] CONFIG_VESA_BPP (choice)
+# Support for SMP
+! [ARCH=ia32|ARCH=amd64] CONFIG_SMP (y/n)
+# Improved support for hyperthreading
+! [(ARCH=ia32|ARCH=amd64)&CONFIG_SMP=y] CONFIG_HT (y/n)
+# Simics BIOS AP boot fix
+! [(ARCH=ia32|ARCH=amd64)&CONFIG_SMP=y] CONFIG_SIMICS_FIX (y/n)
+# Lazy FPU context switching
+! [(ARCH=mips32&MIPS_MACHINE!=msim&MIPS_MACHINE!=simics)|ARCH=amd64|ARCH=ia32|ARCH=ia64] CONFIG_FPU_LAZY (y/n)
+# Power off on halt
+! [ARCH=ppc32] CONFIG_POWEROFF (n/y)
+## Debugging configuration directives
+# General debuging and assert checking
+! CONFIG_DEBUG (y/n)
+# Deadlock detection support for spinlocks
+! [CONFIG_DEBUG=y&CONFIG_SMP=y] CONFIG_DEBUG_SPINLOCK (y/n)
+# Watchpoint on rewriting AS with zero
+! [CONFIG_DEBUG=y&(ARCH=amd64|ARCH=ia32)] CONFIG_DEBUG_AS_WATCHPOINT (y/n)
+# Save all interrupt registers
+! [CONFIG_DEBUG=y&(ARCH=amd64|ARCH=mips32|ARCH=ia32)] CONFIG_DEBUG_ALLREGS (y/n)
+# Use VHPT
+! [ARCH=ia64] CONFIG_VHPT (y/n)
+## Run-time configuration directives
+# Kernel test type
+@ "" No test
+@ "atomic/atomic1" Test of atomic operations.
+@ "btree/btree1" B-tree test.
+@ "synch/rwlock1" Read write test 1
+@ "synch/rwlock2" Read write test 2
+@ "synch/rwlock3" Read write test 3
+@ "synch/rwlock4" Read write test 4
+@ "synch/rwlock5" Read write test 5
+@ "synch/semaphore1" Semaphore test 1
+@ "synch/semaphore2" Sempahore test 2
+@ [ARCH=ia32|ARCH=amd64|ARCH=ia64] "fpu/fpu1" Intel fpu test 1
+@ [ARCH=ia32|ARCH=amd64] "fpu/sse1" Intel Sse test 1
+@ [ARCH=mips32&MIPS_MACHINE!=msim&MIPS_MACHINE!=simics] "fpu/mips1" Mips FPU test 1
+@ "print/print1" Printf test 1
+@ "thread/thread1" Thread test 1
+@ "mm/mapping1" Mapping test 1
+@ "mm/falloc1" Frame Allocation test 1
+@ "mm/falloc2" Frame Allocation test 2
+@ "mm/slab1" SLAB test1 - No CPU-cache
+@ "mm/slab2" SLAB test2 - SMP CPU cache
+@ "fault/fault1" Write to NULL (maybe page fault)
+@ "sysinfo" Sysinfo fill and dump test
+@ [ARCH=ia64] "mm/purge1" Itanium TLB purge test
+@ [ARCH=mips32] "debug/mips1" Mips breakpoint-debug test
+! CONFIG_TEST (choice)

 /tags/0.2.0.2/kernel/doc/doxygroups.h
 ,0 → 1,390
+/* Definitions of modules and its relations for generating Doxygen documentation */
+/** @defgroup genericadt Data types
+ * @ingroup kernel
+ */
+/** @defgroup main Kernel initialization
+ * @ingroup others
+ */
+/** @defgroup genericconsole Kernel console
+ * @ingroup others
+ */
+/**
+  * @defgroup time Time management
+  * @ingroup kernel
+  */
+/**
+  * @defgroup proc Scheduling
+  * @ingroup kernel
+  */
+    /** @defgroup genericproc generic
+    * @ingroup proc
+    */
+    /**
+     * @cond amd64
+     * @defgroup amd64proc amd64
+     * @ingroup proc
+     * @endcond
+     */
+    /**
+     * @cond ia32
+     * @defgroup ia32proc ia32
+     * @ingroup proc
+     * @endcond
+     */
+    /**
+     * @cond ia64
+     * @defgroup ia64proc ia64
+     * @ingroup proc
+     * @endcond
+     */
+    /**
+     * @cond mips32
+     * @defgroup mips32proc mips32
+     * @ingroup proc
+     * @endcond
+     */
+    /**
+     * @cond ppc32
+     * @defgroup ppc32proc ppc32
+     * @ingroup proc
+     * @endcond
+     */
+    /**
+     * @cond ppc64
+     * @defgroup ppc64proc ppc64
+     * @ingroup proc
+     * @endcond
+     */
+    /**
+     * @cond sparc64
+     * @defgroup sparc64proc sparc64
+     * @ingroup proc
+     * @endcond
+     */
+/** @defgroup sync Synchronization
+ * @ingroup kernel
+ */
+ /** @defgroup mm Memory management
+  * @ingroup kernel
+  */
+    /**
+     * @defgroup genericmm generic
+     * @ingroup mm
+     */
+    /**
+     * @defgroup genarchmm genarch
+     * @ingroup mm
+     */
+    /**
+     * @cond amd64
+     * @defgroup amd64mm amd64
+     * @ingroup mm
+     * @endcond
+     */
+    /**
+     * @cond ia32
+     * @defgroup ia32mm ia32
+     * @ingroup mm
+     * @endcond
+     */
+    /**
+     * @cond ia64
+     * @defgroup ia64mm ia64
+     * @ingroup mm
+     * @endcond
+     */
+    /**
+     * @cond mips32
+     * @defgroup mips32mm mips32
+     * @ingroup mm
+     * @endcond
+     */
+    /**
+     * @cond ppc32
+     * @defgroup ppc32mm ppc32
+     * @ingroup mm
+     * @endcond
+     */
+    /**
+     * @cond ppc64
+     * @defgroup ppc64mm ppc64
+     * @ingroup mm
+     * @endcond
+     */
+    /**
+     * @cond sparc64
+     * @defgroup sparc64mm sparc64
+     * @ingroup mm
+     * @endcond
+     */
+/** @defgroup genericipc IPC
+ * @ingroup kernel
+ */
+/** @defgroup genericklog KLog
+ * @brief Kernel logging facility
+ * @ingroup genericconsole
+ */
+/** @defgroup ddi Device Driver Interface
+ * @ingroup kernel
+ */
+    /** @defgroup genericddi generic
+    * @ingroup ddi
+    */
+    /**
+     * @cond amd64
+     * @defgroup amd64ddi amd64
+     * @ingroup ddi
+     * @endcond
+     */
+    /**
+     * @cond ia32
+     * @defgroup ia32ddi ia32
+     * @ingroup ddi
+     * @endcond
+     */
+    /**
+     * @cond ia64
+     * @defgroup ia64ddi ia64
+     * @ingroup ddi
+     * @endcond
+     */
+    /**
+     * @cond mips32
+     * @defgroup mips32ddi mips32
+     * @ingroup ddi
+     * @endcond
+     */
+    /**
+     * @cond ppc32
+     * @defgroup ppc32ddi ppc32
+     * @ingroup ddi
+     * @endcond
+     */
+    /**
+     * @cond ppc64
+     * @defgroup ppc64ddi ppc64
+     * @ingroup ddi
+     * @endcond
+     */
+    /**
+     * @cond sparc64
+     * @defgroup sparc64ddi sparc64
+     * @ingroup ddi
+     * @endcond
+     */
+ /** @defgroup debug Debugging
+ * @ingroup others
+ */
+    /** @defgroup genericdebug generic
+    * @ingroup debug
+    */
+    /**
+     * @cond amd64
+     * @defgroup amd64debug ia32/amd64
+     * @ingroup debug
+     * @endcond
+     */
+    /**
+     * @cond ia32
+     * @defgroup amd64debug ia32/amd64
+     * @ingroup debug
+     * @endcond
+     */
+    /**
+     * @cond ia64
+     * @defgroup ia64debug ia64
+     * @ingroup debug
+     * @endcond
+     */
+    /**
+     * @cond mips32
+     * @defgroup mips32debug mips32
+     * @ingroup debug
+     * @endcond
+     */
+    /**
+     * @cond ppc32
+     * @defgroup ppc32debug ppc32
+     * @ingroup debug
+     * @endcond
+     */
+    /**
+     * @cond ppc64
+     * @defgroup ppc64debug ppc64
+     * @ingroup debug
+     * @endcond
+     */
+    /**
+     * @cond sparc64
+     * @defgroup sparc64debug sparc64
+     * @ingroup debug
+     * @endcond
+     */
+ /** @defgroup interrupt Interrupt handling and dispatching
+  * @ingroup kernel
+  */
+    /**
+     * @defgroup genericinterrupt generic
+     * @ingroup interrupt
+     */
+    /**
+     * @cond amd64
+     * @defgroup amd64interrupt amd64
+     * @ingroup interrupt
+     * @endcond
+     */
+    /**
+     * @cond ia32
+     * @defgroup ia32interrupt ia32
+     * @ingroup interrupt
+     * @endcond
+     */
+    /**
+     * @cond ia64
+     * @defgroup ia64interrupt ia64
+     * @ingroup interrupt
+     * @endcond
+     */
+    /**
+     * @cond mips32
+     * @defgroup mips32interrupt mips32
+     * @ingroup interrupt
+     * @endcond
+     */
+    /**
+     * @cond ppc32
+     * @defgroup ppc32interrupt ppc32
+     * @ingroup interrupt
+     * @endcond
+     */
+    /**
+     * @cond ppc64
+     * @defgroup ppc64interrupt ppc64
+     * @ingroup interrupt
+     * @endcond
+     */
+    /**
+     * @cond sparc64
+     * @defgroup sparc64interrupt sparc64
+     * @ingroup interrupt
+     * @endcond
+     */
+/** @defgroup others Miscellanea
+ * @ingroup kernel
+ */
+    /** @defgroup generic generic
+    * @ingroup others
+    */
+    /** @defgroup genarch genarch
+    * @ingroup others
+    */
+    /**
+     * @cond amd64
+     * @defgroup amd64 amd64
+     * @ingroup others
+     * @endcond
+     */
+    /**
+     * @cond ia32
+     * @defgroup ia32 ia32
+     * @ingroup others
+     * @endcond
+     */
+    /**
+     * @cond ia64
+     * @defgroup ia64 ia64
+     * @ingroup others
+     * @endcond
+     */
+    /**
+     * @cond mips32
+     * @defgroup mips32 mips32
+     * @ingroup others
+     * @endcond
+     */
+    /**
+     * @cond ppc32
+     * @defgroup ppc32 ppc32
+     * @ingroup others
+     * @endcond
+     */
+    /**
+     * @cond ppc64
+     * @defgroup ppc64 ppc64
+     * @ingroup others
+     * @endcond
+     */
+    /**
+     * @cond sparc64
+     * @defgroup sparc64 sparc64
+     * @ingroup others
+     * @endcond
+     */

 /tags/0.2.0.2/kernel/doc/BUGS_FOUND
 ,0 → 1,23
+During development of this operating system, there were found bugs in:
+Simics
+======
+- ia32 BIOS rewrites memory during AP start in SMP environment (#3351)
+- ia32 Simics does not report #GP when EFER.NXE is 0 and finds NX page (#4214)
+- incorrect MIPS instructions MSUB, MSUBU
+Bochs
+=====
+- FXSAVE/FXRSTOR not working correctly with XMM registers (patch #1282033)
+Msim
+====
+- Incorrect interpretation of lwl/lwr/swl/swr instructions
+- Omitted excMod case in write_proc_mem()
+- Incorrect signed multiplication
+Gcc
+===
+- Incorrect generation of unaligned data access instructions
+  (lwl/lwr/swl/swr) when using mipsel- target and -EB(big endian)
+  compilation, -O2 (#23824)

 /tags/0.2.0.2/kernel/doc/arch/ia64
 ,0 → 1,16
+ia64 port
+=========
+ia64 port is the third port of SPARTAN originally written by Jakub Jermar.
+It is still in its early stages. It runs on HP Ski simulator of IA-64 architecture.
+HARDWARE REQUIREMENTS
+        o no real hardware supported
+EMULATORS AND VIRTUALIZERS
+        o ski
+TOOLCHAIN REQUIREMENTS
+        o binutils 2.15, 2.16, 2.16.1
+    o gcc 4.0.0, 4.0.1, 4.1.0, 4.1.1
+        o older versions may do as well, but are now obsoleted

 /tags/0.2.0.2/kernel/doc/arch/ppc32
 ,0 → 1,16
+ppc32 port
+==========
+ppc32 port is the fourth port of SPARTAN, originally written by Martin Decky.
+The goal is to support 32-bit PowerPC architecture.
+So far, it runs only in emulator.
+HARDWARE REQUIREMENTS
+        o no real hardware supported
+EMULATORS AND VIRTUALIZERS
+        o PearPC
+TOOLCHAIN REQUIREMENTS
+        o binutils 2.16
+    o gcc 4.0.1, 4.1.0, 4.1.1

 /tags/0.2.0.2/kernel/doc/arch/amd64
 ,0 → 1,34
+amd64 port
+==========
+The fifth port, amd64 port, was originally written by Ondrej Palkovsky.
+The goal is to support AMD64 and Intel Extended Memory 64 Technology PC's.
+The port makes use of portable parts of ia32.
+Both uniprocessors and multiprocessors are supported.
+The kernel runs on real hardware and in simulators too.
+HARDWARE REQUIREMENTS
+        o AMD64 architecture processor
+    o Intel Extended Memory 64 Technology processor
+CPU
+    o Intel Xeon with Intel Extended Memory 64 Technology
+SMP COMPATIBILITY
+        o Bochs 2.2.1 - 2.2.6
+                o 2x-8x AMD64 CPU
+        o Simics 2.2.19
+                o 2x-15x AMD hammer CPU
+    o QEMU 0.8.0 - QEMU 0.8.1
+        o 2x-15x CPU
+    o HP ProLiant ML350 (HyperThreading)
+EMULATORS AND VIRTUALIZERS
+        o Bochs 2.2.6
+        o Simics 2.2.19
+    o QEMU 0.8.1
+TOOLCHAIN REQUIREMENTS
+    o binutils 2.16, 2.16.1
+    o gcc 4.0.1, 4.1.0, 4.1.1
+    o older versions may do as well, but are now obsoleted

 /tags/0.2.0.2/kernel/doc/arch/mips32
 ,0 → 1,24
+mips32 port
+===========
+mips32 is the second port of SPARTAN kernel originally written by Jakub Jermar.
+It was first developed to run on MIPS R4000 32-bit simulator.
+Now it can run on real hardware as well.
+It can be compiled and run either as little- or big-endian.
+HARDWARE REQUIREMENTS
+        o SGI Indy R4600
+        o emulated MIPS 4K CPU
+CPU
+    o QED R4600
+EMULATORS AND VIRTUALIZERS
+    o msim 1.2.8
+        o gxemul - both big and little endian
+        o simics 2.2.19
+TOOLCHAIN REQUIREMENTS
+        o binutils 2.16, 2.16.1
+    o gcc 4.0.1, 4.1.0, 4.1.1
+        o older versions may do as well, but are now obsoleted

 /tags/0.2.0.2/kernel/doc/arch/ia32
 ,0 → 1,40
+ia32 port
+=========
+ia32 port is the oldest and the most advanced one.
+It was originally written by Jakub Jermar.
+It is meant to support ordinary PC's based on IA-32 architecture.
+Both uniprocessor and multiprocessor modes are supported.
+It runs both in emulated environment and on real hardware.
+HARDWARE REQUIREMENTS
+        o IA-32 processor (Pentium and successors)
+SMP COMPATIBILITY
+        o Bochs 2.0.2 - Bochs 2.2.6
+                o 2x-8x 686 CPU
+        o Simics 2.0.28 - Simics 2.2.19
+                o 2x-15x Pentium 4 CPU
+    o VMware Workstation 5.5
+        o 2x CPU
+    o QEMU 0.8.0 - QEMU 0.8.1
+        o 2x-15x CPU
+        o ASUS P/I-P65UP5 + ASUS C-P55T2D REV. 1.41
+                o 2x 200Mhz Pentium CPU
+        o ASUS PCH-DL
+                o 2x 3000Mhz Pentium 4 Xeon (HT) CPU
+        o MSI K7D Master-L
+            o 2x 2100MHz Athlon MP CPU
+    o ECS 865PE-A REV : 2.0
+        o 1x 2800MHz Pentium 4 Prescott (HT) CPU
+EMULATORS AND VIRTUALIZERS
+        o Bochs 2.0.2 - Bochs 2.2.6
+        o VMware Workstation 4, VMware Workstation 5, VMware Workstation 5.5
+        o Simics 2.2.19
+    o QEMU 0.8.0 - QEMU 0.8.1
+TOOLCHAIN REQUIREMENTS
+        o binutils 2.15, 2.16, 2.16.1
+    o gcc 3.3.5, 4.0.1, 4.1.0, 4.1.1
+        o older versions may do as well, but are now obsoleted

 /tags/0.2.0.2/kernel/doc/arch/sparc64
 ,0 → 1,8
+sparc64 port
+============
+Currently, this porting effort is subject to
+Jakub Jermar's work on his master thesis.
+The goal is to provide support for UltraSPARC
+implementation of SPARC V9 architecture.

 /tags/0.2.0.2/kernel/doc/mm
 ,0 → 1,87
+Memory management
+=================
+. Virtual Address Translation
+.1 Hierarchical 4-level per address space page tables
+SPARTAN kernel deploys generic interface for 4-level page tables
+for these architectures: amd64, ia32, mips32 and ppc32. In this
+setting, page tables are hierarchical and are not shared by
+address spaces (i.e. one set of page tables per address space).
+ VADDR
+ +-----------------------------------------------------------------------------+
+ |   PTL0_INDEX  |   PTL1_INDEX   |   PTL2_INDEX   |   PTL3_INDEX   |   OFFSET |
+ +-----------------------------------------------------------------------------+
+ PTL0                   PTL1                   PTL2                   PTL3
+ +--------+             +--------+             +--------+             +--------+
+ |        |             |        |             |  PTL3  | -----\      |        |
+ |        |             |        |             +--------+      |      |        |
+ |        |             +--------+             |        |      |      |        |
+ |        |             |  PTL2  | -----\      |        |      |      |        |
+ |        |             +--------+      |      |        |      |      |        |
+ |        |             |        |      |      |        |      |      +--------+
+ +--------+             |        |      |      |        |      |      | FRAME  |
+ |  PTL1  | -----\      |        |      |      |        |      |      +--------+
+ +--------+      |      |        |      |      |        |      |      |        |
+ |        |      |      |        |      |      |        |      |      |        |
+ |        |      |      |        |      |      |        |      |      |        |
+ +--------+      \----> +--------+      \----> +--------+      \----> +--------+
+     ^
+     |
+     |
+ +--------+
+ |  PTL0  |
+ +--------+
+PTL0        Page Table Level 0 (Page Directory)
+PTL1        Page Table Level 1
+PTL2        Page Table Level 2
+PTL3        Page Table Level 3
+PTL0_INDEX  Index into PTL0
+PTL1_INDEX  Index into PTL1
+PTL2_INDEX  Index into PTL2
+PTL3_INDEX  Index into PTL3
+VADDR       Virtual address for which mapping is looked up
+FRAME       Physical address of memory frame to which VADDR is mapped
+On architectures whose hardware has fewer levels, PTL2 and, if need be, PTL1 are
+left out. TLB-only architectures are to define custom format for software page
+tables.
+.2 Single global page hash table
+Generic page hash table interface is deployed on 64-bit architectures without
+implied hardware support for hierarchical page tables, i.e. ia64 and sparc64.
+There is only one global page hash table in the system shared by all address
+spaces.
+. Memory allocators
+.1 General allocator
+'malloc' function accepts flags as a second argument. The flags are directly
+passed to the underlying frame_alloc function.
+) If the flags parameter contains FRAME_ATOMIC, the allocator will not sleep.
+   The allocator CAN return NULL, when memory is not directly available.
+   The caller MUST check if NULL was not returned
+) If the flags parameter does not contain FRAME_ATOMIC, the allocator
+   will never return NULL, but it CAN sleep indefinitely. The caller
+   does not have to check the return value.
+) The maximum size that can be allocated using malloc is 128K
+Rules 1) and 2) apply to slab_alloc as well. Using SLAB allocator
+to allocate too large values is not recommended.

/tags/0.2.0.2/kernel/doc/AUTHORS
0,0 → 1,7
Jakub Jermar <jermar@helenos.eu>
Ondrej Palkovsky <palkovsky@helenos.eu>
Martin Decky <decky@helenos.eu>
Jakub Vana <vana@helenos.eu>
Josef Cejka <cejka@helenos.eu>
Sergey Bondari <bondari@helenos.eu>

 /tags/0.2.0.2/kernel/doc/build
 ,0 → 1,14
+Following make targets are supported:
+make, make all
+    - Check configuration, build
+make config
+    - Start kernel configuration program
+make clean
+    - Clean build temporary files
+make distclean
+    - Clean everything including configuration

 /tags/0.2.0.2/kernel/doc/synchronization
 ,0 → 1,29
+                                 SPINNING LOCKS
+                spinlock_lock, spinlock_trylock, spinlock_unlock
+                                 +------------+
+                                 | spinlock_t |
+                                 +------------+
+                                   WAIT QUEUES
+                         waitq_sleep_timeout, waitq_wakeup
+                                   +---------+
+                                   | waitq_t |
+                       +---------+
+                  /           \
+               SEMAPHORES        /             \  CONDITION VARIABLES
+ semaphore_down_timeout, semaphore_up    condvar_wait_timeout, condvar_signal
+            +--------------+   /                 \   +-----------+
+            | semaphore_t  |<-+                   +->| condvar_t |
+            +--------------+                         +-----------+
+                   |                                       ^
+           |                                       |
+                   |                                +------+
+                   V                               /
+                MUTEXES                           / READERS/WRITERS LOCKS
+    mutex_lock_timeout, mutex_unlock   rwlock_reader/writer_lock_timeout, rwlock_unlock
+              +---------+                       /        +----------+
+          | mutex_t |------------------------------->| rwlock_t |
+          +---------+                     /          +----------+
+               |                         /
+           +------------------------+

 /tags/0.2.0.2/kernel/genarch/src/acpi/madt.c
 ,0 → 1,248
+/*
+ * Copyright (C) 2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup genarch
+ * @{
+ */
+/**
+ * @file
+ * @brief   Multiple APIC Description Table (MADT) parsing.
+ */
+#include <arch/types.h>
+#include <typedefs.h>
+#include <genarch/acpi/acpi.h>
+#include <genarch/acpi/madt.h>
+#include <arch/smp/apic.h>
+#include <arch/smp/smp.h>
+#include <panic.h>
+#include <debug.h>
+#include <config.h>
+#include <print.h>
+#include <mm/slab.h>
+#include <memstr.h>
+#include <sort.h>
+struct acpi_madt *acpi_madt = NULL;
+#ifdef CONFIG_SMP
+/** Standard ISA IRQ map; can be overriden by Interrupt Source Override entries of MADT. */
+int isa_irq_map[] = { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 };
+static void madt_l_apic_entry(struct madt_l_apic *la, __u32 index);
+static void madt_io_apic_entry(struct madt_io_apic *ioa, __u32 index);
+static void madt_intr_src_ovrd_entry(struct madt_intr_src_ovrd *override, __u32 index);
+static int madt_cmp(void * a, void * b);
+struct madt_l_apic *madt_l_apic_entries = NULL;
+struct madt_io_apic *madt_io_apic_entries = NULL;
+index_t madt_l_apic_entry_index = 0;
+index_t madt_io_apic_entry_index = 0;
+count_t madt_l_apic_entry_cnt = 0;
+count_t madt_io_apic_entry_cnt = 0;
+count_t cpu_count = 0;
+struct madt_apic_header * * madt_entries_index = NULL;
+int madt_entries_index_cnt = 0;
+char *entry[] = {
+    "L_APIC",
+    "IO_APIC",
+    "INTR_SRC_OVRD",
+    "NMI_SRC",
+    "L_APIC_NMI",
+    "L_APIC_ADDR_OVRD",
+    "IO_SAPIC",
+    "L_SAPIC",
+    "PLATFORM_INTR_SRC"
+};
+/*
+ * ACPI MADT Implementation of SMP configuration interface.
+ */
+static count_t madt_cpu_count(void);
+static bool madt_cpu_enabled(index_t i);
+static bool madt_cpu_bootstrap(index_t i);
+static __u8 madt_cpu_apic_id(index_t i);
+static int madt_irq_to_pin(int irq);
+struct smp_config_operations madt_config_operations = {
+    .cpu_count = madt_cpu_count,
+    .cpu_enabled = madt_cpu_enabled,
+    .cpu_bootstrap = madt_cpu_bootstrap,
+    .cpu_apic_id = madt_cpu_apic_id,
+    .irq_to_pin = madt_irq_to_pin
+};
+count_t madt_cpu_count(void)
+{
+    return madt_l_apic_entry_cnt;
+}
+bool madt_cpu_enabled(index_t i)
+{
+    ASSERT(i < madt_l_apic_entry_cnt);
+    return ((struct madt_l_apic *) madt_entries_index[madt_l_apic_entry_index + i])->flags & 0x1;
+}
+bool madt_cpu_bootstrap(index_t i)
+{
+    ASSERT(i < madt_l_apic_entry_cnt);
+    return ((struct madt_l_apic *) madt_entries_index[madt_l_apic_entry_index + i])->apic_id == l_apic_id();
+}
+__u8 madt_cpu_apic_id(index_t i)
+{
+    ASSERT(i < madt_l_apic_entry_cnt);
+    return ((struct madt_l_apic *) madt_entries_index[madt_l_apic_entry_index + i])->apic_id;
+}
+int madt_irq_to_pin(int irq)
+{
+    ASSERT(irq < sizeof(isa_irq_map)/sizeof(int));
+        return isa_irq_map[irq];
+}
+int madt_cmp(void * a, void * b)
+{
+    return
+        (((struct madt_apic_header *) a)->type > ((struct madt_apic_header *) b)->type) ?
+:
+        ((((struct madt_apic_header *) a)->type < ((struct madt_apic_header *) b)->type) ? -1 : 0);
+}
+void acpi_madt_parse(void)
+{
+    struct madt_apic_header *end = (struct madt_apic_header *) (((__u8 *) acpi_madt) + acpi_madt->header.length);
+    struct madt_apic_header *h;
+        l_apic = (__u32 *) (__native) acpi_madt->l_apic_address;
+    /* calculate madt entries */
+    for (h = &acpi_madt->apic_header[0]; h < end; h = (struct madt_apic_header *) (((__u8 *) h) + h->length)) {
+        madt_entries_index_cnt++;
+    }
+    /* create madt apic entries index array */
+    madt_entries_index = (struct madt_apic_header * *) malloc(madt_entries_index_cnt * sizeof(struct madt_apic_header * *), FRAME_ATOMIC);
+    if (!madt_entries_index)
+        panic("Memory allocation error.");
+    __u32 index = 0;
+    for (h = &acpi_madt->apic_header[0]; h < end; h = (struct madt_apic_header *) (((__u8 *) h) + h->length)) {
+        madt_entries_index[index++] = h;
+    }
+    /* Quicksort MADT index structure */
+    qsort(madt_entries_index, madt_entries_index_cnt, sizeof(__address), &madt_cmp);
+    /* Parse MADT entries */
+    for (index = 0; index < madt_entries_index_cnt - 1; index++) {
+        h = madt_entries_index[index];
+        switch (h->type) {
+            case MADT_L_APIC:
+                madt_l_apic_entry((struct madt_l_apic *) h, index);
+                break;
+            case MADT_IO_APIC:
+                madt_io_apic_entry((struct madt_io_apic *) h, index);
+                break;
+            case MADT_INTR_SRC_OVRD:
+                madt_intr_src_ovrd_entry((struct madt_intr_src_ovrd *) h, index);
+                break;
+            case MADT_NMI_SRC:
+            case MADT_L_APIC_NMI:
+            case MADT_L_APIC_ADDR_OVRD:
+            case MADT_IO_SAPIC:
+            case MADT_L_SAPIC:
+            case MADT_PLATFORM_INTR_SRC:
+                printf("MADT: skipping %s entry (type=%zd)\n", entry[h->type], h->type);
+                break;
+            default:
+                if (h->type >= MADT_RESERVED_SKIP_BEGIN && h->type <= MADT_RESERVED_SKIP_END) {
+                    printf("MADT: skipping reserved entry (type=%zd)\n", h->type);
+                }
+                if (h->type >= MADT_RESERVED_OEM_BEGIN) {
+                    printf("MADT: skipping OEM entry (type=%zd)\n", h->type);
+                }
+                break;
+        }
+    }
+    if (cpu_count)
+        config.cpu_count = cpu_count;
+}
+void madt_l_apic_entry(struct madt_l_apic *la, __u32 index)
+{
+    if (!madt_l_apic_entry_cnt++) {
+        madt_l_apic_entry_index = index;
+    }
+    if (!(la->flags & 0x1)) {
+        /* Processor is unusable, skip it. */
+        return;
+    }
+    cpu_count++;
+    apic_id_mask |= 1<<la->apic_id;
+}
+void madt_io_apic_entry(struct madt_io_apic *ioa, __u32 index)
+{
+    if (!madt_io_apic_entry_cnt++) {
+        /* remember index of the first io apic entry */
+        madt_io_apic_entry_index = index;
+        io_apic = (__u32 *) (__native) ioa->io_apic_address;
+    } else {
+        /* currently not supported */
+        return;
+    }
+}
+void madt_intr_src_ovrd_entry(struct madt_intr_src_ovrd *override, __u32 index)
+{
+    ASSERT(override->source < sizeof(isa_irq_map)/sizeof(int));
+    printf("MADT: ignoring %s entry: bus=%zd, source=%zd, global_int=%zd, flags=%#hx\n",
+        entry[override->header.type], override->bus, override->source,
+        override->global_int, override->flags);
+}
+#endif /* CONFIG_SMP */
+ /** @}
+ */

 /tags/0.2.0.2/kernel/genarch/src/acpi/acpi.c
 ,0 → 1,189
+/*
+ * Copyright (C) 2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup genarch
+ * @{
+ */
+/**
+ * @file
+ * @brief   Advanced Configuration and Power Interface (ACPI) initialization.
+ */
+#include <genarch/acpi/acpi.h>
+#include <genarch/acpi/madt.h>
+#include <arch/bios/bios.h>
+#include <mm/as.h>
+#include <mm/page.h>
+#include <print.h>
+#define RSDP_SIGNATURE      "RSD PTR "
+#define RSDP_REVISION_OFFS  15
+struct acpi_rsdp *acpi_rsdp = NULL;
+struct acpi_rsdt *acpi_rsdt = NULL;
+struct acpi_xsdt *acpi_xsdt = NULL;
+struct acpi_signature_map signature_map[] = {
+    { (__u8 *)"APIC", (void *) &acpi_madt, "Multiple APIC Description Table" }
+};
+static int rsdp_check(__u8 *rsdp) {
+    struct acpi_rsdp *r = (struct acpi_rsdp *) rsdp;
+    __u8 sum = 0;
+    int i;
+    for (i=0; i<20; i++)
+        sum += rsdp[i];
+    if (sum)
+        return 0; /* bad checksum */
+    if (r->revision == 0)
+        return 1; /* ACPI 1.0 */
+    for (; i<r->length; i++)
+        sum += rsdp[i];
+    return !sum;
+}
+int acpi_sdt_check(__u8 *sdt)
+{
+    struct acpi_sdt_header *h = (struct acpi_sdt_header *) sdt;
+    __u8 sum = 0;
+    int i;
+    for (i=0; i<h->length; i++)
+        sum += sdt[i];
+    return !sum;
+}
+static void map_sdt(struct acpi_sdt_header *sdt)
+{
+    page_mapping_insert(AS_KERNEL, (__address) sdt, (__address) sdt, PAGE_NOT_CACHEABLE);
+    map_structure((__address) sdt, sdt->length);
+}
+static void configure_via_rsdt(void)
+{
+    int i, j, cnt = (acpi_rsdt->header.length - sizeof(struct acpi_sdt_header))/sizeof(__u32);
+    for (i=0; i<cnt; i++) {
+        for (j=0; j<sizeof(signature_map)/sizeof(struct acpi_signature_map); j++) {
+            struct acpi_sdt_header *h = (struct acpi_sdt_header *) (__native) acpi_rsdt->entry[i];
+            map_sdt(h);
+            if (*((__u32 *) &h->signature[0])==*((__u32 *) &signature_map[j].signature[0])) {
+                if (!acpi_sdt_check((__u8 *) h))
+                    goto next;
+                *signature_map[j].sdt_ptr = h;
+                printf("%#zx: ACPI %s\n", *signature_map[j].sdt_ptr, signature_map[j].description);
+            }
+        }
+next:
+        ;
+    }
+}
+static void configure_via_xsdt(void)
+{
+    int i, j, cnt = (acpi_xsdt->header.length - sizeof(struct acpi_sdt_header))/sizeof(__u64);
+    for (i=0; i<cnt; i++) {
+        for (j=0; j<sizeof(signature_map)/sizeof(struct acpi_signature_map); j++) {
+            struct acpi_sdt_header *h = (struct acpi_sdt_header *) ((__address) acpi_rsdt->entry[i]);
+            map_sdt(h);
+            if (*((__u32 *) &h->signature[0])==*((__u32 *) &signature_map[j].signature[0])) {
+                if (!acpi_sdt_check((__u8 *) h))
+                    goto next;
+                *signature_map[j].sdt_ptr = h;
+                printf("%#zx: ACPI %s\n", *signature_map[j].sdt_ptr, signature_map[j].description);
+            }
+        }
+next:
+        ;
+    }
+}
+void acpi_init(void)
+{
+    __u8 *addr[2] = { NULL, (__u8 *) PA2KA(0xe0000) };
+    int i, j, length[2] = { 1024, 128*1024 };
+    __u64 *sig = (__u64 *) RSDP_SIGNATURE;
+    /*
+     * Find Root System Description Pointer
+     * 1. search first 1K of EBDA
+     * 2. search 128K starting at 0xe0000
+     */
+    addr[0] = (__u8 *) PA2KA(ebda);
+    for (i = (ebda ? 0 : 1); i < 2; i++) {
+        for (j = 0; j < length[i]; j += 16) {
+            if (*((__u64 *) &addr[i][j]) == *sig && rsdp_check(&addr[i][j])) {
+                acpi_rsdp = (struct acpi_rsdp *) &addr[i][j];
+                goto rsdp_found;
+            }
+        }
+    }
+    return;
+rsdp_found:
+    printf("%#zx: ACPI Root System Description Pointer\n", acpi_rsdp);
+    acpi_rsdt = (struct acpi_rsdt *) (__native) acpi_rsdp->rsdt_address;
+    if (acpi_rsdp->revision) acpi_xsdt = (struct acpi_xsdt *) ((__address) acpi_rsdp->xsdt_address);
+    if (acpi_rsdt) map_sdt((struct acpi_sdt_header *) acpi_rsdt);
+    if (acpi_xsdt) map_sdt((struct acpi_sdt_header *) acpi_xsdt);
+    if (acpi_rsdt && !acpi_sdt_check((__u8 *) acpi_rsdt)) {
+        printf("RSDT: %s\n", "bad checksum");
+        return;
+    }
+    if (acpi_xsdt && !acpi_sdt_check((__u8 *) acpi_xsdt)) {
+        printf("XSDT: %s\n", "bad checksum");
+        return;
+    }
+    if (acpi_xsdt) configure_via_xsdt();
+    else if (acpi_rsdt) configure_via_rsdt();
+}
+ /** @}
+ */

 /tags/0.2.0.2/kernel/genarch/src/i8042/i8042.c
 ,0 → 1,578
+/*
+ * Copyright (C) 2001-2004 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup genarch
+ * @{
+ */
+/** @file
+ */
+#include <genarch/i8042/i8042.h>
+#include <arch/drivers/i8042.h>
+#include <arch/interrupt.h>
+#include <cpu.h>
+#include <arch/asm.h>
+#include <arch.h>
+#include <synch/spinlock.h>
+#include <typedefs.h>
+#include <console/chardev.h>
+#include <console/console.h>
+#include <macros.h>
+#include <interrupt.h>
+/**
+ * i8042 processor driver.
+ * It takes care of low-level keyboard functions.
+ */
+/** Keyboard commands. */
+#define KBD_ENABLE  0xf4
+#define KBD_DISABLE 0xf5
+#define KBD_ACK     0xfa
+/*
+ * 60  Write 8042 Command Byte: next data byte written to port 60h is
+ *     placed in 8042 command register. Format:
+ *
+ *    |7|6|5|4|3|2|1|0|8042 Command Byte
+ *     | | | | | | | `---- 1=enable output register full interrupt
+ *     | | | | | | `----- should be 0
+ *     | | | | | `------ 1=set status register system, 0=clear
+ *     | | | | `------- 1=override keyboard inhibit, 0=allow inhibit
+ *     | | | `-------- disable keyboard I/O by driving clock line low
+ *     | | `--------- disable auxiliary device, drives clock line low
+ *     | `---------- IBM scancode translation 0=AT, 1=PC/XT
+ *     `----------- reserved, should be 0
+ */
+#define i8042_SET_COMMAND   0x60
+#define i8042_COMMAND       0x49
+#define i8042_BUFFER_FULL_MASK  0x01
+#define i8042_WAIT_MASK     0x02
+#define SPECIAL     '?'
+#define KEY_RELEASE 0x80
+/**
+ * These codes read from i8042 data register are silently ignored.
+ */
+#define IGNORE_CODE 0x7f
+static void key_released(__u8 sc);
+static void key_pressed(__u8 sc);
+static char key_read(chardev_t *d);
+#define PRESSED_SHIFT       (1<<0)
+#define PRESSED_CAPSLOCK    (1<<1)
+#define LOCKED_CAPSLOCK     (1<<0)
+#define ACTIVE_READ_BUFF_SIZE 16    /* Must be power of 2 */
+static __u8 active_read_buff[ACTIVE_READ_BUFF_SIZE];
+SPINLOCK_INITIALIZE(keylock);       /**< keylock protects keyflags and lockflags. */
+static volatile int keyflags;       /**< Tracking of multiple keypresses. */
+static volatile int lockflags;      /**< Tracking of multiple keys lockings. */
+static void i8042_suspend(chardev_t *);
+static void i8042_resume(chardev_t *);
+static chardev_t kbrd;
+static chardev_operations_t ops = {
+    .suspend = i8042_suspend,
+    .resume = i8042_resume,
+    .read = key_read
+};
+/** Primary meaning of scancodes. */
+static char sc_primary_map[] = {
+    SPECIAL, /* 0x00 */
+    SPECIAL, /* 0x01 - Esc */
+    '1', '2', '3', '4', '5', '6', '7', '8', '9', '0', '-', '=',
+    '\b', /* 0x0e - Backspace */
+    '\t', 'q', 'w', 'e', 'r', 't', 'y', 'u', 'i', 'o', 'p', '[', ']', '\n',
+    SPECIAL, /* 0x1d - LCtrl */
+    'a', 's', 'd', 'f', 'g', 'h', 'j', 'k', 'l', ';', '\'',
+    '`',
+    SPECIAL, /* 0x2a - LShift */
+    '\\',
+    'z', 'x', 'c', 'v', 'b', 'n', 'm', ',', '.', '/',
+    SPECIAL, /* 0x36 - RShift */
+    '*',
+    SPECIAL, /* 0x38 - LAlt */
+    ' ',
+    SPECIAL, /* 0x3a - CapsLock */
+    SPECIAL, /* 0x3b - F1 */
+    SPECIAL, /* 0x3c - F2 */
+    SPECIAL, /* 0x3d - F3 */
+    SPECIAL, /* 0x3e - F4 */
+    SPECIAL, /* 0x3f - F5 */
+    SPECIAL, /* 0x40 - F6 */
+    SPECIAL, /* 0x41 - F7 */
+    SPECIAL, /* 0x42 - F8 */
+    SPECIAL, /* 0x43 - F9 */
+    SPECIAL, /* 0x44 - F10 */
+    SPECIAL, /* 0x45 - NumLock */
+    SPECIAL, /* 0x46 - ScrollLock */
+    '7', '8', '9', '-',
+    '4', '5', '6', '+',
+    '1', '2', '3',
+    '0', '.',
+    SPECIAL, /* 0x54 - Alt-SysRq */
+    SPECIAL, /* 0x55 - F11/F12/PF1/FN */
+    SPECIAL, /* 0x56 - unlabelled key next to LAlt */
+    SPECIAL, /* 0x57 - F11 */
+    SPECIAL, /* 0x58 - F12 */
+    SPECIAL, /* 0x59 */
+    SPECIAL, /* 0x5a */
+    SPECIAL, /* 0x5b */
+    SPECIAL, /* 0x5c */
+    SPECIAL, /* 0x5d */
+    SPECIAL, /* 0x5e */
+    SPECIAL, /* 0x5f */
+    SPECIAL, /* 0x60 */
+    SPECIAL, /* 0x61 */
+    SPECIAL, /* 0x62 */
+    SPECIAL, /* 0x63 */
+    SPECIAL, /* 0x64 */
+    SPECIAL, /* 0x65 */
+    SPECIAL, /* 0x66 */
+    SPECIAL, /* 0x67 */
+    SPECIAL, /* 0x68 */
+    SPECIAL, /* 0x69 */
+    SPECIAL, /* 0x6a */
+    SPECIAL, /* 0x6b */
+    SPECIAL, /* 0x6c */
+    SPECIAL, /* 0x6d */
+    SPECIAL, /* 0x6e */
+    SPECIAL, /* 0x6f */
+    SPECIAL, /* 0x70 */
+    SPECIAL, /* 0x71 */
+    SPECIAL, /* 0x72 */
+    SPECIAL, /* 0x73 */
+    SPECIAL, /* 0x74 */
+    SPECIAL, /* 0x75 */
+    SPECIAL, /* 0x76 */
+    SPECIAL, /* 0x77 */
+    SPECIAL, /* 0x78 */
+    SPECIAL, /* 0x79 */
+    SPECIAL, /* 0x7a */
+    SPECIAL, /* 0x7b */
+    SPECIAL, /* 0x7c */
+    SPECIAL, /* 0x7d */
+    SPECIAL, /* 0x7e */
+    SPECIAL, /* 0x7f */
+};
+/** Secondary meaning of scancodes. */
+static char sc_secondary_map[] = {
+    SPECIAL, /* 0x00 */
+    SPECIAL, /* 0x01 - Esc */
+    '!', '@', '#', '$', '%', '^', '&', '*', '(', ')', '_', '+',
+    SPECIAL, /* 0x0e - Backspace */
+    '\t', 'Q', 'W', 'E', 'R', 'T', 'Y', 'U', 'I', 'O', 'P', '{', '}', '\n',
+    SPECIAL, /* 0x1d - LCtrl */
+    'A', 'S', 'D', 'F', 'G', 'H', 'J', 'K', 'L', ':', '"',
+    '~',
+    SPECIAL, /* 0x2a - LShift */
+    '|',
+    'Z', 'X', 'C', 'V', 'B', 'N', 'M', '<', '>', '?',
+    SPECIAL, /* 0x36 - RShift */
+    '*',
+    SPECIAL, /* 0x38 - LAlt */
+    ' ',
+    SPECIAL, /* 0x3a - CapsLock */
+    SPECIAL, /* 0x3b - F1 */
+    SPECIAL, /* 0x3c - F2 */
+    SPECIAL, /* 0x3d - F3 */
+    SPECIAL, /* 0x3e - F4 */
+    SPECIAL, /* 0x3f - F5 */
+    SPECIAL, /* 0x40 - F6 */
+    SPECIAL, /* 0x41 - F7 */
+    SPECIAL, /* 0x42 - F8 */
+    SPECIAL, /* 0x43 - F9 */
+    SPECIAL, /* 0x44 - F10 */
+    SPECIAL, /* 0x45 - NumLock */
+    SPECIAL, /* 0x46 - ScrollLock */
+    '7', '8', '9', '-',
+    '4', '5', '6', '+',
+    '1', '2', '3',
+    '0', '.',
+    SPECIAL, /* 0x54 - Alt-SysRq */
+    SPECIAL, /* 0x55 - F11/F12/PF1/FN */
+    SPECIAL, /* 0x56 - unlabelled key next to LAlt */
+    SPECIAL, /* 0x57 - F11 */
+    SPECIAL, /* 0x58 - F12 */
+    SPECIAL, /* 0x59 */
+    SPECIAL, /* 0x5a */
+    SPECIAL, /* 0x5b */
+    SPECIAL, /* 0x5c */
+    SPECIAL, /* 0x5d */
+    SPECIAL, /* 0x5e */
+    SPECIAL, /* 0x5f */
+    SPECIAL, /* 0x60 */
+    SPECIAL, /* 0x61 */
+    SPECIAL, /* 0x62 */
+    SPECIAL, /* 0x63 */
+    SPECIAL, /* 0x64 */
+    SPECIAL, /* 0x65 */
+    SPECIAL, /* 0x66 */
+    SPECIAL, /* 0x67 */
+    SPECIAL, /* 0x68 */
+    SPECIAL, /* 0x69 */
+    SPECIAL, /* 0x6a */
+    SPECIAL, /* 0x6b */
+    SPECIAL, /* 0x6c */
+    SPECIAL, /* 0x6d */
+    SPECIAL, /* 0x6e */
+    SPECIAL, /* 0x6f */
+    SPECIAL, /* 0x70 */
+    SPECIAL, /* 0x71 */
+    SPECIAL, /* 0x72 */
+    SPECIAL, /* 0x73 */
+    SPECIAL, /* 0x74 */
+    SPECIAL, /* 0x75 */
+    SPECIAL, /* 0x76 */
+    SPECIAL, /* 0x77 */
+    SPECIAL, /* 0x78 */
+    SPECIAL, /* 0x79 */
+    SPECIAL, /* 0x7a */
+    SPECIAL, /* 0x7b */
+    SPECIAL, /* 0x7c */
+    SPECIAL, /* 0x7d */
+    SPECIAL, /* 0x7e */
+    SPECIAL, /* 0x7f */
+};
+static void i8042_interrupt(int n, istate_t *istate);
+static void i8042_wait(void);
+static iroutine oldvector;
+/** Initialize keyboard and service interrupts using kernel routine */
+void i8042_grab(void)
+{
+    oldvector = exc_register(VECTOR_KBD, "i8042_interrupt", (iroutine) i8042_interrupt);
+    i8042_wait();
+    i8042_command_write(i8042_SET_COMMAND);
+    i8042_wait();
+    i8042_data_write(i8042_COMMAND);
+    i8042_wait();
+}
+/** Resume the former interrupt vector */
+void i8042_release(void)
+{
+    if (oldvector)
+        exc_register(VECTOR_KBD, "user_interrupt", oldvector);
+}
+/** Initialize i8042. */
+void i8042_init(void)
+{
+    int i;
+    i8042_grab();
+        /* Prevent user from accidentaly releasing calling i8042_resume
+     * and disabling keyboard
+     */
+    oldvector = NULL;
+    trap_virtual_enable_irqs(1<<IRQ_KBD);
+    chardev_initialize("i8042_kbd", &kbrd, &ops);
+    stdin = &kbrd;
+    /*
+     * Clear input buffer.
+     * Number of iterations is limited to prevent infinite looping.
+     */
+    for (i = 0; (i8042_status_read() & i8042_BUFFER_FULL_MASK) && i < 100; i++) {
+        i8042_data_read();
+    }
+}
+/** Process i8042 interrupt.
+ *
+ * @param n Interrupt vector.
+ * @param istate Interrupted state.
+ */
+void i8042_interrupt(int n, istate_t *istate)
+{
+    __u8 x;
+    trap_virtual_eoi();
+    x = i8042_data_read();
+    if (x & KEY_RELEASE)
+        key_released(x ^ KEY_RELEASE);
+    else
+        key_pressed(x);
+}
+/** Wait until the controller reads its data. */
+void i8042_wait(void) {
+    while (i8042_status_read() & i8042_WAIT_MASK) {
+        /* wait */
+    }
+}
+/** Process release of key.
+ *
+ * @param sc Scancode of the key being released.
+ */
+void key_released(__u8 sc)
+{
+    spinlock_lock(&keylock);
+    switch (sc) {
+        case SC_LSHIFT:
+        case SC_RSHIFT:
+        keyflags &= ~PRESSED_SHIFT;
+        break;
+        case SC_CAPSLOCK:
+        keyflags &= ~PRESSED_CAPSLOCK;
+        if (lockflags & LOCKED_CAPSLOCK)
+            lockflags &= ~LOCKED_CAPSLOCK;
+        else
+            lockflags |= LOCKED_CAPSLOCK;
+        break;
+        default:
+        break;
+    }
+    spinlock_unlock(&keylock);
+}
+/** Process keypress.
+ *
+ * @param sc Scancode of the key being pressed.
+ */
+void key_pressed(__u8 sc)
+{
+    char *map = sc_primary_map;
+    char ascii = sc_primary_map[sc];
+    bool shift, capslock;
+    bool letter = false;
+    spinlock_lock(&keylock);
+    switch (sc) {
+    case SC_LSHIFT:
+    case SC_RSHIFT:
+            keyflags |= PRESSED_SHIFT;
+        break;
+    case SC_CAPSLOCK:
+        keyflags |= PRESSED_CAPSLOCK;
+        break;
+    case SC_SPEC_ESCAPE:
+        break;
+    case SC_LEFTARR:
+        chardev_push_character(&kbrd, 0x1b);
+        chardev_push_character(&kbrd, 0x5b);
+        chardev_push_character(&kbrd, 0x44);
+        break;
+    case SC_RIGHTARR:
+        chardev_push_character(&kbrd, 0x1b);
+        chardev_push_character(&kbrd, 0x5b);
+        chardev_push_character(&kbrd, 0x43);
+        break;
+    case SC_UPARR:
+        chardev_push_character(&kbrd, 0x1b);
+        chardev_push_character(&kbrd, 0x5b);
+        chardev_push_character(&kbrd, 0x41);
+        break;
+    case SC_DOWNARR:
+        chardev_push_character(&kbrd, 0x1b);
+        chardev_push_character(&kbrd, 0x5b);
+        chardev_push_character(&kbrd, 0x42);
+        break;
+    case SC_HOME:
+        chardev_push_character(&kbrd, 0x1b);
+        chardev_push_character(&kbrd, 0x4f);
+        chardev_push_character(&kbrd, 0x48);
+        break;
+    case SC_END:
+        chardev_push_character(&kbrd, 0x1b);
+        chardev_push_character(&kbrd, 0x4f);
+        chardev_push_character(&kbrd, 0x46);
+        break;
+    case SC_DELETE:
+        chardev_push_character(&kbrd, 0x1b);
+        chardev_push_character(&kbrd, 0x5b);
+        chardev_push_character(&kbrd, 0x33);
+        chardev_push_character(&kbrd, 0x7e);
+        break;
+    default:
+            letter = is_lower(ascii);
+        capslock = (keyflags & PRESSED_CAPSLOCK) || (lockflags & LOCKED_CAPSLOCK);
+        shift = keyflags & PRESSED_SHIFT;
+        if (letter && capslock)
+            shift = !shift;
+        if (shift)
+            map = sc_secondary_map;
+        chardev_push_character(&kbrd, map[sc]);
+        break;
+    }
+    spinlock_unlock(&keylock);
+}
+/* Called from getc(). */
+void i8042_resume(chardev_t *d)
+{
+}
+/* Called from getc(). */
+void i8042_suspend(chardev_t *d)
+{
+}
+static __u8 active_read_buff_read(void)
+{
+    static int i=0;
+    i &= (ACTIVE_READ_BUFF_SIZE-1);
+    if(!active_read_buff[i]) {
+        return 0;
+    }
+    return active_read_buff[i++];
+}
+static void active_read_buff_write(__u8 ch)
+{
+    static int i=0;
+    active_read_buff[i] = ch;
+    i++;
+    i &= (ACTIVE_READ_BUFF_SIZE-1);
+    active_read_buff[i]=0;
+}
+static void active_read_key_pressed(__u8 sc)
+{
+    char *map = sc_primary_map;
+    char ascii = sc_primary_map[sc];
+    bool shift, capslock;
+    bool letter = false;
+    /*spinlock_lock(&keylock);*/
+    switch (sc) {
+    case SC_LSHIFT:
+    case SC_RSHIFT:
+            keyflags |= PRESSED_SHIFT;
+        break;
+    case SC_CAPSLOCK:
+        keyflags |= PRESSED_CAPSLOCK;
+        break;
+    case SC_SPEC_ESCAPE:
+        break;
+    case SC_LEFTARR:
+        active_read_buff_write(0x1b);
+        active_read_buff_write(0x5b);
+        active_read_buff_write(0x44);
+        break;
+    case SC_RIGHTARR:
+        active_read_buff_write(0x1b);
+        active_read_buff_write(0x5b);
+        active_read_buff_write(0x43);
+        break;
+    case SC_UPARR:
+        active_read_buff_write(0x1b);
+        active_read_buff_write(0x5b);
+        active_read_buff_write(0x41);
+        break;
+    case SC_DOWNARR:
+        active_read_buff_write(0x1b);
+        active_read_buff_write(0x5b);
+        active_read_buff_write(0x42);
+        break;
+    case SC_HOME:
+        active_read_buff_write(0x1b);
+        active_read_buff_write(0x4f);
+        active_read_buff_write(0x48);
+        break;
+    case SC_END:
+        active_read_buff_write(0x1b);
+        active_read_buff_write(0x4f);
+        active_read_buff_write(0x46);
+        break;
+    case SC_DELETE:
+        active_read_buff_write(0x1b);
+        active_read_buff_write(0x5b);
+        active_read_buff_write(0x33);
+        active_read_buff_write(0x7e);
+        break;
+    default:
+            letter = is_lower(ascii);
+        capslock = (keyflags & PRESSED_CAPSLOCK) || (lockflags & LOCKED_CAPSLOCK);
+        shift = keyflags & PRESSED_SHIFT;
+        if (letter && capslock)
+            shift = !shift;
+        if (shift)
+            map = sc_secondary_map;
+        active_read_buff_write(map[sc]);
+        break;
+    }
+    /*spinlock_unlock(&keylock);*/
+}
+static char key_read(chardev_t *d)
+{
+    char ch;
+    while(!(ch = active_read_buff_read())) {
+        __u8 x;
+        while (!((x=i8042_status_read() & i8042_BUFFER_FULL_MASK)))
+            ;
+        x = i8042_data_read();
+        if (x != IGNORE_CODE) {
+            if (x & KEY_RELEASE)
+                key_released(x ^ KEY_RELEASE);
+            else
+                active_read_key_pressed(x);
+        }
+    }
+    return ch;
+}
+/** Poll for key press and release events.
+ *
+ * This function can be used to implement keyboard polling.
+ */
+void i8042_poll(void)
+{
+    __u8 x;
+    while (((x = i8042_status_read() & i8042_BUFFER_FULL_MASK))) {
+        x = i8042_data_read();
+        if (x != IGNORE_CODE) {
+            if (x & KEY_RELEASE)
+                key_released(x ^ KEY_RELEASE);
+            else
+                key_pressed(x);
+        }
+    }
+}
+ /** @}
+ */

 /tags/0.2.0.2/kernel/genarch/src/mm/as_ht.c
 ,0 → 1,123
+/*
+ * Copyright (C) 2006 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup genarchmm
+ * @{
+ */
+/**
+ * @file
+ * @brief   Address space functions for global page hash table.
+ */
+#include <genarch/mm/as_ht.h>
+#include <genarch/mm/page_ht.h>
+#include <mm/as.h>
+#include <mm/frame.h>
+#include <arch/types.h>
+#include <typedefs.h>
+#include <memstr.h>
+#include <adt/hash_table.h>
+#include <synch/mutex.h>
+static pte_t *ht_create(int flags);
+static void ht_destroy(pte_t *page_table);
+static void ht_lock(as_t *as, bool lock);
+static void ht_unlock(as_t *as, bool unlock);
+as_operations_t as_ht_operations = {
+    .page_table_create = ht_create,
+    .page_table_destroy = ht_destroy,
+    .page_table_lock = ht_lock,
+    .page_table_unlock = ht_unlock,
+};
+/** Page hash table create.
+ *
+ * The page hash table will be created only once
+ * and will be shared by all address spaces.
+ *
+ * @param flags Ignored.
+ *
+ * @return Returns NULL.
+ */
+pte_t *ht_create(int flags)
+{
+    if (flags & FLAG_AS_KERNEL) {
+        hash_table_create(&page_ht, PAGE_HT_ENTRIES, 2, &ht_operations);
+        mutex_initialize(&page_ht_lock);
+    }
+    return NULL;
+}
+/** Destroy page table.
+ *
+ * Actually do nothing as the global page hash table is used.
+ *
+ * @param page_table This parameter is ignored.
+ */
+void ht_destroy(pte_t *page_table)
+{
+    /* No-op. */
+}
+/** Lock page table.
+ *
+ * Lock address space and page hash table.
+ * Interrupts must be disabled.
+ *
+ * @param as Address space.
+ * @param lock If false, do not attempt to lock the address space.
+ */
+void ht_lock(as_t *as, bool lock)
+{
+    if (lock)
+        mutex_lock(&as->lock);
+    mutex_lock(&page_ht_lock);
+}
+/** Unlock page table.
+ *
+ * Unlock address space and page hash table.
+ * Interrupts must be disabled.
+ *
+ * @param as Address space.
+ * @param unlock If false, do not attempt to lock the address space.
+ */
+void ht_unlock(as_t *as, bool unlock)
+{
+    mutex_unlock(&page_ht_lock);
+    if (unlock)
+        mutex_unlock(&as->lock);
+}
+ /** @}
+ */

 /tags/0.2.0.2/kernel/genarch/src/mm/page_pt.c
 ,0 → 1,270
+/*
+ * Copyright (C) 2006 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup genarchmm
+ * @{
+ */
+/**
+ * @file
+ * @brief   Virtual Address Translation for hierarchical 4-level page tables.
+ */
+#include <genarch/mm/page_pt.h>
+#include <mm/page.h>
+#include <mm/frame.h>
+#include <mm/as.h>
+#include <arch/mm/page.h>
+#include <arch/mm/as.h>
+#include <arch/types.h>
+#include <typedefs.h>
+#include <arch/asm.h>
+#include <memstr.h>
+static void pt_mapping_insert(as_t *as, __address page, __address frame, int flags);
+static void pt_mapping_remove(as_t *as, __address page);
+static pte_t *pt_mapping_find(as_t *as, __address page);
+page_mapping_operations_t pt_mapping_operations = {
+    .mapping_insert = pt_mapping_insert,
+    .mapping_remove = pt_mapping_remove,
+    .mapping_find = pt_mapping_find
+};
+/** Map page to frame using hierarchical page tables.
+ *
+ * Map virtual address page to physical address frame
+ * using flags.
+ *
+ * The page table must be locked and interrupts must be disabled.
+ *
+ * @param as Address space to wich page belongs.
+ * @param page Virtual address of the page to be mapped.
+ * @param frame Physical address of memory frame to which the mapping is done.
+ * @param flags Flags to be used for mapping.
+ */
+void pt_mapping_insert(as_t *as, __address page, __address frame, int flags)
+{
+    pte_t *ptl0, *ptl1, *ptl2, *ptl3;
+    __address newpt;
+    ptl0 = (pte_t *) PA2KA((__address) as->page_table);
+    if (GET_PTL1_FLAGS(ptl0, PTL0_INDEX(page)) & PAGE_NOT_PRESENT) {
+        newpt = PA2KA(PFN2ADDR(frame_alloc(ONE_FRAME, FRAME_KA)));
+        memsetb(newpt, PAGE_SIZE, 0);
+        SET_PTL1_ADDRESS(ptl0, PTL0_INDEX(page), KA2PA(newpt));
+        SET_PTL1_FLAGS(ptl0, PTL0_INDEX(page), PAGE_PRESENT | PAGE_USER | PAGE_EXEC | PAGE_CACHEABLE | PAGE_WRITE);
+    }
+    ptl1 = (pte_t *) PA2KA(GET_PTL1_ADDRESS(ptl0, PTL0_INDEX(page)));
+    if (GET_PTL2_FLAGS(ptl1, PTL1_INDEX(page)) & PAGE_NOT_PRESENT) {
+        newpt = PA2KA(PFN2ADDR(frame_alloc(ONE_FRAME, FRAME_KA)));
+        memsetb(newpt, PAGE_SIZE, 0);
+        SET_PTL2_ADDRESS(ptl1, PTL1_INDEX(page), KA2PA(newpt));
+        SET_PTL2_FLAGS(ptl1, PTL1_INDEX(page), PAGE_PRESENT | PAGE_USER | PAGE_EXEC | PAGE_CACHEABLE | PAGE_WRITE);
+    }
+    ptl2 = (pte_t *) PA2KA(GET_PTL2_ADDRESS(ptl1, PTL1_INDEX(page)));
+    if (GET_PTL3_FLAGS(ptl2, PTL2_INDEX(page)) & PAGE_NOT_PRESENT) {
+        newpt = PA2KA(PFN2ADDR(frame_alloc(ONE_FRAME, FRAME_KA)));
+        memsetb(newpt, PAGE_SIZE, 0);
+        SET_PTL3_ADDRESS(ptl2, PTL2_INDEX(page), KA2PA(newpt));
+        SET_PTL3_FLAGS(ptl2, PTL2_INDEX(page), PAGE_PRESENT | PAGE_USER | PAGE_EXEC | PAGE_CACHEABLE | PAGE_WRITE);
+    }
+    ptl3 = (pte_t *) PA2KA(GET_PTL3_ADDRESS(ptl2, PTL2_INDEX(page)));
+    SET_FRAME_ADDRESS(ptl3, PTL3_INDEX(page), frame);
+    SET_FRAME_FLAGS(ptl3, PTL3_INDEX(page), flags);
+}
+/** Remove mapping of page from hierarchical page tables.
+ *
+ * Remove any mapping of page within address space as.
+ * TLB shootdown should follow in order to make effects of
+ * this call visible.
+ *
+ * Empty page tables except PTL0 are freed.
+ *
+ * The page table must be locked and interrupts must be disabled.
+ *
+ * @param as Address space to wich page belongs.
+ * @param page Virtual address of the page to be demapped.
+ */
+void pt_mapping_remove(as_t *as, __address page)
+{
+    pte_t *ptl0, *ptl1, *ptl2, *ptl3;
+    bool empty = true;
+    int i;
+    /*
+     * First, remove the mapping, if it exists.
+     */
+    ptl0 = (pte_t *) PA2KA((__address) as->page_table);
+    if (GET_PTL1_FLAGS(ptl0, PTL0_INDEX(page)) & PAGE_NOT_PRESENT)
+        return;
+    ptl1 = (pte_t *) PA2KA(GET_PTL1_ADDRESS(ptl0, PTL0_INDEX(page)));
+    if (GET_PTL2_FLAGS(ptl1, PTL1_INDEX(page)) & PAGE_NOT_PRESENT)
+        return;
+    ptl2 = (pte_t *) PA2KA(GET_PTL2_ADDRESS(ptl1, PTL1_INDEX(page)));
+    if (GET_PTL3_FLAGS(ptl2, PTL2_INDEX(page)) & PAGE_NOT_PRESENT)
+        return;
+    ptl3 = (pte_t *) PA2KA(GET_PTL3_ADDRESS(ptl2, PTL2_INDEX(page)));
+    /* Destroy the mapping. Setting to PAGE_NOT_PRESENT is not sufficient. */
+    memsetb((__address) &ptl3[PTL3_INDEX(page)], sizeof(pte_t), 0);
+    /*
+     * Second, free all empty tables along the way from PTL3 down to PTL0.
+     */
+    /* check PTL3 */
+    for (i = 0; i < PTL3_ENTRIES; i++) {
+        if (PTE_VALID(&ptl3[i])) {
+            empty = false;
+            break;
+        }
+    }
+    if (empty) {
+        /*
+         * PTL3 is empty.
+         * Release the frame and remove PTL3 pointer from preceding table.
+         */
+        frame_free(ADDR2PFN(KA2PA((__address) ptl3)));
+        if (PTL2_ENTRIES)
+            memsetb((__address) &ptl2[PTL2_INDEX(page)], sizeof(pte_t), 0);
+        else if (PTL1_ENTRIES)
+            memsetb((__address) &ptl1[PTL1_INDEX(page)], sizeof(pte_t), 0);
+        else
+            memsetb((__address) &ptl0[PTL0_INDEX(page)], sizeof(pte_t), 0);
+    } else {
+        /*
+         * PTL3 is not empty.
+         * Therefore, there must be a path from PTL0 to PTL3 and
+         * thus nothing to free in higher levels.
+         */
+        return;
+    }
+    /* check PTL2, empty is still true */
+    if (PTL2_ENTRIES) {
+        for (i = 0; i < PTL2_ENTRIES; i++) {
+            if (PTE_VALID(&ptl2[i])) {
+                empty = false;
+                break;
+            }
+        }
+        if (empty) {
+            /*
+             * PTL2 is empty.
+             * Release the frame and remove PTL2 pointer from preceding table.
+             */
+            frame_free(ADDR2PFN(KA2PA((__address) ptl2)));
+            if (PTL1_ENTRIES)
+                memsetb((__address) &ptl1[PTL1_INDEX(page)], sizeof(pte_t), 0);
+            else
+                memsetb((__address) &ptl0[PTL0_INDEX(page)], sizeof(pte_t), 0);
+        }
+        else {
+            /*
+             * PTL2 is not empty.
+             * Therefore, there must be a path from PTL0 to PTL2 and
+             * thus nothing to free in higher levels.
+             */
+            return;
+        }
+    }
+    /* check PTL1, empty is still true */
+    if (PTL1_ENTRIES) {
+        for (i = 0; i < PTL1_ENTRIES; i++) {
+            if (PTE_VALID(&ptl1[i])) {
+                empty = false;
+                break;
+            }
+        }
+        if (empty) {
+            /*
+             * PTL1 is empty.
+             * Release the frame and remove PTL1 pointer from preceding table.
+             */
+            frame_free(ADDR2PFN(KA2PA((__address) ptl1)));
+            memsetb((__address) &ptl0[PTL0_INDEX(page)], sizeof(pte_t), 0);
+        }
+    }
+}
+/** Find mapping for virtual page in hierarchical page tables.
+ *
+ * Find mapping for virtual page.
+ *
+ * The page table must be locked and interrupts must be disabled.
+ *
+ * @param as Address space to which page belongs.
+ * @param page Virtual page.
+ *
+ * @return NULL if there is no such mapping; entry from PTL3 describing the mapping otherwise.
+ */
+pte_t *pt_mapping_find(as_t *as, __address page)
+{
+    pte_t *ptl0, *ptl1, *ptl2, *ptl3;
+    ptl0 = (pte_t *) PA2KA((__address) as->page_table);
+    if (GET_PTL1_FLAGS(ptl0, PTL0_INDEX(page)) & PAGE_NOT_PRESENT)
+        return NULL;
+    ptl1 = (pte_t *) PA2KA(GET_PTL1_ADDRESS(ptl0, PTL0_INDEX(page)));
+    if (GET_PTL2_FLAGS(ptl1, PTL1_INDEX(page)) & PAGE_NOT_PRESENT)
+        return NULL;
+    ptl2 = (pte_t *) PA2KA(GET_PTL2_ADDRESS(ptl1, PTL1_INDEX(page)));
+    if (GET_PTL3_FLAGS(ptl2, PTL2_INDEX(page)) & PAGE_NOT_PRESENT)
+        return NULL;
+    ptl3 = (pte_t *) PA2KA(GET_PTL3_ADDRESS(ptl2, PTL2_INDEX(page)));
+    return &ptl3[PTL3_INDEX(page)];
+}
+ /** @}
+ */

 /tags/0.2.0.2/kernel/genarch/src/mm/asid.c
 ,0 → 1,179
+/*
+ * Copyright (C) 2006 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup genarchmm
+ * @{
+ */
+/**
+ * @file
+ * @brief   ASID management.
+ *
+ * Modern processor architectures optimize TLB utilization
+ * by using ASIDs (a.k.a. memory contexts on sparc64 and
+ * region identifiers on ia64). These ASIDs help to associate
+ * each TLB item with an address space, thus making
+ * finer-grained TLB invalidation possible.
+ *
+ * Unfortunatelly, there are usually less ASIDs available than
+ * there can be unique as_t structures (i.e. address spaces
+ * recognized by the kernel).
+ *
+ * When system runs short of ASIDs, it will attempt to steal
+ * ASID from an address space that has not been active for
+ * a while.
+ *
+ * This code depends on the fact that ASIDS_ALLOCABLE
+ * is greater than number of supported CPUs (i.e. the
+ * amount of concurently active address spaces).
+ *
+ * Architectures that don't have hardware support for address
+ * spaces do not compile with this file.
+ */
+#include <mm/asid.h>
+#include <mm/as.h>
+#include <mm/tlb.h>
+#include <arch/mm/asid.h>
+#include <synch/spinlock.h>
+#include <synch/mutex.h>
+#include <arch.h>
+#include <adt/list.h>
+#include <debug.h>
+/**
+ * asidlock protects the asids_allocated counter.
+ */
+SPINLOCK_INITIALIZE(asidlock);
+static count_t asids_allocated = 0;
+/** Allocate free address space identifier.
+ *
+ * Interrupts must be disabled and inactive_as_with_asid_lock must be held
+ * prior to this call
+ *
+ * @return New ASID.
+ */
+asid_t asid_get(void)
+{
+    asid_t asid;
+    link_t *tmp;
+    as_t *as;
+    /*
+     * Check if there is an unallocated ASID.
+     */
+    spinlock_lock(&asidlock);
+    if (asids_allocated == ASIDS_ALLOCABLE) {
+        /*
+         * All ASIDs are already allocated.
+         * Resort to stealing.
+         */
+        /*
+         * Remove the first item on the list.
+         * It is guaranteed to belong to an
+         * inactive address space.
+         */
+        ASSERT(!list_empty(&inactive_as_with_asid_head));
+        tmp = inactive_as_with_asid_head.next;
+        list_remove(tmp);
+        as = list_get_instance(tmp, as_t, inactive_as_with_asid_link);
+        mutex_lock_active(&as->lock);
+        /*
+         * Steal the ASID.
+         * Note that the stolen ASID is not active.
+         */
+        asid = as->asid;
+        ASSERT(asid != ASID_INVALID);
+        /*
+         * Notify the address space from wich the ASID
+         * was stolen by invalidating its asid member.
+         */
+        as->asid = ASID_INVALID;
+        mutex_unlock(&as->lock);
+        /*
+         * Get the system rid of the stolen ASID.
+         */
+        tlb_shootdown_start(TLB_INVL_ASID, asid, 0, 0);
+        tlb_invalidate_asid(asid);
+        tlb_shootdown_finalize();
+    } else {
+        /*
+         * There is at least one unallocated ASID.
+         * Find it and assign it.
+         */
+        asid = asid_find_free();
+        asids_allocated++;
+        /*
+         * Purge the allocated rid from TLBs.
+         */
+        tlb_shootdown_start(TLB_INVL_ASID, asid, 0, 0);
+        tlb_invalidate_asid(asid);
+        tlb_shootdown_finalize();
+    }
+    spinlock_unlock(&asidlock);
+    return asid;
+}
+/** Release address space identifier.
+ *
+ * This code relies on architecture
+ * dependent functionality.
+ *
+ * @param asid ASID to be released.
+ */
+void asid_put(asid_t asid)
+{
+    ipl_t ipl;
+    ipl = interrupts_disable();
+    spinlock_lock(&asidlock);
+    asids_allocated--;
+    asid_put_arch(asid);
+    spinlock_unlock(&asidlock);
+    interrupts_restore(ipl);
+}
+ /** @}
+ */

 /tags/0.2.0.2/kernel/genarch/src/mm/asid_fifo.c
 ,0 → 1,99
+/*
+ * Copyright (C) 2006 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup genarchmm
+ * @{
+ */
+/**
+ * @file
+ * @brief   FIFO queue ASID management.
+ *
+ * Architectures that link with this file keep the unallocated ASIDs
+ * in FIFO queue. The queue can be statically (e.g. mips32) or
+ * dynamically allocated (e.g ia64 and sparc64).
+ */
+#include <genarch/mm/asid_fifo.h>
+#include <arch/mm/asid.h>
+#include <mm/asid.h>
+#include <typedefs.h>
+#include <adt/fifo.h>
+#define FIFO_STATIC_LIMIT   1024
+#define FIFO_STATIC     (ASIDS_ALLOCABLE<FIFO_STATIC_LIMIT)
+/**
+ * FIFO queue containing unassigned ASIDs.
+ * Can be only accessed when asidlock is held.
+ */
+#if FIFO_STATIC
+FIFO_INITIALIZE_STATIC(free_asids, asid_t, ASIDS_ALLOCABLE);
+#else
+FIFO_INITIALIZE_DYNAMIC(free_asids, asid_t, ASIDS_ALLOCABLE);
+#endif
+/** Initialize data structures for O(1) ASID allocation and deallocation. */
+void asid_fifo_init(void)
+{
+    int i;
+    #if (!FIFO_STATIC)
+    fifo_create(free_asids);
+    #endif
+    for (i = 0; i < ASIDS_ALLOCABLE; i++) {
+        fifo_push(free_asids, ASID_START + i);
+    }
+}
+/** Allocate free ASID.
+ *
+ * Allocation runs in O(1).
+ *
+ * @return Free ASID.
+ */
+asid_t asid_find_free(void)
+{
+    return fifo_pop(free_asids);
+}
+/** Return ASID among free ASIDs.
+ *
+ * This operation runs in O(1).
+ *
+ * @param asid ASID being freed.
+ */
+void asid_put_arch(asid_t asid)
+{
+    fifo_push(free_asids, asid);
+}
+ /** @}
+ */

 /tags/0.2.0.2/kernel/genarch/src/mm/as_pt.c
 ,0 → 1,144
+/*
+ * Copyright (C) 2006 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup genarchmm
+ * @{
+ */
+/**
+ * @file
+ * @brief   Address space functions for 4-level hierarchical pagetables.
+ */
+#include <genarch/mm/page_pt.h>
+#include <mm/page.h>
+#include <mm/frame.h>
+#include <mm/as.h>
+#include <synch/mutex.h>
+#include <arch/mm/page.h>
+#include <arch/mm/as.h>
+#include <arch/types.h>
+#include <typedefs.h>
+#include <memstr.h>
+#include <arch.h>
+static pte_t *ptl0_create(int flags);
+static void ptl0_destroy(pte_t *page_table);
+static void pt_lock(as_t *as, bool lock);
+static void pt_unlock(as_t *as, bool unlock);
+as_operations_t as_pt_operations = {
+    .page_table_create = ptl0_create,
+    .page_table_destroy = ptl0_destroy,
+    .page_table_lock = pt_lock,
+    .page_table_unlock = pt_unlock
+};
+/** Create PTL0.
+ *
+ * PTL0 of 4-level page table will be created for each address space.
+ *
+ * @param flags Flags can specify whether ptl0 is for the kernel address space.
+ *
+ * @return New PTL0.
+ */
+pte_t *ptl0_create(int flags)
+{
+    pte_t *src_ptl0, *dst_ptl0;
+    ipl_t ipl;
+    dst_ptl0 = (pte_t *) PA2KA(PFN2ADDR(frame_alloc(ONE_FRAME, FRAME_KA | FRAME_PANIC)));
+    if (flags & FLAG_AS_KERNEL) {
+        memsetb((__address) dst_ptl0, PAGE_SIZE, 0);
+    } else {
+        __address src, dst;
+        /*
+         * Copy the kernel address space portion to new PTL0.
+         */
+        ipl = interrupts_disable();
+        mutex_lock(&AS_KERNEL->lock);
+        src_ptl0 = (pte_t *) PA2KA((__address) AS_KERNEL->page_table);
+        src = (__address) &src_ptl0[PTL0_INDEX(KERNEL_ADDRESS_SPACE_START)];
+        dst = (__address) &dst_ptl0[PTL0_INDEX(KERNEL_ADDRESS_SPACE_START)];
+        memsetb((__address) dst_ptl0, PAGE_SIZE, 0);
+        memcpy((void *) dst, (void *) src, PAGE_SIZE - (src - (__address) src_ptl0));
+        mutex_unlock(&AS_KERNEL->lock);
+        interrupts_restore(ipl);
+    }
+    return (pte_t *) KA2PA((__address) dst_ptl0);
+}
+/** Destroy page table.
+ *
+ * Destroy PTL0, other levels are expected to be already deallocated.
+ *
+ * @param page_table Physical address of PTL0.
+ */
+void ptl0_destroy(pte_t *page_table)
+{
+    frame_free(ADDR2PFN((__address) page_table));
+}
+/** Lock page tables.
+ *
+ * Lock only the address space.
+ * Interrupts must be disabled.
+ *
+ * @param as Address space.
+ * @param lock If false, do not attempt to lock the address space.
+ */
+void pt_lock(as_t *as, bool lock)
+{
+    if (lock)
+        mutex_lock(&as->lock);
+}
+/** Unlock page tables.
+ *
+ * Unlock the address space.
+ * Interrupts must be disabled.
+ *
+ * @param as Address space.
+ * @param unlock If false, do not attempt to unlock the address space.
+ */
+void pt_unlock(as_t *as, bool unlock)
+{
+    if (unlock)
+        mutex_unlock(&as->lock);
+}
+ /** @}
+ */

 /tags/0.2.0.2/kernel/genarch/src/mm/page_ht.c
 ,0 → 1,249
+/*
+ * Copyright (C) 2006 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup genarchmm
+ * @{
+ */
+/**
+ * @file
+ * @brief   Virtual Address Translation (VAT) for global page hash table.
+ */
+#include <genarch/mm/page_ht.h>
+#include <mm/page.h>
+#include <arch/mm/page.h>
+#include <mm/frame.h>
+#include <mm/slab.h>
+#include <mm/as.h>
+#include <arch/mm/asid.h>
+#include <arch/types.h>
+#include <typedefs.h>
+#include <arch/asm.h>
+#include <synch/spinlock.h>
+#include <arch.h>
+#include <debug.h>
+#include <memstr.h>
+#include <adt/hash_table.h>
+#include <align.h>
+static index_t hash(__native key[]);
+static bool compare(__native key[], count_t keys, link_t *item);
+static void remove_callback(link_t *item);
+static void ht_mapping_insert(as_t *as, __address page, __address frame, int flags);
+static void ht_mapping_remove(as_t *as, __address page);
+static pte_t *ht_mapping_find(as_t *as, __address page);
+/**
+ * This lock protects the page hash table. It must be acquired
+ * after address space lock and after any address space area
+ * locks.
+ */
+mutex_t page_ht_lock;
+/**
+ * Page hash table.
+ * The page hash table may be accessed only when page_ht_lock is held.
+ */
+hash_table_t page_ht;
+/** Hash table operations for page hash table. */
+hash_table_operations_t ht_operations = {
+    .hash = hash,
+    .compare = compare,
+    .remove_callback = remove_callback
+};
+/** Page mapping operations for page hash table architectures. */
+page_mapping_operations_t ht_mapping_operations = {
+    .mapping_insert = ht_mapping_insert,
+    .mapping_remove = ht_mapping_remove,
+    .mapping_find = ht_mapping_find
+};
+/** Compute page hash table index.
+ *
+ * @param key Array of two keys (i.e. page and address space).
+ *
+ * @return Index into page hash table.
+ */
+index_t hash(__native key[])
+{
+    as_t *as = (as_t *) key[KEY_AS];
+    __address page = (__address) key[KEY_PAGE];
+    index_t index;
+    /*
+     * Virtual page addresses have roughly the same probability
+     * of occurring. Least significant bits of VPN compose the
+     * hash index.
+     */
+    index = ((page >> PAGE_WIDTH) & (PAGE_HT_ENTRIES-1));
+    /*
+     * Address space structures are likely to be allocated from
+     * similar addresses. Least significant bits compose the
+     * hash index.
+     */
+    index |= ((__native) as) & (PAGE_HT_ENTRIES-1);
+    return index;
+}
+/** Compare page hash table item with page and/or address space.
+ *
+ * @param key Array of one or two keys (i.e. page and/or address space).
+ * @param keys Number of keys passed.
+ * @param item Item to compare the keys with.
+ *
+ * @return true on match, false otherwise.
+ */
+bool compare(__native key[], count_t keys, link_t *item)
+{
+    pte_t *t;
+    ASSERT(item);
+    ASSERT((keys > 0) && (keys <= PAGE_HT_KEYS));
+    /*
+     * Convert item to PTE.
+     */
+    t = hash_table_get_instance(item, pte_t, link);
+    if (keys == PAGE_HT_KEYS) {
+        return (key[KEY_AS] == (__address) t->as) && (key[KEY_PAGE] == t->page);
+    } else {
+        return (key[KEY_AS] == (__address) t->as);
+    }
+}
+/** Callback on page hash table item removal.
+ *
+ * @param item Page hash table item being removed.
+ */
+void remove_callback(link_t *item)
+{
+    pte_t *t;
+    ASSERT(item);
+    /*
+     * Convert item to PTE.
+     */
+    t = hash_table_get_instance(item, pte_t, link);
+    free(t);
+}
+/** Map page to frame using page hash table.
+ *
+ * Map virtual address page to physical address frame
+ * using flags.
+ *
+ * The page table must be locked and interrupts must be disabled.
+ *
+ * @param as Address space to which page belongs.
+ * @param page Virtual address of the page to be mapped.
+ * @param frame Physical address of memory frame to which the mapping is done.
+ * @param flags Flags to be used for mapping.
+ */
+void ht_mapping_insert(as_t *as, __address page, __address frame, int flags)
+{
+    pte_t *t;
+    __native key[2] = { (__address) as, page = ALIGN_DOWN(page, PAGE_SIZE) };
+    if (!hash_table_find(&page_ht, key)) {
+        t = (pte_t *) malloc(sizeof(pte_t), FRAME_ATOMIC);
+        ASSERT(t != NULL);
+        t->g = (flags & PAGE_GLOBAL) != 0;
+        t->x = (flags & PAGE_EXEC) != 0;
+        t->w = (flags & PAGE_WRITE) != 0;
+        t->k = !(flags & PAGE_USER);
+        t->c = (flags & PAGE_CACHEABLE) != 0;
+        t->p = !(flags & PAGE_NOT_PRESENT);
+        t->as = as;
+        t->page = ALIGN_DOWN(page, PAGE_SIZE);
+        t->frame = ALIGN_DOWN(frame, FRAME_SIZE);
+        hash_table_insert(&page_ht, key, &t->link);
+    }
+}
+/** Remove mapping of page from page hash table.
+ *
+ * Remove any mapping of page within address space as.
+ * TLB shootdown should follow in order to make effects of
+ * this call visible.
+ *
+ * The page table must be locked and interrupts must be disabled.
+ *
+ * @param as Address space to wich page belongs.
+ * @param page Virtual address of the page to be demapped.
+ */
+void ht_mapping_remove(as_t *as, __address page)
+{
+    __native key[2] = { (__address) as, page = ALIGN_DOWN(page, PAGE_SIZE) };
+    /*
+     * Note that removed PTE's will be freed
+     * by remove_callback().
+     */
+    hash_table_remove(&page_ht, key, 2);
+}
+/** Find mapping for virtual page in page hash table.
+ *
+ * Find mapping for virtual page.
+ *
+ * The page table must be locked and interrupts must be disabled.
+ *
+ * @param as Address space to wich page belongs.
+ * @param page Virtual page.
+ *
+ * @return NULL if there is no such mapping; requested mapping otherwise.
+ */
+pte_t *ht_mapping_find(as_t *as, __address page)
+{
+    link_t *hlp;
+    pte_t *t = NULL;
+    __native key[2] = { (__address) as, page = ALIGN_DOWN(page, PAGE_SIZE) };
+    hlp = hash_table_find(&page_ht, key);
+    if (hlp)
+        t = hash_table_get_instance(hlp, pte_t, link);
+    return t;
+}
+ /** @}
+ */

 /tags/0.2.0.2/kernel/genarch/src/softint/division.c
 ,0 → 1,198
+/*
+ * Copyright (C) 2006 Josef Cejka
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup genarch
+ * @{
+ */
+/** @file
+ */
+#include <genarch/softint/division.h>
+#define ABSVAL(x) ( (x) > 0 ? (x) : -(x))
+#define SGN(x) ( (x) >= 0 ? 1 : 0 )
+static unsigned int divandmod32(unsigned int a, unsigned int b, unsigned int *remainder)
+{
+    unsigned int result;
+    int steps = sizeof(unsigned int) * 8;
+    *remainder = 0;
+    result = 0;
+    if (b == 0) {
+        /* FIXME: division by zero */
+        return 0;
+    }
+    if ( a < b) {
+        *remainder = a;
+        return 0;
+    }
+    for ( ; steps > 0; steps--) {
+        /* shift one bit to remainder */
+        *remainder = ( (*remainder) << 1) | (( a >> 31) & 0x1);
+        result <<= 1;
+        if (*remainder >= b) {
+                *remainder -= b;
+                result |= 0x1;
+        }
+        a <<= 1;
+    }
+    return result;
+}
+static unsigned long long divandmod64(unsigned long long a, unsigned long long b, unsigned long long *remainder)
+{
+    unsigned long long result;
+    int steps = sizeof(unsigned long long) * 8;
+    *remainder = 0;
+    result = 0;
+    if (b == 0) {
+        /* FIXME: division by zero */
+        return 0;
+    }
+    if ( a < b) {
+        *remainder = a;
+        return 0;
+    }
+    for ( ; steps > 0; steps--) {
+        /* shift one bit to remainder */
+        *remainder = ( (*remainder) << 1) | ((a >> 63) & 0x1);
+        result <<= 1;
+        if (*remainder >= b) {
+                *remainder -= b;
+                result |= 0x1;
+        }
+        a <<= 1;
+    }
+    return result;
+}
+/* 32bit integer division */
+int __divsi3(int a, int b)
+{
+    unsigned int rem;
+    int result;
+    result = (int)divandmod32(ABSVAL(a), ABSVAL(b), &rem);
+    if ( SGN(a) == SGN(b)) return result;
+    return -result;
+}
+/* 64bit integer division */
+long long __divdi3(long long a, long long b)
+{
+    unsigned long long rem;
+    long long result;
+    result = (long long)divandmod64(ABSVAL(a), ABSVAL(b), &rem);
+    if ( SGN(a) == SGN(b)) return result;
+    return -result;
+}
+/* 32bit unsigned integer division */
+unsigned int __udivsi3(unsigned int a, unsigned int b)
+{
+    unsigned int rem;
+    return divandmod32(a, b, &rem);
+}
+/* 64bit unsigned integer division */
+unsigned long long __udivdi3(unsigned long long a, unsigned long long b)
+{
+    unsigned long long  rem;
+    return divandmod64(a, b, &rem);
+}
+/* 32bit remainder of the signed division */
+int __modsi3(int a, int b)
+{
+    unsigned int rem;
+    divandmod32(a, b, &rem);
+    /* if divident is negative, remainder must be too */
+    if (!(SGN(a))) {
+        return -((int)rem);
+    }
+    return (int)rem;
+}
+/* 64bit remainder of the signed division */
+long long __moddi3(long long a,long  long b)
+{
+    unsigned long long rem;
+    divandmod64(a, b, &rem);
+    /* if divident is negative, remainder must be too */
+    if (!(SGN(a))) {
+        return -((long long)rem);
+    }
+    return (long long)rem;
+}
+/* 32bit remainder of the unsigned division */
+unsigned int __umodsi3(unsigned int a, unsigned int b)
+{
+    unsigned int rem;
+    divandmod32(a, b, &rem);
+    return rem;
+}
+/* 64bit remainder of the unsigned division */
+unsigned long long __umoddi3(unsigned long long a, unsigned long long b)
+{
+    unsigned long long rem;
+    divandmod64(a, b, &rem);
+    return rem;
+}
+unsigned long long __udivmoddi3(unsigned long long a, unsigned long long b, unsigned long long *c)
+{
+    return divandmod64(a, b, c);
+}
+ /** @}
+ */

 /tags/0.2.0.2/kernel/genarch/src/fb/fb.c
 ,0 → 1,426
+/*
+ * Copyright (C) 2006 Ondrej Palkovsky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup genarch
+ * @{
+ */
+/** @file
+ */
+#include <genarch/fb/font-8x16.h>
+#include <genarch/fb/fb.h>
+#include <console/chardev.h>
+#include <console/console.h>
+#include <sysinfo/sysinfo.h>
+#include <mm/slab.h>
+#include <align.h>
+#include <panic.h>
+#include <memstr.h>
+#include <config.h>
+#include <bitops.h>
+#include <print.h>
+#include "helenos.xbm"
+SPINLOCK_INITIALIZE(fb_lock);
+static __u8 *fbaddress = NULL;
+static __u8 *blankline = NULL;
+static __u8 *dbbuffer = NULL; /* Buffer for fast scrolling console */
+static int dboffset;
+static unsigned int xres = 0;
+static unsigned int yres = 0;
+static unsigned int scanline = 0;
+static unsigned int bitspp = 0;
+static unsigned int pixelbytes = 0;
+static unsigned int position = 0;
+static unsigned int columns = 0;
+static unsigned int rows = 0;
+#define COL_WIDTH   8
+#define ROW_BYTES   (scanline * FONT_SCANLINES)
+#define BGCOLOR     0x000080
+#define FGCOLOR     0xffff00
+#define LOGOCOLOR   0x2020b0
+#define RED(x, bits)    ((x >> (16 + 8 - bits)) & ((1 << bits) - 1))
+#define GREEN(x, bits)  ((x >> (8 + 8 - bits)) & ((1 << bits) - 1))
+#define BLUE(x, bits)   ((x >> (8 - bits)) & ((1 << bits) - 1))
+#define POINTPOS(x, y)  ((y) * scanline + (x) * pixelbytes)
+/***************************************************************/
+/* Pixel specific fuctions */
+static void (*rgb2scr)(void *, int);
+static int (*scr2rgb)(void *);
+/* Conversion routines between different color representations */
+static void rgb_4byte(void *dst, int rgb)
+{
+    *(int *)dst = rgb;
+}
+static int byte4_rgb(void *src)
+{
+    return (*(int *)src) & 0xffffff;
+}
+static void rgb_3byte(void *dst, int rgb)
+{
+    __u8 *scr = dst;
+#if (defined(BIG_ENDIAN) || defined(FB_BIG_ENDIAN))
+    scr[0] = RED(rgb, 8);
+    scr[1] = GREEN(rgb, 8);
+    scr[2] = BLUE(rgb, 8);
+#else
+    scr[2] = RED(rgb, 8);
+    scr[1] = GREEN(rgb, 8);
+    scr[0] = BLUE(rgb, 8);
+#endif
+}
+static int byte3_rgb(void *src)
+{
+    __u8 *scr = src;
+#if (defined(BIG_ENDIAN) || defined(FB_BIG_ENDIAN))
+    return scr[0] << 16 | scr[1] << 8 | scr[2];
+#else
+    return scr[2] << 16 | scr[1] << 8 | scr[0];
+#endif
+}
+/**  16-bit depth (5:6:5) */
+static void rgb_2byte(void *dst, int rgb)
+{
+    /* 5-bit, 6-bits, 5-bits */
+    *((__u16 *)(dst)) = RED(rgb, 5) << 11 | GREEN(rgb, 6) << 5 | BLUE(rgb, 5);
+}
+/** 16-bit depth (5:6:5) */
+static int byte2_rgb(void *src)
+{
+    int color = *(__u16 *)(src);
+    return (((color >> 11) & 0x1f) << (16 + 3)) | (((color >> 5) & 0x3f) << (8 + 2)) | ((color & 0x1f) << 3);
+}
+/** Put pixel - 8-bit depth (3:2:3) */
+static void rgb_1byte(void *dst, int rgb)
+{
+    *(__u8 *)dst = RED(rgb, 3) << 5 | GREEN(rgb, 2) << 3 | BLUE(rgb, 3);
+}
+/** Return pixel color - 8-bit depth (3:2:3) */
+static int byte1_rgb(void *src)
+{
+    int color = *(__u8 *)src;
+    return (((color >> 5) & 0x7) << (16 + 5)) | (((color >> 3) & 0x3) << (8 + 6)) | ((color & 0x7) << 5);
+}
+static void putpixel(unsigned int x, unsigned int y, int color)
+{
+    (*rgb2scr)(&fbaddress[POINTPOS(x,y)],color);
+    if (dbbuffer) {
+        int dline = (y + dboffset) % yres;
+        (*rgb2scr)(&dbbuffer[POINTPOS(x,dline)],color);
+    }
+}
+/** Get pixel from viewport */
+static int getpixel(unsigned int x, unsigned int y)
+{
+    if (dbbuffer) {
+        int dline = (y + dboffset) % yres;
+        return (*scr2rgb)(&dbbuffer[POINTPOS(x,dline)]);
+    }
+    return (*scr2rgb)(&fbaddress[POINTPOS(x,y)]);
+}
+/** Fill screen with background color */
+static void clear_screen(void)
+{
+    unsigned int y;
+    for (y = 0; y < yres; y++) {
+        memcpy(&fbaddress[scanline*y], blankline, xres*pixelbytes);
+        if (dbbuffer)
+            memcpy(&dbbuffer[scanline*y], blankline, xres*pixelbytes);
+    }
+}
+/** Scroll screen one row up */
+static void scroll_screen(void)
+{
+    __u8 *lastline = &fbaddress[(rows - 1) * ROW_BYTES];
+    int firstsz;
+    if (dbbuffer) {
+        memcpy(&dbbuffer[dboffset*scanline], blankline, FONT_SCANLINES*scanline);
+        dboffset = (dboffset + FONT_SCANLINES) % yres;
+        firstsz = yres-dboffset;
+        memcpy(fbaddress, &dbbuffer[scanline*dboffset], firstsz*scanline);
+        memcpy(&fbaddress[firstsz*scanline], dbbuffer, dboffset*scanline);
+    } else {
+        memcpy((void *) fbaddress, (void *) &fbaddress[ROW_BYTES], scanline * yres - ROW_BYTES);
+        /* Clear last row */
+        memcpy((void *) lastline, (void *) blankline, ROW_BYTES);
+    }
+}
+static void invert_pixel(unsigned int x, unsigned int y)
+{
+    putpixel(x, y, ~getpixel(x, y));
+}
+/** Draw one line of glyph at a given position */
+static void draw_glyph_line(unsigned int glline, unsigned int x, unsigned int y)
+{
+    unsigned int i;
+    for (i = 0; i < 8; i++)
+        if (glline & (1 << (7 - i))) {
+            putpixel(x + i, y, FGCOLOR);
+        } else
+            putpixel(x + i, y, BGCOLOR);
+}
+/***************************************************************/
+/* Character-console functions */
+/** Draw character at given position */
+static void draw_glyph(__u8 glyph, unsigned int col, unsigned int row)
+{
+    unsigned int y;
+    for (y = 0; y < FONT_SCANLINES; y++)
+        draw_glyph_line(fb_font[glyph * FONT_SCANLINES + y], col * COL_WIDTH, row * FONT_SCANLINES + y);
+}
+/** Invert character at given position */
+static void invert_char(unsigned int col, unsigned int row)
+{
+    unsigned int x;
+    unsigned int y;
+    for (x = 0; x < COL_WIDTH; x++)
+        for (y = 0; y < FONT_SCANLINES; y++)
+            invert_pixel(col * COL_WIDTH + x, row * FONT_SCANLINES + y);
+}
+/** Draw character at default position */
+static void draw_char(char chr)
+{
+    draw_glyph(chr, position % columns, position / columns);
+}
+static void draw_logo(unsigned int startx, unsigned int starty)
+{
+    unsigned int x;
+    unsigned int y;
+    unsigned int byte;
+    unsigned int rowbytes;
+    rowbytes = (helenos_width - 1) / 8 + 1;
+    for (y = 0; y < helenos_height; y++)
+        for (x = 0; x < helenos_width; x++) {
+            byte = helenos_bits[rowbytes * y + x / 8];
+            byte >>= x % 8;
+            if (byte & 1)
+                putpixel(startx + x, starty + y, LOGOCOLOR);
+        }
+}
+/***************************************************************/
+/* Stdout specific functions */
+static void invert_cursor(void)
+{
+    invert_char(position % columns, position / columns);
+}
+/** Print character to screen
+ *
+ *  Emulate basic terminal commands
+ */
+static void fb_putchar(chardev_t *dev, char ch)
+{
+    spinlock_lock(&fb_lock);
+    switch (ch) {
+        case '\n':
+            invert_cursor();
+            position += columns;
+            position -= position % columns;
+            break;
+        case '\r':
+            invert_cursor();
+            position -= position % columns;
+            break;
+        case '\b':
+            invert_cursor();
+            if (position % columns)
+                position--;
+            break;
+        case '\t':
+            invert_cursor();
+            do {
+                draw_char(' ');
+                position++;
+            } while ((position % 8) && position < columns * rows);
+            break;
+        default:
+            draw_char(ch);
+            position++;
+    }
+    if (position >= columns * rows) {
+        position -= columns;
+        scroll_screen();
+    }
+    invert_cursor();
+    spinlock_unlock(&fb_lock);
+}
+static chardev_t framebuffer;
+static chardev_operations_t fb_ops = {
+    .write = fb_putchar,
+};
+/** Initialize framebuffer as a chardev output device
+ *
+ * @param addr Physical address of the framebuffer
+ * @param x    Screen width in pixels
+ * @param y    Screen height in pixels
+ * @param bpp  Bits per pixel (8, 16, 24, 32)
+ * @param scan Bytes per one scanline
+ *
+ */
+void fb_init(__address addr, unsigned int x, unsigned int y, unsigned int bpp, unsigned int scan)
+{
+    switch (bpp) {
+        case 8:
+            rgb2scr = rgb_1byte;
+            scr2rgb = byte1_rgb;
+            pixelbytes = 1;
+            break;
+        case 16:
+            rgb2scr = rgb_2byte;
+            scr2rgb = byte2_rgb;
+            pixelbytes = 2;
+            break;
+        case 24:
+            rgb2scr = rgb_3byte;
+            scr2rgb = byte3_rgb;
+            pixelbytes = 3;
+            break;
+        case 32:
+            rgb2scr = rgb_4byte;
+            scr2rgb = byte4_rgb;
+            pixelbytes = 4;
+            break;
+        default:
+            panic("Unsupported bpp");
+    }
+    unsigned int fbsize = scan * y;
+    /* Map the framebuffer */
+    fbaddress = (__u8 *) hw_map((__address) addr, fbsize);
+    xres = x;
+    yres = y;
+    bitspp = bpp;
+    scanline = scan;
+    rows = y / FONT_SCANLINES;
+    columns = x / COL_WIDTH;
+    sysinfo_set_item_val("fb", NULL, true);
+    sysinfo_set_item_val("fb.kind", NULL, 1);
+    sysinfo_set_item_val("fb.width", NULL, xres);
+    sysinfo_set_item_val("fb.height", NULL, yres);
+    sysinfo_set_item_val("fb.bpp", NULL, bpp);
+    sysinfo_set_item_val("fb.scanline", NULL, scan);
+    sysinfo_set_item_val("fb.address.physical", NULL, addr);
+    /* Allocate double buffer */
+    int totsize = scanline * yres;
+    int pages = SIZE2FRAMES(totsize);
+    int order;
+    int rc;
+    if (pages == 1)
+        order = 0;
+    else
+        order = fnzb(pages-1)+1;
+    pfn_t frame = frame_alloc_rc(order,FRAME_ATOMIC,&rc);
+    if (!rc)
+        dbbuffer = (void *)PA2KA(PFN2ADDR(frame));
+    else
+        printf("Failed to allocate scroll buffer.\n");
+    dboffset = 0;
+    /* Initialized blank line */
+    blankline = (__u8 *) malloc(ROW_BYTES, FRAME_ATOMIC);
+    ASSERT(blankline);
+    for (y=0; y < FONT_SCANLINES; y++)
+        for (x=0; x < xres; x++)
+            (*rgb2scr)(&blankline[POINTPOS(x,y)],BGCOLOR);
+    clear_screen();
+    /* Update size of screen to match text area */
+    yres = rows * FONT_SCANLINES;
+    draw_logo(xres - helenos_width, 0);
+    invert_cursor();
+    chardev_initialize("fb", &framebuffer, &fb_ops);
+    stdout = &framebuffer;
+}
+ /** @}
+ */

 /tags/0.2.0.2/kernel/genarch/src/fb/font-8x16.c
 ,0 → 1,4651
+/*
+ * Copyright (C) 2005 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup genarch
+ * @{
+ */
+/** @file
+ */
+#include <genarch/fb/font-8x16.h>
+unsigned char fb_font[FONT_GLIPHS * FONT_SCANLINES] = {
+    /* 0 0x00 '^@' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 1 0x01 '^A' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x7e, /* 01111110 */
+x81, /* 10000001 */
+xa5, /* 10100101 */
+x81, /* 10000001 */
+x81, /* 10000001 */
+xbd, /* 10111101 */
+x99, /* 10011001 */
+x81, /* 10000001 */
+x81, /* 10000001 */
+x7e, /* 01111110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 2 0x02 '^B' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x7e, /* 01111110 */
+xff, /* 11111111 */
+xdb, /* 11011011 */
+xff, /* 11111111 */
+xff, /* 11111111 */
+xc3, /* 11000011 */
+xe7, /* 11100111 */
+xff, /* 11111111 */
+xff, /* 11111111 */
+x7e, /* 01111110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 3 0x03 '^C' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x6c, /* 01101100 */
+xfe, /* 11111110 */
+xfe, /* 11111110 */
+xfe, /* 11111110 */
+xfe, /* 11111110 */
+x7c, /* 01111100 */
+x38, /* 00111000 */
+x10, /* 00010000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 4 0x04 '^D' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x10, /* 00010000 */
+x38, /* 00111000 */
+x7c, /* 01111100 */
+xfe, /* 11111110 */
+x7c, /* 01111100 */
+x38, /* 00111000 */
+x10, /* 00010000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 5 0x05 '^E' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x18, /* 00011000 */
+x3c, /* 00111100 */
+x3c, /* 00111100 */
+xe7, /* 11100111 */
+xe7, /* 11100111 */
+xe7, /* 11100111 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x3c, /* 00111100 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 6 0x06 '^F' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x18, /* 00011000 */
+x3c, /* 00111100 */
+x7e, /* 01111110 */
+xff, /* 11111111 */
+xff, /* 11111111 */
+x7e, /* 01111110 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x3c, /* 00111100 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 7 0x07 '^G' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x18, /* 00011000 */
+x3c, /* 00111100 */
+x3c, /* 00111100 */
+x18, /* 00011000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 8 0x08 '^H' */
+xff, /* 11111111 */
+xff, /* 11111111 */
+xff, /* 11111111 */
+xff, /* 11111111 */
+xff, /* 11111111 */
+xff, /* 11111111 */
+xe7, /* 11100111 */
+xc3, /* 11000011 */
+xc3, /* 11000011 */
+xe7, /* 11100111 */
+xff, /* 11111111 */
+xff, /* 11111111 */
+xff, /* 11111111 */
+xff, /* 11111111 */
+xff, /* 11111111 */
+xff, /* 11111111 */
+    /* 9 0x09 '^I' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x3c, /* 00111100 */
+x66, /* 01100110 */
+x42, /* 01000010 */
+x42, /* 01000010 */
+x66, /* 01100110 */
+x3c, /* 00111100 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 10 0x0a '^J' */
+xff, /* 11111111 */
+xff, /* 11111111 */
+xff, /* 11111111 */
+xff, /* 11111111 */
+xff, /* 11111111 */
+xc3, /* 11000011 */
+x99, /* 10011001 */
+xbd, /* 10111101 */
+xbd, /* 10111101 */
+x99, /* 10011001 */
+xc3, /* 11000011 */
+xff, /* 11111111 */
+xff, /* 11111111 */
+xff, /* 11111111 */
+xff, /* 11111111 */
+xff, /* 11111111 */
+    /* 11 0x0b '^K' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x1e, /* 00011110 */
+x0e, /* 00001110 */
+x1a, /* 00011010 */
+x32, /* 00110010 */
+x78, /* 01111000 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+x78, /* 01111000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 12 0x0c '^L' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x3c, /* 00111100 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+x3c, /* 00111100 */
+x18, /* 00011000 */
+x7e, /* 01111110 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 13 0x0d '^M' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x3f, /* 00111111 */
+x33, /* 00110011 */
+x3f, /* 00111111 */
+x30, /* 00110000 */
+x30, /* 00110000 */
+x30, /* 00110000 */
+x30, /* 00110000 */
+x70, /* 01110000 */
+xf0, /* 11110000 */
+xe0, /* 11100000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 14 0x0e '^N' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x7f, /* 01111111 */
+x63, /* 01100011 */
+x7f, /* 01111111 */
+x63, /* 01100011 */
+x63, /* 01100011 */
+x63, /* 01100011 */
+x63, /* 01100011 */
+x67, /* 01100111 */
+xe7, /* 11100111 */
+xe6, /* 11100110 */
+xc0, /* 11000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 15 0x0f '^O' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+xdb, /* 11011011 */
+x3c, /* 00111100 */
+xe7, /* 11100111 */
+x3c, /* 00111100 */
+xdb, /* 11011011 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 16 0x10 '^P' */
+x00, /* 00000000 */
+x80, /* 10000000 */
+xc0, /* 11000000 */
+xe0, /* 11100000 */
+xf0, /* 11110000 */
+xf8, /* 11111000 */
+xfe, /* 11111110 */
+xf8, /* 11111000 */
+xf0, /* 11110000 */
+xe0, /* 11100000 */
+xc0, /* 11000000 */
+x80, /* 10000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 17 0x11 '^Q' */
+x00, /* 00000000 */
+x02, /* 00000010 */
+x06, /* 00000110 */
+x0e, /* 00001110 */
+x1e, /* 00011110 */
+x3e, /* 00111110 */
+xfe, /* 11111110 */
+x3e, /* 00111110 */
+x1e, /* 00011110 */
+x0e, /* 00001110 */
+x06, /* 00000110 */
+x02, /* 00000010 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 18 0x12 '^R' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x18, /* 00011000 */
+x3c, /* 00111100 */
+x7e, /* 01111110 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x7e, /* 01111110 */
+x3c, /* 00111100 */
+x18, /* 00011000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 19 0x13 '^S' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+x00, /* 00000000 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 20 0x14 '^T' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x7f, /* 01111111 */
+xdb, /* 11011011 */
+xdb, /* 11011011 */
+xdb, /* 11011011 */
+x7b, /* 01111011 */
+x1b, /* 00011011 */
+x1b, /* 00011011 */
+x1b, /* 00011011 */
+x1b, /* 00011011 */
+x1b, /* 00011011 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 21 0x15 '^U' */
+x00, /* 00000000 */
+x7c, /* 01111100 */
+xc6, /* 11000110 */
+x60, /* 01100000 */
+x38, /* 00111000 */
+x6c, /* 01101100 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+x6c, /* 01101100 */
+x38, /* 00111000 */
+x0c, /* 00001100 */
+xc6, /* 11000110 */
+x7c, /* 01111100 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 22 0x16 '^V' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xfe, /* 11111110 */
+xfe, /* 11111110 */
+xfe, /* 11111110 */
+xfe, /* 11111110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 23 0x17 '^W' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x18, /* 00011000 */
+x3c, /* 00111100 */
+x7e, /* 01111110 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x7e, /* 01111110 */
+x3c, /* 00111100 */
+x18, /* 00011000 */
+x7e, /* 01111110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 24 0x18 '^X' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x18, /* 00011000 */
+x3c, /* 00111100 */
+x7e, /* 01111110 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 25 0x19 '^Y' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x7e, /* 01111110 */
+x3c, /* 00111100 */
+x18, /* 00011000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 26 0x1a '^Z' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x18, /* 00011000 */
+x0c, /* 00001100 */
+xfe, /* 11111110 */
+x0c, /* 00001100 */
+x18, /* 00011000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 27 0x1b '^[' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x30, /* 00110000 */
+x60, /* 01100000 */
+xfe, /* 11111110 */
+x60, /* 01100000 */
+x30, /* 00110000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 28 0x1c '^\' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xc0, /* 11000000 */
+xc0, /* 11000000 */
+xc0, /* 11000000 */
+xfe, /* 11111110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 29 0x1d '^]' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x28, /* 00101000 */
+x6c, /* 01101100 */
+xfe, /* 11111110 */
+x6c, /* 01101100 */
+x28, /* 00101000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 30 0x1e '^^' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x10, /* 00010000 */
+x38, /* 00111000 */
+x38, /* 00111000 */
+x7c, /* 01111100 */
+x7c, /* 01111100 */
+xfe, /* 11111110 */
+xfe, /* 11111110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 31 0x1f '^_' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xfe, /* 11111110 */
+xfe, /* 11111110 */
+x7c, /* 01111100 */
+x7c, /* 01111100 */
+x38, /* 00111000 */
+x38, /* 00111000 */
+x10, /* 00010000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 32 0x20 ' ' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 33 0x21 '!' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x18, /* 00011000 */
+x3c, /* 00111100 */
+x3c, /* 00111100 */
+x3c, /* 00111100 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x00, /* 00000000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 34 0x22 '"' */
+x00, /* 00000000 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+x24, /* 00100100 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 35 0x23 '#' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x6c, /* 01101100 */
+x6c, /* 01101100 */
+xfe, /* 11111110 */
+x6c, /* 01101100 */
+x6c, /* 01101100 */
+x6c, /* 01101100 */
+xfe, /* 11111110 */
+x6c, /* 01101100 */
+x6c, /* 01101100 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 36 0x24 '$' */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x7c, /* 01111100 */
+xc6, /* 11000110 */
+xc2, /* 11000010 */
+xc0, /* 11000000 */
+x7c, /* 01111100 */
+x06, /* 00000110 */
+x06, /* 00000110 */
+x86, /* 10000110 */
+xc6, /* 11000110 */
+x7c, /* 01111100 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 37 0x25 '%' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xc2, /* 11000010 */
+xc6, /* 11000110 */
+x0c, /* 00001100 */
+x18, /* 00011000 */
+x30, /* 00110000 */
+x60, /* 01100000 */
+xc6, /* 11000110 */
+x86, /* 10000110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 38 0x26 '&' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x38, /* 00111000 */
+x6c, /* 01101100 */
+x6c, /* 01101100 */
+x38, /* 00111000 */
+x76, /* 01110110 */
+xdc, /* 11011100 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+x76, /* 01110110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 39 0x27 ''' */
+x00, /* 00000000 */
+x30, /* 00110000 */
+x30, /* 00110000 */
+x30, /* 00110000 */
+x60, /* 01100000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 40 0x28 '(' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x0c, /* 00001100 */
+x18, /* 00011000 */
+x30, /* 00110000 */
+x30, /* 00110000 */
+x30, /* 00110000 */
+x30, /* 00110000 */
+x30, /* 00110000 */
+x30, /* 00110000 */
+x18, /* 00011000 */
+x0c, /* 00001100 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 41 0x29 ')' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x30, /* 00110000 */
+x18, /* 00011000 */
+x0c, /* 00001100 */
+x0c, /* 00001100 */
+x0c, /* 00001100 */
+x0c, /* 00001100 */
+x0c, /* 00001100 */
+x0c, /* 00001100 */
+x18, /* 00011000 */
+x30, /* 00110000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 42 0x2a '*' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x66, /* 01100110 */
+x3c, /* 00111100 */
+xff, /* 11111111 */
+x3c, /* 00111100 */
+x66, /* 01100110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 43 0x2b '+' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x7e, /* 01111110 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 44 0x2c ',' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x30, /* 00110000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 45 0x2d '-' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xfe, /* 11111110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 46 0x2e '.' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 47 0x2f '/' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x02, /* 00000010 */
+x06, /* 00000110 */
+x0c, /* 00001100 */
+x18, /* 00011000 */
+x30, /* 00110000 */
+x60, /* 01100000 */
+xc0, /* 11000000 */
+x80, /* 10000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 48 0x30 '0' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x38, /* 00111000 */
+x6c, /* 01101100 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xd6, /* 11010110 */
+xd6, /* 11010110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+x6c, /* 01101100 */
+x38, /* 00111000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 49 0x31 '1' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x18, /* 00011000 */
+x38, /* 00111000 */
+x78, /* 01111000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x7e, /* 01111110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 50 0x32 '2' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x7c, /* 01111100 */
+xc6, /* 11000110 */
+x06, /* 00000110 */
+x0c, /* 00001100 */
+x18, /* 00011000 */
+x30, /* 00110000 */
+x60, /* 01100000 */
+xc0, /* 11000000 */
+xc6, /* 11000110 */
+xfe, /* 11111110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 51 0x33 '3' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x7c, /* 01111100 */
+xc6, /* 11000110 */
+x06, /* 00000110 */
+x06, /* 00000110 */
+x3c, /* 00111100 */
+x06, /* 00000110 */
+x06, /* 00000110 */
+x06, /* 00000110 */
+xc6, /* 11000110 */
+x7c, /* 01111100 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 52 0x34 '4' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x0c, /* 00001100 */
+x1c, /* 00011100 */
+x3c, /* 00111100 */
+x6c, /* 01101100 */
+xcc, /* 11001100 */
+xfe, /* 11111110 */
+x0c, /* 00001100 */
+x0c, /* 00001100 */
+x0c, /* 00001100 */
+x1e, /* 00011110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 53 0x35 '5' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xfe, /* 11111110 */
+xc0, /* 11000000 */
+xc0, /* 11000000 */
+xc0, /* 11000000 */
+xfc, /* 11111100 */
+x06, /* 00000110 */
+x06, /* 00000110 */
+x06, /* 00000110 */
+xc6, /* 11000110 */
+x7c, /* 01111100 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 54 0x36 '6' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x38, /* 00111000 */
+x60, /* 01100000 */
+xc0, /* 11000000 */
+xc0, /* 11000000 */
+xfc, /* 11111100 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+x7c, /* 01111100 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 55 0x37 '7' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xfe, /* 11111110 */
+xc6, /* 11000110 */
+x06, /* 00000110 */
+x06, /* 00000110 */
+x0c, /* 00001100 */
+x18, /* 00011000 */
+x30, /* 00110000 */
+x30, /* 00110000 */
+x30, /* 00110000 */
+x30, /* 00110000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 56 0x38 '8' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x7c, /* 01111100 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+x7c, /* 01111100 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+x7c, /* 01111100 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 57 0x39 '9' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x7c, /* 01111100 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+x7e, /* 01111110 */
+x06, /* 00000110 */
+x06, /* 00000110 */
+x06, /* 00000110 */
+x0c, /* 00001100 */
+x78, /* 01111000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 58 0x3a ':' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 59 0x3b ';' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x30, /* 00110000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 60 0x3c '<' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x06, /* 00000110 */
+x0c, /* 00001100 */
+x18, /* 00011000 */
+x30, /* 00110000 */
+x60, /* 01100000 */
+x30, /* 00110000 */
+x18, /* 00011000 */
+x0c, /* 00001100 */
+x06, /* 00000110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 61 0x3d '=' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x7e, /* 01111110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x7e, /* 01111110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 62 0x3e '>' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x60, /* 01100000 */
+x30, /* 00110000 */
+x18, /* 00011000 */
+x0c, /* 00001100 */
+x06, /* 00000110 */
+x0c, /* 00001100 */
+x18, /* 00011000 */
+x30, /* 00110000 */
+x60, /* 01100000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 63 0x3f '?' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x7c, /* 01111100 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+x0c, /* 00001100 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x00, /* 00000000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 64 0x40 '@' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x7c, /* 01111100 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xde, /* 11011110 */
+xde, /* 11011110 */
+xde, /* 11011110 */
+xdc, /* 11011100 */
+xc0, /* 11000000 */
+x7c, /* 01111100 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 65 0x41 'A' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x10, /* 00010000 */
+x38, /* 00111000 */
+x6c, /* 01101100 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xfe, /* 11111110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 66 0x42 'B' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xfc, /* 11111100 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+x7c, /* 01111100 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+xfc, /* 11111100 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 67 0x43 'C' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x3c, /* 00111100 */
+x66, /* 01100110 */
+xc2, /* 11000010 */
+xc0, /* 11000000 */
+xc0, /* 11000000 */
+xc0, /* 11000000 */
+xc0, /* 11000000 */
+xc2, /* 11000010 */
+x66, /* 01100110 */
+x3c, /* 00111100 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 68 0x44 'D' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xf8, /* 11111000 */
+x6c, /* 01101100 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+x6c, /* 01101100 */
+xf8, /* 11111000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 69 0x45 'E' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xfe, /* 11111110 */
+x66, /* 01100110 */
+x62, /* 01100010 */
+x68, /* 01101000 */
+x78, /* 01111000 */
+x68, /* 01101000 */
+x60, /* 01100000 */
+x62, /* 01100010 */
+x66, /* 01100110 */
+xfe, /* 11111110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 70 0x46 'F' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xfe, /* 11111110 */
+x66, /* 01100110 */
+x62, /* 01100010 */
+x68, /* 01101000 */
+x78, /* 01111000 */
+x68, /* 01101000 */
+x60, /* 01100000 */
+x60, /* 01100000 */
+x60, /* 01100000 */
+xf0, /* 11110000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 71 0x47 'G' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x3c, /* 00111100 */
+x66, /* 01100110 */
+xc2, /* 11000010 */
+xc0, /* 11000000 */
+xc0, /* 11000000 */
+xde, /* 11011110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+x66, /* 01100110 */
+x3a, /* 00111010 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 72 0x48 'H' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xfe, /* 11111110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 73 0x49 'I' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x3c, /* 00111100 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x3c, /* 00111100 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 74 0x4a 'J' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x1e, /* 00011110 */
+x0c, /* 00001100 */
+x0c, /* 00001100 */
+x0c, /* 00001100 */
+x0c, /* 00001100 */
+x0c, /* 00001100 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+x78, /* 01111000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 75 0x4b 'K' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xe6, /* 11100110 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+x6c, /* 01101100 */
+x78, /* 01111000 */
+x78, /* 01111000 */
+x6c, /* 01101100 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+xe6, /* 11100110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 76 0x4c 'L' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xf0, /* 11110000 */
+x60, /* 01100000 */
+x60, /* 01100000 */
+x60, /* 01100000 */
+x60, /* 01100000 */
+x60, /* 01100000 */
+x60, /* 01100000 */
+x62, /* 01100010 */
+x66, /* 01100110 */
+xfe, /* 11111110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 77 0x4d 'M' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xc6, /* 11000110 */
+xee, /* 11101110 */
+xfe, /* 11111110 */
+xfe, /* 11111110 */
+xd6, /* 11010110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 78 0x4e 'N' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xc6, /* 11000110 */
+xe6, /* 11100110 */
+xf6, /* 11110110 */
+xfe, /* 11111110 */
+xde, /* 11011110 */
+xce, /* 11001110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 79 0x4f 'O' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x7c, /* 01111100 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+x7c, /* 01111100 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 80 0x50 'P' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xfc, /* 11111100 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+x7c, /* 01111100 */
+x60, /* 01100000 */
+x60, /* 01100000 */
+x60, /* 01100000 */
+x60, /* 01100000 */
+xf0, /* 11110000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 81 0x51 'Q' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x7c, /* 01111100 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xd6, /* 11010110 */
+xde, /* 11011110 */
+x7c, /* 01111100 */
+x0c, /* 00001100 */
+x0e, /* 00001110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 82 0x52 'R' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xfc, /* 11111100 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+x7c, /* 01111100 */
+x6c, /* 01101100 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+xe6, /* 11100110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 83 0x53 'S' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x7c, /* 01111100 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+x60, /* 01100000 */
+x38, /* 00111000 */
+x0c, /* 00001100 */
+x06, /* 00000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+x7c, /* 01111100 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 84 0x54 'T' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x7e, /* 01111110 */
+x7e, /* 01111110 */
+x5a, /* 01011010 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x3c, /* 00111100 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 85 0x55 'U' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+x7c, /* 01111100 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 86 0x56 'V' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+x6c, /* 01101100 */
+x38, /* 00111000 */
+x10, /* 00010000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 87 0x57 'W' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xd6, /* 11010110 */
+xd6, /* 11010110 */
+xd6, /* 11010110 */
+xfe, /* 11111110 */
+xee, /* 11101110 */
+x6c, /* 01101100 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 88 0x58 'X' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+x6c, /* 01101100 */
+x7c, /* 01111100 */
+x38, /* 00111000 */
+x38, /* 00111000 */
+x7c, /* 01111100 */
+x6c, /* 01101100 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 89 0x59 'Y' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+x3c, /* 00111100 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x3c, /* 00111100 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 90 0x5a 'Z' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xfe, /* 11111110 */
+xc6, /* 11000110 */
+x86, /* 10000110 */
+x0c, /* 00001100 */
+x18, /* 00011000 */
+x30, /* 00110000 */
+x60, /* 01100000 */
+xc2, /* 11000010 */
+xc6, /* 11000110 */
+xfe, /* 11111110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 91 0x5b '[' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x3c, /* 00111100 */
+x30, /* 00110000 */
+x30, /* 00110000 */
+x30, /* 00110000 */
+x30, /* 00110000 */
+x30, /* 00110000 */
+x30, /* 00110000 */
+x30, /* 00110000 */
+x30, /* 00110000 */
+x3c, /* 00111100 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 92 0x5c '\' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x80, /* 10000000 */
+xc0, /* 11000000 */
+xe0, /* 11100000 */
+x70, /* 01110000 */
+x38, /* 00111000 */
+x1c, /* 00011100 */
+x0e, /* 00001110 */
+x06, /* 00000110 */
+x02, /* 00000010 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 93 0x5d ']' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x3c, /* 00111100 */
+x0c, /* 00001100 */
+x0c, /* 00001100 */
+x0c, /* 00001100 */
+x0c, /* 00001100 */
+x0c, /* 00001100 */
+x0c, /* 00001100 */
+x0c, /* 00001100 */
+x0c, /* 00001100 */
+x3c, /* 00111100 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 94 0x5e '^' */
+x10, /* 00010000 */
+x38, /* 00111000 */
+x6c, /* 01101100 */
+xc6, /* 11000110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 95 0x5f '_' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xff, /* 11111111 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 96 0x60 '`' */
+x00, /* 00000000 */
+x30, /* 00110000 */
+x18, /* 00011000 */
+x0c, /* 00001100 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 97 0x61 'a' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x78, /* 01111000 */
+x0c, /* 00001100 */
+x7c, /* 01111100 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+x76, /* 01110110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 98 0x62 'b' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xe0, /* 11100000 */
+x60, /* 01100000 */
+x60, /* 01100000 */
+x78, /* 01111000 */
+x6c, /* 01101100 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+x7c, /* 01111100 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 99 0x63 'c' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x7c, /* 01111100 */
+xc6, /* 11000110 */
+xc0, /* 11000000 */
+xc0, /* 11000000 */
+xc0, /* 11000000 */
+xc6, /* 11000110 */
+x7c, /* 01111100 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 100 0x64 'd' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x1c, /* 00011100 */
+x0c, /* 00001100 */
+x0c, /* 00001100 */
+x3c, /* 00111100 */
+x6c, /* 01101100 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+x76, /* 01110110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 101 0x65 'e' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x7c, /* 01111100 */
+xc6, /* 11000110 */
+xfe, /* 11111110 */
+xc0, /* 11000000 */
+xc0, /* 11000000 */
+xc6, /* 11000110 */
+x7c, /* 01111100 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 102 0x66 'f' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x1c, /* 00011100 */
+x36, /* 00110110 */
+x32, /* 00110010 */
+x30, /* 00110000 */
+x78, /* 01111000 */
+x30, /* 00110000 */
+x30, /* 00110000 */
+x30, /* 00110000 */
+x30, /* 00110000 */
+x78, /* 01111000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 103 0x67 'g' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x76, /* 01110110 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+x7c, /* 01111100 */
+x0c, /* 00001100 */
+xcc, /* 11001100 */
+x78, /* 01111000 */
+x00, /* 00000000 */
+    /* 104 0x68 'h' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xe0, /* 11100000 */
+x60, /* 01100000 */
+x60, /* 01100000 */
+x6c, /* 01101100 */
+x76, /* 01110110 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+xe6, /* 11100110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 105 0x69 'i' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x00, /* 00000000 */
+x38, /* 00111000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x3c, /* 00111100 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 106 0x6a 'j' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x06, /* 00000110 */
+x06, /* 00000110 */
+x00, /* 00000000 */
+x0e, /* 00001110 */
+x06, /* 00000110 */
+x06, /* 00000110 */
+x06, /* 00000110 */
+x06, /* 00000110 */
+x06, /* 00000110 */
+x06, /* 00000110 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+x3c, /* 00111100 */
+x00, /* 00000000 */
+    /* 107 0x6b 'k' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xe0, /* 11100000 */
+x60, /* 01100000 */
+x60, /* 01100000 */
+x66, /* 01100110 */
+x6c, /* 01101100 */
+x78, /* 01111000 */
+x78, /* 01111000 */
+x6c, /* 01101100 */
+x66, /* 01100110 */
+xe6, /* 11100110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 108 0x6c 'l' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x38, /* 00111000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x3c, /* 00111100 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 109 0x6d 'm' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xec, /* 11101100 */
+xfe, /* 11111110 */
+xd6, /* 11010110 */
+xd6, /* 11010110 */
+xd6, /* 11010110 */
+xd6, /* 11010110 */
+xc6, /* 11000110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 110 0x6e 'n' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xdc, /* 11011100 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 111 0x6f 'o' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x7c, /* 01111100 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+x7c, /* 01111100 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 112 0x70 'p' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xdc, /* 11011100 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+x7c, /* 01111100 */
+x60, /* 01100000 */
+x60, /* 01100000 */
+xf0, /* 11110000 */
+x00, /* 00000000 */
+    /* 113 0x71 'q' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x76, /* 01110110 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+x7c, /* 01111100 */
+x0c, /* 00001100 */
+x0c, /* 00001100 */
+x1e, /* 00011110 */
+x00, /* 00000000 */
+    /* 114 0x72 'r' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xdc, /* 11011100 */
+x76, /* 01110110 */
+x66, /* 01100110 */
+x60, /* 01100000 */
+x60, /* 01100000 */
+x60, /* 01100000 */
+xf0, /* 11110000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 115 0x73 's' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x7c, /* 01111100 */
+xc6, /* 11000110 */
+x60, /* 01100000 */
+x38, /* 00111000 */
+x0c, /* 00001100 */
+xc6, /* 11000110 */
+x7c, /* 01111100 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 116 0x74 't' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x10, /* 00010000 */
+x30, /* 00110000 */
+x30, /* 00110000 */
+xfc, /* 11111100 */
+x30, /* 00110000 */
+x30, /* 00110000 */
+x30, /* 00110000 */
+x30, /* 00110000 */
+x36, /* 00110110 */
+x1c, /* 00011100 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 117 0x75 'u' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+x76, /* 01110110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 118 0x76 'v' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+x6c, /* 01101100 */
+x38, /* 00111000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 119 0x77 'w' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xd6, /* 11010110 */
+xd6, /* 11010110 */
+xd6, /* 11010110 */
+xfe, /* 11111110 */
+x6c, /* 01101100 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 120 0x78 'x' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xc6, /* 11000110 */
+x6c, /* 01101100 */
+x38, /* 00111000 */
+x38, /* 00111000 */
+x38, /* 00111000 */
+x6c, /* 01101100 */
+xc6, /* 11000110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 121 0x79 'y' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+x7e, /* 01111110 */
+x06, /* 00000110 */
+x0c, /* 00001100 */
+xf8, /* 11111000 */
+x00, /* 00000000 */
+    /* 122 0x7a 'z' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xfe, /* 11111110 */
+xcc, /* 11001100 */
+x18, /* 00011000 */
+x30, /* 00110000 */
+x60, /* 01100000 */
+xc6, /* 11000110 */
+xfe, /* 11111110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 123 0x7b '{' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x0e, /* 00001110 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x70, /* 01110000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x0e, /* 00001110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 124 0x7c '|' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 125 0x7d '}' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x70, /* 01110000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x0e, /* 00001110 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x70, /* 01110000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 126 0x7e '~' */
+x00, /* 00000000 */
+x76, /* 01110110 */
+xdc, /* 11011100 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 127 0x7f '' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x10, /* 00010000 */
+x38, /* 00111000 */
+x6c, /* 01101100 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xfe, /* 11111110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 128 0x80 '€' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x3c, /* 00111100 */
+x66, /* 01100110 */
+xc2, /* 11000010 */
+xc0, /* 11000000 */
+xc0, /* 11000000 */
+xc0, /* 11000000 */
+xc0, /* 11000000 */
+xc2, /* 11000010 */
+x66, /* 01100110 */
+x3c, /* 00111100 */
+x18, /* 00011000 */
+x70, /* 01110000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 129 0x81 '' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xcc, /* 11001100 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+x76, /* 01110110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 130 0x82 '‚' */
+x00, /* 00000000 */
+x0c, /* 00001100 */
+x18, /* 00011000 */
+x30, /* 00110000 */
+x00, /* 00000000 */
+x7c, /* 01111100 */
+xc6, /* 11000110 */
+xfe, /* 11111110 */
+xc0, /* 11000000 */
+xc0, /* 11000000 */
+xc6, /* 11000110 */
+x7c, /* 01111100 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 131 0x83 'ƒ' */
+x00, /* 00000000 */
+x10, /* 00010000 */
+x38, /* 00111000 */
+x6c, /* 01101100 */
+x00, /* 00000000 */
+x78, /* 01111000 */
+x0c, /* 00001100 */
+x7c, /* 01111100 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+x76, /* 01110110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 132 0x84 '„' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xcc, /* 11001100 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x78, /* 01111000 */
+x0c, /* 00001100 */
+x7c, /* 01111100 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+x76, /* 01110110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 133 0x85 '…' */
+x00, /* 00000000 */
+x60, /* 01100000 */
+x30, /* 00110000 */
+x18, /* 00011000 */
+x00, /* 00000000 */
+x78, /* 01111000 */
+x0c, /* 00001100 */
+x7c, /* 01111100 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+x76, /* 01110110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 134 0x86 '†' */
+x00, /* 00000000 */
+x38, /* 00111000 */
+x6c, /* 01101100 */
+x38, /* 00111000 */
+x00, /* 00000000 */
+x78, /* 01111000 */
+x0c, /* 00001100 */
+x7c, /* 01111100 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+x76, /* 01110110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 135 0x87 '‡' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x7c, /* 01111100 */
+xc6, /* 11000110 */
+xc0, /* 11000000 */
+xc0, /* 11000000 */
+xc0, /* 11000000 */
+xc6, /* 11000110 */
+x7c, /* 01111100 */
+x18, /* 00011000 */
+x70, /* 01110000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 136 0x88 'ˆ' */
+x00, /* 00000000 */
+x10, /* 00010000 */
+x38, /* 00111000 */
+x6c, /* 01101100 */
+x00, /* 00000000 */
+x7c, /* 01111100 */
+xc6, /* 11000110 */
+xfe, /* 11111110 */
+xc0, /* 11000000 */
+xc0, /* 11000000 */
+xc6, /* 11000110 */
+x7c, /* 01111100 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 137 0x89 '‰' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xc6, /* 11000110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x7c, /* 01111100 */
+xc6, /* 11000110 */
+xfe, /* 11111110 */
+xc0, /* 11000000 */
+xc0, /* 11000000 */
+xc6, /* 11000110 */
+x7c, /* 01111100 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 138 0x8a 'Š' */
+x00, /* 00000000 */
+x60, /* 01100000 */
+x30, /* 00110000 */
+x18, /* 00011000 */
+x00, /* 00000000 */
+x7c, /* 01111100 */
+xc6, /* 11000110 */
+xfe, /* 11111110 */
+xc0, /* 11000000 */
+xc0, /* 11000000 */
+xc6, /* 11000110 */
+x7c, /* 01111100 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 139 0x8b '‹' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x66, /* 01100110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x38, /* 00111000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x3c, /* 00111100 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 140 0x8c 'Œ' */
+x00, /* 00000000 */
+x18, /* 00011000 */
+x3c, /* 00111100 */
+x66, /* 01100110 */
+x00, /* 00000000 */
+x38, /* 00111000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x3c, /* 00111100 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 141 0x8d '' */
+x00, /* 00000000 */
+x60, /* 01100000 */
+x30, /* 00110000 */
+x18, /* 00011000 */
+x00, /* 00000000 */
+x38, /* 00111000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x3c, /* 00111100 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 142 0x8e 'Ž' */
+x00, /* 00000000 */
+xc6, /* 11000110 */
+x00, /* 00000000 */
+x10, /* 00010000 */
+x38, /* 00111000 */
+x6c, /* 01101100 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xfe, /* 11111110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 143 0x8f '' */
+x38, /* 00111000 */
+x6c, /* 01101100 */
+x38, /* 00111000 */
+x10, /* 00010000 */
+x38, /* 00111000 */
+x6c, /* 01101100 */
+xc6, /* 11000110 */
+xfe, /* 11111110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 144 0x90 '' */
+x0c, /* 00001100 */
+x18, /* 00011000 */
+x00, /* 00000000 */
+xfe, /* 11111110 */
+x66, /* 01100110 */
+x62, /* 01100010 */
+x68, /* 01101000 */
+x78, /* 01111000 */
+x68, /* 01101000 */
+x62, /* 01100010 */
+x66, /* 01100110 */
+xfe, /* 11111110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 145 0x91 '‘' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xec, /* 11101100 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x7e, /* 01111110 */
+xd8, /* 11011000 */
+xd8, /* 11011000 */
+x6e, /* 01101110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 146 0x92 '’' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x3e, /* 00111110 */
+x6c, /* 01101100 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+xfe, /* 11111110 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+xce, /* 11001110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 147 0x93 '“' */
+x00, /* 00000000 */
+x10, /* 00010000 */
+x38, /* 00111000 */
+x6c, /* 01101100 */
+x00, /* 00000000 */
+x7c, /* 01111100 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+x7c, /* 01111100 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 148 0x94 '”' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xc6, /* 11000110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x7c, /* 01111100 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+x7c, /* 01111100 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 149 0x95 '•' */
+x00, /* 00000000 */
+x60, /* 01100000 */
+x30, /* 00110000 */
+x18, /* 00011000 */
+x00, /* 00000000 */
+x7c, /* 01111100 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+x7c, /* 01111100 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 150 0x96 '–' */
+x00, /* 00000000 */
+x30, /* 00110000 */
+x78, /* 01111000 */
+xcc, /* 11001100 */
+x00, /* 00000000 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+x76, /* 01110110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 151 0x97 '—' */
+x00, /* 00000000 */
+x60, /* 01100000 */
+x30, /* 00110000 */
+x18, /* 00011000 */
+x00, /* 00000000 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+x76, /* 01110110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 152 0x98 '˜' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xc6, /* 11000110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+x7e, /* 01111110 */
+x06, /* 00000110 */
+x0c, /* 00001100 */
+x78, /* 01111000 */
+x00, /* 00000000 */
+    /* 153 0x99 '™' */
+x00, /* 00000000 */
+xc6, /* 11000110 */
+x00, /* 00000000 */
+x7c, /* 01111100 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+x7c, /* 01111100 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 154 0x9a 'š' */
+x00, /* 00000000 */
+xc6, /* 11000110 */
+x00, /* 00000000 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+x7c, /* 01111100 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 155 0x9b '›' */
+x00, /* 00000000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x7c, /* 01111100 */
+xc6, /* 11000110 */
+xc0, /* 11000000 */
+xc0, /* 11000000 */
+xc0, /* 11000000 */
+xc6, /* 11000110 */
+x7c, /* 01111100 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 156 0x9c 'œ' */
+x00, /* 00000000 */
+x38, /* 00111000 */
+x6c, /* 01101100 */
+x64, /* 01100100 */
+x60, /* 01100000 */
+xf0, /* 11110000 */
+x60, /* 01100000 */
+x60, /* 01100000 */
+x60, /* 01100000 */
+x60, /* 01100000 */
+xe6, /* 11100110 */
+xfc, /* 11111100 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 157 0x9d '' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+x3c, /* 00111100 */
+x18, /* 00011000 */
+x7e, /* 01111110 */
+x18, /* 00011000 */
+x7e, /* 01111110 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 158 0x9e 'ž' */
+x00, /* 00000000 */
+xf8, /* 11111000 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+xf8, /* 11111000 */
+xc4, /* 11000100 */
+xcc, /* 11001100 */
+xde, /* 11011110 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+xc6, /* 11000110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 159 0x9f 'Ÿ' */
+x00, /* 00000000 */
+x0e, /* 00001110 */
+x1b, /* 00011011 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x7e, /* 01111110 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+xd8, /* 11011000 */
+x70, /* 01110000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 160 0xa0 ' ' */
+x00, /* 00000000 */
+x18, /* 00011000 */
+x30, /* 00110000 */
+x60, /* 01100000 */
+x00, /* 00000000 */
+x78, /* 01111000 */
+x0c, /* 00001100 */
+x7c, /* 01111100 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+x76, /* 01110110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 161 0xa1 '¡' */
+x00, /* 00000000 */
+x0c, /* 00001100 */
+x18, /* 00011000 */
+x30, /* 00110000 */
+x00, /* 00000000 */
+x38, /* 00111000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x3c, /* 00111100 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 162 0xa2 '¢' */
+x00, /* 00000000 */
+x18, /* 00011000 */
+x30, /* 00110000 */
+x60, /* 01100000 */
+x00, /* 00000000 */
+x7c, /* 01111100 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+x7c, /* 01111100 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 163 0xa3 '£' */
+x00, /* 00000000 */
+x18, /* 00011000 */
+x30, /* 00110000 */
+x60, /* 01100000 */
+x00, /* 00000000 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+x76, /* 01110110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 164 0xa4 '¤' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x76, /* 01110110 */
+xdc, /* 11011100 */
+x00, /* 00000000 */
+xdc, /* 11011100 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 165 0xa5 '¥' */
+x76, /* 01110110 */
+xdc, /* 11011100 */
+x00, /* 00000000 */
+xc6, /* 11000110 */
+xe6, /* 11100110 */
+xf6, /* 11110110 */
+xfe, /* 11111110 */
+xde, /* 11011110 */
+xce, /* 11001110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 166 0xa6 '¦' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x3c, /* 00111100 */
+x6c, /* 01101100 */
+x6c, /* 01101100 */
+x3e, /* 00111110 */
+x00, /* 00000000 */
+x7e, /* 01111110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 167 0xa7 '§' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x38, /* 00111000 */
+x6c, /* 01101100 */
+x6c, /* 01101100 */
+x38, /* 00111000 */
+x00, /* 00000000 */
+x7c, /* 01111100 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 168 0xa8 '¨' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x30, /* 00110000 */
+x30, /* 00110000 */
+x00, /* 00000000 */
+x30, /* 00110000 */
+x30, /* 00110000 */
+x60, /* 01100000 */
+xc0, /* 11000000 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+x7c, /* 01111100 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 169 0xa9 '©' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xfe, /* 11111110 */
+xc0, /* 11000000 */
+xc0, /* 11000000 */
+xc0, /* 11000000 */
+xc0, /* 11000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 170 0xaa 'ª' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xfe, /* 11111110 */
+x06, /* 00000110 */
+x06, /* 00000110 */
+x06, /* 00000110 */
+x06, /* 00000110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 171 0xab '«' */
+x00, /* 00000000 */
+x60, /* 01100000 */
+xe0, /* 11100000 */
+x62, /* 01100010 */
+x66, /* 01100110 */
+x6c, /* 01101100 */
+x18, /* 00011000 */
+x30, /* 00110000 */
+x60, /* 01100000 */
+xdc, /* 11011100 */
+x86, /* 10000110 */
+x0c, /* 00001100 */
+x18, /* 00011000 */
+x3e, /* 00111110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 172 0xac '¬' */
+x00, /* 00000000 */
+x60, /* 01100000 */
+xe0, /* 11100000 */
+x62, /* 01100010 */
+x66, /* 01100110 */
+x6c, /* 01101100 */
+x18, /* 00011000 */
+x30, /* 00110000 */
+x66, /* 01100110 */
+xce, /* 11001110 */
+x9a, /* 10011010 */
+x3f, /* 00111111 */
+x06, /* 00000110 */
+x06, /* 00000110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 173 0xad '' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x00, /* 00000000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x3c, /* 00111100 */
+x3c, /* 00111100 */
+x3c, /* 00111100 */
+x18, /* 00011000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 174 0xae '®' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x36, /* 00110110 */
+x6c, /* 01101100 */
+xd8, /* 11011000 */
+x6c, /* 01101100 */
+x36, /* 00110110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 175 0xaf '¯' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xd8, /* 11011000 */
+x6c, /* 01101100 */
+x36, /* 00110110 */
+x6c, /* 01101100 */
+xd8, /* 11011000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 176 0xb0 '°' */
+x11, /* 00010001 */
+x44, /* 01000100 */
+x11, /* 00010001 */
+x44, /* 01000100 */
+x11, /* 00010001 */
+x44, /* 01000100 */
+x11, /* 00010001 */
+x44, /* 01000100 */
+x11, /* 00010001 */
+x44, /* 01000100 */
+x11, /* 00010001 */
+x44, /* 01000100 */
+x11, /* 00010001 */
+x44, /* 01000100 */
+x11, /* 00010001 */
+x44, /* 01000100 */
+    /* 177 0xb1 '±' */
+x55, /* 01010101 */
+xaa, /* 10101010 */
+x55, /* 01010101 */
+xaa, /* 10101010 */
+x55, /* 01010101 */
+xaa, /* 10101010 */
+x55, /* 01010101 */
+xaa, /* 10101010 */
+x55, /* 01010101 */
+xaa, /* 10101010 */
+x55, /* 01010101 */
+xaa, /* 10101010 */
+x55, /* 01010101 */
+xaa, /* 10101010 */
+x55, /* 01010101 */
+xaa, /* 10101010 */
+    /* 178 0xb2 '²' */
+xdd, /* 11011101 */
+x77, /* 01110111 */
+xdd, /* 11011101 */
+x77, /* 01110111 */
+xdd, /* 11011101 */
+x77, /* 01110111 */
+xdd, /* 11011101 */
+x77, /* 01110111 */
+xdd, /* 11011101 */
+x77, /* 01110111 */
+xdd, /* 11011101 */
+x77, /* 01110111 */
+xdd, /* 11011101 */
+x77, /* 01110111 */
+xdd, /* 11011101 */
+x77, /* 01110111 */
+    /* 179 0xb3 '³' */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+    /* 180 0xb4 '´' */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+xf8, /* 11111000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+    /* 181 0xb5 'µ' */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+xf8, /* 11111000 */
+x18, /* 00011000 */
+xf8, /* 11111000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+    /* 182 0xb6 '¶' */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+xf6, /* 11110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+    /* 183 0xb7 '·' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xfe, /* 11111110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+    /* 184 0xb8 '¸' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xf8, /* 11111000 */
+x18, /* 00011000 */
+xf8, /* 11111000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+    /* 185 0xb9 '¹' */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+xf6, /* 11110110 */
+x06, /* 00000110 */
+xf6, /* 11110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+    /* 186 0xba 'º' */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+    /* 187 0xbb '»' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xfe, /* 11111110 */
+x06, /* 00000110 */
+xf6, /* 11110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+    /* 188 0xbc '¼' */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+xf6, /* 11110110 */
+x06, /* 00000110 */
+xfe, /* 11111110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 189 0xbd '½' */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+xfe, /* 11111110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 190 0xbe '¾' */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+xf8, /* 11111000 */
+x18, /* 00011000 */
+xf8, /* 11111000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 191 0xbf '¿' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xf8, /* 11111000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+    /* 192 0xc0 'À' */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x1f, /* 00011111 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 193 0xc1 'Á' */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+xff, /* 11111111 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 194 0xc2 'Â' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xff, /* 11111111 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+    /* 195 0xc3 'Ã' */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x1f, /* 00011111 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+    /* 196 0xc4 'Ä' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xff, /* 11111111 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 197 0xc5 'Å' */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+xff, /* 11111111 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+    /* 198 0xc6 'Æ' */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x1f, /* 00011111 */
+x18, /* 00011000 */
+x1f, /* 00011111 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+    /* 199 0xc7 'Ç' */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x37, /* 00110111 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+    /* 200 0xc8 'È' */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x37, /* 00110111 */
+x30, /* 00110000 */
+x3f, /* 00111111 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 201 0xc9 'É' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x3f, /* 00111111 */
+x30, /* 00110000 */
+x37, /* 00110111 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+    /* 202 0xca 'Ê' */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+xf7, /* 11110111 */
+x00, /* 00000000 */
+xff, /* 11111111 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 203 0xcb 'Ë' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xff, /* 11111111 */
+x00, /* 00000000 */
+xf7, /* 11110111 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+    /* 204 0xcc 'Ì' */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x37, /* 00110111 */
+x30, /* 00110000 */
+x37, /* 00110111 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+    /* 205 0xcd 'Í' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xff, /* 11111111 */
+x00, /* 00000000 */
+xff, /* 11111111 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 206 0xce 'Î' */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+xf7, /* 11110111 */
+x00, /* 00000000 */
+xf7, /* 11110111 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+    /* 207 0xcf 'Ï' */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+xff, /* 11111111 */
+x00, /* 00000000 */
+xff, /* 11111111 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 208 0xd0 'Ð' */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+xff, /* 11111111 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 209 0xd1 'Ñ' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xff, /* 11111111 */
+x00, /* 00000000 */
+xff, /* 11111111 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+    /* 210 0xd2 'Ò' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xff, /* 11111111 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+    /* 211 0xd3 'Ó' */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x3f, /* 00111111 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 212 0xd4 'Ô' */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x1f, /* 00011111 */
+x18, /* 00011000 */
+x1f, /* 00011111 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 213 0xd5 'Õ' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x1f, /* 00011111 */
+x18, /* 00011000 */
+x1f, /* 00011111 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+    /* 214 0xd6 'Ö' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x3f, /* 00111111 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+    /* 215 0xd7 '×' */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+xff, /* 11111111 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+    /* 216 0xd8 'Ø' */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+xff, /* 11111111 */
+x18, /* 00011000 */
+xff, /* 11111111 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+    /* 217 0xd9 'Ù' */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+xf8, /* 11111000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 218 0xda 'Ú' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x1f, /* 00011111 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+    /* 219 0xdb 'Û' */
+xff, /* 11111111 */
+xff, /* 11111111 */
+xff, /* 11111111 */
+xff, /* 11111111 */
+xff, /* 11111111 */
+xff, /* 11111111 */
+xff, /* 11111111 */
+xff, /* 11111111 */
+xff, /* 11111111 */
+xff, /* 11111111 */
+xff, /* 11111111 */
+xff, /* 11111111 */
+xff, /* 11111111 */
+xff, /* 11111111 */
+xff, /* 11111111 */
+xff, /* 11111111 */
+    /* 220 0xdc 'Ü' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xff, /* 11111111 */
+xff, /* 11111111 */
+xff, /* 11111111 */
+xff, /* 11111111 */
+xff, /* 11111111 */
+xff, /* 11111111 */
+xff, /* 11111111 */
+xff, /* 11111111 */
+xff, /* 11111111 */
+    /* 221 0xdd 'Ý' */
+xf0, /* 11110000 */
+xf0, /* 11110000 */
+xf0, /* 11110000 */
+xf0, /* 11110000 */
+xf0, /* 11110000 */
+xf0, /* 11110000 */
+xf0, /* 11110000 */
+xf0, /* 11110000 */
+xf0, /* 11110000 */
+xf0, /* 11110000 */
+xf0, /* 11110000 */
+xf0, /* 11110000 */
+xf0, /* 11110000 */
+xf0, /* 11110000 */
+xf0, /* 11110000 */
+xf0, /* 11110000 */
+    /* 222 0xde 'Þ' */
+x0f, /* 00001111 */
+x0f, /* 00001111 */
+x0f, /* 00001111 */
+x0f, /* 00001111 */
+x0f, /* 00001111 */
+x0f, /* 00001111 */
+x0f, /* 00001111 */
+x0f, /* 00001111 */
+x0f, /* 00001111 */
+x0f, /* 00001111 */
+x0f, /* 00001111 */
+x0f, /* 00001111 */
+x0f, /* 00001111 */
+x0f, /* 00001111 */
+x0f, /* 00001111 */
+x0f, /* 00001111 */
+    /* 223 0xdf 'ß' */
+xff, /* 11111111 */
+xff, /* 11111111 */
+xff, /* 11111111 */
+xff, /* 11111111 */
+xff, /* 11111111 */
+xff, /* 11111111 */
+xff, /* 11111111 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 224 0xe0 'à' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x76, /* 01110110 */
+xdc, /* 11011100 */
+xd8, /* 11011000 */
+xd8, /* 11011000 */
+xd8, /* 11011000 */
+xdc, /* 11011100 */
+x76, /* 01110110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 225 0xe1 'á' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x78, /* 01111000 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+xd8, /* 11011000 */
+xcc, /* 11001100 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xcc, /* 11001100 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 226 0xe2 'â' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xfe, /* 11111110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc0, /* 11000000 */
+xc0, /* 11000000 */
+xc0, /* 11000000 */
+xc0, /* 11000000 */
+xc0, /* 11000000 */
+xc0, /* 11000000 */
+xc0, /* 11000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 227 0xe3 'ã' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xfe, /* 11111110 */
+x6c, /* 01101100 */
+x6c, /* 01101100 */
+x6c, /* 01101100 */
+x6c, /* 01101100 */
+x6c, /* 01101100 */
+x6c, /* 01101100 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 228 0xe4 'ä' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xfe, /* 11111110 */
+xc6, /* 11000110 */
+x60, /* 01100000 */
+x30, /* 00110000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x30, /* 00110000 */
+x60, /* 01100000 */
+xc6, /* 11000110 */
+xfe, /* 11111110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 229 0xe5 'å' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x7e, /* 01111110 */
+xd8, /* 11011000 */
+xd8, /* 11011000 */
+xd8, /* 11011000 */
+xd8, /* 11011000 */
+xd8, /* 11011000 */
+x70, /* 01110000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 230 0xe6 'æ' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+x7c, /* 01111100 */
+x60, /* 01100000 */
+x60, /* 01100000 */
+xc0, /* 11000000 */
+x00, /* 00000000 */
+    /* 231 0xe7 'ç' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x76, /* 01110110 */
+xdc, /* 11011100 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 232 0xe8 'è' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x7e, /* 01111110 */
+x18, /* 00011000 */
+x3c, /* 00111100 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+x3c, /* 00111100 */
+x18, /* 00011000 */
+x7e, /* 01111110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 233 0xe9 'é' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x38, /* 00111000 */
+x6c, /* 01101100 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xfe, /* 11111110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+x6c, /* 01101100 */
+x38, /* 00111000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 234 0xea 'ê' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x38, /* 00111000 */
+x6c, /* 01101100 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+x6c, /* 01101100 */
+x6c, /* 01101100 */
+x6c, /* 01101100 */
+x6c, /* 01101100 */
+xee, /* 11101110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 235 0xeb 'ë' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x1e, /* 00011110 */
+x30, /* 00110000 */
+x18, /* 00011000 */
+x0c, /* 00001100 */
+x3e, /* 00111110 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+x3c, /* 00111100 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 236 0xec 'ì' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x7e, /* 01111110 */
+xdb, /* 11011011 */
+xdb, /* 11011011 */
+xdb, /* 11011011 */
+x7e, /* 01111110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 237 0xed 'í' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x03, /* 00000011 */
+x06, /* 00000110 */
+x7e, /* 01111110 */
+xdb, /* 11011011 */
+xdb, /* 11011011 */
+xf3, /* 11110011 */
+x7e, /* 01111110 */
+x60, /* 01100000 */
+xc0, /* 11000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 238 0xee 'î' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x1c, /* 00011100 */
+x30, /* 00110000 */
+x60, /* 01100000 */
+x60, /* 01100000 */
+x7c, /* 01111100 */
+x60, /* 01100000 */
+x60, /* 01100000 */
+x60, /* 01100000 */
+x30, /* 00110000 */
+x1c, /* 00011100 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 239 0xef 'ï' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x7c, /* 01111100 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 240 0xf0 'ð' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xfe, /* 11111110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xfe, /* 11111110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xfe, /* 11111110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 241 0xf1 'ñ' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x7e, /* 01111110 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x7e, /* 01111110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 242 0xf2 'ò' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x30, /* 00110000 */
+x18, /* 00011000 */
+x0c, /* 00001100 */
+x06, /* 00000110 */
+x0c, /* 00001100 */
+x18, /* 00011000 */
+x30, /* 00110000 */
+x00, /* 00000000 */
+x7e, /* 01111110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 243 0xf3 'ó' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x0c, /* 00001100 */
+x18, /* 00011000 */
+x30, /* 00110000 */
+x60, /* 01100000 */
+x30, /* 00110000 */
+x18, /* 00011000 */
+x0c, /* 00001100 */
+x00, /* 00000000 */
+x7e, /* 01111110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 244 0xf4 'ô' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x0e, /* 00001110 */
+x1b, /* 00011011 */
+x1b, /* 00011011 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+    /* 245 0xf5 'õ' */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+xd8, /* 11011000 */
+xd8, /* 11011000 */
+xd8, /* 11011000 */
+x70, /* 01110000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 246 0xf6 'ö' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x18, /* 00011000 */
+x00, /* 00000000 */
+x7e, /* 01111110 */
+x00, /* 00000000 */
+x18, /* 00011000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 247 0xf7 '÷' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x76, /* 01110110 */
+xdc, /* 11011100 */
+x00, /* 00000000 */
+x76, /* 01110110 */
+xdc, /* 11011100 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 248 0xf8 'ø' */
+x00, /* 00000000 */
+x38, /* 00111000 */
+x6c, /* 01101100 */
+x6c, /* 01101100 */
+x38, /* 00111000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 249 0xf9 'ù' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 250 0xfa 'ú' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x18, /* 00011000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 251 0xfb 'û' */
+x00, /* 00000000 */
+x0f, /* 00001111 */
+x0c, /* 00001100 */
+x0c, /* 00001100 */
+x0c, /* 00001100 */
+x0c, /* 00001100 */
+x0c, /* 00001100 */
+xec, /* 11101100 */
+x6c, /* 01101100 */
+x6c, /* 01101100 */
+x3c, /* 00111100 */
+x1c, /* 00011100 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 252 0xfc 'ü' */
+x00, /* 00000000 */
+x6c, /* 01101100 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 253 0xfd 'ý' */
+x00, /* 00000000 */
+x3c, /* 00111100 */
+x66, /* 01100110 */
+x0c, /* 00001100 */
+x18, /* 00011000 */
+x32, /* 00110010 */
+x7e, /* 01111110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 254 0xfe 'þ' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x7e, /* 01111110 */
+x7e, /* 01111110 */
+x7e, /* 01111110 */
+x7e, /* 01111110 */
+x7e, /* 01111110 */
+x7e, /* 01111110 */
+x7e, /* 01111110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 255 0xff 'ÿ' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+};
+ /** @}
+ */

 /tags/0.2.0.2/kernel/genarch/src/fb/helenos.xbm
 ,0 → 1,163
+#define helenos_width 127
+#define helenos_height 120
+static unsigned char helenos_bits[] = {
+x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+x00, 0x00, 0x00, 0x00, 0x00, 0xc0, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00,
+x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0x1f, 0x00,
+x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+x80, 0x0f, 0x78, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+x00, 0x00, 0x00, 0x00, 0xf0, 0x01, 0xc0, 0xc0, 0x00, 0x00, 0x00, 0x00,
+x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x7e, 0x00, 0x80, 0x81,
+x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0,
+x0f, 0x00, 0x00, 0x83, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+x00, 0x00, 0x00, 0xf0, 0x01, 0x00, 0x00, 0x03, 0x01, 0x00, 0x00, 0x00,
+x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3e, 0x00, 0x00, 0x00, 0x06,
+x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0, 0x07,
+x00, 0x00, 0x00, 0x06, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+x00, 0x00, 0xf8, 0x00, 0x00, 0x00, 0x00, 0x0c, 0x02, 0x00, 0x00, 0x00,
+x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x1f, 0x00, 0x00, 0x00, 0x00, 0x0c,
+x06, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xe0, 0x03, 0x00,
+x00, 0x00, 0x00, 0x18, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+x00, 0x7c, 0x00, 0x00, 0x00, 0x00, 0x00, 0x18, 0x0c, 0x00, 0x00, 0x00,
+x00, 0x00, 0x00, 0x00, 0x80, 0x1f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x18,
+x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xe0, 0x03, 0x00, 0x00,
+x00, 0x00, 0x00, 0x30, 0x18, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+x7c, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x30, 0x18, 0x00, 0x00, 0x00,
+x00, 0x00, 0x00, 0x80, 0x0f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x60,
+x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0x01, 0x00, 0x00, 0x00,
+x00, 0x00, 0x00, 0x60, 0x30, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3e,
+x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x20, 0x00, 0x00, 0x00,
+x00, 0x00, 0xc0, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0,
+x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0x00, 0x00, 0x00, 0x00, 0x00,
+x00, 0x00, 0x00, 0xc0, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3f, 0x00,
+x00, 0x00, 0x00, 0x00, 0x38, 0x00, 0x00, 0x80, 0xc1, 0x00, 0x00, 0x00,
+x00, 0xc0, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0x00, 0x00, 0x80,
+xc1, 0x00, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+xfe, 0x01, 0x00, 0x00, 0x83, 0x00, 0x00, 0x00, 0x00, 0x38, 0x00, 0x00,
+x00, 0x00, 0x00, 0x00, 0xff, 0x03, 0x00, 0x00, 0x83, 0x01, 0x00, 0x00,
+x00, 0x1c, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0x03, 0x00, 0x00,
+x03, 0x01, 0x00, 0x00, 0x00, 0x0c, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+xff, 0x07, 0x00, 0x00, 0x06, 0x03, 0x00, 0x00, 0x00, 0x06, 0x00, 0x00,
+x00, 0x00, 0x00, 0x00, 0xff, 0x07, 0x00, 0x00, 0x06, 0x03, 0x00, 0x00,
+x08, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0x07, 0x00, 0x00,
+x0c, 0x02, 0x00, 0x00, 0x08, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+xff, 0x0f, 0x00, 0x00, 0x0c, 0x06, 0x00, 0x00, 0x08, 0x03, 0x00, 0x00,
+x00, 0x00, 0x00, 0x00, 0xfe, 0x0f, 0x00, 0x00, 0x18, 0x04, 0x00, 0x00,
+x08, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfe, 0x1f, 0x00, 0x00,
+x18, 0x0c, 0x00, 0x00, 0x08, 0x03, 0x00, 0x00, 0x00, 0x07, 0x00, 0x00,
+xfc, 0x1f, 0x00, 0x00, 0x18, 0x0c, 0x00, 0x00, 0x08, 0x03, 0x00, 0x00,
+x80, 0x1f, 0x00, 0x00, 0xfc, 0x1f, 0x00, 0x00, 0x30, 0x18, 0x00, 0x00,
+x18, 0x02, 0x00, 0x00, 0xc0, 0x3f, 0x00, 0x00, 0xfc, 0x3f, 0x00, 0x00,
+x30, 0x18, 0x00, 0x00, 0x18, 0x06, 0x00, 0x00, 0xe0, 0x7f, 0x00, 0x00,
+xf8, 0x3f, 0x00, 0x00, 0x60, 0x10, 0x00, 0x00, 0x18, 0x06, 0x00, 0x00,
+xe0, 0x7f, 0x00, 0x00, 0xf8, 0x7f, 0x00, 0x00, 0x60, 0x30, 0x00, 0x00,
+x38, 0x0c, 0x00, 0x00, 0xf0, 0x7f, 0x00, 0x00, 0xf0, 0x7f, 0x00, 0x00,
+xe0, 0x20, 0x00, 0x00, 0x30, 0x0c, 0x00, 0x00, 0xe0, 0xff, 0x00, 0x00,
+xf0, 0x7f, 0x00, 0x00, 0xc0, 0x78, 0x00, 0x00, 0x70, 0x08, 0x00, 0x00,
+xe0, 0xff, 0x00, 0x00, 0xf0, 0xff, 0x00, 0x00, 0xc0, 0x7c, 0x00, 0x00,
+x70, 0x18, 0x00, 0x00, 0xe0, 0xff, 0x01, 0x00, 0xf0, 0xff, 0x00, 0x00,
+x80, 0xfd, 0x00, 0x00, 0x60, 0x3f, 0x00, 0x00, 0xc0, 0xff, 0x01, 0x00,
+xfc, 0xff, 0x01, 0x00, 0x80, 0xf9, 0x00, 0x00, 0xe0, 0x3f, 0x00, 0x00,
+xc0, 0xff, 0x01, 0x80, 0xff, 0xff, 0x01, 0x00, 0x80, 0xfb, 0x00, 0x00,
+xc0, 0x7f, 0x00, 0x00, 0xc0, 0xff, 0x03, 0xe0, 0xff, 0xff, 0x03, 0x00,
+x00, 0xf3, 0x01, 0x00, 0xc0, 0x7f, 0x00, 0x00, 0x80, 0xff, 0x03, 0xfc,
+xff, 0xff, 0x03, 0x00, 0x00, 0xf3, 0x01, 0x00, 0xc0, 0x7f, 0x00, 0x00,
+x80, 0xff, 0x07, 0xff, 0xff, 0xff, 0x03, 0x00, 0x00, 0xf6, 0x03, 0x00,
+x80, 0xff, 0x00, 0x00, 0x00, 0xff, 0xe7, 0xff, 0xff, 0xff, 0x07, 0x00,
+x00, 0xe6, 0x03, 0x00, 0x80, 0xff, 0x00, 0x00, 0x00, 0xff, 0xff, 0xff,
+xff, 0xff, 0x07, 0x00, 0x00, 0xec, 0x07, 0x00, 0x00, 0xff, 0x01, 0x00,
+x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0x0f, 0x00, 0x00, 0xcc, 0x07, 0x00,
+x00, 0xff, 0x01, 0x00, 0x00, 0xfe, 0xff, 0xff, 0x7f, 0xfe, 0x0f, 0x00,
+x00, 0xdc, 0x07, 0x00, 0x00, 0xff, 0x01, 0x00, 0x00, 0xfe, 0xff, 0xff,
+x1f, 0xfe, 0x0f, 0x00, 0x00, 0xd8, 0x0f, 0x00, 0x00, 0xfe, 0x03, 0x00,
+x00, 0xfc, 0xff, 0xff, 0x03, 0xfe, 0x1f, 0x00, 0x00, 0x98, 0x0f, 0x00,
+x00, 0xfe, 0x03, 0x00, 0x00, 0xfc, 0xff, 0xff, 0x00, 0xfc, 0x1f, 0x00,
+x00, 0xb0, 0x1f, 0x00, 0x00, 0xfc, 0x07, 0x00, 0x00, 0xf8, 0xff, 0x1f,
+x00, 0xfc, 0x3f, 0x00, 0x00, 0x30, 0x1f, 0x00, 0x00, 0xfc, 0x07, 0x00,
+x00, 0xf8, 0xff, 0x07, 0x00, 0xfc, 0x3f, 0x00, 0x00, 0x70, 0x1f, 0x00,
+x00, 0xfc, 0x07, 0x00, 0x00, 0xf8, 0xff, 0x00, 0x00, 0xf8, 0x7f, 0x00,
+x00, 0x60, 0x3e, 0x00, 0x00, 0xf8, 0x0f, 0x00, 0x00, 0xf0, 0x7f, 0x00,
+x00, 0xf8, 0x7f, 0x00, 0x00, 0xe0, 0x3e, 0x00, 0x00, 0xf8, 0x0f, 0x00,
+x00, 0xf0, 0x7f, 0x00, 0x00, 0xf0, 0x7f, 0x00, 0x00, 0xf8, 0x7e, 0x00,
+x00, 0xf0, 0x1f, 0x00, 0x00, 0xf0, 0xff, 0x00, 0x00, 0xf0, 0xff, 0x00,
+x00, 0xfc, 0x7c, 0x00, 0x00, 0xf0, 0x1f, 0x00, 0x00, 0xe0, 0xff, 0x00,
+x00, 0xf0, 0xff, 0x00, 0x00, 0xfe, 0xfd, 0x00, 0x00, 0xf0, 0x1f, 0x00,
+x00, 0xe0, 0xff, 0x01, 0x00, 0xe0, 0xff, 0x00, 0x80, 0xff, 0xf9, 0x00,
+x00, 0xe0, 0x3f, 0x00, 0x00, 0xc0, 0xff, 0x01, 0x00, 0xe0, 0xff, 0x00,
+xc0, 0xff, 0xfb, 0x00, 0x00, 0xe0, 0x3f, 0x00, 0x00, 0xc0, 0xff, 0x03,
+x00, 0xc0, 0x7f, 0x00, 0xe0, 0xff, 0xfb, 0x01, 0x00, 0xc0, 0x7f, 0x00,
+x00, 0x80, 0xff, 0x03, 0x00, 0xc0, 0x7f, 0x00, 0xf8, 0xff, 0xf7, 0x01,
+x00, 0xc0, 0x7f, 0x00, 0x00, 0x80, 0xff, 0x03, 0x00, 0x80, 0x3f, 0x00,
+xfc, 0xff, 0xf7, 0x03, 0x00, 0xc0, 0x7f, 0x00, 0x00, 0x80, 0xff, 0x07,
+x00, 0x00, 0x00, 0x00, 0xfe, 0xef, 0xe7, 0x03, 0x00, 0x80, 0xff, 0x00,
+x00, 0x00, 0xff, 0x07, 0x00, 0x00, 0x00, 0x80, 0xff, 0xdf, 0xef, 0x07,
+x00, 0x80, 0xff, 0x00, 0x00, 0x00, 0xff, 0x0f, 0x00, 0x00, 0x00, 0xc0,
+xff, 0xdf, 0xef, 0x07, 0x00, 0x00, 0xff, 0x01, 0x00, 0x00, 0xff, 0x0f,
+x00, 0x00, 0x00, 0xe0, 0xff, 0xcf, 0xcf, 0x07, 0x00, 0x00, 0xff, 0x01,
+x00, 0x00, 0xfe, 0x1f, 0x00, 0x00, 0x00, 0xf0, 0x7f, 0xc3, 0xcf, 0x0f,
+x00, 0x00, 0xff, 0x01, 0x00, 0x00, 0xfe, 0x1f, 0x00, 0x00, 0x00, 0xfc,
+xff, 0xe0, 0xcf, 0x0f, 0x00, 0x00, 0xfe, 0x03, 0x00, 0x00, 0xfc, 0x1f,
+x00, 0x00, 0x00, 0xfe, 0xff, 0xf9, 0xc7, 0x0f, 0x00, 0x00, 0xfe, 0x03,
+x00, 0x00, 0xfc, 0x1f, 0x00, 0x00, 0x00, 0xff, 0xff, 0xff, 0xe7, 0x0f,
+x00, 0x00, 0xfc, 0x07, 0x00, 0x00, 0xf8, 0x0f, 0x00, 0x00, 0xc0, 0xff,
+xff, 0xff, 0xe7, 0x0f, 0x00, 0x00, 0xfc, 0x07, 0x00, 0x00, 0xf8, 0x07,
+x00, 0x00, 0xe0, 0xff, 0xff, 0xff, 0xe3, 0x0f, 0x00, 0x00, 0xfc, 0x0f,
+x00, 0x00, 0xf0, 0x03, 0x00, 0x00, 0xf0, 0xff, 0xff, 0xff, 0xf1, 0x0f,
+x00, 0x00, 0xf8, 0x0f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0xff,
+xff, 0xff, 0xf8, 0x0f, 0x00, 0x00, 0xf8, 0x0f, 0x00, 0x00, 0x00, 0x00,
+x00, 0x00, 0xfe, 0xff, 0xff, 0x3f, 0xfc, 0x0f, 0x00, 0x00, 0xf0, 0x1f,
+x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0xff, 0x07, 0xfe, 0x0f,
+x00, 0x00, 0xf0, 0x1f, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0, 0xff, 0xff,
+xff, 0x81, 0xff, 0x07, 0x00, 0x00, 0xf0, 0x3f, 0x00, 0x00, 0x00, 0x00,
+x00, 0xe0, 0xff, 0xff, 0x3f, 0xe0, 0xff, 0x07, 0x00, 0x00, 0xe0, 0x3f,
+x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0xff, 0x07, 0xfc, 0xff, 0x07,
+x00, 0x00, 0xe0, 0x3f, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0xff, 0xff,
+x80, 0xff, 0xff, 0x03, 0x00, 0x00, 0xc0, 0x7f, 0x00, 0x00, 0x00, 0x00,
+x00, 0xfe, 0xff, 0x1f, 0xf0, 0xff, 0xff, 0x01, 0x00, 0x00, 0xc0, 0x7f,
+x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0x07, 0xfe, 0xff, 0xff, 0x00,
+x00, 0x00, 0xc0, 0x3f, 0x00, 0x00, 0x00, 0x00, 0xc0, 0xff, 0xff, 0xc0,
+xff, 0xff, 0x7f, 0x00, 0x00, 0x00, 0x80, 0xbf, 0x00, 0x00, 0x00, 0x00,
+xe0, 0xff, 0x1f, 0xf0, 0xff, 0xff, 0x3f, 0x00, 0x00, 0x00, 0x80, 0xdf,
+x00, 0x3c, 0x00, 0x00, 0xf0, 0xff, 0x03, 0xfe, 0xff, 0xff, 0x0f, 0x00,
+x00, 0x00, 0x00, 0xcf, 0x00, 0x7e, 0x00, 0x00, 0xfc, 0x7f, 0xc0, 0xff,
+xff, 0xff, 0x01, 0x00, 0x00, 0x00, 0x00, 0x8f, 0x01, 0x7e, 0x00, 0x00,
+xfe, 0x0f, 0xf8, 0xff, 0xff, 0x3f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x97,
+x01, 0x3e, 0x00, 0x00, 0xff, 0x03, 0xff, 0xff, 0xff, 0x0f, 0x00, 0x00,
+x00, 0x00, 0x00, 0x9e, 0x03, 0x00, 0x00, 0xc0, 0x7f, 0xc0, 0xff, 0xff,
+xff, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3e, 0x03, 0x00, 0x00, 0xe0,
+x0f, 0xf8, 0xff, 0xff, 0x3f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3c,
+x03, 0x00, 0x00, 0xf8, 0x01, 0xff, 0xff, 0xff, 0x07, 0x00, 0x00, 0x00,
+x00, 0x00, 0x00, 0x7c, 0x06, 0x00, 0x00, 0x3f, 0xe0, 0xff, 0xff, 0xff,
+x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x7c, 0x0e, 0x00, 0xe0, 0x0f,
+xfc, 0xff, 0xff, 0x3f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8,
+x3c, 0x00, 0xfc, 0x01, 0xff, 0xff, 0xff, 0x07, 0x00, 0x00, 0x00, 0x00,
+x00, 0x00, 0x00, 0xf8, 0x78, 0x80, 0x3f, 0xe0, 0xff, 0xff, 0xff, 0x00,
+x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xe1, 0xff, 0x07, 0xfc,
+xff, 0xff, 0x1f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0,
+x81, 0xff, 0x80, 0xff, 0xff, 0xff, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00,
+x00, 0x00, 0x00, 0xf0, 0x03, 0x00, 0xf0, 0xff, 0xff, 0xff, 0x00, 0x00,
+x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xe0, 0x07, 0x00, 0xfe, 0xff,
+xff, 0x1f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xe0,
+x0f, 0x00, 0xff, 0xff, 0xff, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+x00, 0x00, 0x00, 0xc0, 0x3f, 0xc0, 0xff, 0xff, 0xff, 0x00, 0x00, 0x00,
+x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0, 0xff, 0xff, 0xff, 0xff,
+x1f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0,
+xff, 0xff, 0xff, 0xff, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+x00, 0x00, 0x00, 0x80, 0xff, 0xff, 0xff, 0x7f, 0x00, 0x00, 0x00, 0x00,
+x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0xff, 0x1f,
+x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+xff, 0xff, 0xff, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+x00, 0x00, 0x00, 0x00, 0xfe, 0xff, 0x7f, 0x00, 0x00, 0x00, 0x00, 0x00,
+x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0xff, 0x0f, 0x00,
+x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+xf0, 0xff, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+x00, 0x00, 0x00, 0x00, 0x80, 0x3f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };

 /tags/0.2.0.2/kernel/genarch/src/ofw/memory_init.c
 ,0 → 1,98
+/*
+ * Copyright (C) 2005 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup genarch
+ * @{
+ */
+/** @file
+ */
+#include <genarch/ofw/memory_init.h>
+#include <genarch/ofw/ofw.h>
+#include <panic.h>
+#include <mm/frame.h>
+#include <align.h>
+#include <arch/types.h>
+#include <typedefs.h>
+#define MEMMAP_MAX_RECORDS 32
+typedef struct {
+    __address start;
+    size_t size;
+} memmap_t;
+static memmap_t memmap[MEMMAP_MAX_RECORDS];
+size_t total_mem = 0;
+void ofw_init_memmap(void)
+{
+    int i;
+    int ret;
+    phandle handle = ofw_find_device("/memory");
+    if (handle == -1)
+        panic("No RAM\n");
+    ret = ofw_get_property(handle, "reg", &memmap, sizeof(memmap));
+    if (ret == -1)
+        panic("Device /memory has no reg property\n");
+    for (i = 0; i < MEMMAP_MAX_RECORDS; i++) {
+        if (memmap[i].size == 0)
+            break;
+        total_mem += memmap[i].size;
+    }
+}
+size_t ofw_get_memory_size(void)
+{
+    return total_mem;
+}
+void ofw_init_zones(void)
+{
+    int i;
+    pfn_t confdata;
+    for (i = 0; i < MEMMAP_MAX_RECORDS; i++) {
+        if (memmap[i].size == 0)
+            break;
+        confdata = ADDR2PFN(memmap[i].start);
+        if (confdata == 0)
+            confdata = 2;
+        zone_create(ADDR2PFN(memmap[i].start),
+                SIZE2FRAMES(ALIGN_DOWN(memmap[i].size,PAGE_SIZE)),
+                confdata, 0);
+    }
+}
+ /** @}
+ */

 /tags/0.2.0.2/kernel/genarch/src/ofw/ofw.c
 ,0 → 1,133
+/*
+ * Copyright (C) 2005 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup genarch
+ * @{
+ */
+/** @file
+ */
+#include <genarch/ofw/ofw.h>
+#include <arch/asm.h>
+#include <stdarg.h>
+#include <cpu.h>
+#include <arch/types.h>
+ofw_entry ofw;
+phandle ofw_chosen;
+ihandle ofw_stdin;
+ihandle ofw_stdout;
+void ofw_init(void)
+{
+    ofw_chosen = ofw_find_device("/chosen");
+    if (ofw_chosen == -1)
+        ofw_done();
+    if (ofw_get_property(ofw_chosen, "stdin",  &ofw_stdin, sizeof(ofw_stdin)) <= 0)
+        ofw_stdin = 0;
+    if (ofw_get_property(ofw_chosen, "stdout",  &ofw_stdout, sizeof(ofw_stdout)) <= 0)
+        ofw_stdout = 0;
+}
+void ofw_done(void)
+{
+    (void) ofw_call("exit", 0, 0);
+    cpu_halt();
+}
+__native ofw_call(const char *service, const int nargs, const int nret, ...)
+{
+    va_list list;
+    ofw_args_t args;
+    int i;
+    args.service = service;
+    args.nargs = nargs;
+    args.nret = nret;
+    va_start(list, nret);
+    for (i = 0; i < nargs; i++)
+        args.args[i] = va_arg(list, ofw_arg_t);
+    va_end(list);
+    for (i = 0; i < nret; i++)
+        args.args[i + nargs] = 0;
+    ofw(&args);
+    return args.args[nargs];
+}
+void ofw_putchar(const char ch)
+{
+    if (ofw_stdout == 0)
+        return;
+    (void) ofw_call("write", 3, 1, ofw_stdout, &ch, 1);
+}
+/** Read character from OFW's input.
+ *
+ * This call is non-blocking.
+ *
+ * @return 0 if no character was read, character read otherwise.
+ */
+char ofw_getchar(void)
+{
+    char ch;
+    if (ofw_stdin == 0)
+        return 0;
+    if (ofw_call("read", 3, 1, ofw_stdin, &ch, 1) == 1)
+        return ch;
+    else
+        return 0;
+}
+phandle ofw_find_device(const char *name)
+{
+    return (phandle) ofw_call("finddevice", 1, 1, name);
+}
+int ofw_get_property(const phandle device, const char *name, void *buf, const int buflen)
+{
+    return (int) ofw_call("getprop", 4, 1, device, name, buf, buflen);
+}
+void *ofw_claim(const void *addr, const int size, const int align)
+{
+    return (void *) ofw_call("claim", 3, 1, addr, size, align);
+}
+ /** @}
+ */

 /tags/0.2.0.2/kernel/genarch/include/i8042/i8042.h
 ,0 → 1,62
+/*
+ * Copyright (C) 2001-2004 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup genarch
+ * @{
+ */
+/** @file
+ */
+#ifndef __I8042_H__
+#define __I8042_H__
+/** Scancodes. */
+#define SC_ESC      0x01
+#define SC_BACKSPACE    0x0e
+#define SC_LSHIFT   0x2a
+#define SC_RSHIFT   0x36
+#define SC_CAPSLOCK 0x3a
+#define SC_SPEC_ESCAPE  0xe0
+#define SC_LEFTARR      0x4b
+#define SC_RIGHTARR     0x4d
+#define SC_UPARR        0x48
+#define SC_DOWNARR      0x50
+#define SC_DELETE       0x53
+#define SC_HOME         0x47
+#define SC_END          0x4f
+extern void i8042_init(void);
+extern void i8042_poll(void);
+extern void i8042_grab(void);
+extern void i8042_release(void);
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/genarch/include/softint/division.h
 ,0 → 1,70
+/*
+ * Copyright (C) 2006 Josef Cejka
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup genarch
+ * @{
+ */
+/** @file
+ */
+#ifndef __SOFTINT_DIVISION_H__
+#define __SOFTINT_DIVISION_H__
+/* 32bit integer division */
+int __divsi3(int a, int b);
+/* 64bit integer division */
+long long __divdi3(long long a, long long b);
+/* 32bit unsigned integer division */
+unsigned int __udivsi3(unsigned int a, unsigned int b);
+/* 64bit unsigned integer division */
+unsigned long long __udivdi3(unsigned long long a, unsigned long long b);
+/* 32bit remainder of the signed division */
+int __modsi3(int a, int b);
+/* 64bit remainder of the signed division */
+long long __moddi3(long long a, long long b);
+/* 32bit remainder of the unsigned division */
+unsigned int __umodsi3(unsigned int a, unsigned int b);
+/* 64bit remainder of the unsigned division */
+unsigned long long __umoddi3(unsigned long long a, unsigned long long b);
+unsigned long long __udivmoddi3(unsigned long long a, unsigned long long b, unsigned long long *c);
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/genarch/include/fb/font-8x16.h
 ,0 → 1,47
+/*
+ * Copyright (C) 2005 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup genarch
+ * @{
+ */
+/** @file
+ */
+#ifndef __FONT_8X16_H__
+#define __FONT_8X16_H__
+#define FONT_GLIPHS     256
+#define FONT_SCANLINES  16
+extern unsigned char fb_font[FONT_GLIPHS * FONT_SCANLINES];
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/genarch/include/fb/fb.h
 ,0 → 1,48
+/*
+ * Copyright (C) 2006 Ondrej Palkovsky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup genarch
+ * @{
+ */
+/** @file
+ */
+#ifndef _FB_H_
+#define _FB_H_
+#include <typedefs.h>
+#include <arch/types.h>
+extern spinlock_t fb_lock;
+void fb_init(__address addr, unsigned int x, unsigned int y, unsigned int bpp, unsigned int scan);
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/genarch/include/mm/as_ht.h
 ,0 → 1,46
+/*
+ * Copyright (C) 2006 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup genarchmm
+ * @{
+ */
+/** @file
+ */
+#ifndef __AS_HT_H__
+#define __AS_HT_H__
+#include <mm/as.h>
+extern as_operations_t as_ht_operations;
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/genarch/include/mm/page_pt.h
 ,0 → 1,121
+/*
+ * Copyright (C) 2006 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup genarchmm
+ * @{
+ */
+/** @file
+ */
+/*
+ * This is the generic 4-level page table interface.
+ * Architectures that use hierarchical page tables
+ * are supposed to implement *_ARCH macros.
+ */
+#ifdef CONFIG_PAGE_PT
+#ifndef __PAGE_PT_H__
+#define __PAGE_PT_H__
+#include <arch/types.h>
+#include <typedefs.h>
+#include <mm/page.h>
+/*
+ * Number of entries in each level.
+ */
+#define PTL0_ENTRIES            PTL0_ENTRIES_ARCH
+#define PTL1_ENTRIES            PTL1_ENTRIES_ARCH
+#define PTL2_ENTRIES            PTL2_ENTRIES_ARCH
+#define PTL3_ENTRIES            PTL3_ENTRIES_ARCH
+/*
+ * These macros process vaddr and extract those portions
+ * of it that function as indices to respective page tables.
+ */
+#define PTL0_INDEX(vaddr)       PTL0_INDEX_ARCH(vaddr)
+#define PTL1_INDEX(vaddr)       PTL1_INDEX_ARCH(vaddr)
+#define PTL2_INDEX(vaddr)       PTL2_INDEX_ARCH(vaddr)
+#define PTL3_INDEX(vaddr)       PTL3_INDEX_ARCH(vaddr)
+#define SET_PTL0_ADDRESS(ptl0)      SET_PTL0_ADDRESS_ARCH(ptl0)
+/*
+ * These macros traverse the 4-level tree of page tables,
+ * each descending by one level.
+ */
+#define GET_PTL1_ADDRESS(ptl0, i)   GET_PTL1_ADDRESS_ARCH(ptl0, i)
+#define GET_PTL2_ADDRESS(ptl1, i)   GET_PTL2_ADDRESS_ARCH(ptl1, i)
+#define GET_PTL3_ADDRESS(ptl2, i)   GET_PTL3_ADDRESS_ARCH(ptl2, i)
+#define GET_FRAME_ADDRESS(ptl3, i)  GET_FRAME_ADDRESS_ARCH(ptl3, i)
+/*
+ * These macros are provided to change shape of the 4-level
+ * tree of page tables on respective level.
+ */
+#define SET_PTL1_ADDRESS(ptl0, i, a)    SET_PTL1_ADDRESS_ARCH(ptl0, i, a)
+#define SET_PTL2_ADDRESS(ptl1, i, a)    SET_PTL2_ADDRESS_ARCH(ptl1, i, a)
+#define SET_PTL3_ADDRESS(ptl2, i, a)    SET_PTL3_ADDRESS_ARCH(ptl2, i, a)
+#define SET_FRAME_ADDRESS(ptl3, i, a)   SET_FRAME_ADDRESS_ARCH(ptl3, i, a)
+/*
+ * These macros are provided to query various flags within the page tables.
+ */
+#define GET_PTL1_FLAGS(ptl0, i)     GET_PTL1_FLAGS_ARCH(ptl0, i)
+#define GET_PTL2_FLAGS(ptl1, i)     GET_PTL2_FLAGS_ARCH(ptl1, i)
+#define GET_PTL3_FLAGS(ptl2, i)     GET_PTL3_FLAGS_ARCH(ptl2, i)
+#define GET_FRAME_FLAGS(ptl3, i)    GET_FRAME_FLAGS_ARCH(ptl3, i)
+/*
+ * These macros are provided to set/clear various flags within the page tables.
+ */
+#define SET_PTL1_FLAGS(ptl0, i, x)  SET_PTL1_FLAGS_ARCH(ptl0, i, x)
+#define SET_PTL2_FLAGS(ptl1, i, x)  SET_PTL2_FLAGS_ARCH(ptl1, i, x)
+#define SET_PTL3_FLAGS(ptl2, i, x)  SET_PTL3_FLAGS_ARCH(ptl2, i, x)
+#define SET_FRAME_FLAGS(ptl3, i, x) SET_FRAME_FLAGS_ARCH(ptl3, i, x)
+#define PTE_VALID(p)        PTE_VALID_ARCH((p))
+#define PTE_PRESENT(p)      PTE_PRESENT_ARCH((p))
+#define PTE_GET_FRAME(p)    PTE_GET_FRAME_ARCH((p))
+#define PTE_READABLE(p)     1
+#define PTE_WRITABLE(p)     PTE_WRITABLE_ARCH((p))
+#define PTE_EXECUTABLE(p)   PTE_EXECUTABLE_ARCH((p))
+extern page_mapping_operations_t pt_mapping_operations;
+extern void page_mapping_insert_pt(as_t *as, __address page, __address frame, int flags);
+extern pte_t *page_mapping_find_pt(as_t *as, __address page);
+#endif
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/genarch/include/mm/asid_fifo.h
 ,0 → 1,44
+/*
+ * Copyright (C) 2006 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup genarchmm
+ * @{
+ */
+/** @file
+ */
+#ifndef __ASID_FIFO_H__
+#define __ASID_FIFO_H__
+extern void asid_fifo_init(void);
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/genarch/include/mm/as_pt.h
 ,0 → 1,46
+/*
+ * Copyright (C) 2006 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup genarchmm
+ * @{
+ */
+/** @file
+ */
+#ifndef __AS_PT_H__
+#define __AS_PT_H__
+#include <mm/as.h>
+extern as_operations_t as_pt_operations;
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/genarch/include/mm/page_ht.h
 ,0 → 1,92
+/*
+ * Copyright (C) 2006 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup genarchmm
+ * @{
+ */
+/** @file
+ */
+/*
+ * This is the generic page hash table interface.
+ */
+#ifdef CONFIG_PAGE_HT
+#ifndef __PAGE_HT_H__
+#define __PAGE_HT_H__
+#include <mm/page.h>
+#include <typedefs.h>
+#include <arch/types.h>
+#include <adt/list.h>
+#include <adt/hash_table.h>
+#define PAGE_HT_KEYS    2
+#define KEY_AS      0
+#define KEY_PAGE    1
+#define PAGE_HT_ENTRIES_BITS    13
+#define PAGE_HT_ENTRIES     (1<<PAGE_HT_ENTRIES_BITS)
+#define PTE_VALID(pte)      ((pte) != NULL)
+#define PTE_PRESENT(pte)    ((pte)->p != 0)
+#define PTE_GET_FRAME(pte)  ((pte)->frame)
+#define PTE_READABLE(pte)   1
+#define PTE_WRITABLE(pte)   ((pte)->w != 0)
+#define PTE_EXECUTABLE(pte) ((pte)->x != 0)
+#define SET_PTL0_ADDRESS(x)
+struct pte {
+    link_t link;        /**< Page hash table link. */
+    as_t *as;       /**< Address space. */
+    __address page;     /**< Virtual memory page. */
+    __address frame;    /**< Physical memory frame. */
+    unsigned g : 1;     /**< Global page. */
+    unsigned x : 1;     /**< Execute. */
+    unsigned w : 1;     /**< Writable. */
+    unsigned k : 1;     /**< Kernel privileges required. */
+    unsigned c : 1;     /**< Cacheable. */
+    unsigned a : 1;     /**< Accessed. */
+    unsigned d : 1;     /**< Dirty. */
+    unsigned p : 1;     /**< Present. */
+};
+extern page_mapping_operations_t ht_mapping_operations;
+extern mutex_t page_ht_lock;
+extern hash_table_t page_ht;
+extern hash_table_operations_t ht_operations;
+#endif
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/genarch/include/ofw/memory_init.h
 ,0 → 1,48
+/*
+ * Copyright (C) 2006 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup genarch
+ * @{
+ */
+/** @file
+ */
+#ifndef __OFW_MEMORY_INIT_H__
+#define __OFW_MEMORY_INIT_H__
+#include <typedefs.h>
+extern void ofw_init_memmap(void);
+extern size_t ofw_get_memory_size(void);
+extern void ofw_init_zones(void);
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/genarch/include/ofw/ofw.h
 ,0 → 1,73
+/*
+ * Copyright (C) 2005 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup genarch
+ * @{
+ */
+/** @file
+ */
+#ifndef __OFW_H__
+#define __OFW_H__
+#include <arch/types.h>
+#define MAX_OFW_ARGS    10
+typedef __native ofw_arg_t;
+typedef int ihandle;
+typedef int phandle;
+/** OpenFirmware command structure
+ *
+ */
+typedef struct {
+    const char *service;          /**< Command name */
+    __native nargs;               /**< Number of in arguments */
+    __native nret;                /**< Number of out arguments */
+    ofw_arg_t args[MAX_OFW_ARGS]; /**< List of arguments */
+} ofw_args_t;
+typedef void (*ofw_entry)(ofw_args_t *);
+extern ofw_entry ofw;
+extern void ofw_init(void);
+extern void ofw_done(void);
+extern __native ofw_call(const char *service, const int nargs, const int nret, ...);
+extern void ofw_putchar(const char ch);
+extern char ofw_getchar(void);
+extern phandle ofw_find_device(const char *name);
+extern int ofw_get_property(const phandle device, const char *name, void *buf, const int buflen);
+extern void *ofw_claim(const void *addr, const int size, const int align);
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/genarch/include/acpi/acpi.h
 ,0 → 1,95
+/*
+ * Copyright (C) 2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup genarch
+ * @{
+ */
+/** @file
+ */
+#ifndef __ACPI_H__
+#define __ACPI_H__
+#include <arch/types.h>
+/* Root System Description Pointer */
+struct acpi_rsdp {
+    __u8 signature[8];
+    __u8 checksum;
+    __u8 oemid[6];
+    __u8 revision;
+    __u32 rsdt_address;
+    __u32 length;
+    __u64 xsdt_address;
+    __u32 ext_checksum;
+    __u8 reserved[3];
+} __attribute__ ((packed));
+/* System Description Table Header */
+struct acpi_sdt_header {
+    __u8 signature[4];
+    __u32 length;
+    __u8 revision;
+    __u8 checksum;
+    __u8 oemid[6];
+    __u8 oem_table_id[8];
+    __u32 oem_revision;
+    __u32 creator_id;
+    __u32 creator_revision;
+} __attribute__ ((packed));;
+struct acpi_signature_map {
+    __u8 *signature;
+    struct acpi_sdt_header **sdt_ptr;
+    char *description;
+};
+/* Root System Description Table */
+struct acpi_rsdt {
+    struct acpi_sdt_header header;
+    __u32 entry[];
+} __attribute__ ((packed));;
+/* Extended System Description Table */
+struct acpi_xsdt {
+    struct acpi_sdt_header header;
+    __u64 entry[];
+} __attribute__ ((packed));;
+extern struct acpi_rsdp *acpi_rsdp;
+extern struct acpi_rsdt *acpi_rsdt;
+extern struct acpi_xsdt *acpi_xsdt;
+extern void acpi_init(void);
+extern int acpi_sdt_check(__u8 *sdt);
+#endif /* __ACPI_H__ */
+ /** @}
+ */

 /tags/0.2.0.2/kernel/genarch/include/acpi/madt.h
 ,0 → 1,150
+/*
+ * Copyright (C) 2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup genarch
+ * @{
+ */
+/** @file
+ */
+#ifndef __MADT_H__
+#define __MADT_H__
+#include <genarch/acpi/acpi.h>
+#include <arch/smp/apic.h>
+#include <arch/smp/smp.h>
+#define MADT_L_APIC         0
+#define MADT_IO_APIC            1
+#define MADT_INTR_SRC_OVRD      2
+#define MADT_NMI_SRC            3
+#define MADT_L_APIC_NMI         4
+#define MADT_L_APIC_ADDR_OVRD       5
+#define MADT_IO_SAPIC           6
+#define MADT_L_SAPIC            7
+#define MADT_PLATFORM_INTR_SRC      8
+#define MADT_RESERVED_SKIP_BEGIN    9
+#define MADT_RESERVED_SKIP_END      127
+#define MADT_RESERVED_OEM_BEGIN     128
+struct madt_apic_header {
+    __u8 type;
+    __u8 length;
+} __attribute__ ((packed));
+/* Multiple APIC Description Table */
+struct acpi_madt {
+    struct acpi_sdt_header header;
+    __u32 l_apic_address;
+    __u32 flags;
+    struct madt_apic_header apic_header[];
+} __attribute__ ((packed));
+struct madt_l_apic {
+    struct madt_apic_header header;
+    __u8 acpi_id;
+    __u8 apic_id;
+    __u32 flags;
+} __attribute__ ((packed));
+struct madt_io_apic {
+    struct madt_apic_header header;
+    __u8 io_apic_id;
+    __u8 reserved;
+    __u32 io_apic_address;
+    __u32 global_intr_base;
+} __attribute__ ((packed));
+struct madt_intr_src_ovrd {
+    struct madt_apic_header header;
+    __u8 bus;
+    __u8 source;
+    __u32 global_int;
+    __u16 flags;
+} __attribute__ ((packed));
+struct madt_nmi_src {
+    struct madt_apic_header header;
+    __u16 flags;
+    __u32 global_intr;
+} __attribute__ ((packed));
+struct madt_l_apic_nmi {
+    struct madt_apic_header header;
+    __u8 acpi_id;
+    __u16 flags;
+    __u8 l_apic_lint;
+} __attribute__ ((packed));
+struct madt_l_apic_addr_ovrd {
+    struct madt_apic_header header;
+    __u16 reserved;
+    __u64 l_apic_address;
+} __attribute__ ((packed));
+struct madt_io_sapic {
+    struct madt_apic_header header;
+    __u8 io_apic_id;
+    __u8 reserved;
+    __u32 global_intr_base;
+    __u64 io_apic_address;
+} __attribute__ ((packed));
+struct madt_l_sapic {
+    struct madt_apic_header header;
+    __u8 acpi_id;
+    __u8 sapic_id;
+    __u8 sapic_eid;
+    __u8 reserved[3];
+    __u32 flags;
+    __u32 acpi_processor_uid_value;
+    __u8 acpi_processor_uid_str[1];
+} __attribute__ ((packed));
+struct madt_platform_intr_src {
+    struct madt_apic_header header;
+    __u16 flags;
+    __u8 intr_type;
+    __u8 processor_id;
+    __u8 processor_eid;
+    __u8 io_sapic_vector;
+    __u32 global_intr;
+    __u32 platform_intr_src_flags;
+} __attribute__ ((packed));
+extern struct acpi_madt *acpi_madt;
+extern struct smp_config_operations madt_config_operations;
+extern void acpi_madt_parse(void);
+#endif /* __MADT_H__ */
+ /** @}
+ */

 /tags/0.2.0.2/kernel/genarch/Makefile.inc
 ,0 → 1,76
+# Copyright (C) 2005 Martin Decky
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# - Redistributions of source code must retain the above copyright
+#   notice, this list of conditions and the following disclaimer.
+# - Redistributions in binary form must reproduce the above copyright
+#   notice, this list of conditions and the following disclaimer in the
+#   documentation and/or other materials provided with the distribution.
+# - The name of the author may not be used to endorse or promote products
+#   derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+## Accepted configuration directives
+#
+ifeq ($(CONFIG_OFW),y)
+    GENARCH_SOURCES += \
+        genarch/src/ofw/ofw.c \
+        genarch/src/ofw/memory_init.c
+endif
+ifeq ($(CONFIG_ACPI),y)
+    GENARCH_SOURCES += \
+        genarch/src/acpi/acpi.c \
+        genarch/src/acpi/madt.c
+endif
+ifeq ($(CONFIG_PAGE_PT),y)
+    GENARCH_SOURCES += \
+        genarch/src/mm/page_pt.c \
+        genarch/src/mm/as_pt.c
+endif
+ifeq ($(CONFIG_PAGE_HT),y)
+    GENARCH_SOURCES += \
+        genarch/src/mm/page_ht.c \
+        genarch/src/mm/as_ht.c
+endif
+ifeq ($(CONFIG_ASID),y)
+    GENARCH_SOURCES += \
+        genarch/src/mm/asid.c
+endif
+ifeq ($(CONFIG_ASID_FIFO),y)
+    GENARCH_SOURCES += \
+        genarch/src/mm/asid_fifo.c
+endif
+ifeq ($(CONFIG_SOFTINT),y)
+    GENARCH_SOURCES += \
+        genarch/src/softint/division.c
+endif
+## Framebuffer
+ifeq ($(CONFIG_FB),y)
+    GENARCH_SOURCES += \
+        genarch/src/fb/font-8x16.c \
+        genarch/src/fb/fb.c
+    DEFS += -DCONFIG_FB
+endif
+## i8042 controller
+ifeq ($(CONFIG_I8042),y)
+    GENARCH_SOURCES += \
+        genarch/src/i8042/i8042.c
+endif

 /tags/0.2.0.2/kernel/generic/include/interrupt.h
 ,0 → 1,74
+/*
+ * Copyright (C) 2005 Ondrej Palkovsky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup genericinterrupt
+ * @{
+ */
+/** @file
+ */
+#ifndef __INTERRUPT_H__
+#define __INTERRUPT_H__
+#include <arch/interrupt.h>
+#include <typedefs.h>
+#include <arch/types.h>
+#include <proc/task.h>
+#include <proc/thread.h>
+#include <arch.h>
+#include <console/klog.h>
+#include <ipc/irq.h>
+#ifndef IVT_ITEMS
+#   define IVT_ITEMS 0
+#endif
+#ifndef IVT_FIRST
+#   define IVT_FIRST 0
+#endif
+#define fault_if_from_uspace(istate, cmd, ...) \
+{ \
+    if (istate_from_uspace(istate)) { \
+                klog_printf(cmd, ##__VA_ARGS__); \
+                klog_printf("Task %lld got exception at PC:%p. Task killed.", TASK->taskid, istate_get_pc(istate)); \
+        task_kill(TASK->taskid); \
+        thread_exit(); \
+    } \
+}
+extern iroutine exc_register(int n, const char *name, iroutine f);
+extern void exc_dispatch(int n, istate_t *t);
+void exc_init(void);
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/generic/include/time/clock.h
 ,0 → 1,46
+/*
+ * Copyright (C) 2001-2004 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/** @addtogroup time
+ * @{
+ */
+/** @file
+ */
+#ifndef __CLOCK_H__
+#define __CLOCK_H__
+#define HZ      100
+extern void clock(void);
+extern void clock_counter_init(void);
+#endif
+/** @}
+ */

 /tags/0.2.0.2/kernel/generic/include/time/delay.h
 ,0 → 1,45
+/*
+ * Copyright (C) 2001-2004 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/** @addtogroup time
+ * @{
+ */
+/** @file
+ */
+#ifndef __DELAY_H__
+#define __DELAY_H__
+#include <arch/types.h>
+extern void delay(__u32 microseconds);
+#endif
+/** @}
+ */

 /tags/0.2.0.2/kernel/generic/include/time/timeout.h
 ,0 → 1,69
+/*
+ * Copyright (C) 2001-2004 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/** @addtogroup time
+ * @{
+ */
+/** @file
+ */
+#ifndef __TIMEOUT_H__
+#define __TIMEOUT_H__
+#include <arch/types.h>
+#include <typedefs.h>
+#include <synch/spinlock.h>
+#include <adt/list.h>
+#define us2ticks(us)    ((__u64)(((__u32) (us)/(1000000/HZ))))
+typedef void (* timeout_handler_t)(void *arg);
+struct timeout {
+    SPINLOCK_DECLARE(lock);
+    link_t link;            /**< Link to the list of active timeouts on THE->cpu */
+    __u64 ticks;            /**< Timeout will be activated in this amount of clock() ticks. */
+    timeout_handler_t handler;  /**< Function that will be called on timeout activation. */
+    void *arg;          /**< Argument to be passed to handler() function. */
+    cpu_t *cpu;         /**< On which processor is this timeout registered. */
+};
+extern void timeout_init(void);
+extern void timeout_initialize(timeout_t *t);
+extern void timeout_reinitialize(timeout_t *t);
+extern void timeout_register(timeout_t *t, __u64 usec, timeout_handler_t f, void *arg);
+extern bool timeout_unregister(timeout_t *t);
+#endif
+/** @}
+ */

 /tags/0.2.0.2/kernel/generic/include/cpu.h
 ,0 → 1,108
+/*
+ * Copyright (C) 2001-2004 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/** @addtogroup generic
+ * @{
+ */
+/** @file
+ */
+#ifndef __CPU_H__
+#define __CPU_H__
+#include <arch/cpu.h>
+#include <proc/scheduler.h>
+#include <synch/spinlock.h>
+#include <synch/waitq.h>
+#include <arch/types.h>
+#include <typedefs.h>
+#include <arch/context.h>
+#include <config.h>
+#include <adt/list.h>
+#include <mm/tlb.h>
+#define CPU_STACK_SIZE  STACK_SIZE
+/** CPU structure.
+ *
+ * There is one structure like this for every processor.
+ */
+struct cpu {
+    SPINLOCK_DECLARE(lock);
+    tlb_shootdown_msg_t tlb_messages[TLB_MESSAGE_QUEUE_LEN];
+    count_t tlb_messages_count;
+    context_t saved_context;
+    atomic_t nrdy;
+    runq_t rq[RQ_COUNT];
+    volatile count_t needs_relink;
+    SPINLOCK_DECLARE(timeoutlock);
+    link_t timeout_active_head;
+    count_t missed_clock_ticks; /**< When system clock loses a tick, it is recorded here
+                         so that clock() can react. This variable is
+                         CPU-local and can be only accessed when interrupts
+                         are disabled. */
+    /**
+     * Processor ID assigned by kernel.
+     */
+    int id;
+    int active;
+    int tlb_active;
+    __u16 frequency_mhz;
+    __u32 delay_loop_const;
+    cpu_arch_t arch;
+    thread_t *fpu_owner;
+    /**
+     * Stack used by scheduler when there is no running thread.
+     */
+    __u8 *stack;
+};
+extern cpu_t *cpus;
+extern void cpu_init(void);
+extern void cpu_list(void);
+extern void cpu_arch_init(void);
+extern void cpu_identify(void);
+extern void cpu_print_report(cpu_t *m);
+#endif
+/** @}
+ */

 /tags/0.2.0.2/kernel/generic/include/ipc/irq.h
 ,0 → 1,93
+/*
+ * Copyright (C) 2006 Ondrej Palkovsky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup genericipc
+ * @{
+ */
+/** @file
+ */
+#ifndef __IRQ_H__
+#define __IRQ_H__
+/** Maximum length of IPC IRQ program */
+#define IRQ_MAX_PROG_SIZE 10
+/** Reserved 'virtual' messages for kernel notifications */
+#define IPC_IRQ_RESERVED_VIRTUAL 10
+#define IPC_IRQ_KLOG       (-1)
+#define IPC_IRQ_KBDRESTART (-2)
+typedef enum {
+    CMD_MEM_READ_1 = 0,
+    CMD_MEM_READ_2,
+    CMD_MEM_READ_4,
+    CMD_MEM_READ_8,
+    CMD_MEM_WRITE_1,
+    CMD_MEM_WRITE_2,
+    CMD_MEM_WRITE_4,
+    CMD_MEM_WRITE_8,
+    CMD_PORT_READ_1,
+    CMD_PORT_WRITE_1,
+    CMD_IA64_GETCHAR,
+    CMD_PPC32_GETCHAR,
+    CMD_LAST
+} irq_cmd_type;
+typedef struct {
+    irq_cmd_type cmd;
+    void *addr;
+    unsigned long long value;
+    int dstarg;
+} irq_cmd_t;
+typedef struct {
+    unsigned int cmdcount;
+    irq_cmd_t *cmds;
+} irq_code_t;
+#ifdef KERNEL
+#include <ipc/ipc.h>
+extern void ipc_irq_make_table(int irqcount);
+extern int ipc_irq_register(answerbox_t *box, int irq, irq_code_t *ucode);
+extern void ipc_irq_send_notif(int irq);
+extern void ipc_irq_send_msg(int irq, __native a1, __native a2, __native a3);
+extern void ipc_irq_unregister(answerbox_t *box, int irq);
+extern void irq_ipc_bind_arch(__native irq);
+extern void ipc_irq_cleanup(answerbox_t *box);
+#endif
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/generic/include/ipc/sysipc.h
 ,0 → 1,63
+/*
+ * Copyright (C) 2006 Ondrej Palkovsky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup genericipc
+ * @{
+ */
+/** @file
+ */
+#ifndef __SYSIPC_H__
+#define __SYSIPC_H__
+#include <ipc/ipc.h>
+#include <ipc/irq.h>
+#include <arch/types.h>
+__native sys_ipc_call_sync_fast(__native phoneid, __native method,
+                __native arg1, ipc_data_t *data);
+__native sys_ipc_call_sync(__native phoneid, ipc_data_t *question,
+               ipc_data_t *reply);
+__native sys_ipc_call_async_fast(__native phoneid, __native method,
+                 __native arg1, __native arg2);
+__native sys_ipc_call_async(__native phoneid, ipc_data_t *data);
+__native sys_ipc_answer_fast(__native callid, __native retval,
+                 __native arg1, __native arg2);
+__native sys_ipc_answer(__native callid, ipc_data_t *data);
+__native sys_ipc_wait_for_call(ipc_data_t *calldata, __u32 usec, int nonblocking);
+__native sys_ipc_forward_fast(__native callid, __native phoneid,
+                  __native method, __native arg1);
+__native sys_ipc_hangup(int phoneid);
+__native sys_ipc_register_irq(int irq, irq_code_t *ucode);
+__native sys_ipc_unregister_irq(int irq);
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/generic/include/ipc/ipc.h
 ,0 → 1,248
+/*
+ * Copyright (C) 2006 Ondrej Palkovsky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup genericipc
+ * @{
+ */
+/** @file
+ */
+#ifndef __IPC_H__
+#define __IPC_H__
+/* Length of data being transfered with IPC call */
+/* - the uspace may not be able to utilize full length */
+#define IPC_CALL_LEN    4
+/** Maximum active async calls per thread */
+#ifdef CONFIG_DEBUG
+# define IPC_MAX_ASYNC_CALLS  4
+#else
+# define IPC_MAX_ASYNC_CALLS  4000
+#endif
+/* Flags for calls */
+#define IPC_CALL_ANSWERED       (1<<0) /**< This is answer to a call */
+#define IPC_CALL_STATIC_ALLOC   (1<<1) /**< This call will not be freed on error */
+#define IPC_CALL_DISCARD_ANSWER (1<<2) /**< Answer will not be passed to
+                    * userspace, will be discarded */
+#define IPC_CALL_FORWARDED      (1<<3) /* Call was forwarded */
+#define IPC_CALL_CONN_ME_TO     (1<<4) /* Identify connect_me_to answer */
+#define IPC_CALL_NOTIF          (1<<5) /* Interrupt notification */
+/* Flags of callid (the addresses are aligned at least to 4,
+ * that is why we can use bottom 2 bits of the call address
+ */
+#define IPC_CALLID_ANSWERED       1 /**< Type of this msg is 'answer' */
+#define IPC_CALLID_NOTIFICATION   2 /**< Type of this msg is 'notification' */
+/* Return values from IPC_ASYNC */
+#define IPC_CALLRET_FATAL         -1
+#define IPC_CALLRET_TEMPORARY     -2
+/* Macros for manipulating calling data */
+#define IPC_SET_RETVAL(data, retval)   ((data).args[0] = (retval))
+#define IPC_SET_METHOD(data, val)   ((data).args[0] = (val))
+#define IPC_SET_ARG1(data, val)   ((data).args[1] = (val))
+#define IPC_SET_ARG2(data, val)   ((data).args[2] = (val))
+#define IPC_SET_ARG3(data, val)   ((data).args[3] = (val))
+#define IPC_GET_METHOD(data)           ((data).args[0])
+#define IPC_GET_RETVAL(data)           ((data).args[0])
+#define IPC_GET_ARG1(data)              ((data).args[1])
+#define IPC_GET_ARG2(data)              ((data).args[2])
+#define IPC_GET_ARG3(data)              ((data).args[3])
+/* Well known phone descriptors */
+#define PHONE_NS              0
+/* System-specific methods - only through special syscalls
+ * These methods have special behaviour
+ */
+/** Protocol for CONNECT - TO - ME
+ *
+ * Calling process asks the callee to create a callback connection,
+ * so that it can start initiating new messages.
+ *
+ * The protocol for negotiating is:
+ * - sys_connect_to_me - sends a message IPC_M_CONNECTTOME
+ * - sys_wait_for_call - upon receipt tries to allocate new phone
+ *                       - if it fails, responds with ELIMIT
+ *                     - passes call to userspace. If userspace
+ *                       responds with error, phone is deallocated and
+ *                       error is sent back to caller. Otherwise
+ *                       the call is accepted and the response is sent back.
+ *                     - the allocated phoneid is passed to userspace
+ *                       (on the receiving sid) as ARG3 of the call.
+ *                     - the caller obtains taskid of the called thread
+ */
+#define IPC_M_CONNECT_TO_ME     1
+/** Protocol for CONNECT - ME - TO
+ *
+ * Calling process asks the callee to create for him a new connection.
+ * E.g. the caller wants a name server to connect him to print server.
+ *
+ * The protocol for negotiating is:
+ * - sys_connect_me_to - send a synchronous message to name server
+ *                       indicating that it wants to be connected to some
+ *                       service
+ *                     - arg1/2 are user specified, arg3 contains
+ *                       address of the phone that should be connected
+ *                       (TODO: it leaks to userspace)
+ *   recipient         -  if ipc_answer == 0, then accept connection
+ *                     -  otherwise connection refused
+ *                     -  recepient may forward message. Forwarding
+ *                        system message
+ *
+ */
+#define IPC_M_CONNECT_ME_TO     2
+/** This message is sent to answerbox when the phone
+ * is hung up
+ */
+#define IPC_M_PHONE_HUNGUP      3
+/** Send as_area over IPC
+ * - ARG1 - src base address
+ * - ARG2 - size of src as(filled automatically by kernel)
+ * - ARG3 - flags of the area being sent
+ * - on answer ARG1 - dst base adress
+ */
+#define IPC_M_AS_AREA_SEND      5
+/** Get as_area over IPC
+ * - ARG1 - Where the area will be mapped
+ * - ARG2 - Expected size of area
+ * - ARG3 - User defined argument
+ * on answer - the server sets ARG1 as src as address of the as_area
+ * to be shared, ARG2 is set to rights that will be used for sharing,
+ * which is returned as part of answer back to the receiver
+ */
+#define IPC_M_AS_AREA_RECV      6
+/* Well-known methods */
+#define IPC_M_LAST_SYSTEM     511
+#define IPC_M_PING            512
+/* User methods */
+#define FIRST_USER_METHOD     1024
+#ifdef KERNEL
+#include <synch/mutex.h>
+#include <synch/condvar.h>
+#include <adt/list.h>
+#define IPC_MAX_PHONES  16
+typedef struct answerbox_s answerbox_t;
+typedef struct phone_s phone_t;
+typedef struct {
+    __native args[IPC_CALL_LEN];
+    phone_t *phone;
+}ipc_data_t;
+struct answerbox_s {
+    SPINLOCK_DECLARE(lock);
+    task_t *task;
+    waitq_t wq;
+    link_t connected_phones; /**< Phones connected to this answerbox */
+    link_t calls;            /**< Received calls */
+    link_t dispatched_calls; /* Should be hash table in the future */
+    link_t answers;          /**< Answered calls */
+    SPINLOCK_DECLARE(irq_lock);
+    link_t irq_notifs;       /**< Notifications from IRQ handlers */
+};
+typedef enum {
+    IPC_PHONE_FREE = 0,     /**< Phone is free and can be allocated */
+    IPC_PHONE_CONNECTING,   /**< Phone is connecting somewhere */
+    IPC_PHONE_CONNECTED,    /**< Phone is connected */
+    IPC_PHONE_HUNGUP,  /**< Phone is hung up, waiting for answers to come */
+    IPC_PHONE_SLAMMED       /**< Phone was hungup from server */
+} ipc_phone_state_t;
+/** Structure identifying phone (in TASK structure) */
+struct phone_s {
+    SPINLOCK_DECLARE(lock);
+    link_t link;
+    answerbox_t *callee;
+    ipc_phone_state_t state;
+    atomic_t active_calls;
+};
+typedef struct {
+    link_t link;
+    int flags;
+    /* Identification of the caller */
+    task_t *sender;
+    /* The caller box is different from sender->answerbox
+     * for synchronous calls
+     */
+    answerbox_t *callerbox;
+    __native private; /**< Private data to internal IPC */
+    ipc_data_t data;  /**< Data passed from/to userspace */
+}call_t;
+extern void ipc_init(void);
+extern call_t * ipc_wait_for_call(answerbox_t *box, __u32 usec, int flags);
+extern void ipc_answer(answerbox_t *box, call_t *request);
+extern int ipc_call(phone_t *phone, call_t *call);
+extern void ipc_call_sync(phone_t *phone, call_t *request);
+extern void ipc_phone_init(phone_t *phone);
+extern void ipc_phone_connect(phone_t *phone, answerbox_t *box);
+extern void ipc_call_free(call_t *call);
+extern call_t * ipc_call_alloc(int flags);
+extern void ipc_answerbox_init(answerbox_t *box);
+extern void ipc_call_static_init(call_t *call);
+extern void task_print_list(void);
+extern int ipc_forward(call_t *call, phone_t *newphone, answerbox_t *oldbox);
+void ipc_cleanup(void);
+int ipc_phone_hangup(phone_t *phone);
+extern void ipc_backsend_err(phone_t *phone, call_t *call, __native err);
+extern void ipc_print_task(task_id_t taskid);
+extern answerbox_t *ipc_phone_0;
+#endif
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/generic/include/ipc/ipcrsc.h
 ,0 → 1,47
+/*
+ * Copyright (C) 2006 Ondrej Palkovsky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup genericipc
+ * @{
+ */
+/** @file
+ */
+#ifndef __IPCRSC_H__
+#define __IPCRSC_H__
+call_t * get_call(__native callid);
+int phone_alloc(void);
+void phone_connect(int phoneid, answerbox_t *box);
+void phone_dealloc(int phoneid);
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/generic/include/align.h
 ,0 → 1,59
+/*
+ * Copyright (C) 2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup generic
+ * @ingroup others
+ * @{
+ */
+/** @file
+ */
+#ifndef __ALIGN_H__
+#define __ALIGN_H__
+/** Align to the nearest lower address.
+ *
+ * @param s Address or size to be aligned.
+ * @param a Size of alignment, must be power of 2.
+ */
+#define ALIGN_DOWN(s, a)    ((s) & ~((a) - 1))
+/** Align to the nearest higher address.
+ *
+ * @param s Address or size to be aligned.
+ * @param a Size of alignment, must be power of 2.
+ */
+#define ALIGN_UP(s, a)      (((s) + ((a) - 1)) & ~((a) - 1))
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/generic/include/func.h
 ,0 → 1,55
+/*
+ * Copyright (C) 2001-2004 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup generic
+ * @{
+ */
+/** @file
+ */
+#ifndef __FUNC_H__
+#define __FUNC_H__
+#include <arch/types.h>
+#include <typedefs.h>
+#include <atomic.h>
+extern atomic_t haltstate;
+extern void halt(void);
+extern size_t strlen(const char *str);
+extern int strncmp(const char *src, const char *dst, size_t len);
+extern void strncpy(char *dest, const char *src, size_t len);
+extern __native atoi(const char *text);
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/generic/include/print.h
 ,0 → 1,59
+/*
+ * Copyright (C) 2001-2004 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup generic
+ * @{
+ */
+/** @file
+ */
+#ifndef __PRINT_H__
+#define __PRINT_H__
+#include <arch/types.h>
+#include <synch/spinlock.h>
+#include <arch/arg.h>
+/* We need this address in spinlock to avoid deadlock in deadlock detection */
+extern spinlock_t printflock;
+#define EOF (-1)
+extern int printf(const char *fmt, ...);
+extern int sprintf(char *str, const char *fmt, ...);
+extern int snprintf(char *str, size_t size, const char *fmt, ...);
+extern int vprintf(const char *fmt, va_list ap);
+extern int vsprintf(char *str, const char *fmt, va_list ap);
+extern int vsnprintf(char *str, size_t size, const char *fmt, va_list ap);
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/generic/include/fpu_context.h
 ,0 → 1,58
+/*
+ * Copyright (C) 2005 Jakub Vana
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup generic
+ * @{
+ */
+/** @file
+ */
+#ifndef __FPU_CONTEXT_H__
+#define __FPU_CONTEXT_H__
+#include <arch/fpu_context.h>
+#include <typedefs.h>
+#if defined(CONFIG_FPU_LAZY) && !defined(ARCH_HAS_FPU)
+# error "CONFIG_FPU_LAZY defined, but no ARCH_HAS_FPU"
+#endif
+extern void fpu_context_save(fpu_context_t *);
+extern void fpu_context_restore(fpu_context_t *);
+extern void fpu_init(void);
+extern void fpu_enable(void);
+extern void fpu_disable(void);
+#endif /* __FPU_CONTEXT_H__ */
+ /** @}
+ */

 /tags/0.2.0.2/kernel/generic/include/stackarg.h
 ,0 → 1,66
+/*
+ * Copyright (C) 2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup generic
+ * @{
+ */
+/** @file
+ */
+/*
+ * Variable argument list manipulation macros
+ * for architectures using stack to pass arguments.
+ */
+#ifndef __STACKARG_H__
+#define __STACKARG_H__
+#include <arch/types.h>
+typedef struct va_list {
+    int pos;
+    __u8 *last;
+} va_list;
+#define va_start(ap, lst)       \
+    (ap).pos = sizeof(lst);             \
+    (ap).last = (__u8 *) &(lst)
+#define va_arg(ap, type)        \
+    (*((type *)((ap).last + ((ap).pos  += sizeof(type) ) - sizeof(type))))
+#define va_copy(dst,src)       dst=src
+#define va_end(ap)
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/generic/include/byteorder.h
 ,0 → 1,62
+/*
+ * Copyright (C) 2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup generic
+ * @{
+ */
+/** @file
+ */
+#ifndef __BYTEORDER_H__
+#define __BYTEORDER_H__
+static inline __u64 __u64_byteorder_swap(__u64 n)
+{
+    return ((n & 0xff) << 56) |
+        ((n & 0xff00) << 40) |
+        ((n & 0xff0000) << 24) |
+        ((n & 0xff000000LL) << 8) |
+        ((n & 0xff00000000LL) >>8) |
+        ((n & 0xff0000000000LL) >> 24) |
+        ((n & 0xff000000000000LL) >> 40) |
+        ((n & 0xff00000000000000LL) >> 56);
+}
+static inline __u32 __u32_byteorder_swap(__u32 n)
+{
+    return ((n & 0xff) << 24) |
+        ((n & 0xff00) << 8) |
+        ((n & 0xff0000) >> 8) |
+        ((n & 0xff000000) >> 24);
+}
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/generic/include/symtab.h
 ,0 → 1,59
+/*
+ * Copyright (C) 2005 Ondrej Palkovsky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup generic
+ * @{
+ */
+/** @file
+ */
+#ifndef __SYMTAB_H__
+#define __SYMTAB_H__
+#include <arch/types.h>
+#define MAX_SYMBOL_NAME 64
+struct symtab_entry {
+    __u64 address_le;
+    char symbol_name[MAX_SYMBOL_NAME];
+};
+extern char * get_symtab_entry(__native addr);
+extern __address get_symbol_addr(const char *name);
+extern void symtab_print_search(const char *name);
+extern int symtab_compl(char *name);
+/* Symtable linked together by build process */
+extern struct symtab_entry symbol_table[];
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/generic/include/sysinfo/sysinfo.h
 ,0 → 1,95
+/*
+ * Copyright (C) 2006 Jakub Vana
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup generic
+ * @{
+ */
+/** @file
+ */
+#include <arch/types.h>
+typedef union sysinfo_item_val
+{
+    __native val;
+    void *fn;
+}sysinfo_item_val_t;
+typedef struct sysinfo_item
+{
+    char *name;
+    union
+    {
+        __native val;
+        void *fn;
+    }val;
+    union
+    {
+        struct sysinfo_item *table;
+        void *fn;
+    }subinfo;
+    struct sysinfo_item *next;
+    int val_type;
+    int subinfo_type;
+}sysinfo_item_t;
+#define SYSINFO_VAL_VAL 0
+#define SYSINFO_VAL_FUNCTION 1
+#define SYSINFO_VAL_UNDEFINED '?'
+#define SYSINFO_SUBINFO_NONE 0
+#define SYSINFO_SUBINFO_TABLE 1
+#define SYSINFO_SUBINFO_FUNCTION 2
+typedef __native (*sysinfo_val_fn_t)(sysinfo_item_t *root);
+typedef __native (*sysinfo_subinfo_fn_t)(const char *subname);
+typedef struct sysinfo_rettype
+{
+    __native val;
+    __native valid;
+}sysinfo_rettype_t;
+void sysinfo_set_item_val(const char *name,sysinfo_item_t **root,__native val);
+void sysinfo_dump(sysinfo_item_t **root,int depth);
+void sysinfo_set_item_function(const char *name,sysinfo_item_t **root,sysinfo_val_fn_t fn);
+void sysinfo_set_item_undefined(const char *name,sysinfo_item_t **root);
+sysinfo_rettype_t sysinfo_get_val(const char *name,sysinfo_item_t **root);
+__native sys_sysinfo_valid(__native ptr,__native len);
+__native sys_sysinfo_value(__native ptr,__native len);
+ /** @}
+ */

 /tags/0.2.0.2/kernel/generic/include/config.h
 ,0 → 1,76
+/*
+ * Copyright (C) 2001-2004 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup generic
+ * @{
+ */
+/** @file
+ */
+#ifndef __CONFIG_H__
+#define __CONFIG_H__
+#include <arch/types.h>
+#include <typedefs.h>
+#include <arch/mm/page.h>
+#define STACK_SIZE      PAGE_SIZE
+#define CONFIG_MEMORY_SIZE  (8 * 1024 * 1024)
+#define CONFIG_INIT_TASKS   32
+typedef struct {
+    __address addr;
+    size_t size;
+} init_task_t;
+typedef struct {
+    count_t cnt;
+    init_task_t tasks[CONFIG_INIT_TASKS];
+} init_t;
+typedef struct {
+    count_t cpu_count;
+    volatile count_t cpu_active;
+    __address base;
+    size_t memory_size;
+    size_t kernel_size;           /**< Size of memory in bytes taken by kernel and stack */
+    bool mm_initialized;
+} config_t;
+extern config_t config;
+extern init_t init;
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/generic/include/elf.h
 ,0 → 1,345
+/*
+ * Copyright (C) 2006 Sergey Bondari
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup generic
+ * @{
+ */
+/** @file
+ */
+#ifndef __ELF_H__
+#define __ELF_H__
+#include <arch/elf.h>
+#include <arch/types.h>
+#include <typedefs.h>
+/**
+ * current ELF version
+ */
+#define EV_CURRENT  1
+/**
+ * ELF types
+ */
+#define ET_NONE     0    /* No type */
+#define ET_REL      1   /* Relocatable file */
+#define ET_EXEC     2   /* Executable */
+#define ET_DYN      3   /* Shared object */
+#define ET_CORE     4   /* Core */
+#define ET_LOPROC   0xff00  /* Processor specific */
+#define ET_HIPROC   0xffff  /* Processor specific */
+/**
+ * ELF machine types
+ */
+#define EM_NO       0    /* No machine */
+#define EM_SPARC    2   /* SPARC */
+#define EM_386      3   /* i386 */
+#define EM_MIPS     8   /* MIPS RS3000 */
+#define EM_MIPS_RS3_LE  10  /* MIPS RS3000 LE */
+#define EM_PPC      20  /* PPC32 */
+#define EM_PPC64    21  /* PPC64 */
+#define EM_SPARCV9  43  /* SPARC64 */
+#define EM_IA_64    50  /* IA-64 */
+#define EM_X86_64   62  /* AMD64/EMT64 */
+/**
+ * ELF identification indexes
+ */
+#define EI_MAG0     0
+#define EI_MAG1     1
+#define EI_MAG2     2
+#define EI_MAG3     3
+#define EI_CLASS    4       /* File class */
+#define EI_DATA     5       /* Data encoding */
+#define EI_VERSION  6       /* File version */
+#define EI_OSABI    7
+#define EI_ABIVERSION   8
+#define EI_PAD      9       /* Start of padding bytes */
+#define EI_NIDENT   16      /* ELF identification table size */
+/**
+ * ELF magic number
+ */
+#define ELFMAG0     0x7f
+#define ELFMAG1     'E'
+#define ELFMAG2     'L'
+#define ELFMAG3     'F'
+/**
+ * ELF file classes
+ */
+#define ELFCLASSNONE    0
+#define ELFCLASS32  1
+#define ELFCLASS64  2
+/**
+ * ELF data encoding types
+ */
+#define ELFDATANONE 0
+#define ELFDATA2LSB 1       /* Least significant byte first (little endian) */
+#define ELFDATA2MSB 2       /* Most signigicant byte first (big endian) */
+/**
+ * ELF error return codes
+ */
+#define EE_OK           0    /* No error */
+#define EE_INVALID      1   /* Invalid ELF image */
+#define EE_MEMORY       2   /* Cannot allocate address space */
+#define EE_INCOMPATIBLE     3   /* ELF image is not compatible with current architecture */
+#define EE_UNSUPPORTED      4   /* Non-supported ELF (e.g. dynamic ELFs) */
+#define EE_IRRECOVERABLE    5
+/**
+ * ELF section types
+ */
+#define SHT_NULL        0
+#define SHT_PROGBITS        1
+#define SHT_SYMTAB      2
+#define SHT_STRTAB      3
+#define SHT_RELA        4
+#define SHT_HASH        5
+#define SHT_DYNAMIC     6
+#define SHT_NOTE        7
+#define SHT_NOBITS      8
+#define SHT_REL         9
+#define SHT_SHLIB       10
+#define SHT_DYNSYM      11
+#define SHT_LOOS        0x60000000
+#define SHT_HIOS        0x6fffffff
+#define SHT_LOPROC      0x70000000
+#define SHT_HIPROC      0x7fffffff
+#define SHT_LOUSER      0x80000000
+#define SHT_HIUSER      0xffffffff
+/**
+ * ELF section flags
+ */
+#define SHF_WRITE       0x1
+#define SHF_ALLOC       0x2
+#define SHF_EXECINSTR       0x4
+#define SHF_MASKPROC        0xf0000000
+/**
+ * Symbol binding
+ */
+#define STB_LOCAL       0
+#define STB_GLOBAL      1
+#define STB_WEAK        2
+#define STB_LOPROC      13
+#define STB_HIPROC      15
+/**
+ * Symbol types
+ */
+#define STT_NOTYPE      0
+#define STT_OBJECT      1
+#define STT_FUNC        2
+#define STT_SECTION     3
+#define STT_FILE        4
+#define STT_LOPROC      13
+#define STT_HIPROC      15
+/**
+ * Program segment types
+ */
+#define PT_NULL         0
+#define PT_LOAD         1
+#define PT_DYNAMIC      2
+#define PT_INTERP       3
+#define PT_NOTE         4
+#define PT_SHLIB        5
+#define PT_PHDR         6
+#define PT_LOPROC       0x70000000
+#define PT_HIPROC       0x7fffffff
+/**
+ * Program segment attributes.
+ */
+#define PF_X    1
+#define PF_W    2
+#define PF_R    4
+/**
+ * ELF data types
+ *
+ * These types are found to be identical in both 32-bit and 64-bit
+ * ELF object file specifications. They are the only types used
+ * in ELF header.
+ */
+typedef __u64 elf_xword;
+typedef __s64 elf_sxword;
+typedef __u32 elf_word;
+typedef __s32 elf_sword;
+typedef __u16 elf_half;
+/**
+ * 32-bit ELF data types.
+ *
+ * These types are specific for 32-bit format.
+ */
+typedef __u32 elf32_addr;
+typedef __u32 elf32_off;
+/**
+ * 64-bit ELF data types.
+ *
+ * These types are specific for 64-bit format.
+ */
+typedef __u64 elf64_addr;
+typedef __u64 elf64_off;
+/** ELF header */
+struct elf32_header {
+    __u8 e_ident[EI_NIDENT];
+    elf_half e_type;
+    elf_half e_machine;
+    elf_word e_version;
+    elf32_addr e_entry;
+    elf32_off e_phoff;
+    elf32_off e_shoff;
+    elf_word e_flags;
+    elf_half e_ehsize;
+    elf_half e_phentsize;
+    elf_half e_phnum;
+    elf_half e_shentsize;
+    elf_half e_shnum;
+    elf_half e_shstrndx;
+};
+struct elf64_header {
+    __u8 e_ident[EI_NIDENT];
+    elf_half e_type;
+    elf_half e_machine;
+    elf_word e_version;
+    elf64_addr e_entry;
+    elf64_off e_phoff;
+    elf64_off e_shoff;
+    elf_word e_flags;
+    elf_half e_ehsize;
+    elf_half e_phentsize;
+    elf_half e_phnum;
+    elf_half e_shentsize;
+    elf_half e_shnum;
+    elf_half e_shstrndx;
+};
+/*
+ * ELF segment header.
+ * Segments headers are also known as program headers.
+ */
+struct elf32_segment_header {
+    elf_word p_type;
+    elf32_off p_offset;
+    elf32_addr p_vaddr;
+    elf32_addr p_paddr;
+    elf_word p_filesz;
+    elf_word p_memsz;
+    elf_word p_flags;
+    elf_word p_align;
+};
+struct elf64_segment_header {
+    elf_word p_type;
+    elf_word p_flags;
+    elf64_off p_offset;
+    elf64_addr p_vaddr;
+    elf64_addr p_paddr;
+    elf_xword p_filesz;
+    elf_xword p_memsz;
+    elf_xword p_align;
+};
+/*
+ * ELF section header
+ */
+struct elf32_section_header {
+    elf_word sh_name;
+    elf_word sh_type;
+    elf_word sh_flags;
+    elf32_addr sh_addr;
+    elf32_off sh_offset;
+    elf_word sh_size;
+    elf_word sh_link;
+    elf_word sh_info;
+    elf_word sh_addralign;
+    elf_word sh_entsize;
+};
+struct elf64_section_header {
+    elf_word sh_name;
+    elf_word sh_type;
+    elf_xword sh_flags;
+    elf64_addr sh_addr;
+    elf64_off sh_offset;
+    elf_xword sh_size;
+    elf_word sh_link;
+    elf_word sh_info;
+    elf_xword sh_addralign;
+    elf_xword sh_entsize;
+};
+/*
+ * ELF symbol table entry
+ */
+struct elf32_symbol {
+    elf_word st_name;
+    elf32_addr st_value;
+    elf_word st_size;
+    __u8 st_info;
+    __u8 st_other;
+    elf_half st_shndx;
+};
+struct elf64_symbol {
+    elf_word st_name;
+    __u8 st_info;
+    __u8 st_other;
+    elf_half st_shndx;
+    elf64_addr st_value;
+    elf_xword st_size;
+};
+#ifdef __32_BITS__
+typedef struct elf32_header elf_header_t;
+typedef struct elf32_segment_header elf_segment_header_t;
+typedef struct elf32_section_header elf_section_header_t;
+typedef struct elf32_symbol elf_symbol_t;
+#endif
+#ifdef __64_BITS__
+typedef struct elf64_header elf_header_t;
+typedef struct elf64_segment_header elf_segment_header_t;
+typedef struct elf64_section_header elf_section_header_t;
+typedef struct elf64_symbol elf_symbol_t;
+#endif
+extern int elf_load(elf_header_t *header, as_t * as);
+extern char *elf_error(int rc);
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/generic/include/proc/scheduler.h
 ,0 → 1,74
+/*
+ * Copyright (C) 2001-2004 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup genericproc
+ * @{
+ */
+/** @file
+ */
+#ifndef __SCHEDULER_H__
+#define __SCHEDULER_H__
+#include <synch/spinlock.h>
+#include <time/clock.h>     /* HZ */
+#include <typedefs.h>
+#include <atomic.h>
+#include <adt/list.h>
+#define RQ_COUNT        16
+#define NEEDS_RELINK_MAX    (HZ)
+/** Scheduler run queue structure. */
+struct runq {
+    SPINLOCK_DECLARE(lock);
+    link_t rq_head;     /**< List of ready threads. */
+    count_t n;      /**< Number of threads in rq_ready. */
+};
+extern atomic_t nrdy;
+extern void scheduler_init(void);
+extern void scheduler_fpu_lazy_request(void);
+extern void scheduler(void);
+extern void kcpulb(void *arg);
+extern void sched_print_list(void);
+/*
+ * To be defined by architectures:
+ */
+extern void before_task_runs_arch(void);
+extern void before_thread_runs_arch(void);
+extern void after_thread_ran_arch(void);
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/generic/include/proc/uarg.h
 ,0 → 1,53
+/*
+ * Copyright (C) 2006 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup genericproc
+ * @{
+ */
+/** @file
+ */
+#ifndef __UARG_H__
+#define __UARG_H__
+/** Structure passed to uinit kernel thread as argument. */
+typedef struct uspace_arg {
+    void *uspace_entry;
+    void *uspace_stack;
+    void (* uspace_thread_function)();
+    void *uspace_thread_arg;
+    struct uspace_arg *uspace_uarg;
+} uspace_arg_t;
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/generic/include/proc/task.h
 ,0 → 1,111
+/*
+ * Copyright (C) 2001-2004 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup genericproc
+ * @{
+ */
+/** @file
+ */
+#ifndef __TASK_H__
+#define __TASK_H__
+#include <typedefs.h>
+#include <synch/spinlock.h>
+#include <synch/mutex.h>
+#include <synch/futex.h>
+#include <adt/btree.h>
+#include <adt/list.h>
+#include <ipc/ipc.h>
+#include <security/cap.h>
+#include <arch/proc/task.h>
+/** Task structure. */
+struct task {
+    /** Task lock.
+     *
+     * Must be acquired before threads_lock and thread lock of any of its threads.
+     */
+    SPINLOCK_DECLARE(lock);
+    char *name;
+    thread_t *main_thread;  /**< Pointer to the main thread. */
+    link_t th_head;     /**< List of threads contained in this task. */
+    as_t *as;       /**< Address space. */
+    task_id_t taskid;   /**< Unique identity of task */
+    /** If this is true, new threads can become part of the task. */
+    bool accept_new_threads;
+    count_t refcount;   /**< Number of references (i.e. threads). */
+    cap_t capabilities; /**< Task capabilities. */
+    /* IPC stuff */
+    answerbox_t answerbox;  /**< Communication endpoint */
+    phone_t phones[IPC_MAX_PHONES];
+    atomic_t active_calls;  /**< Active asynchronous messages.
+                 *   It is used for limiting uspace to
+                 *   certain extent. */
+    task_arch_t arch;   /**< Architecture specific task data. */
+    /**
+     * Serializes access to the B+tree of task's futexes. This mutex is
+     * independent on the task spinlock.
+     */
+    mutex_t futexes_lock;
+    btree_t futexes;    /**< B+tree of futexes referenced by this task. */
+};
+extern spinlock_t tasks_lock;
+extern btree_t tasks_btree;
+extern void task_init(void);
+extern task_t *task_create(as_t *as, char *name);
+extern void task_destroy(task_t *t);
+extern task_t *task_run_program(void *program_addr, char *name);
+extern task_t *task_find_by_id(task_id_t id);
+extern int task_kill(task_id_t id);
+#ifndef task_create_arch
+extern void task_create_arch(task_t *t);
+#endif
+#ifndef task_destroy_arch
+extern void task_destroy_arch(task_t *t);
+#endif
+extern __native sys_task_get_id(task_id_t *uspace_task_id);
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/generic/include/proc/thread.h
 ,0 → 1,197
+/*
+ * Copyright (C) 2001-2004 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup genericproc
+ * @{
+ */
+/** @file
+ */
+#ifndef __THREAD_H__
+#define __THREAD_H__
+#include <arch/proc/thread.h>
+#include <synch/spinlock.h>
+#include <arch/context.h>
+#include <fpu_context.h>
+#include <arch/types.h>
+#include <typedefs.h>
+#include <time/timeout.h>
+#include <synch/rwlock.h>
+#include <synch/synch.h>
+#include <config.h>
+#include <adt/btree.h>
+#include <adt/list.h>
+#include <mm/slab.h>
+#include <proc/uarg.h>
+#define THREAD_STACK_SIZE   STACK_SIZE
+/**< Thread states. */
+enum state {
+    Invalid,    /**< It is an error, if thread is found in this state. */
+    Running,    /**< State of a thread that is currently executing on some CPU. */
+    Sleeping,   /**< Thread in this state is waiting for an event. */
+    Ready,      /**< State of threads in a run queue. */
+    Entering,   /**< Threads are in this state before they are first readied. */
+    Exiting,    /**< After a thread calls thread_exit(), it is put into Exiting state. */
+    Undead      /**< Threads that were not detached but exited are in the Undead state. */
+};
+extern char *thread_states[];
+/**< Join types. */
+typedef enum {
+    None,
+    TaskClnp,   /**< The thread will be joined by ktaskclnp thread. */
+    TaskGC      /**< The thread will be joined by ktaskgc thread. */
+} thread_join_type_t;
+#define X_WIRED     (1<<0)
+#define X_STOLEN    (1<<1)
+#define THREAD_NAME_BUFLEN  20
+/** Thread structure. There is one per thread. */
+struct thread {
+    link_t rq_link;             /**< Run queue link. */
+    link_t wq_link;             /**< Wait queue link. */
+    link_t th_link;             /**< Links to threads within containing task. */
+    /** Lock protecting thread structure.
+     *
+     * Protects the whole thread structure except list links above.
+     */
+    SPINLOCK_DECLARE(lock);
+    char name[THREAD_NAME_BUFLEN];
+    void (* thread_code)(void *);       /**< Function implementing the thread. */
+    void *thread_arg;           /**< Argument passed to thread_code() function. */
+    /** From here, the stored context is restored when the thread is scheduled. */
+    context_t saved_context;
+    /** From here, the stored timeout context is restored when sleep times out. */
+    context_t sleep_timeout_context;
+    /** From here, the stored interruption context is restored when sleep is interrupted. */
+    context_t sleep_interruption_context;
+    bool sleep_interruptible;       /**< If true, the thread can be interrupted from sleep. */
+    waitq_t *sleep_queue;           /**< Wait queue in which this thread sleeps. */
+    timeout_t sleep_timeout;        /**< Timeout used for timeoutable sleeping.  */
+    volatile int timeout_pending;       /**< Flag signalling sleep timeout in progress. */
+    /** True if this thread is executing copy_from_uspace(). False otherwise. */
+    bool in_copy_from_uspace;
+    /** True if this thread is executing copy_to_uspace(). False otherwise. */
+    bool in_copy_to_uspace;
+    /**
+     * If true, the thread will not go to sleep at all and will
+     * call thread_exit() before returning to userspace.
+     */
+    bool interrupted;
+    thread_join_type_t  join_type;  /**< Who joinins the thread. */
+    bool detached;              /**< If true, thread_join_timeout() cannot be used on this thread. */
+    waitq_t join_wq;            /**< Waitq for thread_join_timeout(). */
+    fpu_context_t *saved_fpu_context;
+    int fpu_context_exists;
+    /*
+     * Defined only if thread doesn't run.
+     * It means that fpu context is in CPU that last time executes this thread.
+     * This disables migration
+     */
+    int fpu_context_engaged;
+    rwlock_type_t rwlock_holder_type;
+    void (* call_me)(void *);       /**< Funtion to be called in scheduler before the thread is put asleep. */
+    void *call_me_with;         /**< Argument passed to call_me(). */
+    state_t state;              /**< Thread's state. */
+    int flags;              /**< Thread's flags. */
+    cpu_t *cpu;             /**< Thread's CPU. */
+    task_t *task;               /**< Containing task. */
+    __u64 ticks;                /**< Ticks before preemption. */
+    int priority;               /**< Thread's priority. Implemented as index to CPU->rq */
+    __u32 tid;              /**< Thread ID. */
+    thread_arch_t arch;         /**< Architecture-specific data. */
+    __u8 *kstack;               /**< Thread's kernel stack. */
+};
+/** Thread list lock.
+ *
+ * This lock protects all link_t structures chained in threads_head.
+ * Must be acquired before T.lock for each T of type thread_t.
+ *
+ */
+extern spinlock_t threads_lock;
+extern btree_t threads_btree;           /**< B+tree containing all threads. */
+extern void thread_init(void);
+extern thread_t *thread_create(void (* func)(void *), void *arg, task_t *task, int flags, char *name);
+extern void thread_ready(thread_t *t);
+extern void thread_exit(void) __attribute__((noreturn));
+#ifndef thread_create_arch
+extern void thread_create_arch(thread_t *t);
+#endif
+extern void thread_sleep(__u32 sec);
+extern void thread_usleep(__u32 usec);
+#define thread_join(t)  thread_join_timeout((t), SYNCH_NO_TIMEOUT, SYNCH_FLAGS_NONE)
+extern int thread_join_timeout(thread_t *t, __u32 usec, int flags);
+extern void thread_detach(thread_t *t);
+extern void thread_register_call_me(void (* call_me)(void *), void *call_me_with);
+extern void thread_print_list(void);
+extern void thread_destroy(thread_t *t);
+extern bool thread_exists(thread_t *t);
+/* Fpu context slab cache */
+extern slab_cache_t *fpu_context_slab;
+/** Thread syscall prototypes. */
+__native sys_thread_create(uspace_arg_t *uspace_uarg, char *uspace_name);
+__native sys_thread_exit(int uspace_status);
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/generic/include/debug.h
 ,0 → 1,70
+/*
+ * Copyright (C) 2005 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup genericdebug
+ * @{
+ */
+/** @file
+ */
+#ifndef __DEBUG_H__
+#define __DEBUG_H__
+#include <panic.h>
+#include <arch/debug.h>
+#define CALLER       ((__address)__builtin_return_address(0))
+#ifndef HERE
+/** Current Instruction Pointer address */
+#  define HERE ((__address *)0)
+#endif
+/** Debugging ASSERT macro
+ *
+ * If CONFIG_DEBUG is set, the ASSERT() macro
+ * evaluates expr and if it is false raises
+ * kernel panic.
+ *
+ * @param expr Expression which is expected to be true.
+ *
+ */
+#ifdef CONFIG_DEBUG
+#   define ASSERT(expr) if (!(expr)) { panic("assertion failed (%s), caller=%.*p\n", #expr, sizeof(__address) * 2, CALLER); }
+#else
+#   define ASSERT(expr)
+#endif
+#define STRING(arg) STRING_ARG(arg)
+#define STRING_ARG(arg) #arg
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/generic/include/panic.h
 ,0 → 1,50
+/*
+ * Copyright (C) 2001-2004 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup generic
+ * @{
+ */
+/** @file
+ */
+#ifndef __PANIC_H__
+#define __PANIC_H__
+#ifdef CONFIG_DEBUG
+#   define panic(format, ...) panic_printf("Kernel panic in %s() at %s on line %d: " format, __FUNCTION__, __FILE__, __LINE__, ##__VA_ARGS__);
+#else
+#   define panic(format, ...) panic_printf("Kernel panic: " format, ##__VA_ARGS__);
+#endif
+extern void panic_printf(char *fmt, ...) __attribute__((noreturn)) ;
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/generic/include/userspace.h
 ,0 → 1,48
+/*
+ * Copyright (C) 2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup generic
+ * @{
+ */
+/** @file
+ */
+#ifndef __USERSPACE_H__
+#define __USERSPACE_H__
+#include <proc/thread.h>
+#include <arch/types.h>
+/** Switch to user-space (CPU user priviledge level) */
+extern void userspace(uspace_arg_t *uarg) __attribute__ ((noreturn));
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/generic/include/main/kinit.h
 ,0 → 1,44
+/*
+ * Copyright (C) 2001-2004 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup main
+ * @{
+ */
+/** @file
+ */
+#ifndef __KINIT_H__
+#define __KINIT_H__
+extern void kinit(void *arg);
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/generic/include/main/version.h
 ,0 → 1,44
+/*
+ * Copyright (C) 2006 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup main
+ * @{
+ */
+/** @file
+ */
+#ifndef __VERSION_H__
+#define __VERSION_H__
+extern void version_print(void);
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/generic/include/main/uinit.h
 ,0 → 1,46
+/*
+ * Copyright (C) 2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup main
+ * @{
+ */
+/** @file
+ */
+#ifndef __UINIT_H__
+#define __UINIT_H__
+#include <arch/types.h>
+extern void uinit(void *arg);
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/generic/include/synch/futex.h
 ,0 → 1,62
+/*
+ * Copyright (C) 2006 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup sync
+ * @{
+ */
+/** @file
+ */
+#ifndef __FUTEX_H__
+#define __FUTEX_H__
+#include <arch/types.h>
+#include <typedefs.h>
+#include <synch/waitq.h>
+#include <genarch/mm/page_ht.h>
+#include <genarch/mm/page_pt.h>
+/** Kernel-side futex structure. */
+struct futex {
+    __address paddr;    /**< Physical address of the status variable. */
+    waitq_t wq;     /**< Wait queue for threads waiting for futex availability. */
+    link_t ht_link;     /**< Futex hash table link. */
+    count_t refcount;   /**< Number of tasks that reference this futex. */
+};
+extern void futex_init(void);
+extern __native sys_futex_sleep_timeout(__address uaddr, __u32 usec, int flags);
+extern __native sys_futex_wakeup(__address uaddr);
+extern void futex_cleanup(void);
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/generic/include/synch/condvar.h
 ,0 → 1,61
+/*
+ * Copyright (C) 2001-2004 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup sync
+ * @{
+ */
+/** @file
+ */
+#ifndef __CONDVAR_H__
+#define __CONDVAR_H__
+#include <arch/types.h>
+#include <synch/waitq.h>
+#include <typedefs.h>
+#include <synch/synch.h>
+struct condvar {
+    waitq_t wq;
+};
+#define condvar_wait(cv,mtx) \
+    _condvar_wait_timeout((cv),(mtx),SYNCH_NO_TIMEOUT,SYNCH_FLAGS_NONE)
+#define condvar_wait_timeout(cv,mtx,usec) \
+    _condvar_wait_timeout((cv),(mtx),(usec),SYNCH_FLAGS_NONE)
+extern void condvar_initialize(condvar_t *cv);
+extern void condvar_signal(condvar_t *cv);
+extern void condvar_broadcast(condvar_t *cv);
+extern int _condvar_wait_timeout(condvar_t *cv, mutex_t *mtx, __u32 usec, int flags);
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/generic/include/synch/rwlock.h
 ,0 → 1,80
+/*
+ * Copyright (C) 2001-2004 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup sync
+ * @{
+ */
+/** @file
+ */
+#ifndef __RWLOCK_H__
+#define __RWLOCK_H__
+#include <arch/types.h>
+#include <typedefs.h>
+#include <synch/mutex.h>
+#include <synch/synch.h>
+#include <synch/spinlock.h>
+enum rwlock_type {
+    RWLOCK_NONE,
+    RWLOCK_READER,
+    RWLOCK_WRITER
+};
+struct rwlock {
+    SPINLOCK_DECLARE(lock);
+    mutex_t exclusive;  /**< Mutex for writers, readers can bypass it if readers_in is positive. */
+    count_t readers_in; /**< Number of readers in critical section. */
+};
+#define rwlock_write_lock(rwl) \
+    _rwlock_write_lock_timeout((rwl),SYNCH_NO_TIMEOUT,SYNCH_FLAGS_NONE)
+#define rwlock_read_lock(rwl) \
+    _rwlock_read_lock_timeout((rwl),SYNCH_NO_TIMEOUT,SYNCH_FLAGS_NONE)
+#define rwlock_write_trylock(rwl) \
+    _rwlock_write_lock_timeout((rwl),SYNCH_NO_TIMEOUT,SYNCH_FLAGS_NON_BLOCKING)
+#define rwlock_read_trylock(rwl) \
+    _rwlock_read_lock_timeout((rwl),SYNCH_NO_TIMEOUT,SYNCH_FLAGS_NON_BLOCKING)
+#define rwlock_write_lock_timeout(rwl,usec) \
+    _rwlock_write_lock_timeout((rwl),(usec),SYNCH_FLAGS_NONE)
+#define rwlock_read_lock_timeout(rwl,usec) \
+    _rwlock_read_lock_timeout((rwl),(usec),SYNCH_FLAGS_NONE)
+extern void rwlock_initialize(rwlock_t *rwl);
+extern void rwlock_read_unlock(rwlock_t *rwl);
+extern void rwlock_write_unlock(rwlock_t *rwl);
+extern int _rwlock_read_lock_timeout(rwlock_t *rwl, __u32 usec, int flags);
+extern int _rwlock_write_lock_timeout(rwlock_t *rwl, __u32 usec, int flags);
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/generic/include/synch/mutex.h
 ,0 → 1,64
+/*
+ * Copyright (C) 2001-2004 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup sync
+ * @{
+ */
+/** @file
+ */
+#ifndef __MUTEX_H__
+#define __MUTEX_H__
+#include <arch/types.h>
+#include <typedefs.h>
+#include <synch/semaphore.h>
+#include <synch/synch.h>
+struct mutex {
+    semaphore_t sem;
+};
+#define mutex_lock(mtx) \
+    _mutex_lock_timeout((mtx),SYNCH_NO_TIMEOUT,SYNCH_FLAGS_NONE)
+#define mutex_trylock(mtx) \
+    _mutex_lock_timeout((mtx),SYNCH_NO_TIMEOUT,SYNCH_FLAGS_NON_BLOCKING)
+#define mutex_lock_timeout(mtx,usec) \
+    _mutex_lock_timeout((mtx),(usec),SYNCH_FLAGS_NON_BLOCKING)
+#define mutex_lock_active(mtx) \
+    while (mutex_trylock((mtx)) != ESYNCH_OK_ATOMIC)
+extern void mutex_initialize(mutex_t *mtx);
+extern int _mutex_lock_timeout(mutex_t *mtx, __u32 usec, int flags);
+extern void mutex_unlock(mutex_t *mtx);
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/generic/include/synch/spinlock.h
 ,0 → 1,121
+/*
+ * Copyright (C) 2001-2004 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup sync
+ * @{
+ */
+/** @file
+ */
+#ifndef __SPINLOCK_H__
+#define __SPINLOCK_H__
+#include <arch/types.h>
+#include <typedefs.h>
+#include <preemption.h>
+#include <atomic.h>
+#include <debug.h>
+#ifdef CONFIG_SMP
+struct spinlock {
+#ifdef CONFIG_DEBUG_SPINLOCK
+    char *name;
+#endif
+    atomic_t val;
+};
+/*
+ * SPINLOCK_DECLARE is to be used for dynamically allocated spinlocks,
+ * where the lock gets initialized in run time.
+ */
+#define SPINLOCK_DECLARE(slname)    spinlock_t slname
+/*
+ * SPINLOCK_INITIALIZE is to be used for statically allocated spinlocks.
+ * It declares and initializes the lock.
+ */
+#ifdef CONFIG_DEBUG_SPINLOCK
+#define SPINLOCK_INITIALIZE(slname)     \
+    spinlock_t slname = {       \
+        .name = #slname,    \
+        .val = { 0 }        \
+    }
+#else
+#define SPINLOCK_INITIALIZE(slname)     \
+    spinlock_t slname = {       \
+        .val = { 0 }        \
+    }
+#endif
+extern void spinlock_initialize(spinlock_t *sl, char *name);
+extern int spinlock_trylock(spinlock_t *sl);
+extern void spinlock_lock_debug(spinlock_t *sl);
+#ifdef CONFIG_DEBUG_SPINLOCK
+#  define spinlock_lock(x) spinlock_lock_debug(x)
+#else
+#  define spinlock_lock(x) atomic_lock_arch(&(x)->val)
+#endif
+/** Unlock spinlock
+ *
+ * Unlock spinlock.
+ *
+ * @param sl Pointer to spinlock_t structure.
+ */
+static inline void spinlock_unlock(spinlock_t *sl)
+{
+    ASSERT(atomic_get(&sl->val) != 0);
+    /*
+     * Prevent critical section code from bleeding out this way down.
+     */
+    CS_LEAVE_BARRIER();
+    atomic_set(&sl->val,0);
+    preemption_enable();
+}
+#else
+/* On UP systems, spinlocks are effectively left out. */
+#define SPINLOCK_DECLARE(name)
+#define SPINLOCK_INITIALIZE(name)
+#define spinlock_initialize(x,name)
+#define spinlock_lock(x)        preemption_disable()
+#define spinlock_trylock(x)         (preemption_disable(), 1)
+#define spinlock_unlock(x)      preemption_enable()
+#endif
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/generic/include/synch/semaphore.h
 ,0 → 1,64
+/*
+ * Copyright (C) 2001-2004 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup sync
+ * @{
+ */
+/** @file
+ */
+#ifndef __SEMAPHORE_H__
+#define __SEMAPHORE_H__
+#include <arch/types.h>
+#include <typedefs.h>
+#include <synch/waitq.h>
+#include <synch/synch.h>
+struct semaphore
+{
+    waitq_t wq;
+};
+#define semaphore_down(s) \
+    _semaphore_down_timeout((s),SYNCH_NO_TIMEOUT,SYNCH_FLAGS_NONE)
+#define semaphore_trydown(s) \
+    _semaphore_down_timeout((s),SYNCH_NO_TIMEOUT,SYNCH_FLAGS_NON_BLOCKING)
+#define semaphore_down_timeout(s,usec) \
+    _semaphore_down_timeout((s),(usec),SYNCH_FLAGS_NONE)
+extern void semaphore_initialize(semaphore_t *s, int val);
+extern int _semaphore_down_timeout(semaphore_t *s, __u32 usec, int flags);
+extern void semaphore_up(semaphore_t *s);
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/generic/include/synch/synch.h
 ,0 → 1,57
+/*
+ * Copyright (C) 2001-2004 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup sync
+ * @{
+ */
+/** @file
+ */
+#ifndef __SYNCH_H__
+#define __SYNCH_H__
+#define SYNCH_NO_TIMEOUT    0    /**< Request with no timeout. */
+#define SYNCH_FLAGS_NONE        0    /**< No flags specified. */
+#define SYNCH_FLAGS_NON_BLOCKING    (1<<0)  /**< Non-blocking operation request. */
+#define SYNCH_FLAGS_INTERRUPTIBLE   (1<<1)  /**< Interruptible operation. */
+#define ESYNCH_WOULD_BLOCK  1   /**< Could not satisfy the request without going to sleep. */
+#define ESYNCH_TIMEOUT      2   /**< Timeout occurred. */
+#define ESYNCH_INTERRUPTED  4   /**< Sleep was interrupted. */
+#define ESYNCH_OK_ATOMIC    8   /**< Operation succeeded without sleeping. */
+#define ESYNCH_OK_BLOCKED   16  /**< Operation succeeded and did sleep. */
+#define SYNCH_FAILED(rc)    ((rc) & (ESYNCH_WOULD_BLOCK | ESYNCH_TIMEOUT | ESYNCH_INTERRUPTED))
+#define SYNCH_OK(rc)        ((rc) & (ESYNCH_OK_ATOMIC | ESYNCH_OK_BLOCKED))
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/generic/include/synch/waitq.h
 ,0 → 1,76
+/*
+ * Copyright (C) 2001-2004 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup sync
+ * @{
+ */
+/** @file
+ */
+#ifndef __WAITQ_H__
+#define __WAITQ_H__
+#include <arch/types.h>
+#include <typedefs.h>
+#include <synch/spinlock.h>
+#include <synch/synch.h>
+#include <adt/list.h>
+#define WAKEUP_FIRST    0
+#define WAKEUP_ALL  1
+/** Wait queue structure. */
+struct waitq {
+    /** Lock protecting wait queue structure.
+     *
+     * Must be acquired before T.lock for each T of type thread_t.
+     */
+    SPINLOCK_DECLARE(lock);
+    int missed_wakeups; /**< Number of waitq_wakeup() calls that didn't find a thread to wake up. */
+    link_t head;        /**< List of sleeping threads for wich there was no missed_wakeup. */
+};
+#define waitq_sleep(wq) \
+    waitq_sleep_timeout((wq),SYNCH_NO_TIMEOUT,SYNCH_FLAGS_NONE)
+extern void waitq_initialize(waitq_t *wq);
+extern int waitq_sleep_timeout(waitq_t *wq, __u32 usec, int flags);
+extern ipl_t waitq_sleep_prepare(waitq_t *wq);
+extern int waitq_sleep_timeout_unsafe(waitq_t *wq, __u32 usec, int flags);
+extern void waitq_sleep_finish(waitq_t *wq, int rc, ipl_t ipl);
+extern void waitq_wakeup(waitq_t *wq, bool all);
+extern void _waitq_wakeup_unsafe(waitq_t *wq, bool all);
+extern void waitq_interrupt_sleep(thread_t *t);
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/generic/include/bitops.h
 ,0 → 1,71
+/*
+ * Copyright (C) 2006 Ondrej Palkovsky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup generic
+ * @{
+ */
+/** @file
+ */
+#ifndef _BITOPS_H_
+#define _BITOPS_H_
+#include <typedefs.h>
+/** Return position of first non-zero bit from left (i.e. [log_2(arg)]).
+ *
+ * If number is zero, it returns 0
+ */
+static inline int fnzb32(__u32 arg)
+{
+    int n = 0;
+    if (arg >> 16) { arg >>= 16;n += 16;}
+    if (arg >> 8) { arg >>= 8; n += 8;}
+    if (arg >> 4) { arg >>= 4; n += 4;}
+    if (arg >> 2) { arg >>= 2; n+=2;}
+    if (arg >> 1) { arg >>= 1; n+=1;}
+    return n;
+}
+static inline int fnzb64(__u64 arg)
+{
+    int n = 0;
+    if (arg >> 32) { arg >>= 32;n += 32;}
+    return n + fnzb32((__u32) arg);
+}
+#define fnzb(x) fnzb32(x)
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/generic/include/putchar.h
 ,0 → 1,44
+/*
+ * Copyright (C) 2001-2004 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup generic
+ * @{
+ */
+/** @file
+ */
+#ifndef __PUTCHAR_H__
+#define __PUTCHAR_H__
+extern void putchar(const char ch);
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/generic/include/memstr.h
 ,0 → 1,53
+/*
+ * Copyright (C) 2001-2004 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup generic
+ * @{
+ */
+/** @file
+ */
+#ifndef __MEMSTR_H__
+#define __MEMSTR_H__
+#include <typedefs.h>
+#include <arch/types.h>
+#include <arch/memstr.h>
+/*
+ * Architecture independent variants.
+ */
+extern void *_memcpy(void *dst, const void *src, size_t cnt);
+extern void _memsetb(__address dst, size_t cnt, __u8 x);
+extern void _memsetw(__address dst, size_t cnt, __u16 x);
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/generic/include/smp/smp.h
 ,0 → 1,48
+/*
+ * Copyright (C) 2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup generic
+ * @{
+ */
+/** @file
+ */
+#ifndef __SMP_H__
+#define __SMP_H__
+#ifdef CONFIG_SMP
+extern void smp_init(void);
+#else
+#define smp_init()  ;
+#endif /* CONFIG_SMP */
+#endif /* __SMP_H__ */
+ /** @}
+ */

 /tags/0.2.0.2/kernel/generic/include/smp/ipi.h
 ,0 → 1,49
+/*
+ * Copyright (C) 2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup generic
+ * @{
+ */
+/** @file
+ */
+#ifndef __IPI_H__
+#define __IPI_H__
+#ifdef CONFIG_SMP
+extern void ipi_broadcast(int ipi);
+extern void ipi_broadcast_arch(int ipi);
+#else
+#define ipi_broadcast(x)    ;
+#endif /* CONFIG_SMP */
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/generic/include/ddi/ddi_arg.h
 ,0 → 1,58
+/*
+ * Copyright (C) 2006 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup genericddi
+ * @{
+ */
+/** @file
+ */
+#ifndef __DDI_ARG_H__
+#define __DDI_ARG_H__
+/** Structure encapsulating arguments for SYS_MAP_PHYSMEM syscall. */
+typedef struct {
+    unsigned long long task_id; /** ID of the destination task. */
+    void *phys_base;        /** Physical address of starting frame. */
+    void *virt_base;        /** Virtual address of starting page. */
+    unsigned long pages;        /** Number of pages to map. */
+    int flags;          /** Address space area flags for the mapping. */
+} ddi_memarg_t;
+/** Structure encapsulating arguments for SYS_ENABLE_IOSPACE syscall. */
+typedef struct {
+    unsigned long long task_id; /** ID of the destination task. */
+    void *ioaddr;           /** Starting I/O space address. */
+    unsigned long size;     /** Number of bytes. */
+} ddi_ioarg_t;
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/generic/include/ddi/ddi.h
 ,0 → 1,56
+/*
+ * Copyright (C) 2006 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup genericddi
+ * @{
+ */
+/** @file
+ */
+#ifndef __DDI_H__
+#define __DDI_H__
+#include <ddi/ddi_arg.h>
+#include <arch/types.h>
+#include <typedefs.h>
+__native sys_physmem_map(__native phys_base, __native virt_base, __native pages,
+             __native flags);
+extern __native sys_iospace_enable(ddi_ioarg_t *uspace_io_arg);
+extern __native sys_preempt_control(int enable);
+/*
+ * Interface to be implemented by all architectures.
+ */
+extern int ddi_iospace_enable_arch(task_t *task, __address ioaddr, size_t size);
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/generic/include/printf/printf_core.h
 ,0 → 1,56
+/*
+ * Copyright (C) 2006 Josef Cejka
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup generic
+ * @{
+ */
+/** @file
+ */
+#ifndef __PRINTF_CORE_H__
+#define __PRINTF_CORE_H__
+#include <typedefs.h>
+#include <arch/arg.h>
+/** Structure for specifying output methods for different printf clones. */
+struct printf_spec {
+    /* Output function, returns count of printed characters or EOF */
+    int (*write)(void *, size_t, void *);
+    /* Support data - output stream specification, its state, locks,... */
+    void *data;
+};
+int printf_core(const char *fmt, struct printf_spec *ps ,va_list ap);
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/generic/include/atomic.h
 ,0 → 1,58
+/*
+ * Copyright (C) 2006 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup generic
+ * @{
+ */
+/** @file
+ */
+#ifndef __ATOMIC_H__
+#define __ATOMIC_H__
+typedef struct atomic {
+    volatile long count;
+} atomic_t;
+#include <arch/atomic.h>
+static inline void atomic_set(atomic_t *val, long i)
+{
+        val->count = i;
+}
+static inline long atomic_get(atomic_t *val)
+{
+        return val->count;
+}
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/generic/include/console/chardev.h
 ,0 → 1,78
+/*
+ * Copyright (C) 2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup genericconsole
+ * @{
+ */
+/** @file
+ */
+#ifndef __CHARDEV_H__
+#define __CHARDEV_H__
+#include <typedefs.h>
+#include <arch/types.h>
+#include <synch/waitq.h>
+#include <synch/spinlock.h>
+#define CHARDEV_BUFLEN 512
+/* Character device operations interface. */
+struct chardev_operations {
+    void (* suspend)(chardev_t *);      /**< Suspend pushing characters. */
+    void (* resume)(chardev_t *);       /**< Resume pushing characters. */
+    void (* write)(chardev_t *, char c);    /**< Write character to stream. */
+    /** Read character directly from device, assume interrupts disabled */
+    char (* read)(chardev_t *);
+};
+typedef struct chardev_operations chardev_operations_t;
+/** Character input device. */
+struct chardev {
+    char *name;
+    waitq_t wq;
+    SPINLOCK_DECLARE(lock);     /**< Protects everything below. */
+    __u8 buffer[CHARDEV_BUFLEN];
+    count_t counter;
+    chardev_operations_t *op;   /**< Implementation of chardev operations. */
+    index_t index;
+    void *data;
+};
+extern void chardev_initialize(char *name,
+                   chardev_t *chardev,
+                   chardev_operations_t *op);
+extern void chardev_push_character(chardev_t *chardev, __u8 ch);
+#endif /* __CHARDEV_H__ */
+ /** @}
+ */

 /tags/0.2.0.2/kernel/generic/include/console/klog.h
 ,0 → 1,45
+/*
+ * Copyright (C) 2006 Ondrej Palkovsky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup genericklog
+ * @{
+ */
+/** @file
+ */
+#ifndef _KLOG_H_
+#define _KLOG_H_
+void klog_init(void);
+void klog_printf(const char *fmt, ...);
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/generic/include/console/kconsole.h
 ,0 → 1,85
+/*
+ * Copyright (C) 2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup genericconsole
+ * @{
+ */
+/** @file
+ */
+#ifndef __KCONSOLE_H__
+#define __KCONSOLE_H__
+#include <typedefs.h>
+#include <adt/list.h>
+#include <synch/spinlock.h>
+#define MAX_CMDLINE     256
+#define KCONSOLE_HISTORY 10
+enum cmd_arg_type {
+    ARG_TYPE_INVALID = 0,
+    ARG_TYPE_INT,
+    ARG_TYPE_STRING,
+    ARG_TYPE_VAR      /**< Variable type - either symbol or string */
+};
+/** Structure representing one argument of kconsole command line. */
+struct cmd_arg {
+    cmd_arg_type_t type;        /**< Type descriptor. */
+    void *buffer;           /**< Buffer where to store data. */
+    size_t len;         /**< Size of the buffer. */
+    __native intval;                /**< Integer value */
+    cmd_arg_type_t vartype;         /**< Resulting type of variable arg */
+};
+/** Structure representing one kconsole command. */
+struct cmd_info {
+    link_t link;            /**< Command list link. */
+    SPINLOCK_DECLARE(lock);     /**< This lock protects everything below. */
+    const char *name;       /**< Command name. */
+    const char *description;    /**< Textual description. */
+    int (* func)(cmd_arg_t *);  /**< Function implementing the command. */
+    count_t argc;           /**< Number of arguments. */
+    cmd_arg_t *argv;        /**< Argument vector. */
+    void (* help)(void);        /**< Function for printing detailed help. */
+};
+extern spinlock_t cmd_lock;
+extern link_t cmd_head;
+extern void kconsole_init(void);
+extern void kconsole(void *prompt);
+extern int cmd_register(cmd_info_t *cmd);
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/generic/include/console/console.h
 ,0 → 1,56
+/*
+ * Copyright (C) 2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup genericconsole
+ * @{
+ */
+/** @file
+ */
+#ifndef __CONSOLE_H__
+#define __CONSOLE_H__
+#include <arch/types.h>
+#include <typedefs.h>
+extern chardev_t *stdin;
+extern chardev_t *stdout;
+extern __u8 getc(chardev_t *chardev);
+__u8 _getc(chardev_t *chardev);
+extern count_t gets(chardev_t *chardev, char *buf, size_t buflen);
+extern void putchar(char c);
+extern void arch_grab_console(void);
+extern void arch_release_console(void);
+#endif /* __CHARDEV_H__ */
+ /** @}
+ */

 /tags/0.2.0.2/kernel/generic/include/console/cmd.h
 ,0 → 1,47
+/*
+ * Copyright (C) 2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup genericconsole
+ * @{
+ */
+/** @file
+ */
+#ifndef __CMD_H__
+#define __CMD_H__
+#include <typedefs.h>
+extern void cmd_initialize(cmd_info_t *cmd);
+extern void cmd_init(void);
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/generic/include/arch.h
 ,0 → 1,86
+/*
+ * Copyright (C) 2001-2004 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup generic
+ * @{
+ */
+/** @file
+ */
+#ifndef __ARCH_H__
+#define __ARCH_H__
+#include <arch/types.h>
+#include <arch/arch.h>
+#include <typedefs.h>
+#include <cpu.h>
+#include <arch/cpu.h>
+#include <arch/asm.h>
+#define CPU         THE->cpu
+#define THREAD          THE->thread
+#define TASK            THE->task
+#define AS          THE->as
+#define PREEMPTION_DISABLED THE->preemption_disabled
+/**
+ * For each possible kernel stack, structure
+ * of the following type will be placed at
+ * the base address of the stack.
+ */
+struct the {
+    count_t preemption_disabled;    /**< Preemption disabled counter. */
+    thread_t *thread;       /**< Current thread. */
+    task_t *task;           /**< Current task. */
+    cpu_t *cpu;         /**< Executing cpu. */
+    as_t *as;           /**< Current address space. */
+};
+#define THE     ((the_t *)(get_stack_base()))
+extern void the_initialize(the_t *the);
+extern void the_copy(the_t *src, the_t *dst);
+extern void arch_pre_main(void);
+extern void arch_pre_mm_init(void);
+extern void arch_post_mm_init(void);
+extern void arch_pre_smp_init(void);
+extern void arch_post_smp_init(void);
+extern void calibrate_delay_loop(void);
+extern ipl_t interrupts_disable(void);
+extern ipl_t interrupts_enable(void);
+extern void interrupts_restore(ipl_t ipl);
+extern ipl_t interrupts_read(void);
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/generic/include/test.h
 ,0 → 1,44
+/*
+ * Copyright (C) 2001-2004 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup generic
+ * @{
+ */
+/** @file
+ */
+#ifndef __TEST_H__
+#define __TEST_H__
+extern void test(void);
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/generic/include/security/cap.h
 ,0 → 1,94
+/*
+ * Copyright (C) 2006 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup generic
+ * @{
+ */
+/** @file
+ */
+/**
+ * @file
+ * @brief   Capabilities definitions.
+ *
+ * Capabilities represent virtual rights that entitle their
+ * holder to perform certain security sensitive tasks.
+ *
+ * Each task can have arbitrary combination of the capabilities
+ * defined in this file. Therefore, they are required to be powers
+ * of two.
+ */
+#ifndef __CAP_H__
+#define __CAP_H__
+#include <syscall/sysarg64.h>
+#include <arch/types.h>
+#include <typedefs.h>
+/**
+ * CAP_CAP allows its holder to grant/revoke arbitrary
+ * privilege to/from other tasks.
+ */
+#define CAP_CAP         (1<<0)
+/**
+ * CAP_MEM_MANAGER allows its holder to map physical memory
+ * to other tasks.
+ */
+#define CAP_MEM_MANAGER     (1<<1)
+/**
+ * CAP_IO_MANAGER allows its holder to access I/O space
+ * to other tasks.
+ */
+#define CAP_IO_MANAGER      (1<<2)
+/**
+ * CAP_PREEMPT_CONTROL allows its holder to disable/enable preemption.
+ */
+#define CAP_PREEMPT_CONTROL (1<<3)
+/**
+ * CAP_IRQ_REG entitles its holder to register IRQ handlers.
+ */
+#define CAP_IRQ_REG     (1<<4)
+typedef __u32 cap_t;
+extern void cap_set(task_t *t, cap_t caps);
+extern cap_t cap_get(task_t *t);
+extern __native sys_cap_grant(sysarg64_t *uspace_taskid_arg, cap_t caps);
+extern __native sys_cap_revoke(sysarg64_t *uspace_taskid_arg, cap_t caps);
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/generic/include/preemption.h
 ,0 → 1,45
+/*
+ * Copyright (C) 2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup generic
+ * @{
+ */
+/** @file
+ */
+#ifndef __PREEMPTION_H__
+#define __PREEMPTION_H__
+extern void preemption_disable(void);
+extern void preemption_enable(void);
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/generic/include/adt/hash_table.h
 ,0 → 1,86
+/*
+ * Copyright (C) 2006 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup genericadt
+ * @{
+ */
+/** @file
+ */
+#ifndef __HASH_TABLE_H__
+#define __HASH_TABLE_H__
+#include <adt/list.h>
+#include <arch/types.h>
+#include <typedefs.h>
+/** Hash table structure. */
+struct hash_table {
+    link_t *entry;
+    count_t entries;
+    count_t max_keys;
+    hash_table_operations_t *op;
+};
+/** Set of operations for hash table. */
+struct hash_table_operations {
+    /** Hash function.
+     *
+     * @param key Array of keys needed to compute hash index. All keys must be passed.
+     *
+     * @return Index into hash table.
+     */
+    index_t (* hash)(__native key[]);
+    /** Hash table item comparison function.
+     *
+     * @param key Array of keys that will be compared with item. It is not necessary to pass all keys.
+     *
+     * @return true if the keys match, false otherwise.
+     */
+    bool (*compare)(__native key[], count_t keys, link_t *item);
+    /** Hash table item removal callback.
+     *
+     * @param item Item that was removed from the hash table.
+     */
+    void (*remove_callback)(link_t *item);
+};
+#define hash_table_get_instance(item, type, member) list_get_instance((item), type, member)
+extern void hash_table_create(hash_table_t *h, count_t m, count_t max_keys, hash_table_operations_t *op);
+extern void hash_table_insert(hash_table_t *h, __native key[], link_t *item);
+extern link_t *hash_table_find(hash_table_t *h, __native key[]);
+extern void hash_table_remove(hash_table_t *h, __native key[], count_t keys);
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/generic/include/adt/list.h
 ,0 → 1,187
+/*
+ * Copyright (C) 2001-2004 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup genericadt
+ * @{
+ */
+/** @file
+ */
+#ifndef __LIST_H__
+#define __LIST_H__
+#include <arch/types.h>
+#include <typedefs.h>
+/** Doubly linked list head and link type. */
+struct link {
+    link_t *prev;   /**< Pointer to the previous item in the list. */
+    link_t *next;   /**< Pointer to the next item in the list. */
+};
+/** Declare and initialize statically allocated list.
+ *
+ * @param name Name of the new statically allocated list.
+ */
+#define LIST_INITIALIZE(name)       link_t name = { .prev = &name, .next = &name }
+/** Initialize doubly-linked circular list link
+ *
+ * Initialize doubly-linked list link.
+ *
+ * @param link Pointer to link_t structure to be initialized.
+ */
+static inline void link_initialize(link_t *link)
+{
+    link->prev = NULL;
+    link->next = NULL;
+}
+/** Initialize doubly-linked circular list
+ *
+ * Initialize doubly-linked circular list.
+ *
+ * @param head Pointer to link_t structure representing head of the list.
+ */
+static inline void list_initialize(link_t *head)
+{
+    head->prev = head;
+    head->next = head;
+}
+/** Add item to the beginning of doubly-linked circular list
+ *
+ * Add item to the beginning of doubly-linked circular list.
+ *
+ * @param link Pointer to link_t structure to be added.
+ * @param head Pointer to link_t structure representing head of the list.
+ */
+static inline void list_prepend(link_t *link, link_t *head)
+{
+    link->next = head->next;
+    link->prev = head;
+    head->next->prev = link;
+    head->next = link;
+}
+/** Add item to the end of doubly-linked circular list
+ *
+ * Add item to the end of doubly-linked circular list.
+ *
+ * @param link Pointer to link_t structure to be added.
+ * @param head Pointer to link_t structure representing head of the list.
+ */
+static inline void list_append(link_t *link, link_t *head)
+{
+    link->prev = head->prev;
+    link->next = head;
+    head->prev->next = link;
+    head->prev = link;
+}
+/** Remove item from doubly-linked circular list
+ *
+ * Remove item from doubly-linked circular list.
+ *
+ * @param link Pointer to link_t structure to be removed from the list it is contained in.
+ */
+static inline void list_remove(link_t *link)
+{
+    link->next->prev = link->prev;
+    link->prev->next = link->next;
+    link_initialize(link);
+}
+/** Query emptiness of doubly-linked circular list
+ *
+ * Query emptiness of doubly-linked circular list.
+ *
+ * @param head Pointer to link_t structure representing head of the list.
+ */
+static inline bool list_empty(link_t *head)
+{
+    return head->next == head ? true : false;
+}
+/** Split or concatenate headless doubly-linked circular list
+ *
+ * Split or concatenate headless doubly-linked circular list.
+ *
+ * Note that the algorithm works both directions:
+ * concatenates splitted lists and splits concatenated lists.
+ *
+ * @param part1 Pointer to link_t structure leading the first (half of the headless) list.
+ * @param part2 Pointer to link_t structure leading the second (half of the headless) list.
+ */
+static inline void headless_list_split_or_concat(link_t *part1, link_t *part2)
+{
+    link_t *hlp;
+    part1->prev->next = part2;
+    part2->prev->next = part1;
+    hlp = part1->prev;
+    part1->prev = part2->prev;
+    part2->prev = hlp;
+}
+/** Split headless doubly-linked circular list
+ *
+ * Split headless doubly-linked circular list.
+ *
+ * @param part1 Pointer to link_t structure leading the first half of the headless list.
+ * @param part2 Pointer to link_t structure leading the second half of the headless list.
+ */
+static inline void headless_list_split(link_t *part1, link_t *part2)
+{
+    headless_list_split_or_concat(part1, part2);
+}
+/** Concatenate two headless doubly-linked circular lists
+ *
+ * Concatenate two headless doubly-linked circular lists.
+ *
+ * @param part1 Pointer to link_t structure leading the first headless list.
+ * @param part2 Pointer to link_t structure leading the second headless list.
+ */
+static inline void headless_list_concat(link_t *part1, link_t *part2)
+{
+    headless_list_split_or_concat(part1, part2);
+}
+#define list_get_instance(link,type,member) (type *)(((__u8*)(link))-((__u8*)&(((type *)NULL)->member)))
+extern bool list_member(const link_t *link, const link_t *head);
+extern void list_concat(link_t *head1, link_t *head2);
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/generic/include/adt/bitmap.h
 ,0 → 1,57
+/*
+ * Copyright (C) 2006 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup genericadt
+ * @{
+ */
+/** @file
+ */
+#ifndef __BITMAP_H__
+#define __BITMAP_H__
+#include <arch/types.h>
+#include <typedefs.h>
+#define BITS2BYTES(bits)    (bits ? ((((bits)-1)>>3)+1) : 0)
+typedef struct {
+    __u8 *map;
+    count_t bits;
+} bitmap_t;
+extern void bitmap_initialize(bitmap_t *bitmap, __u8 *map, count_t bits);
+extern void bitmap_set_range(bitmap_t *bitmap, index_t start, count_t bits);
+extern void bitmap_clear_range(bitmap_t *bitmap, index_t start, count_t bits);
+extern void bitmap_copy(bitmap_t *dst, bitmap_t *src, count_t bits);
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/generic/include/adt/btree.h
 ,0 → 1,104
+/*
+ * Copyright (C) 2006 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup genericadt
+ * @{
+ */
+/** @file
+ */
+#ifndef __BTREE_H__
+#define __BTREE_H__
+#include <arch/types.h>
+#include <typedefs.h>
+#include <adt/list.h>
+#define BTREE_M     5
+#define BTREE_MAX_KEYS  (BTREE_M - 1)
+typedef __u64 btree_key_t;
+/** B-tree node structure. */
+struct btree_node {
+    /** Number of keys. */
+    count_t keys;
+    /** Keys. We currently support only single keys. Additional room for one extra key is provided. */
+    btree_key_t key[BTREE_MAX_KEYS + 1];
+    /**
+     * Pointers to values. Sorted according to the key array. Defined only in leaf-level.
+     * There is room for storing value for the extra key.
+     */
+    void *value[BTREE_MAX_KEYS + 1];
+    /**
+     * Pointers to descendants of this node sorted according to the key array.
+     * subtree[0] points to subtree with keys lesser than to key[0].
+     * subtree[1] points to subtree with keys greater than or equal to key[0] and lesser than key[1].
+     * ...
+     * There is room for storing a subtree pointer for the extra key.
+     */
+    btree_node_t *subtree[BTREE_M + 1];
+    /** Pointer to parent node. Root node has NULL parent. */
+    btree_node_t *parent;
+    /** Link connecting leaf-level nodes. Defined only when this node is a leaf. */
+    link_t leaf_link;
+    /** Variables needed by btree_print(). */
+    link_t bfs_link;
+    int depth;
+};
+/** B-tree structure. */
+struct btree {
+    btree_node_t *root; /**< B-tree root node pointer. */
+    link_t leaf_head;   /**< Leaf-level list head. */
+};
+extern void btree_init(void);
+extern void btree_create(btree_t *t);
+extern void btree_destroy(btree_t *t);
+extern void btree_insert(btree_t *t, btree_key_t key, void *value, btree_node_t *leaf_node);
+extern void btree_remove(btree_t *t, btree_key_t key, btree_node_t *leaf_node);
+extern void *btree_search(btree_t *t, btree_key_t key, btree_node_t **leaf_node);
+extern btree_node_t *btree_leaf_node_left_neighbour(btree_t *t, btree_node_t *node);
+extern btree_node_t *btree_leaf_node_right_neighbour(btree_t *t, btree_node_t *node);
+extern void btree_print(btree_t *t);
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/generic/include/adt/fifo.h
 ,0 → 1,123
+/*
+ * Copyright (C) 2006 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup genericadt
+ * @{
+ */
+/** @file
+ */
+/*
+ * This implementation of FIFO stores values in an array
+ * (static or dynamic). As such, these FIFOs have upper bound
+ * on number of values they can store. Push and pop operations
+ * are done via accessing the array through head and tail indices.
+ * Because of better operation ordering in fifo_pop(), the access
+ * policy for these two indices is to 'increment (mod size of FIFO)
+ * and use'.
+ */
+#ifndef __FIFO_H__
+#define __FIFO_H__
+#include <typedefs.h>
+#include <mm/slab.h>
+/** Create and initialize static FIFO.
+ *
+ * FIFO is allocated statically.
+ * This macro is suitable for creating smaller FIFOs.
+ *
+ * @param name Name of FIFO.
+ * @param t Type of values stored in FIFO.
+ * @param itms Number of items that can be stored in FIFO.
+ */
+#define FIFO_INITIALIZE_STATIC(name, t, itms)       \
+    struct {                    \
+        t fifo[(itms)];             \
+        count_t items;              \
+        index_t head;               \
+        index_t tail;               \
+    } name = {                  \
+        .items = (itms),            \
+        .head = 0,              \
+        .tail = 0               \
+    }
+/** Create and prepare dynamic FIFO.
+ *
+ * FIFO is allocated dynamically.
+ * This macro is suitable for creating larger FIFOs.
+ *
+ * @param name Name of FIFO.
+ * @param t Type of values stored in FIFO.
+ * @param itms Number of items that can be stored in FIFO.
+ */
+#define FIFO_INITIALIZE_DYNAMIC(name, t, itms)      \
+    struct {                    \
+        t *fifo;                \
+        count_t items;              \
+        index_t head;               \
+        index_t tail;               \
+    } name = {                  \
+        .fifo = NULL,               \
+        .items = (itms),            \
+        .head = 0,              \
+        .tail = 0               \
+    }
+/** Pop value from head of FIFO.
+ *
+ * @param name FIFO name.
+ *
+ * @return Leading value in FIFO.
+ */
+#define fifo_pop(name) \
+    name.fifo[name.head = (name.head + 1) < name.items ? (name.head + 1) : 0]
+/** Push value to tail of FIFO.
+ *
+ * @param name FIFO name.
+ * @param value Value to be appended to FIFO.
+ *
+ */
+#define fifo_push(name, value) \
+    name.fifo[name.tail = (name.tail + 1) < name.items ? (name.tail + 1) : 0] = (value)
+/** Allocate memory for dynamic FIFO.
+ *
+ * @param name FIFO name.
+ */
+#define fifo_create(name) \
+    name.fifo = malloc(sizeof(*name.fifo) * name.items, 0)
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/generic/include/mm/frame.h
 ,0 → 1,119
+/*
+ * Copyright (C) 2005 Jakub Jermar
+ * Copyright (C) 2005 Sergey Bondari
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup genericmm
+ * @{
+ */
+/** @file
+ */
+#ifndef __FRAME_H__
+#define __FRAME_H__
+#include <arch/types.h>
+#include <typedefs.h>
+#include <adt/list.h>
+#include <synch/spinlock.h>
+#include <mm/buddy.h>
+#include <arch/mm/page.h>
+#include <arch/mm/frame.h>
+#define ONE_FRAME   0
+#define TWO_FRAMES  1
+#ifdef ARCH_STACK_FRAMES
+#define STACK_FRAMES ARCH_STACK_FRAMES
+#else
+#define STACK_FRAMES ONE_FRAME
+#endif
+#define ZONES_MAX       16      /**< Maximum number of zones in system */
+#define ZONE_JOIN       0x1 /**< If possible, merge with neighbouring zones */
+#define FRAME_KA        0x1 /* skip frames conflicting with user address space */
+#define FRAME_PANIC     0x2 /* panic on failure */
+#define FRAME_ATOMIC            0x4 /* do not panic and do not sleep on failure */
+#define FRAME_NO_RECLAIM        0x8     /* do not start reclaiming when no free memory */
+#define FRAME_OK        0    /* frame_alloc return status */
+#define FRAME_NO_MEMORY     1   /* frame_alloc return status */
+#define FRAME_ERROR     2   /* frame_alloc return status */
+static inline __address PFN2ADDR(pfn_t frame)
+{
+    return (__address)(frame << FRAME_WIDTH);
+}
+static inline pfn_t ADDR2PFN(__address addr)
+{
+    return (pfn_t)(addr >> FRAME_WIDTH);
+}
+static inline count_t SIZE2FRAMES(size_t size)
+{
+    if (!size)
+        return 0;
+    return (count_t)((size-1) >> FRAME_WIDTH)+1;
+}
+#define IS_BUDDY_ORDER_OK(index, order)     ((~(((__native) -1) << (order)) & (index)) == 0)
+#define IS_BUDDY_LEFT_BLOCK(zone, frame)    (((frame_index((zone), (frame)) >> (frame)->buddy_order) & 0x1) == 0)
+#define IS_BUDDY_RIGHT_BLOCK(zone, frame)   (((frame_index((zone), (frame)) >> (frame)->buddy_order) & 0x1) == 1)
+#define IS_BUDDY_LEFT_BLOCK_ABS(zone, frame)    (((frame_index_abs((zone), (frame)) >> (frame)->buddy_order) & 0x1) == 0)
+#define IS_BUDDY_RIGHT_BLOCK_ABS(zone, frame)   (((frame_index_abs((zone), (frame)) >> (frame)->buddy_order) & 0x1) == 1)
+#define frame_alloc(order, flags)               frame_alloc_generic(order, flags, NULL, NULL)
+#define frame_alloc_rc(order, flags, status)            frame_alloc_generic(order, flags, status, NULL)
+#define frame_alloc_rc_zone(order, flags, status, zone)     frame_alloc_generic(order, flags, status, zone)
+extern void frame_init(void);
+extern pfn_t frame_alloc_generic(__u8 order, int flags, int * status, int *pzone);
+extern void frame_free(pfn_t pfn);
+extern void frame_reference_add(pfn_t pfn);
+extern int zone_create(pfn_t start, count_t count, pfn_t confframe, int flags);
+void * frame_get_parent(pfn_t frame, int hint);
+void frame_set_parent(pfn_t frame, void *data, int hint);
+void frame_mark_unavailable(pfn_t start, count_t count);
+__address zone_conf_size(count_t count);
+void zone_merge(int z1, int z2);
+void zone_merge_all(void);
+/*
+ * Console functions
+ */
+extern void zone_print_list(void);
+void zone_print_one(int znum);
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/generic/include/mm/page.h
 ,0 → 1,102
+/*
+ * Copyright (C) 2001-2004 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup genericmm
+ * @{
+ */
+/** @file
+ */
+#ifndef __PAGE_H__
+#define __PAGE_H__
+#include <arch/mm/asid.h>
+#include <arch/types.h>
+#include <typedefs.h>
+#include <memstr.h>
+#define PAGE_CACHEABLE_SHIFT        0
+#define PAGE_NOT_CACHEABLE_SHIFT    PAGE_CACHEABLE_SHIFT
+#define PAGE_PRESENT_SHIFT      1
+#define PAGE_NOT_PRESENT_SHIFT      PAGE_PRESENT_SHIFT
+#define PAGE_USER_SHIFT         2
+#define PAGE_KERNEL_SHIFT       PAGE_USER_SHIFT
+#define PAGE_READ_SHIFT         3
+#define PAGE_WRITE_SHIFT        4
+#define PAGE_EXEC_SHIFT         5
+#define PAGE_GLOBAL_SHIFT       6
+#define PAGE_NOT_CACHEABLE  (0<<PAGE_CACHEABLE_SHIFT)
+#define PAGE_CACHEABLE      (1<<PAGE_CACHEABLE_SHIFT)
+#define PAGE_PRESENT        (0<<PAGE_PRESENT_SHIFT)
+#define PAGE_NOT_PRESENT    (1<<PAGE_PRESENT_SHIFT)
+#define PAGE_USER       (1<<PAGE_USER_SHIFT)
+#define PAGE_KERNEL     (0<<PAGE_USER_SHIFT)
+#define PAGE_READ       (1<<PAGE_READ_SHIFT)
+#define PAGE_WRITE      (1<<PAGE_WRITE_SHIFT)
+#define PAGE_EXEC       (1<<PAGE_EXEC_SHIFT)
+#define PAGE_GLOBAL     (1<<PAGE_GLOBAL_SHIFT)
+/** Page fault access type. */
+enum pf_access {
+    PF_ACCESS_READ,
+    PF_ACCESS_WRITE,
+    PF_ACCESS_EXEC
+};
+typedef enum pf_access pf_access_t;
+/** Operations to manipulate page mappings. */
+struct page_mapping_operations {
+    void (* mapping_insert)(as_t *as, __address page, __address frame, int flags);
+    void (* mapping_remove)(as_t *as, __address page);
+    pte_t *(* mapping_find)(as_t *as, __address page);
+};
+typedef struct page_mapping_operations page_mapping_operations_t;
+extern page_mapping_operations_t *page_mapping_operations;
+extern void page_init(void);
+extern void page_table_lock(as_t *as, bool lock);
+extern void page_table_unlock(as_t *as, bool unlock);
+extern void page_mapping_insert(as_t *as, __address page, __address frame, int flags);
+extern void page_mapping_remove(as_t *as, __address page);
+extern pte_t *page_mapping_find(as_t *as, __address page);
+extern pte_t *page_table_create(int flags);
+extern void page_table_destroy(pte_t *page_table);
+extern void map_structure(__address s, size_t size);
+extern __address hw_map(__address physaddr, size_t size);
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/generic/include/mm/asid.h
 ,0 → 1,89
+/*
+ * Copyright (C) 2006 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup genericmm
+ * @{
+ */
+/** @file
+ */
+/*
+ * This is generic interface for managing
+ * Address Space IDentifiers (ASIDs).
+ */
+#ifndef __ASID_H__
+#define __ASID_H__
+#ifndef __ASM__
+#include <arch/mm/asid.h>
+#include <typedefs.h>
+#endif
+#define ASID_KERNEL 0
+#define ASID_INVALID    1
+#define ASID_START  2
+#define ASID_MAX    ASID_MAX_ARCH
+#ifndef __ASM__
+#define ASIDS_ALLOCABLE ((ASID_MAX+1)-ASID_START)
+extern spinlock_t asidlock;
+extern link_t as_with_asid_head;
+#ifndef asid_get
+extern asid_t asid_get(void);
+#endif /* !def asid_get */
+#ifndef asid_put
+extern void asid_put(asid_t asid);
+#endif /* !def asid_put */
+#ifndef asid_install
+extern void asid_install(as_t *as);
+#endif /* !def asid_install */
+#ifndef asid_find_free
+extern asid_t asid_find_free(void);
+#endif /* !def asid_find_free */
+#ifndef asid_put_arch
+extern void asid_put_arch(asid_t asid);
+#endif /* !def asid_put_arch */
+#endif
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/generic/include/mm/slab.h
 ,0 → 1,140
+/*
+ * Copyright (C) 2006 Ondrej Palkovsky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup genericmm
+ * @{
+ */
+/** @file
+ */
+#ifndef __SLAB_H__
+#define __SLAB_H__
+#include <adt/list.h>
+#include <synch/spinlock.h>
+#include <atomic.h>
+#include <mm/frame.h>
+/** Minimum size to be allocated by malloc */
+#define SLAB_MIN_MALLOC_W 4
+/** Maximum size to be allocated by malloc */
+#define SLAB_MAX_MALLOC_W 18
+/** Initial Magazine size (TODO: dynamically growing magazines) */
+#define SLAB_MAG_SIZE  4
+/** If object size is less, store control structure inside SLAB */
+#define SLAB_INSIDE_SIZE   (PAGE_SIZE >> 3)
+/** Maximum wasted space we allow for cache */
+#define SLAB_MAX_BADNESS(cache)   ((PAGE_SIZE << (cache)->order) >> 2)
+/* slab_reclaim constants */
+#define SLAB_RECLAIM_ALL  0x1 /**< Reclaim all possible memory, because
+                   *   we are in memory stress */
+/* cache_create flags */
+#define SLAB_CACHE_NOMAGAZINE 0x1 /**< Do not use per-cpu cache */
+#define SLAB_CACHE_SLINSIDE   0x2 /**< Have control structure inside SLAB */
+/** We add magazine cache later, if we have this flag */
+#define SLAB_CACHE_MAGDEFERRED (0x4 | SLAB_CACHE_NOMAGAZINE)
+typedef struct {
+    link_t link;
+    count_t busy;  /**< Count of full slots in magazine */
+    count_t size;  /**< Number of slots in magazine */
+    void *objs[0]; /**< Slots in magazine */
+}slab_magazine_t;
+typedef struct {
+    slab_magazine_t *current;
+    slab_magazine_t *last;
+    SPINLOCK_DECLARE(lock);
+}slab_mag_cache_t;
+typedef struct {
+    char *name;
+    link_t link;
+    /* Configuration */
+    size_t size;      /**< Size of slab position - align_up(sizeof(obj)) */
+    int (*constructor)(void *obj, int kmflag);
+    int (*destructor)(void *obj);
+    int flags;        /**< Flags changing behaviour of cache */
+    /* Computed values */
+    __u8 order;        /**< Order of frames to be allocated */
+    int objects;      /**< Number of objects that fit in */
+    /* Statistics */
+    atomic_t allocated_slabs;
+    atomic_t allocated_objs;
+    atomic_t cached_objs;
+    atomic_t magazine_counter; /**< How many magazines in magazines list */
+    /* Slabs */
+    link_t full_slabs;     /**< List of full slabs */
+    link_t partial_slabs;  /**< List of partial slabs */
+    SPINLOCK_DECLARE(slablock);
+    /* Magazines  */
+    link_t magazines;      /**< List o full magazines */
+    SPINLOCK_DECLARE(maglock);
+    /** CPU cache */
+    slab_mag_cache_t *mag_cache;
+}slab_cache_t;
+extern slab_cache_t * slab_cache_create(char *name,
+                    size_t size,
+                    size_t align,
+                    int (*constructor)(void *obj, int kmflag),
+                    int (*destructor)(void *obj),
+                    int flags);
+extern void slab_cache_destroy(slab_cache_t *cache);
+extern void * slab_alloc(slab_cache_t *cache, int flags);
+extern void slab_free(slab_cache_t *cache, void *obj);
+extern count_t slab_reclaim(int flags);
+/** Initialize slab subsytem */
+extern void slab_cache_init(void);
+extern void slab_enable_cpucache(void);
+/* kconsole debug */
+extern void slab_print_list(void);
+/* malloc support */
+extern void * malloc(unsigned int size, int flags);
+extern void free(void *obj);
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/generic/include/mm/tlb.h
 ,0 → 1,91
+/*
+ * Copyright (C) 2001-2004 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup genericmm
+ * @{
+ */
+/** @file
+ */
+#ifndef __TLB_H__
+#define __TLB_H__
+#include <arch/mm/asid.h>
+#include <arch/types.h>
+#include <typedefs.h>
+/**
+ * Number of TLB shootdown messages that can be queued in processor
+ * tlb_messages queue.
+ */
+#define TLB_MESSAGE_QUEUE_LEN   10
+/** Type of TLB shootdown message. */
+enum tlb_invalidate_type {
+    TLB_INVL_INVALID = 0,       /**< Invalid type. */
+    TLB_INVL_ALL,           /**< Invalidate all entries in TLB. */
+    TLB_INVL_ASID,          /**< Invalidate all entries belonging to one address space. */
+    TLB_INVL_PAGES          /**< Invalidate specified page range belonging to one address space. */
+};
+typedef enum tlb_invalidate_type tlb_invalidate_type_t;
+/** TLB shootdown message. */
+struct tlb_shootdown_msg {
+    tlb_invalidate_type_t type; /**< Message type. */
+    asid_t asid;            /**< Address space identifier. */
+    __address page;         /**< Page address. */
+    count_t count;          /**< Number of pages to invalidate. */
+};
+typedef struct tlb_shootdown_msg tlb_shootdown_msg_t;
+extern void tlb_init(void);
+#ifdef CONFIG_SMP
+extern void tlb_shootdown_start(tlb_invalidate_type_t type, asid_t asid, __address page, count_t count);
+extern void tlb_shootdown_finalize(void);
+extern void tlb_shootdown_ipi_recv(void);
+#else
+#  define tlb_shootdown_start(w, x, y, z)
+#  define tlb_shootdown_finalize()
+#  define tlb_shootdown_ipi_recv()
+#endif /* CONFIG_SMP */
+/* Export TLB interface that each architecture must implement. */
+extern void tlb_arch_init(void);
+extern void tlb_print(void);
+extern void tlb_shootdown_ipi_send(void);
+extern void tlb_invalidate_all(void);
+extern void tlb_invalidate_asid(asid_t asid);
+extern void tlb_invalidate_pages(asid_t asid, __address page, count_t cnt);
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/generic/include/mm/as.h
 ,0 → 1,211
+/*
+ * Copyright (C) 2001-2004 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup genericmm
+ * @{
+ */
+/** @file
+ */
+#ifndef __AS_H__
+#define __AS_H__
+/** Address space area flags. */
+#define AS_AREA_READ        1
+#define AS_AREA_WRITE       2
+#define AS_AREA_EXEC        4
+#define AS_AREA_CACHEABLE   8
+#ifdef KERNEL
+#include <arch/mm/page.h>
+#include <arch/mm/as.h>
+#include <arch/mm/asid.h>
+#include <arch/types.h>
+#include <typedefs.h>
+#include <synch/spinlock.h>
+#include <synch/mutex.h>
+#include <adt/list.h>
+#include <adt/btree.h>
+#include <elf.h>
+/** Defined to be true if user address space and kernel address space shadow each other. */
+#define KERNEL_ADDRESS_SPACE_SHADOWED   KERNEL_ADDRESS_SPACE_SHADOWED_ARCH
+#define KERNEL_ADDRESS_SPACE_START  KERNEL_ADDRESS_SPACE_START_ARCH
+#define KERNEL_ADDRESS_SPACE_END    KERNEL_ADDRESS_SPACE_END_ARCH
+#define USER_ADDRESS_SPACE_START    USER_ADDRESS_SPACE_START_ARCH
+#define USER_ADDRESS_SPACE_END      USER_ADDRESS_SPACE_END_ARCH
+#define IS_KA(addr) ((addr)>=KERNEL_ADDRESS_SPACE_START && (addr)<=KERNEL_ADDRESS_SPACE_END)
+#define USTACK_ADDRESS  USTACK_ADDRESS_ARCH
+#define FLAG_AS_KERNEL      (1 << 0)    /**< Kernel address space. */
+/** Address space structure.
+ *
+ * as_t contains the list of as_areas of userspace accessible
+ * pages for one or more tasks. Ranges of kernel memory pages are not
+ * supposed to figure in the list as they are shared by all tasks and
+ * set up during system initialization.
+ */
+struct as {
+    /** Protected by asidlock. */
+    link_t inactive_as_with_asid_link;
+    mutex_t lock;
+    /** Number of references (i.e tasks that reference this as). */
+    count_t refcount;
+    /** Number of processors on wich is this address space active. */
+    count_t cpu_refcount;
+    /** B+tree of address space areas. */
+    btree_t as_area_btree;
+    /** Page table pointer. Constant on architectures that use global page hash table. */
+    pte_t *page_table;
+    /** Address space identifier. Constant on architectures that do not support ASIDs.*/
+    asid_t asid;
+};
+struct as_operations {
+    pte_t *(* page_table_create)(int flags);
+    void (* page_table_destroy)(pte_t *page_table);
+    void (* page_table_lock)(as_t *as, bool lock);
+    void (* page_table_unlock)(as_t *as, bool unlock);
+};
+typedef struct as_operations as_operations_t;
+/** Address space area attributes. */
+#define AS_AREA_ATTR_NONE   0
+#define AS_AREA_ATTR_PARTIAL    1   /**< Not fully initialized area. */
+#define AS_PF_FAULT     0    /**< The page fault was not resolved by as_page_fault(). */
+#define AS_PF_OK        1   /**< The page fault was resolved by as_page_fault(). */
+#define AS_PF_DEFER     2   /**< The page fault was caused by memcpy_from_uspace()
+                         or memcpy_to_uspace(). */
+/** This structure contains information associated with the shared address space area. */
+typedef struct {
+    mutex_t lock;       /**< This lock must be acquired only when the as_area lock is held. */
+    count_t refcount;   /**< This structure can be deallocated if refcount drops to 0. */
+    btree_t pagemap;    /**< B+tree containing complete map of anonymous pages of the shared area. */
+} share_info_t;
+/** Address space area backend structure. */
+typedef struct {
+    int (* page_fault)(as_area_t *area, __address addr, pf_access_t access);
+    void (* frame_free)(as_area_t *area, __address page, __address frame);
+    void (* share)(as_area_t *area);
+} mem_backend_t;
+/** Backend data stored in address space area. */
+typedef union {
+    struct {    /**< elf_backend members */
+        elf_header_t *elf;
+        elf_segment_header_t *segment;
+    };
+    struct {    /**< phys_backend members */
+        __address base;
+        count_t frames;
+    };
+} mem_backend_data_t;
+/** Address space area structure.
+ *
+ * Each as_area_t structure describes one contiguous area of virtual memory.
+ * In the future, it should not be difficult to support shared areas.
+ */
+struct as_area {
+    mutex_t lock;
+    as_t *as;       /**< Containing address space. */
+    int flags;      /**< Flags related to the memory represented by the address space area. */
+    int attributes;     /**< Attributes related to the address space area itself. */
+    count_t pages;      /**< Size of this area in multiples of PAGE_SIZE. */
+    __address base;     /**< Base address of this area. */
+    btree_t used_space; /**< Map of used space. */
+    share_info_t *sh_info;  /**< If the address space area has been shared, this pointer will
+                         reference the share info structure. */
+    mem_backend_t *backend; /**< Memory backend backing this address space area. */
+    /** Data to be used by the backend. */
+    mem_backend_data_t backend_data;
+};
+extern as_t *AS_KERNEL;
+extern as_operations_t *as_operations;
+extern spinlock_t inactive_as_with_asid_lock;
+extern link_t inactive_as_with_asid_head;
+extern void as_init(void);
+extern as_t *as_create(int flags);
+extern void as_destroy(as_t *as);
+extern void as_switch(as_t *old, as_t *new);
+extern int as_page_fault(__address page, pf_access_t access, istate_t *istate);
+extern as_area_t *as_area_create(as_t *as, int flags, size_t size, __address base, int attrs,
+    mem_backend_t *backend, mem_backend_data_t *backend_data);
+extern int as_area_destroy(as_t *as, __address address);
+extern int as_area_resize(as_t *as, __address address, size_t size, int flags);
+int as_area_share(as_t *src_as, __address src_base, size_t acc_size,
+          as_t *dst_as, __address dst_base, int dst_flags_mask);
+extern int as_area_get_flags(as_area_t *area);
+extern bool as_area_check_access(as_area_t *area, pf_access_t access);
+extern size_t as_get_size(__address base);
+extern int used_space_insert(as_area_t *a, __address page, count_t count);
+extern int used_space_remove(as_area_t *a, __address page, count_t count);
+/* Interface to be implemented by architectures. */
+#ifndef as_install_arch
+extern void as_install_arch(as_t *as);
+#endif /* !def as_install_arch */
+/* Backend declarations. */
+extern mem_backend_t anon_backend;
+extern mem_backend_t elf_backend;
+extern mem_backend_t phys_backend;
+/* Address space area related syscalls. */
+extern __native sys_as_area_create(__address address, size_t size, int flags);
+extern __native sys_as_area_resize(__address address, size_t size, int flags);
+extern __native sys_as_area_destroy(__address address);
+#endif /* KERNEL */
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/generic/include/mm/buddy.h
 ,0 → 1,78
+/*
+ * Copyright (C) 2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup genericmm
+ * @{
+ */
+/** @file
+ */
+#ifndef __BUDDY_H__
+#define __BUDDY_H__
+#include <arch/types.h>
+#include <typedefs.h>
+#define BUDDY_SYSTEM_INNER_BLOCK    0xff
+/** Buddy system operations to be implemented by each implementation. */
+struct buddy_system_operations {
+    link_t *(* find_buddy)(buddy_system_t *, link_t *);     /**< Return pointer to left-side or right-side buddy for block passed as argument. */
+    link_t *(* bisect)(buddy_system_t *, link_t *);         /**< Bisect the block passed as argument and return pointer to the new right-side buddy. */
+    link_t *(* coalesce)(buddy_system_t *, link_t *, link_t *); /**< Coalesce two buddies into a bigger block. */
+    void (*set_order)(buddy_system_t *, link_t *, __u8);        /**< Set order of block passed as argument. */
+    __u8 (*get_order)(buddy_system_t *, link_t *);          /**< Return order of block passed as argument. */
+    void (*mark_busy)(buddy_system_t *, link_t *);          /**< Mark block as busy. */
+    void (*mark_available)(buddy_system_t *, link_t *);     /**< Mark block as available. */
+    /** Find parent of block that has given order  */
+    link_t *(* find_block)(buddy_system_t *, link_t *, __u8);
+    void (* print_id)(buddy_system_t *, link_t *);
+};
+struct buddy_system {
+    __u8 max_order;             /**< Maximal order of block which can be stored by buddy system. */
+    link_t *order;
+    buddy_system_operations_t *op;
+    void *data;             /**< Pointer to be used by the implementation. */
+};
+extern void buddy_system_create(buddy_system_t *b,
+                __u8 max_order,
+                buddy_system_operations_t *op, void *data);
+extern link_t *buddy_system_alloc(buddy_system_t *b, __u8 i);
+extern bool buddy_system_can_alloc(buddy_system_t *b, __u8 order);
+extern void buddy_system_free(buddy_system_t *b, link_t *block);
+extern void buddy_system_structure_print(buddy_system_t *b, size_t elem_size);
+extern size_t buddy_conf_size(int max_order);
+extern link_t *buddy_system_alloc_block(buddy_system_t *b, link_t *block);
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/generic/include/typedefs.h
 ,0 → 1,101
+/*
+ * Copyright (C) 2001-2004 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup generic
+ * @{
+ */
+/** @file
+ */
+#ifndef __TYPEDEFS_H__
+#define __TYPEDEFS_H__
+#define false 0
+#define true 1
+typedef short bool;
+typedef unsigned long size_t;
+typedef unsigned long count_t;
+typedef unsigned long index_t;
+typedef unsigned long long task_id_t;
+typedef struct cpu_info cpu_info_t;
+typedef struct cpu cpu_t;
+typedef struct cpu_arch cpu_arch_t;
+typedef struct task task_t;
+typedef enum state state_t;
+typedef struct thread thread_t;
+typedef struct context context_t;
+typedef struct fpu_context fpu_context_t;
+typedef struct timeout timeout_t;
+typedef struct runq runq_t;
+typedef struct spinlock spinlock_t;
+typedef struct mutex mutex_t;
+typedef struct semaphore semaphore_t;
+typedef struct rwlock rwlock_t;
+typedef enum rwlock_type rwlock_type_t;
+typedef struct condvar condvar_t;
+typedef struct waitq waitq_t;
+typedef struct futex futex_t;
+typedef struct buddy_system buddy_system_t;
+typedef struct buddy_system_operations buddy_system_operations_t;
+typedef struct as_area as_area_t;
+typedef struct as as_t;
+typedef struct link link_t;
+typedef struct the the_t;
+typedef struct chardev chardev_t;
+typedef enum cmd_arg_type cmd_arg_type_t;
+typedef struct cmd_arg cmd_arg_t;
+typedef struct cmd_info cmd_info_t;
+typedef struct istate istate_t;
+typedef void (* iroutine)(int n, istate_t *istate);
+typedef struct hash_table hash_table_t;
+typedef struct hash_table_operations hash_table_operations_t;
+typedef struct btree_node btree_node_t;
+typedef struct btree btree_t;
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/generic/include/macros.h
 ,0 → 1,63
+/*
+ * Copyright (C) 2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup generic
+ * @{
+ */
+/** @file
+ */
+#ifndef __MACROS_H__
+#define __MACROS_H__
+#define is_digit(d) (((d) >= '0') && ((d)<='9'))
+#define is_lower(c) (((c) >= 'a') && ((c) <= 'z'))
+#define is_upper(c) (((c) >= 'A') && ((c) <= 'Z'))
+#define is_alpha(c) (is_lower(c) || is_upper(c))
+#define is_alphanum(c)  (is_alpha(c) || is_digit(c))
+#define is_white(c) (((c) == ' ') || ((c) == '\t') || ((c) == '\n') || ((c) == '\r'))
+#define min(a,b)    ((a)<(b)?(a):(b))
+#define max(a,b)    ((a)>(b)?(a):(b))
+/** Return true if the interlvals overlap. */
+static inline int overlaps(__address s1, size_t sz1, __address s2, size_t sz2)
+{
+    __address e1 = s1+sz1;
+    __address e2 = s2+sz2;
+    return s1 < e2 && s2 < e1;
+}
+/* Compute overlapping of physical addresses */
+#define PA_overlaps(x,szx,y,szy)  overlaps(KA2PA(x),szx,KA2PA(y), szy)
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/generic/include/context.h
 ,0 → 1,95
+/*
+ * Copyright (C) 2001-2004 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup generic
+ * @{
+ */
+/** @file
+ */
+#ifndef __CONTEXT_H__
+#define __CONTEXT_H__
+#include <arch/types.h>
+#include <typedefs.h>
+#include <arch/context.h>
+#ifndef context_set
+#define context_set(c, _pc, stack, size)    \
+    (c)->pc = (__address) (_pc);        \
+    (c)->sp = ((__address) (stack)) + (size) - SP_DELTA;
+#endif /* context_set */
+extern int context_save_arch(context_t *c);
+extern void context_restore_arch(context_t *c) __attribute__ ((noreturn));
+/** Save register context.
+ *
+ * Save current register context (including stack pointers)
+ * to context structure.
+ *
+ * Note that call to context_restore() will return at the same
+ * address as the corresponding call to context_save().
+ *
+ * This MUST be a macro, gcc -O0 does not inline functions even
+ * if they are marked inline and context_save_arch must be called
+ * from level <= that when context_restore is called.
+ *
+ * @param c Context structure.
+ *
+ * @return context_save() returns 1, context_restore() returns 0.
+ */
+#define context_save(c)   context_save_arch(c)
+/** Restore register context.
+ *
+ * Restore previously saved register context (including stack pointers)
+ * from context structure.
+ *
+ * Note that this function does not normally return.
+ * Instead, it returns at the same address as the
+ * corresponding call to context_save(), the only
+ * difference being return value.
+ *
+ * Note that content of any local variable defined by
+ * the caller of context_save() is undefined after
+ * context_restore().
+ *
+ * @param c Context structure.
+ */
+static inline void context_restore(context_t *c)
+{
+    context_restore_arch(c);
+}
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/generic/include/stdarg.h
 ,0 → 1,55
+/*
+ * Copyright (C) 2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup generic
+ * @{
+ */
+/** @file
+ */
+/*
+ * Variable argument list manipulation macros
+ * for all architectures with compiler support for __builtin_va_*.
+ */
+#ifndef __STDARG_H__
+#define __STDARG_H__
+typedef __builtin_va_list va_list;
+#define va_start(ap, last)      __builtin_va_start(ap, last)
+#define va_arg(ap, type)        __builtin_va_arg(ap, type)
+#define va_end(ap)          __builtin_va_end(ap)
+#define va_copy(dst,src)        __builtin_va_copy(dst,src)
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/generic/include/syscall/copy.h
 ,0 → 1,59
+/*
+ * Copyright (C) 2006 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup generic
+ * @{
+ */
+/** @file
+ */
+#ifndef __COPY_H__
+#define __COPY_H__
+#include <typedefs.h>
+/** Label within memcpy_from_uspace() that contains return -1. */
+extern char memcpy_from_uspace_failover_address;
+/** Label within memcpy_to_uspace() that contains return -1. */
+extern char memcpy_to_uspace_failover_address;
+extern int copy_from_uspace(void *dst, const void *uspace_src, size_t size);
+extern int copy_to_uspace(void *dst_uspace, const void *src, size_t size);
+/*
+ * This interface must be implemented by each architecture.
+ */
+extern int memcpy_from_uspace(void *dst, const void *uspace_src, size_t size);
+extern int memcpy_to_uspace(void *uspace_dst, const void *src, size_t size);
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/generic/include/syscall/syscall.h
 ,0 → 1,90
+/*
+ * Copyright (C) 2005 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup generic
+ * @{
+ */
+/** @file
+ */
+#ifndef __SYSCALL_H__
+#define __SYSCALL_H__
+typedef enum {
+    SYS_IO = 0,
+    SYS_TLS_SET = 1, /* Hardcoded in AMD64, IA32 uspace - psthread.S */
+    SYS_THREAD_CREATE,
+    SYS_THREAD_EXIT,
+    SYS_TASK_GET_ID,
+    SYS_FUTEX_SLEEP,
+    SYS_FUTEX_WAKEUP,
+    SYS_AS_AREA_CREATE,
+    SYS_AS_AREA_RESIZE,
+    SYS_AS_AREA_DESTROY,
+    SYS_IPC_CALL_SYNC_FAST,
+    SYS_IPC_CALL_SYNC,
+    SYS_IPC_CALL_ASYNC_FAST,
+    SYS_IPC_CALL_ASYNC,
+    SYS_IPC_ANSWER_FAST,
+    SYS_IPC_ANSWER,
+    SYS_IPC_FORWARD_FAST,
+    SYS_IPC_WAIT,
+    SYS_IPC_HANGUP,
+    SYS_IPC_REGISTER_IRQ,
+    SYS_IPC_UNREGISTER_IRQ,
+    SYS_CAP_GRANT,
+    SYS_CAP_REVOKE,
+    SYS_MAP_PHYSMEM,
+    SYS_IOSPACE_ENABLE,
+    SYS_PREEMPT_CONTROL,
+    SYS_SYSINFO_VALID,
+    SYS_SYSINFO_VALUE,
+    SYS_DEBUG_ENABLE_CONSOLE,
+    SYSCALL_END
+} syscall_t;
+#ifdef KERNEL
+#include <arch/types.h>
+#include <typedefs.h>
+typedef __native (*syshandler_t)();
+extern syshandler_t syscall_table[SYSCALL_END];
+extern __native syscall_handler(__native a1, __native a2, __native a3,
+                __native a4, __native id);
+extern __native sys_tls_set(__native addr);
+#endif
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/generic/include/syscall/sysarg64.h
 ,0 → 1,49
+/*
+ * Copyright (C) 2006 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup generic
+ * @{
+ */
+/**
+ * @file
+ * @brief   Wrapper for explicit 64-bit arguments passed to syscalls.
+ */
+#ifndef __SYSARG64_H__
+#define __SYSARG64_H__
+typedef struct {
+    unsigned long long value;
+} sysarg64_t;
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/generic/include/errno.h
 ,0 → 1,61
+/*
+ * Copyright (C) 2005 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup generic
+ * @{
+ */
+/** @file
+ */
+#ifndef __ERRNO_H__
+#define __ERRNO_H__
+/* 1-255 are kernel error codes, 256-512 are user error codes */
+#define ENOENT      -1  /* No such entry */
+#define ENOMEM      -2  /* Not enough memory */
+#define ELIMIT      -3  /* Limit exceeded */
+#define EREFUSED    -4  /* Connection refused */
+#define EFORWARD    -5  /* Forward error */
+#define EPERM       -6  /* Permission denied */
+#define EHANGUP     -7  /* Answerbox closed connection, call sys_ipc_hangup
+                 * to close the connection. Used by answerbox
+                 * to close the connection.  */
+#define EEXISTS     -8  /* Entry already exists */
+#define EBADMEM     -9  /* Bad memory pointer */
+#define ENOTSUP     -10 /* Not supported */
+#define EADDRNOTAVAIL   -11 /* Address not available. */
+#define ETIMEOUT        -12     /* Timeout expired */
+#define EINVAL          -13     /* Invalid value */
+#define EBUSY           -14     /* Resource is busy */
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/generic/include/sort.h
 ,0 → 1,58
+/*
+ * Copyright (C) 2005 Sergey Bondari
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup generic
+ * @{
+ */
+/** @file
+ */
+#ifndef __SORT_H__
+#define __SORT_H__
+#include <arch/types.h>
+/*
+ * sorting routines
+ */
+extern void bubblesort(void * data, count_t n, size_t e_size, int (* cmp) (void * a, void * b));
+extern void qsort(void * data, count_t n, size_t e_size, int (* cmp) (void * a, void * b));
+/*
+ * default sorting comparators
+ */
+extern int int_cmp(void * a, void * b);
+extern int __u32_cmp(void * a, void * b);
+extern int __u16_cmp(void * a, void * b);
+extern int __u8_cmp(void * a, void * b);
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/generic/src/sysinfo/sysinfo.c
 ,0 → 1,311
+/*
+ * Copyright (C) 2006 Jakub Vana
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup generic
+ * @{
+ */
+/** @file
+ */
+#include <sysinfo/sysinfo.h>
+#include <mm/slab.h>
+#include <print.h>
+#include <syscall/copy.h>
+sysinfo_item_t *_root = NULL;
+static sysinfo_item_t *sysinfo_find_item(const char *name, sysinfo_item_t *subtree)
+{
+    if (subtree == NULL)
+        return NULL;
+    while (subtree != NULL) {
+        int i = 0;
+        char *a = (char *) name;
+        char *b = subtree->name;
+        while ((a[i] == b[i]) && (b[i]))
+            i++;
+        if ((!a[i]) && (!b[i]))  /* Last name in path matches */
+            return subtree;
+        if ((a[i] == '.') && (!b[i])) { /* Middle name in path matches */
+            if (subtree->subinfo_type == SYSINFO_SUBINFO_TABLE)
+                return sysinfo_find_item(a + i + 1, subtree->subinfo.table);
+            //if (subtree->subinfo_type == SYSINFO_SUBINFO_FUNCTION) /* Subinfo managed by subsystem */
+            //  return NULL;
+            return NULL; /* No subinfo */
+        }
+        /* No matches try next */
+        subtree = subtree->next;
+        i = 0;
+    }
+    return NULL;
+}
+static sysinfo_item_t *sysinfo_create_path(const char *name, sysinfo_item_t **psubtree)
+{
+    sysinfo_item_t *subtree;
+    subtree = *psubtree;
+    if (subtree == NULL) {
+            sysinfo_item_t *item = malloc(sizeof(sysinfo_item_t), 0);
+            int i = 0, j;
+            ASSERT(item);
+            *psubtree = item;
+            item->next = NULL;
+            item->val_type = SYSINFO_VAL_UNDEFINED;
+            item->subinfo.table = NULL;
+            while (name[i] && (name[i] != '.'))
+                i++;
+            item->name = malloc(i, 0);
+            ASSERT(item->name);
+            for (j = 0; j < i; j++)
+                item->name[j] = name[j];
+            item->name[j] = 0;
+            if (name[i]) { /* =='.' */
+                item->subinfo_type = SYSINFO_SUBINFO_TABLE;
+                return sysinfo_create_path(name + i + 1, &(item->subinfo.table));
+            }
+            item->subinfo_type = SYSINFO_SUBINFO_NONE;
+            return item;
+    }
+    while (subtree != NULL) {
+        int i = 0, j;
+        char *a = (char *) name;
+        char *b = subtree->name;
+        while ((a[i] == b[i]) && (b[i]))
+            i++;
+        if ((!a[i]) && (!b[i])) /* Last name in path matches */
+            return subtree;
+        if ((a[i] == '.') && (!b[i])) { /* Middle name in path matches */
+            if (subtree->subinfo_type == SYSINFO_SUBINFO_TABLE)
+                return sysinfo_create_path(a + i + 1, &(subtree->subinfo.table));
+            if (subtree->subinfo_type == SYSINFO_SUBINFO_NONE) {
+                subtree->subinfo_type = SYSINFO_SUBINFO_TABLE;
+                return sysinfo_create_path(a + i + 1,&(subtree->subinfo.table));
+            }
+            //if (subtree->subinfo_type == SYSINFO_SUBINFO_FUNCTION) /* Subinfo managed by subsystem */
+            //  return NULL;
+            return NULL;
+        }
+        /* No matches try next or create new*/
+        if (subtree->next == NULL) {
+            sysinfo_item_t *item = malloc(sizeof(sysinfo_item_t), 0);
+            ASSERT(item);
+            subtree->next = item;
+            item->next = NULL;
+            item->val_type = SYSINFO_VAL_UNDEFINED;
+            item->subinfo.table = NULL;
+            i = 0;
+            while (name[i] && (name[i] != '.'))
+                i++;
+            item->name = malloc(i, 0);
+            ASSERT(item->name);
+            for (j = 0; j < i; j++)
+                item->name[j] = name[j];
+            item->name[j] = 0;
+            if(name[i]) { /* =='.' */
+                item->subinfo_type = SYSINFO_SUBINFO_TABLE;
+                return sysinfo_create_path(name + i + 1, &(item->subinfo.table));
+            }
+            item->subinfo_type = SYSINFO_SUBINFO_NONE;
+            return item;
+        } else {
+            subtree = subtree->next;
+            i = 0;
+        }
+    }
+    panic("Not reached\n");
+    return NULL;
+}
+void sysinfo_set_item_val(const char *name, sysinfo_item_t **root, __native val)
+{
+    if (root == NULL)
+        root = &_root;
+    /* If already created create only returns pointer
+       If not, create it */
+    sysinfo_item_t *item = sysinfo_create_path(name, root);
+    if (item != NULL) { /* If in subsystem, unable to create or return so unable to set */
+        item->val.val=val;
+        item->val_type = SYSINFO_VAL_VAL;
+    }
+}
+void sysinfo_set_item_function(const char *name, sysinfo_item_t **root, sysinfo_val_fn_t fn)
+{
+    if (root == NULL)
+        root = &_root;
+    /* If already created create only returns pointer
+       If not, create it */
+    sysinfo_item_t *item = sysinfo_create_path(name, root);
+    if (item != NULL) { /* If in subsystem, unable to create or return so  unable to set */
+        item->val.fn=fn;
+        item->val_type = SYSINFO_VAL_FUNCTION;
+    }
+}
+void sysinfo_set_item_undefined(const char *name, sysinfo_item_t **root)
+{
+    if (root == NULL)
+        root = &_root;
+    /* If already created create only returns pointer
+       If not, create it */
+    sysinfo_item_t *item = sysinfo_create_path(name, root);
+    if (item != NULL)
+        item->val_type = SYSINFO_VAL_UNDEFINED;
+}
+void sysinfo_dump(sysinfo_item_t **proot, int depth)
+{
+    sysinfo_item_t *root;
+    if (proot == NULL)
+        proot = &_root;
+    root = *proot;
+    while (root != NULL) {
+        int i;
+        __native val = 0;
+        char *vtype = NULL;
+        for (i = 0; i < depth; i++)
+            printf("  ");
+        switch (root->val_type) {
+            case SYSINFO_VAL_UNDEFINED:
+                val = 0;
+                vtype = "UND";
+                break;
+            case SYSINFO_VAL_VAL:
+                val = root->val.val;
+                vtype = "VAL";
+                break;
+            case SYSINFO_VAL_FUNCTION:
+                val = ((sysinfo_val_fn_t) (root->val.fn)) (root);
+                vtype = "FUN";
+                break;
+        }
+        printf("%s    %s val:%d(%x) sub:%s\n", root->name, vtype, val, val, (root->subinfo_type == SYSINFO_SUBINFO_NONE) ? "NON" : ((root->subinfo_type == SYSINFO_SUBINFO_TABLE) ? "TAB" : "FUN"));
+        if (root->subinfo_type == SYSINFO_SUBINFO_TABLE)
+            sysinfo_dump(&(root -> subinfo.table), depth + 1);
+        root = root->next;
+    }
+}
+sysinfo_rettype_t sysinfo_get_val(const char *name, sysinfo_item_t **root)
+{
+    // TODO: Implement Subsystem subinfo (by function implemented subinfo)
+    sysinfo_rettype_t ret = {0, false};
+    if (root == NULL)
+        root = &_root;
+    sysinfo_item_t *item = sysinfo_find_item(name, *root);
+    if (item != NULL) {
+        if (item->val_type == SYSINFO_VAL_UNDEFINED)
+            return ret;
+        else
+            ret.valid = true;
+        if (item->val_type == SYSINFO_VAL_VAL)
+            ret.val = item->val.val;
+        else
+            ret.val = ((sysinfo_val_fn_t) (item->val.fn)) (item);
+    }
+    return ret;
+}
+__native sys_sysinfo_valid(__native ptr, __native len)
+{
+    char *str;
+    sysinfo_rettype_t ret = {0, 0};
+    str = malloc(len + 1, 0);
+    ASSERT(str);
+    if (!((copy_from_uspace(str, (void *) ptr, len + 1)) || (str[len])))
+        ret = sysinfo_get_val(str, NULL);
+    free(str);
+    return ret.valid;
+}
+__native sys_sysinfo_value(__native ptr, __native len)
+{
+    char *str;
+    sysinfo_rettype_t ret = {0, 0};
+    str = malloc(len + 1, 0);
+    ASSERT(str);
+    if (!((copy_from_uspace(str, (void *) ptr, len + 1)) || (str[len])))
+        ret = sysinfo_get_val(str, NULL);
+    free(str);
+    return ret.val;
+}
+ /** @}
+ */

 /tags/0.2.0.2/kernel/generic/src/console/cmd.c
 ,0 → 1,811
+/*
+ * Copyright (C) 2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup genericconsole
+ * @{
+ */
+/**
+ * @file    cmd.c
+ * @brief   Kernel console command wrappers.
+ *
+ * This file is meant to contain all wrapper functions for
+ * all kconsole commands. The point is in separating
+ * kconsole specific wrappers from kconsole-unaware functions
+ * from other subsystems.
+ */
+#include <console/cmd.h>
+#include <console/console.h>
+#include <console/kconsole.h>
+#include <print.h>
+#include <panic.h>
+#include <typedefs.h>
+#include <arch/types.h>
+#include <adt/list.h>
+#include <arch.h>
+#include <func.h>
+#include <macros.h>
+#include <debug.h>
+#include <symtab.h>
+#include <cpu.h>
+#include <mm/tlb.h>
+#include <arch/mm/tlb.h>
+#include <mm/frame.h>
+#include <main/version.h>
+#include <mm/slab.h>
+#include <proc/scheduler.h>
+#include <proc/thread.h>
+#include <proc/task.h>
+#include <ipc/ipc.h>
+#include <ipc/irq.h>
+/* Data and methods for 'help' command. */
+static int cmd_help(cmd_arg_t *argv);
+static cmd_info_t help_info = {
+    .name = "help",
+    .description = "List of supported commands.",
+    .func = cmd_help,
+    .argc = 0
+};
+static cmd_info_t exit_info = {
+    .name = "exit",
+    .description ="Exit kconsole",
+    .argc = 0
+};
+static int cmd_continue(cmd_arg_t *argv);
+static cmd_info_t continue_info = {
+    .name = "continue",
+    .description ="Return console back to userspace.",
+    .func = cmd_continue,
+    .argc = 0
+};
+/* Data and methods for 'description' command. */
+static int cmd_desc(cmd_arg_t *argv);
+static void desc_help(void);
+static char desc_buf[MAX_CMDLINE+1];
+static cmd_arg_t desc_argv = {
+    .type = ARG_TYPE_STRING,
+    .buffer = desc_buf,
+    .len = sizeof(desc_buf)
+};
+static cmd_info_t desc_info = {
+    .name = "describe",
+    .description = "Describe specified command.",
+    .help = desc_help,
+    .func = cmd_desc,
+    .argc = 1,
+    .argv = &desc_argv
+};
+/* Data and methods for 'symaddr' command. */
+static int cmd_symaddr(cmd_arg_t *argv);
+static char symaddr_buf[MAX_CMDLINE+1];
+static cmd_arg_t symaddr_argv = {
+    .type = ARG_TYPE_STRING,
+    .buffer = symaddr_buf,
+    .len = sizeof(symaddr_buf)
+};
+static cmd_info_t symaddr_info = {
+    .name = "symaddr",
+    .description = "Return symbol address.",
+    .func = cmd_symaddr,
+    .argc = 1,
+    .argv = &symaddr_argv
+};
+static char set_buf[MAX_CMDLINE+1];
+static int cmd_set4(cmd_arg_t *argv);
+static cmd_arg_t set4_argv[] = {
+    {
+        .type = ARG_TYPE_STRING,
+        .buffer = set_buf,
+        .len = sizeof(set_buf)
+    },
+    {
+        .type = ARG_TYPE_INT
+    }
+};
+static cmd_info_t set4_info = {
+    .name = "set4",
+    .description = "set <dest_addr> <value> - 4byte version",
+    .func = cmd_set4,
+    .argc = 2,
+    .argv = set4_argv
+};
+/* Data and methods for 'call0' command. */
+static char call0_buf[MAX_CMDLINE+1];
+static char carg1_buf[MAX_CMDLINE+1];
+static char carg2_buf[MAX_CMDLINE+1];
+static char carg3_buf[MAX_CMDLINE+1];
+static int cmd_call0(cmd_arg_t *argv);
+static cmd_arg_t call0_argv = {
+    .type = ARG_TYPE_STRING,
+    .buffer = call0_buf,
+    .len = sizeof(call0_buf)
+};
+static cmd_info_t call0_info = {
+    .name = "call0",
+    .description = "call0 <function> -> call function().",
+    .func = cmd_call0,
+    .argc = 1,
+    .argv = &call0_argv
+};
+/* Data and methods for 'call1' command. */
+static int cmd_call1(cmd_arg_t *argv);
+static cmd_arg_t call1_argv[] = {
+    {
+        .type = ARG_TYPE_STRING,
+        .buffer = call0_buf,
+        .len = sizeof(call0_buf)
+    },
+    {
+        .type = ARG_TYPE_VAR,
+        .buffer = carg1_buf,
+        .len = sizeof(carg1_buf)
+    }
+};
+static cmd_info_t call1_info = {
+    .name = "call1",
+    .description = "call1 <function> <arg1> -> call function(arg1).",
+    .func = cmd_call1,
+    .argc = 2,
+    .argv = call1_argv
+};
+/* Data and methods for 'call2' command. */
+static int cmd_call2(cmd_arg_t *argv);
+static cmd_arg_t call2_argv[] = {
+    {
+        .type = ARG_TYPE_STRING,
+        .buffer = call0_buf,
+        .len = sizeof(call0_buf)
+    },
+    {
+        .type = ARG_TYPE_VAR,
+        .buffer = carg1_buf,
+        .len = sizeof(carg1_buf)
+    },
+    {
+        .type = ARG_TYPE_VAR,
+        .buffer = carg2_buf,
+        .len = sizeof(carg2_buf)
+    }
+};
+static cmd_info_t call2_info = {
+    .name = "call2",
+    .description = "call2 <function> <arg1> <arg2> -> call function(arg1,arg2).",
+    .func = cmd_call2,
+    .argc = 3,
+    .argv = call2_argv
+};
+/* Data and methods for 'call3' command. */
+static int cmd_call3(cmd_arg_t *argv);
+static cmd_arg_t call3_argv[] = {
+    {
+        .type = ARG_TYPE_STRING,
+        .buffer = call0_buf,
+        .len = sizeof(call0_buf)
+    },
+    {
+        .type = ARG_TYPE_VAR,
+        .buffer = carg1_buf,
+        .len = sizeof(carg1_buf)
+    },
+    {
+        .type = ARG_TYPE_VAR,
+        .buffer = carg2_buf,
+        .len = sizeof(carg2_buf)
+    },
+    {
+        .type = ARG_TYPE_VAR,
+        .buffer = carg3_buf,
+        .len = sizeof(carg3_buf)
+    }
+};
+static cmd_info_t call3_info = {
+    .name = "call3",
+    .description = "call3 <function> <arg1> <arg2> <arg3> -> call function(arg1,arg2,arg3).",
+    .func = cmd_call3,
+    .argc = 4,
+    .argv = call3_argv
+};
+/* Data and methods for 'halt' command. */
+static int cmd_halt(cmd_arg_t *argv);
+static cmd_info_t halt_info = {
+    .name = "halt",
+    .description = "Halt the kernel.",
+    .func = cmd_halt,
+    .argc = 0
+};
+/* Data and methods for 'tlb' command. */
+static int cmd_tlb(cmd_arg_t *argv);
+cmd_info_t tlb_info = {
+    .name = "tlb",
+    .description = "Print TLB of current processor.",
+    .help = NULL,
+    .func = cmd_tlb,
+    .argc = 0,
+    .argv = NULL
+};
+static int cmd_threads(cmd_arg_t *argv);
+static cmd_info_t threads_info = {
+    .name = "threads",
+    .description = "List all threads.",
+    .func = cmd_threads,
+    .argc = 0
+};
+static int cmd_tasks(cmd_arg_t *argv);
+static cmd_info_t tasks_info = {
+    .name = "tasks",
+    .description = "List all tasks.",
+    .func = cmd_tasks,
+    .argc = 0
+};
+static int cmd_sched(cmd_arg_t *argv);
+static cmd_info_t sched_info = {
+    .name = "scheduler",
+    .description = "List all scheduler information.",
+    .func = cmd_sched,
+    .argc = 0
+};
+static int cmd_slabs(cmd_arg_t *argv);
+static cmd_info_t slabs_info = {
+    .name = "slabs",
+    .description = "List slab caches.",
+    .func = cmd_slabs,
+    .argc = 0
+};
+/* Data and methods for 'zones' command */
+static int cmd_zones(cmd_arg_t *argv);
+static cmd_info_t zones_info = {
+    .name = "zones",
+    .description = "List of memory zones.",
+    .func = cmd_zones,
+    .argc = 0
+};
+/* Data and methods for 'ipc_task' command */
+static int cmd_ipc_task(cmd_arg_t *argv);
+static cmd_arg_t ipc_task_argv = {
+    .type = ARG_TYPE_INT,
+};
+static cmd_info_t ipc_task_info = {
+    .name = "ipc_task",
+    .description = "ipc_task <taskid> Show IPC information of given task.",
+    .func = cmd_ipc_task,
+    .argc = 1,
+    .argv = &ipc_task_argv
+};
+/* Data and methods for 'zone' command */
+static int cmd_zone(cmd_arg_t *argv);
+static cmd_arg_t zone_argv = {
+    .type = ARG_TYPE_INT,
+};
+static cmd_info_t zone_info = {
+    .name = "zone",
+    .description = "Show memory zone structure.",
+    .func = cmd_zone,
+    .argc = 1,
+    .argv = &zone_argv
+};
+/* Data and methods for 'cpus' command. */
+static int cmd_cpus(cmd_arg_t *argv);
+cmd_info_t cpus_info = {
+    .name = "cpus",
+    .description = "List all processors.",
+    .help = NULL,
+    .func = cmd_cpus,
+    .argc = 0,
+    .argv = NULL
+};
+/* Data and methods for 'version' command. */
+static int cmd_version(cmd_arg_t *argv);
+cmd_info_t version_info = {
+    .name = "version",
+    .description = "Print version information.",
+    .help = NULL,
+    .func = cmd_version,
+    .argc = 0,
+    .argv = NULL
+};
+static cmd_info_t *basic_commands[] = {
+    &call0_info,
+    &call1_info,
+    &call2_info,
+    &call3_info,
+    &continue_info,
+    &cpus_info,
+    &desc_info,
+    &exit_info,
+    &halt_info,
+    &help_info,
+    &ipc_task_info,
+    &set4_info,
+    &slabs_info,
+    &symaddr_info,
+    &sched_info,
+    &threads_info,
+    &tasks_info,
+    &tlb_info,
+    &version_info,
+    &zones_info,
+    &zone_info,
+    NULL
+};
+/** Initialize command info structure.
+ *
+ * @param cmd Command info structure.
+ *
+ */
+void cmd_initialize(cmd_info_t *cmd)
+{
+    spinlock_initialize(&cmd->lock, "cmd");
+    link_initialize(&cmd->link);
+}
+/** Initialize and register commands. */
+void cmd_init(void)
+{
+    int i;
+    for (i=0;basic_commands[i]; i++) {
+        cmd_initialize(basic_commands[i]);
+        if (!cmd_register(basic_commands[i]))
+            panic("could not register command %s\n",
+                  basic_commands[i]->name);
+    }
+}
+/** List supported commands.
+ *
+ * @param argv Argument vector.
+ *
+ * @return 0 on failure, 1 on success.
+ */
+int cmd_help(cmd_arg_t *argv)
+{
+    link_t *cur;
+    spinlock_lock(&cmd_lock);
+    for (cur = cmd_head.next; cur != &cmd_head; cur = cur->next) {
+        cmd_info_t *hlp;
+        hlp = list_get_instance(cur, cmd_info_t, link);
+        spinlock_lock(&hlp->lock);
+        printf("%s - %s\n", hlp->name, hlp->description);
+        spinlock_unlock(&hlp->lock);
+    }
+    spinlock_unlock(&cmd_lock);
+    return 1;
+}
+/** Describe specified command.
+ *
+ * @param argv Argument vector.
+ *
+ * @return 0 on failure, 1 on success.
+ */
+int cmd_desc(cmd_arg_t *argv)
+{
+    link_t *cur;
+    spinlock_lock(&cmd_lock);
+    for (cur = cmd_head.next; cur != &cmd_head; cur = cur->next) {
+        cmd_info_t *hlp;
+        hlp = list_get_instance(cur, cmd_info_t, link);
+        spinlock_lock(&hlp->lock);
+        if (strncmp(hlp->name, (const char *) argv->buffer, strlen(hlp->name)) == 0) {
+            printf("%s - %s\n", hlp->name, hlp->description);
+            if (hlp->help)
+                hlp->help();
+            spinlock_unlock(&hlp->lock);
+            break;
+        }
+        spinlock_unlock(&hlp->lock);
+    }
+    spinlock_unlock(&cmd_lock);
+    return 1;
+}
+/** Search symbol table */
+int cmd_symaddr(cmd_arg_t *argv)
+{
+    symtab_print_search(argv->buffer);
+    return 1;
+}
+/** Call function with zero parameters */
+int cmd_call0(cmd_arg_t *argv)
+{
+    __address symaddr;
+    char *symbol;
+    __native (*f)(void);
+#ifdef ia64
+    struct {
+        __native f;
+        __native gp;
+    }fptr;
+#endif
+    symaddr = get_symbol_addr(argv->buffer);
+    if (!symaddr)
+        printf("Symbol %s not found.\n", argv->buffer);
+    else if (symaddr == (__address) -1) {
+        symtab_print_search(argv->buffer);
+        printf("Duplicate symbol, be more specific.\n");
+    } else {
+        symbol = get_symtab_entry(symaddr);
+        printf("Calling f(): %.*p: %s\n", sizeof(__address) * 2, symaddr, symbol);
+#ifdef ia64
+        fptr.f = symaddr;
+        fptr.gp = ((__native *)cmd_call2)[1];
+        f =  (__native (*)(void)) &fptr;
+#else
+        f =  (__native (*)(void)) symaddr;
+#endif
+        printf("Result: %#zx\n", f());
+    }
+    return 1;
+}
+/** Call function with one parameter */
+int cmd_call1(cmd_arg_t *argv)
+{
+    __address symaddr;
+    char *symbol;
+    __native (*f)(__native,...);
+    __native arg1 = argv[1].intval;
+#ifdef ia64
+    struct {
+        __native f;
+        __native gp;
+    }fptr;
+#endif
+    symaddr = get_symbol_addr(argv->buffer);
+    if (!symaddr)
+        printf("Symbol %s not found.\n", argv->buffer);
+    else if (symaddr == (__address) -1) {
+        symtab_print_search(argv->buffer);
+        printf("Duplicate symbol, be more specific.\n");
+    } else {
+        symbol = get_symtab_entry(symaddr);
+        printf("Calling f(%#zx): %.*p: %s\n", arg1, sizeof(__address) * 2, symaddr, symbol);
+#ifdef ia64
+        fptr.f = symaddr;
+        fptr.gp = ((__native *)cmd_call2)[1];
+        f =  (__native (*)(__native,...)) &fptr;
+#else
+        f =  (__native (*)(__native,...)) symaddr;
+#endif
+        printf("Result: %#zx\n", f(arg1));
+    }
+    return 1;
+}
+/** Call function with two parameters */
+int cmd_call2(cmd_arg_t *argv)
+{
+    __address symaddr;
+    char *symbol;
+    __native (*f)(__native,__native,...);
+    __native arg1 = argv[1].intval;
+    __native arg2 = argv[2].intval;
+#ifdef ia64
+    struct {
+        __native f;
+        __native gp;
+    }fptr;
+#endif
+    symaddr = get_symbol_addr(argv->buffer);
+    if (!symaddr)
+        printf("Symbol %s not found.\n", argv->buffer);
+    else if (symaddr == (__address) -1) {
+        symtab_print_search(argv->buffer);
+        printf("Duplicate symbol, be more specific.\n");
+    } else {
+        symbol = get_symtab_entry(symaddr);
+        printf("Calling f(0x%zx,0x%zx): %.*p: %s\n",
+               arg1, arg2, sizeof(__address) * 2, symaddr, symbol);
+#ifdef ia64
+        fptr.f = symaddr;
+        fptr.gp = ((__native *)cmd_call2)[1];
+        f =  (__native (*)(__native,__native,...)) &fptr;
+#else
+        f =  (__native (*)(__native,__native,...)) symaddr;
+#endif
+        printf("Result: %#zx\n", f(arg1, arg2));
+    }
+    return 1;
+}
+/** Call function with three parameters */
+int cmd_call3(cmd_arg_t *argv)
+{
+    __address symaddr;
+    char *symbol;
+    __native (*f)(__native,__native,__native,...);
+    __native arg1 = argv[1].intval;
+    __native arg2 = argv[2].intval;
+    __native arg3 = argv[3].intval;
+#ifdef ia64
+    struct {
+        __native f;
+        __native gp;
+    }fptr;
+#endif
+    symaddr = get_symbol_addr(argv->buffer);
+    if (!symaddr)
+        printf("Symbol %s not found.\n", argv->buffer);
+    else if (symaddr == (__address) -1) {
+        symtab_print_search(argv->buffer);
+        printf("Duplicate symbol, be more specific.\n");
+    } else {
+        symbol = get_symtab_entry(symaddr);
+        printf("Calling f(0x%zx,0x%zx, 0x%zx): %.*p: %s\n",
+               arg1, arg2, arg3, sizeof(__address) * 2, symaddr, symbol);
+#ifdef ia64
+        fptr.f = symaddr;
+        fptr.gp = ((__native *)cmd_call2)[1];
+        f =  (__native (*)(__native,__native,__native,...)) &fptr;
+#else
+        f =  (__native (*)(__native,__native,__native,...)) symaddr;
+#endif
+        printf("Result: %#zx\n", f(arg1, arg2, arg3));
+    }
+    return 1;
+}
+/** Print detailed description of 'describe' command. */
+void desc_help(void)
+{
+    printf("Syntax: describe command_name\n");
+}
+/** Halt the kernel.
+ *
+ * @param argv Argument vector (ignored).
+ *
+ * @return 0 on failure, 1 on success (never returns).
+ */
+int cmd_halt(cmd_arg_t *argv)
+{
+    halt();
+    return 1;
+}
+/** Command for printing TLB contents.
+ *
+ * @param argv Not used.
+ *
+ * @return Always returns 1.
+ */
+int cmd_tlb(cmd_arg_t *argv)
+{
+    tlb_print();
+    return 1;
+}
+/** Write 4 byte value to address */
+int cmd_set4(cmd_arg_t *argv)
+{
+    __u32 *addr ;
+    __u32 arg1 = argv[1].intval;
+    bool pointer = false;
+    if (((char *)argv->buffer)[0] == '*') {
+        addr = (__u32 *) get_symbol_addr(argv->buffer+1);
+        pointer = true;
+    } else if (((char *)argv->buffer)[0] >= '0' &&
+           ((char *)argv->buffer)[0] <= '9')
+        addr = (__u32 *)atoi((char *)argv->buffer);
+    else
+        addr = (__u32 *)get_symbol_addr(argv->buffer);
+    if (!addr)
+        printf("Symbol %s not found.\n", argv->buffer);
+    else if (addr == (__u32 *) -1) {
+        symtab_print_search(argv->buffer);
+        printf("Duplicate symbol, be more specific.\n");
+    } else {
+        if (pointer)
+            addr = (__u32 *)(*(__native *)addr);
+        printf("Writing 0x%x -> %.*p\n", arg1, sizeof(__address) * 2, addr);
+        *addr = arg1;
+    }
+    return 1;
+}
+/** Command for listings SLAB caches
+ *
+ * @param argv Ignores
+ *
+ * @return Always 1
+ */
+int cmd_slabs(cmd_arg_t * argv) {
+    slab_print_list();
+    return 1;
+}
+/** Command for listings Thread information
+ *
+ * @param argv Ignores
+ *
+ * @return Always 1
+ */
+int cmd_threads(cmd_arg_t * argv) {
+    thread_print_list();
+    return 1;
+}
+/** Command for listings Task information
+ *
+ * @param argv Ignores
+ *
+ * @return Always 1
+ */
+int cmd_tasks(cmd_arg_t * argv) {
+    task_print_list();
+    return 1;
+}
+/** Command for listings Thread information
+ *
+ * @param argv Ignores
+ *
+ * @return Always 1
+ */
+int cmd_sched(cmd_arg_t * argv) {
+    sched_print_list();
+    return 1;
+}
+/** Command for listing memory zones
+ *
+ * @param argv Ignored
+ *
+ * return Always 1
+ */
+int cmd_zones(cmd_arg_t * argv) {
+    zone_print_list();
+    return 1;
+}
+/** Command for memory zone details
+ *
+ * @param argv Integer argument from cmdline expected
+ *
+ * return Always 1
+ */
+int cmd_zone(cmd_arg_t * argv) {
+    zone_print_one(argv[0].intval);
+    return 1;
+}
+/** Command for printing task ipc details
+ *
+ * @param argv Integer argument from cmdline expected
+ *
+ * return Always 1
+ */
+int cmd_ipc_task(cmd_arg_t * argv) {
+    ipc_print_task(argv[0].intval);
+    return 1;
+}
+/** Command for listing processors.
+ *
+ * @param argv Ignored.
+ *
+ * return Always 1.
+ */
+int cmd_cpus(cmd_arg_t *argv)
+{
+    cpu_list();
+    return 1;
+}
+/** Command for printing kernel version.
+ *
+ * @param argv Ignored.
+ *
+ * return Always 1.
+ */
+int cmd_version(cmd_arg_t *argv)
+{
+    version_print();
+    return 1;
+}
+/** Command for returning console back to userspace.
+ *
+ * @param argv Ignored.
+ *
+ * return Always 1.
+ */
+int cmd_continue(cmd_arg_t *argv)
+{
+    printf("The kernel will now relinquish the console.\n");
+    printf("Use userspace controls to redraw the screen.\n");
+    arch_release_console();
+    ipc_irq_send_msg(IPC_IRQ_KBDRESTART, 0, 0, 0);
+    return 1;
+}
+ /** @}
+ */

 /tags/0.2.0.2/kernel/generic/src/console/console.c
 ,0 → 1,170
+/*
+ * Copyright (C) 2003 Josef Cejka
+ * Copyright (C) 2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup genericconsole
+ * @{
+ */
+/** @file
+ */
+#include <console/console.h>
+#include <console/chardev.h>
+#include <synch/waitq.h>
+#include <synch/spinlock.h>
+#include <arch/types.h>
+#include <typedefs.h>
+#include <arch.h>
+#include <func.h>
+#include <print.h>
+#include <atomic.h>
+#define BUFLEN 2048
+static char debug_buffer[BUFLEN];
+static size_t offset = 0;
+/** Initialize stdout to something that does not print, but does not fail
+ *
+ * Save data in some buffer so that it could be retrieved in the debugger
+ */
+static void null_putchar(chardev_t *d, const char ch)
+{
+    if (offset >= BUFLEN)
+        offset = 0;
+    debug_buffer[offset++] = ch;
+}
+static chardev_operations_t null_stdout_ops = {
+    .write = null_putchar
+};
+chardev_t null_stdout = {
+    .name = "null",
+    .op = &null_stdout_ops
+};
+/** Standard input character device. */
+chardev_t *stdin = NULL;
+chardev_t *stdout = &null_stdout;
+/** Get character from character device. Do not echo character.
+ *
+ * @param chardev Character device.
+ *
+ * @return Character read.
+ */
+__u8 _getc(chardev_t *chardev)
+{
+    __u8 ch;
+    ipl_t ipl;
+    if (atomic_get(&haltstate)) {
+        /* If we are here, we are hopefully on the processor, that
+         * issued the 'halt' command, so proceed to read the character
+         * directly from input
+         */
+        if (chardev->op->read)
+            return chardev->op->read(chardev);
+        /* no other way of interacting with user, halt */
+        if (CPU)
+            printf("cpu%d: ", CPU->id);
+        else
+            printf("cpu: ");
+        printf("halted - no kconsole\n");
+        cpu_halt();
+    }
+    waitq_sleep(&chardev->wq);
+    ipl = interrupts_disable();
+    spinlock_lock(&chardev->lock);
+    ch = chardev->buffer[(chardev->index - chardev->counter) % CHARDEV_BUFLEN];
+    chardev->counter--;
+    spinlock_unlock(&chardev->lock);
+    interrupts_restore(ipl);
+    chardev->op->resume(chardev);
+    return ch;
+}
+/** Get string from character device.
+ *
+ * Read characters from character device until first occurrence
+ * of newline character.
+ *
+ * @param chardev Character device.
+ * @param buf Buffer where to store string terminated by '\0'.
+ * @param buflen Size of the buffer.
+ *
+ * @return Number of characters read.
+ */
+count_t gets(chardev_t *chardev, char *buf, size_t buflen)
+{
+    index_t index = 0;
+    char ch;
+    while (index < buflen) {
+        ch = _getc(chardev);
+        if (ch == '\b') {
+            if (index > 0) {
+                index--;
+                /* Space backspace, space */
+                putchar('\b');
+                putchar(' ');
+                putchar('\b');
+            }
+            continue;
+        }
+        putchar(ch);
+        if (ch == '\n') { /* end of string => write 0, return */
+            buf[index] = '\0';
+            return (count_t) index;
+        }
+        buf[index++] = ch;
+    }
+    return (count_t) index;
+}
+/** Get character from device & echo it to screen */
+__u8 getc(chardev_t *chardev)
+{
+    __u8 ch;
+    ch = _getc(chardev);
+    putchar(ch);
+    return ch;
+}
+void putchar(char c)
+{
+    if (stdout->op->write)
+        stdout->op->write(stdout, c);
+}
+ /** @}
+ */

 /tags/0.2.0.2/kernel/generic/src/console/kconsole.c
 ,0 → 1,631
+/*
+ * Copyright (C) 2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup genericconsole
+ * @{
+ */
+/**
+ * @file    kconsole.c
+ * @brief   Kernel console.
+ *
+ * This file contains kernel thread managing the kernel console.
+ */
+#include <console/kconsole.h>
+#include <console/console.h>
+#include <console/chardev.h>
+#include <console/cmd.h>
+#include <print.h>
+#include <panic.h>
+#include <typedefs.h>
+#include <arch/types.h>
+#include <adt/list.h>
+#include <arch.h>
+#include <macros.h>
+#include <debug.h>
+#include <func.h>
+#include <symtab.h>
+#include <macros.h>
+/** Simple kernel console.
+ *
+ * The console is realized by kernel thread kconsole.
+ * It doesn't understand any useful command on its own,
+ * but makes it possible for other kernel subsystems to
+ * register their own commands.
+ */
+/** Locking.
+ *
+ * There is a list of cmd_info_t structures. This list
+ * is protected by cmd_lock spinlock. Note that specially
+ * the link elements of cmd_info_t are protected by
+ * this lock.
+ *
+ * Each cmd_info_t also has its own lock, which protects
+ * all elements thereof except the link element.
+ *
+ * cmd_lock must be acquired before any cmd_info lock.
+ * When locking two cmd info structures, structure with
+ * lower address must be locked first.
+ */
+SPINLOCK_INITIALIZE(cmd_lock);  /**< Lock protecting command list. */
+LIST_INITIALIZE(cmd_head);  /**< Command list. */
+static cmd_info_t *parse_cmdline(char *cmdline, size_t len);
+static bool parse_argument(char *cmdline, size_t len, index_t *start, index_t *end);
+static char history[KCONSOLE_HISTORY][MAX_CMDLINE] = {};
+/** Initialize kconsole data structures. */
+void kconsole_init(void)
+{
+    int i;
+    cmd_init();
+    for (i=0; i<KCONSOLE_HISTORY; i++)
+        history[i][0] = '\0';
+}
+/** Register kconsole command.
+ *
+ * @param cmd Structure describing the command.
+ *
+ * @return 0 on failure, 1 on success.
+ */
+int cmd_register(cmd_info_t *cmd)
+{
+    link_t *cur;
+    spinlock_lock(&cmd_lock);
+    /*
+     * Make sure the command is not already listed.
+     */
+    for (cur = cmd_head.next; cur != &cmd_head; cur = cur->next) {
+        cmd_info_t *hlp;
+        hlp = list_get_instance(cur, cmd_info_t, link);
+        if (hlp == cmd) {
+            /* The command is already there. */
+            spinlock_unlock(&cmd_lock);
+            return 0;
+        }
+        /* Avoid deadlock. */
+        if (hlp < cmd) {
+            spinlock_lock(&hlp->lock);
+            spinlock_lock(&cmd->lock);
+        } else {
+            spinlock_lock(&cmd->lock);
+            spinlock_lock(&hlp->lock);
+        }
+        if ((strncmp(hlp->name,
+                 cmd->name, max(strlen(cmd->name),
+                        strlen(hlp->name))) == 0)) {
+            /* The command is already there. */
+            spinlock_unlock(&hlp->lock);
+            spinlock_unlock(&cmd->lock);
+            spinlock_unlock(&cmd_lock);
+            return 0;
+        }
+        spinlock_unlock(&hlp->lock);
+        spinlock_unlock(&cmd->lock);
+    }
+    /*
+     * Now the command can be added.
+     */
+    list_append(&cmd->link, &cmd_head);
+    spinlock_unlock(&cmd_lock);
+    return 1;
+}
+/** Print count times a character */
+static void rdln_print_c(char ch, int count)
+{
+    int i;
+    for (i=0;i<count;i++)
+        putchar(ch);
+}
+/** Insert character to string */
+static void insert_char(char *str, char ch, int pos)
+{
+    int i;
+    for (i=strlen(str);i > pos; i--)
+        str[i] = str[i-1];
+    str[pos] = ch;
+}
+/** Try to find a command beginning with prefix */
+static const char * cmdtab_search_one(const char *name,link_t **startpos)
+{
+    int namelen = strlen(name);
+    const char *curname;
+    spinlock_lock(&cmd_lock);
+    if (!*startpos)
+        *startpos = cmd_head.next;
+    for (;*startpos != &cmd_head;*startpos = (*startpos)->next) {
+        cmd_info_t *hlp;
+        hlp = list_get_instance(*startpos, cmd_info_t, link);
+        curname = hlp->name;
+        if (strlen(curname) < namelen)
+            continue;
+        if (strncmp(curname, name, namelen) == 0) {
+            spinlock_unlock(&cmd_lock);
+            return curname+namelen;
+        }
+    }
+    spinlock_unlock(&cmd_lock);
+    return NULL;
+}
+/** Command completion of the commands
+ *
+ * @param name - string to match, changed to hint on exit
+ * @return number of found matches
+ */
+static int cmdtab_compl(char *name)
+{
+    char output[MAX_SYMBOL_NAME+1];
+    link_t *startpos = NULL;
+    const char *foundtxt;
+    int found = 0;
+    int i;
+    output[0] = '\0';
+    while ((foundtxt = cmdtab_search_one(name, &startpos))) {
+        startpos = startpos->next;
+        if (!found)
+            strncpy(output, foundtxt, strlen(foundtxt)+1);
+        else {
+            for (i=0; output[i] && foundtxt[i] && output[i]==foundtxt[i]; i++)
+                ;
+            output[i] = '\0';
+        }
+        found++;
+    }
+    if (!found)
+        return 0;
+    if (found > 1 && !strlen(output)) {
+        printf("\n");
+        startpos = NULL;
+        while ((foundtxt = cmdtab_search_one(name, &startpos))) {
+            cmd_info_t *hlp;
+            hlp = list_get_instance(startpos, cmd_info_t, link);
+            printf("%s - %s\n", hlp->name, hlp->description);
+            startpos = startpos->next;
+        }
+    }
+    strncpy(name, output, MAX_SYMBOL_NAME);
+    return found;
+}
+static char * clever_readline(const char *prompt, chardev_t *input)
+{
+    static int histposition = 0;
+    char tmp[MAX_CMDLINE+1];
+    int curlen = 0, position = 0;
+    char *current = history[histposition];
+    int i;
+    char mod; /* Command Modifier */
+    char c;
+    printf("%s> ", prompt);
+    while (1) {
+        c = _getc(input);
+        if (c == '\n') {
+            putchar(c);
+            break;
+        } if (c == '\b') { /* Backspace */
+            if (position == 0)
+                continue;
+            for (i=position; i<curlen;i++)
+                current[i-1] = current[i];
+            curlen--;
+            position--;
+            putchar('\b');
+            for (i=position;i<curlen;i++)
+                putchar(current[i]);
+            putchar(' ');
+            rdln_print_c('\b',curlen-position+1);
+            continue;
+        }
+        if (c == '\t') { /* Tabulator */
+            int found;
+            /* Move to the end of the word */
+            for (;position<curlen && current[position]!=' ';position++)
+                putchar(current[position]);
+            /* Copy to tmp last word */
+            for (i=position-1;i >= 0 && current[i]!=' ' ;i--)
+                ;
+            /* If word begins with * or &, skip it */
+            if (tmp[0] == '*' || tmp[0] == '&')
+                for (i=1;tmp[i];i++)
+                    tmp[i-1] = tmp[i];
+            i++; /* I is at the start of the word */
+            strncpy(tmp, current+i, position-i+1);
+            if (i==0) { /* Command completion */
+                found = cmdtab_compl(tmp);
+            } else { /* Symtab completion */
+                found = symtab_compl(tmp);
+            }
+            if (found == 0)
+                continue;
+            for (i=0;tmp[i] && curlen < MAX_CMDLINE;i++,curlen++)
+                insert_char(current, tmp[i], i+position);
+            if (strlen(tmp) || found==1) { /* If we have a hint */
+                for (i=position;i<curlen;i++)
+                    putchar(current[i]);
+                position += strlen(tmp);
+                /* Add space to end */
+                if (found == 1 && position == curlen && \
+                    curlen < MAX_CMDLINE) {
+                    current[position] = ' ';
+                    curlen++;
+                    position++;
+                    putchar(' ');
+                }
+            } else { /* No hint, table was printed */
+                printf("%s> ", prompt);
+                for (i=0; i<curlen;i++)
+                    putchar(current[i]);
+                position += strlen(tmp);
+            }
+            rdln_print_c('\b', curlen-position);
+            continue;
+        }
+        if (c == 0x1b) { /* Special command */
+            mod = _getc(input);
+            c = _getc(input);
+            if (mod != 0x5b && mod != 0x4f)
+                continue;
+            if (c == 0x33 && _getc(input) == 0x7e) {
+                /* Delete */
+                if (position == curlen)
+                    continue;
+                for (i=position+1; i<curlen;i++) {
+                    putchar(current[i]);
+                    current[i-1] = current[i];
+                }
+                putchar(' ');
+                rdln_print_c('\b',curlen-position);
+                curlen--;
+            }
+            else if (c == 0x48) { /* Home */
+                rdln_print_c('\b',position);
+                position = 0;
+            }
+            else if (c == 0x46) {  /* End */
+                for (i=position;i<curlen;i++)
+                    putchar(current[i]);
+                position = curlen;
+            }
+            else if (c == 0x44) { /* Left */
+                if (position > 0) {
+                    putchar('\b');
+                    position--;
+                }
+                continue;
+            }
+            else if (c == 0x43) { /* Right */
+                if (position < curlen) {
+                    putchar(current[position]);
+                    position++;
+                }
+                continue;
+            }
+            else if (c == 0x41 || c == 0x42) {
+                                /* Up,down */
+                rdln_print_c('\b',position);
+                rdln_print_c(' ',curlen);
+                rdln_print_c('\b',curlen);
+                if (c == 0x41) /* Up */
+                    histposition--;
+                else
+                    histposition++;
+                if (histposition < 0)
+                    histposition = KCONSOLE_HISTORY -1 ;
+                else
+                    histposition =  histposition % KCONSOLE_HISTORY;
+                current = history[histposition];
+                printf("%s", current);
+                curlen = strlen(current);
+                position = curlen;
+                continue;
+            }
+            continue;
+        }
+        if (curlen >= MAX_CMDLINE)
+            continue;
+        insert_char(current, c, position);
+        curlen++;
+        for (i=position;i<curlen;i++)
+            putchar(current[i]);
+        position++;
+        rdln_print_c('\b',curlen-position);
+    }
+    if (curlen) {
+        histposition++;
+        histposition = histposition % KCONSOLE_HISTORY;
+    }
+    current[curlen] = '\0';
+    return current;
+}
+/** Kernel console managing thread.
+ *
+ * @param prompt Kernel console prompt (e.g kconsole/panic).
+ */
+void kconsole(void *prompt)
+{
+    cmd_info_t *cmd_info;
+    count_t len;
+    char *cmdline;
+    if (!stdin) {
+        printf("%s: no stdin\n", __FUNCTION__);
+        return;
+    }
+    while (true) {
+        cmdline = clever_readline(prompt, stdin);
+        len = strlen(cmdline);
+        if (!len)
+            continue;
+        cmd_info = parse_cmdline(cmdline, len);
+        if (!cmd_info)
+            continue;
+        if (strncmp(cmd_info->name,"exit", \
+                min(strlen(cmd_info->name),5)) == 0)
+            break;
+        (void) cmd_info->func(cmd_info->argv);
+    }
+}
+static int parse_int_arg(char *text, size_t len, __native *result)
+{
+    char symname[MAX_SYMBOL_NAME];
+    __address symaddr;
+    bool isaddr = false;
+    bool isptr = false;
+    /* If we get a name, try to find it in symbol table */
+    if (text[0] == '&') {
+        isaddr = true;
+        text++;len--;
+    } else if (text[0] == '*') {
+        isptr = true;
+        text++;len--;
+    }
+    if (text[0] < '0' || text[0] > '9') {
+        strncpy(symname, text, min(len+1, MAX_SYMBOL_NAME));
+        symaddr = get_symbol_addr(symname);
+        if (!symaddr) {
+            printf("Symbol %s not found.\n",symname);
+            return -1;
+        }
+        if (symaddr == (__address) -1) {
+            printf("Duplicate symbol %s.\n",symname);
+            symtab_print_search(symname);
+            return -1;
+        }
+        if (isaddr)
+            *result = (__native)symaddr;
+        else if (isptr)
+            *result = **((__native **)symaddr);
+        else
+            *result = *((__native *)symaddr);
+    } else { /* It's a number - convert it */
+        *result = atoi(text);
+        if (isptr)
+            *result = *((__native *)*result);
+    }
+    return 0;
+}
+/** Parse command line.
+ *
+ * @param cmdline Command line as read from input device.
+ * @param len Command line length.
+ *
+ * @return Structure describing the command.
+ */
+cmd_info_t *parse_cmdline(char *cmdline, size_t len)
+{
+    index_t start = 0, end = 0;
+    cmd_info_t *cmd = NULL;
+    link_t *cur;
+    int i;
+    int error = 0;
+    if (!parse_argument(cmdline, len, &start, &end)) {
+        /* Command line did not contain alphanumeric word. */
+        return NULL;
+    }
+    spinlock_lock(&cmd_lock);
+    for (cur = cmd_head.next; cur != &cmd_head; cur = cur->next) {
+        cmd_info_t *hlp;
+        hlp = list_get_instance(cur, cmd_info_t, link);
+        spinlock_lock(&hlp->lock);
+        if (strncmp(hlp->name, &cmdline[start], max(strlen(hlp->name),
+                                end-start+1)) == 0) {
+            cmd = hlp;
+            break;
+        }
+        spinlock_unlock(&hlp->lock);
+    }
+    spinlock_unlock(&cmd_lock);
+    if (!cmd) {
+        /* Unknown command. */
+        printf("Unknown command.\n");
+        return NULL;
+    }
+    /* cmd == hlp is locked */
+    /*
+     * The command line must be further analyzed and
+     * the parameters therefrom must be matched and
+     * converted to those specified in the cmd info
+     * structure.
+     */
+    for (i = 0; i < cmd->argc; i++) {
+        char *buf;
+        start = end + 1;
+        if (!parse_argument(cmdline, len, &start, &end)) {
+            printf("Too few arguments.\n");
+            spinlock_unlock(&cmd->lock);
+            return NULL;
+        }
+        error = 0;
+        switch (cmd->argv[i].type) {
+        case ARG_TYPE_STRING:
+                buf = cmd->argv[i].buffer;
+                strncpy(buf, (const char *) &cmdline[start], min((end - start) + 2, cmd->argv[i].len));
+            buf[min((end - start) + 1, cmd->argv[i].len - 1)] = '\0';
+            break;
+        case ARG_TYPE_INT:
+            if (parse_int_arg(cmdline+start, end-start+1,
+                      &cmd->argv[i].intval))
+                error = 1;
+            break;
+        case ARG_TYPE_VAR:
+            if (start != end && cmdline[start] == '"' && cmdline[end] == '"') {
+                buf = cmd->argv[i].buffer;
+                strncpy(buf, (const char *) &cmdline[start+1],
+                    min((end-start), cmd->argv[i].len));
+                buf[min((end - start), cmd->argv[i].len - 1)] = '\0';
+                cmd->argv[i].intval = (__native) buf;
+                cmd->argv[i].vartype = ARG_TYPE_STRING;
+            } else if (!parse_int_arg(cmdline+start, end-start+1,
+                         &cmd->argv[i].intval))
+                cmd->argv[i].vartype = ARG_TYPE_INT;
+            else {
+                printf("Unrecognized variable argument.\n");
+                error = 1;
+            }
+            break;
+        case ARG_TYPE_INVALID:
+        default:
+            printf("invalid argument type\n");
+            error = 1;
+            break;
+        }
+    }
+    if (error) {
+        spinlock_unlock(&cmd->lock);
+        return NULL;
+    }
+    start = end + 1;
+    if (parse_argument(cmdline, len, &start, &end)) {
+        printf("Too many arguments.\n");
+        spinlock_unlock(&cmd->lock);
+        return NULL;
+    }
+    spinlock_unlock(&cmd->lock);
+    return cmd;
+}
+/** Parse argument.
+ *
+ * Find start and end positions of command line argument.
+ *
+ * @param cmdline Command line as read from the input device.
+ * @param len Number of characters in cmdline.
+ * @param start On entry, 'start' contains pointer to the index
+ *        of first unprocessed character of cmdline.
+ *        On successful exit, it marks beginning of the next argument.
+ * @param end Undefined on entry. On exit, 'end' points to the last character
+ *        of the next argument.
+ *
+ * @return false on failure, true on success.
+ */
+bool parse_argument(char *cmdline, size_t len, index_t *start, index_t *end)
+{
+    int i;
+    bool found_start = false;
+    ASSERT(start != NULL);
+    ASSERT(end != NULL);
+    for (i = *start; i < len; i++) {
+        if (!found_start) {
+            if (is_white(cmdline[i]))
+                (*start)++;
+            else
+                found_start = true;
+        } else {
+            if (is_white(cmdline[i]))
+                break;
+        }
+    }
+    *end = i - 1;
+    return found_start;
+}
+ /** @}
+ */

 /tags/0.2.0.2/kernel/generic/src/console/chardev.c
 ,0 → 1,79
+/*
+ * Copyright (C) 2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup genericconsole
+ * @{
+ */
+/** @file
+ */
+#include <console/chardev.h>
+#include <putchar.h>
+#include <synch/waitq.h>
+#include <synch/spinlock.h>
+/** Initialize character device.
+ *
+ * @param chardev Character device.
+ * @param op Implementation of character device operations.
+ */
+void chardev_initialize(char *name,chardev_t *chardev,
+            chardev_operations_t *op)
+{
+    chardev->name = name;
+    waitq_initialize(&chardev->wq);
+    spinlock_initialize(&chardev->lock, "chardev");
+    chardev->counter = 0;
+    chardev->index = 0;
+    chardev->op = op;
+}
+/** Push character read from input character device.
+ *
+ * @param chardev Character device.
+ * @param ch Character being pushed.
+ */
+void chardev_push_character(chardev_t *chardev, __u8 ch)
+{
+    spinlock_lock(&chardev->lock);
+    chardev->counter++;
+    if (chardev->counter == CHARDEV_BUFLEN - 1) {
+        /* buffer full => disable device interrupt */
+        chardev->op->suspend(chardev);
+    }
+    chardev->buffer[chardev->index++] = ch;
+    chardev->index = chardev->index % CHARDEV_BUFLEN; /* index modulo size of buffer */
+    waitq_wakeup(&chardev->wq, WAKEUP_FIRST);
+    spinlock_unlock(&chardev->lock);
+}
+ /** @}
+ */

 /tags/0.2.0.2/kernel/generic/src/console/klog.c
 ,0 → 1,110
+/*
+ * Copyright (C) 2006 Ondrej Palkovsky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup genericklog
+ * @{
+ */
+/** @file
+ */
+#include <mm/frame.h>
+#include <sysinfo/sysinfo.h>
+#include <console/klog.h>
+#include <print.h>
+#include <ipc/irq.h>
+/* Order of frame to be allocated for klog communication */
+#define KLOG_ORDER 0
+static char *klog;
+static int klogsize;
+static int klogpos;
+SPINLOCK_INITIALIZE(klog_lock);
+/** Initialize kernel logging facility
+ *
+ * Allocate pages that are to be shared with uspace for console data.
+ * The shared area is a circular buffer. Userspace application may
+ * be notified on new data with indication of position and size
+ * of the data within the circular buffer.
+ */
+void klog_init(void)
+{
+    void *faddr;
+    faddr = (void *)PFN2ADDR(frame_alloc(KLOG_ORDER, FRAME_ATOMIC));
+    if (!faddr)
+        panic("Cannot allocate page for klog");
+    klog = (char *)PA2KA(faddr);
+    sysinfo_set_item_val("klog.faddr", NULL, (__native)faddr);
+    sysinfo_set_item_val("klog.pages", NULL, 1 << KLOG_ORDER);
+    klogsize = PAGE_SIZE << KLOG_ORDER;
+    klogpos = 0;
+}
+static void klog_vprintf(const char *fmt, va_list args)
+{
+    int ret;
+    va_list atst;
+    va_copy(atst, args);
+    spinlock_lock(&klog_lock);
+    ret = vsnprintf(klog+klogpos, klogsize-klogpos, fmt, atst);
+    if (ret >= klogsize-klogpos) {
+        klogpos = 0;
+        if (ret >= klogsize)
+            goto out;
+    }
+    ipc_irq_send_msg(IPC_IRQ_KLOG, klogpos, ret, 0);
+    klogpos += ret;
+    if (klogpos >= klogsize)
+        klogpos = 0;
+out:
+    spinlock_unlock(&klog_lock);
+    va_end(atst);
+}
+/** Printf a message to kernel-uspace log */
+void klog_printf(const char *fmt, ...)
+{
+    va_list args;
+    va_start(args, fmt);
+    klog_vprintf(fmt, args);
+    va_end(args);
+}
+ /** @}
+ */

 /tags/0.2.0.2/kernel/generic/src/proc/task.c
 ,0 → 1,500
+/*
+ * Copyright (C) 2001-2004 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup genericproc
+ * @{
+ */
+/**
+ * @file
+ * @brief   Task management.
+ */
+#include <main/uinit.h>
+#include <proc/thread.h>
+#include <proc/task.h>
+#include <proc/uarg.h>
+#include <mm/as.h>
+#include <mm/slab.h>
+#include <synch/spinlock.h>
+#include <arch.h>
+#include <panic.h>
+#include <adt/btree.h>
+#include <adt/list.h>
+#include <ipc/ipc.h>
+#include <security/cap.h>
+#include <memstr.h>
+#include <print.h>
+#include <elf.h>
+#include <errno.h>
+#include <syscall/copy.h>
+#include <console/klog.h>
+#ifndef LOADED_PROG_STACK_PAGES_NO
+#define LOADED_PROG_STACK_PAGES_NO 1
+#endif
+/** Spinlock protecting the tasks_btree B+tree. */
+SPINLOCK_INITIALIZE(tasks_lock);
+/** B+tree of active tasks.
+ *
+ * The task is guaranteed to exist after it was found in the tasks_btree as long as:
+ * @li the tasks_lock is held,
+ * @li the task's lock is held when task's lock is acquired before releasing tasks_lock or
+ * @li the task's refcount is grater than 0
+ *
+ */
+btree_t tasks_btree;
+static task_id_t task_counter = 0;
+static void ktaskclnp(void *arg);
+static void ktaskgc(void *arg);
+/** Initialize tasks
+ *
+ * Initialize kernel tasks support.
+ *
+ */
+void task_init(void)
+{
+    TASK = NULL;
+    btree_create(&tasks_btree);
+}
+/** Create new task
+ *
+ * Create new task with no threads.
+ *
+ * @param as Task's address space.
+ * @param name Symbolic name.
+ *
+ * @return New task's structure
+ *
+ */
+task_t *task_create(as_t *as, char *name)
+{
+    ipl_t ipl;
+    task_t *ta;
+    int i;
+    ta = (task_t *) malloc(sizeof(task_t), 0);
+    task_create_arch(ta);
+    spinlock_initialize(&ta->lock, "task_ta_lock");
+    list_initialize(&ta->th_head);
+    ta->as = as;
+    ta->name = name;
+    ta->main_thread = NULL;
+    ta->refcount = 0;
+    ta->capabilities = 0;
+    ta->accept_new_threads = true;
+    ipc_answerbox_init(&ta->answerbox);
+    for (i=0; i < IPC_MAX_PHONES;i++)
+        ipc_phone_init(&ta->phones[i]);
+    if (ipc_phone_0)
+        ipc_phone_connect(&ta->phones[0], ipc_phone_0);
+    atomic_set(&ta->active_calls, 0);
+    mutex_initialize(&ta->futexes_lock);
+    btree_create(&ta->futexes);
+    ipl = interrupts_disable();
+    /*
+     * Increment address space reference count.
+     * TODO: Reconsider the locking scheme.
+     */
+    mutex_lock(&as->lock);
+    as->refcount++;
+    mutex_unlock(&as->lock);
+    spinlock_lock(&tasks_lock);
+    ta->taskid = ++task_counter;
+    btree_insert(&tasks_btree, (btree_key_t) ta->taskid, (void *) ta, NULL);
+    spinlock_unlock(&tasks_lock);
+    interrupts_restore(ipl);
+    return ta;
+}
+/** Destroy task.
+ *
+ * @param t Task to be destroyed.
+ */
+void task_destroy(task_t *t)
+{
+    task_destroy_arch(t);
+    btree_destroy(&t->futexes);
+    mutex_lock_active(&t->as->lock);
+    if (--t->as->refcount == 0) {
+        mutex_unlock(&t->as->lock);
+        as_destroy(t->as);
+        /*
+         * t->as is destroyed.
+         */
+    } else {
+        mutex_unlock(&t->as->lock);
+    }
+    free(t);
+    TASK = NULL;
+}
+/** Create new task with 1 thread and run it
+ *
+ * @param program_addr Address of program executable image.
+ * @param name Program name.
+ *
+ * @return Task of the running program or NULL on error.
+ */
+task_t * task_run_program(void *program_addr, char *name)
+{
+    as_t *as;
+    as_area_t *a;
+    int rc;
+    thread_t *t1, *t2;
+    task_t *task;
+    uspace_arg_t *kernel_uarg;
+    as = as_create(0);
+    ASSERT(as);
+    rc = elf_load((elf_header_t *) program_addr, as);
+    if (rc != EE_OK) {
+        as_destroy(as);
+        return NULL;
+    }
+    kernel_uarg = (uspace_arg_t *) malloc(sizeof(uspace_arg_t), 0);
+    kernel_uarg->uspace_entry = (void *) ((elf_header_t *) program_addr)->e_entry;
+    kernel_uarg->uspace_stack = (void *) USTACK_ADDRESS;
+    kernel_uarg->uspace_thread_function = NULL;
+    kernel_uarg->uspace_thread_arg = NULL;
+    kernel_uarg->uspace_uarg = NULL;
+    task = task_create(as, name);
+    ASSERT(task);
+    /*
+     * Create the data as_area.
+     */
+    a = as_area_create(as, AS_AREA_READ | AS_AREA_WRITE | AS_AREA_CACHEABLE,
+        LOADED_PROG_STACK_PAGES_NO*PAGE_SIZE,
+        USTACK_ADDRESS, AS_AREA_ATTR_NONE, &anon_backend, NULL);
+    /*
+     * Create the main thread.
+     */
+    t1 = thread_create(uinit, kernel_uarg, task, 0, "uinit");
+    ASSERT(t1);
+    /*
+     * Create killer thread for the new task.
+     */
+    t2 = thread_create(ktaskgc, t1, task, 0, "ktaskgc");
+    ASSERT(t2);
+    thread_ready(t2);
+    thread_ready(t1);
+    return task;
+}
+/** Syscall for reading task ID from userspace.
+ *
+ * @param uspace_task_id Userspace address of 8-byte buffer where to store current task ID.
+ *
+ * @return 0 on success or an error code from @ref errno.h.
+ */
+__native sys_task_get_id(task_id_t *uspace_task_id)
+{
+    /*
+     * No need to acquire lock on TASK because taskid
+     * remains constant for the lifespan of the task.
+     */
+    return (__native) copy_to_uspace(uspace_task_id, &TASK->taskid, sizeof(TASK->taskid));
+}
+/** Find task structure corresponding to task ID.
+ *
+ * The tasks_lock must be already held by the caller of this function
+ * and interrupts must be disabled.
+ *
+ * @param id Task ID.
+ *
+ * @return Task structure address or NULL if there is no such task ID.
+ */
+task_t *task_find_by_id(task_id_t id)
+{
+    btree_node_t *leaf;
+    return (task_t *) btree_search(&tasks_btree, (btree_key_t) id, &leaf);
+}
+/** Kill task.
+ *
+ * @param id ID of the task to be killed.
+ *
+ * @return 0 on success or an error code from errno.h
+ */
+int task_kill(task_id_t id)
+{
+    ipl_t ipl;
+    task_t *ta;
+    thread_t *t;
+    link_t *cur;
+    if (id == 1)
+        return EPERM;
+    ipl = interrupts_disable();
+    spinlock_lock(&tasks_lock);
+    if (!(ta = task_find_by_id(id))) {
+        spinlock_unlock(&tasks_lock);
+        interrupts_restore(ipl);
+        return ENOENT;
+    }
+    spinlock_lock(&ta->lock);
+    ta->refcount++;
+    spinlock_unlock(&ta->lock);
+    btree_remove(&tasks_btree, ta->taskid, NULL);
+    spinlock_unlock(&tasks_lock);
+    t = thread_create(ktaskclnp, NULL, ta, 0, "ktaskclnp");
+    spinlock_lock(&ta->lock);
+    ta->accept_new_threads = false;
+    ta->refcount--;
+    /*
+     * Interrupt all threads except ktaskclnp.
+     */
+    for (cur = ta->th_head.next; cur != &ta->th_head; cur = cur->next) {
+        thread_t *thr;
+        bool  sleeping = false;
+        thr = list_get_instance(cur, thread_t, th_link);
+        if (thr == t)
+            continue;
+        spinlock_lock(&thr->lock);
+        thr->interrupted = true;
+        if (thr->state == Sleeping)
+            sleeping = true;
+        spinlock_unlock(&thr->lock);
+        if (sleeping)
+            waitq_interrupt_sleep(thr);
+    }
+    spinlock_unlock(&ta->lock);
+    interrupts_restore(ipl);
+    if (t)
+        thread_ready(t);
+    return 0;
+}
+/** Print task list */
+void task_print_list(void)
+{
+    link_t *cur;
+    ipl_t ipl;
+    /* Messing with thread structures, avoid deadlock */
+    ipl = interrupts_disable();
+    spinlock_lock(&tasks_lock);
+    for (cur = tasks_btree.leaf_head.next; cur != &tasks_btree.leaf_head; cur = cur->next) {
+        btree_node_t *node;
+        int i;
+        node = list_get_instance(cur, btree_node_t, leaf_link);
+        for (i = 0; i < node->keys; i++) {
+            task_t *t;
+            int j;
+            t = (task_t *) node->value[i];
+            spinlock_lock(&t->lock);
+            printf("%s(%lld): address=%#zx, as=%#zx, ActiveCalls: %zd",
+                t->name, t->taskid, t, t->as, atomic_get(&t->active_calls));
+            for (j=0; j < IPC_MAX_PHONES; j++) {
+                if (t->phones[j].callee)
+                    printf(" Ph(%zd): %#zx ", j, t->phones[j].callee);
+            }
+            printf("\n");
+            spinlock_unlock(&t->lock);
+        }
+    }
+    spinlock_unlock(&tasks_lock);
+    interrupts_restore(ipl);
+}
+/** Kernel thread used to cleanup the task after it is killed. */
+void ktaskclnp(void *arg)
+{
+    ipl_t ipl;
+    thread_t *t = NULL, *main_thread;
+    link_t *cur;
+    bool again;
+    thread_detach(THREAD);
+loop:
+    ipl = interrupts_disable();
+    spinlock_lock(&TASK->lock);
+    main_thread = TASK->main_thread;
+    /*
+     * Find a thread to join.
+     */
+    again = false;
+    for (cur = TASK->th_head.next; cur != &TASK->th_head; cur = cur->next) {
+        t = list_get_instance(cur, thread_t, th_link);
+        spinlock_lock(&t->lock);
+        if (t == THREAD) {
+            spinlock_unlock(&t->lock);
+            continue;
+        } else if (t == main_thread) {
+            spinlock_unlock(&t->lock);
+            continue;
+        } else if (t->join_type != None) {
+            spinlock_unlock(&t->lock);
+            again = true;
+            continue;
+        } else {
+            t->join_type = TaskClnp;
+            spinlock_unlock(&t->lock);
+            again = false;
+            break;
+        }
+    }
+    spinlock_unlock(&TASK->lock);
+    interrupts_restore(ipl);
+    if (again) {
+        /*
+         * Other cleanup (e.g. ktaskgc) is in progress.
+         */
+        scheduler();
+        goto loop;
+    }
+    if (t != THREAD) {
+        ASSERT(t != main_thread);   /* uninit is joined and detached in ktaskgc */
+        thread_join(t);
+        thread_detach(t);
+        goto loop;  /* go for another thread */
+    }
+    /*
+     * Now there are no other threads in this task
+     * and no new threads can be created.
+     */
+    ipc_cleanup();
+    futex_cleanup();
+    klog_printf("Cleanup of task %lld completed.", TASK->taskid);
+}
+/** Kernel thread used to kill the userspace task when its main thread exits.
+ *
+ * This thread waits until the main userspace thread (i.e. uninit) exits.
+ * When this happens, the task is killed. In the meantime, exited threads
+ * are garbage collected.
+ *
+ * @param arg Pointer to the thread structure of the task's main thread.
+ */
+void ktaskgc(void *arg)
+{
+    thread_t *t = (thread_t *) arg;
+loop:
+    /*
+     * Userspace threads cannot detach themselves,
+     * therefore the thread pointer is guaranteed to be valid.
+     */
+    if (thread_join_timeout(t, 1000000, SYNCH_FLAGS_NONE) == ESYNCH_TIMEOUT) {  /* sleep uninterruptibly here! */
+        ipl_t ipl;
+        link_t *cur;
+        thread_t *thr = NULL;
+        /*
+         * The join timed out. Try to do some garbage collection of Undead threads.
+         */
+more_gc:
+        ipl = interrupts_disable();
+        spinlock_lock(&TASK->lock);
+        for (cur = TASK->th_head.next; cur != &TASK->th_head; cur = cur->next) {
+            thr = list_get_instance(cur, thread_t, th_link);
+            spinlock_lock(&thr->lock);
+            if (thr != t && thr->state == Undead && thr->join_type == None) {
+                thr->join_type = TaskGC;
+                spinlock_unlock(&thr->lock);
+                break;
+            }
+            spinlock_unlock(&thr->lock);
+            thr = NULL;
+        }
+        spinlock_unlock(&TASK->lock);
+        interrupts_restore(ipl);
+        if (thr) {
+            thread_join(thr);
+            thread_detach(thr);
+            scheduler();
+            goto more_gc;
+        }
+        goto loop;
+    }
+    thread_detach(t);
+    task_kill(TASK->taskid);
+}
+ /** @}
+ */

 /tags/0.2.0.2/kernel/generic/src/proc/thread.c
 ,0 → 1,618
+/*
+ * Copyright (C) 2001-2004 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup genericproc
+ * @{
+ */
+/**
+ * @file
+ * @brief   Thread management functions.
+ */
+#include <proc/scheduler.h>
+#include <proc/thread.h>
+#include <proc/task.h>
+#include <proc/uarg.h>
+#include <mm/frame.h>
+#include <mm/page.h>
+#include <arch/asm.h>
+#include <arch.h>
+#include <synch/synch.h>
+#include <synch/spinlock.h>
+#include <synch/waitq.h>
+#include <synch/rwlock.h>
+#include <cpu.h>
+#include <func.h>
+#include <context.h>
+#include <adt/btree.h>
+#include <adt/list.h>
+#include <typedefs.h>
+#include <time/clock.h>
+#include <config.h>
+#include <arch/interrupt.h>
+#include <smp/ipi.h>
+#include <arch/faddr.h>
+#include <atomic.h>
+#include <memstr.h>
+#include <print.h>
+#include <mm/slab.h>
+#include <debug.h>
+#include <main/uinit.h>
+#include <syscall/copy.h>
+#include <errno.h>
+/** Thread states */
+char *thread_states[] = {
+    "Invalid",
+    "Running",
+    "Sleeping",
+    "Ready",
+    "Entering",
+    "Exiting",
+    "Undead"
+};
+/** Lock protecting the threads_btree B+tree. For locking rules, see declaration thereof. */
+SPINLOCK_INITIALIZE(threads_lock);
+/** B+tree of all threads.
+ *
+ * When a thread is found in the threads_btree B+tree, it is guaranteed to exist as long
+ * as the threads_lock is held.
+ */
+btree_t threads_btree;
+SPINLOCK_INITIALIZE(tidlock);
+__u32 last_tid = 0;
+static slab_cache_t *thread_slab;
+#ifdef ARCH_HAS_FPU
+slab_cache_t *fpu_context_slab;
+#endif
+/** Thread wrapper
+ *
+ * This wrapper is provided to ensure that every thread
+ * makes a call to thread_exit() when its implementing
+ * function returns.
+ *
+ * interrupts_disable() is assumed.
+ *
+ */
+static void cushion(void)
+{
+    void (*f)(void *) = THREAD->thread_code;
+    void *arg = THREAD->thread_arg;
+    /* this is where each thread wakes up after its creation */
+    spinlock_unlock(&THREAD->lock);
+    interrupts_enable();
+    f(arg);
+    thread_exit();
+    /* not reached */
+}
+/** Initialization and allocation for thread_t structure */
+static int thr_constructor(void *obj, int kmflags)
+{
+    thread_t *t = (thread_t *)obj;
+    pfn_t pfn;
+    int status;
+    spinlock_initialize(&t->lock, "thread_t_lock");
+    link_initialize(&t->rq_link);
+    link_initialize(&t->wq_link);
+    link_initialize(&t->th_link);
+#ifdef ARCH_HAS_FPU
+#  ifdef CONFIG_FPU_LAZY
+    t->saved_fpu_context = NULL;
+#  else
+    t->saved_fpu_context = slab_alloc(fpu_context_slab,kmflags);
+    if (!t->saved_fpu_context)
+        return -1;
+#  endif
+#endif
+    pfn = frame_alloc_rc(STACK_FRAMES, FRAME_KA | kmflags,&status);
+    if (status) {
+#ifdef ARCH_HAS_FPU
+        if (t->saved_fpu_context)
+            slab_free(fpu_context_slab,t->saved_fpu_context);
+#endif
+        return -1;
+    }
+    t->kstack = (__u8 *)PA2KA(PFN2ADDR(pfn));
+    return 0;
+}
+/** Destruction of thread_t object */
+static int thr_destructor(void *obj)
+{
+    thread_t *t = (thread_t *)obj;
+    frame_free(ADDR2PFN(KA2PA(t->kstack)));
+#ifdef ARCH_HAS_FPU
+    if (t->saved_fpu_context)
+        slab_free(fpu_context_slab,t->saved_fpu_context);
+#endif
+    return 1; /* One page freed */
+}
+/** Initialize threads
+ *
+ * Initialize kernel threads support.
+ *
+ */
+void thread_init(void)
+{
+    THREAD = NULL;
+    atomic_set(&nrdy,0);
+    thread_slab = slab_cache_create("thread_slab",
+                    sizeof(thread_t),0,
+                    thr_constructor, thr_destructor, 0);
+#ifdef ARCH_HAS_FPU
+    fpu_context_slab = slab_cache_create("fpu_slab",
+                         sizeof(fpu_context_t),
+                         FPU_CONTEXT_ALIGN,
+                         NULL, NULL, 0);
+#endif
+    btree_create(&threads_btree);
+}
+/** Make thread ready
+ *
+ * Switch thread t to the ready state.
+ *
+ * @param t Thread to make ready.
+ *
+ */
+void thread_ready(thread_t *t)
+{
+    cpu_t *cpu;
+    runq_t *r;
+    ipl_t ipl;
+    int i, avg;
+    ipl = interrupts_disable();
+    spinlock_lock(&t->lock);
+    ASSERT(! (t->state == Ready));
+    i = (t->priority < RQ_COUNT -1) ? ++t->priority : t->priority;
+    cpu = CPU;
+    if (t->flags & X_WIRED) {
+        cpu = t->cpu;
+    }
+    t->state = Ready;
+    spinlock_unlock(&t->lock);
+    /*
+     * Append t to respective ready queue on respective processor.
+     */
+    r = &cpu->rq[i];
+    spinlock_lock(&r->lock);
+    list_append(&t->rq_link, &r->rq_head);
+    r->n++;
+    spinlock_unlock(&r->lock);
+    atomic_inc(&nrdy);
+    avg = atomic_get(&nrdy) / config.cpu_active;
+    atomic_inc(&cpu->nrdy);
+    interrupts_restore(ipl);
+}
+/** Destroy thread memory structure
+ *
+ * Detach thread from all queues, cpus etc. and destroy it.
+ *
+ * Assume thread->lock is held!!
+ */
+void thread_destroy(thread_t *t)
+{
+    bool destroy_task = false;
+    ASSERT(t->state == Exiting || t->state == Undead);
+    ASSERT(t->task);
+    ASSERT(t->cpu);
+    spinlock_lock(&t->cpu->lock);
+    if(t->cpu->fpu_owner==t)
+        t->cpu->fpu_owner=NULL;
+    spinlock_unlock(&t->cpu->lock);
+    spinlock_unlock(&t->lock);
+    spinlock_lock(&threads_lock);
+    btree_remove(&threads_btree, (btree_key_t) ((__address ) t), NULL);
+    spinlock_unlock(&threads_lock);
+    /*
+     * Detach from the containing task.
+     */
+    spinlock_lock(&t->task->lock);
+    list_remove(&t->th_link);
+    if (--t->task->refcount == 0) {
+        t->task->accept_new_threads = false;
+        destroy_task = true;
+    }
+    spinlock_unlock(&t->task->lock);
+    if (destroy_task)
+        task_destroy(t->task);
+    slab_free(thread_slab, t);
+}
+/** Create new thread
+ *
+ * Create a new thread.
+ *
+ * @param func  Thread's implementing function.
+ * @param arg   Thread's implementing function argument.
+ * @param task  Task to which the thread belongs.
+ * @param flags Thread flags.
+ * @param name  Symbolic name.
+ *
+ * @return New thread's structure on success, NULL on failure.
+ *
+ */
+thread_t *thread_create(void (* func)(void *), void *arg, task_t *task, int flags, char *name)
+{
+    thread_t *t;
+    ipl_t ipl;
+    t = (thread_t *) slab_alloc(thread_slab, 0);
+    if (!t)
+        return NULL;
+    thread_create_arch(t);
+    /* Not needed, but good for debugging */
+    memsetb((__address)t->kstack, THREAD_STACK_SIZE * 1<<STACK_FRAMES, 0);
+    ipl = interrupts_disable();
+    spinlock_lock(&tidlock);
+    t->tid = ++last_tid;
+    spinlock_unlock(&tidlock);
+    interrupts_restore(ipl);
+    context_save(&t->saved_context);
+    context_set(&t->saved_context, FADDR(cushion), (__address) t->kstack, THREAD_STACK_SIZE);
+    the_initialize((the_t *) t->kstack);
+    ipl = interrupts_disable();
+    t->saved_context.ipl = interrupts_read();
+    interrupts_restore(ipl);
+    memcpy(t->name, name, THREAD_NAME_BUFLEN);
+    t->thread_code = func;
+    t->thread_arg = arg;
+    t->ticks = -1;
+    t->priority = -1;       /* start in rq[0] */
+    t->cpu = NULL;
+    t->flags = 0;
+    t->state = Entering;
+    t->call_me = NULL;
+    t->call_me_with = NULL;
+    timeout_initialize(&t->sleep_timeout);
+    t->sleep_interruptible = false;
+    t->sleep_queue = NULL;
+    t->timeout_pending = 0;
+    t->in_copy_from_uspace = false;
+    t->in_copy_to_uspace = false;
+    t->interrupted = false;
+    t->join_type = None;
+    t->detached = false;
+    waitq_initialize(&t->join_wq);
+    t->rwlock_holder_type = RWLOCK_NONE;
+    t->task = task;
+    t->fpu_context_exists = 0;
+    t->fpu_context_engaged = 0;
+    /*
+     * Attach to the containing task.
+     */
+    ipl = interrupts_disable();
+    spinlock_lock(&task->lock);
+    if (!task->accept_new_threads) {
+        spinlock_unlock(&task->lock);
+        slab_free(thread_slab, t);
+        interrupts_restore(ipl);
+        return NULL;
+    }
+    list_append(&t->th_link, &task->th_head);
+    if (task->refcount++ == 0)
+        task->main_thread = t;
+    spinlock_unlock(&task->lock);
+    /*
+     * Register this thread in the system-wide list.
+     */
+    spinlock_lock(&threads_lock);
+    btree_insert(&threads_btree, (btree_key_t) ((__address) t), (void *) t, NULL);
+    spinlock_unlock(&threads_lock);
+    interrupts_restore(ipl);
+    return t;
+}
+/** Terminate thread.
+ *
+ * End current thread execution and switch it to the exiting
+ * state. All pending timeouts are executed.
+ *
+ */
+void thread_exit(void)
+{
+    ipl_t ipl;
+restart:
+    ipl = interrupts_disable();
+    spinlock_lock(&THREAD->lock);
+    if (THREAD->timeout_pending) { /* busy waiting for timeouts in progress */
+        spinlock_unlock(&THREAD->lock);
+        interrupts_restore(ipl);
+        goto restart;
+    }
+    THREAD->state = Exiting;
+    spinlock_unlock(&THREAD->lock);
+    scheduler();
+    /* Not reached */
+    while (1)
+        ;
+}
+/** Thread sleep
+ *
+ * Suspend execution of the current thread.
+ *
+ * @param sec Number of seconds to sleep.
+ *
+ */
+void thread_sleep(__u32 sec)
+{
+    thread_usleep(sec*1000000);
+}
+/** Wait for another thread to exit.
+ *
+ * @param t Thread to join on exit.
+ * @param usec Timeout in microseconds.
+ * @param flags Mode of operation.
+ *
+ * @return An error code from errno.h or an error code from synch.h.
+ */
+int thread_join_timeout(thread_t *t, __u32 usec, int flags)
+{
+    ipl_t ipl;
+    int rc;
+    if (t == THREAD)
+        return EINVAL;
+    /*
+     * Since thread join can only be called once on an undetached thread,
+     * the thread pointer is guaranteed to be still valid.
+     */
+    ipl = interrupts_disable();
+    spinlock_lock(&t->lock);
+    ASSERT(!t->detached);
+    spinlock_unlock(&t->lock);
+    interrupts_restore(ipl);
+    rc = waitq_sleep_timeout(&t->join_wq, usec, flags);
+    return rc;
+}
+/** Detach thread.
+ *
+ * Mark the thread as detached, if the thread is already in the Undead state,
+ * deallocate its resources.
+ *
+ * @param t Thread to be detached.
+ */
+void thread_detach(thread_t *t)
+{
+    ipl_t ipl;
+    /*
+     * Since the thread is expected to not be already detached,
+     * pointer to it must be still valid.
+     */
+    ipl = interrupts_disable();
+    spinlock_lock(&t->lock);
+    ASSERT(!t->detached);
+    if (t->state == Undead) {
+        thread_destroy(t);  /* unlocks &t->lock */
+        interrupts_restore(ipl);
+        return;
+    } else {
+        t->detached = true;
+    }
+    spinlock_unlock(&t->lock);
+    interrupts_restore(ipl);
+}
+/** Thread usleep
+ *
+ * Suspend execution of the current thread.
+ *
+ * @param usec Number of microseconds to sleep.
+ *
+ */
+void thread_usleep(__u32 usec)
+{
+    waitq_t wq;
+    waitq_initialize(&wq);
+    (void) waitq_sleep_timeout(&wq, usec, SYNCH_FLAGS_NON_BLOCKING);
+}
+/** Register thread out-of-context invocation
+ *
+ * Register a function and its argument to be executed
+ * on next context switch to the current thread.
+ *
+ * @param call_me      Out-of-context function.
+ * @param call_me_with Out-of-context function argument.
+ *
+ */
+void thread_register_call_me(void (* call_me)(void *), void *call_me_with)
+{
+    ipl_t ipl;
+    ipl = interrupts_disable();
+    spinlock_lock(&THREAD->lock);
+    THREAD->call_me = call_me;
+    THREAD->call_me_with = call_me_with;
+    spinlock_unlock(&THREAD->lock);
+    interrupts_restore(ipl);
+}
+/** Print list of threads debug info */
+void thread_print_list(void)
+{
+    link_t *cur;
+    ipl_t ipl;
+    /* Messing with thread structures, avoid deadlock */
+    ipl = interrupts_disable();
+    spinlock_lock(&threads_lock);
+    for (cur = threads_btree.leaf_head.next; cur != &threads_btree.leaf_head; cur = cur->next) {
+        btree_node_t *node;
+        int i;
+        node = list_get_instance(cur, btree_node_t, leaf_link);
+        for (i = 0; i < node->keys; i++) {
+            thread_t *t;
+            t = (thread_t *) node->value[i];
+            printf("%s: address=%#zx, tid=%zd, state=%s, task=%#zx, code=%#zx, stack=%#zx, cpu=",
+                t->name, t, t->tid, thread_states[t->state], t->task, t->thread_code, t->kstack);
+            if (t->cpu)
+                printf("cpu%zd", t->cpu->id);
+            else
+                printf("none");
+            if (t->state == Sleeping) {
+                printf(", kst=%#zx", t->kstack);
+                printf(", wq=%#zx", t->sleep_queue);
+            }
+            printf("\n");
+        }
+    }
+    spinlock_unlock(&threads_lock);
+    interrupts_restore(ipl);
+}
+/** Check whether thread exists.
+ *
+ * Note that threads_lock must be already held and
+ * interrupts must be already disabled.
+ *
+ * @param t Pointer to thread.
+ *
+ * @return True if thread t is known to the system, false otherwise.
+ */
+bool thread_exists(thread_t *t)
+{
+    btree_node_t *leaf;
+    return btree_search(&threads_btree, (btree_key_t) ((__address) t), &leaf) != NULL;
+}
+/** Process syscall to create new thread.
+ *
+ */
+__native sys_thread_create(uspace_arg_t *uspace_uarg, char *uspace_name)
+{
+    thread_t *t;
+    char namebuf[THREAD_NAME_BUFLEN];
+    uspace_arg_t *kernel_uarg;
+    __u32 tid;
+    int rc;
+    rc = copy_from_uspace(namebuf, uspace_name, THREAD_NAME_BUFLEN);
+    if (rc != 0)
+        return (__native) rc;
+    kernel_uarg = (uspace_arg_t *) malloc(sizeof(uspace_arg_t), 0);
+    rc = copy_from_uspace(kernel_uarg, uspace_uarg, sizeof(uspace_arg_t));
+    if (rc != 0) {
+        free(kernel_uarg);
+        return (__native) rc;
+    }
+    if ((t = thread_create(uinit, kernel_uarg, TASK, 0, namebuf))) {
+        tid = t->tid;
+        thread_ready(t);
+        return (__native) tid;
+    } else {
+        free(kernel_uarg);
+    }
+    return (__native) ENOMEM;
+}
+/** Process syscall to terminate thread.
+ *
+ */
+__native sys_thread_exit(int uspace_status)
+{
+    thread_exit();
+    /* Unreachable */
+    return 0;
+}
+ /** @}
+ */

 /tags/0.2.0.2/kernel/generic/src/proc/scheduler.c
 ,0 → 1,703
+/*
+ * Copyright (C) 2001-2004 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup genericproc
+ * @{
+ */
+/**
+ * @file
+ * @brief   Scheduler and load balancing.
+ *
+ * This file contains the scheduler and kcpulb kernel thread which
+ * performs load-balancing of per-CPU run queues.
+ */
+#include <proc/scheduler.h>
+#include <proc/thread.h>
+#include <proc/task.h>
+#include <mm/frame.h>
+#include <mm/page.h>
+#include <mm/as.h>
+#include <time/delay.h>
+#include <arch/asm.h>
+#include <arch/faddr.h>
+#include <atomic.h>
+#include <synch/spinlock.h>
+#include <config.h>
+#include <context.h>
+#include <func.h>
+#include <arch.h>
+#include <adt/list.h>
+#include <panic.h>
+#include <typedefs.h>
+#include <cpu.h>
+#include <print.h>
+#include <debug.h>
+static void before_task_runs(void);
+static void before_thread_runs(void);
+static void after_thread_ran(void);
+static void scheduler_separated_stack(void);
+atomic_t nrdy;  /**< Number of ready threads in the system. */
+/** Carry out actions before new task runs. */
+void before_task_runs(void)
+{
+    before_task_runs_arch();
+}
+/** Take actions before new thread runs.
+ *
+ * Perform actions that need to be
+ * taken before the newly selected
+ * tread is passed control.
+ *
+ * THREAD->lock is locked on entry
+ *
+ */
+void before_thread_runs(void)
+{
+    before_thread_runs_arch();
+#ifdef CONFIG_FPU_LAZY
+    if(THREAD==CPU->fpu_owner)
+        fpu_enable();
+    else
+        fpu_disable();
+#else
+    fpu_enable();
+    if (THREAD->fpu_context_exists)
+        fpu_context_restore(THREAD->saved_fpu_context);
+    else {
+        fpu_init();
+        THREAD->fpu_context_exists=1;
+    }
+#endif
+}
+/** Take actions after THREAD had run.
+ *
+ * Perform actions that need to be
+ * taken after the running thread
+ * had been preempted by the scheduler.
+ *
+ * THREAD->lock is locked on entry
+ *
+ */
+void after_thread_ran(void)
+{
+    after_thread_ran_arch();
+}
+#ifdef CONFIG_FPU_LAZY
+void scheduler_fpu_lazy_request(void)
+{
+restart:
+    fpu_enable();
+    spinlock_lock(&CPU->lock);
+    /* Save old context */
+    if (CPU->fpu_owner != NULL) {
+        spinlock_lock(&CPU->fpu_owner->lock);
+        fpu_context_save(CPU->fpu_owner->saved_fpu_context);
+        /* don't prevent migration */
+        CPU->fpu_owner->fpu_context_engaged=0;
+        spinlock_unlock(&CPU->fpu_owner->lock);
+        CPU->fpu_owner = NULL;
+    }
+    spinlock_lock(&THREAD->lock);
+    if (THREAD->fpu_context_exists) {
+        fpu_context_restore(THREAD->saved_fpu_context);
+    } else {
+        /* Allocate FPU context */
+        if (!THREAD->saved_fpu_context) {
+            /* Might sleep */
+            spinlock_unlock(&THREAD->lock);
+            spinlock_unlock(&CPU->lock);
+            THREAD->saved_fpu_context = slab_alloc(fpu_context_slab,
+);
+            /* We may have switched CPUs during slab_alloc */
+            goto restart;
+        }
+        fpu_init();
+        THREAD->fpu_context_exists=1;
+    }
+    CPU->fpu_owner=THREAD;
+    THREAD->fpu_context_engaged = 1;
+    spinlock_unlock(&THREAD->lock);
+    spinlock_unlock(&CPU->lock);
+}
+#endif
+/** Initialize scheduler
+ *
+ * Initialize kernel scheduler.
+ *
+ */
+void scheduler_init(void)
+{
+}
+/** Get thread to be scheduled
+ *
+ * Get the optimal thread to be scheduled
+ * according to thread accounting and scheduler
+ * policy.
+ *
+ * @return Thread to be scheduled.
+ *
+ */
+static thread_t *find_best_thread(void)
+{
+    thread_t *t;
+    runq_t *r;
+    int i;
+    ASSERT(CPU != NULL);
+loop:
+    interrupts_enable();
+    if (atomic_get(&CPU->nrdy) == 0) {
+        /*
+         * For there was nothing to run, the CPU goes to sleep
+         * until a hardware interrupt or an IPI comes.
+         * This improves energy saving and hyperthreading.
+         */
+        /*
+         * An interrupt might occur right now and wake up a thread.
+         * In such case, the CPU will continue to go to sleep
+         * even though there is a runnable thread.
+         */
+         cpu_sleep();
+         goto loop;
+    }
+    interrupts_disable();
+    for (i = 0; i<RQ_COUNT; i++) {
+        r = &CPU->rq[i];
+        spinlock_lock(&r->lock);
+        if (r->n == 0) {
+            /*
+             * If this queue is empty, try a lower-priority queue.
+             */
+            spinlock_unlock(&r->lock);
+            continue;
+        }
+        atomic_dec(&CPU->nrdy);
+        atomic_dec(&nrdy);
+        r->n--;
+        /*
+         * Take the first thread from the queue.
+         */
+        t = list_get_instance(r->rq_head.next, thread_t, rq_link);
+        list_remove(&t->rq_link);
+        spinlock_unlock(&r->lock);
+        spinlock_lock(&t->lock);
+        t->cpu = CPU;
+        t->ticks = us2ticks((i+1)*10000);
+        t->priority = i;    /* correct rq index */
+        /*
+         * Clear the X_STOLEN flag so that t can be migrated when load balancing needs emerge.
+         */
+        t->flags &= ~X_STOLEN;
+        spinlock_unlock(&t->lock);
+        return t;
+    }
+    goto loop;
+}
+/** Prevent rq starvation
+ *
+ * Prevent low priority threads from starving in rq's.
+ *
+ * When the function decides to relink rq's, it reconnects
+ * respective pointers so that in result threads with 'pri'
+ * greater or equal start are moved to a higher-priority queue.
+ *
+ * @param start Threshold priority.
+ *
+ */
+static void relink_rq(int start)
+{
+    link_t head;
+    runq_t *r;
+    int i, n;
+    list_initialize(&head);
+    spinlock_lock(&CPU->lock);
+    if (CPU->needs_relink > NEEDS_RELINK_MAX) {
+        for (i = start; i<RQ_COUNT-1; i++) {
+            /* remember and empty rq[i + 1] */
+            r = &CPU->rq[i + 1];
+            spinlock_lock(&r->lock);
+            list_concat(&head, &r->rq_head);
+            n = r->n;
+            r->n = 0;
+            spinlock_unlock(&r->lock);
+            /* append rq[i + 1] to rq[i] */
+            r = &CPU->rq[i];
+            spinlock_lock(&r->lock);
+            list_concat(&r->rq_head, &head);
+            r->n += n;
+            spinlock_unlock(&r->lock);
+        }
+        CPU->needs_relink = 0;
+    }
+    spinlock_unlock(&CPU->lock);
+}
+/** The scheduler
+ *
+ * The thread scheduling procedure.
+ * Passes control directly to
+ * scheduler_separated_stack().
+ *
+ */
+void scheduler(void)
+{
+    volatile ipl_t ipl;
+    ASSERT(CPU != NULL);
+    ipl = interrupts_disable();
+    if (atomic_get(&haltstate))
+        halt();
+    if (THREAD) {
+        spinlock_lock(&THREAD->lock);
+#ifndef CONFIG_FPU_LAZY
+        fpu_context_save(THREAD->saved_fpu_context);
+#endif
+        if (!context_save(&THREAD->saved_context)) {
+            /*
+             * This is the place where threads leave scheduler();
+             */
+            spinlock_unlock(&THREAD->lock);
+            interrupts_restore(THREAD->saved_context.ipl);
+            return;
+        }
+        /*
+         * Interrupt priority level of preempted thread is recorded here
+         * to facilitate scheduler() invocations from interrupts_disable()'d
+         * code (e.g. waitq_sleep_timeout()).
+         */
+        THREAD->saved_context.ipl = ipl;
+    }
+    /*
+     * Through the 'THE' structure, we keep track of THREAD, TASK, CPU, VM
+     * and preemption counter. At this point THE could be coming either
+     * from THREAD's or CPU's stack.
+     */
+    the_copy(THE, (the_t *) CPU->stack);
+    /*
+     * We may not keep the old stack.
+     * Reason: If we kept the old stack and got blocked, for instance, in
+     * find_best_thread(), the old thread could get rescheduled by another
+     * CPU and overwrite the part of its own stack that was also used by
+     * the scheduler on this CPU.
+     *
+     * Moreover, we have to bypass the compiler-generated POP sequence
+     * which is fooled by SP being set to the very top of the stack.
+     * Therefore the scheduler() function continues in
+     * scheduler_separated_stack().
+     */
+    context_save(&CPU->saved_context);
+    context_set(&CPU->saved_context, FADDR(scheduler_separated_stack), (__address) CPU->stack, CPU_STACK_SIZE);
+    context_restore(&CPU->saved_context);
+    /* not reached */
+}
+/** Scheduler stack switch wrapper
+ *
+ * Second part of the scheduler() function
+ * using new stack. Handling the actual context
+ * switch to a new thread.
+ *
+ * Assume THREAD->lock is held.
+ */
+void scheduler_separated_stack(void)
+{
+    int priority;
+    ASSERT(CPU != NULL);
+    if (THREAD) {
+        /* must be run after the switch to scheduler stack */
+        after_thread_ran();
+        switch (THREAD->state) {
+            case Running:
+            spinlock_unlock(&THREAD->lock);
+            thread_ready(THREAD);
+            break;
+            case Exiting:
+repeat:
+                if (THREAD->detached) {
+                thread_destroy(THREAD);
+            } else {
+                /*
+                 * The thread structure is kept allocated until somebody
+                 * calls thread_detach() on it.
+                 */
+                if (!spinlock_trylock(&THREAD->join_wq.lock)) {
+                    /*
+                     * Avoid deadlock.
+                     */
+                    spinlock_unlock(&THREAD->lock);
+                    delay(10);
+                    spinlock_lock(&THREAD->lock);
+                    goto repeat;
+                }
+                _waitq_wakeup_unsafe(&THREAD->join_wq, false);
+                spinlock_unlock(&THREAD->join_wq.lock);
+                THREAD->state = Undead;
+                spinlock_unlock(&THREAD->lock);
+            }
+            break;
+            case Sleeping:
+            /*
+             * Prefer the thread after it's woken up.
+             */
+            THREAD->priority = -1;
+            /*
+             * We need to release wq->lock which we locked in waitq_sleep().
+             * Address of wq->lock is kept in THREAD->sleep_queue.
+             */
+            spinlock_unlock(&THREAD->sleep_queue->lock);
+            /*
+             * Check for possible requests for out-of-context invocation.
+             */
+            if (THREAD->call_me) {
+                THREAD->call_me(THREAD->call_me_with);
+                THREAD->call_me = NULL;
+                THREAD->call_me_with = NULL;
+            }
+            spinlock_unlock(&THREAD->lock);
+            break;
+            default:
+            /*
+             * Entering state is unexpected.
+             */
+            panic("tid%d: unexpected state %s\n", THREAD->tid, thread_states[THREAD->state]);
+            break;
+        }
+        THREAD = NULL;
+    }
+    THREAD = find_best_thread();
+    spinlock_lock(&THREAD->lock);
+    priority = THREAD->priority;
+    spinlock_unlock(&THREAD->lock);
+    relink_rq(priority);
+    /*
+     * If both the old and the new task are the same, lots of work is avoided.
+     */
+    if (TASK != THREAD->task) {
+        as_t *as1 = NULL;
+        as_t *as2;
+        if (TASK) {
+            spinlock_lock(&TASK->lock);
+            as1 = TASK->as;
+            spinlock_unlock(&TASK->lock);
+        }
+        spinlock_lock(&THREAD->task->lock);
+        as2 = THREAD->task->as;
+        spinlock_unlock(&THREAD->task->lock);
+        /*
+         * Note that it is possible for two tasks to share one address space.
+         */
+        if (as1 != as2) {
+            /*
+             * Both tasks and address spaces are different.
+             * Replace the old one with the new one.
+             */
+            as_switch(as1, as2);
+        }
+        TASK = THREAD->task;
+        before_task_runs();
+    }
+    spinlock_lock(&THREAD->lock);
+    THREAD->state = Running;
+#ifdef SCHEDULER_VERBOSE
+    printf("cpu%d: tid %d (priority=%d,ticks=%lld,nrdy=%ld)\n", CPU->id, THREAD->tid, THREAD->priority, THREAD->ticks, atomic_get(&CPU->nrdy));
+#endif
+    /*
+     * Some architectures provide late kernel PA2KA(identity)
+     * mapping in a page fault handler. However, the page fault
+     * handler uses the kernel stack of the running thread and
+     * therefore cannot be used to map it. The kernel stack, if
+     * necessary, is to be mapped in before_thread_runs(). This
+     * function must be executed before the switch to the new stack.
+     */
+    before_thread_runs();
+    /*
+     * Copy the knowledge of CPU, TASK, THREAD and preemption counter to thread's stack.
+     */
+    the_copy(THE, (the_t *) THREAD->kstack);
+    context_restore(&THREAD->saved_context);
+    /* not reached */
+}
+#ifdef CONFIG_SMP
+/** Load balancing thread
+ *
+ * SMP load balancing thread, supervising thread supplies
+ * for the CPU it's wired to.
+ *
+ * @param arg Generic thread argument (unused).
+ *
+ */
+void kcpulb(void *arg)
+{
+    thread_t *t;
+    int count, average, i, j, k = 0;
+    ipl_t ipl;
+    /*
+     * Detach kcpulb as nobody will call thread_join_timeout() on it.
+     */
+    thread_detach(THREAD);
+loop:
+    /*
+     * Work in 1s intervals.
+     */
+    thread_sleep(1);
+not_satisfied:
+    /*
+     * Calculate the number of threads that will be migrated/stolen from
+     * other CPU's. Note that situation can have changed between two
+     * passes. Each time get the most up to date counts.
+     */
+    average = atomic_get(&nrdy) / config.cpu_active + 1;
+    count = average - atomic_get(&CPU->nrdy);
+    if (count <= 0)
+        goto satisfied;
+    /*
+     * Searching least priority queues on all CPU's first and most priority queues on all CPU's last.
+     */
+    for (j=RQ_COUNT-1; j >= 0; j--) {
+        for (i=0; i < config.cpu_active; i++) {
+            link_t *l;
+            runq_t *r;
+            cpu_t *cpu;
+            cpu = &cpus[(i + k) % config.cpu_active];
+            /*
+             * Not interested in ourselves.
+             * Doesn't require interrupt disabling for kcpulb is X_WIRED.
+             */
+            if (CPU == cpu)
+                continue;
+            if (atomic_get(&cpu->nrdy) <= average)
+                continue;
+            ipl = interrupts_disable();
+            r = &cpu->rq[j];
+            spinlock_lock(&r->lock);
+            if (r->n == 0) {
+                spinlock_unlock(&r->lock);
+                interrupts_restore(ipl);
+                continue;
+            }
+            t = NULL;
+            l = r->rq_head.prev;    /* search rq from the back */
+            while (l != &r->rq_head) {
+                t = list_get_instance(l, thread_t, rq_link);
+                /*
+                 * We don't want to steal CPU-wired threads neither threads already stolen.
+                 * The latter prevents threads from migrating between CPU's without ever being run.
+                 * We don't want to steal threads whose FPU context is still in CPU.
+                 */
+                spinlock_lock(&t->lock);
+                if ( (!(t->flags & (X_WIRED | X_STOLEN))) && (!(t->fpu_context_engaged)) ) {
+                    /*
+                     * Remove t from r.
+                     */
+                    spinlock_unlock(&t->lock);
+                    atomic_dec(&cpu->nrdy);
+                    atomic_dec(&nrdy);
+                    r->n--;
+                    list_remove(&t->rq_link);
+                    break;
+                }
+                spinlock_unlock(&t->lock);
+                l = l->prev;
+                t = NULL;
+            }
+            spinlock_unlock(&r->lock);
+            if (t) {
+                /*
+                 * Ready t on local CPU
+                 */
+                spinlock_lock(&t->lock);
+#ifdef KCPULB_VERBOSE
+                printf("kcpulb%d: TID %d -> cpu%d, nrdy=%ld, avg=%nd\n", CPU->id, t->tid, CPU->id, atomic_get(&CPU->nrdy), atomic_get(&nrdy) / config.cpu_active);
+#endif
+                t->flags |= X_STOLEN;
+                t->state = Entering;
+                spinlock_unlock(&t->lock);
+                thread_ready(t);
+                interrupts_restore(ipl);
+                if (--count == 0)
+                    goto satisfied;
+                /*
+                 * We are not satisfied yet, focus on another CPU next time.
+                 */
+                k++;
+                continue;
+            }
+            interrupts_restore(ipl);
+        }
+    }
+    if (atomic_get(&CPU->nrdy)) {
+        /*
+         * Be a little bit light-weight and let migrated threads run.
+         */
+        scheduler();
+    } else {
+        /*
+         * We failed to migrate a single thread.
+         * Give up this turn.
+         */
+        goto loop;
+    }
+    goto not_satisfied;
+satisfied:
+    goto loop;
+}
+#endif /* CONFIG_SMP */
+/** Print information about threads & scheduler queues */
+void sched_print_list(void)
+{
+    ipl_t ipl;
+    int cpu,i;
+    runq_t *r;
+    thread_t *t;
+    link_t *cur;
+    /* We are going to mess with scheduler structures,
+     * let's not be interrupted */
+    ipl = interrupts_disable();
+    for (cpu=0;cpu < config.cpu_count; cpu++) {
+        if (!cpus[cpu].active)
+            continue;
+        spinlock_lock(&cpus[cpu].lock);
+        printf("cpu%d: address=%p, nrdy=%ld, needs_relink=%ld\n",
+               cpus[cpu].id, &cpus[cpu], atomic_get(&cpus[cpu].nrdy), cpus[cpu].needs_relink);
+        for (i=0; i<RQ_COUNT; i++) {
+            r = &cpus[cpu].rq[i];
+            spinlock_lock(&r->lock);
+            if (!r->n) {
+                spinlock_unlock(&r->lock);
+                continue;
+            }
+            printf("\trq[%d]: ", i);
+            for (cur=r->rq_head.next; cur!=&r->rq_head; cur=cur->next) {
+                t = list_get_instance(cur, thread_t, rq_link);
+                printf("%d(%s) ", t->tid,
+                       thread_states[t->state]);
+            }
+            printf("\n");
+            spinlock_unlock(&r->lock);
+        }
+        spinlock_unlock(&cpus[cpu].lock);
+    }
+    interrupts_restore(ipl);
+}
+ /** @}
+ */

 /tags/0.2.0.2/kernel/generic/src/proc/the.c
 ,0 → 1,77
+/*
+ * Copyright (C) 2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup genericproc
+ * @{
+ */
+/**
+ * @file
+ * @brief   THE structure functions.
+ *
+ * This file contains functions to manage the THE structure.
+ * The THE structure exists at the base address of every kernel
+ * stack and carries information about current settings
+ * (e.g. current CPU, current thread, task and address space
+ * and current preemption counter).
+ */
+#include <arch.h>
+#include <typedefs.h>
+/** Initialize THE structure
+ *
+ * Initialize THE structure passed as argument.
+ *
+ * @param the THE structure to be initialized.
+ */
+void the_initialize(the_t *the)
+{
+    the->preemption_disabled = 0;
+    the->cpu = NULL;
+    the->thread = NULL;
+    the->task = NULL;
+    the->as = NULL;
+}
+/** Copy THE structure
+ *
+ * Copy the source THE structure to the destination THE structure.
+ *
+ * @param src The source THE structure.
+ * @param dst The destination THE structure.
+ */
+void the_copy(the_t *src, the_t *dst)
+{
+    *dst = *src;
+}
+ /** @}
+ */

 /tags/0.2.0.2/kernel/generic/src/mm/as.c
 ,0 → 1,1534
+/*
+ * Copyright (C) 2001-2006 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup genericmm
+ * @{
+ */
+/**
+ * @file
+ * @brief   Address space related functions.
+ *
+ * This file contains address space manipulation functions.
+ * Roughly speaking, this is a higher-level client of
+ * Virtual Address Translation (VAT) subsystem.
+ *
+ * Functionality provided by this file allows one to
+ * create address space and create, resize and share
+ * address space areas.
+ *
+ * @see page.c
+ *
+ */
+#include <mm/as.h>
+#include <arch/mm/as.h>
+#include <mm/page.h>
+#include <mm/frame.h>
+#include <mm/slab.h>
+#include <mm/tlb.h>
+#include <arch/mm/page.h>
+#include <genarch/mm/page_pt.h>
+#include <genarch/mm/page_ht.h>
+#include <mm/asid.h>
+#include <arch/mm/asid.h>
+#include <synch/spinlock.h>
+#include <synch/mutex.h>
+#include <adt/list.h>
+#include <adt/btree.h>
+#include <proc/task.h>
+#include <proc/thread.h>
+#include <arch/asm.h>
+#include <panic.h>
+#include <debug.h>
+#include <print.h>
+#include <memstr.h>
+#include <macros.h>
+#include <arch.h>
+#include <errno.h>
+#include <config.h>
+#include <align.h>
+#include <arch/types.h>
+#include <typedefs.h>
+#include <syscall/copy.h>
+#include <arch/interrupt.h>
+as_operations_t *as_operations = NULL;
+/** This lock protects inactive_as_with_asid_head list. It must be acquired before as_t mutex. */
+SPINLOCK_INITIALIZE(inactive_as_with_asid_lock);
+/**
+ * This list contains address spaces that are not active on any
+ * processor and that have valid ASID.
+ */
+LIST_INITIALIZE(inactive_as_with_asid_head);
+/** Kernel address space. */
+as_t *AS_KERNEL = NULL;
+static int area_flags_to_page_flags(int aflags);
+static as_area_t *find_area_and_lock(as_t *as, __address va);
+static bool check_area_conflicts(as_t *as, __address va, size_t size, as_area_t *avoid_area);
+static void sh_info_remove_reference(share_info_t *sh_info);
+/** Initialize address space subsystem. */
+void as_init(void)
+{
+    as_arch_init();
+    AS_KERNEL = as_create(FLAG_AS_KERNEL);
+    if (!AS_KERNEL)
+        panic("can't create kernel address space\n");
+}
+/** Create address space.
+ *
+ * @param flags Flags that influence way in wich the address space is created.
+ */
+as_t *as_create(int flags)
+{
+    as_t *as;
+    as = (as_t *) malloc(sizeof(as_t), 0);
+    link_initialize(&as->inactive_as_with_asid_link);
+    mutex_initialize(&as->lock);
+    btree_create(&as->as_area_btree);
+    if (flags & FLAG_AS_KERNEL)
+        as->asid = ASID_KERNEL;
+    else
+        as->asid = ASID_INVALID;
+    as->refcount = 0;
+    as->cpu_refcount = 0;
+    as->page_table = page_table_create(flags);
+    return as;
+}
+/** Destroy adress space.
+ *
+ * When there are no tasks referencing this address space (i.e. its refcount is zero),
+ * the address space can be destroyed.
+ */
+void as_destroy(as_t *as)
+{
+    ipl_t ipl;
+    bool cond;
+    ASSERT(as->refcount == 0);
+    /*
+     * Since there is no reference to this area,
+     * it is safe not to lock its mutex.
+     */
+    ipl = interrupts_disable();
+    spinlock_lock(&inactive_as_with_asid_lock);
+    if (as->asid != ASID_INVALID && as != AS_KERNEL) {
+        if (as != AS && as->cpu_refcount == 0)
+            list_remove(&as->inactive_as_with_asid_link);
+        asid_put(as->asid);
+    }
+    spinlock_unlock(&inactive_as_with_asid_lock);
+    /*
+     * Destroy address space areas of the address space.
+     * The B+tee must be walked carefully because it is
+     * also being destroyed.
+     */
+    for (cond = true; cond; ) {
+        btree_node_t *node;
+        ASSERT(!list_empty(&as->as_area_btree.leaf_head));
+        node = list_get_instance(as->as_area_btree.leaf_head.next, btree_node_t, leaf_link);
+        if ((cond = node->keys)) {
+            as_area_destroy(as, node->key[0]);
+        }
+    }
+    btree_destroy(&as->as_area_btree);
+    page_table_destroy(as->page_table);
+    interrupts_restore(ipl);
+    free(as);
+}
+/** Create address space area of common attributes.
+ *
+ * The created address space area is added to the target address space.
+ *
+ * @param as Target address space.
+ * @param flags Flags of the area memory.
+ * @param size Size of area.
+ * @param base Base address of area.
+ * @param attrs Attributes of the area.
+ * @param backend Address space area backend. NULL if no backend is used.
+ * @param backend_data NULL or a pointer to an array holding two void *.
+ *
+ * @return Address space area on success or NULL on failure.
+ */
+as_area_t *as_area_create(as_t *as, int flags, size_t size, __address base, int attrs,
+           mem_backend_t *backend, mem_backend_data_t *backend_data)
+{
+    ipl_t ipl;
+    as_area_t *a;
+    if (base % PAGE_SIZE)
+        return NULL;
+    if (!size)
+        return NULL;
+    /* Writeable executable areas are not supported. */
+    if ((flags & AS_AREA_EXEC) && (flags & AS_AREA_WRITE))
+        return NULL;
+    ipl = interrupts_disable();
+    mutex_lock(&as->lock);
+    if (!check_area_conflicts(as, base, size, NULL)) {
+        mutex_unlock(&as->lock);
+        interrupts_restore(ipl);
+        return NULL;
+    }
+    a = (as_area_t *) malloc(sizeof(as_area_t), 0);
+    mutex_initialize(&a->lock);
+    a->as = as;
+    a->flags = flags;
+    a->attributes = attrs;
+    a->pages = SIZE2FRAMES(size);
+    a->base = base;
+    a->sh_info = NULL;
+    a->backend = backend;
+    if (backend_data)
+        a->backend_data = *backend_data;
+    else
+        memsetb((__address) &a->backend_data, sizeof(a->backend_data), 0);
+    btree_create(&a->used_space);
+    btree_insert(&as->as_area_btree, base, (void *) a, NULL);
+    mutex_unlock(&as->lock);
+    interrupts_restore(ipl);
+    return a;
+}
+/** Find address space area and change it.
+ *
+ * @param as Address space.
+ * @param address Virtual address belonging to the area to be changed. Must be page-aligned.
+ * @param size New size of the virtual memory block starting at address.
+ * @param flags Flags influencing the remap operation. Currently unused.
+ *
+ * @return Zero on success or a value from @ref errno.h otherwise.
+ */
+int as_area_resize(as_t *as, __address address, size_t size, int flags)
+{
+    as_area_t *area;
+    ipl_t ipl;
+    size_t pages;
+    ipl = interrupts_disable();
+    mutex_lock(&as->lock);
+    /*
+     * Locate the area.
+     */
+    area = find_area_and_lock(as, address);
+    if (!area) {
+        mutex_unlock(&as->lock);
+        interrupts_restore(ipl);
+        return ENOENT;
+    }
+    if (area->backend == &phys_backend) {
+        /*
+         * Remapping of address space areas associated
+         * with memory mapped devices is not supported.
+         */
+        mutex_unlock(&area->lock);
+        mutex_unlock(&as->lock);
+        interrupts_restore(ipl);
+        return ENOTSUP;
+    }
+    if (area->sh_info) {
+        /*
+         * Remapping of shared address space areas
+         * is not supported.
+         */
+        mutex_unlock(&area->lock);
+        mutex_unlock(&as->lock);
+        interrupts_restore(ipl);
+        return ENOTSUP;
+    }
+    pages = SIZE2FRAMES((address - area->base) + size);
+    if (!pages) {
+        /*
+         * Zero size address space areas are not allowed.
+         */
+        mutex_unlock(&area->lock);
+        mutex_unlock(&as->lock);
+        interrupts_restore(ipl);
+        return EPERM;
+    }
+    if (pages < area->pages) {
+        bool cond;
+        __address start_free = area->base + pages*PAGE_SIZE;
+        /*
+         * Shrinking the area.
+         * No need to check for overlaps.
+         */
+        /*
+         * Start TLB shootdown sequence.
+         */
+        tlb_shootdown_start(TLB_INVL_PAGES, AS->asid, area->base + pages*PAGE_SIZE, area->pages - pages);
+        /*
+         * Remove frames belonging to used space starting from
+         * the highest addresses downwards until an overlap with
+         * the resized address space area is found. Note that this
+         * is also the right way to remove part of the used_space
+         * B+tree leaf list.
+         */
+        for (cond = true; cond;) {
+            btree_node_t *node;
+            ASSERT(!list_empty(&area->used_space.leaf_head));
+            node = list_get_instance(area->used_space.leaf_head.prev, btree_node_t, leaf_link);
+            if ((cond = (bool) node->keys)) {
+                __address b = node->key[node->keys - 1];
+                count_t c = (count_t) node->value[node->keys - 1];
+                int i = 0;
+                if (overlaps(b, c*PAGE_SIZE, area->base, pages*PAGE_SIZE)) {
+                    if (b + c*PAGE_SIZE <= start_free) {
+                        /*
+                         * The whole interval fits completely
+                         * in the resized address space area.
+                         */
+                        break;
+                    }
+                    /*
+                     * Part of the interval corresponding to b and c
+                     * overlaps with the resized address space area.
+                     */
+                    cond = false;   /* we are almost done */
+                    i = (start_free - b) >> PAGE_WIDTH;
+                    if (!used_space_remove(area, start_free, c - i))
+                        panic("Could not remove used space.");
+                } else {
+                    /*
+                     * The interval of used space can be completely removed.
+                     */
+                    if (!used_space_remove(area, b, c))
+                        panic("Could not remove used space.\n");
+                }
+                for (; i < c; i++) {
+                    pte_t *pte;
+                    page_table_lock(as, false);
+                    pte = page_mapping_find(as, b + i*PAGE_SIZE);
+                    ASSERT(pte && PTE_VALID(pte) && PTE_PRESENT(pte));
+                    if (area->backend && area->backend->frame_free) {
+                        area->backend->frame_free(area,
+                            b + i*PAGE_SIZE, PTE_GET_FRAME(pte));
+                    }
+                    page_mapping_remove(as, b + i*PAGE_SIZE);
+                    page_table_unlock(as, false);
+                }
+            }
+        }
+        /*
+         * Finish TLB shootdown sequence.
+         */
+        tlb_invalidate_pages(AS->asid, area->base + pages*PAGE_SIZE, area->pages - pages);
+        tlb_shootdown_finalize();
+    } else {
+        /*
+         * Growing the area.
+         * Check for overlaps with other address space areas.
+         */
+        if (!check_area_conflicts(as, address, pages * PAGE_SIZE, area)) {
+            mutex_unlock(&area->lock);
+            mutex_unlock(&as->lock);
+            interrupts_restore(ipl);
+            return EADDRNOTAVAIL;
+        }
+    }
+    area->pages = pages;
+    mutex_unlock(&area->lock);
+    mutex_unlock(&as->lock);
+    interrupts_restore(ipl);
+    return 0;
+}
+/** Destroy address space area.
+ *
+ * @param as Address space.
+ * @param address Address withing the area to be deleted.
+ *
+ * @return Zero on success or a value from @ref errno.h on failure.
+ */
+int as_area_destroy(as_t *as, __address address)
+{
+    as_area_t *area;
+    __address base;
+    link_t *cur;
+    ipl_t ipl;
+    ipl = interrupts_disable();
+    mutex_lock(&as->lock);
+    area = find_area_and_lock(as, address);
+    if (!area) {
+        mutex_unlock(&as->lock);
+        interrupts_restore(ipl);
+        return ENOENT;
+    }
+    base = area->base;
+    /*
+     * Start TLB shootdown sequence.
+     */
+    tlb_shootdown_start(TLB_INVL_PAGES, AS->asid, area->base, area->pages);
+    /*
+     * Visit only the pages mapped by used_space B+tree.
+     */
+    for (cur = area->used_space.leaf_head.next; cur != &area->used_space.leaf_head; cur = cur->next) {
+        btree_node_t *node;
+        int i;
+        node = list_get_instance(cur, btree_node_t, leaf_link);
+        for (i = 0; i < node->keys; i++) {
+            __address b = node->key[i];
+            count_t j;
+            pte_t *pte;
+            for (j = 0; j < (count_t) node->value[i]; j++) {
+                page_table_lock(as, false);
+                pte = page_mapping_find(as, b + j*PAGE_SIZE);
+                ASSERT(pte && PTE_VALID(pte) && PTE_PRESENT(pte));
+                if (area->backend && area->backend->frame_free) {
+                    area->backend->frame_free(area,
+                        b + j*PAGE_SIZE, PTE_GET_FRAME(pte));
+                }
+                page_mapping_remove(as, b + j*PAGE_SIZE);
+                page_table_unlock(as, false);
+            }
+        }
+    }
+    /*
+     * Finish TLB shootdown sequence.
+     */
+    tlb_invalidate_pages(AS->asid, area->base, area->pages);
+    tlb_shootdown_finalize();
+    btree_destroy(&area->used_space);
+    area->attributes |= AS_AREA_ATTR_PARTIAL;
+    if (area->sh_info)
+        sh_info_remove_reference(area->sh_info);
+    mutex_unlock(&area->lock);
+    /*
+     * Remove the empty area from address space.
+     */
+    btree_remove(&AS->as_area_btree, base, NULL);
+    free(area);
+    mutex_unlock(&AS->lock);
+    interrupts_restore(ipl);
+    return 0;
+}
+/** Share address space area with another or the same address space.
+ *
+ * Address space area mapping is shared with a new address space area.
+ * If the source address space area has not been shared so far,
+ * a new sh_info is created. The new address space area simply gets the
+ * sh_info of the source area. The process of duplicating the
+ * mapping is done through the backend share function.
+ *
+ * @param src_as Pointer to source address space.
+ * @param src_base Base address of the source address space area.
+ * @param acc_size Expected size of the source area.
+ * @param dst_as Pointer to destination address space.
+ * @param dst_base Target base address.
+ * @param dst_flags_mask Destination address space area flags mask.
+ *
+ * @return Zero on success or ENOENT if there is no such task or
+ *     if there is no such address space area,
+ *     EPERM if there was a problem in accepting the area or
+ *     ENOMEM if there was a problem in allocating destination
+ *     address space area. ENOTSUP is returned if an attempt
+ *     to share non-anonymous address space area is detected.
+ */
+int as_area_share(as_t *src_as, __address src_base, size_t acc_size,
+          as_t *dst_as, __address dst_base, int dst_flags_mask)
+{
+    ipl_t ipl;
+    int src_flags;
+    size_t src_size;
+    as_area_t *src_area, *dst_area;
+    share_info_t *sh_info;
+    mem_backend_t *src_backend;
+    mem_backend_data_t src_backend_data;
+    ipl = interrupts_disable();
+    mutex_lock(&src_as->lock);
+    src_area = find_area_and_lock(src_as, src_base);
+    if (!src_area) {
+        /*
+         * Could not find the source address space area.
+         */
+        mutex_unlock(&src_as->lock);
+        interrupts_restore(ipl);
+        return ENOENT;
+    }
+    if (!src_area->backend || !src_area->backend->share) {
+        /*
+         * There is now backend or the backend does not
+         * know how to share the area.
+         */
+        mutex_unlock(&src_area->lock);
+        mutex_unlock(&src_as->lock);
+        interrupts_restore(ipl);
+        return ENOTSUP;
+    }
+    src_size = src_area->pages * PAGE_SIZE;
+    src_flags = src_area->flags;
+    src_backend = src_area->backend;
+    src_backend_data = src_area->backend_data;
+    /* Share the cacheable flag from the original mapping */
+    if (src_flags & AS_AREA_CACHEABLE)
+        dst_flags_mask |= AS_AREA_CACHEABLE;
+    if (src_size != acc_size || (src_flags & dst_flags_mask) != dst_flags_mask) {
+        mutex_unlock(&src_area->lock);
+        mutex_unlock(&src_as->lock);
+        interrupts_restore(ipl);
+        return EPERM;
+    }
+    /*
+     * Now we are committed to sharing the area.
+     * First prepare the area for sharing.
+     * Then it will be safe to unlock it.
+     */
+    sh_info = src_area->sh_info;
+    if (!sh_info) {
+        sh_info = (share_info_t *) malloc(sizeof(share_info_t), 0);
+        mutex_initialize(&sh_info->lock);
+        sh_info->refcount = 2;
+        btree_create(&sh_info->pagemap);
+        src_area->sh_info = sh_info;
+    } else {
+        mutex_lock(&sh_info->lock);
+        sh_info->refcount++;
+        mutex_unlock(&sh_info->lock);
+    }
+    src_area->backend->share(src_area);
+    mutex_unlock(&src_area->lock);
+    mutex_unlock(&src_as->lock);
+    /*
+     * Create copy of the source address space area.
+     * The destination area is created with AS_AREA_ATTR_PARTIAL
+     * attribute set which prevents race condition with
+     * preliminary as_page_fault() calls.
+     * The flags of the source area are masked against dst_flags_mask
+     * to support sharing in less privileged mode.
+     */
+    dst_area = as_area_create(dst_as, dst_flags_mask, src_size, dst_base,
+                  AS_AREA_ATTR_PARTIAL, src_backend, &src_backend_data);
+    if (!dst_area) {
+        /*
+         * Destination address space area could not be created.
+         */
+        sh_info_remove_reference(sh_info);
+        interrupts_restore(ipl);
+        return ENOMEM;
+    }
+    /*
+     * Now the destination address space area has been
+     * fully initialized. Clear the AS_AREA_ATTR_PARTIAL
+     * attribute and set the sh_info.
+     */
+    mutex_lock(&dst_area->lock);
+    dst_area->attributes &= ~AS_AREA_ATTR_PARTIAL;
+    dst_area->sh_info = sh_info;
+    mutex_unlock(&dst_area->lock);
+    interrupts_restore(ipl);
+    return 0;
+}
+/** Check access mode for address space area.
+ *
+ * The address space area must be locked prior to this call.
+ *
+ * @param area Address space area.
+ * @param access Access mode.
+ *
+ * @return False if access violates area's permissions, true otherwise.
+ */
+bool as_area_check_access(as_area_t *area, pf_access_t access)
+{
+    int flagmap[] = {
+        [PF_ACCESS_READ] = AS_AREA_READ,
+        [PF_ACCESS_WRITE] = AS_AREA_WRITE,
+        [PF_ACCESS_EXEC] = AS_AREA_EXEC
+    };
+    if (!(area->flags & flagmap[access]))
+        return false;
+    return true;
+}
+/** Handle page fault within the current address space.
+ *
+ * This is the high-level page fault handler. It decides
+ * whether the page fault can be resolved by any backend
+ * and if so, it invokes the backend to resolve the page
+ * fault.
+ *
+ * Interrupts are assumed disabled.
+ *
+ * @param page Faulting page.
+ * @param access Access mode that caused the fault (i.e. read/write/exec).
+ * @param istate Pointer to interrupted state.
+ *
+ * @return AS_PF_FAULT on page fault, AS_PF_OK on success or AS_PF_DEFER if the
+ *     fault was caused by copy_to_uspace() or copy_from_uspace().
+ */
+int as_page_fault(__address page, pf_access_t access, istate_t *istate)
+{
+    pte_t *pte;
+    as_area_t *area;
+    if (!THREAD)
+        return AS_PF_FAULT;
+    ASSERT(AS);
+    mutex_lock(&AS->lock);
+    area = find_area_and_lock(AS, page);
+    if (!area) {
+        /*
+         * No area contained mapping for 'page'.
+         * Signal page fault to low-level handler.
+         */
+        mutex_unlock(&AS->lock);
+        goto page_fault;
+    }
+    if (area->attributes & AS_AREA_ATTR_PARTIAL) {
+        /*
+         * The address space area is not fully initialized.
+         * Avoid possible race by returning error.
+         */
+        mutex_unlock(&area->lock);
+        mutex_unlock(&AS->lock);
+        goto page_fault;
+    }
+    if (!area->backend || !area->backend->page_fault) {
+        /*
+         * The address space area is not backed by any backend
+         * or the backend cannot handle page faults.
+         */
+        mutex_unlock(&area->lock);
+        mutex_unlock(&AS->lock);
+        goto page_fault;
+    }
+    page_table_lock(AS, false);
+    /*
+     * To avoid race condition between two page faults
+     * on the same address, we need to make sure
+     * the mapping has not been already inserted.
+     */
+    if ((pte = page_mapping_find(AS, page))) {
+        if (PTE_PRESENT(pte)) {
+            if (((access == PF_ACCESS_READ) && PTE_READABLE(pte)) ||
+                (access == PF_ACCESS_WRITE && PTE_WRITABLE(pte)) ||
+                (access == PF_ACCESS_EXEC && PTE_EXECUTABLE(pte))) {
+                page_table_unlock(AS, false);
+                mutex_unlock(&area->lock);
+                mutex_unlock(&AS->lock);
+                return AS_PF_OK;
+            }
+        }
+    }
+    /*
+     * Resort to the backend page fault handler.
+     */
+    if (area->backend->page_fault(area, page, access) != AS_PF_OK) {
+        page_table_unlock(AS, false);
+        mutex_unlock(&area->lock);
+        mutex_unlock(&AS->lock);
+        goto page_fault;
+    }
+    page_table_unlock(AS, false);
+    mutex_unlock(&area->lock);
+    mutex_unlock(&AS->lock);
+    return AS_PF_OK;
+page_fault:
+    if (THREAD->in_copy_from_uspace) {
+        THREAD->in_copy_from_uspace = false;
+        istate_set_retaddr(istate, (__address) &memcpy_from_uspace_failover_address);
+    } else if (THREAD->in_copy_to_uspace) {
+        THREAD->in_copy_to_uspace = false;
+        istate_set_retaddr(istate, (__address) &memcpy_to_uspace_failover_address);
+    } else {
+        return AS_PF_FAULT;
+    }
+    return AS_PF_DEFER;
+}
+/** Switch address spaces.
+ *
+ * Note that this function cannot sleep as it is essentially a part of
+ * scheduling. Sleeping here would lead to deadlock on wakeup.
+ *
+ * @param old Old address space or NULL.
+ * @param new New address space.
+ */
+void as_switch(as_t *old, as_t *new)
+{
+    ipl_t ipl;
+    bool needs_asid = false;
+    ipl = interrupts_disable();
+    spinlock_lock(&inactive_as_with_asid_lock);
+    /*
+     * First, take care of the old address space.
+     */
+    if (old) {
+        mutex_lock_active(&old->lock);
+        ASSERT(old->cpu_refcount);
+        if((--old->cpu_refcount == 0) && (old != AS_KERNEL)) {
+            /*
+             * The old address space is no longer active on
+             * any processor. It can be appended to the
+             * list of inactive address spaces with assigned
+             * ASID.
+             */
+             ASSERT(old->asid != ASID_INVALID);
+             list_append(&old->inactive_as_with_asid_link, &inactive_as_with_asid_head);
+        }
+        mutex_unlock(&old->lock);
+    }
+    /*
+     * Second, prepare the new address space.
+     */
+    mutex_lock_active(&new->lock);
+    if ((new->cpu_refcount++ == 0) && (new != AS_KERNEL)) {
+        if (new->asid != ASID_INVALID)
+            list_remove(&new->inactive_as_with_asid_link);
+        else
+            needs_asid = true;  /* defer call to asid_get() until new->lock is released */
+    }
+    SET_PTL0_ADDRESS(new->page_table);
+    mutex_unlock(&new->lock);
+    if (needs_asid) {
+        /*
+         * Allocation of new ASID was deferred
+         * until now in order to avoid deadlock.
+         */
+        asid_t asid;
+        asid = asid_get();
+        mutex_lock_active(&new->lock);
+        new->asid = asid;
+        mutex_unlock(&new->lock);
+    }
+    spinlock_unlock(&inactive_as_with_asid_lock);
+    interrupts_restore(ipl);
+    /*
+     * Perform architecture-specific steps.
+     * (e.g. write ASID to hardware register etc.)
+     */
+    as_install_arch(new);
+    AS = new;
+}
+/** Convert address space area flags to page flags.
+ *
+ * @param aflags Flags of some address space area.
+ *
+ * @return Flags to be passed to page_mapping_insert().
+ */
+int area_flags_to_page_flags(int aflags)
+{
+    int flags;
+    flags = PAGE_USER | PAGE_PRESENT;
+    if (aflags & AS_AREA_READ)
+        flags |= PAGE_READ;
+    if (aflags & AS_AREA_WRITE)
+        flags |= PAGE_WRITE;
+    if (aflags & AS_AREA_EXEC)
+        flags |= PAGE_EXEC;
+    if (aflags & AS_AREA_CACHEABLE)
+        flags |= PAGE_CACHEABLE;
+    return flags;
+}
+/** Compute flags for virtual address translation subsytem.
+ *
+ * The address space area must be locked.
+ * Interrupts must be disabled.
+ *
+ * @param a Address space area.
+ *
+ * @return Flags to be used in page_mapping_insert().
+ */
+int as_area_get_flags(as_area_t *a)
+{
+    return area_flags_to_page_flags(a->flags);
+}
+/** Create page table.
+ *
+ * Depending on architecture, create either address space
+ * private or global page table.
+ *
+ * @param flags Flags saying whether the page table is for kernel address space.
+ *
+ * @return First entry of the page table.
+ */
+pte_t *page_table_create(int flags)
+{
+        ASSERT(as_operations);
+        ASSERT(as_operations->page_table_create);
+        return as_operations->page_table_create(flags);
+}
+/** Destroy page table.
+ *
+ * Destroy page table in architecture specific way.
+ *
+ * @param page_table Physical address of PTL0.
+ */
+void page_table_destroy(pte_t *page_table)
+{
+        ASSERT(as_operations);
+        ASSERT(as_operations->page_table_destroy);
+        as_operations->page_table_destroy(page_table);
+}
+/** Lock page table.
+ *
+ * This function should be called before any page_mapping_insert(),
+ * page_mapping_remove() and page_mapping_find().
+ *
+ * Locking order is such that address space areas must be locked
+ * prior to this call. Address space can be locked prior to this
+ * call in which case the lock argument is false.
+ *
+ * @param as Address space.
+ * @param lock If false, do not attempt to lock as->lock.
+ */
+void page_table_lock(as_t *as, bool lock)
+{
+    ASSERT(as_operations);
+    ASSERT(as_operations->page_table_lock);
+    as_operations->page_table_lock(as, lock);
+}
+/** Unlock page table.
+ *
+ * @param as Address space.
+ * @param unlock If false, do not attempt to unlock as->lock.
+ */
+void page_table_unlock(as_t *as, bool unlock)
+{
+    ASSERT(as_operations);
+    ASSERT(as_operations->page_table_unlock);
+    as_operations->page_table_unlock(as, unlock);
+}
+/** Find address space area and lock it.
+ *
+ * The address space must be locked and interrupts must be disabled.
+ *
+ * @param as Address space.
+ * @param va Virtual address.
+ *
+ * @return Locked address space area containing va on success or NULL on failure.
+ */
+as_area_t *find_area_and_lock(as_t *as, __address va)
+{
+    as_area_t *a;
+    btree_node_t *leaf, *lnode;
+    int i;
+    a = (as_area_t *) btree_search(&as->as_area_btree, va, &leaf);
+    if (a) {
+        /* va is the base address of an address space area */
+        mutex_lock(&a->lock);
+        return a;
+    }
+    /*
+     * Search the leaf node and the righmost record of its left neighbour
+     * to find out whether this is a miss or va belongs to an address
+     * space area found there.
+     */
+    /* First, search the leaf node itself. */
+    for (i = 0; i < leaf->keys; i++) {
+        a = (as_area_t *) leaf->value[i];
+        mutex_lock(&a->lock);
+        if ((a->base <= va) && (va < a->base + a->pages * PAGE_SIZE)) {
+            return a;
+        }
+        mutex_unlock(&a->lock);
+    }
+    /*
+     * Second, locate the left neighbour and test its last record.
+     * Because of its position in the B+tree, it must have base < va.
+     */
+    if ((lnode = btree_leaf_node_left_neighbour(&as->as_area_btree, leaf))) {
+        a = (as_area_t *) lnode->value[lnode->keys - 1];
+        mutex_lock(&a->lock);
+        if (va < a->base + a->pages * PAGE_SIZE) {
+            return a;
+        }
+        mutex_unlock(&a->lock);
+    }
+    return NULL;
+}
+/** Check area conflicts with other areas.
+ *
+ * The address space must be locked and interrupts must be disabled.
+ *
+ * @param as Address space.
+ * @param va Starting virtual address of the area being tested.
+ * @param size Size of the area being tested.
+ * @param avoid_area Do not touch this area.
+ *
+ * @return True if there is no conflict, false otherwise.
+ */
+bool check_area_conflicts(as_t *as, __address va, size_t size, as_area_t *avoid_area)
+{
+    as_area_t *a;
+    btree_node_t *leaf, *node;
+    int i;
+    /*
+     * We don't want any area to have conflicts with NULL page.
+     */
+    if (overlaps(va, size, NULL, PAGE_SIZE))
+        return false;
+    /*
+     * The leaf node is found in O(log n), where n is proportional to
+     * the number of address space areas belonging to as.
+     * The check for conflicts is then attempted on the rightmost
+     * record in the left neighbour, the leftmost record in the right
+     * neighbour and all records in the leaf node itself.
+     */
+    if ((a = (as_area_t *) btree_search(&as->as_area_btree, va, &leaf))) {
+        if (a != avoid_area)
+            return false;
+    }
+    /* First, check the two border cases. */
+    if ((node = btree_leaf_node_left_neighbour(&as->as_area_btree, leaf))) {
+        a = (as_area_t *) node->value[node->keys - 1];
+        mutex_lock(&a->lock);
+        if (overlaps(va, size, a->base, a->pages * PAGE_SIZE)) {
+            mutex_unlock(&a->lock);
+            return false;
+        }
+        mutex_unlock(&a->lock);
+    }
+    if ((node = btree_leaf_node_right_neighbour(&as->as_area_btree, leaf))) {
+        a = (as_area_t *) node->value[0];
+        mutex_lock(&a->lock);
+        if (overlaps(va, size, a->base, a->pages * PAGE_SIZE)) {
+            mutex_unlock(&a->lock);
+            return false;
+        }
+        mutex_unlock(&a->lock);
+    }
+    /* Second, check the leaf node. */
+    for (i = 0; i < leaf->keys; i++) {
+        a = (as_area_t *) leaf->value[i];
+        if (a == avoid_area)
+            continue;
+        mutex_lock(&a->lock);
+        if (overlaps(va, size, a->base, a->pages * PAGE_SIZE)) {
+            mutex_unlock(&a->lock);
+            return false;
+        }
+        mutex_unlock(&a->lock);
+    }
+    /*
+     * So far, the area does not conflict with other areas.
+     * Check if it doesn't conflict with kernel address space.
+     */
+    if (!KERNEL_ADDRESS_SPACE_SHADOWED) {
+        return !overlaps(va, size,
+            KERNEL_ADDRESS_SPACE_START, KERNEL_ADDRESS_SPACE_END-KERNEL_ADDRESS_SPACE_START);
+    }
+    return true;
+}
+/** Return size of the address space area with given base.  */
+size_t as_get_size(__address base)
+{
+    ipl_t ipl;
+    as_area_t *src_area;
+    size_t size;
+    ipl = interrupts_disable();
+    src_area = find_area_and_lock(AS, base);
+    if (src_area){
+        size = src_area->pages * PAGE_SIZE;
+        mutex_unlock(&src_area->lock);
+    } else {
+        size = 0;
+    }
+    interrupts_restore(ipl);
+    return size;
+}
+/** Mark portion of address space area as used.
+ *
+ * The address space area must be already locked.
+ *
+ * @param a Address space area.
+ * @param page First page to be marked.
+ * @param count Number of page to be marked.
+ *
+ * @return 0 on failure and 1 on success.
+ */
+int used_space_insert(as_area_t *a, __address page, count_t count)
+{
+    btree_node_t *leaf, *node;
+    count_t pages;
+    int i;
+    ASSERT(page == ALIGN_DOWN(page, PAGE_SIZE));
+    ASSERT(count);
+    pages = (count_t) btree_search(&a->used_space, page, &leaf);
+    if (pages) {
+        /*
+         * We hit the beginning of some used space.
+         */
+        return 0;
+    }
+    if (!leaf->keys) {
+        btree_insert(&a->used_space, page, (void *) count, leaf);
+        return 1;
+    }
+    node = btree_leaf_node_left_neighbour(&a->used_space, leaf);
+    if (node) {
+        __address left_pg = node->key[node->keys - 1], right_pg = leaf->key[0];
+        count_t left_cnt = (count_t) node->value[node->keys - 1], right_cnt = (count_t) leaf->value[0];
+        /*
+         * Examine the possibility that the interval fits
+         * somewhere between the rightmost interval of
+         * the left neigbour and the first interval of the leaf.
+         */
+        if (page >= right_pg) {
+            /* Do nothing. */
+        } else if (overlaps(page, count*PAGE_SIZE, left_pg, left_cnt*PAGE_SIZE)) {
+            /* The interval intersects with the left interval. */
+            return 0;
+        } else if (overlaps(page, count*PAGE_SIZE, right_pg, right_cnt*PAGE_SIZE)) {
+            /* The interval intersects with the right interval. */
+            return 0;
+        } else if ((page == left_pg + left_cnt*PAGE_SIZE) && (page + count*PAGE_SIZE == right_pg)) {
+            /* The interval can be added by merging the two already present intervals. */
+            node->value[node->keys - 1] += count + right_cnt;
+            btree_remove(&a->used_space, right_pg, leaf);
+            return 1;
+        } else if (page == left_pg + left_cnt*PAGE_SIZE) {
+            /* The interval can be added by simply growing the left interval. */
+            node->value[node->keys - 1] += count;
+            return 1;
+        } else if (page + count*PAGE_SIZE == right_pg) {
+            /*
+             * The interval can be addded by simply moving base of the right
+             * interval down and increasing its size accordingly.
+             */
+            leaf->value[0] += count;
+            leaf->key[0] = page;
+            return 1;
+        } else {
+            /*
+             * The interval is between both neigbouring intervals,
+             * but cannot be merged with any of them.
+             */
+            btree_insert(&a->used_space, page, (void *) count, leaf);
+            return 1;
+        }
+    } else if (page < leaf->key[0]) {
+        __address right_pg = leaf->key[0];
+        count_t right_cnt = (count_t) leaf->value[0];
+        /*
+         * Investigate the border case in which the left neighbour does not
+         * exist but the interval fits from the left.
+         */
+        if (overlaps(page, count*PAGE_SIZE, right_pg, right_cnt*PAGE_SIZE)) {
+            /* The interval intersects with the right interval. */
+            return 0;
+        } else if (page + count*PAGE_SIZE == right_pg) {
+            /*
+             * The interval can be added by moving the base of the right interval down
+             * and increasing its size accordingly.
+             */
+            leaf->key[0] = page;
+            leaf->value[0] += count;
+            return 1;
+        } else {
+            /*
+             * The interval doesn't adjoin with the right interval.
+             * It must be added individually.
+             */
+            btree_insert(&a->used_space, page, (void *) count, leaf);
+            return 1;
+        }
+    }
+    node = btree_leaf_node_right_neighbour(&a->used_space, leaf);
+    if (node) {
+        __address left_pg = leaf->key[leaf->keys - 1], right_pg = node->key[0];
+        count_t left_cnt = (count_t) leaf->value[leaf->keys - 1], right_cnt = (count_t) node->value[0];
+        /*
+         * Examine the possibility that the interval fits
+         * somewhere between the leftmost interval of
+         * the right neigbour and the last interval of the leaf.
+         */
+        if (page < left_pg) {
+            /* Do nothing. */
+        } else if (overlaps(page, count*PAGE_SIZE, left_pg, left_cnt*PAGE_SIZE)) {
+            /* The interval intersects with the left interval. */
+            return 0;
+        } else if (overlaps(page, count*PAGE_SIZE, right_pg, right_cnt*PAGE_SIZE)) {
+            /* The interval intersects with the right interval. */
+            return 0;
+        } else if ((page == left_pg + left_cnt*PAGE_SIZE) && (page + count*PAGE_SIZE == right_pg)) {
+            /* The interval can be added by merging the two already present intervals. */
+            leaf->value[leaf->keys - 1] += count + right_cnt;
+            btree_remove(&a->used_space, right_pg, node);
+            return 1;
+        } else if (page == left_pg + left_cnt*PAGE_SIZE) {
+            /* The interval can be added by simply growing the left interval. */
+            leaf->value[leaf->keys - 1] +=  count;
+            return 1;
+        } else if (page + count*PAGE_SIZE == right_pg) {
+            /*
+             * The interval can be addded by simply moving base of the right
+             * interval down and increasing its size accordingly.
+             */
+            node->value[0] += count;
+            node->key[0] = page;
+            return 1;
+        } else {
+            /*
+             * The interval is between both neigbouring intervals,
+             * but cannot be merged with any of them.
+             */
+            btree_insert(&a->used_space, page, (void *) count, leaf);
+            return 1;
+        }
+    } else if (page >= leaf->key[leaf->keys - 1]) {
+        __address left_pg = leaf->key[leaf->keys - 1];
+        count_t left_cnt = (count_t) leaf->value[leaf->keys - 1];
+        /*
+         * Investigate the border case in which the right neighbour does not
+         * exist but the interval fits from the right.
+         */
+        if (overlaps(page, count*PAGE_SIZE, left_pg, left_cnt*PAGE_SIZE)) {
+            /* The interval intersects with the left interval. */
+            return 0;
+        } else if (left_pg + left_cnt*PAGE_SIZE == page) {
+            /* The interval can be added by growing the left interval. */
+            leaf->value[leaf->keys - 1] += count;
+            return 1;
+        } else {
+            /*
+             * The interval doesn't adjoin with the left interval.
+             * It must be added individually.
+             */
+            btree_insert(&a->used_space, page, (void *) count, leaf);
+            return 1;
+        }
+    }
+    /*
+     * Note that if the algorithm made it thus far, the interval can fit only
+     * between two other intervals of the leaf. The two border cases were already
+     * resolved.
+     */
+    for (i = 1; i < leaf->keys; i++) {
+        if (page < leaf->key[i]) {
+            __address left_pg = leaf->key[i - 1], right_pg = leaf->key[i];
+            count_t left_cnt = (count_t) leaf->value[i - 1], right_cnt = (count_t) leaf->value[i];
+            /*
+             * The interval fits between left_pg and right_pg.
+             */
+            if (overlaps(page, count*PAGE_SIZE, left_pg, left_cnt*PAGE_SIZE)) {
+                /* The interval intersects with the left interval. */
+                return 0;
+            } else if (overlaps(page, count*PAGE_SIZE, right_pg, right_cnt*PAGE_SIZE)) {
+                /* The interval intersects with the right interval. */
+                return 0;
+            } else if ((page == left_pg + left_cnt*PAGE_SIZE) && (page + count*PAGE_SIZE == right_pg)) {
+                /* The interval can be added by merging the two already present intervals. */
+                leaf->value[i - 1] += count + right_cnt;
+                btree_remove(&a->used_space, right_pg, leaf);
+                return 1;
+            } else if (page == left_pg + left_cnt*PAGE_SIZE) {
+                /* The interval can be added by simply growing the left interval. */
+                leaf->value[i - 1] += count;
+                return 1;
+            } else if (page + count*PAGE_SIZE == right_pg) {
+                /*
+                     * The interval can be addded by simply moving base of the right
+                 * interval down and increasing its size accordingly.
+                 */
+                leaf->value[i] += count;
+                leaf->key[i] = page;
+                return 1;
+            } else {
+                /*
+                 * The interval is between both neigbouring intervals,
+                 * but cannot be merged with any of them.
+                 */
+                btree_insert(&a->used_space, page, (void *) count, leaf);
+                return 1;
+            }
+        }
+    }
+    panic("Inconsistency detected while adding %d pages of used space at %p.\n", count, page);
+}
+/** Mark portion of address space area as unused.
+ *
+ * The address space area must be already locked.
+ *
+ * @param a Address space area.
+ * @param page First page to be marked.
+ * @param count Number of page to be marked.
+ *
+ * @return 0 on failure and 1 on success.
+ */
+int used_space_remove(as_area_t *a, __address page, count_t count)
+{
+    btree_node_t *leaf, *node;
+    count_t pages;
+    int i;
+    ASSERT(page == ALIGN_DOWN(page, PAGE_SIZE));
+    ASSERT(count);
+    pages = (count_t) btree_search(&a->used_space, page, &leaf);
+    if (pages) {
+        /*
+         * We are lucky, page is the beginning of some interval.
+         */
+        if (count > pages) {
+            return 0;
+        } else if (count == pages) {
+            btree_remove(&a->used_space, page, leaf);
+            return 1;
+        } else {
+            /*
+             * Find the respective interval.
+             * Decrease its size and relocate its start address.
+             */
+            for (i = 0; i < leaf->keys; i++) {
+                if (leaf->key[i] == page) {
+                    leaf->key[i] += count*PAGE_SIZE;
+                    leaf->value[i] -= count;
+                    return 1;
+                }
+            }
+            goto error;
+        }
+    }
+    node = btree_leaf_node_left_neighbour(&a->used_space, leaf);
+    if (node && page < leaf->key[0]) {
+        __address left_pg = node->key[node->keys - 1];
+        count_t left_cnt = (count_t) node->value[node->keys - 1];
+        if (overlaps(left_pg, left_cnt*PAGE_SIZE, page, count*PAGE_SIZE)) {
+            if (page + count*PAGE_SIZE == left_pg + left_cnt*PAGE_SIZE) {
+                /*
+                 * The interval is contained in the rightmost interval
+                 * of the left neighbour and can be removed by
+                 * updating the size of the bigger interval.
+                 */
+                node->value[node->keys - 1] -= count;
+                return 1;
+            } else if (page + count*PAGE_SIZE < left_pg + left_cnt*PAGE_SIZE) {
+                count_t new_cnt;
+                /*
+                 * The interval is contained in the rightmost interval
+                 * of the left neighbour but its removal requires
+                 * both updating the size of the original interval and
+                 * also inserting a new interval.
+                 */
+                new_cnt = ((left_pg + left_cnt*PAGE_SIZE) - (page + count*PAGE_SIZE)) >> PAGE_WIDTH;
+                node->value[node->keys - 1] -= count + new_cnt;
+                btree_insert(&a->used_space, page + count*PAGE_SIZE, (void *) new_cnt, leaf);
+                return 1;
+            }
+        }
+        return 0;
+    } else if (page < leaf->key[0]) {
+        return 0;
+    }
+    if (page > leaf->key[leaf->keys - 1]) {
+        __address left_pg = leaf->key[leaf->keys - 1];
+        count_t left_cnt = (count_t) leaf->value[leaf->keys - 1];
+        if (overlaps(left_pg, left_cnt*PAGE_SIZE, page, count*PAGE_SIZE)) {
+            if (page + count*PAGE_SIZE == left_pg + left_cnt*PAGE_SIZE) {
+                /*
+                 * The interval is contained in the rightmost interval
+                 * of the leaf and can be removed by updating the size
+                 * of the bigger interval.
+                 */
+                leaf->value[leaf->keys - 1] -= count;
+                return 1;
+            } else if (page + count*PAGE_SIZE < left_pg + left_cnt*PAGE_SIZE) {
+                count_t new_cnt;
+                /*
+                 * The interval is contained in the rightmost interval
+                 * of the leaf but its removal requires both updating
+                 * the size of the original interval and
+                 * also inserting a new interval.
+                 */
+                new_cnt = ((left_pg + left_cnt*PAGE_SIZE) - (page + count*PAGE_SIZE)) >> PAGE_WIDTH;
+                leaf->value[leaf->keys - 1] -= count + new_cnt;
+                btree_insert(&a->used_space, page + count*PAGE_SIZE, (void *) new_cnt, leaf);
+                return 1;
+            }
+        }
+        return 0;
+    }
+    /*
+     * The border cases have been already resolved.
+     * Now the interval can be only between intervals of the leaf.
+     */
+    for (i = 1; i < leaf->keys - 1; i++) {
+        if (page < leaf->key[i]) {
+            __address left_pg = leaf->key[i - 1];
+            count_t left_cnt = (count_t) leaf->value[i - 1];
+            /*
+             * Now the interval is between intervals corresponding to (i - 1) and i.
+             */
+            if (overlaps(left_pg, left_cnt*PAGE_SIZE, page, count*PAGE_SIZE)) {
+                if (page + count*PAGE_SIZE == left_pg + left_cnt*PAGE_SIZE) {
+                    /*
+                    * The interval is contained in the interval (i - 1)
+                     * of the leaf and can be removed by updating the size
+                     * of the bigger interval.
+                     */
+                    leaf->value[i - 1] -= count;
+                    return 1;
+                } else if (page + count*PAGE_SIZE < left_pg + left_cnt*PAGE_SIZE) {
+                    count_t new_cnt;
+                    /*
+                     * The interval is contained in the interval (i - 1)
+                     * of the leaf but its removal requires both updating
+                     * the size of the original interval and
+                     * also inserting a new interval.
+                     */
+                    new_cnt = ((left_pg + left_cnt*PAGE_SIZE) - (page + count*PAGE_SIZE)) >> PAGE_WIDTH;
+                    leaf->value[i - 1] -= count + new_cnt;
+                    btree_insert(&a->used_space, page + count*PAGE_SIZE, (void *) new_cnt, leaf);
+                    return 1;
+                }
+            }
+            return 0;
+        }
+    }
+error:
+    panic("Inconsistency detected while removing %d pages of used space from %p.\n", count, page);
+}
+/** Remove reference to address space area share info.
+ *
+ * If the reference count drops to 0, the sh_info is deallocated.
+ *
+ * @param sh_info Pointer to address space area share info.
+ */
+void sh_info_remove_reference(share_info_t *sh_info)
+{
+    bool dealloc = false;
+    mutex_lock(&sh_info->lock);
+    ASSERT(sh_info->refcount);
+    if (--sh_info->refcount == 0) {
+        dealloc = true;
+        link_t *cur;
+        /*
+         * Now walk carefully the pagemap B+tree and free/remove
+         * reference from all frames found there.
+         */
+        for (cur = sh_info->pagemap.leaf_head.next; cur != &sh_info->pagemap.leaf_head; cur = cur->next) {
+            btree_node_t *node;
+            int i;
+            node = list_get_instance(cur, btree_node_t, leaf_link);
+            for (i = 0; i < node->keys; i++)
+                frame_free(ADDR2PFN((__address) node->value[i]));
+        }
+    }
+    mutex_unlock(&sh_info->lock);
+    if (dealloc) {
+        btree_destroy(&sh_info->pagemap);
+        free(sh_info);
+    }
+}
+/*
+ * Address space related syscalls.
+ */
+/** Wrapper for as_area_create(). */
+__native sys_as_area_create(__address address, size_t size, int flags)
+{
+    if (as_area_create(AS, flags | AS_AREA_CACHEABLE, size, address, AS_AREA_ATTR_NONE, &anon_backend, NULL))
+        return (__native) address;
+    else
+        return (__native) -1;
+}
+/** Wrapper for as_area_resize. */
+__native sys_as_area_resize(__address address, size_t size, int flags)
+{
+    return (__native) as_area_resize(AS, address, size, 0);
+}
+/** Wrapper for as_area_destroy. */
+__native sys_as_area_destroy(__address address)
+{
+    return (__native) as_area_destroy(AS, address);
+}
+ /** @}
+ */

 /tags/0.2.0.2/kernel/generic/src/mm/buddy.c
 ,0 → 1,326
+/*
+ * Copyright (C) 2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup genericmm
+ * @{
+ */
+/**
+ * @file
+ * @brief   Buddy allocator framework.
+ *
+ * This file contains buddy system allocator framework.
+ * Specialized functions are needed for this abstract framework
+ * to be useful.
+ */
+#include <mm/buddy.h>
+#include <mm/frame.h>
+#include <arch/types.h>
+#include <typedefs.h>
+#include <adt/list.h>
+#include <debug.h>
+#include <print.h>
+/** Return size needed for the buddy configuration data */
+size_t buddy_conf_size(int max_order)
+{
+    return sizeof(buddy_system_t) + (max_order + 1) * sizeof(link_t);
+}
+/** Create buddy system
+ *
+ * Allocate memory for and initialize new buddy system.
+ *
+ * @param b Preallocated buddy system control data.
+ * @param max_order The biggest allocable size will be 2^max_order.
+ * @param op Operations for new buddy system.
+ * @param data Pointer to be used by implementation.
+ *
+ * @return New buddy system.
+ */
+void buddy_system_create(buddy_system_t *b,
+             __u8 max_order,
+             buddy_system_operations_t *op,
+             void *data)
+{
+    int i;
+    ASSERT(max_order < BUDDY_SYSTEM_INNER_BLOCK);
+    ASSERT(op->find_buddy);
+    ASSERT(op->set_order);
+    ASSERT(op->get_order);
+    ASSERT(op->bisect);
+    ASSERT(op->coalesce);
+    ASSERT(op->mark_busy);
+    /*
+     * Use memory after our own structure
+     */
+    b->order = (link_t *) (&b[1]);
+    for (i = 0; i <= max_order; i++)
+        list_initialize(&b->order[i]);
+    b->max_order = max_order;
+    b->op = op;
+    b->data = data;
+}
+/** Check if buddy system can allocate block
+ *
+ * @param b Buddy system pointer
+ * @param i Size of the block (2^i)
+ *
+ * @return True if block can be allocated
+ */
+bool buddy_system_can_alloc(buddy_system_t *b, __u8 i) {
+    __u8 k;
+    /*
+     * If requested block is greater then maximal block
+     * we know immediatly that we cannot satisfy the request.
+     */
+    if (i > b->max_order) return false;
+    /*
+     * Check if any bigger or equal order has free elements
+     */
+    for (k=i; k <= b->max_order; k++) {
+        if (!list_empty(&b->order[k])) {
+            return true;
+        }
+    }
+    return false;
+}
+/** Allocate PARTICULAR block from buddy system
+ *
+ * @ return Block of data or NULL if no such block was found
+ */
+link_t *buddy_system_alloc_block(buddy_system_t *b, link_t *block)
+{
+    link_t *left,*right, *tmp;
+    __u8 order;
+    left = b->op->find_block(b, block, BUDDY_SYSTEM_INNER_BLOCK);
+    ASSERT(left);
+    list_remove(left);
+    while (1) {
+        if (! b->op->get_order(b,left)) {
+            b->op->mark_busy(b, left);
+            return left;
+        }
+        order = b->op->get_order(b, left);
+        right = b->op->bisect(b, left);
+        b->op->set_order(b, left, order-1);
+        b->op->set_order(b, right, order-1);
+        tmp = b->op->find_block(b, block, BUDDY_SYSTEM_INNER_BLOCK);
+        if (tmp == right) {
+            right = left;
+            left = tmp;
+        }
+        ASSERT(tmp == left);
+        b->op->mark_busy(b, left);
+        buddy_system_free(b, right);
+        b->op->mark_available(b, left);
+    }
+}
+/** Allocate block from buddy system.
+ *
+ * @param b Buddy system pointer.
+ * @param i Returned block will be 2^i big.
+ *
+ * @return Block of data represented by link_t.
+ */
+link_t *buddy_system_alloc(buddy_system_t *b, __u8 i)
+{
+    link_t *res, *hlp;
+    ASSERT(i <= b->max_order);
+    /*
+     * If the list of order i is not empty,
+     * the request can be immediatelly satisfied.
+     */
+    if (!list_empty(&b->order[i])) {
+        res = b->order[i].next;
+        list_remove(res);
+        b->op->mark_busy(b, res);
+        return res;
+    }
+    /*
+     * If order i is already the maximal order,
+     * the request cannot be satisfied.
+     */
+    if (i == b->max_order)
+        return NULL;
+    /*
+     * Try to recursively satisfy the request from higher order lists.
+     */
+    hlp = buddy_system_alloc(b, i + 1);
+    /*
+     * The request could not be satisfied
+     * from higher order lists.
+     */
+    if (!hlp)
+        return NULL;
+    res = hlp;
+    /*
+     * Bisect the block and set order of both of its parts to i.
+     */
+    hlp = b->op->bisect(b, res);
+    b->op->set_order(b, res, i);
+    b->op->set_order(b, hlp, i);
+    /*
+     * Return the other half to buddy system. Mark the first part
+     * full, so that it won't coalesce again.
+     */
+    b->op->mark_busy(b, res);
+    buddy_system_free(b, hlp);
+    return res;
+}
+/** Return block to buddy system.
+ *
+ * @param b Buddy system pointer.
+ * @param block Block to return.
+ */
+void buddy_system_free(buddy_system_t *b, link_t *block)
+{
+    link_t *buddy, *hlp;
+    __u8 i;
+    /*
+     * Determine block's order.
+     */
+    i = b->op->get_order(b, block);
+    ASSERT(i <= b->max_order);
+    if (i != b->max_order) {
+        /*
+         * See if there is any buddy in the list of order i.
+         */
+        buddy = b->op->find_buddy(b, block);
+        if (buddy) {
+            ASSERT(b->op->get_order(b, buddy) == i);
+            /*
+             * Remove buddy from the list of order i.
+             */
+            list_remove(buddy);
+            /*
+             * Invalidate order of both block and buddy.
+             */
+            b->op->set_order(b, block, BUDDY_SYSTEM_INNER_BLOCK);
+            b->op->set_order(b, buddy, BUDDY_SYSTEM_INNER_BLOCK);
+            /*
+             * Coalesce block and buddy into one block.
+             */
+            hlp = b->op->coalesce(b, block, buddy);
+            /*
+             * Set order of the coalesced block to i + 1.
+             */
+            b->op->set_order(b, hlp, i + 1);
+            /*
+             * Recursively add the coalesced block to the list of order i + 1.
+             */
+            buddy_system_free(b, hlp);
+            return;
+        }
+    }
+    /*
+     * Insert block into the list of order i.
+     */
+    list_append(block, &b->order[i]);
+}
+/** Prints out structure of buddy system
+ *
+ * @param b Pointer to buddy system
+ * @param elem_size Element size
+ */
+void buddy_system_structure_print(buddy_system_t *b, size_t elem_size) {
+    index_t i;
+    count_t cnt, elem_count = 0, block_count = 0;
+    link_t * cur;
+    printf("Order\tBlocks\tSize    \tBlock size\tElems per block\n");
+    printf("-----\t------\t--------\t----------\t---------------\n");
+    for (i=0;i <= b->max_order; i++) {
+        cnt = 0;
+        if (!list_empty(&b->order[i])) {
+            for (cur = b->order[i].next; cur != &b->order[i]; cur = cur->next)
+                cnt++;
+        }
+        printf("#%zd\t%5zd\t%7zdK\t%8zdK\t%6zd\t", i, cnt, (cnt * (1 << i) * elem_size) >> 10, ((1 << i) * elem_size) >> 10, 1 << i);
+        if (!list_empty(&b->order[i])) {
+            for (cur = b->order[i].next; cur != &b->order[i]; cur = cur->next) {
+                b->op->print_id(b, cur);
+                printf(" ");
+            }
+        }
+        printf("\n");
+        block_count += cnt;
+        elem_count += (1 << i) * cnt;
+    }
+    printf("-----\t------\t--------\t----------\t---------------\n");
+    printf("Buddy system contains %zd free elements (%zd blocks)\n" , elem_count, block_count);
+}
+ /** @}
+ */

 /tags/0.2.0.2/kernel/generic/src/mm/frame.c
 ,0 → 1,1155
+/*
+ * Copyright (C) 2001-2005 Jakub Jermar
+ * Copyright (C) 2005 Sergey Bondari
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup genericmm
+ * @{
+ */
+/**
+ * @file
+ * @brief   Physical frame allocator.
+ *
+ * This file contains the physical frame allocator and memory zone management.
+ * The frame allocator is built on top of the buddy allocator.
+ *
+ * @see buddy.c
+ */
+/*
+ * Locking order
+ *
+ * In order to access particular zone, the process must first lock
+ * the zones.lock, then lock the zone and then unlock the zones.lock.
+ * This insures, that we can fiddle with the zones in runtime without
+ * affecting the processes.
+ *
+ */
+#include <typedefs.h>
+#include <arch/types.h>
+#include <mm/frame.h>
+#include <mm/as.h>
+#include <panic.h>
+#include <debug.h>
+#include <adt/list.h>
+#include <synch/spinlock.h>
+#include <arch/asm.h>
+#include <arch.h>
+#include <print.h>
+#include <align.h>
+#include <mm/slab.h>
+#include <bitops.h>
+#include <macros.h>
+typedef struct {
+    count_t refcount;   /**< tracking of shared frames  */
+    __u8 buddy_order;   /**< buddy system block order */
+    link_t buddy_link;  /**< link to the next free block inside one order */
+    void *parent;           /**< If allocated by slab, this points there */
+} frame_t;
+typedef struct {
+    SPINLOCK_DECLARE(lock); /**< this lock protects everything below */
+    pfn_t base;     /**< frame_no of the first frame in the frames array */
+    count_t count;          /**< Size of zone */
+    frame_t *frames;    /**< array of frame_t structures in this zone */
+    count_t free_count; /**< number of free frame_t structures */
+    count_t busy_count; /**< number of busy frame_t structures */
+    buddy_system_t * buddy_system; /**< buddy system for the zone */
+    int flags;
+} zone_t;
+/*
+ * The zoneinfo.lock must be locked when accessing zoneinfo structure.
+ * Some of the attributes in zone_t structures are 'read-only'
+ */
+struct {
+    SPINLOCK_DECLARE(lock);
+    int count;
+    zone_t *info[ZONES_MAX];
+} zones;
+/*********************************/
+/* Helper functions */
+static inline index_t frame_index(zone_t *zone, frame_t *frame)
+{
+    return (index_t)(frame - zone->frames);
+}
+static inline index_t frame_index_abs(zone_t *zone, frame_t *frame)
+{
+    return (index_t)(frame - zone->frames) + zone->base;
+}
+static inline int frame_index_valid(zone_t *zone, index_t index)
+{
+    return index >= 0 && index < zone->count;
+}
+/** Compute pfn_t from frame_t pointer & zone pointer */
+static index_t make_frame_index(zone_t *zone, frame_t *frame)
+{
+    return frame - zone->frames;
+}
+/** Initialize frame structure
+ *
+ * Initialize frame structure.
+ *
+ * @param frame Frame structure to be initialized.
+ */
+static void frame_initialize(frame_t *frame)
+{
+    frame->refcount = 1;
+    frame->buddy_order = 0;
+}
+/*************************************/
+/* Zoneinfo functions */
+/**
+ * Insert-sort zone into zones list
+ *
+ * @param newzone New zone to be inserted into zone list
+ * @return zone number on success, -1 on error
+ */
+static int zones_add_zone(zone_t *newzone)
+{
+    int i,j;
+    ipl_t ipl;
+    zone_t *z;
+    ipl = interrupts_disable();
+    spinlock_lock(&zones.lock);
+    /* Try to merge */
+    if (zones.count + 1 == ZONES_MAX)
+        panic("Maximum zone(%d) count exceeded.", ZONES_MAX);
+    for (i = 0; i < zones.count; i++) {
+        /* Check for overflow */
+        z = zones.info[i];
+        if (overlaps(newzone->base,newzone->count,
+                 z->base, z->count)) {
+            printf("Zones overlap!\n");
+            return -1;
+        }
+        if (newzone->base < z->base)
+            break;
+    }
+    /* Move other zones up */
+    for (j = i;j < zones.count; j++)
+        zones.info[j + 1] = zones.info[j];
+    zones.info[i] = newzone;
+    zones.count++;
+    spinlock_unlock(&zones.lock);
+    interrupts_restore(ipl);
+    return i;
+}
+/**
+ * Try to find a zone where can we find the frame
+ *
+ * @param frame Frame number contained in zone
+ * @param pzone If not null, it is used as zone hint. Zone index
+ *              is filled into the variable on success.
+ * @return Pointer to LOCKED zone containing frame
+ *
+ * Assume interrupts disable
+ */
+static zone_t * find_zone_and_lock(pfn_t frame, int *pzone)
+{
+    int i;
+    int hint = pzone ? *pzone : 0;
+    zone_t *z;
+    spinlock_lock(&zones.lock);
+    if (hint >= zones.count || hint < 0)
+        hint = 0;
+    i = hint;
+    do {
+        z = zones.info[i];
+        spinlock_lock(&z->lock);
+        if (z->base <= frame && z->base + z->count > frame) {
+            spinlock_unlock(&zones.lock); /* Unlock the global lock */
+            if (pzone)
+                *pzone = i;
+            return z;
+        }
+        spinlock_unlock(&z->lock);
+        i++;
+        if (i >= zones.count)
+            i = 0;
+    } while(i != hint);
+    spinlock_unlock(&zones.lock);
+    return NULL;
+}
+/** @return True if zone can allocate specified order */
+static int zone_can_alloc(zone_t *z, __u8 order)
+{
+    return buddy_system_can_alloc(z->buddy_system, order);
+}
+/**
+ * Find AND LOCK zone that can allocate order frames
+ *
+ * Assume interrupts are disabled!!
+ *
+ * @param order Size (2^order) of free space we are trying to find
+ * @param pzone Pointer to preferred zone or NULL, on return contains zone number
+ */
+static zone_t * find_free_zone_lock(__u8 order, int *pzone)
+{
+    int i;
+    zone_t *z;
+    int hint = pzone ? *pzone : 0;
+    spinlock_lock(&zones.lock);
+    if (hint >= zones.count)
+        hint = 0;
+    i = hint;
+    do {
+        z = zones.info[i];
+        spinlock_lock(&z->lock);
+        /* Check if the zone has 2^order frames area available  */
+        if (zone_can_alloc(z, order)) {
+            spinlock_unlock(&zones.lock);
+            if (pzone)
+                *pzone = i;
+            return z;
+        }
+        spinlock_unlock(&z->lock);
+        if (++i >= zones.count)
+            i = 0;
+    } while(i != hint);
+    spinlock_unlock(&zones.lock);
+    return NULL;
+}
+/********************************************/
+/* Buddy system functions */
+/** Buddy system find_block implementation
+ *
+ * Find block that is parent of current list.
+ * That means go to lower addresses, until such block is found
+ *
+ * @param order - Order of parent must be different then this parameter!!
+ */
+static link_t *zone_buddy_find_block(buddy_system_t *b, link_t *child,
+                     __u8 order)
+{
+    frame_t * frame;
+    zone_t * zone;
+    index_t index;
+    frame = list_get_instance(child, frame_t, buddy_link);
+    zone = (zone_t *) b->data;
+    index = frame_index(zone, frame);
+    do {
+        if (zone->frames[index].buddy_order != order) {
+            return &zone->frames[index].buddy_link;
+        }
+    } while(index-- > 0);
+    return NULL;
+}
+static void zone_buddy_print_id(buddy_system_t *b, link_t *block)
+{
+    frame_t * frame;
+    zone_t * zone;
+    index_t index;
+    frame = list_get_instance(block, frame_t, buddy_link);
+    zone = (zone_t *) b->data;
+    index = frame_index(zone, frame);
+    printf("%zd", index);
+}
+/** Buddy system find_buddy implementation
+ *
+ * @param b Buddy system.
+ * @param block Block for which buddy should be found
+ *
+ * @return Buddy for given block if found
+ */
+static link_t * zone_buddy_find_buddy(buddy_system_t *b, link_t * block)
+{
+    frame_t * frame;
+    zone_t * zone;
+    index_t index;
+    bool is_left, is_right;
+    frame = list_get_instance(block, frame_t, buddy_link);
+    zone = (zone_t *) b->data;
+    ASSERT(IS_BUDDY_ORDER_OK(frame_index_abs(zone, frame), frame->buddy_order));
+    is_left = IS_BUDDY_LEFT_BLOCK_ABS(zone, frame);
+    is_right = IS_BUDDY_RIGHT_BLOCK_ABS(zone, frame);
+    ASSERT(is_left ^ is_right);
+    if (is_left) {
+        index = (frame_index(zone, frame)) + (1 << frame->buddy_order);
+    } else { // if (is_right)
+        index = (frame_index(zone, frame)) - (1 << frame->buddy_order);
+    }
+    if (frame_index_valid(zone, index)) {
+        if (zone->frames[index].buddy_order == frame->buddy_order &&
+            zone->frames[index].refcount == 0) {
+            return &zone->frames[index].buddy_link;
+        }
+    }
+    return NULL;
+}
+/** Buddy system bisect implementation
+ *
+ * @param b Buddy system.
+ * @param block Block to bisect
+ *
+ * @return right block
+ */
+static link_t * zone_buddy_bisect(buddy_system_t *b, link_t * block) {
+    frame_t * frame_l, * frame_r;
+    frame_l = list_get_instance(block, frame_t, buddy_link);
+    frame_r = (frame_l + (1 << (frame_l->buddy_order - 1)));
+    return &frame_r->buddy_link;
+}
+/** Buddy system coalesce implementation
+ *
+ * @param b Buddy system.
+ * @param block_1 First block
+ * @param block_2 First block's buddy
+ *
+ * @return Coalesced block (actually block that represents lower address)
+ */
+static link_t * zone_buddy_coalesce(buddy_system_t *b, link_t * block_1,
+                    link_t * block_2)
+{
+    frame_t *frame1, *frame2;
+    frame1 = list_get_instance(block_1, frame_t, buddy_link);
+    frame2 = list_get_instance(block_2, frame_t, buddy_link);
+    return frame1 < frame2 ? block_1 : block_2;
+}
+/** Buddy system set_order implementation
+ *
+ * @param b Buddy system.
+ * @param block Buddy system block
+ * @param order Order to set
+ */
+static void zone_buddy_set_order(buddy_system_t *b, link_t * block, __u8 order) {
+    frame_t * frame;
+    frame = list_get_instance(block, frame_t, buddy_link);
+    frame->buddy_order = order;
+}
+/** Buddy system get_order implementation
+ *
+ * @param b Buddy system.
+ * @param block Buddy system block
+ *
+ * @return Order of block
+ */
+static __u8 zone_buddy_get_order(buddy_system_t *b, link_t * block) {
+    frame_t * frame;
+    frame = list_get_instance(block, frame_t, buddy_link);
+    return frame->buddy_order;
+}
+/** Buddy system mark_busy implementation
+ *
+ * @param b Buddy system
+ * @param block Buddy system block
+ *
+ */
+static void zone_buddy_mark_busy(buddy_system_t *b, link_t * block) {
+    frame_t * frame;
+    frame = list_get_instance(block, frame_t, buddy_link);
+    frame->refcount = 1;
+}
+/** Buddy system mark_available implementation
+ *
+ * @param b Buddy system
+ * @param block Buddy system block
+ *
+ */
+static void zone_buddy_mark_available(buddy_system_t *b, link_t * block) {
+    frame_t * frame;
+    frame = list_get_instance(block, frame_t, buddy_link);
+    frame->refcount = 0;
+}
+static struct buddy_system_operations  zone_buddy_system_operations = {
+    .find_buddy = zone_buddy_find_buddy,
+    .bisect = zone_buddy_bisect,
+    .coalesce = zone_buddy_coalesce,
+    .set_order = zone_buddy_set_order,
+    .get_order = zone_buddy_get_order,
+    .mark_busy = zone_buddy_mark_busy,
+    .mark_available = zone_buddy_mark_available,
+    .find_block = zone_buddy_find_block,
+    .print_id = zone_buddy_print_id
+};
+/*************************************/
+/* Zone functions */
+/** Allocate frame in particular zone
+ *
+ * Assume zone is locked
+ * Panics if allocation is impossible.
+ *
+ * @param zone  Zone to allocate from.
+ * @param order Allocate exactly 2^order frames.
+ *
+ * @return Frame index in zone
+ *
+ */
+static pfn_t zone_frame_alloc(zone_t *zone, __u8 order)
+{
+    pfn_t v;
+    link_t *tmp;
+    frame_t *frame;
+    /* Allocate frames from zone buddy system */
+    tmp = buddy_system_alloc(zone->buddy_system, order);
+    ASSERT(tmp);
+    /* Update zone information. */
+    zone->free_count -= (1 << order);
+    zone->busy_count += (1 << order);
+    /* Frame will be actually a first frame of the block. */
+    frame = list_get_instance(tmp, frame_t, buddy_link);
+    /* get frame address */
+    v = make_frame_index(zone, frame);
+    return v;
+}
+/** Free frame from zone
+ *
+ * Assume zone is locked
+ *
+ * @param zone Pointer to zone from which the frame is to be freed
+ * @param frame_idx Frame index relative to zone
+ */
+static void zone_frame_free(zone_t *zone, index_t frame_idx)
+{
+    frame_t *frame;
+    __u8 order;
+    frame = &zone->frames[frame_idx];
+    /* remember frame order */
+    order = frame->buddy_order;
+    ASSERT(frame->refcount);
+    if (!--frame->refcount) {
+        buddy_system_free(zone->buddy_system, &frame->buddy_link);
+        /* Update zone information. */
+        zone->free_count += (1 << order);
+        zone->busy_count -= (1 << order);
+    }
+}
+/** Return frame from zone */
+static frame_t * zone_get_frame(zone_t *zone, index_t frame_idx)
+{
+    ASSERT(frame_idx < zone->count);
+    return &zone->frames[frame_idx];
+}
+/** Mark frame in zone unavailable to allocation */
+static void zone_mark_unavailable(zone_t *zone, index_t frame_idx)
+{
+    frame_t *frame;
+    link_t *link;
+    frame = zone_get_frame(zone, frame_idx);
+    if (frame->refcount)
+        return;
+    link = buddy_system_alloc_block(zone->buddy_system,
+                    &frame->buddy_link);
+    ASSERT(link);
+    zone->free_count--;
+}
+/**
+ * Join 2 zones
+ *
+ * Expect zone_t *z to point to space at least zone_conf_size large
+ *
+ * Assume z1 & z2 are locked
+ *
+ * @param z Target zone structure pointer
+ * @param z1 Zone to merge
+ * @param z2 Zone to merge
+ */
+static void _zone_merge(zone_t *z, zone_t *z1, zone_t *z2)
+{
+    __u8 max_order;
+    int i, z2idx;
+    pfn_t frame_idx;
+    frame_t *frame;
+    ASSERT(!overlaps(z1->base,z1->count,z2->base,z2->count));
+    ASSERT(z1->base < z2->base);
+    spinlock_initialize(&z->lock, "zone_lock");
+    z->base = z1->base;
+    z->count = z2->base+z2->count - z1->base;
+    z->flags = z1->flags & z2->flags;
+    z->free_count = z1->free_count + z2->free_count;
+    z->busy_count = z1->busy_count + z2->busy_count;
+    max_order = fnzb(z->count);
+    z->buddy_system = (buddy_system_t *)&z[1];
+    buddy_system_create(z->buddy_system, max_order,
+                &zone_buddy_system_operations,
+                (void *) z);
+    z->frames = (frame_t *)((void *)z->buddy_system+buddy_conf_size(max_order));
+    for (i = 0; i < z->count; i++) {
+        /* This marks all frames busy */
+        frame_initialize(&z->frames[i]);
+    }
+    /* Copy frames from both zones to preserve full frame orders,
+     * parents etc. Set all free frames with refcount=0 to 1, because
+     * we add all free frames to buddy allocator later again, clear
+     * order to 0. Don't set busy frames with refcount=0, as they
+     * will not be reallocated during merge and it would make later
+     * problems with allocation/free.
+     */
+    for (i=0; i<z1->count; i++)
+        z->frames[i] = z1->frames[i];
+    for (i=0; i < z2->count; i++) {
+        z2idx = i + (z2->base - z1->base);
+        z->frames[z2idx] = z2->frames[i];
+    }
+    i = 0;
+    while (i < z->count) {
+        if (z->frames[i].refcount) {
+            /* skip busy frames */
+            i += 1 << z->frames[i].buddy_order;
+        } else { /* Free frames, set refcount=1 */
+            /* All free frames have refcount=0, we need not
+             * to check the order */
+            z->frames[i].refcount = 1;
+            z->frames[i].buddy_order = 0;
+            i++;
+        }
+    }
+    /* Add free blocks from the 2 original zones */
+    while (zone_can_alloc(z1, 0)) {
+        frame_idx = zone_frame_alloc(z1, 0);
+        frame = &z->frames[frame_idx];
+        frame->refcount = 0;
+        buddy_system_free(z->buddy_system, &frame->buddy_link);
+    }
+    while (zone_can_alloc(z2, 0)) {
+        frame_idx = zone_frame_alloc(z2, 0);
+        frame = &z->frames[frame_idx + (z2->base-z1->base)];
+        frame->refcount = 0;
+        buddy_system_free(z->buddy_system, &frame->buddy_link);
+    }
+}
+/** Return old configuration frames into the zone
+ *
+ * We have several cases
+ * - the conf. data is outside of zone -> exit, shall we call frame_free??
+ * - the conf. data was created by zone_create or
+ *   updated with reduce_region -> free every frame
+ *
+ * @param newzone The actual zone where freeing should occur
+ * @param oldzone Pointer to old zone configuration data that should
+ *                be freed from new zone
+ */
+static void return_config_frames(zone_t *newzone, zone_t *oldzone)
+{
+    pfn_t pfn;
+    frame_t *frame;
+    count_t cframes;
+    int i;
+    pfn = ADDR2PFN((__address)KA2PA(oldzone));
+    cframes = SIZE2FRAMES(zone_conf_size(oldzone->count));
+    if (pfn < newzone->base || pfn >= newzone->base + newzone->count)
+        return;
+    frame = &newzone->frames[pfn - newzone->base];
+    ASSERT(!frame->buddy_order);
+    for (i=0; i < cframes; i++) {
+        newzone->busy_count++;
+        zone_frame_free(newzone, pfn+i-newzone->base);
+    }
+}
+/** Reduce allocated block to count of order 0 frames
+ *
+ * The allocated block need 2^order frames of space. Reduce all frames
+ * in block to order 0 and free the unneeded frames. This means, that
+ * when freeing the previously allocated block starting with frame_idx,
+ * you have to free every frame.
+ *
+ * @param zone
+ * @param frame_idx Index to block
+ * @param count Allocated space in block
+ */
+static void zone_reduce_region(zone_t *zone, pfn_t frame_idx, count_t count)
+{
+    count_t i;
+    __u8 order;
+    frame_t *frame;
+    ASSERT(frame_idx+count < zone->count);
+    order = zone->frames[frame_idx].buddy_order;
+    ASSERT((1 << order) >= count);
+    /* Reduce all blocks to order 0 */
+    for (i=0; i < (1 << order); i++) {
+        frame = &zone->frames[i + frame_idx];
+        frame->buddy_order = 0;
+        if (! frame->refcount)
+            frame->refcount = 1;
+        ASSERT(frame->refcount == 1);
+    }
+    /* Free unneeded frames */
+    for (i=count; i < (1 << order); i++) {
+        zone_frame_free(zone, i + frame_idx);
+    }
+}
+/** Merge zones z1 and z2
+ *
+ * - the zones must be 2 zones with no zone existing in between,
+ *   which means that z2 = z1+1
+ *
+ * - When you create a new zone, the frame allocator configuration does
+ *   not to be 2^order size. Once the allocator is running it is no longer
+ *   possible, merged configuration data occupies more space :-/
+ */
+void zone_merge(int z1, int z2)
+{
+    ipl_t ipl;
+    zone_t *zone1, *zone2, *newzone;
+    int cframes;
+    __u8 order;
+    int i;
+    pfn_t pfn;
+    ipl = interrupts_disable();
+    spinlock_lock(&zones.lock);
+    if (z1 < 0 || z1 >= zones.count || z2 < 0 || z2 >= zones.count)
+        goto errout;
+    /* We can join only 2 zones with none existing inbetween */
+    if (z2-z1 != 1)
+        goto errout;
+    zone1 = zones.info[z1];
+    zone2 = zones.info[z2];
+    spinlock_lock(&zone1->lock);
+    spinlock_lock(&zone2->lock);
+    cframes = SIZE2FRAMES(zone_conf_size(zone2->base+zone2->count-zone1->base));
+    if (cframes == 1)
+        order = 0;
+    else
+        order = fnzb(cframes - 1) + 1;
+    /* Allocate zonedata inside one of the zones */
+    if (zone_can_alloc(zone1, order))
+        pfn = zone1->base + zone_frame_alloc(zone1, order);
+    else if (zone_can_alloc(zone2, order))
+        pfn = zone2->base + zone_frame_alloc(zone2, order);
+    else
+        goto errout2;
+    newzone = (zone_t *)PA2KA(PFN2ADDR(pfn));
+    _zone_merge(newzone, zone1, zone2);
+    /* Free unneeded config frames */
+    zone_reduce_region(newzone, pfn - newzone->base,  cframes);
+    /* Subtract zone information from busy frames */
+    newzone->busy_count -= cframes;
+    /* Replace existing zones in zoneinfo list */
+    zones.info[z1] = newzone;
+    for (i = z2 + 1; i < zones.count; i++)
+        zones.info[i - 1] = zones.info[i];
+    zones.count--;
+    /* Free old zone information */
+    return_config_frames(newzone, zone1);
+    return_config_frames(newzone, zone2);
+errout2:
+    /* Nobody is allowed to enter to zone, so we are safe
+     * to touch the spinlocks last time */
+    spinlock_unlock(&zone1->lock);
+    spinlock_unlock(&zone2->lock);
+errout:
+    spinlock_unlock(&zones.lock);
+    interrupts_restore(ipl);
+}
+/**
+ * Merge all zones into one big zone
+ *
+ * It is reasonable to do this on systems whose bios reports parts in chunks,
+ * so that we could have 1 zone (it's faster).
+ */
+void zone_merge_all(void)
+{
+    int count = zones.count;
+    while (zones.count > 1 && --count) {
+        zone_merge(0,1);
+        break;
+    }
+}
+/** Create frame zone
+ *
+ * Create new frame zone.
+ *
+ * @param start Physical address of the first frame within the zone.
+ * @param count Count of frames in zone
+ * @param z Address of configuration information of zone
+ * @param flags Zone flags.
+ *
+ * @return Initialized zone.
+ */
+static void zone_construct(pfn_t start, count_t count, zone_t *z, int flags)
+{
+    int i;
+    __u8 max_order;
+    spinlock_initialize(&z->lock, "zone_lock");
+    z->base = start;
+    z->count = count;
+    z->flags = flags;
+    z->free_count = count;
+    z->busy_count = 0;
+    /*
+     * Compute order for buddy system, initialize
+     */
+    max_order = fnzb(count);
+    z->buddy_system = (buddy_system_t *)&z[1];
+    buddy_system_create(z->buddy_system, max_order,
+                &zone_buddy_system_operations,
+                (void *) z);
+    /* Allocate frames _after_ the conframe */
+    /* Check sizes */
+    z->frames = (frame_t *)((void *)z->buddy_system+buddy_conf_size(max_order));
+    for (i = 0; i<count; i++) {
+        frame_initialize(&z->frames[i]);
+    }
+    /* Stuffing frames */
+    for (i = 0; i < count; i++) {
+        z->frames[i].refcount = 0;
+        buddy_system_free(z->buddy_system, &z->frames[i].buddy_link);
+    }
+}
+/** Compute configuration data size for zone
+ *
+ * @param count Size of zone in frames
+ * @return Size of zone configuration info (in bytes)
+ */
+__address zone_conf_size(count_t count)
+{
+    int size = sizeof(zone_t) + count*sizeof(frame_t);
+    int max_order;
+    max_order = fnzb(count);
+    size += buddy_conf_size(max_order);
+    return size;
+}
+/** Create and add zone to system
+ *
+ * @param start First frame number (absolute)
+ * @param count Size of zone in frames
+ * @param confframe Where configuration frames are supposed to be.
+ *                  Automatically checks, that we will not disturb the
+ *                  kernel and possibly init.
+ *                  If confframe is given _outside_ this zone, it is expected,
+ *                  that the area is already marked BUSY and big enough
+ *                  to contain zone_conf_size() amount of data.
+ *                  If the confframe is inside the area, the zone free frame
+ *                  information is modified not to include it.
+ *
+ * @return Zone number or -1 on error
+ */
+int zone_create(pfn_t start, count_t count, pfn_t confframe, int flags)
+{
+    zone_t *z;
+    __address addr;
+    count_t confcount;
+    int i;
+    int znum;
+    /* Theoretically we could have here 0, practically make sure
+     * nobody tries to do that. If some platform requires, remove
+     * the assert
+     */
+    ASSERT(confframe);
+    /* If conframe is supposed to be inside our zone, then make sure
+     * it does not span kernel & init
+     */
+    confcount = SIZE2FRAMES(zone_conf_size(count));
+    if (confframe >= start && confframe < start+count) {
+        for (;confframe < start + count; confframe++) {
+            addr = PFN2ADDR(confframe);
+            if (overlaps(addr, PFN2ADDR(confcount), KA2PA(config.base), config.kernel_size))
+                continue;
+            bool overlap = false;
+            count_t i;
+            for (i = 0; i < init.cnt; i++)
+                if (overlaps(addr, PFN2ADDR(confcount), KA2PA(init.tasks[i].addr), init.tasks[i].size)) {
+                    overlap = true;
+                    break;
+                }
+            if (overlap)
+                continue;
+            break;
+        }
+        if (confframe >= start + count)
+            panic("Cannot find configuration data for zone.");
+    }
+    z = (zone_t *)PA2KA(PFN2ADDR(confframe));
+    zone_construct(start, count, z, flags);
+    znum = zones_add_zone(z);
+    if (znum == -1)
+        return -1;
+    /* If confdata in zone, mark as unavailable */
+    if (confframe >= start && confframe < start+count)
+        for (i=confframe; i<confframe+confcount; i++) {
+            zone_mark_unavailable(z, i - z->base);
+        }
+    return znum;
+}
+/***************************************/
+/* Frame functions */
+/** Set parent of frame */
+void frame_set_parent(pfn_t pfn, void *data, int hint)
+{
+    zone_t *zone = find_zone_and_lock(pfn, &hint);
+    ASSERT(zone);
+    zone_get_frame(zone, pfn-zone->base)->parent = data;
+    spinlock_unlock(&zone->lock);
+}
+void * frame_get_parent(pfn_t pfn, int hint)
+{
+    zone_t *zone = find_zone_and_lock(pfn, &hint);
+    void *res;
+    ASSERT(zone);
+    res = zone_get_frame(zone, pfn - zone->base)->parent;
+    spinlock_unlock(&zone->lock);
+    return res;
+}
+/** Allocate power-of-two frames of physical memory.
+ *
+ * @param order  Allocate exactly 2^order frames.
+ * @param flags  Flags for host zone selection and address processing.
+ * @param status Allocation status (FRAME_OK on success), unused if NULL.
+ * @param pzone  Preferred zone
+ *
+ * @return Allocated frame.
+ *
+ */
+pfn_t frame_alloc_generic(__u8 order, int flags, int *status, int *pzone)
+{
+    ipl_t ipl;
+    int freed;
+    pfn_t v;
+    zone_t *zone;
+loop:
+    ipl = interrupts_disable();
+    /*
+     * First, find suitable frame zone.
+     */
+    zone = find_free_zone_lock(order, pzone);
+    /* If no memory, reclaim some slab memory,
+       if it does not help, reclaim all */
+    if (!zone && !(flags & FRAME_NO_RECLAIM)) {
+        freed = slab_reclaim(0);
+        if (freed)
+            zone = find_free_zone_lock(order, pzone);
+        if (!zone) {
+            freed = slab_reclaim(SLAB_RECLAIM_ALL);
+            if (freed)
+                zone = find_free_zone_lock(order, pzone);
+        }
+    }
+    if (!zone) {
+        if (flags & FRAME_PANIC)
+            panic("Can't allocate frame.\n");
+        /*
+         * TODO: Sleep until frames are available again.
+         */
+        interrupts_restore(ipl);
+        if (flags & FRAME_ATOMIC) {
+            ASSERT(status != NULL);
+            if (status)
+                *status = FRAME_NO_MEMORY;
+            return NULL;
+        }
+        panic("Sleep not implemented.\n");
+        goto loop;
+    }
+    v = zone_frame_alloc(zone, order);
+    v += zone->base;
+    spinlock_unlock(&zone->lock);
+    interrupts_restore(ipl);
+    if (status)
+        *status = FRAME_OK;
+    return v;
+}
+/** Free a frame.
+ *
+ * Find respective frame structure for supplied PFN.
+ * Decrement frame reference count.
+ * If it drops to zero, move the frame structure to free list.
+ *
+ * @param pfn Frame number of the frame to be freed.
+ */
+void frame_free(pfn_t pfn)
+{
+    ipl_t ipl;
+    zone_t *zone;
+    ipl = interrupts_disable();
+    /*
+     * First, find host frame zone for addr.
+     */
+    zone = find_zone_and_lock(pfn,NULL);
+    ASSERT(zone);
+    zone_frame_free(zone, pfn-zone->base);
+    spinlock_unlock(&zone->lock);
+    interrupts_restore(ipl);
+}
+/** Add reference to frame.
+ *
+ * Find respective frame structure for supplied PFN and
+ * increment frame reference count.
+ *
+ * @param pfn Frame number of the frame to be freed.
+ */
+void frame_reference_add(pfn_t pfn)
+{
+    ipl_t ipl;
+    zone_t *zone;
+    frame_t *frame;
+    ipl = interrupts_disable();
+    /*
+     * First, find host frame zone for addr.
+     */
+    zone = find_zone_and_lock(pfn,NULL);
+    ASSERT(zone);
+    frame = &zone->frames[pfn-zone->base];
+    frame->refcount++;
+    spinlock_unlock(&zone->lock);
+    interrupts_restore(ipl);
+}
+/** Mark given range unavailable in frame zones */
+void frame_mark_unavailable(pfn_t start, count_t count)
+{
+    int i;
+    zone_t *zone;
+    int prefzone = 0;
+    for (i=0; i < count; i++) {
+        zone = find_zone_and_lock(start+i,&prefzone);
+        if (!zone) /* PFN not found */
+            continue;
+        zone_mark_unavailable(zone, start+i-zone->base);
+        spinlock_unlock(&zone->lock);
+    }
+}
+/** Initialize physical memory management
+ *
+ * Initialize physical memory managemnt.
+ */
+void frame_init(void)
+{
+    if (config.cpu_active == 1) {
+        zones.count = 0;
+        spinlock_initialize(&zones.lock,"zones_glob_lock");
+    }
+    /* Tell the architecture to create some memory */
+    frame_arch_init();
+    if (config.cpu_active == 1) {
+        pfn_t firstframe = ADDR2PFN(KA2PA(config.base));
+        pfn_t lastframe = ADDR2PFN(KA2PA(config.base+config.kernel_size));
+        frame_mark_unavailable(firstframe,lastframe-firstframe+1);
+        count_t i;
+        for (i = 0; i < init.cnt; i++)
+            frame_mark_unavailable(ADDR2PFN(KA2PA(init.tasks[i].addr)), SIZE2FRAMES(init.tasks[i].size));
+        /* Black list first frame, as allocating NULL would
+         * fail on some places */
+        frame_mark_unavailable(0, 1);
+    }
+}
+/** Prints list of zones
+ *
+ */
+void zone_print_list(void) {
+    zone_t *zone = NULL;
+    int i;
+    ipl_t ipl;
+    ipl = interrupts_disable();
+    spinlock_lock(&zones.lock);
+    printf("#  Base address\tFree Frames\tBusy Frames\n");
+    printf("   ------------\t-----------\t-----------\n");
+    for (i = 0; i < zones.count; i++) {
+        zone = zones.info[i];
+        spinlock_lock(&zone->lock);
+        printf("%d: %.*p \t%10zd\t%10zd\n", i, sizeof(__address) * 2, PFN2ADDR(zone->base), zone->free_count, zone->busy_count);
+        spinlock_unlock(&zone->lock);
+    }
+    spinlock_unlock(&zones.lock);
+    interrupts_restore(ipl);
+}
+/** Prints zone details.
+ *
+ * @param num Zone base address or zone number.
+ */
+void zone_print_one(int num) {
+    zone_t *zone = NULL;
+    ipl_t ipl;
+    int i;
+    ipl = interrupts_disable();
+    spinlock_lock(&zones.lock);
+    for (i = 0; i < zones.count; i++) {
+        if (i == num || PFN2ADDR(zones.info[i]->base) == num) {
+            zone = zones.info[i];
+            break;
+        }
+    }
+    if (!zone) {
+        printf("Zone not found.\n");
+        goto out;
+    }
+    spinlock_lock(&zone->lock);
+    printf("Memory zone information\n");
+    printf("Zone base address: %#.*p\n", sizeof(__address) * 2, PFN2ADDR(zone->base));
+    printf("Zone size: %zd frames (%zdK)\n", zone->count, ((zone->count) * FRAME_SIZE) >> 10);
+    printf("Allocated space: %zd frames (%zdK)\n", zone->busy_count, (zone->busy_count * FRAME_SIZE) >> 10);
+    printf("Available space: %zd (%zdK)\n", zone->free_count, (zone->free_count * FRAME_SIZE) >> 10);
+    buddy_system_structure_print(zone->buddy_system, FRAME_SIZE);
+    spinlock_unlock(&zone->lock);
+out:
+    spinlock_unlock(&zones.lock);
+    interrupts_restore(ipl);
+}
+ /** @}
+ */

 /tags/0.2.0.2/kernel/generic/src/mm/slab.c
 ,0 → 1,912
+/*
+ * Copyright (C) 2006 Ondrej Palkovsky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup genericmm
+ * @{
+ */
+/**
+ * @file
+ * @brief   Slab allocator.
+ *
+ * The slab allocator is closely modelled after OpenSolaris slab allocator.
+ * @see http://www.usenix.org/events/usenix01/full_papers/bonwick/bonwick_html/
+ *
+ * with the following exceptions:
+ * @li empty slabs are deallocated immediately
+ *     (in Linux they are kept in linked list, in Solaris ???)
+ * @li empty magazines are deallocated when not needed
+ *     (in Solaris they are held in linked list in slab cache)
+ *
+ * Following features are not currently supported but would be easy to do:
+ * @li cache coloring
+ * @li dynamic magazine growing (different magazine sizes are already
+ *     supported, but we would need to adjust allocation strategy)
+ *
+ * The slab allocator supports per-CPU caches ('magazines') to facilitate
+ * good SMP scaling.
+ *
+ * When a new object is being allocated, it is first checked, if it is
+ * available in a CPU-bound magazine. If it is not found there, it is
+ * allocated from a CPU-shared slab - if a partially full one is found,
+ * it is used, otherwise a new one is allocated.
+ *
+ * When an object is being deallocated, it is put to a CPU-bound magazine.
+ * If there is no such magazine, a new one is allocated (if this fails,
+ * the object is deallocated into slab). If the magazine is full, it is
+ * put into cpu-shared list of magazines and a new one is allocated.
+ *
+ * The CPU-bound magazine is actually a pair of magazines in order to avoid
+ * thrashing when somebody is allocating/deallocating 1 item at the magazine
+ * size boundary. LIFO order is enforced, which should avoid fragmentation
+ * as much as possible.
+ *
+ * Every cache contains list of full slabs and list of partially full slabs.
+ * Empty slabs are immediately freed (thrashing will be avoided because
+ * of magazines).
+ *
+ * The slab information structure is kept inside the data area, if possible.
+ * The cache can be marked that it should not use magazines. This is used
+ * only for slab related caches to avoid deadlocks and infinite recursion
+ * (the slab allocator uses itself for allocating all it's control structures).
+ *
+ * The slab allocator allocates a lot of space and does not free it. When
+ * the frame allocator fails to allocate a frame, it calls slab_reclaim().
+ * It tries 'light reclaim' first, then brutal reclaim. The light reclaim
+ * releases slabs from cpu-shared magazine-list, until at least 1 slab
+ * is deallocated in each cache (this algorithm should probably change).
+ * The brutal reclaim removes all cached objects, even from CPU-bound
+ * magazines.
+ *
+ * TODO:@n
+ * For better CPU-scaling the magazine allocation strategy should
+ * be extended. Currently, if the cache does not have magazine, it asks
+ * for non-cpu cached magazine cache to provide one. It might be feasible
+ * to add cpu-cached magazine cache (which would allocate it's magazines
+ * from non-cpu-cached mag. cache). This would provide a nice per-cpu
+ * buffer. The other possibility is to use the per-cache
+ * 'empty-magazine-list', which decreases competing for 1 per-system
+ * magazine cache.
+ *
+ * @li it might be good to add granularity of locks even to slab level,
+ *     we could then try_spinlock over all partial slabs and thus improve
+ *     scalability even on slab level
+ */
+#include <synch/spinlock.h>
+#include <mm/slab.h>
+#include <adt/list.h>
+#include <memstr.h>
+#include <align.h>
+#include <mm/frame.h>
+#include <config.h>
+#include <print.h>
+#include <arch.h>
+#include <panic.h>
+#include <debug.h>
+#include <bitops.h>
+SPINLOCK_INITIALIZE(slab_cache_lock);
+static LIST_INITIALIZE(slab_cache_list);
+/** Magazine cache */
+static slab_cache_t mag_cache;
+/** Cache for cache descriptors */
+static slab_cache_t slab_cache_cache;
+/** Cache for external slab descriptors
+ * This time we want per-cpu cache, so do not make it static
+ * - using slab for internal slab structures will not deadlock,
+ *   as all slab structures are 'small' - control structures of
+ *   their caches do not require further allocation
+ */
+static slab_cache_t *slab_extern_cache;
+/** Caches for malloc */
+static slab_cache_t *malloc_caches[SLAB_MAX_MALLOC_W-SLAB_MIN_MALLOC_W+1];
+char *malloc_names[] =  {
+    "malloc-16","malloc-32","malloc-64","malloc-128",
+    "malloc-256","malloc-512","malloc-1K","malloc-2K",
+    "malloc-4K","malloc-8K","malloc-16K","malloc-32K",
+    "malloc-64K","malloc-128K","malloc-256K"
+};
+/** Slab descriptor */
+typedef struct {
+    slab_cache_t *cache; /**< Pointer to parent cache */
+    link_t link;       /* List of full/partial slabs */
+    void *start;       /**< Start address of first available item */
+    count_t available; /**< Count of available items in this slab */
+    index_t nextavail; /**< The index of next available item */
+}slab_t;
+#ifdef CONFIG_DEBUG
+static int _slab_initialized = 0;
+#endif
+/**************************************/
+/* Slab allocation functions          */
+/**
+ * Allocate frames for slab space and initialize
+ *
+ */
+static slab_t * slab_space_alloc(slab_cache_t *cache, int flags)
+{
+    void *data;
+    slab_t *slab;
+    size_t fsize;
+    int i;
+    int status;
+    pfn_t pfn;
+    int zone=0;
+    pfn = frame_alloc_rc_zone(cache->order, FRAME_KA | flags, &status, &zone);
+    data = (void *) PA2KA(PFN2ADDR(pfn));
+    if (status != FRAME_OK) {
+        return NULL;
+    }
+    if (! (cache->flags & SLAB_CACHE_SLINSIDE)) {
+        slab = slab_alloc(slab_extern_cache, flags);
+        if (!slab) {
+            frame_free(ADDR2PFN(KA2PA(data)));
+            return NULL;
+        }
+    } else {
+        fsize = (PAGE_SIZE << cache->order);
+        slab = data + fsize - sizeof(*slab);
+    }
+    /* Fill in slab structures */
+    for (i=0; i < (1 << cache->order); i++)
+        frame_set_parent(pfn+i, slab, zone);
+    slab->start = data;
+    slab->available = cache->objects;
+    slab->nextavail = 0;
+    slab->cache = cache;
+    for (i=0; i<cache->objects;i++)
+        *((int *) (slab->start + i*cache->size)) = i+1;
+    atomic_inc(&cache->allocated_slabs);
+    return slab;
+}
+/**
+ * Deallocate space associated with slab
+ *
+ * @return number of freed frames
+ */
+static count_t slab_space_free(slab_cache_t *cache, slab_t *slab)
+{
+    frame_free(ADDR2PFN(KA2PA(slab->start)));
+    if (! (cache->flags & SLAB_CACHE_SLINSIDE))
+        slab_free(slab_extern_cache, slab);
+    atomic_dec(&cache->allocated_slabs);
+    return 1 << cache->order;
+}
+/** Map object to slab structure */
+static slab_t * obj2slab(void *obj)
+{
+    return (slab_t *)frame_get_parent(ADDR2PFN(KA2PA(obj)), 0);
+}
+/**************************************/
+/* Slab functions */
+/**
+ * Return object to slab and call a destructor
+ *
+ * @param slab If the caller knows directly slab of the object, otherwise NULL
+ *
+ * @return Number of freed pages
+ */
+static count_t slab_obj_destroy(slab_cache_t *cache, void *obj,
+                slab_t *slab)
+{
+    int freed = 0;
+    if (!slab)
+        slab = obj2slab(obj);
+    ASSERT(slab->cache == cache);
+    if (cache->destructor)
+        freed = cache->destructor(obj);
+    spinlock_lock(&cache->slablock);
+    ASSERT(slab->available < cache->objects);
+    *((int *)obj) = slab->nextavail;
+    slab->nextavail = (obj - slab->start)/cache->size;
+    slab->available++;
+    /* Move it to correct list */
+    if (slab->available == cache->objects) {
+        /* Free associated memory */
+        list_remove(&slab->link);
+        spinlock_unlock(&cache->slablock);
+        return freed + slab_space_free(cache, slab);
+    } else if (slab->available == 1) {
+        /* It was in full, move to partial */
+        list_remove(&slab->link);
+        list_prepend(&slab->link, &cache->partial_slabs);
+    }
+    spinlock_unlock(&cache->slablock);
+    return freed;
+}
+/**
+ * Take new object from slab or create new if needed
+ *
+ * @return Object address or null
+ */
+static void * slab_obj_create(slab_cache_t *cache, int flags)
+{
+    slab_t *slab;
+    void *obj;
+    spinlock_lock(&cache->slablock);
+    if (list_empty(&cache->partial_slabs)) {
+        /* Allow recursion and reclaiming
+         * - this should work, as the slab control structures
+         *   are small and do not need to allocate with anything
+         *   other than frame_alloc when they are allocating,
+         *   that's why we should get recursion at most 1-level deep
+         */
+        spinlock_unlock(&cache->slablock);
+        slab = slab_space_alloc(cache, flags);
+        if (!slab)
+            return NULL;
+        spinlock_lock(&cache->slablock);
+    } else {
+        slab = list_get_instance(cache->partial_slabs.next,
+                     slab_t,
+                     link);
+        list_remove(&slab->link);
+    }
+    obj = slab->start + slab->nextavail * cache->size;
+    slab->nextavail = *((int *)obj);
+    slab->available--;
+    if (! slab->available)
+        list_prepend(&slab->link, &cache->full_slabs);
+    else
+        list_prepend(&slab->link, &cache->partial_slabs);
+    spinlock_unlock(&cache->slablock);
+    if (cache->constructor && cache->constructor(obj, flags)) {
+        /* Bad, bad, construction failed */
+        slab_obj_destroy(cache, obj, slab);
+        return NULL;
+    }
+    return obj;
+}
+/**************************************/
+/* CPU-Cache slab functions */
+/**
+ * Finds a full magazine in cache, takes it from list
+ * and returns it
+ *
+ * @param first If true, return first, else last mag
+ */
+static slab_magazine_t * get_mag_from_cache(slab_cache_t *cache,
+                        int first)
+{
+    slab_magazine_t *mag = NULL;
+    link_t *cur;
+    spinlock_lock(&cache->maglock);
+    if (!list_empty(&cache->magazines)) {
+        if (first)
+            cur = cache->magazines.next;
+        else
+            cur = cache->magazines.prev;
+        mag = list_get_instance(cur, slab_magazine_t, link);
+        list_remove(&mag->link);
+        atomic_dec(&cache->magazine_counter);
+    }
+    spinlock_unlock(&cache->maglock);
+    return mag;
+}
+/** Prepend magazine to magazine list in cache */
+static void put_mag_to_cache(slab_cache_t *cache, slab_magazine_t *mag)
+{
+    spinlock_lock(&cache->maglock);
+    list_prepend(&mag->link, &cache->magazines);
+    atomic_inc(&cache->magazine_counter);
+    spinlock_unlock(&cache->maglock);
+}
+/**
+ * Free all objects in magazine and free memory associated with magazine
+ *
+ * @return Number of freed pages
+ */
+static count_t magazine_destroy(slab_cache_t *cache,
+                slab_magazine_t *mag)
+{
+    int i;
+    count_t frames = 0;
+    for (i=0;i < mag->busy; i++) {
+        frames += slab_obj_destroy(cache, mag->objs[i], NULL);
+        atomic_dec(&cache->cached_objs);
+    }
+    slab_free(&mag_cache, mag);
+    return frames;
+}
+/**
+ * Find full magazine, set it as current and return it
+ *
+ * Assume cpu_magazine lock is held
+ */
+static slab_magazine_t * get_full_current_mag(slab_cache_t *cache)
+{
+    slab_magazine_t *cmag, *lastmag, *newmag;
+    cmag = cache->mag_cache[CPU->id].current;
+    lastmag = cache->mag_cache[CPU->id].last;
+    if (cmag) { /* First try local CPU magazines */
+        if (cmag->busy)
+            return cmag;
+        if (lastmag && lastmag->busy) {
+            cache->mag_cache[CPU->id].current = lastmag;
+            cache->mag_cache[CPU->id].last = cmag;
+            return lastmag;
+        }
+    }
+    /* Local magazines are empty, import one from magazine list */
+    newmag = get_mag_from_cache(cache, 1);
+    if (!newmag)
+        return NULL;
+    if (lastmag)
+        magazine_destroy(cache, lastmag);
+    cache->mag_cache[CPU->id].last = cmag;
+    cache->mag_cache[CPU->id].current = newmag;
+    return newmag;
+}
+/**
+ * Try to find object in CPU-cache magazines
+ *
+ * @return Pointer to object or NULL if not available
+ */
+static void * magazine_obj_get(slab_cache_t *cache)
+{
+    slab_magazine_t *mag;
+    void *obj;
+    if (!CPU)
+        return NULL;
+    spinlock_lock(&cache->mag_cache[CPU->id].lock);
+    mag = get_full_current_mag(cache);
+    if (!mag) {
+        spinlock_unlock(&cache->mag_cache[CPU->id].lock);
+        return NULL;
+    }
+    obj = mag->objs[--mag->busy];
+    spinlock_unlock(&cache->mag_cache[CPU->id].lock);
+    atomic_dec(&cache->cached_objs);
+    return obj;
+}
+/**
+ * Assure that the current magazine is empty, return pointer to it, or NULL if
+ * no empty magazine is available and cannot be allocated
+ *
+ * Assume mag_cache[CPU->id].lock is held
+ *
+ * We have 2 magazines bound to processor.
+ * First try the current.
+ *  If full, try the last.
+ *   If full, put to magazines list.
+ *   allocate new, exchange last & current
+ *
+ */
+static slab_magazine_t * make_empty_current_mag(slab_cache_t *cache)
+{
+    slab_magazine_t *cmag,*lastmag,*newmag;
+    cmag = cache->mag_cache[CPU->id].current;
+    lastmag = cache->mag_cache[CPU->id].last;
+    if (cmag) {
+        if (cmag->busy < cmag->size)
+            return cmag;
+        if (lastmag && lastmag->busy < lastmag->size) {
+            cache->mag_cache[CPU->id].last = cmag;
+            cache->mag_cache[CPU->id].current = lastmag;
+            return lastmag;
+        }
+    }
+    /* current | last are full | nonexistent, allocate new */
+    /* We do not want to sleep just because of caching */
+    /* Especially we do not want reclaiming to start, as
+     * this would deadlock */
+    newmag = slab_alloc(&mag_cache, FRAME_ATOMIC | FRAME_NO_RECLAIM);
+    if (!newmag)
+        return NULL;
+    newmag->size = SLAB_MAG_SIZE;
+    newmag->busy = 0;
+    /* Flush last to magazine list */
+    if (lastmag)
+        put_mag_to_cache(cache, lastmag);
+    /* Move current as last, save new as current */
+    cache->mag_cache[CPU->id].last = cmag;
+    cache->mag_cache[CPU->id].current = newmag;
+    return newmag;
+}
+/**
+ * Put object into CPU-cache magazine
+ *
+ * @return 0 - success, -1 - could not get memory
+ */
+static int magazine_obj_put(slab_cache_t *cache, void *obj)
+{
+    slab_magazine_t *mag;
+    if (!CPU)
+        return -1;
+    spinlock_lock(&cache->mag_cache[CPU->id].lock);
+    mag = make_empty_current_mag(cache);
+    if (!mag) {
+        spinlock_unlock(&cache->mag_cache[CPU->id].lock);
+        return -1;
+    }
+    mag->objs[mag->busy++] = obj;
+    spinlock_unlock(&cache->mag_cache[CPU->id].lock);
+    atomic_inc(&cache->cached_objs);
+    return 0;
+}
+/**************************************/
+/* Slab cache functions */
+/** Return number of objects that fit in certain cache size */
+static int comp_objects(slab_cache_t *cache)
+{
+    if (cache->flags & SLAB_CACHE_SLINSIDE)
+        return ((PAGE_SIZE << cache->order) - sizeof(slab_t)) / cache->size;
+    else
+        return (PAGE_SIZE << cache->order) / cache->size;
+}
+/** Return wasted space in slab */
+static int badness(slab_cache_t *cache)
+{
+    int objects;
+    int ssize;
+    objects = comp_objects(cache);
+    ssize = PAGE_SIZE << cache->order;
+    if (cache->flags & SLAB_CACHE_SLINSIDE)
+        ssize -= sizeof(slab_t);
+    return ssize - objects*cache->size;
+}
+/**
+ * Initialize mag_cache structure in slab cache
+ */
+static void make_magcache(slab_cache_t *cache)
+{
+    int i;
+    ASSERT(_slab_initialized >= 2);
+    cache->mag_cache = malloc(sizeof(slab_mag_cache_t)*config.cpu_count,0);
+    for (i=0; i < config.cpu_count; i++) {
+        memsetb((__address)&cache->mag_cache[i],
+            sizeof(cache->mag_cache[i]), 0);
+        spinlock_initialize(&cache->mag_cache[i].lock,
+                    "slab_maglock_cpu");
+    }
+}
+/** Initialize allocated memory as a slab cache */
+static void
+_slab_cache_create(slab_cache_t *cache,
+           char *name,
+           size_t size,
+           size_t align,
+           int (*constructor)(void *obj, int kmflag),
+           int (*destructor)(void *obj),
+           int flags)
+{
+    int pages;
+    ipl_t ipl;
+    memsetb((__address)cache, sizeof(*cache), 0);
+    cache->name = name;
+    if (align < sizeof(__native))
+        align = sizeof(__native);
+    size = ALIGN_UP(size, align);
+    cache->size = size;
+    cache->constructor = constructor;
+    cache->destructor = destructor;
+    cache->flags = flags;
+    list_initialize(&cache->full_slabs);
+    list_initialize(&cache->partial_slabs);
+    list_initialize(&cache->magazines);
+    spinlock_initialize(&cache->slablock, "slab_lock");
+    spinlock_initialize(&cache->maglock, "slab_maglock");
+    if (! (cache->flags & SLAB_CACHE_NOMAGAZINE))
+        make_magcache(cache);
+    /* Compute slab sizes, object counts in slabs etc. */
+    if (cache->size < SLAB_INSIDE_SIZE)
+        cache->flags |= SLAB_CACHE_SLINSIDE;
+    /* Minimum slab order */
+    pages = SIZE2FRAMES(cache->size);
+    /* We need the 2^order >= pages */
+    if (pages == 1)
+        cache->order = 0;
+    else
+        cache->order = fnzb(pages-1)+1;
+    while (badness(cache) > SLAB_MAX_BADNESS(cache)) {
+        cache->order += 1;
+    }
+    cache->objects = comp_objects(cache);
+    /* If info fits in, put it inside */
+    if (badness(cache) > sizeof(slab_t))
+        cache->flags |= SLAB_CACHE_SLINSIDE;
+    /* Add cache to cache list */
+    ipl = interrupts_disable();
+    spinlock_lock(&slab_cache_lock);
+    list_append(&cache->link, &slab_cache_list);
+    spinlock_unlock(&slab_cache_lock);
+    interrupts_restore(ipl);
+}
+/** Create slab cache  */
+slab_cache_t * slab_cache_create(char *name,
+                 size_t size,
+                 size_t align,
+                 int (*constructor)(void *obj, int kmflag),
+                 int (*destructor)(void *obj),
+                 int flags)
+{
+    slab_cache_t *cache;
+    cache = slab_alloc(&slab_cache_cache, 0);
+    _slab_cache_create(cache, name, size, align, constructor, destructor,
+               flags);
+    return cache;
+}
+/**
+ * Reclaim space occupied by objects that are already free
+ *
+ * @param flags If contains SLAB_RECLAIM_ALL, do aggressive freeing
+ * @return Number of freed pages
+ */
+static count_t _slab_reclaim(slab_cache_t *cache, int flags)
+{
+    int i;
+    slab_magazine_t *mag;
+    count_t frames = 0;
+    int magcount;
+    if (cache->flags & SLAB_CACHE_NOMAGAZINE)
+        return 0; /* Nothing to do */
+    /* We count up to original magazine count to avoid
+     * endless loop
+     */
+    magcount = atomic_get(&cache->magazine_counter);
+    while (magcount-- && (mag=get_mag_from_cache(cache,0))) {
+        frames += magazine_destroy(cache,mag);
+        if (!(flags & SLAB_RECLAIM_ALL) && frames)
+            break;
+    }
+    if (flags & SLAB_RECLAIM_ALL) {
+        /* Free cpu-bound magazines */
+        /* Destroy CPU magazines */
+        for (i=0; i<config.cpu_count; i++) {
+            spinlock_lock(&cache->mag_cache[i].lock);
+            mag = cache->mag_cache[i].current;
+            if (mag)
+                frames += magazine_destroy(cache, mag);
+            cache->mag_cache[i].current = NULL;
+            mag = cache->mag_cache[i].last;
+            if (mag)
+                frames += magazine_destroy(cache, mag);
+            cache->mag_cache[i].last = NULL;
+            spinlock_unlock(&cache->mag_cache[i].lock);
+        }
+    }
+    return frames;
+}
+/** Check that there are no slabs and remove cache from system  */
+void slab_cache_destroy(slab_cache_t *cache)
+{
+    ipl_t ipl;
+    /* First remove cache from link, so that we don't need
+     * to disable interrupts later
+     */
+    ipl = interrupts_disable();
+    spinlock_lock(&slab_cache_lock);
+    list_remove(&cache->link);
+    spinlock_unlock(&slab_cache_lock);
+    interrupts_restore(ipl);
+    /* Do not lock anything, we assume the software is correct and
+     * does not touch the cache when it decides to destroy it */
+    /* Destroy all magazines */
+    _slab_reclaim(cache, SLAB_RECLAIM_ALL);
+    /* All slabs must be empty */
+    if (!list_empty(&cache->full_slabs) \
+        || !list_empty(&cache->partial_slabs))
+        panic("Destroying cache that is not empty.");
+    if (!(cache->flags & SLAB_CACHE_NOMAGAZINE))
+        free(cache->mag_cache);
+    slab_free(&slab_cache_cache, cache);
+}
+/** Allocate new object from cache - if no flags given, always returns
+    memory */
+void * slab_alloc(slab_cache_t *cache, int flags)
+{
+    ipl_t ipl;
+    void *result = NULL;
+    /* Disable interrupts to avoid deadlocks with interrupt handlers */
+    ipl = interrupts_disable();
+    if (!(cache->flags & SLAB_CACHE_NOMAGAZINE)) {
+        result = magazine_obj_get(cache);
+    }
+    if (!result)
+        result = slab_obj_create(cache, flags);
+    interrupts_restore(ipl);
+    if (result)
+        atomic_inc(&cache->allocated_objs);
+    return result;
+}
+/** Return object to cache, use slab if known  */
+static void _slab_free(slab_cache_t *cache, void *obj, slab_t *slab)
+{
+    ipl_t ipl;
+    ipl = interrupts_disable();
+    if ((cache->flags & SLAB_CACHE_NOMAGAZINE) \
+        || magazine_obj_put(cache, obj)) {
+        slab_obj_destroy(cache, obj, slab);
+    }
+    interrupts_restore(ipl);
+    atomic_dec(&cache->allocated_objs);
+}
+/** Return slab object to cache */
+void slab_free(slab_cache_t *cache, void *obj)
+{
+    _slab_free(cache,obj,NULL);
+}
+/* Go through all caches and reclaim what is possible */
+count_t slab_reclaim(int flags)
+{
+    slab_cache_t *cache;
+    link_t *cur;
+    count_t frames = 0;
+    spinlock_lock(&slab_cache_lock);
+    /* TODO: Add assert, that interrupts are disabled, otherwise
+     * memory allocation from interrupts can deadlock.
+     */
+    for (cur = slab_cache_list.next;cur!=&slab_cache_list; cur=cur->next) {
+        cache = list_get_instance(cur, slab_cache_t, link);
+        frames += _slab_reclaim(cache, flags);
+    }
+    spinlock_unlock(&slab_cache_lock);
+    return frames;
+}
+/* Print list of slabs */
+void slab_print_list(void)
+{
+    slab_cache_t *cache;
+    link_t *cur;
+    ipl_t ipl;
+    ipl = interrupts_disable();
+    spinlock_lock(&slab_cache_lock);
+    printf("slab name\t  Osize\t  Pages\t Obj/pg\t  Slabs\t Cached\tAllocobjs\tCtl\n");
+    for (cur = slab_cache_list.next;cur!=&slab_cache_list; cur=cur->next) {
+        cache = list_get_instance(cur, slab_cache_t, link);
+        printf("%s\t%7zd\t%7zd\t%7zd\t%7zd\t%7zd\t%7zd\t\t%s\n", cache->name, cache->size,
+               (1 << cache->order), cache->objects,
+               atomic_get(&cache->allocated_slabs),
+               atomic_get(&cache->cached_objs),
+               atomic_get(&cache->allocated_objs),
+               cache->flags & SLAB_CACHE_SLINSIDE ? "In" : "Out");
+    }
+    spinlock_unlock(&slab_cache_lock);
+    interrupts_restore(ipl);
+}
+void slab_cache_init(void)
+{
+    int i, size;
+    /* Initialize magazine cache */
+    _slab_cache_create(&mag_cache,
+               "slab_magazine",
+               sizeof(slab_magazine_t)+SLAB_MAG_SIZE*sizeof(void*),
+               sizeof(__address),
+               NULL, NULL,
+               SLAB_CACHE_NOMAGAZINE | SLAB_CACHE_SLINSIDE);
+    /* Initialize slab_cache cache */
+    _slab_cache_create(&slab_cache_cache,
+               "slab_cache",
+               sizeof(slab_cache_cache),
+               sizeof(__address),
+               NULL, NULL,
+               SLAB_CACHE_NOMAGAZINE | SLAB_CACHE_SLINSIDE);
+    /* Initialize external slab cache */
+    slab_extern_cache = slab_cache_create("slab_extern",
+                          sizeof(slab_t),
+, NULL, NULL,
+                          SLAB_CACHE_SLINSIDE | SLAB_CACHE_MAGDEFERRED);
+    /* Initialize structures for malloc */
+    for (i=0, size=(1<<SLAB_MIN_MALLOC_W);
+         i < (SLAB_MAX_MALLOC_W-SLAB_MIN_MALLOC_W+1);
+         i++, size <<= 1) {
+        malloc_caches[i] = slab_cache_create(malloc_names[i],
+                             size, 0,
+                             NULL,NULL, SLAB_CACHE_MAGDEFERRED);
+    }
+#ifdef CONFIG_DEBUG
+    _slab_initialized = 1;
+#endif
+}
+/** Enable cpu_cache
+ *
+ * Kernel calls this function, when it knows the real number of
+ * processors.
+ * Allocate slab for cpucache and enable it on all existing
+ * slabs that are SLAB_CACHE_MAGDEFERRED
+ */
+void slab_enable_cpucache(void)
+{
+    link_t *cur;
+    slab_cache_t *s;
+#ifdef CONFIG_DEBUG
+    _slab_initialized = 2;
+#endif
+    spinlock_lock(&slab_cache_lock);
+    for (cur=slab_cache_list.next; cur != &slab_cache_list;cur=cur->next){
+        s = list_get_instance(cur, slab_cache_t, link);
+        if ((s->flags & SLAB_CACHE_MAGDEFERRED) != SLAB_CACHE_MAGDEFERRED)
+            continue;
+        make_magcache(s);
+        s->flags &= ~SLAB_CACHE_MAGDEFERRED;
+    }
+    spinlock_unlock(&slab_cache_lock);
+}
+/**************************************/
+/* kalloc/kfree functions             */
+void * malloc(unsigned int size, int flags)
+{
+    int idx;
+    ASSERT(_slab_initialized);
+    ASSERT(size && size <= (1 << SLAB_MAX_MALLOC_W));
+    if (size < (1 << SLAB_MIN_MALLOC_W))
+        size = (1 << SLAB_MIN_MALLOC_W);
+    idx = fnzb(size-1) - SLAB_MIN_MALLOC_W + 1;
+    return slab_alloc(malloc_caches[idx], flags);
+}
+void free(void *obj)
+{
+    slab_t *slab;
+    if (!obj) return;
+    slab = obj2slab(obj);
+    _slab_free(slab->cache, obj, slab);
+}
+ /** @}
+ */

 /tags/0.2.0.2/kernel/generic/src/mm/tlb.c
 ,0 → 1,190
+/*
+ * Copyright (C) 2001-2004 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup genericmm
+ * @{
+ */
+/**
+ * @file
+ * @brief   Generic TLB shootdown algorithm.
+ *
+ * The algorithm implemented here is based on the CMU TLB shootdown
+ * algorithm and is further simplified (e.g. all CPUs receive all TLB
+ * shootdown messages).
+ */
+#include <mm/tlb.h>
+#include <mm/asid.h>
+#include <arch/mm/tlb.h>
+#include <smp/ipi.h>
+#include <synch/spinlock.h>
+#include <typedefs.h>
+#include <atomic.h>
+#include <arch/interrupt.h>
+#include <config.h>
+#include <arch.h>
+#include <panic.h>
+#include <debug.h>
+/**
+ * This lock is used for synchronisation between sender and
+ * recipients of TLB shootdown message. It must be acquired
+ * before CPU structure lock.
+ */
+SPINLOCK_INITIALIZE(tlblock);
+void tlb_init(void)
+{
+    tlb_arch_init();
+}
+#ifdef CONFIG_SMP
+/** Send TLB shootdown message.
+ *
+ * This function attempts to deliver TLB shootdown message
+ * to all other processors.
+ *
+ * This function must be called with interrupts disabled.
+ *
+ * @param type Type describing scope of shootdown.
+ * @param asid Address space, if required by type.
+ * @param page Virtual page address, if required by type.
+ * @param count Number of pages, if required by type.
+ */
+void tlb_shootdown_start(tlb_invalidate_type_t type, asid_t asid, __address page, count_t count)
+{
+    int i;
+    CPU->tlb_active = 0;
+    spinlock_lock(&tlblock);
+    for (i = 0; i < config.cpu_count; i++) {
+        cpu_t *cpu;
+        if (i == CPU->id)
+            continue;
+        cpu = &cpus[i];
+        spinlock_lock(&cpu->lock);
+        if (cpu->tlb_messages_count == TLB_MESSAGE_QUEUE_LEN) {
+            /*
+             * The message queue is full.
+             * Erase the queue and store one TLB_INVL_ALL message.
+             */
+            cpu->tlb_messages_count = 1;
+            cpu->tlb_messages[0].type = TLB_INVL_ALL;
+            cpu->tlb_messages[0].asid = ASID_INVALID;
+            cpu->tlb_messages[0].page = 0;
+            cpu->tlb_messages[0].count = 0;
+        } else {
+            /*
+             * Enqueue the message.
+             */
+            cpu->tlb_messages[cpu->tlb_messages_count].type = type;
+            cpu->tlb_messages[cpu->tlb_messages_count].asid = asid;
+            cpu->tlb_messages[cpu->tlb_messages_count].page = page;
+            cpu->tlb_messages[cpu->tlb_messages_count].count = count;
+            cpu->tlb_messages_count++;
+        }
+        spinlock_unlock(&cpu->lock);
+    }
+    tlb_shootdown_ipi_send();
+busy_wait:
+    for (i = 0; i < config.cpu_count; i++)
+        if (cpus[i].tlb_active)
+            goto busy_wait;
+}
+/** Finish TLB shootdown sequence. */
+void tlb_shootdown_finalize(void)
+{
+    spinlock_unlock(&tlblock);
+    CPU->tlb_active = 1;
+}
+void tlb_shootdown_ipi_send(void)
+{
+    ipi_broadcast(VECTOR_TLB_SHOOTDOWN_IPI);
+}
+/** Receive TLB shootdown message. */
+void tlb_shootdown_ipi_recv(void)
+{
+    tlb_invalidate_type_t type;
+    asid_t asid;
+    __address page;
+    count_t count;
+    int i;
+    ASSERT(CPU);
+    CPU->tlb_active = 0;
+    spinlock_lock(&tlblock);
+    spinlock_unlock(&tlblock);
+    spinlock_lock(&CPU->lock);
+    ASSERT(CPU->tlb_messages_count <= TLB_MESSAGE_QUEUE_LEN);
+    for (i = 0; i < CPU->tlb_messages_count; CPU->tlb_messages_count--) {
+        type = CPU->tlb_messages[i].type;
+        asid = CPU->tlb_messages[i].asid;
+        page = CPU->tlb_messages[i].page;
+        count = CPU->tlb_messages[i].count;
+        switch (type) {
+            case TLB_INVL_ALL:
+            tlb_invalidate_all();
+            break;
+            case TLB_INVL_ASID:
+            tlb_invalidate_asid(asid);
+            break;
+            case TLB_INVL_PAGES:
+                ASSERT(count);
+            tlb_invalidate_pages(asid, page, count);
+            break;
+            default:
+            panic("unknown type (%d)\n", type);
+            break;
+        }
+        if (type == TLB_INVL_ALL)
+            break;
+    }
+    spinlock_unlock(&CPU->lock);
+    CPU->tlb_active = 1;
+}
+#endif /* CONFIG_SMP */
+ /** @}
+ */

 /tags/0.2.0.2/kernel/generic/src/mm/backend_anon.c
 ,0 → 1,210
+/*
+ * Copyright (C) 2006 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup genericmm
+ * @{
+ */
+/**
+ * @file
+ * @brief   Backend for anonymous memory address space areas.
+ *
+ */
+#include <mm/as.h>
+#include <mm/page.h>
+#include <genarch/mm/page_pt.h>
+#include <genarch/mm/page_ht.h>
+#include <mm/frame.h>
+#include <mm/slab.h>
+#include <synch/mutex.h>
+#include <adt/list.h>
+#include <adt/btree.h>
+#include <errno.h>
+#include <arch/types.h>
+#include <typedefs.h>
+#include <align.h>
+#include <arch.h>
+static int anon_page_fault(as_area_t *area, __address addr, pf_access_t access);
+static void anon_frame_free(as_area_t *area, __address page, __address frame);
+static void anon_share(as_area_t *area);
+mem_backend_t anon_backend = {
+    .page_fault = anon_page_fault,
+    .frame_free = anon_frame_free,
+    .share = anon_share
+};
+/** Service a page fault in the anonymous memory address space area.
+ *
+ * The address space area and page tables must be already locked.
+ *
+ * @param area Pointer to the address space area.
+ * @param addr Faulting virtual address.
+ * @param access Access mode that caused the fault (i.e. read/write/exec).
+ *
+ * @return AS_PF_FAULT on failure (i.e. page fault) or AS_PF_OK on success (i.e. serviced).
+ */
+int anon_page_fault(as_area_t *area, __address addr, pf_access_t access)
+{
+    __address frame;
+    if (!as_area_check_access(area, access))
+        return AS_PF_FAULT;
+    if (area->sh_info) {
+        btree_node_t *leaf;
+        /*
+         * The area is shared, chances are that the mapping can be found
+         * in the pagemap of the address space area share info structure.
+         * In the case that the pagemap does not contain the respective
+         * mapping, a new frame is allocated and the mapping is created.
+         */
+        mutex_lock(&area->sh_info->lock);
+        frame = (__address) btree_search(&area->sh_info->pagemap,
+            ALIGN_DOWN(addr, PAGE_SIZE) - area->base, &leaf);
+        if (!frame) {
+            bool allocate = true;
+            int i;
+            /*
+             * Zero can be returned as a valid frame address.
+             * Just a small workaround.
+             */
+            for (i = 0; i < leaf->keys; i++) {
+                if (leaf->key[i] == ALIGN_DOWN(addr, PAGE_SIZE)) {
+                    allocate = false;
+                    break;
+                }
+            }
+            if (allocate) {
+                frame = PFN2ADDR(frame_alloc(ONE_FRAME, 0));
+                memsetb(PA2KA(frame), FRAME_SIZE, 0);
+                /*
+                 * Insert the address of the newly allocated frame to the pagemap.
+                 */
+                btree_insert(&area->sh_info->pagemap, ALIGN_DOWN(addr, PAGE_SIZE) - area->base, (void *) frame, leaf);
+            }
+        }
+        frame_reference_add(ADDR2PFN(frame));
+        mutex_unlock(&area->sh_info->lock);
+    } else {
+        /*
+         * In general, there can be several reasons that
+         * can have caused this fault.
+         *
+         * - non-existent mapping: the area is an anonymous
+         *   area (e.g. heap or stack) and so far has not been
+         *   allocated a frame for the faulting page
+         *
+         * - non-present mapping: another possibility,
+         *   currently not implemented, would be frame
+         *   reuse; when this becomes a possibility,
+         *   do not forget to distinguish between
+         *   the different causes
+         */
+        frame = PFN2ADDR(frame_alloc(ONE_FRAME, 0));
+        memsetb(PA2KA(frame), FRAME_SIZE, 0);
+    }
+    /*
+     * Map 'page' to 'frame'.
+     * Note that TLB shootdown is not attempted as only new information is being
+     * inserted into page tables.
+     */
+    page_mapping_insert(AS, addr, frame, as_area_get_flags(area));
+    if (!used_space_insert(area, ALIGN_DOWN(addr, PAGE_SIZE), 1))
+        panic("Could not insert used space.\n");
+    return AS_PF_OK;
+}
+/** Free a frame that is backed by the anonymous memory backend.
+ *
+ * The address space area and page tables must be already locked.
+ *
+ * @param area Ignored.
+ * @param page Ignored.
+ * @param frame Frame to be released.
+ */
+void anon_frame_free(as_area_t *area, __address page, __address frame)
+{
+    frame_free(ADDR2PFN(frame));
+}
+/** Share the anonymous address space area.
+ *
+ * Sharing of anonymous area is done by duplicating its entire mapping
+ * to the pagemap. Page faults will primarily search for frames there.
+ *
+ * The address space and address space area must be already locked.
+ *
+ * @param area Address space area to be shared.
+ */
+void anon_share(as_area_t *area)
+{
+    link_t *cur;
+    /*
+     * Copy used portions of the area to sh_info's page map.
+     */
+    mutex_lock(&area->sh_info->lock);
+    for (cur = area->used_space.leaf_head.next; cur != &area->used_space.leaf_head; cur = cur->next) {
+        btree_node_t *node;
+        int i;
+        node = list_get_instance(cur, btree_node_t, leaf_link);
+        for (i = 0; i < node->keys; i++) {
+            __address base = node->key[i];
+            count_t count = (count_t) node->value[i];
+            int j;
+            for (j = 0; j < count; j++) {
+                pte_t *pte;
+                page_table_lock(area->as, false);
+                pte = page_mapping_find(area->as, base + j*PAGE_SIZE);
+                ASSERT(pte && PTE_VALID(pte) && PTE_PRESENT(pte));
+                btree_insert(&area->sh_info->pagemap, (base + j*PAGE_SIZE) - area->base,
+                    (void *) PTE_GET_FRAME(pte), NULL);
+                page_table_unlock(area->as, false);
+                frame_reference_add(ADDR2PFN(PTE_GET_FRAME(pte)));
+            }
+        }
+    }
+    mutex_unlock(&area->sh_info->lock);
+}
+ /** @}
+ */

 /tags/0.2.0.2/kernel/generic/src/mm/backend_phys.c
 ,0 → 1,96
+/*
+ * Copyright (C) 2006 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup genericmm
+ * @{
+ */
+/**
+ * @file
+ * @brief   Backend for address space areas backed by continuous physical memory.
+ */
+#include <debug.h>
+#include <arch/types.h>
+#include <typedefs.h>
+#include <mm/as.h>
+#include <mm/frame.h>
+#include <mm/slab.h>
+#include <memstr.h>
+#include <macros.h>
+#include <arch.h>
+#include <align.h>
+static int phys_page_fault(as_area_t *area, __address addr, pf_access_t access);
+static void phys_share(as_area_t *area);
+mem_backend_t phys_backend = {
+    .page_fault = phys_page_fault,
+    .frame_free = NULL,
+    .share = phys_share
+};
+/** Service a page fault in the address space area backed by physical memory.
+ *
+ * The address space area and page tables must be already locked.
+ *
+ * @param area Pointer to the address space area.
+ * @param addr Faulting virtual address.
+ * @param access Access mode that caused the fault (i.e. read/write/exec).
+ *
+ * @return AS_PF_FAULT on failure (i.e. page fault) or AS_PF_OK on success (i.e. serviced).
+ */
+int phys_page_fault(as_area_t *area, __address addr, pf_access_t access)
+{
+    __address base = area->backend_data.base;
+    if (!as_area_check_access(area, access))
+        return AS_PF_FAULT;
+    ASSERT(addr - area->base < area->backend_data.frames * FRAME_SIZE);
+    page_mapping_insert(AS, addr, base + (addr - area->base), as_area_get_flags(area));
+        if (!used_space_insert(area, ALIGN_DOWN(addr, PAGE_SIZE), 1))
+                panic("Could not insert used space.\n");
+    return AS_PF_OK;
+}
+/** Share address space area backed by physical memory.
+ *
+ * Do actually nothing as sharing of address space areas
+ * that are backed up by physical memory is very easy.
+ * Note that the function must be defined so that
+ * as_area_share() will succeed.
+ */
+void phys_share(as_area_t *area)
+{
+}
+ /** @}
+ */

 /tags/0.2.0.2/kernel/generic/src/mm/page.c
 ,0 → 1,144
+/*
+ * Copyright (C) 2001-2006 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup genericmm
+ * @{
+ */
+/**
+ * @file
+ * @brief   Virtual Address Translation subsystem.
+ *
+ * This file contains code for creating, destroying and searching
+ * mappings between virtual addresses and physical addresses.
+ * Functions here are mere wrappers that call the real implementation.
+ * They however, define the single interface.
+ */
+#include <mm/page.h>
+#include <arch/mm/page.h>
+#include <arch/mm/asid.h>
+#include <mm/as.h>
+#include <mm/frame.h>
+#include <arch/types.h>
+#include <typedefs.h>
+#include <arch/asm.h>
+#include <memstr.h>
+#include <debug.h>
+#include <arch.h>
+/** Virtual operations for page subsystem. */
+page_mapping_operations_t *page_mapping_operations = NULL;
+void page_init(void)
+{
+    page_arch_init();
+}
+/** Map memory structure
+ *
+ * Identity-map memory structure
+ * considering possible crossings
+ * of page boundaries.
+ *
+ * @param s Address of the structure.
+ * @param size Size of the structure.
+ */
+void map_structure(__address s, size_t size)
+{
+    int i, cnt, length;
+    length = size + (s - (s & ~(PAGE_SIZE - 1)));
+    cnt = length / PAGE_SIZE + (length % PAGE_SIZE > 0);
+    for (i = 0; i < cnt; i++)
+        page_mapping_insert(AS_KERNEL, s + i * PAGE_SIZE, s + i * PAGE_SIZE, PAGE_NOT_CACHEABLE);
+}
+/** Insert mapping of page to frame.
+ *
+ * Map virtual address page to physical address frame
+ * using flags. Allocate and setup any missing page tables.
+ *
+ * The page table must be locked and interrupts must be disabled.
+ *
+ * @param as Address space to wich page belongs.
+ * @param page Virtual address of the page to be mapped.
+ * @param frame Physical address of memory frame to which the mapping is done.
+ * @param flags Flags to be used for mapping.
+ */
+void page_mapping_insert(as_t *as, __address page, __address frame, int flags)
+{
+    ASSERT(page_mapping_operations);
+    ASSERT(page_mapping_operations->mapping_insert);
+    page_mapping_operations->mapping_insert(as, page, frame, flags);
+}
+/** Remove mapping of page.
+ *
+ * Remove any mapping of page within address space as.
+ * TLB shootdown should follow in order to make effects of
+ * this call visible.
+ *
+ * The page table must be locked and interrupts must be disabled.
+ *
+ * @param as Address space to wich page belongs.
+ * @param page Virtual address of the page to be demapped.
+ */
+void page_mapping_remove(as_t *as, __address page)
+{
+    ASSERT(page_mapping_operations);
+    ASSERT(page_mapping_operations->mapping_remove);
+    page_mapping_operations->mapping_remove(as, page);
+}
+/** Find mapping for virtual page
+ *
+ * Find mapping for virtual page.
+ *
+ * The page table must be locked and interrupts must be disabled.
+ *
+ * @param as Address space to wich page belongs.
+ * @param page Virtual page.
+ *
+ * @return NULL if there is no such mapping; requested mapping otherwise.
+ */
+pte_t *page_mapping_find(as_t *as, __address page)
+{
+    ASSERT(page_mapping_operations);
+    ASSERT(page_mapping_operations->mapping_find);
+    return page_mapping_operations->mapping_find(as, page);
+}
+ /** @}
+ */

 /tags/0.2.0.2/kernel/generic/src/mm/backend_elf.c
 ,0 → 1,310
+/*
+ * Copyright (C) 2006 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup genericmm
+ * @{
+ */
+/**
+ * @file
+ * @brief   Backend for address space areas backed by an ELF image.
+ */
+#include <elf.h>
+#include <debug.h>
+#include <arch/types.h>
+#include <typedefs.h>
+#include <mm/as.h>
+#include <mm/frame.h>
+#include <mm/slab.h>
+#include <mm/page.h>
+#include <genarch/mm/page_pt.h>
+#include <genarch/mm/page_ht.h>
+#include <align.h>
+#include <memstr.h>
+#include <macros.h>
+#include <arch.h>
+static int elf_page_fault(as_area_t *area, __address addr, pf_access_t access);
+static void elf_frame_free(as_area_t *area, __address page, __address frame);
+static void elf_share(as_area_t *area);
+mem_backend_t elf_backend = {
+    .page_fault = elf_page_fault,
+    .frame_free = elf_frame_free,
+    .share = elf_share
+};
+/** Service a page fault in the ELF backend address space area.
+ *
+ * The address space area and page tables must be already locked.
+ *
+ * @param area Pointer to the address space area.
+ * @param addr Faulting virtual address.
+ * @param access Access mode that caused the fault (i.e. read/write/exec).
+ *
+ * @return AS_PF_FAULT on failure (i.e. page fault) or AS_PF_OK on success (i.e. serviced).
+ */
+int elf_page_fault(as_area_t *area, __address addr, pf_access_t access)
+{
+    elf_header_t *elf = area->backend_data.elf;
+    elf_segment_header_t *entry = area->backend_data.segment;
+    btree_node_t *leaf;
+    __address base, frame;
+    index_t i;
+    if (!as_area_check_access(area, access))
+        return AS_PF_FAULT;
+    ASSERT((addr >= entry->p_vaddr) && (addr < entry->p_vaddr + entry->p_memsz));
+    i = (addr - entry->p_vaddr) >> PAGE_WIDTH;
+    base = (__address) (((void *) elf) + entry->p_offset);
+    ASSERT(ALIGN_UP(base, FRAME_SIZE) == base);
+    if (area->sh_info) {
+        bool found = false;
+        /*
+         * The address space area is shared.
+         */
+        mutex_lock(&area->sh_info->lock);
+        frame = (__address) btree_search(&area->sh_info->pagemap,
+            ALIGN_DOWN(addr, PAGE_SIZE) - area->base, &leaf);
+        if (!frame) {
+            int i;
+            /*
+             * Workaround for valid NULL address.
+             */
+            for (i = 0; i < leaf->keys; i++) {
+                if (leaf->key[i] == ALIGN_DOWN(addr, PAGE_SIZE)) {
+                    found = true;
+                    break;
+                }
+            }
+        }
+        if (frame || found) {
+            frame_reference_add(ADDR2PFN(frame));
+            page_mapping_insert(AS, addr, frame, as_area_get_flags(area));
+            if (!used_space_insert(area, ALIGN_DOWN(addr, PAGE_SIZE), 1))
+                panic("Could not insert used space.\n");
+            mutex_unlock(&area->sh_info->lock);
+            return AS_PF_OK;
+        }
+    }
+    /*
+     * The area is either not shared or the pagemap does not contain the mapping.
+     */
+    if (ALIGN_DOWN(addr, PAGE_SIZE) + PAGE_SIZE < entry->p_vaddr + entry->p_filesz) {
+        /*
+         * Initialized portion of the segment. The memory is backed
+         * directly by the content of the ELF image. Pages are
+         * only copied if the segment is writable so that there
+         * can be more instantions of the same memory ELF image
+         * used at a time. Note that this could be later done
+         * as COW.
+         */
+        if (entry->p_flags & PF_W) {
+            frame = PFN2ADDR(frame_alloc(ONE_FRAME, 0));
+            memcpy((void *) PA2KA(frame), (void *) (base + i*FRAME_SIZE), FRAME_SIZE);
+            if (area->sh_info) {
+                frame_reference_add(ADDR2PFN(frame));
+                btree_insert(&area->sh_info->pagemap, ALIGN_DOWN(addr, PAGE_SIZE) - area->base,
+                    (void *) frame, leaf);
+            }
+        } else {
+            frame = KA2PA(base + i*FRAME_SIZE);
+        }
+    } else if (ALIGN_DOWN(addr, PAGE_SIZE) >= ALIGN_UP(entry->p_vaddr + entry->p_filesz, PAGE_SIZE)) {
+        /*
+         * This is the uninitialized portion of the segment.
+         * It is not physically present in the ELF image.
+         * To resolve the situation, a frame must be allocated
+         * and cleared.
+         */
+        frame = PFN2ADDR(frame_alloc(ONE_FRAME, 0));
+        memsetb(PA2KA(frame), FRAME_SIZE, 0);
+        if (area->sh_info) {
+            frame_reference_add(ADDR2PFN(frame));
+            btree_insert(&area->sh_info->pagemap, ALIGN_DOWN(addr, PAGE_SIZE) - area->base,
+                (void *) frame, leaf);
+        }
+    } else {
+        size_t size;
+        /*
+         * The mixed case.
+         * The lower part is backed by the ELF image and
+         * the upper part is anonymous memory.
+         */
+        size = entry->p_filesz - (i<<PAGE_WIDTH);
+        frame = PFN2ADDR(frame_alloc(ONE_FRAME, 0));
+        memsetb(PA2KA(frame) + size, FRAME_SIZE - size, 0);
+        memcpy((void *) PA2KA(frame), (void *) (base + i*FRAME_SIZE), size);
+        if (area->sh_info) {
+            frame_reference_add(ADDR2PFN(frame));
+            btree_insert(&area->sh_info->pagemap, ALIGN_DOWN(addr, PAGE_SIZE) - area->base,
+                (void *) frame, leaf);
+        }
+    }
+    if (area->sh_info)
+        mutex_unlock(&area->sh_info->lock);
+    page_mapping_insert(AS, addr, frame, as_area_get_flags(area));
+    if (!used_space_insert(area, ALIGN_DOWN(addr, PAGE_SIZE), 1))
+        panic("Could not insert used space.\n");
+    return AS_PF_OK;
+}
+/** Free a frame that is backed by the ELF backend.
+ *
+ * The address space area and page tables must be already locked.
+ *
+ * @param area Pointer to the address space area.
+ * @param page Page that is mapped to frame. Must be aligned to PAGE_SIZE.
+ * @param frame Frame to be released.
+ *
+ */
+void elf_frame_free(as_area_t *area, __address page, __address frame)
+{
+    elf_header_t *elf = area->backend_data.elf;
+    elf_segment_header_t *entry = area->backend_data.segment;
+    __address base;
+    index_t i;
+    ASSERT((page >= entry->p_vaddr) && (page < entry->p_vaddr + entry->p_memsz));
+    i = (page - entry->p_vaddr) >> PAGE_WIDTH;
+    base = (__address) (((void *) elf) + entry->p_offset);
+    ASSERT(ALIGN_UP(base, FRAME_SIZE) == base);
+    if (page + PAGE_SIZE < ALIGN_UP(entry->p_vaddr + entry->p_filesz, PAGE_SIZE)) {
+        if (entry->p_flags & PF_W) {
+            /*
+             * Free the frame with the copy of writable segment data.
+             */
+            frame_free(ADDR2PFN(frame));
+        }
+    } else {
+        /*
+         * The frame is either anonymous memory or the mixed case (i.e. lower
+         * part is backed by the ELF image and the upper is anonymous).
+         * In any case, a frame needs to be freed.
+         */
+        frame_free(ADDR2PFN(frame));
+    }
+}
+/** Share ELF image backed address space area.
+ *
+ * If the area is writable, then all mapped pages are duplicated in the pagemap.
+ * Otherwise only portions of the area that are not backed by the ELF image
+ * are put into the pagemap.
+ *
+ * The address space and address space area must be locked prior to the call.
+ *
+ * @param area Address space area.
+ */
+void elf_share(as_area_t *area)
+{
+    elf_segment_header_t *entry = area->backend_data.segment;
+    link_t *cur;
+    btree_node_t *leaf, *node;
+    __address start_anon = entry->p_vaddr + entry->p_filesz;
+    /*
+     * Find the node in which to start linear search.
+     */
+    if (area->flags & AS_AREA_WRITE) {
+        node = list_get_instance(area->used_space.leaf_head.next, btree_node_t, leaf_link);
+    } else {
+        (void) btree_search(&area->sh_info->pagemap, start_anon, &leaf);
+        node = btree_leaf_node_left_neighbour(&area->sh_info->pagemap, leaf);
+        if (!node)
+            node = leaf;
+    }
+    /*
+     * Copy used anonymous portions of the area to sh_info's page map.
+     */
+    mutex_lock(&area->sh_info->lock);
+    for (cur = &node->leaf_link; cur != &area->used_space.leaf_head; cur = cur->next) {
+        int i;
+        node = list_get_instance(cur, btree_node_t, leaf_link);
+        for (i = 0; i < node->keys; i++) {
+            __address base = node->key[i];
+            count_t count = (count_t) node->value[i];
+            int j;
+            /*
+             * Skip read-only areas of used space that are backed
+             * by the ELF image.
+             */
+            if (!(area->flags & AS_AREA_WRITE))
+                if (base + count*PAGE_SIZE <= start_anon)
+                    continue;
+            for (j = 0; j < count; j++) {
+                pte_t *pte;
+                /*
+                 * Skip read-only pages that are backed by the ELF image.
+                 */
+                if (!(area->flags & AS_AREA_WRITE))
+                    if (base + (j + 1)*PAGE_SIZE <= start_anon)
+                        continue;
+                page_table_lock(area->as, false);
+                pte = page_mapping_find(area->as, base + j*PAGE_SIZE);
+                ASSERT(pte && PTE_VALID(pte) && PTE_PRESENT(pte));
+                btree_insert(&area->sh_info->pagemap, (base + j*PAGE_SIZE) - area->base,
+                    (void *) PTE_GET_FRAME(pte), NULL);
+                page_table_unlock(area->as, false);
+                frame_reference_add(ADDR2PFN(PTE_GET_FRAME(pte)));
+            }
+        }
+    }
+    mutex_unlock(&area->sh_info->lock);
+}
+ /** @}
+ */

 /tags/0.2.0.2/kernel/generic/src/ipc/ipc.c
 ,0 → 1,535
+/*
+ * Copyright (C) 2006 Ondrej Palkovsky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup genericipc
+ * @{
+ */
+/** @file
+ */
+/* Lock ordering
+ *
+ * First the answerbox, then the phone
+ */
+#include <synch/spinlock.h>
+#include <synch/waitq.h>
+#include <synch/synch.h>
+#include <ipc/ipc.h>
+#include <errno.h>
+#include <mm/slab.h>
+#include <arch.h>
+#include <proc/task.h>
+#include <memstr.h>
+#include <debug.h>
+#include <print.h>
+#include <proc/thread.h>
+#include <arch/interrupt.h>
+#include <ipc/irq.h>
+/* Open channel that is assigned automatically to new tasks */
+answerbox_t *ipc_phone_0 = NULL;
+static slab_cache_t *ipc_call_slab;
+/* Initialize new call */
+static void _ipc_call_init(call_t *call)
+{
+    memsetb((__address)call, sizeof(*call), 0);
+    call->callerbox = &TASK->answerbox;
+    call->sender = TASK;
+}
+/** Allocate & initialize call structure
+ *
+ * The call is initialized, so that the reply will be directed
+ * to TASK->answerbox
+ *
+ * @param flags Parameters for slab_alloc (ATOMIC, etc.)
+ */
+call_t * ipc_call_alloc(int flags)
+{
+    call_t *call;
+    call = slab_alloc(ipc_call_slab, flags);
+    _ipc_call_init(call);
+    return call;
+}
+/** Initialize allocated call */
+void ipc_call_static_init(call_t *call)
+{
+    _ipc_call_init(call);
+    call->flags |= IPC_CALL_STATIC_ALLOC;
+}
+/** Deallocate call stracuture */
+void ipc_call_free(call_t *call)
+{
+    slab_free(ipc_call_slab, call);
+}
+/** Initialize answerbox structure
+ */
+void ipc_answerbox_init(answerbox_t *box)
+{
+    spinlock_initialize(&box->lock, "ipc_box_lock");
+    spinlock_initialize(&box->irq_lock, "ipc_box_irqlock");
+    waitq_initialize(&box->wq);
+    list_initialize(&box->connected_phones);
+    list_initialize(&box->calls);
+    list_initialize(&box->dispatched_calls);
+    list_initialize(&box->answers);
+    list_initialize(&box->irq_notifs);
+    box->task = TASK;
+}
+/** Connect phone to answerbox */
+void ipc_phone_connect(phone_t *phone, answerbox_t *box)
+{
+    spinlock_lock(&phone->lock);
+    phone->state = IPC_PHONE_CONNECTED;
+    phone->callee = box;
+    spinlock_lock(&box->lock);
+    list_append(&phone->link, &box->connected_phones);
+    spinlock_unlock(&box->lock);
+    spinlock_unlock(&phone->lock);
+}
+/** Initialize phone structure and connect phone to answerbox
+ */
+void ipc_phone_init(phone_t *phone)
+{
+    spinlock_initialize(&phone->lock, "phone_lock");
+    phone->callee = NULL;
+    phone->state = IPC_PHONE_FREE;
+    atomic_set(&phone->active_calls, 0);
+}
+/** Helper function to facilitate synchronous calls */
+void ipc_call_sync(phone_t *phone, call_t *request)
+{
+    answerbox_t sync_box;
+    ipc_answerbox_init(&sync_box);
+    /* We will receive data on special box */
+    request->callerbox = &sync_box;
+    ipc_call(phone, request);
+    ipc_wait_for_call(&sync_box, SYNCH_NO_TIMEOUT, SYNCH_FLAGS_NONE);
+}
+/** Answer message that was not dispatched and is not entered in
+ * any queue
+ */
+static void _ipc_answer_free_call(call_t *call)
+{
+    answerbox_t *callerbox = call->callerbox;
+    call->flags |= IPC_CALL_ANSWERED;
+    spinlock_lock(&callerbox->lock);
+    list_append(&call->link, &callerbox->answers);
+    spinlock_unlock(&callerbox->lock);
+    waitq_wakeup(&callerbox->wq, 0);
+}
+/** Answer message, that is in callee queue
+ *
+ * @param box Answerbox that is answering the message
+ * @param call Modified request that is being sent back
+ */
+void ipc_answer(answerbox_t *box, call_t *call)
+{
+    /* Remove from active box */
+    spinlock_lock(&box->lock);
+    list_remove(&call->link);
+    spinlock_unlock(&box->lock);
+    /* Send back answer */
+    _ipc_answer_free_call(call);
+}
+/** Simulate sending back a message
+ *
+ * Most errors are better handled by forming a normal backward
+ * message and sending it as a normal answer.
+ */
+void ipc_backsend_err(phone_t *phone, call_t *call, __native err)
+{
+    call->data.phone = phone;
+    atomic_inc(&phone->active_calls);
+    IPC_SET_RETVAL(call->data, err);
+    _ipc_answer_free_call(call);
+}
+/* Unsafe unchecking ipc_call */
+static void _ipc_call(phone_t *phone, answerbox_t *box, call_t *call)
+{
+    if (! (call->flags & IPC_CALL_FORWARDED)) {
+        atomic_inc(&phone->active_calls);
+        call->data.phone = phone;
+    }
+    spinlock_lock(&box->lock);
+    list_append(&call->link, &box->calls);
+    spinlock_unlock(&box->lock);
+    waitq_wakeup(&box->wq, 0);
+}
+/** Send a asynchronous request using phone to answerbox
+ *
+ * @param phone Phone connected to answerbox.
+ * @param call Structure representing the call.
+ */
+int ipc_call(phone_t *phone, call_t *call)
+{
+    answerbox_t *box;
+    spinlock_lock(&phone->lock);
+    if (phone->state != IPC_PHONE_CONNECTED) {
+        spinlock_unlock(&phone->lock);
+        if (call->flags & IPC_CALL_FORWARDED) {
+            IPC_SET_RETVAL(call->data, EFORWARD);
+            _ipc_answer_free_call(call);
+        } else {
+            if (phone->state == IPC_PHONE_HUNGUP)
+                ipc_backsend_err(phone, call, EHANGUP);
+            else
+                ipc_backsend_err(phone, call, ENOENT);
+        }
+        return ENOENT;
+    }
+    box = phone->callee;
+    _ipc_call(phone, box, call);
+    spinlock_unlock(&phone->lock);
+    return 0;
+}
+/** Disconnect phone from answerbox
+ *
+ * This call leaves the phone in HUNGUP state. The change to 'free' is done
+ * lazily later.
+ *
+ * @param phone Phone to be hung up
+ *
+ * @return 0 - phone disconnected, -1 - the phone was already disconnected
+ */
+int ipc_phone_hangup(phone_t *phone)
+{
+    answerbox_t *box;
+    call_t *call;
+    spinlock_lock(&phone->lock);
+    if (phone->state == IPC_PHONE_FREE || phone->state ==IPC_PHONE_HUNGUP \
+        || phone->state == IPC_PHONE_CONNECTING) {
+        spinlock_unlock(&phone->lock);
+        return -1;
+    }
+    box = phone->callee;
+    if (phone->state != IPC_PHONE_SLAMMED) {
+        /* Remove myself from answerbox */
+        spinlock_lock(&box->lock);
+        list_remove(&phone->link);
+        spinlock_unlock(&box->lock);
+        if (phone->state != IPC_PHONE_SLAMMED) {
+            call = ipc_call_alloc(0);
+            IPC_SET_METHOD(call->data, IPC_M_PHONE_HUNGUP);
+            call->flags |= IPC_CALL_DISCARD_ANSWER;
+            _ipc_call(phone, box, call);
+        }
+    }
+    phone->state = IPC_PHONE_HUNGUP;
+    spinlock_unlock(&phone->lock);
+    return 0;
+}
+/** Forwards call from one answerbox to a new one
+ *
+ * @param call Call to be redirected.
+ * @param newphone Phone to target answerbox.
+ * @param oldbox Old answerbox
+ * @return 0 on forward ok, error code, if there was error
+ *
+ * - the return value serves only as an information for the forwarder,
+ *   the original caller is notified automatically with EFORWARD
+ */
+int ipc_forward(call_t *call, phone_t *newphone, answerbox_t *oldbox)
+{
+    spinlock_lock(&oldbox->lock);
+    list_remove(&call->link);
+    spinlock_unlock(&oldbox->lock);
+    return ipc_call(newphone, call);
+}
+/** Wait for phone call
+ *
+ * @param box Answerbox expecting the call.
+ * @param usec Timeout in microseconds. See documentation for waitq_sleep_timeout() for
+ *         decription of its special meaning.
+ * @param flags Select mode of sleep operation. See documentation for waitq_sleep_timeout()i
+ *      for description of its special meaning.
+ * @return Recived message address
+ * - to distinguish between call and answer, look at call->flags
+ */
+call_t * ipc_wait_for_call(answerbox_t *box, __u32 usec, int flags)
+{
+    call_t *request;
+    ipl_t ipl;
+    int rc;
+restart:
+    rc = waitq_sleep_timeout(&box->wq, usec, flags);
+    if (SYNCH_FAILED(rc))
+        return NULL;
+    spinlock_lock(&box->lock);
+    if (!list_empty(&box->irq_notifs)) {
+        ipl = interrupts_disable();
+        spinlock_lock(&box->irq_lock);
+        request = list_get_instance(box->irq_notifs.next, call_t, link);
+        list_remove(&request->link);
+        spinlock_unlock(&box->irq_lock);
+        interrupts_restore(ipl);
+    } else if (!list_empty(&box->answers)) {
+        /* Handle asynchronous answers */
+        request = list_get_instance(box->answers.next, call_t, link);
+        list_remove(&request->link);
+        atomic_dec(&request->data.phone->active_calls);
+    } else if (!list_empty(&box->calls)) {
+        /* Handle requests */
+        request = list_get_instance(box->calls.next, call_t, link);
+        list_remove(&request->link);
+        /* Append request to dispatch queue */
+        list_append(&request->link, &box->dispatched_calls);
+    } else {
+        /* This can happen regularly after ipc_cleanup */
+        spinlock_unlock(&box->lock);
+        goto restart;
+    }
+    spinlock_unlock(&box->lock);
+    return request;
+}
+/** Answer all calls from list with EHANGUP msg */
+static void ipc_cleanup_call_list(link_t *lst)
+{
+    call_t *call;
+    while (!list_empty(lst)) {
+        call = list_get_instance(lst->next, call_t, link);
+        list_remove(&call->link);
+        IPC_SET_RETVAL(call->data, EHANGUP);
+        _ipc_answer_free_call(call);
+    }
+}
+/** Cleans up all IPC communication of the current task
+ *
+ * Note: ipc_hangup sets returning answerbox to TASK->answerbox, you
+ * have to change it as well if you want to cleanup other current then current.
+ */
+void ipc_cleanup(void)
+{
+    int i;
+    call_t *call;
+    phone_t *phone;
+    /* Disconnect all our phones ('ipc_phone_hangup') */
+    for (i=0;i < IPC_MAX_PHONES; i++)
+        ipc_phone_hangup(&TASK->phones[i]);
+    /* Disconnect all connected irqs */
+    ipc_irq_cleanup(&TASK->answerbox);
+    /* Disconnect all phones connected to our answerbox */
+restart_phones:
+    spinlock_lock(&TASK->answerbox.lock);
+    while (!list_empty(&TASK->answerbox.connected_phones)) {
+        phone = list_get_instance(TASK->answerbox.connected_phones.next,
+                      phone_t, link);
+        if (! spinlock_trylock(&phone->lock)) {
+            spinlock_unlock(&TASK->answerbox.lock);
+            goto restart_phones;
+        }
+        /* Disconnect phone */
+        ASSERT(phone->state == IPC_PHONE_CONNECTED);
+        phone->state = IPC_PHONE_SLAMMED;
+        list_remove(&phone->link);
+        spinlock_unlock(&phone->lock);
+    }
+    /* Answer all messages in 'calls' and 'dispatched_calls' queues */
+    ipc_cleanup_call_list(&TASK->answerbox.dispatched_calls);
+    ipc_cleanup_call_list(&TASK->answerbox.calls);
+    spinlock_unlock(&TASK->answerbox.lock);
+    /* Wait for all async answers to arrive */
+    while (1) {
+        /* Go through all phones, until all are FREE... */
+        /* Locking not needed, no one else should modify
+         * it, when we are in cleanup */
+        for (i=0;i < IPC_MAX_PHONES; i++) {
+            if (TASK->phones[i].state == IPC_PHONE_HUNGUP && \
+                atomic_get(&TASK->phones[i].active_calls) == 0)
+                TASK->phones[i].state = IPC_PHONE_FREE;
+            /* Just for sure, we might have had some
+             * IPC_PHONE_CONNECTING phones */
+            if (TASK->phones[i].state == IPC_PHONE_CONNECTED)
+                ipc_phone_hangup(&TASK->phones[i]);
+            /* If the hangup succeeded, it has sent a HANGUP
+             * message, the IPC is now in HUNGUP state, we
+             * wait for the reply to come */
+            if (TASK->phones[i].state != IPC_PHONE_FREE)
+                break;
+        }
+        /* Voila, got into cleanup */
+        if (i == IPC_MAX_PHONES)
+            break;
+        call = ipc_wait_for_call(&TASK->answerbox, SYNCH_NO_TIMEOUT, SYNCH_FLAGS_NONE);
+        ASSERT((call->flags & IPC_CALL_ANSWERED) || (call->flags & IPC_CALL_NOTIF));
+        ASSERT(! (call->flags & IPC_CALL_STATIC_ALLOC));
+        atomic_dec(&TASK->active_calls);
+        ipc_call_free(call);
+    }
+}
+/** Initilize ipc subsystem */
+void ipc_init(void)
+{
+    ipc_call_slab = slab_cache_create("ipc_call",
+                      sizeof(call_t),
+,
+                      NULL, NULL, 0);
+    ipc_irq_make_table(IRQ_COUNT);
+}
+/** Kconsole - list answerbox contents */
+void ipc_print_task(task_id_t taskid)
+{
+    task_t *task;
+    int i;
+    call_t *call;
+    link_t *tmp;
+    spinlock_lock(&tasks_lock);
+    task = task_find_by_id(taskid);
+    if (task)
+        spinlock_lock(&task->lock);
+    spinlock_unlock(&tasks_lock);
+    if (!task)
+        return;
+    /* Print opened phones & details */
+    printf("PHONE:\n");
+    for (i=0; i < IPC_MAX_PHONES;i++) {
+        spinlock_lock(&task->phones[i].lock);
+        if (task->phones[i].state != IPC_PHONE_FREE) {
+            printf("%d: ",i);
+            switch (task->phones[i].state) {
+            case IPC_PHONE_CONNECTING:
+                printf("connecting ");
+                break;
+            case IPC_PHONE_CONNECTED:
+                printf("connected to: %p ",
+                       task->phones[i].callee);
+                break;
+            case IPC_PHONE_SLAMMED:
+                printf("slammed by: %p ",
+                       task->phones[i].callee);
+                break;
+            case IPC_PHONE_HUNGUP:
+                printf("hung up - was: %p ",
+                       task->phones[i].callee);
+                break;
+            default:
+                break;
+            }
+            printf("active: %d\n", atomic_get(&task->phones[i].active_calls));
+        }
+        spinlock_unlock(&task->phones[i].lock);
+    }
+    /* Print answerbox - calls */
+    spinlock_lock(&task->answerbox.lock);
+    printf("ABOX - CALLS:\n");
+    for (tmp=task->answerbox.calls.next; tmp != &task->answerbox.calls;tmp = tmp->next) {
+        call = list_get_instance(tmp, call_t, link);
+        printf("Callid: %p Srctask:%lld M:%d A1:%d A2:%d A3:%d Flags:%x\n",call,
+               call->sender->taskid, IPC_GET_METHOD(call->data), IPC_GET_ARG1(call->data),
+               IPC_GET_ARG2(call->data), IPC_GET_ARG3(call->data), call->flags);
+    }
+    /* Print answerbox - calls */
+    printf("ABOX - DISPATCHED CALLS:\n");
+    for (tmp=task->answerbox.dispatched_calls.next;
+         tmp != &task->answerbox.dispatched_calls;
+         tmp = tmp->next) {
+        call = list_get_instance(tmp, call_t, link);
+        printf("Callid: %p Srctask:%lld M:%d A1:%d A2:%d A3:%d Flags:%x\n",call,
+               call->sender->taskid, IPC_GET_METHOD(call->data), IPC_GET_ARG1(call->data),
+               IPC_GET_ARG2(call->data), IPC_GET_ARG3(call->data), call->flags);
+    }
+    /* Print answerbox - calls */
+    printf("ABOX - ANSWERS:\n");
+    for (tmp=task->answerbox.answers.next; tmp != &task->answerbox.answers; tmp = tmp->next) {
+        call = list_get_instance(tmp, call_t, link);
+        printf("Callid:%p M:%d A1:%d A2:%d A3:%d Flags:%x\n",call,
+               IPC_GET_METHOD(call->data), IPC_GET_ARG1(call->data),
+               IPC_GET_ARG2(call->data), IPC_GET_ARG3(call->data), call->flags);
+    }
+    spinlock_unlock(&task->answerbox.lock);
+    spinlock_unlock(&task->lock);
+}
+ /** @}
+ */

 /tags/0.2.0.2/kernel/generic/src/ipc/ipcrsc.c
 ,0 → 1,218
+/*
+ * Copyright (C) 2006 Ondrej Palkovsky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup genericipc
+ * @{
+ */
+/** @file
+ */
+/* IPC resources management
+ *
+ * The goal of this source code is to properly manage IPC resources
+ * and allow straight and clean clean-up procedure upon task termination.
+ *
+ * The pattern of usage of the resources is:
+ * - allocate empty phone slot, connect | deallocate slot
+ * - disconnect connected phone (some messages might be on the fly)
+ * - find phone in slot and send a message using phone
+ * - answer message to phone
+ * - hangup phone (the caller has hung up)
+ * - hangup phone (the answerbox is exiting)
+ *
+ * Locking strategy
+ *
+ * - To use a phone, disconnect a phone etc., the phone must be
+ *   first locked and then checked that it is connected
+ * - To connect an allocated phone it need not be locked (assigning
+ *   pointer is atomic on all platforms)
+ *
+ * - To find an empty phone slot, the TASK must be locked
+ * - To answer a message, the answerbox must be locked
+ * - The locking of phone and answerbox is done at the ipc_ level.
+ *   It is perfectly correct to pass unconnected phone to these functions
+ *   and proper reply will be generated.
+ *
+ * Locking order
+ *
+ * - first phone, then answerbox
+ *   + Easy locking on calls
+ *   - Very hard traversing list of phones when disconnecting because
+ *     the phones may disconnect during traversal of list of connected phones.
+ *     The only possibility is try_lock with restart of list traversal.
+ *
+ * Destroying is less frequent, this approach is taken.
+ *
+ * Phone call
+ *
+ * *** Connect_me_to ***
+ * The caller sends IPC_M_CONNECT_ME_TO to an answerbox. The server
+ * receives 'phoneid' of the connecting phone as an ARG3. If it answers
+ * with RETVAL=0, the phonecall is accepted, otherwise it is refused.
+ *
+ * *** Connect_to_me ***
+ * The caller sends IPC_M_CONNECT_TO_ME, with special
+ * The server receives an automatically
+ * opened phoneid. If it accepts (RETVAL=0), it can use the phoneid
+ * immediately.
+ * Possible race condition can arise, when the client receives messages
+ * from new connection before getting response for connect_to_me message.
+ * Userspace should implement handshake protocol that would control it.
+ *
+ * Phone hangup
+ *
+ * *** The caller hangs up (sys_ipc_hangup) ***
+ * - The phone is disconnected (no more messages can be sent over this phone),
+ *   all in-progress messages are correctly handled. The anwerbox receives
+ *   IPC_M_PHONE_HUNGUP call from the phone that hung up. When all async
+ *   calls are answered, the phone is deallocated.
+ *
+ * *** The answerbox hangs up (ipc_answer(EHANGUP))
+ * - The phone is disconnected. EHANGUP response code is sent
+ *   to the calling task. All new calls through this phone
+ *   get a EHUNGUP error code, the task is expected to
+ *   send an sys_ipc_hangup after cleaning up it's internal structures.
+ *
+ * Call forwarding
+ *
+ * The call can be forwarded, so that the answer to call is passed directly
+ * to the original sender. However, this poses special problems regarding
+ * routing of hangup messages.
+ *
+ * sys_ipc_hangup -> IPC_M_PHONE_HUNGUP
+ * - this message CANNOT be forwarded
+ *
+ * EHANGUP during forward
+ * - The *forwarding* phone will be closed, EFORWARD is sent to receiver.
+ *
+ * EHANGUP, ENOENT during forward
+ * - EFORWARD is sent to the receiver, ipc_forward returns error code EFORWARD
+ *
+ * Cleanup strategy
+ *
+ * 1) Disconnect all our phones ('ipc_phone_hangup').
+ *
+ * 2) Disconnect all phones connected to answerbox.
+ *
+ * 3) Answer all messages in 'calls' and 'dispatched_calls' queues with
+ *    appropriate error code (EHANGUP, EFORWARD).
+ *
+ * 4) Wait for all async answers to arrive and dispose of them.
+ *
+ */
+#include <synch/spinlock.h>
+#include <ipc/ipc.h>
+#include <arch.h>
+#include <proc/task.h>
+#include <ipc/ipcrsc.h>
+#include <debug.h>
+/** Find call_t * in call table according to callid
+ *
+ * TODO: Some speedup (hash table?)
+ * @return NULL on not found, otherwise pointer to call structure
+ */
+call_t * get_call(__native callid)
+{
+    link_t *lst;
+    call_t *call, *result = NULL;
+    spinlock_lock(&TASK->answerbox.lock);
+    for (lst = TASK->answerbox.dispatched_calls.next;
+         lst != &TASK->answerbox.dispatched_calls; lst = lst->next) {
+        call = list_get_instance(lst, call_t, link);
+        if ((__native)call == callid) {
+            result = call;
+            break;
+        }
+    }
+    spinlock_unlock(&TASK->answerbox.lock);
+    return result;
+}
+/** Allocate new phone slot in current TASK structure */
+int phone_alloc(void)
+{
+    int i;
+    spinlock_lock(&TASK->lock);
+    for (i=0; i < IPC_MAX_PHONES; i++) {
+        if (TASK->phones[i].state == IPC_PHONE_HUNGUP && \
+            atomic_get(&TASK->phones[i].active_calls) == 0)
+            TASK->phones[i].state = IPC_PHONE_FREE;
+        if (TASK->phones[i].state == IPC_PHONE_FREE) {
+            TASK->phones[i].state = IPC_PHONE_CONNECTING;
+            break;
+        }
+    }
+    spinlock_unlock(&TASK->lock);
+    if (i >= IPC_MAX_PHONES)
+        return -1;
+    return i;
+}
+static void phone_deallocp(phone_t *phone)
+{
+    ASSERT(phone->state == IPC_PHONE_CONNECTING);
+    /* atomic operation */
+    phone->state = IPC_PHONE_FREE;
+}
+/** Free slot from a disconnected phone
+ *
+ * All already sent messages will be correctly processed
+ */
+void phone_dealloc(int phoneid)
+{
+    phone_deallocp(&TASK->phones[phoneid]);
+}
+/** Connect phone to a given answerbox
+ *
+ * @param phoneid The slot that will be connected
+ *
+ * The procedure _enforces_ that the user first marks the phone
+ * busy (e.g. via phone_alloc) and then connects the phone, otherwise
+ * race condition may appear.
+ */
+void phone_connect(int phoneid, answerbox_t *box)
+{
+    phone_t *phone = &TASK->phones[phoneid];
+    ASSERT(phone->state == IPC_PHONE_CONNECTING);
+    ipc_phone_connect(phone, box);
+}
+ /** @}
+ */

 /tags/0.2.0.2/kernel/generic/src/ipc/sysipc.c
 ,0 → 1,597
+/*
+ * Copyright (C) 2006 Ondrej Palkovsky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup genericipc
+ * @{
+ */
+/** @file
+ */
+#include <arch.h>
+#include <proc/task.h>
+#include <proc/thread.h>
+#include <errno.h>
+#include <memstr.h>
+#include <debug.h>
+#include <ipc/ipc.h>
+#include <ipc/sysipc.h>
+#include <ipc/irq.h>
+#include <ipc/ipcrsc.h>
+#include <arch/interrupt.h>
+#include <print.h>
+#include <syscall/copy.h>
+#include <security/cap.h>
+#include <mm/as.h>
+#define GET_CHECK_PHONE(phone,phoneid,err) { \
+      if (phoneid > IPC_MAX_PHONES) { err; } \
+      phone = &TASK->phones[phoneid]; \
+}
+#define STRUCT_TO_USPACE(dst,src) copy_to_uspace(dst,src,sizeof(*(src)))
+/** Return true if the method is a system method */
+static inline int is_system_method(__native method)
+{
+    if (method <= IPC_M_LAST_SYSTEM)
+        return 1;
+    return 0;
+}
+/** Return true if the message with this method is forwardable
+ *
+ * - some system messages may be forwarded, for some of them
+ *   it is useless
+ */
+static inline int is_forwardable(__native method)
+{
+    if (method == IPC_M_PHONE_HUNGUP || method == IPC_M_AS_AREA_SEND \
+        || method == IPC_M_AS_AREA_RECV)
+        return 0; /* This message is meant only for the receiver */
+    return 1;
+}
+/****************************************************/
+/* Functions that preprocess answer before sending
+ * it to the recepient
+ */
+/** Return true if the caller (ipc_answer) should save
+ * the old call contents for answer_preprocess
+ */
+static inline int answer_need_old(call_t *call)
+{
+    if (IPC_GET_METHOD(call->data) == IPC_M_CONNECT_TO_ME)
+        return 1;
+    if (IPC_GET_METHOD(call->data) == IPC_M_CONNECT_ME_TO)
+        return 1;
+    if (IPC_GET_METHOD(call->data) == IPC_M_AS_AREA_SEND)
+        return 1;
+    if (IPC_GET_METHOD(call->data) == IPC_M_AS_AREA_RECV)
+        return 1;
+    return 0;
+}
+/** Interpret process answer as control information
+ *
+ * This function is called directly after sys_ipc_answer
+ */
+static inline int answer_preprocess(call_t *answer, ipc_data_t *olddata)
+{
+    int phoneid;
+    if (IPC_GET_RETVAL(answer->data) == EHANGUP) {
+        /* In case of forward, hangup the forwared phone,
+         * not the originator
+         */
+        spinlock_lock(&answer->data.phone->lock);
+        spinlock_lock(&TASK->answerbox.lock);
+        if (answer->data.phone->state == IPC_PHONE_CONNECTED) {
+            list_remove(&answer->data.phone->link);
+            answer->data.phone->state = IPC_PHONE_SLAMMED;
+        }
+        spinlock_unlock(&TASK->answerbox.lock);
+        spinlock_unlock(&answer->data.phone->lock);
+    }
+    if (!olddata)
+        return 0;
+    if (IPC_GET_METHOD(*olddata) == IPC_M_CONNECT_TO_ME) {
+        phoneid = IPC_GET_ARG3(*olddata);
+        if (IPC_GET_RETVAL(answer->data)) {
+            /* The connection was not accepted */
+            phone_dealloc(phoneid);
+        } else {
+            /* The connection was accepted */
+            phone_connect(phoneid,&answer->sender->answerbox);
+            /* Set 'phone identification' as arg3 of response */
+            IPC_SET_ARG3(answer->data, (__native)&TASK->phones[phoneid]);
+        }
+    } else if (IPC_GET_METHOD(*olddata) == IPC_M_CONNECT_ME_TO) {
+        /* If the users accepted call, connect */
+        if (!IPC_GET_RETVAL(answer->data)) {
+            ipc_phone_connect((phone_t *)IPC_GET_ARG3(*olddata),
+                      &TASK->answerbox);
+        }
+    } else if (IPC_GET_METHOD(*olddata) == IPC_M_AS_AREA_SEND) {
+        if (!IPC_GET_RETVAL(answer->data)) { /* Accepted, handle as_area receipt */
+            ipl_t ipl;
+            int rc;
+            as_t *as;
+            ipl = interrupts_disable();
+            spinlock_lock(&answer->sender->lock);
+            as = answer->sender->as;
+            spinlock_unlock(&answer->sender->lock);
+            interrupts_restore(ipl);
+            rc = as_area_share(as, IPC_GET_ARG1(*olddata), IPC_GET_ARG2(*olddata),
+                       AS, IPC_GET_ARG1(answer->data), IPC_GET_ARG3(*olddata));
+            IPC_SET_RETVAL(answer->data, rc);
+            return rc;
+        }
+    } else if (IPC_GET_METHOD(*olddata) == IPC_M_AS_AREA_RECV) {
+        if (!IPC_GET_RETVAL(answer->data)) {
+            ipl_t ipl;
+            as_t *as;
+            int rc;
+            ipl = interrupts_disable();
+            spinlock_lock(&answer->sender->lock);
+            as = answer->sender->as;
+            spinlock_unlock(&answer->sender->lock);
+            interrupts_restore(ipl);
+            rc = as_area_share(AS, IPC_GET_ARG1(answer->data), IPC_GET_ARG2(*olddata),
+                       as, IPC_GET_ARG1(*olddata), IPC_GET_ARG2(answer->data));
+            IPC_SET_RETVAL(answer->data, rc);
+        }
+    }
+    return 0;
+}
+/** Called before the request is sent
+ *
+ * @return 0 - no error, -1 - report error to user
+ */
+static int request_preprocess(call_t *call)
+{
+    int newphid;
+    size_t size;
+    switch (IPC_GET_METHOD(call->data)) {
+    case IPC_M_CONNECT_ME_TO:
+        newphid = phone_alloc();
+        if (newphid < 0)
+            return ELIMIT;
+        /* Set arg3 for server */
+        IPC_SET_ARG3(call->data, (__native)&TASK->phones[newphid]);
+        call->flags |= IPC_CALL_CONN_ME_TO;
+        call->private = newphid;
+        break;
+    case IPC_M_AS_AREA_SEND:
+        size = as_get_size(IPC_GET_ARG1(call->data));
+        if (!size) {
+            return EPERM;
+        }
+        IPC_SET_ARG2(call->data, size);
+        break;
+    default:
+        break;
+    }
+    return 0;
+}
+/****************************************************/
+/* Functions called to process received call/answer
+ * before passing to uspace
+ */
+/** Do basic kernel processing of received call answer */
+static void process_answer(call_t *call)
+{
+    if (IPC_GET_RETVAL(call->data) == EHANGUP && \
+        call->flags & IPC_CALL_FORWARDED)
+        IPC_SET_RETVAL(call->data, EFORWARD);
+    if (call->flags & IPC_CALL_CONN_ME_TO) {
+        if (IPC_GET_RETVAL(call->data))
+            phone_dealloc(call->private);
+        else
+            IPC_SET_ARG3(call->data, call->private);
+    }
+}
+/** Do basic kernel processing of received call request
+ *
+ * @return 0 - the call should be passed to userspace, 1 - ignore call
+ */
+static int process_request(answerbox_t *box,call_t *call)
+{
+    int phoneid;
+    if (IPC_GET_METHOD(call->data) == IPC_M_CONNECT_TO_ME) {
+        phoneid = phone_alloc();
+        if (phoneid < 0) { /* Failed to allocate phone */
+            IPC_SET_RETVAL(call->data, ELIMIT);
+            ipc_answer(box,call);
+            return -1;
+        }
+        IPC_SET_ARG3(call->data, phoneid);
+    }
+    return 0;
+}
+/** Send a call over IPC, wait for reply, return to user
+ *
+ * @return Call identification, returns -1 on fatal error,
+           -2 on 'Too many async request, handle answers first
+ */
+__native sys_ipc_call_sync_fast(__native phoneid, __native method,
+                __native arg1, ipc_data_t *data)
+{
+    call_t call;
+    phone_t *phone;
+    int res;
+    GET_CHECK_PHONE(phone, phoneid, return ENOENT);
+    ipc_call_static_init(&call);
+    IPC_SET_METHOD(call.data, method);
+    IPC_SET_ARG1(call.data, arg1);
+    if (!(res=request_preprocess(&call))) {
+        ipc_call_sync(phone, &call);
+        process_answer(&call);
+    } else
+        IPC_SET_RETVAL(call.data, res);
+    STRUCT_TO_USPACE(&data->args, &call.data.args);
+    return 0;
+}
+/** Synchronous IPC call allowing to send whole message */
+__native sys_ipc_call_sync(__native phoneid, ipc_data_t *question,
+               ipc_data_t *reply)
+{
+    call_t call;
+    phone_t *phone;
+    int res;
+    int rc;
+    ipc_call_static_init(&call);
+    rc = copy_from_uspace(&call.data.args, &question->args, sizeof(call.data.args));
+    if (rc != 0)
+        return (__native) rc;
+    GET_CHECK_PHONE(phone, phoneid, return ENOENT);
+    if (!(res=request_preprocess(&call))) {
+        ipc_call_sync(phone, &call);
+        process_answer(&call);
+    } else
+        IPC_SET_RETVAL(call.data, res);
+    rc = STRUCT_TO_USPACE(&reply->args, &call.data.args);
+    if (rc != 0)
+        return rc;
+    return 0;
+}
+/** Check that the task did not exceed allowed limit
+ *
+ * @return 0 - Limit OK,   -1 - limit exceeded
+ */
+static int check_call_limit(void)
+{
+    if (atomic_preinc(&TASK->active_calls) > IPC_MAX_ASYNC_CALLS) {
+        atomic_dec(&TASK->active_calls);
+        return -1;
+    }
+    return 0;
+}
+/** Send an asynchronous call over ipc
+ *
+ * @return Call identification, returns -1 on fatal error,
+           -2 on 'Too many async request, handle answers first
+ */
+__native sys_ipc_call_async_fast(__native phoneid, __native method,
+                 __native arg1, __native arg2)
+{
+    call_t *call;
+    phone_t *phone;
+    int res;
+    if (check_call_limit())
+        return IPC_CALLRET_TEMPORARY;
+    GET_CHECK_PHONE(phone, phoneid, return IPC_CALLRET_FATAL);
+    call = ipc_call_alloc(0);
+    IPC_SET_METHOD(call->data, method);
+    IPC_SET_ARG1(call->data, arg1);
+    IPC_SET_ARG2(call->data, arg2);
+    IPC_SET_ARG3(call->data, 0);
+    if (!(res=request_preprocess(call)))
+        ipc_call(phone, call);
+    else
+        ipc_backsend_err(phone, call, res);
+    return (__native) call;
+}
+/** Synchronous IPC call allowing to send whole message
+ *
+ * @return The same as sys_ipc_call_async
+ */
+__native sys_ipc_call_async(__native phoneid, ipc_data_t *data)
+{
+    call_t *call;
+    phone_t *phone;
+    int res;
+    int rc;
+    if (check_call_limit())
+        return IPC_CALLRET_TEMPORARY;
+    GET_CHECK_PHONE(phone, phoneid, return IPC_CALLRET_FATAL);
+    call = ipc_call_alloc(0);
+    rc = copy_from_uspace(&call->data.args, &data->args, sizeof(call->data.args));
+    if (rc != 0) {
+        ipc_call_free(call);
+        return (__native) rc;
+    }
+    if (!(res=request_preprocess(call)))
+        ipc_call(phone, call);
+    else
+        ipc_backsend_err(phone, call, res);
+    return (__native) call;
+}
+/** Forward received call to another destination
+ *
+ * The arg1 and arg2 are changed in the forwarded message
+ *
+ * Warning: If implementing non-fast version, make sure that
+ *          arg3 is not rewritten for certain system IPC
+ */
+__native sys_ipc_forward_fast(__native callid, __native phoneid,
+                  __native method, __native arg1)
+{
+    call_t *call;
+    phone_t *phone;
+    call = get_call(callid);
+    if (!call)
+        return ENOENT;
+    call->flags |= IPC_CALL_FORWARDED;
+    GET_CHECK_PHONE(phone, phoneid, {
+        IPC_SET_RETVAL(call->data, EFORWARD);
+        ipc_answer(&TASK->answerbox, call);
+        return ENOENT;
+    });
+    if (!is_forwardable(IPC_GET_METHOD(call->data))) {
+        IPC_SET_RETVAL(call->data, EFORWARD);
+        ipc_answer(&TASK->answerbox, call);
+        return EPERM;
+    }
+    /* Userspace is not allowed to change method of system methods
+     * on forward, allow changing ARG1 and ARG2 by means of method and arg1
+     */
+    if (is_system_method(IPC_GET_METHOD(call->data))) {
+        if (IPC_GET_METHOD(call->data) == IPC_M_CONNECT_TO_ME)
+            phone_dealloc(IPC_GET_ARG3(call->data));
+        IPC_SET_ARG1(call->data, method);
+        IPC_SET_ARG2(call->data, arg1);
+    } else {
+        IPC_SET_METHOD(call->data, method);
+        IPC_SET_ARG1(call->data, arg1);
+    }
+    return ipc_forward(call, phone, &TASK->answerbox);
+}
+/** Send IPC answer */
+__native sys_ipc_answer_fast(__native callid, __native retval,
+                 __native arg1, __native arg2)
+{
+    call_t *call;
+    ipc_data_t saved_data;
+    int saveddata = 0;
+    int rc;
+    /* Do not answer notification callids */
+    if (callid & IPC_CALLID_NOTIFICATION)
+        return 0;
+    call = get_call(callid);
+    if (!call)
+        return ENOENT;
+    if (answer_need_old(call)) {
+        memcpy(&saved_data, &call->data, sizeof(call->data));
+        saveddata = 1;
+    }
+    IPC_SET_RETVAL(call->data, retval);
+    IPC_SET_ARG1(call->data, arg1);
+    IPC_SET_ARG2(call->data, arg2);
+    rc = answer_preprocess(call, saveddata ? &saved_data : NULL);
+    ipc_answer(&TASK->answerbox, call);
+    return rc;
+}
+/** Send IPC answer */
+__native sys_ipc_answer(__native callid, ipc_data_t *data)
+{
+    call_t *call;
+    ipc_data_t saved_data;
+    int saveddata = 0;
+    int rc;
+    /* Do not answer notification callids */
+    if (callid & IPC_CALLID_NOTIFICATION)
+        return 0;
+    call = get_call(callid);
+    if (!call)
+        return ENOENT;
+    if (answer_need_old(call)) {
+        memcpy(&saved_data, &call->data, sizeof(call->data));
+        saveddata = 1;
+    }
+    rc = copy_from_uspace(&call->data.args, &data->args,
+             sizeof(call->data.args));
+    if (rc != 0)
+        return rc;
+    rc = answer_preprocess(call, saveddata ? &saved_data : NULL);
+    ipc_answer(&TASK->answerbox, call);
+    return rc;
+}
+/** Hang up the phone
+ *
+ */
+__native sys_ipc_hangup(int phoneid)
+{
+    phone_t *phone;
+    GET_CHECK_PHONE(phone, phoneid, return ENOENT);
+    if (ipc_phone_hangup(phone))
+        return -1;
+    return 0;
+}
+/** Wait for incoming ipc call or answer
+ *
+ * @param calldata Pointer to buffer where the call/answer data is stored
+ * @param usec Timeout. See waitq_sleep_timeout() for explanation.
+ * @param flags Select mode of sleep operation. See waitq_sleep_timeout() for explanation.
+ *
+ * @return Callid, if callid & 1, then the call is answer
+ */
+__native sys_ipc_wait_for_call(ipc_data_t *calldata, __u32 usec, int flags)
+{
+    call_t *call;
+restart:
+    call = ipc_wait_for_call(&TASK->answerbox, usec, flags | SYNCH_FLAGS_INTERRUPTIBLE);
+    if (!call)
+        return 0;
+    if (call->flags & IPC_CALL_NOTIF) {
+        ASSERT(! (call->flags & IPC_CALL_STATIC_ALLOC));
+        /* Set in_phone_hash to the interrupt counter */
+        call->data.phone = (void *)call->private;
+        STRUCT_TO_USPACE(calldata, &call->data);
+        ipc_call_free(call);
+        return ((__native)call) | IPC_CALLID_NOTIFICATION;
+    }
+    if (call->flags & IPC_CALL_ANSWERED) {
+        process_answer(call);
+        ASSERT(! (call->flags & IPC_CALL_STATIC_ALLOC));
+        atomic_dec(&TASK->active_calls);
+        if (call->flags & IPC_CALL_DISCARD_ANSWER) {
+            ipc_call_free(call);
+            goto restart;
+        }
+        STRUCT_TO_USPACE(&calldata->args, &call->data.args);
+        ipc_call_free(call);
+        return ((__native)call) | IPC_CALLID_ANSWERED;
+    }
+    if (process_request(&TASK->answerbox, call))
+        goto restart;
+    /* Include phone address('id') of the caller in the request,
+     * copy whole call->data, not only call->data.args */
+    if (STRUCT_TO_USPACE(calldata, &call->data)) {
+        return 0;
+    }
+    return (__native)call;
+}
+/** Connect irq handler to task */
+__native sys_ipc_register_irq(int irq, irq_code_t *ucode)
+{
+    if (!(cap_get(TASK) & CAP_IRQ_REG))
+        return EPERM;
+    if (irq >= IRQ_COUNT || irq <= -IPC_IRQ_RESERVED_VIRTUAL)
+        return (__native) ELIMIT;
+    irq_ipc_bind_arch(irq);
+    return ipc_irq_register(&TASK->answerbox, irq, ucode);
+}
+/* Disconnect irq handler from task */
+__native sys_ipc_unregister_irq(int irq)
+{
+    if (!(cap_get(TASK) & CAP_IRQ_REG))
+        return EPERM;
+    if (irq >= IRQ_COUNT || irq <= -IPC_IRQ_RESERVED_VIRTUAL)
+        return (__native) ELIMIT;
+    ipc_irq_unregister(&TASK->answerbox, irq);
+    return 0;
+}
+ /** @}
+ */

 /tags/0.2.0.2/kernel/generic/src/ipc/irq.c
 ,0 → 1,339
+/*
+ * Copyright (C) 2006 Ondrej Palkovsky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup genericipc
+ * @{
+ */
+/** @file
+ */
+/** IRQ notification framework
+ *
+ * This framework allows applications to register to receive a notification
+ * when interrupt is detected. The application may provide a simple 'top-half'
+ * handler as part of its registration, which can perform simple operations
+ * (read/write port/memory, add information to notification ipc message).
+ *
+ * The structure of a notification message is as follows:
+ * - METHOD: interrupt number
+ * - ARG1: payload modified by a 'top-half' handler
+ * - ARG2: payload
+ * - ARG3: payload
+ * - in_phone_hash: interrupt counter (may be needed to assure correct order
+ *         in multithreaded drivers)
+ */
+#include <arch.h>
+#include <mm/slab.h>
+#include <errno.h>
+#include <ipc/ipc.h>
+#include <ipc/irq.h>
+#include <atomic.h>
+#include <syscall/copy.h>
+#include <console/console.h>
+typedef struct {
+    SPINLOCK_DECLARE(lock);
+    answerbox_t *box;
+    irq_code_t *code;
+    atomic_t counter;
+} ipc_irq_t;
+static ipc_irq_t *irq_conns = NULL;
+static int irq_conns_size;
+#include <print.h>
+/* Execute code associated with IRQ notification */
+static void code_execute(call_t *call, irq_code_t *code)
+{
+    int i;
+    __native dstval = 0;
+    if (!code)
+        return;
+    for (i=0; i < code->cmdcount;i++) {
+        switch (code->cmds[i].cmd) {
+        case CMD_MEM_READ_1:
+            dstval = *((__u8 *)code->cmds[i].addr);
+            break;
+        case CMD_MEM_READ_2:
+            dstval = *((__u16 *)code->cmds[i].addr);
+            break;
+        case CMD_MEM_READ_4:
+            dstval = *((__u32 *)code->cmds[i].addr);
+            break;
+        case CMD_MEM_READ_8:
+            dstval = *((__u64 *)code->cmds[i].addr);
+            break;
+        case CMD_MEM_WRITE_1:
+            *((__u8 *)code->cmds[i].addr) = code->cmds[i].value;
+            break;
+        case CMD_MEM_WRITE_2:
+            *((__u16 *)code->cmds[i].addr) = code->cmds[i].value;
+            break;
+        case CMD_MEM_WRITE_4:
+            *((__u32 *)code->cmds[i].addr) = code->cmds[i].value;
+            break;
+        case CMD_MEM_WRITE_8:
+            *((__u64 *)code->cmds[i].addr) = code->cmds[i].value;
+            break;
+#if defined(ia32) || defined(amd64)
+        case CMD_PORT_READ_1:
+            dstval = inb((long)code->cmds[i].addr);
+            break;
+        case CMD_PORT_WRITE_1:
+            outb((long)code->cmds[i].addr, code->cmds[i].value);
+            break;
+#endif
+#if defined(ia64)
+        case CMD_IA64_GETCHAR:
+            dstval = _getc(&ski_uconsole);
+            break;
+#endif
+#if defined(ppc32)
+        case CMD_PPC32_GETCHAR:
+            dstval = cuda_get_scancode();
+            break;
+#endif
+        default:
+            break;
+        }
+        if (code->cmds[i].dstarg && code->cmds[i].dstarg < 4) {
+            call->data.args[code->cmds[i].dstarg] = dstval;
+        }
+    }
+}
+static void code_free(irq_code_t *code)
+{
+    if (code) {
+        free(code->cmds);
+        free(code);
+    }
+}
+static irq_code_t * code_from_uspace(irq_code_t *ucode)
+{
+    irq_code_t *code;
+    irq_cmd_t *ucmds;
+    int rc;
+    code = malloc(sizeof(*code), 0);
+    rc = copy_from_uspace(code, ucode, sizeof(*code));
+    if (rc != 0) {
+        free(code);
+        return NULL;
+    }
+    if (code->cmdcount > IRQ_MAX_PROG_SIZE) {
+        free(code);
+        return NULL;
+    }
+    ucmds = code->cmds;
+    code->cmds = malloc(sizeof(code->cmds[0]) * (code->cmdcount), 0);
+    rc = copy_from_uspace(code->cmds, ucmds, sizeof(code->cmds[0]) * (code->cmdcount));
+    if (rc != 0) {
+        free(code->cmds);
+        free(code);
+        return NULL;
+    }
+    return code;
+}
+/** Unregister task from irq */
+void ipc_irq_unregister(answerbox_t *box, int irq)
+{
+    ipl_t ipl;
+    int mq = irq + IPC_IRQ_RESERVED_VIRTUAL;
+    ipl = interrupts_disable();
+    spinlock_lock(&irq_conns[mq].lock);
+    if (irq_conns[mq].box == box) {
+        irq_conns[mq].box = NULL;
+        code_free(irq_conns[mq].code);
+        irq_conns[mq].code = NULL;
+    }
+    spinlock_unlock(&irq_conns[mq].lock);
+    interrupts_restore(ipl);
+}
+/** Register an answerbox as a receiving end of interrupts notifications */
+int ipc_irq_register(answerbox_t *box, int irq, irq_code_t *ucode)
+{
+    ipl_t ipl;
+    irq_code_t *code;
+    int mq = irq + IPC_IRQ_RESERVED_VIRTUAL;
+    ASSERT(irq_conns);
+    if (ucode) {
+        code = code_from_uspace(ucode);
+        if (!code)
+            return EBADMEM;
+    } else
+        code = NULL;
+    ipl = interrupts_disable();
+    spinlock_lock(&irq_conns[mq].lock);
+    if (irq_conns[mq].box) {
+        spinlock_unlock(&irq_conns[mq].lock);
+        interrupts_restore(ipl);
+        code_free(code);
+        return EEXISTS;
+    }
+    irq_conns[mq].box = box;
+    irq_conns[mq].code = code;
+    atomic_set(&irq_conns[mq].counter, 0);
+    spinlock_unlock(&irq_conns[mq].lock);
+    interrupts_restore(ipl);
+    return 0;
+}
+/** Add call to proper answerbox queue
+ *
+ * Assume irq_conns[mq].lock is locked */
+static void send_call(int mq, call_t *call)
+{
+    spinlock_lock(&irq_conns[mq].box->irq_lock);
+    list_append(&call->link, &irq_conns[mq].box->irq_notifs);
+    spinlock_unlock(&irq_conns[mq].box->irq_lock);
+    waitq_wakeup(&irq_conns[mq].box->wq, 0);
+}
+/** Send notification message
+ *
+ */
+void ipc_irq_send_msg(int irq, __native a1, __native a2, __native a3)
+{
+    call_t *call;
+    int mq = irq + IPC_IRQ_RESERVED_VIRTUAL;
+    spinlock_lock(&irq_conns[mq].lock);
+    if (irq_conns[mq].box) {
+        call = ipc_call_alloc(FRAME_ATOMIC);
+        if (!call) {
+            spinlock_unlock(&irq_conns[mq].lock);
+            return;
+        }
+        call->flags |= IPC_CALL_NOTIF;
+        IPC_SET_METHOD(call->data, irq);
+        IPC_SET_ARG1(call->data, a1);
+        IPC_SET_ARG2(call->data, a2);
+        IPC_SET_ARG3(call->data, a3);
+        /* Put a counter to the message */
+        call->private = atomic_preinc(&irq_conns[mq].counter);
+        send_call(mq, call);
+    }
+    spinlock_unlock(&irq_conns[mq].lock);
+}
+/** Notify task that an irq had occurred.
+ *
+ * We expect interrupts to be disabled
+ */
+void ipc_irq_send_notif(int irq)
+{
+    call_t *call;
+    int mq = irq + IPC_IRQ_RESERVED_VIRTUAL;
+    ASSERT(irq_conns);
+    spinlock_lock(&irq_conns[mq].lock);
+    if (irq_conns[mq].box) {
+        call = ipc_call_alloc(FRAME_ATOMIC);
+        if (!call) {
+            spinlock_unlock(&irq_conns[mq].lock);
+            return;
+        }
+        call->flags |= IPC_CALL_NOTIF;
+        /* Put a counter to the message */
+        call->private = atomic_preinc(&irq_conns[mq].counter);
+        /* Set up args */
+        IPC_SET_METHOD(call->data, irq);
+        /* Execute code to handle irq */
+        code_execute(call, irq_conns[mq].code);
+        send_call(mq, call);
+    }
+    spinlock_unlock(&irq_conns[mq].lock);
+}
+/** Initialize table of interrupt handlers
+ *
+ * @param irqcount Count of required hardware IRQs to be supported
+ */
+void ipc_irq_make_table(int irqcount)
+{
+    int i;
+    irqcount +=  IPC_IRQ_RESERVED_VIRTUAL;
+    irq_conns_size = irqcount;
+    irq_conns = malloc(irqcount * (sizeof(*irq_conns)), 0);
+    for (i=0; i < irqcount; i++) {
+        spinlock_initialize(&irq_conns[i].lock, "irq_ipc_lock");
+        irq_conns[i].box = NULL;
+        irq_conns[i].code = NULL;
+    }
+}
+/** Disconnect all irq's notifications
+ *
+ * TODO: It may be better to do some linked list, so that
+ *       we wouldn't need to go through whole array every cleanup
+ */
+void ipc_irq_cleanup(answerbox_t *box)
+{
+    int i;
+    ipl_t ipl;
+    for (i=0; i < irq_conns_size; i++) {
+        ipl = interrupts_disable();
+        spinlock_lock(&irq_conns[i].lock);
+        if (irq_conns[i].box == box)
+            irq_conns[i].box = NULL;
+        spinlock_unlock(&irq_conns[i].lock);
+        interrupts_restore(ipl);
+    }
+}
+ /** @}
+ */

 /tags/0.2.0.2/kernel/generic/src/cpu/cpu.c
 ,0 → 1,114
+ /*
+ * Copyright (C) 2001-2004 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/** @addtogroup generic
+ * @{
+ */
+/**
+ * @file
+ * @brief   CPU subsystem initialization and listing.
+ */
+#include <cpu.h>
+#include <arch.h>
+#include <arch/cpu.h>
+#include <mm/slab.h>
+#include <mm/page.h>
+#include <mm/frame.h>
+#include <arch/types.h>
+#include <config.h>
+#include <panic.h>
+#include <typedefs.h>
+#include <memstr.h>
+#include <adt/list.h>
+#include <print.h>
+cpu_t *cpus;
+/** Initialize CPUs
+ *
+ * Initialize kernel CPUs support.
+ *
+ */
+void cpu_init(void) {
+    int i, j;
+    #ifdef CONFIG_SMP
+    if (config.cpu_active == 1) {
+    #endif /* CONFIG_SMP */
+        cpus = (cpu_t *) malloc(sizeof(cpu_t) * config.cpu_count,
+                    FRAME_ATOMIC);
+        if (!cpus)
+            panic("malloc/cpus");
+        /* initialize everything */
+        memsetb((__address) cpus, sizeof(cpu_t) * config.cpu_count, 0);
+        for (i=0; i < config.cpu_count; i++) {
+            cpus[i].stack = (__u8 *) PA2KA(PFN2ADDR(frame_alloc(STACK_FRAMES, FRAME_KA | FRAME_PANIC)));
+            cpus[i].id = i;
+            spinlock_initialize(&cpus[i].lock, "cpu_t.lock");
+            for (j = 0; j < RQ_COUNT; j++) {
+                spinlock_initialize(&cpus[i].rq[j].lock, "rq_t.lock");
+                list_initialize(&cpus[i].rq[j].rq_head);
+            }
+        }
+    #ifdef CONFIG_SMP
+    }
+    #endif /* CONFIG_SMP */
+    CPU = &cpus[config.cpu_active-1];
+    CPU->active = 1;
+    CPU->tlb_active = 1;
+    cpu_identify();
+    cpu_arch_init();
+}
+/** List all processors. */
+void cpu_list(void)
+{
+    int i;
+    for (i = 0; i < config.cpu_count; i++) {
+        if (cpus[i].active)
+            cpu_print_report(&cpus[i]);
+        else
+            printf("cpu%d: not active\n", i);
+    }
+}
+ /** @}
+ */

 /tags/0.2.0.2/kernel/generic/src/time/delay.c
 ,0 → 1,69
+/*
+ * Copyright (C) 2001-2004 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/** @addtogroup time
+ * @{
+ */
+/**
+ * @file
+ * @brief   Active delay function.
+ */
+#include <time/delay.h>
+#include <arch/types.h>
+#include <cpu.h>
+#include <arch/asm.h>
+#include <arch.h>
+/** Active delay
+ *
+ * Delay the execution for the given number
+ * of microseconds (or slightly more). The delay
+ * is implemented as CPU calibrated active loop.
+ *
+ * @param usec Number of microseconds to sleep.
+ */
+void delay(__u32 usec)
+{
+    ipl_t ipl;
+    /*
+     * The delay loop is calibrated for each and every
+     * CPU in the system. Therefore it is necessary to
+     * call interrupts_disable() before calling the
+     * asm_delay_loop().
+     */
+    ipl = interrupts_disable();
+    asm_delay_loop(usec * CPU->delay_loop_const);
+    interrupts_restore(ipl);
+}
+/** @}
+ */

 /tags/0.2.0.2/kernel/generic/src/time/timeout.c
 ,0 → 1,219
+/*
+ * Copyright (C) 2001-2004 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/** @addtogroup time
+ * @{
+ */
+/**
+ * @file
+ * @brief   Timeout management functions.
+ */
+#include <time/timeout.h>
+#include <typedefs.h>
+#include <arch/types.h>
+#include <config.h>
+#include <panic.h>
+#include <synch/spinlock.h>
+#include <func.h>
+#include <cpu.h>
+#include <arch/asm.h>
+#include <arch.h>
+/** Initialize timeouts
+ *
+ * Initialize kernel timeouts.
+ *
+ */
+void timeout_init(void)
+{
+    spinlock_initialize(&CPU->timeoutlock, "timeout_lock");
+    list_initialize(&CPU->timeout_active_head);
+}
+/** Reinitialize timeout
+ *
+ * Initialize all members except the lock.
+ *
+ * @param t Timeout to be initialized.
+ *
+ */
+void timeout_reinitialize(timeout_t *t)
+{
+    t->cpu = NULL;
+    t->ticks = 0;
+    t->handler = NULL;
+    t->arg = NULL;
+    link_initialize(&t->link);
+}
+/** Initialize timeout
+ *
+ * Initialize all members including the lock.
+ *
+ * @param t Timeout to be initialized.
+ *
+ */
+void timeout_initialize(timeout_t *t)
+{
+    spinlock_initialize(&t->lock, "timeout_t_lock");
+    timeout_reinitialize(t);
+}
+/** Register timeout
+ *
+ * Insert timeout handler f (with argument arg)
+ * to timeout list and make it execute in
+ * time microseconds (or slightly more).
+ *
+ * @param t    Timeout structure.
+ * @param time Number of usec in the future to execute
+ *             the handler.
+ * @param f    Timeout handler function.
+ * @param arg  Timeout handler argument.
+ *
+ */
+void timeout_register(timeout_t *t, __u64 time, timeout_handler_t f, void *arg)
+{
+    timeout_t *hlp = NULL;
+    link_t *l, *m;
+    ipl_t ipl;
+    __u64 sum;
+    ipl = interrupts_disable();
+    spinlock_lock(&CPU->timeoutlock);
+    spinlock_lock(&t->lock);
+    if (t->cpu)
+        panic("t->cpu != 0");
+    t->cpu = CPU;
+    t->ticks = us2ticks(time);
+    t->handler = f;
+    t->arg = arg;
+    /*
+     * Insert t into the active timeouts list according to t->ticks.
+     */
+    sum = 0;
+    l = CPU->timeout_active_head.next;
+    while (l != &CPU->timeout_active_head) {
+        hlp = list_get_instance(l, timeout_t, link);
+        spinlock_lock(&hlp->lock);
+        if (t->ticks < sum + hlp->ticks) {
+            spinlock_unlock(&hlp->lock);
+            break;
+        }
+        sum += hlp->ticks;
+        spinlock_unlock(&hlp->lock);
+        l = l->next;
+    }
+    m = l->prev;
+    list_prepend(&t->link, m); /* avoid using l->prev */
+    /*
+     * Adjust t->ticks according to ticks accumulated in h's predecessors.
+     */
+    t->ticks -= sum;
+    /*
+     * Decrease ticks of t's immediate succesor by t->ticks.
+     */
+    if (l != &CPU->timeout_active_head) {
+        spinlock_lock(&hlp->lock);
+        hlp->ticks -= t->ticks;
+        spinlock_unlock(&hlp->lock);
+    }
+    spinlock_unlock(&t->lock);
+    spinlock_unlock(&CPU->timeoutlock);
+    interrupts_restore(ipl);
+}
+/** Unregister timeout
+ *
+ * Remove timeout from timeout list.
+ *
+ * @param t Timeout to unregister.
+ *
+ * @return true on success, false on failure.
+ */
+bool timeout_unregister(timeout_t *t)
+{
+    timeout_t *hlp;
+    link_t *l;
+    ipl_t ipl;
+grab_locks:
+    ipl = interrupts_disable();
+    spinlock_lock(&t->lock);
+    if (!t->cpu) {
+        spinlock_unlock(&t->lock);
+        interrupts_restore(ipl);
+        return false;
+    }
+    if (!spinlock_trylock(&t->cpu->timeoutlock)) {
+        spinlock_unlock(&t->lock);
+        interrupts_restore(ipl);
+        goto grab_locks;
+    }
+    /*
+     * Now we know for sure that t hasn't been activated yet
+     * and is lurking in t->cpu->timeout_active_head queue.
+     */
+    l = t->link.next;
+    if (l != &t->cpu->timeout_active_head) {
+        hlp = list_get_instance(l, timeout_t, link);
+        spinlock_lock(&hlp->lock);
+        hlp->ticks += t->ticks;
+        spinlock_unlock(&hlp->lock);
+    }
+    list_remove(&t->link);
+    spinlock_unlock(&t->cpu->timeoutlock);
+    timeout_reinitialize(t);
+    spinlock_unlock(&t->lock);
+    interrupts_restore(ipl);
+    return true;
+}
+/** @}
+ */

 /tags/0.2.0.2/kernel/generic/src/time/clock.c
 ,0 → 1,192
+/*
+ * Copyright (C) 2001-2004 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/** @addtogroup time
+ * @{
+ */
+/**
+ * @file
+ * @brief   High-level clock interrupt handler.
+ *
+ * This file contains the clock() function which is the source
+ * of preemption. It is also responsible for executing expired
+ * timeouts.
+ */
+#include <time/clock.h>
+#include <time/timeout.h>
+#include <arch/types.h>
+#include <config.h>
+#include <synch/spinlock.h>
+#include <synch/waitq.h>
+#include <func.h>
+#include <proc/scheduler.h>
+#include <cpu.h>
+#include <arch.h>
+#include <adt/list.h>
+#include <atomic.h>
+#include <proc/thread.h>
+#include <sysinfo/sysinfo.h>
+#include <arch/barrier.h>
+/* Pointers to public variables with time */
+struct ptime {
+    __native seconds1;
+    __native useconds;
+    __native seconds2;
+};
+struct ptime *public_time;
+/* Variable holding fragment of second, so that we would update
+ * seconds correctly
+ */
+static __native secfrag = 0;
+/** Initialize realtime clock counter
+ *
+ * The applications (and sometimes kernel) need to access accurate
+ * information about realtime data. We allocate 1 page with these
+ * data and update it periodically.
+ *
+ *
+ */
+void clock_counter_init(void)
+{
+    void *faddr;
+    faddr = (void *)PFN2ADDR(frame_alloc(0, FRAME_ATOMIC));
+    if (!faddr)
+        panic("Cannot allocate page for clock");
+    public_time = (struct ptime *)PA2KA(faddr);
+        /* TODO: We would need some arch dependent settings here */
+    public_time->seconds1 = 0;
+    public_time->seconds2 = 0;
+    public_time->useconds = 0;
+    sysinfo_set_item_val("clock.faddr", NULL, (__native)faddr);
+}
+/** Update public counters
+ *
+ * Update it only on first processor
+ * TODO: Do we really need so many write barriers?
+ */
+static void clock_update_counters(void)
+{
+    if (CPU->id == 0) {
+        secfrag += 1000000/HZ;
+        if (secfrag >= 1000000) {
+            secfrag -= 1000000;
+            public_time->seconds1++;
+            write_barrier();
+            public_time->useconds = secfrag;
+            write_barrier();
+            public_time->seconds2 = public_time->seconds1;
+        } else
+            public_time->useconds += 1000000/HZ;
+    }
+}
+/** Clock routine
+ *
+ * Clock routine executed from clock interrupt handler
+ * (assuming interrupts_disable()'d). Runs expired timeouts
+ * and preemptive scheduling.
+ *
+ */
+void clock(void)
+{
+    link_t *l;
+    timeout_t *h;
+    timeout_handler_t f;
+    void *arg;
+    count_t missed_clock_ticks = CPU->missed_clock_ticks;
+    int i;
+    /*
+     * To avoid lock ordering problems,
+     * run all expired timeouts as you visit them.
+     */
+    for (i = 0; i <= missed_clock_ticks; i++) {
+        clock_update_counters();
+        spinlock_lock(&CPU->timeoutlock);
+        while ((l = CPU->timeout_active_head.next) != &CPU->timeout_active_head) {
+            h = list_get_instance(l, timeout_t, link);
+            spinlock_lock(&h->lock);
+            if (h->ticks-- != 0) {
+                spinlock_unlock(&h->lock);
+                break;
+            }
+            list_remove(l);
+            f = h->handler;
+            arg = h->arg;
+            timeout_reinitialize(h);
+            spinlock_unlock(&h->lock);
+            spinlock_unlock(&CPU->timeoutlock);
+            f(arg);
+            spinlock_lock(&CPU->timeoutlock);
+        }
+        spinlock_unlock(&CPU->timeoutlock);
+    }
+    CPU->missed_clock_ticks = 0;
+    /*
+     * Do CPU usage accounting and find out whether to preempt THREAD.
+     */
+    if (THREAD) {
+        __u64 ticks;
+        spinlock_lock(&CPU->lock);
+        CPU->needs_relink += 1 + missed_clock_ticks;
+        spinlock_unlock(&CPU->lock);
+        spinlock_lock(&THREAD->lock);
+        if ((ticks = THREAD->ticks)) {
+            if (ticks >= 1 + missed_clock_ticks)
+                THREAD->ticks -= 1 + missed_clock_ticks;
+            else
+                THREAD->ticks = 0;
+        }
+        spinlock_unlock(&THREAD->lock);
+        if (!ticks && !PREEMPTION_DISABLED) {
+            scheduler();
+        }
+    }
+}
+/** @}
+ */

 /tags/0.2.0.2/kernel/generic/src/main/kinit.c
 ,0 → 1,197
+/*
+ * Copyright (C) 2001-2004 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/** @addtogroup main
+ * @{
+ */
+/**
+ * @file
+ * @brief   Kernel initialization thread.
+ *
+ * This file contains kinit kernel thread which carries out
+ * high level system initialization.
+ *
+ * This file is responsible for finishing SMP configuration
+ * and creation of userspace init tasks.
+ */
+#include <main/kinit.h>
+#include <config.h>
+#include <arch.h>
+#include <proc/scheduler.h>
+#include <proc/task.h>
+#include <proc/thread.h>
+#include <panic.h>
+#include <func.h>
+#include <cpu.h>
+#include <arch/asm.h>
+#include <mm/page.h>
+#include <arch/mm/page.h>
+#include <mm/as.h>
+#include <mm/frame.h>
+#include <print.h>
+#include <memstr.h>
+#include <console/console.h>
+#include <interrupt.h>
+#include <console/kconsole.h>
+#include <security/cap.h>
+#ifdef CONFIG_SMP
+#include <arch/smp/mps.h>
+#endif /* CONFIG_SMP */
+#include <synch/waitq.h>
+#include <synch/spinlock.h>
+#ifdef CONFIG_TEST
+#include <test.h>
+#endif /* CONFIG_TEST */
+/** Kernel initialization thread.
+ *
+ * kinit takes care of higher level kernel
+ * initialization (i.e. thread creation,
+ * userspace initialization etc.).
+ *
+ * @param arg Not used.
+ */
+void kinit(void *arg)
+{
+    thread_t *t;
+    /*
+     * Detach kinit as nobody will call thread_join_timeout() on it.
+     */
+    thread_detach(THREAD);
+    interrupts_disable();
+#ifdef CONFIG_SMP
+    if (config.cpu_count > 1) {
+        /*
+         * Create the kmp thread and wait for its completion.
+         * cpu1 through cpuN-1 will come up consecutively and
+         * not mess together with kcpulb threads.
+         * Just a beautification.
+         */
+        if ((t = thread_create(kmp, NULL, TASK, 0, "kmp"))) {
+            spinlock_lock(&t->lock);
+            t->flags |= X_WIRED;
+            t->cpu = &cpus[0];
+            spinlock_unlock(&t->lock);
+            thread_ready(t);
+        } else
+            panic("thread_create/kmp\n");
+        thread_join(t);
+        thread_detach(t);
+    }
+#endif /* CONFIG_SMP */
+    /*
+     * Now that all CPUs are up, we can report what we've found.
+     */
+    cpu_list();
+#ifdef CONFIG_SMP
+    if (config.cpu_count > 1) {
+        int i;
+        /*
+         * For each CPU, create its load balancing thread.
+         */
+        for (i = 0; i < config.cpu_count; i++) {
+            if ((t = thread_create(kcpulb, NULL, TASK, 0, "kcpulb"))) {
+                spinlock_lock(&t->lock);
+                t->flags |= X_WIRED;
+                t->cpu = &cpus[i];
+                spinlock_unlock(&t->lock);
+                thread_ready(t);
+            } else
+                panic("thread_create/kcpulb\n");
+        }
+    }
+#endif /* CONFIG_SMP */
+    /*
+     * At this point SMP, if present, is configured.
+     */
+    arch_post_smp_init();
+    /*
+     * Create kernel console.
+     */
+    if ((t = thread_create(kconsole, "kconsole", TASK, 0, "kconsole")))
+        thread_ready(t);
+    else
+        panic("thread_create/kconsole\n");
+    interrupts_enable();
+#ifdef CONFIG_TEST
+    test();
+    printf("\nTest finished, please reboot\n");
+#else  /* CONFIG_TEST */
+    task_t *utask;
+    count_t i;
+    for (i = 0; i < init.cnt; i++) {
+        /*
+         * Run user tasks.
+         */
+        if (init.tasks[i].addr % FRAME_SIZE)
+            panic("init[%d].addr is not frame aligned", i);
+        utask = task_run_program((void *) init.tasks[i].addr, "USPACE");
+        if (utask) {
+            /*
+             * Set capabilities to init userspace tasks.
+             */
+            cap_set(utask, CAP_CAP | CAP_MEM_MANAGER | CAP_IO_MANAGER | CAP_PREEMPT_CONTROL | CAP_IRQ_REG);
+            if (!ipc_phone_0)
+                ipc_phone_0 = &utask->answerbox;
+        } else
+            printf("Init task %zd not started.\n", i);
+    }
+    if (!stdin) {
+        while (1) {
+            thread_sleep(1);
+            printf("kinit... ");
+        }
+    }
+#endif /* CONFIG_TEST */
+}
+/** @}
+ */

 /tags/0.2.0.2/kernel/generic/src/main/main.c
 ,0 → 1,328
+/*
+ * Copyright (C) 2001-2004 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/** @addtogroup main
+ * @{
+ */
+/**
+ * @file
+ * @brief   Main initialization kernel function for all processors.
+ *
+ * During kernel boot, all processors, after architecture dependent
+ * initialization, start executing code found in this file. After
+ * bringing up all subsystems, control is passed to scheduler().
+ *
+ * The bootstrap processor starts executing main_bsp() while
+ * the application processors start executing main_ap().
+ *
+ * @see scheduler()
+ * @see main_bsp()
+ * @see main_ap()
+ */
+#include <arch/asm.h>
+#include <context.h>
+#include <print.h>
+#include <panic.h>
+#include <debug.h>
+#include <config.h>
+#include <time/clock.h>
+#include <proc/scheduler.h>
+#include <proc/thread.h>
+#include <proc/task.h>
+#include <main/kinit.h>
+#include <main/version.h>
+#include <console/kconsole.h>
+#include <cpu.h>
+#include <align.h>
+#include <interrupt.h>
+#include <arch/mm/memory_init.h>
+#include <mm/frame.h>
+#include <mm/page.h>
+#include <genarch/mm/page_pt.h>
+#include <mm/tlb.h>
+#include <mm/as.h>
+#include <mm/slab.h>
+#include <synch/waitq.h>
+#include <synch/futex.h>
+#include <arch/arch.h>
+#include <arch.h>
+#include <arch/faddr.h>
+#include <typedefs.h>
+#include <ipc/ipc.h>
+#include <macros.h>
+#include <adt/btree.h>
+#include <console/klog.h>
+#ifdef CONFIG_SMP
+#include <arch/smp/apic.h>
+#include <arch/smp/mps.h>
+#endif /* CONFIG_SMP */
+#include <smp/smp.h>
+/** Global configuration structure. */
+config_t config = {
+    .mm_initialized = false
+};
+/** Initial user-space tasks */
+init_t init = {
+};
+context_t ctx;
+/**
+ * These 'hardcoded' variables will be intialized by
+ * the linker or the low level assembler code with
+ * appropriate sizes and addresses.
+ */
+__address hardcoded_load_address = 0;
+size_t hardcoded_ktext_size = 0;
+size_t hardcoded_kdata_size = 0;
+void main_bsp(void);
+void main_ap(void);
+/*
+ * These two functions prevent stack from underflowing during the
+ * kernel boot phase when SP is set to the very top of the reserved
+ * space. The stack could get corrupted by a fooled compiler-generated
+ * pop sequence otherwise.
+ */
+static void main_bsp_separated_stack(void);
+#ifdef CONFIG_SMP
+static void main_ap_separated_stack(void);
+#endif
+#define CONFIG_STACK_SIZE   ((1<<STACK_FRAMES)*STACK_SIZE)
+/** Main kernel routine for bootstrap CPU.
+ *
+ * Initializes the kernel by bootstrap CPU.
+ * This function passes control directly to
+ * main_bsp_separated_stack().
+ *
+ * Assuming interrupts_disable().
+ *
+ */
+void main_bsp(void)
+{
+    __address stackaddr;
+    config.cpu_count = 1;
+    config.cpu_active = 1;
+    config.base = hardcoded_load_address;
+    config.memory_size = get_memory_size();
+    config.kernel_size = ALIGN_UP(hardcoded_ktext_size + hardcoded_kdata_size, PAGE_SIZE);
+    stackaddr = config.base + config.kernel_size;
+    /* Avoid placing kernel on top of init */
+    count_t i;
+    bool overlap = false;
+    for (i = 0; i < init.cnt; i++)
+        if (PA_overlaps(stackaddr, CONFIG_STACK_SIZE, init.tasks[i].addr, init.tasks[i].size)) {
+            stackaddr = ALIGN_UP(init.tasks[i].addr + init.tasks[i].size, CONFIG_STACK_SIZE);
+            init.tasks[i].size = ALIGN_UP(init.tasks[i].size, CONFIG_STACK_SIZE) + CONFIG_STACK_SIZE;
+            overlap = true;
+        }
+    if (!overlap)
+        config.kernel_size += CONFIG_STACK_SIZE;
+    context_save(&ctx);
+    context_set(&ctx, FADDR(main_bsp_separated_stack), stackaddr, THREAD_STACK_SIZE);
+    context_restore(&ctx);
+    /* not reached */
+}
+/** Main kernel routine for bootstrap CPU using new stack.
+ *
+ * Second part of main_bsp().
+ *
+ */
+void main_bsp_separated_stack(void)
+{
+    task_t *k;
+    thread_t *t;
+    count_t i;
+    the_initialize(THE);
+    /*
+     * kconsole data structures must be initialized very early
+     * because other subsystems will register their respective
+     * commands.
+     */
+    kconsole_init();
+    /*
+     * Exception handler initialization, before architecture
+     * starts adding its own handlers
+     */
+    exc_init();
+    /*
+     * Memory management subsystems initialization.
+     */
+    arch_pre_mm_init();
+    frame_init();       /* Initialize at least 1 memory segment big enough for slab to work */
+    slab_cache_init();
+    btree_init();
+    as_init();
+    page_init();
+    tlb_init();
+    config.mm_initialized = true;
+    arch_post_mm_init();
+    version_print();
+    printf("%.*p: hardcoded_ktext_size=%zdK, hardcoded_kdata_size=%zdK\n", sizeof(__address) * 2, config.base, hardcoded_ktext_size >> 10, hardcoded_kdata_size >> 10);
+    arch_pre_smp_init();
+    smp_init();
+    slab_enable_cpucache(); /* Slab must be initialized AFTER we know the number of processors */
+    printf("config.memory_size=%zdM\n", config.memory_size >> 20);
+    printf("config.cpu_count=%zd\n", config.cpu_count);
+    cpu_init();
+    calibrate_delay_loop();
+    clock_counter_init();
+    timeout_init();
+    scheduler_init();
+    task_init();
+    thread_init();
+    futex_init();
+    klog_init();
+    for (i = 0; i < init.cnt; i++)
+        printf("init[%zd].addr=%.*p, init[%zd].size=%zd\n", i, sizeof(__address) * 2, init.tasks[i].addr, i, init.tasks[i].size);
+    ipc_init();
+    /*
+     * Create kernel task.
+     */
+    k = task_create(AS_KERNEL, "KERNEL");
+    if (!k)
+        panic("can't create kernel task\n");
+    /*
+     * Create the first thread.
+     */
+    t = thread_create(kinit, NULL, k, 0, "kinit");
+    if (!t)
+        panic("can't create kinit thread\n");
+    thread_ready(t);
+    /*
+     * This call to scheduler() will return to kinit,
+     * starting the thread of kernel threads.
+     */
+    scheduler();
+    /* not reached */
+}
+#ifdef CONFIG_SMP
+/** Main kernel routine for application CPUs.
+ *
+ * Executed by application processors, temporary stack
+ * is at ctx.sp which was set during BP boot.
+ * This function passes control directly to
+ * main_ap_separated_stack().
+ *
+ * Assuming interrupts_disable()'d.
+ *
+ */
+void main_ap(void)
+{
+    /*
+     * Incrementing the active CPU counter will guarantee that the
+     * pm_init() will not attempt to build GDT and IDT tables again.
+     * Neither frame_init() will do the complete thing. Neither cpu_init()
+     * will do.
+     */
+    config.cpu_active++;
+    /*
+     * The THE structure is well defined because ctx.sp is used as stack.
+     */
+    the_initialize(THE);
+    arch_pre_mm_init();
+    frame_init();
+    page_init();
+    tlb_init();
+    arch_post_mm_init();
+    cpu_init();
+    calibrate_delay_loop();
+    l_apic_init();
+    l_apic_debug();
+    the_copy(THE, (the_t *) CPU->stack);
+    /*
+     * If we woke kmp up before we left the kernel stack, we could
+     * collide with another CPU coming up. To prevent this, we
+     * switch to this cpu's private stack prior to waking kmp up.
+     */
+    context_set(&CPU->saved_context, FADDR(main_ap_separated_stack), (__address) CPU->stack, CPU_STACK_SIZE);
+    context_restore(&CPU->saved_context);
+    /* not reached */
+}
+/** Main kernel routine for application CPUs using new stack.
+ *
+ * Second part of main_ap().
+ *
+ */
+void main_ap_separated_stack(void)
+{
+    /*
+     * Configure timeouts for this cpu.
+     */
+    timeout_init();
+    waitq_wakeup(&ap_completion_wq, WAKEUP_FIRST);
+    scheduler();
+    /* not reached */
+}
+#endif /* CONFIG_SMP */
+/** @}
+ */

 /tags/0.2.0.2/kernel/generic/src/main/uinit.c
 ,0 → 1,68
+/*
+ * Copyright (C) 2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/** @addtogroup main
+ * @{
+ */
+/**
+ * @file
+ * @brief   Userspace bootstrap thread.
+ *
+ * This file contains uinit kernel thread wich is used to start every
+ * userspace thread including threads created by SYS_THREAD_CREATE syscall.
+ *
+ * @see SYS_THREAD_CREATE
+ */
+#include <main/uinit.h>
+#include <arch/types.h>
+#include <proc/thread.h>
+#include <userspace.h>
+#include <mm/slab.h>
+/** Thread used to bring up userspace thread.
+ *
+ * @param arg Pointer to structure containing userspace entry and stack addresses.
+ */
+void uinit(void *arg)
+{
+    uspace_arg_t uarg;
+    uarg.uspace_entry = ((uspace_arg_t *) arg)->uspace_entry;
+    uarg.uspace_stack = ((uspace_arg_t *) arg)->uspace_stack;
+    uarg.uspace_uarg = ((uspace_arg_t *) arg)->uspace_uarg;
+    uarg.uspace_thread_function = NULL;
+    uarg.uspace_thread_arg = NULL;
+    free((uspace_arg_t *) arg);
+    userspace(&uarg);
+}
+/** @}
+ */

 /tags/0.2.0.2/kernel/generic/src/main/version.c
 ,0 → 1,64
+/*
+ * Copyright (C) 2006 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup main
+ * @{
+ */
+/** @file
+ */
+#include <main/version.h>
+#include <print.h>
+char *project = "SPARTAN kernel";
+char *copyright = "Copyright (C) 2001-2006 HelenOS project";
+char *release = RELEASE;
+char *name = NAME;
+char *arch = ARCH;
+#ifdef REVISION
+    char *revision = ", revision " REVISION;
+#else
+    char *revision = "";
+#endif
+#ifdef TIMESTAMP
+    char *timestamp = " on " TIMESTAMP;
+#else
+    char *timestamp = "";
+#endif
+/** Print version information. */
+void version_print(void)
+{
+    printf("%s, release %s (%s)%s\nBuilt%s for %s\n%s\n", project, release, name, revision, timestamp, arch, copyright);
+}
+ /** @}
+ */

 /tags/0.2.0.2/kernel/generic/src/ddi/ddi.c
 ,0 → 1,208
+/*
+ * Copyright (C) 2006 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup genericddi
+ * @{
+ */
+/**
+ * @file
+ * @brief   Device Driver Interface functions.
+ *
+ * This file contains functions that comprise the Device Driver Interface.
+ * These are the functions for mapping physical memory and enabling I/O
+ * space to tasks.
+ */
+#include <ddi/ddi.h>
+#include <ddi/ddi_arg.h>
+#include <proc/task.h>
+#include <security/cap.h>
+#include <mm/frame.h>
+#include <mm/as.h>
+#include <synch/spinlock.h>
+#include <syscall/copy.h>
+#include <arch.h>
+#include <align.h>
+#include <errno.h>
+/** Map piece of physical memory into virtual address space of current task.
+ *
+ * @param pf Physical frame address of the starting frame.
+ * @param vp Virtual page address of the starting page.
+ * @param pages Number of pages to map.
+ * @param flags Address space area flags for the mapping.
+ *
+ * @return 0 on success, EPERM if the caller lacks capabilities to use this syscall,
+ *     ENOENT if there is no task matching the specified ID and ENOMEM if
+ *     there was a problem in creating address space area.
+ */
+static int ddi_physmem_map(__address pf, __address vp, count_t pages, int flags)
+{
+    ipl_t ipl;
+    cap_t caps;
+    mem_backend_data_t backend_data;
+    backend_data.base = pf;
+    backend_data.frames = pages;
+    /*
+     * Make sure the caller is authorised to make this syscall.
+     */
+    caps = cap_get(TASK);
+    if (!(caps & CAP_MEM_MANAGER))
+        return EPERM;
+    ipl = interrupts_disable();
+    spinlock_lock(&TASK->lock);
+    if (!as_area_create(TASK->as, flags, pages * PAGE_SIZE, vp, AS_AREA_ATTR_NONE,
+        &phys_backend, &backend_data)) {
+        /*
+         * The address space area could not have been created.
+         * We report it using ENOMEM.
+         */
+        spinlock_unlock(&TASK->lock);
+        interrupts_restore(ipl);
+        return ENOMEM;
+    }
+    /*
+     * Mapping is created on-demand during page fault.
+     */
+    spinlock_unlock(&TASK->lock);
+    interrupts_restore(ipl);
+    return 0;
+}
+/** Enable range of I/O space for task.
+ *
+ * @param id Task ID of the destination task.
+ * @param ioaddr Starting I/O address.
+ * @param size Size of the enabled I/O space..
+ *
+ * @return 0 on success, EPERM if the caller lacks capabilities to use this syscall,
+ *     ENOENT if there is no task matching the specified ID.
+ */
+static int ddi_iospace_enable(task_id_t id, __address ioaddr, size_t size)
+{
+    ipl_t ipl;
+    cap_t caps;
+    task_t *t;
+    int rc;
+    /*
+     * Make sure the caller is authorised to make this syscall.
+     */
+    caps = cap_get(TASK);
+    if (!(caps & CAP_IO_MANAGER))
+        return EPERM;
+    ipl = interrupts_disable();
+    spinlock_lock(&tasks_lock);
+    t = task_find_by_id(id);
+    if (!t) {
+        /*
+         * There is no task with the specified ID.
+         */
+        spinlock_unlock(&tasks_lock);
+        interrupts_restore(ipl);
+        return ENOENT;
+    }
+    /* Lock the task and release the lock protecting tasks_btree. */
+    spinlock_lock(&t->lock);
+    spinlock_unlock(&tasks_lock);
+    rc = ddi_iospace_enable_arch(t, ioaddr, size);
+    spinlock_unlock(&t->lock);
+    interrupts_restore(ipl);
+    return rc;
+}
+/** Wrapper for SYS_MAP_PHYSMEM syscall.
+ *
+ * @param phys_base Physical base address to map
+ * @param virt_base Destination virtual address
+ * @param pages Number of pages
+ * @param flags Flags of newly mapped pages
+ *
+ * @return 0 on success, otherwise it returns error code found in errno.h
+ */
+__native sys_physmem_map(__native phys_base, __native virt_base, __native pages,
+             __native flags)
+{
+    return (__native) ddi_physmem_map(ALIGN_DOWN((__address) phys_base, FRAME_SIZE),
+                      ALIGN_DOWN((__address) virt_base, PAGE_SIZE), (count_t) pages,
+                      (int) flags);
+}
+/** Wrapper for SYS_ENABLE_IOSPACE syscall.
+ *
+ * @param uspace_io_arg User space address of DDI argument structure.
+ *
+ * @return 0 on success, otherwise it returns error code found in errno.h
+ */
+__native sys_iospace_enable(ddi_ioarg_t *uspace_io_arg)
+{
+    ddi_ioarg_t arg;
+    int rc;
+    rc = copy_from_uspace(&arg, uspace_io_arg, sizeof(ddi_ioarg_t));
+    if (rc != 0)
+        return (__native) rc;
+    return (__native) ddi_iospace_enable((task_id_t) arg.task_id, (__address) arg.ioaddr, (size_t) arg.size);
+}
+/** Disable or enable preemption.
+ *
+ * @param enable If non-zero, the preemption counter will be decremented, leading to potential
+ *       enabling of preemption. Otherwise the preemption counter will be incremented,
+ *       preventing preemption from occurring.
+ *
+ * @return Zero on success or EPERM if callers capabilities are not sufficient.
+ */
+__native sys_preempt_control(int enable)
+{
+        if (! cap_get(TASK) & CAP_PREEMPT_CONTROL)
+                return EPERM;
+        if (enable)
+                preemption_enable();
+        else
+                preemption_disable();
+        return 0;
+}
+ /** @}
+ */

 /tags/0.2.0.2/kernel/generic/src/lib/func.c
 ,0 → 1,197
+/*
+ * Copyright (C) 2001-2004 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup generic
+ * @{
+ */
+/**
+ * @file
+ * @brief   Miscellaneous functions.
+ */
+#include <func.h>
+#include <print.h>
+#include <cpu.h>
+#include <arch/asm.h>
+#include <arch.h>
+#include <typedefs.h>
+#include <console/kconsole.h>
+atomic_t haltstate = {0}; /**< Halt flag */
+/** Halt wrapper
+ *
+ * Set halt flag and halt the cpu.
+ *
+ */
+void halt()
+{
+#ifdef CONFIG_DEBUG
+    bool rundebugger = false;
+//      TODO test_and_set not defined on all arches
+//  if (!test_and_set(&haltstate))
+    if (!atomic_get(&haltstate)) {
+        atomic_set(&haltstate, 1);
+        rundebugger = true;
+    }
+#else
+    atomic_set(&haltstate, 1);
+#endif
+    interrupts_disable();
+#ifdef CONFIG_DEBUG
+    if (rundebugger) {
+        printf("\n");
+        kconsole("panic"); /* Run kconsole as a last resort to user */
+    }
+#endif
+    if (CPU)
+        printf("cpu%d: halted\n", CPU->id);
+    else
+        printf("cpu: halted\n");
+    cpu_halt();
+}
+/** Return number of characters in a string.
+ *
+ * @param str NULL terminated string.
+ *
+ * @return Number of characters in str.
+ */
+size_t strlen(const char *str)
+{
+    int i;
+    for (i = 0; str[i]; i++)
+        ;
+    return i;
+}
+/** Compare two NULL terminated strings
+ *
+ * Do a char-by-char comparison of two NULL terminated strings.
+ * The strings are considered equal iff they consist of the same
+ * characters on the minimum of their lengths and specified maximal
+ * length.
+ *
+ * @param src First string to compare.
+ * @param dst Second string to compare.
+ * @param len Maximal length for comparison.
+ *
+ * @return 0 if the strings are equal, -1 if first is smaller, 1 if second smaller.
+ *
+ */
+int strncmp(const char *src, const char *dst, size_t len)
+{
+    int i;
+    i = 0;
+    for (;*src && *dst && i < len;src++,dst++,i++) {
+        if (*src < *dst)
+            return -1;
+        if (*src > *dst)
+            return 1;
+    }
+    if (i == len || *src == *dst)
+        return 0;
+    if (!*src)
+        return -1;
+    return 1;
+}
+/** Copy NULL terminated string.
+ *
+ * Copy at most 'len' characters from string 'src' to 'dest'.
+ * If 'src' is shorter than 'len', '\0' is inserted behind the
+ * last copied character.
+ *
+ * @param src Source string.
+ * @param dest Destination buffer.
+ * @param len Size of destination buffer.
+ */
+void strncpy(char *dest, const char *src, size_t len)
+{
+    int i;
+    for (i = 0; i < len; i++) {
+        if (!(dest[i] = src[i]))
+            return;
+    }
+    dest[i-1] = '\0';
+}
+/** Convert ascii representation to __native
+ *
+ * Supports 0x for hexa & 0 for octal notation.
+ * Does not check for overflows, does not support negative numbers
+ *
+ * @param text Textual representation of number
+ * @return Converted number or 0 if no valid number ofund
+ */
+__native atoi(const char *text)
+{
+    int base = 10;
+    __native result = 0;
+    if (text[0] == '0' && text[1] == 'x') {
+        base = 16;
+        text += 2;
+    } else if (text[0] == '0')
+        base = 8;
+    while (*text) {
+        if (base != 16 && \
+            ((*text >= 'A' && *text <= 'F' )
+             || (*text >='a' && *text <='f')))
+            break;
+        if (base == 8 && *text >='8')
+            break;
+        if (*text >= '0' && *text <= '9') {
+            result *= base;
+            result += *text - '0';
+        } else if (*text >= 'A' && *text <= 'F') {
+            result *= base;
+            result += *text - 'A' + 10;
+        } else if (*text >= 'a' && *text <= 'f') {
+            result *= base;
+            result += *text - 'a' + 10;
+        } else
+            break;
+        text++;
+    }
+    return result;
+}
+ /** @}
+ */

 /tags/0.2.0.2/kernel/generic/src/lib/elf.c
 ,0 → 1,226
+/*
+ * Copyright (C) 2006 Sergey Bondari
+ * Copyright (C) 2006 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup generic
+ * @{
+ */
+/**
+ * @file
+ * @brief   Kernel ELF loader.
+ */
+#include <elf.h>
+#include <debug.h>
+#include <arch/types.h>
+#include <typedefs.h>
+#include <mm/as.h>
+#include <mm/frame.h>
+#include <mm/slab.h>
+#include <align.h>
+#include <memstr.h>
+#include <macros.h>
+#include <arch.h>
+static char *error_codes[] = {
+    "no error",
+    "invalid image",
+    "address space error",
+    "incompatible image",
+    "unsupported image type",
+    "irrecoverable error"
+};
+static int segment_header(elf_segment_header_t *entry, elf_header_t *elf, as_t *as);
+static int section_header(elf_section_header_t *entry, elf_header_t *elf, as_t *as);
+static int load_segment(elf_segment_header_t *entry, elf_header_t *elf, as_t *as);
+/** ELF loader
+ *
+ * @param header Pointer to ELF header in memory
+ * @param as Created and properly mapped address space
+ * @return EE_OK on success
+ */
+int elf_load(elf_header_t *header, as_t * as)
+{
+    int i, rc;
+    /* Identify ELF */
+    if (header->e_ident[EI_MAG0] != ELFMAG0 || header->e_ident[EI_MAG1] != ELFMAG1 ||
+        header->e_ident[EI_MAG2] != ELFMAG2 || header->e_ident[EI_MAG3] != ELFMAG3) {
+        return EE_INVALID;
+    }
+    /* Identify ELF compatibility */
+    if (header->e_ident[EI_DATA] != ELF_DATA_ENCODING || header->e_machine != ELF_MACHINE ||
+        header->e_ident[EI_VERSION] != EV_CURRENT || header->e_version != EV_CURRENT ||
+        header->e_ident[EI_CLASS] != ELF_CLASS) {
+        return EE_INCOMPATIBLE;
+    }
+    if (header->e_phentsize != sizeof(elf_segment_header_t))
+        return EE_INCOMPATIBLE;
+    if (header->e_shentsize != sizeof(elf_section_header_t))
+        return EE_INCOMPATIBLE;
+    /* Check if the object type is supported. */
+    if (header->e_type != ET_EXEC)
+        return EE_UNSUPPORTED;
+    /* Walk through all segment headers and process them. */
+    for (i = 0; i < header->e_phnum; i++) {
+        rc = segment_header(&((elf_segment_header_t *)(((__u8 *) header) + header->e_phoff))[i], header, as);
+        if (rc != EE_OK)
+            return rc;
+    }
+    /* Inspect all section headers and proccess them. */
+    for (i = 0; i < header->e_shnum; i++) {
+        rc = section_header(&((elf_section_header_t *)(((__u8 *) header) + header->e_shoff))[i], header, as);
+        if (rc != EE_OK)
+            return rc;
+    }
+    return EE_OK;
+}
+/** Print error message according to error code.
+ *
+ * @param rc Return code returned by elf_load().
+ *
+ * @return NULL terminated description of error.
+ */
+char *elf_error(int rc)
+{
+    ASSERT(rc < sizeof(error_codes)/sizeof(char *));
+    return error_codes[rc];
+}
+/** Process segment header.
+ *
+ * @param entry Segment header.
+ * @param elf ELF header.
+ * @param as Address space into wich the ELF is being loaded.
+ *
+ * @return EE_OK on success, error code otherwise.
+ */
+static int segment_header(elf_segment_header_t *entry, elf_header_t *elf, as_t *as)
+{
+    switch (entry->p_type) {
+        case PT_NULL:
+        case PT_PHDR:
+        break;
+        case PT_LOAD:
+        return load_segment(entry, elf, as);
+        break;
+        case PT_DYNAMIC:
+        case PT_INTERP:
+        case PT_SHLIB:
+        case PT_NOTE:
+        case PT_LOPROC:
+        case PT_HIPROC:
+        default:
+        return EE_UNSUPPORTED;
+        break;
+    }
+    return EE_OK;
+}
+/** Load segment described by program header entry.
+ *
+ * @param entry Program header entry describing segment to be loaded.
+ * @param elf ELF header.
+ * @param as Address space into wich the ELF is being loaded.
+ *
+ * @return EE_OK on success, error code otherwise.
+ */
+int load_segment(elf_segment_header_t *entry, elf_header_t *elf, as_t *as)
+{
+    as_area_t *a;
+    int flags = 0;
+    mem_backend_data_t backend_data;
+    backend_data.elf = elf;
+    backend_data.segment = entry;
+    if (entry->p_align > 1) {
+        if ((entry->p_offset % entry->p_align) != (entry->p_vaddr % entry->p_align)) {
+            return EE_INVALID;
+        }
+    }
+    if (entry->p_flags & PF_X)
+        flags |= AS_AREA_EXEC;
+    if (entry->p_flags & PF_W)
+        flags |= AS_AREA_WRITE;
+    if (entry->p_flags & PF_R)
+        flags |= AS_AREA_READ;
+    flags |= AS_AREA_CACHEABLE;
+    /*
+     * Check if the virtual address starts on page boundary.
+     */
+    if (ALIGN_UP(entry->p_vaddr, PAGE_SIZE) != entry->p_vaddr)
+        return EE_UNSUPPORTED;
+    a = as_area_create(as, flags, entry->p_memsz, entry->p_vaddr, AS_AREA_ATTR_NONE,
+        &elf_backend, &backend_data);
+    if (!a)
+        return EE_MEMORY;
+    /*
+     * The segment will be mapped on demand by elf_page_fault().
+     */
+    return EE_OK;
+}
+/** Process section header.
+ *
+ * @param entry Segment header.
+ * @param elf ELF header.
+ * @param as Address space into wich the ELF is being loaded.
+ *
+ * @return EE_OK on success, error code otherwise.
+ */
+static int section_header(elf_section_header_t *entry, elf_header_t *elf, as_t *as)
+{
+    switch (entry->sh_type) {
+        default:
+        break;
+    }
+    return EE_OK;
+}
+ /** @}
+ */

 /tags/0.2.0.2/kernel/generic/src/lib/memstr.c
 ,0 → 1,120
+/*
+ * Copyright (C) 2001-2004 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup generic
+ * @{
+ */
+/**
+ * @file
+ * @brief   Memory string operations.
+ *
+ * This file provides architecture independent functions
+ * to manipulate blocks of memory. These functions
+ * are optimized as much as generic functions of
+ * this type can be. However, architectures are
+ * free to provide even more optimized versions of these
+ * functions.
+ */
+#include <memstr.h>
+#include <arch/types.h>
+#include <align.h>
+/** Copy block of memory
+ *
+ * Copy cnt bytes from src address to dst address.
+ * The copying is done word-by-word and then byte-by-byte.
+ * The source and destination memory areas cannot overlap.
+ *
+ * @param src Origin address to copy from.
+ * @param dst Origin address to copy to.
+ * @param cnt Number of bytes to copy.
+ *
+ */
+void *_memcpy(void * dst, const void *src, size_t cnt)
+{
+    int i, j;
+    if (ALIGN_UP((__address) src, sizeof(__native)) != (__address) src ||
+        ALIGN_UP((__address) dst, sizeof(__native)) != (__address) dst) {
+        for (i = 0; i < cnt; i++)
+            ((__u8 *) dst)[i] = ((__u8 *) src)[i];
+    } else {
+        for (i = 0; i < cnt/sizeof(__native); i++)
+            ((__native *) dst)[i] = ((__native *) src)[i];
+        for (j = 0; j < cnt%sizeof(__native); j++)
+            ((__u8 *)(((__native *) dst) + i))[j] = ((__u8 *)(((__native *) src) + i))[j];
+    }
+    return (char *)src;
+}
+/** Fill block of memory
+ *
+ * Fill cnt bytes at dst address with the value x.
+ * The filling is done byte-by-byte.
+ *
+ * @param dst Origin address to fill.
+ * @param cnt Number of bytes to fill.
+ * @param x   Value to fill.
+ *
+ */
+void _memsetb(__address dst, size_t cnt, __u8 x)
+{
+    int i;
+    __u8 *p = (__u8 *) dst;
+    for(i=0; i<cnt; i++)
+        p[i] = x;
+}
+/** Fill block of memory
+ *
+ * Fill cnt words at dst address with the value x.
+ * The filling is done word-by-word.
+ *
+ * @param dst Origin address to fill.
+ * @param cnt Number of words to fill.
+ * @param x   Value to fill.
+ *
+ */
+void _memsetw(__address dst, size_t cnt, __u16 x)
+{
+    int i;
+    __u16 *p = (__u16 *) dst;
+    for(i=0; i<cnt; i++)
+        p[i] = x;
+}
+ /** @}
+ */

 /tags/0.2.0.2/kernel/generic/src/lib/sort.c
 ,0 → 1,204
+/*
+ * Copyright (C) 2005 Sergey Bondari
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup generic
+ * @{
+ */
+/**
+ * @file
+ * @brief   Sorting functions.
+ *
+ * This files contains functions implementing several sorting
+ * algorithms (e.g. quick sort and bubble sort).
+ */
+#include <mm/slab.h>
+#include <memstr.h>
+#include <sort.h>
+#include <panic.h>
+#define EBUFSIZE    32
+void _qsort(void * data, count_t n, size_t e_size, int (* cmp) (void * a, void * b), void *tmp, void *pivot);
+void _bubblesort(void * data, count_t n, size_t e_size, int (* cmp) (void * a, void * b), void *slot);
+/** Quicksort wrapper
+ *
+ * This is only a wrapper that takes care of memory allocations for storing
+ * the pivot and temporary elements for generic quicksort algorithm.
+ *
+ * This function _can_ sleep
+ *
+ * @param data Pointer to data to be sorted.
+ * @param n Number of elements to be sorted.
+ * @param e_size Size of one element.
+ * @param cmp Comparator function.
+ *
+ */
+void qsort(void * data, count_t n, size_t e_size, int (* cmp) (void * a, void * b))
+{
+    __u8 buf_tmp[EBUFSIZE];
+    __u8 buf_pivot[EBUFSIZE];
+    void * tmp = buf_tmp;
+    void * pivot = buf_pivot;
+    if (e_size > EBUFSIZE) {
+        pivot = (void *) malloc(e_size, 0);
+        tmp = (void *) malloc(e_size, 0);
+    }
+    _qsort(data, n, e_size, cmp, tmp, pivot);
+    if (e_size > EBUFSIZE) {
+        free(tmp);
+        free(pivot);
+    }
+}
+/** Quicksort
+ *
+ * Apply generic quicksort algorithm on supplied data, using pre-allocated buffers.
+ *
+ * @param data Pointer to data to be sorted.
+ * @param n Number of elements to be sorted.
+ * @param e_size Size of one element.
+ * @param cmp Comparator function.
+ * @param tmp Pointer to scratch memory buffer e_size bytes long.
+ * @param pivot Pointer to scratch memory buffer e_size bytes long.
+ *
+ */
+void _qsort(void * data, count_t n, size_t e_size, int (* cmp) (void * a, void * b), void *tmp, void *pivot)
+{
+    if (n > 4) {
+        int i = 0, j = n - 1;
+        memcpy(pivot, data, e_size);
+        while (1) {
+            while ((cmp(data + i * e_size, pivot) < 0) && i < n) i++;
+            while ((cmp(data + j * e_size, pivot) >=0) && j > 0) j--;
+            if (i<j) {
+                memcpy(tmp, data + i * e_size, e_size);
+                memcpy(data + i * e_size, data + j * e_size, e_size);
+                memcpy(data + j * e_size, tmp, e_size);
+            } else {
+                break;
+            }
+        }
+        _qsort(data, j + 1, e_size, cmp, tmp, pivot);
+        _qsort(data + (j + 1) * e_size, n - j - 1, e_size, cmp, tmp, pivot);
+    } else {
+        _bubblesort(data, n, e_size, cmp, tmp);
+    }
+}
+/** Bubblesort wrapper
+ *
+ * This is only a wrapper that takes care of memory allocation for storing
+ * the slot element for generic bubblesort algorithm.
+ *
+ * @param data Pointer to data to be sorted.
+ * @param n Number of elements to be sorted.
+ * @param e_size Size of one element.
+ * @param cmp Comparator function.
+ *
+ */
+void bubblesort(void * data, count_t n, size_t e_size, int (* cmp) (void * a, void * b))
+{
+    __u8 buf_slot[EBUFSIZE];
+    void * slot = buf_slot;
+    if (e_size > EBUFSIZE) {
+        slot = (void *) malloc(e_size, 0);
+    }
+    _bubblesort(data, n, e_size, cmp, slot);
+    if (e_size > EBUFSIZE) {
+        free(slot);
+    }
+}
+/** Bubblesort
+ *
+ * Apply generic bubblesort algorithm on supplied data, using pre-allocated buffer.
+ *
+ * @param data Pointer to data to be sorted.
+ * @param n Number of elements to be sorted.
+ * @param e_size Size of one element.
+ * @param cmp Comparator function.
+ * @param slot Pointer to scratch memory buffer e_size bytes long.
+ *
+ */
+void _bubblesort(void * data, count_t n, size_t e_size, int (* cmp) (void * a, void * b), void *slot)
+{
+    bool done = false;
+    void * p;
+    while (!done) {
+        done = true;
+        for (p = data; p < data + e_size * (n - 1); p = p + e_size) {
+            if (cmp(p, p + e_size) == 1) {
+                memcpy(slot, p, e_size);
+                memcpy(p, p + e_size, e_size);
+                memcpy(p + e_size, slot, e_size);
+                done = false;
+            }
+        }
+    }
+}
+/*
+ * Comparator returns 1 if a > b, 0 if a == b, -1 if a < b
+ */
+int int_cmp(void * a, void * b)
+{
+    return (* (int *) a > * (int*)b) ? 1 : (*(int *)a < * (int *)b) ? -1 : 0;
+}
+int __u8_cmp(void * a, void * b)
+{
+    return (* (__u8 *) a > * (__u8 *)b) ? 1 : (*(__u8 *)a < * (__u8 *)b) ? -1 : 0;
+}
+int __u16_cmp(void * a, void * b)
+{
+    return (* (__u16 *) a > * (__u16 *)b) ? 1 : (*(__u16 *)a < * (__u16 *)b) ? -1 : 0;
+}
+int __u32_cmp(void * a, void * b)
+{
+    return (* (__u32 *) a > * (__u32 *)b) ? 1 : (*(__u32 *)a < * (__u32 *)b) ? -1 : 0;
+}
+ /** @}
+ */

 /tags/0.2.0.2/kernel/generic/src/adt/btree.c
 ,0 → 1,1003
+/*
+ * Copyright (C) 2006 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup genericadt
+ * @{
+ */
+/**
+ * @file
+ * @brief   B+tree implementation.
+ *
+ * This file implements B+tree type and operations.
+ *
+ * The B+tree has the following properties:
+ * @li it is a ballanced 3-4-5 tree (i.e. BTREE_M = 5)
+ * @li values (i.e. pointers to values) are stored only in leaves
+ * @li leaves are linked in a list
+ *
+ * Be carefull when using these trees. They need to allocate
+ * and deallocate memory for their index nodes and as such
+ * can sleep.
+ */
+#include <adt/btree.h>
+#include <adt/list.h>
+#include <mm/slab.h>
+#include <debug.h>
+#include <panic.h>
+#include <typedefs.h>
+#include <print.h>
+static void btree_destroy_subtree(btree_node_t *root);
+static void _btree_insert(btree_t *t, btree_key_t key, void *value, btree_node_t *rsubtree, btree_node_t *node);
+static void _btree_remove(btree_t *t, btree_key_t key, btree_node_t *node);
+static void node_initialize(btree_node_t *node);
+static void node_insert_key_and_lsubtree(btree_node_t *node, btree_key_t key, void *value, btree_node_t *lsubtree);
+static void node_insert_key_and_rsubtree(btree_node_t *node, btree_key_t key, void *value, btree_node_t *rsubtree);
+static void node_remove_key_and_lsubtree(btree_node_t *node, btree_key_t key);
+static void node_remove_key_and_rsubtree(btree_node_t *node, btree_key_t key);
+static btree_node_t *node_split(btree_node_t *node, btree_key_t key, void *value, btree_node_t *rsubtree, btree_key_t *median);
+static btree_node_t *node_combine(btree_node_t *node);
+static index_t find_key_by_subtree(btree_node_t *node, btree_node_t *subtree, bool right);
+static void rotate_from_right(btree_node_t *lnode, btree_node_t *rnode, index_t idx);
+static void rotate_from_left(btree_node_t *lnode, btree_node_t *rnode, index_t idx);
+static bool try_insert_by_rotation_to_left(btree_node_t *node, btree_key_t key, void *value, btree_node_t *rsubtree);
+static bool try_insert_by_rotation_to_right(btree_node_t *node, btree_key_t key, void *value, btree_node_t *rsubtree);
+static bool try_rotation_from_left(btree_node_t *rnode);
+static bool try_rotation_from_right(btree_node_t *lnode);
+#define ROOT_NODE(n)        (!(n)->parent)
+#define INDEX_NODE(n)       ((n)->subtree[0] != NULL)
+#define LEAF_NODE(n)        ((n)->subtree[0] == NULL)
+#define FILL_FACTOR     ((BTREE_M-1)/2)
+#define MEDIAN_LOW_INDEX(n) (((n)->keys-1)/2)
+#define MEDIAN_HIGH_INDEX(n)    ((n)->keys/2)
+#define MEDIAN_LOW(n)       ((n)->key[MEDIAN_LOW_INDEX((n))]);
+#define MEDIAN_HIGH(n)      ((n)->key[MEDIAN_HIGH_INDEX((n))]);
+static slab_cache_t *btree_node_slab;
+/** Initialize B-trees. */
+void btree_init(void)
+{
+    btree_node_slab = slab_cache_create("btree_node_slab", sizeof(btree_node_t), 0, NULL, NULL, SLAB_CACHE_MAGDEFERRED);
+}
+/** Create empty B-tree.
+ *
+ * @param t B-tree.
+ */
+void btree_create(btree_t *t)
+{
+    list_initialize(&t->leaf_head);
+    t->root = (btree_node_t *) slab_alloc(btree_node_slab, 0);
+    node_initialize(t->root);
+    list_append(&t->root->leaf_link, &t->leaf_head);
+}
+/** Destroy empty B-tree. */
+void btree_destroy(btree_t *t)
+{
+    btree_destroy_subtree(t->root);
+}
+/** Insert key-value pair into B-tree.
+ *
+ * @param t B-tree.
+ * @param key Key to be inserted.
+ * @param value Value to be inserted.
+ * @param leaf_node Leaf node where the insertion should begin.
+ */
+void btree_insert(btree_t *t, btree_key_t key, void *value, btree_node_t *leaf_node)
+{
+    btree_node_t *lnode;
+    ASSERT(value);
+    lnode = leaf_node;
+    if (!lnode) {
+        if (btree_search(t, key, &lnode)) {
+            panic("B-tree %p already contains key %d\n", t, key);
+        }
+    }
+    _btree_insert(t, key, value, NULL, lnode);
+}
+/** Destroy subtree rooted in a node.
+ *
+ * @param root Root of the subtree.
+ */
+void btree_destroy_subtree(btree_node_t *root)
+{
+    int i;
+    if (root->keys) {
+        for (i = 0; i < root->keys + 1; i++) {
+            if (root->subtree[i])
+                btree_destroy_subtree(root->subtree[i]);
+        }
+    }
+    slab_free(btree_node_slab, root);
+}
+/** Recursively insert into B-tree.
+ *
+ * @param t B-tree.
+ * @param key Key to be inserted.
+ * @param value Value to be inserted.
+ * @param rsubtree Right subtree of the inserted key.
+ * @param node Start inserting into this node.
+ */
+void _btree_insert(btree_t *t, btree_key_t key, void *value, btree_node_t *rsubtree, btree_node_t *node)
+{
+    if (node->keys < BTREE_MAX_KEYS) {
+        /*
+         * Node conatins enough space, the key can be stored immediately.
+         */
+        node_insert_key_and_rsubtree(node, key, value, rsubtree);
+    } else if (try_insert_by_rotation_to_left(node, key, value, rsubtree)) {
+        /*
+         * The key-value-rsubtree triplet has been inserted because
+         * some keys could have been moved to the left sibling.
+         */
+    } else if (try_insert_by_rotation_to_right(node, key, value, rsubtree)) {
+        /*
+         * The key-value-rsubtree triplet has been inserted because
+         * some keys could have been moved to the right sibling.
+         */
+    } else {
+        btree_node_t *rnode;
+        btree_key_t median;
+        /*
+         * Node is full and both siblings (if both exist) are full too.
+         * Split the node and insert the smallest key from the node containing
+         * bigger keys (i.e. the new node) into its parent.
+         */
+        rnode = node_split(node, key, value, rsubtree, &median);
+        if (LEAF_NODE(node)) {
+            list_prepend(&rnode->leaf_link, &node->leaf_link);
+        }
+        if (ROOT_NODE(node)) {
+            /*
+             * We split the root node. Create new root.
+             */
+            t->root = (btree_node_t *) slab_alloc(btree_node_slab, 0);
+            node->parent = t->root;
+            rnode->parent = t->root;
+            node_initialize(t->root);
+            /*
+             * Left-hand side subtree will be the old root (i.e. node).
+             * Right-hand side subtree will be rnode.
+             */
+            t->root->subtree[0] = node;
+            t->root->depth = node->depth + 1;
+        }
+        _btree_insert(t, median, NULL, rnode, node->parent);
+    }
+}
+/** Remove B-tree node.
+ *
+ * @param t B-tree.
+ * @param key Key to be removed from the B-tree along with its associated value.
+ * @param leaf_node If not NULL, pointer to the leaf node where the key is found.
+ */
+void btree_remove(btree_t *t, btree_key_t key, btree_node_t *leaf_node)
+{
+    btree_node_t *lnode;
+    lnode = leaf_node;
+    if (!lnode) {
+        if (!btree_search(t, key, &lnode)) {
+            panic("B-tree %p does not contain key %d\n", t, key);
+        }
+    }
+    _btree_remove(t, key, lnode);
+}
+/** Recursively remove B-tree node.
+ *
+ * @param t B-tree.
+ * @param key Key to be removed from the B-tree along with its associated value.
+ * @param node Node where the key being removed resides.
+ */
+void _btree_remove(btree_t *t, btree_key_t key, btree_node_t *node)
+{
+    if (ROOT_NODE(node)) {
+        if (node->keys == 1 && node->subtree[0]) {
+            /*
+             * Free the current root and set new root.
+             */
+            t->root = node->subtree[0];
+            t->root->parent = NULL;
+            slab_free(btree_node_slab, node);
+        } else {
+            /*
+             * Remove the key from the root node.
+             * Note that the right subtree is removed because when
+             * combining two nodes, the left-side sibling is preserved
+             * and the right-side sibling is freed.
+             */
+            node_remove_key_and_rsubtree(node, key);
+        }
+        return;
+    }
+    if (node->keys <= FILL_FACTOR) {
+        /*
+         * If the node is below the fill factor,
+         * try to borrow keys from left or right sibling.
+         */
+        if (!try_rotation_from_left(node))
+            try_rotation_from_right(node);
+    }
+    if (node->keys > FILL_FACTOR) {
+        int i;
+        /*
+         * The key can be immediatelly removed.
+         *
+         * Note that the right subtree is removed because when
+         * combining two nodes, the left-side sibling is preserved
+         * and the right-side sibling is freed.
+         */
+        node_remove_key_and_rsubtree(node, key);
+        for (i = 0; i < node->parent->keys; i++) {
+            if (node->parent->key[i] == key)
+                node->parent->key[i] = node->key[0];
+        }
+    } else {
+        index_t idx;
+        btree_node_t *rnode, *parent;
+        /*
+         * The node is below the fill factor as well as its left and right sibling.
+         * Resort to combining the node with one of its siblings.
+         * The node which is on the left is preserved and the node on the right is
+         * freed.
+         */
+        parent = node->parent;
+        node_remove_key_and_rsubtree(node, key);
+        rnode = node_combine(node);
+        if (LEAF_NODE(rnode))
+            list_remove(&rnode->leaf_link);
+        idx = find_key_by_subtree(parent, rnode, true);
+        ASSERT((int) idx != -1);
+        slab_free(btree_node_slab, rnode);
+        _btree_remove(t, parent->key[idx], parent);
+    }
+}
+/** Search key in a B-tree.
+ *
+ * @param t B-tree.
+ * @param key Key to be searched.
+ * @param leaf_node Address where to put pointer to visited leaf node.
+ *
+ * @return Pointer to value or NULL if there is no such key.
+ */
+void *btree_search(btree_t *t, btree_key_t key, btree_node_t **leaf_node)
+{
+    btree_node_t *cur, *next;
+    /*
+     * Iteratively descend to the leaf that can contain the searched key.
+     */
+    for (cur = t->root; cur; cur = next) {
+        /* Last iteration will set this with proper leaf node address. */
+        *leaf_node = cur;
+        /*
+         * The key can be in the leftmost subtree.
+         * Test it separately.
+         */
+        if (key < cur->key[0]) {
+            next = cur->subtree[0];
+            continue;
+        } else {
+            void *val;
+            int i;
+            /*
+             * Now if the key is smaller than cur->key[i]
+             * it can only mean that the value is in cur->subtree[i]
+             * or it is not in the tree at all.
+             */
+            for (i = 1; i < cur->keys; i++) {
+                if (key < cur->key[i]) {
+                    next = cur->subtree[i];
+                    val = cur->value[i - 1];
+                    if (LEAF_NODE(cur))
+                        return key == cur->key[i - 1] ? val : NULL;
+                    goto descend;
+                }
+            }
+            /*
+             * Last possibility is that the key is in the rightmost subtree.
+             */
+            next = cur->subtree[i];
+            val = cur->value[i - 1];
+            if (LEAF_NODE(cur))
+                return key == cur->key[i - 1] ? val : NULL;
+        }
+        descend:
+            ;
+    }
+    /*
+     * The key was not found in the *leaf_node and is smaller than any of its keys.
+     */
+    return NULL;
+}
+/** Return pointer to B-tree leaf node's left neighbour.
+ *
+ * @param t B-tree.
+ * @param node Node whose left neighbour will be returned.
+ *
+ * @return Left neighbour of the node or NULL if the node does not have the left neighbour.
+ */
+btree_node_t *btree_leaf_node_left_neighbour(btree_t *t, btree_node_t *node)
+{
+    ASSERT(LEAF_NODE(node));
+    if (node->leaf_link.prev != &t->leaf_head)
+        return list_get_instance(node->leaf_link.prev, btree_node_t, leaf_link);
+    else
+        return NULL;
+}
+/** Return pointer to B-tree leaf node's right neighbour.
+ *
+ * @param t B-tree.
+ * @param node Node whose right neighbour will be returned.
+ *
+ * @return Right neighbour of the node or NULL if the node does not have the right neighbour.
+ */
+btree_node_t *btree_leaf_node_right_neighbour(btree_t *t, btree_node_t *node)
+{
+    ASSERT(LEAF_NODE(node));
+    if (node->leaf_link.next != &t->leaf_head)
+        return list_get_instance(node->leaf_link.next, btree_node_t, leaf_link);
+    else
+        return NULL;
+}
+/** Initialize B-tree node.
+ *
+ * @param node B-tree node.
+ */
+void node_initialize(btree_node_t *node)
+{
+    int i;
+    node->keys = 0;
+    /* Clean also space for the extra key. */
+    for (i = 0; i < BTREE_MAX_KEYS + 1; i++) {
+        node->key[i] = 0;
+        node->value[i] = NULL;
+        node->subtree[i] = NULL;
+    }
+    node->subtree[i] = NULL;
+    node->parent = NULL;
+    link_initialize(&node->leaf_link);
+    link_initialize(&node->bfs_link);
+    node->depth = 0;
+}
+/** Insert key-value-lsubtree triplet into B-tree node.
+ *
+ * It is actually possible to have more keys than BTREE_MAX_KEYS.
+ * This feature is used during insert by right rotation.
+ *
+ * @param node B-tree node into wich the new key is to be inserted.
+ * @param key The key to be inserted.
+ * @param value Pointer to value to be inserted.
+ * @param lsubtree Pointer to the left subtree.
+ */
+void node_insert_key_and_lsubtree(btree_node_t *node, btree_key_t key, void *value, btree_node_t *lsubtree)
+{
+    int i;
+    for (i = 0; i < node->keys; i++) {
+        if (key < node->key[i]) {
+            int j;
+            for (j = node->keys; j > i; j--) {
+                node->key[j] = node->key[j - 1];
+                node->value[j] = node->value[j - 1];
+                node->subtree[j + 1] = node->subtree[j];
+            }
+            node->subtree[j + 1] = node->subtree[j];
+            break;
+        }
+    }
+    node->key[i] = key;
+    node->value[i] = value;
+    node->subtree[i] = lsubtree;
+    node->keys++;
+}
+/** Insert key-value-rsubtree triplet into B-tree node.
+ *
+ * It is actually possible to have more keys than BTREE_MAX_KEYS.
+ * This feature is used during splitting the node when the
+ * number of keys is BTREE_MAX_KEYS + 1. Insert by left rotation
+ * also makes use of this feature.
+ *
+ * @param node B-tree node into wich the new key is to be inserted.
+ * @param key The key to be inserted.
+ * @param value Pointer to value to be inserted.
+ * @param rsubtree Pointer to the right subtree.
+ */
+void node_insert_key_and_rsubtree(btree_node_t *node, btree_key_t key, void *value, btree_node_t *rsubtree)
+{
+    int i;
+    for (i = 0; i < node->keys; i++) {
+        if (key < node->key[i]) {
+            int j;
+            for (j = node->keys; j > i; j--) {
+                node->key[j] = node->key[j - 1];
+                node->value[j] = node->value[j - 1];
+                node->subtree[j + 1] = node->subtree[j];
+            }
+            break;
+        }
+    }
+    node->key[i] = key;
+    node->value[i] = value;
+    node->subtree[i + 1] = rsubtree;
+    node->keys++;
+}
+/** Remove key and its left subtree pointer from B-tree node.
+ *
+ * Remove the key and eliminate gaps in node->key array.
+ * Note that the value pointer and the left subtree pointer
+ * is removed from the node as well.
+ *
+ * @param node B-tree node.
+ * @param key Key to be removed.
+ */
+void node_remove_key_and_lsubtree(btree_node_t *node, btree_key_t key)
+{
+    int i, j;
+    for (i = 0; i < node->keys; i++) {
+        if (key == node->key[i]) {
+            for (j = i + 1; j < node->keys; j++) {
+                node->key[j - 1] = node->key[j];
+                node->value[j - 1] = node->value[j];
+                node->subtree[j - 1] = node->subtree[j];
+            }
+            node->subtree[j - 1] = node->subtree[j];
+            node->keys--;
+            return;
+        }
+    }
+    panic("node %p does not contain key %d\n", node, key);
+}
+/** Remove key and its right subtree pointer from B-tree node.
+ *
+ * Remove the key and eliminate gaps in node->key array.
+ * Note that the value pointer and the right subtree pointer
+ * is removed from the node as well.
+ *
+ * @param node B-tree node.
+ * @param key Key to be removed.
+ */
+void node_remove_key_and_rsubtree(btree_node_t *node, btree_key_t key)
+{
+    int i, j;
+    for (i = 0; i < node->keys; i++) {
+        if (key == node->key[i]) {
+            for (j = i + 1; j < node->keys; j++) {
+                node->key[j - 1] = node->key[j];
+                node->value[j - 1] = node->value[j];
+                node->subtree[j] = node->subtree[j + 1];
+            }
+            node->keys--;
+            return;
+        }
+    }
+    panic("node %p does not contain key %d\n", node, key);
+}
+/** Split full B-tree node and insert new key-value-right-subtree triplet.
+ *
+ * This function will split a node and return pointer to a newly created
+ * node containing keys greater than or equal to the greater of medians
+ * (or median) of the old keys and the newly added key. It will also write
+ * the median key to a memory address supplied by the caller.
+ *
+ * If the node being split is an index node, the median will not be
+ * included in the new node. If the node is a leaf node,
+ * the median will be copied there.
+ *
+ * @param node B-tree node wich is going to be split.
+ * @param key The key to be inserted.
+ * @param value Pointer to the value to be inserted.
+ * @param rsubtree Pointer to the right subtree of the key being added.
+ * @param median Address in memory, where the median key will be stored.
+ *
+ * @return Newly created right sibling of node.
+ */
+btree_node_t *node_split(btree_node_t *node, btree_key_t key, void *value, btree_node_t *rsubtree, btree_key_t *median)
+{
+    btree_node_t *rnode;
+    int i, j;
+    ASSERT(median);
+    ASSERT(node->keys == BTREE_MAX_KEYS);
+    /*
+     * Use the extra space to store the extra node.
+     */
+    node_insert_key_and_rsubtree(node, key, value, rsubtree);
+    /*
+     * Compute median of keys.
+     */
+    *median = MEDIAN_HIGH(node);
+    /*
+     * Allocate and initialize new right sibling.
+     */
+    rnode = (btree_node_t *) slab_alloc(btree_node_slab, 0);
+    node_initialize(rnode);
+    rnode->parent = node->parent;
+    rnode->depth = node->depth;
+    /*
+     * Copy big keys, values and subtree pointers to the new right sibling.
+     * If this is an index node, do not copy the median.
+     */
+    i = (int) INDEX_NODE(node);
+    for (i += MEDIAN_HIGH_INDEX(node), j = 0; i < node->keys; i++, j++) {
+        rnode->key[j] = node->key[i];
+        rnode->value[j] = node->value[i];
+        rnode->subtree[j] = node->subtree[i];
+        /*
+         * Fix parent links in subtrees.
+         */
+        if (rnode->subtree[j])
+            rnode->subtree[j]->parent = rnode;
+    }
+    rnode->subtree[j] = node->subtree[i];
+    if (rnode->subtree[j])
+        rnode->subtree[j]->parent = rnode;
+    rnode->keys = j;    /* Set number of keys of the new node. */
+    node->keys /= 2;    /* Shrink the old node. */
+    return rnode;
+}
+/** Combine node with any of its siblings.
+ *
+ * The siblings are required to be below the fill factor.
+ *
+ * @param node Node to combine with one of its siblings.
+ *
+ * @return Pointer to the rightmost of the two nodes.
+ */
+btree_node_t *node_combine(btree_node_t *node)
+{
+    index_t idx;
+    btree_node_t *rnode;
+    int i;
+    ASSERT(!ROOT_NODE(node));
+    idx = find_key_by_subtree(node->parent, node, false);
+    if (idx == node->parent->keys) {
+        /*
+         * Rightmost subtree of its parent, combine with the left sibling.
+         */
+        idx--;
+        rnode = node;
+        node = node->parent->subtree[idx];
+    } else {
+        rnode = node->parent->subtree[idx + 1];
+    }
+    /* Index nodes need to insert parent node key in between left and right node. */
+    if (INDEX_NODE(node))
+        node->key[node->keys++] = node->parent->key[idx];
+    /* Copy the key-value-subtree triplets from the right node. */
+    for (i = 0; i < rnode->keys; i++) {
+        node->key[node->keys + i] = rnode->key[i];
+        node->value[node->keys + i] = rnode->value[i];
+        if (INDEX_NODE(node)) {
+            node->subtree[node->keys + i] = rnode->subtree[i];
+            rnode->subtree[i]->parent = node;
+        }
+    }
+    if (INDEX_NODE(node)) {
+        node->subtree[node->keys + i] = rnode->subtree[i];
+        rnode->subtree[i]->parent = node;
+    }
+    node->keys += rnode->keys;
+    return rnode;
+}
+/** Find key by its left or right subtree.
+ *
+ * @param node B-tree node.
+ * @param subtree Left or right subtree of a key found in node.
+ * @param right If true, subtree is a right subtree. If false, subtree is a left subtree.
+ *
+ * @return Index of the key associated with the subtree.
+ */
+index_t find_key_by_subtree(btree_node_t *node, btree_node_t *subtree, bool right)
+{
+    int i;
+    for (i = 0; i < node->keys + 1; i++) {
+        if (subtree == node->subtree[i])
+            return i - (int) (right != false);
+    }
+    panic("node %p does not contain subtree %p\n", node, subtree);
+}
+/** Rotate one key-value-rsubtree triplet from the left sibling to the right sibling.
+ *
+ * The biggest key and its value and right subtree is rotated from the left node
+ * to the right. If the node is an index node, than the parent node key belonging to
+ * the left node takes part in the rotation.
+ *
+ * @param lnode Left sibling.
+ * @param rnode Right sibling.
+ * @param idx Index of the parent node key that is taking part in the rotation.
+ */
+void rotate_from_left(btree_node_t *lnode, btree_node_t *rnode, index_t idx)
+{
+    btree_key_t key;
+    key = lnode->key[lnode->keys - 1];
+    if (LEAF_NODE(lnode)) {
+        void *value;
+        value = lnode->value[lnode->keys - 1];
+        node_remove_key_and_rsubtree(lnode, key);
+        node_insert_key_and_lsubtree(rnode, key, value, NULL);
+        lnode->parent->key[idx] = key;
+    } else {
+        btree_node_t *rsubtree;
+        rsubtree = lnode->subtree[lnode->keys];
+        node_remove_key_and_rsubtree(lnode, key);
+        node_insert_key_and_lsubtree(rnode, lnode->parent->key[idx], NULL, rsubtree);
+        lnode->parent->key[idx] = key;
+        /* Fix parent link of the reconnected right subtree. */
+        rsubtree->parent = rnode;
+    }
+}
+/** Rotate one key-value-lsubtree triplet from the right sibling to the left sibling.
+ *
+ * The smallest key and its value and left subtree is rotated from the right node
+ * to the left. If the node is an index node, than the parent node key belonging to
+ * the right node takes part in the rotation.
+ *
+ * @param lnode Left sibling.
+ * @param rnode Right sibling.
+ * @param idx Index of the parent node key that is taking part in the rotation.
+ */
+void rotate_from_right(btree_node_t *lnode, btree_node_t *rnode, index_t idx)
+{
+    btree_key_t key;
+    key = rnode->key[0];
+    if (LEAF_NODE(rnode)) {
+        void *value;
+        value = rnode->value[0];
+        node_remove_key_and_lsubtree(rnode, key);
+        node_insert_key_and_rsubtree(lnode, key, value, NULL);
+        rnode->parent->key[idx] = rnode->key[0];
+    } else {
+        btree_node_t *lsubtree;
+        lsubtree = rnode->subtree[0];
+        node_remove_key_and_lsubtree(rnode, key);
+        node_insert_key_and_rsubtree(lnode, rnode->parent->key[idx], NULL, lsubtree);
+        rnode->parent->key[idx] = key;
+        /* Fix parent link of the reconnected left subtree. */
+        lsubtree->parent = lnode;
+    }
+}
+/** Insert key-value-rsubtree triplet and rotate the node to the left, if this operation can be done.
+ *
+ * Left sibling of the node (if it exists) is checked for free space.
+ * If there is free space, the key is inserted and the smallest key of
+ * the node is moved there. The index node which is the parent of both
+ * nodes is fixed.
+ *
+ * @param node B-tree node.
+ * @param inskey Key to be inserted.
+ * @param insvalue Value to be inserted.
+ * @param rsubtree Right subtree of inskey.
+ *
+ * @return True if the rotation was performed, false otherwise.
+ */
+bool try_insert_by_rotation_to_left(btree_node_t *node, btree_key_t inskey, void *insvalue, btree_node_t *rsubtree)
+{
+    index_t idx;
+    btree_node_t *lnode;
+    /*
+     * If this is root node, the rotation can not be done.
+     */
+    if (ROOT_NODE(node))
+        return false;
+    idx = find_key_by_subtree(node->parent, node, true);
+    if ((int) idx == -1) {
+        /*
+         * If this node is the leftmost subtree of its parent,
+         * the rotation can not be done.
+         */
+        return false;
+    }
+    lnode = node->parent->subtree[idx];
+    if (lnode->keys < BTREE_MAX_KEYS) {
+        /*
+         * The rotaion can be done. The left sibling has free space.
+         */
+        node_insert_key_and_rsubtree(node, inskey, insvalue, rsubtree);
+        rotate_from_right(lnode, node, idx);
+        return true;
+    }
+    return false;
+}
+/** Insert key-value-rsubtree triplet and rotate the node to the right, if this operation can be done.
+ *
+ * Right sibling of the node (if it exists) is checked for free space.
+ * If there is free space, the key is inserted and the biggest key of
+ * the node is moved there. The index node which is the parent of both
+ * nodes is fixed.
+ *
+ * @param node B-tree node.
+ * @param inskey Key to be inserted.
+ * @param insvalue Value to be inserted.
+ * @param rsubtree Right subtree of inskey.
+ *
+ * @return True if the rotation was performed, false otherwise.
+ */
+bool try_insert_by_rotation_to_right(btree_node_t *node, btree_key_t inskey, void *insvalue, btree_node_t *rsubtree)
+{
+    index_t idx;
+    btree_node_t *rnode;
+    /*
+     * If this is root node, the rotation can not be done.
+     */
+    if (ROOT_NODE(node))
+        return false;
+    idx = find_key_by_subtree(node->parent, node, false);
+    if (idx == node->parent->keys) {
+        /*
+         * If this node is the rightmost subtree of its parent,
+         * the rotation can not be done.
+         */
+        return false;
+    }
+    rnode = node->parent->subtree[idx + 1];
+    if (rnode->keys < BTREE_MAX_KEYS) {
+        /*
+         * The rotaion can be done. The right sibling has free space.
+         */
+        node_insert_key_and_rsubtree(node, inskey, insvalue, rsubtree);
+        rotate_from_left(node, rnode, idx);
+        return true;
+    }
+    return false;
+}
+/** Rotate in a key from the left sibling or from the index node, if this operation can be done.
+ *
+ * @param rnode Node into which to add key from its left sibling or from the index node.
+ *
+ * @return True if the rotation was performed, false otherwise.
+ */
+bool try_rotation_from_left(btree_node_t *rnode)
+{
+    index_t idx;
+    btree_node_t *lnode;
+    /*
+     * If this is root node, the rotation can not be done.
+     */
+    if (ROOT_NODE(rnode))
+        return false;
+    idx = find_key_by_subtree(rnode->parent, rnode, true);
+    if ((int) idx == -1) {
+        /*
+         * If this node is the leftmost subtree of its parent,
+         * the rotation can not be done.
+         */
+        return false;
+    }
+    lnode = rnode->parent->subtree[idx];
+    if (lnode->keys > FILL_FACTOR) {
+        rotate_from_left(lnode, rnode, idx);
+        return true;
+    }
+    return false;
+}
+/** Rotate in a key from the right sibling or from the index node, if this operation can be done.
+ *
+ * @param lnode Node into which to add key from its right sibling or from the index node.
+ *
+ * @return True if the rotation was performed, false otherwise.
+ */
+bool try_rotation_from_right(btree_node_t *lnode)
+{
+    index_t idx;
+    btree_node_t *rnode;
+    /*
+     * If this is root node, the rotation can not be done.
+     */
+    if (ROOT_NODE(lnode))
+        return false;
+    idx = find_key_by_subtree(lnode->parent, lnode, false);
+    if (idx == lnode->parent->keys) {
+        /*
+         * If this node is the rightmost subtree of its parent,
+         * the rotation can not be done.
+         */
+        return false;
+    }
+    rnode = lnode->parent->subtree[idx + 1];
+    if (rnode->keys > FILL_FACTOR) {
+        rotate_from_right(lnode, rnode, idx);
+        return true;
+    }
+    return false;
+}
+/** Print B-tree.
+ *
+ * @param t Print out B-tree.
+ */
+void btree_print(btree_t *t)
+{
+    int i, depth = t->root->depth;
+    link_t head, *cur;
+    printf("Printing B-tree:\n");
+    list_initialize(&head);
+    list_append(&t->root->bfs_link, &head);
+    /*
+     * Use BFS search to print out the tree.
+     * Levels are distinguished from one another by node->depth.
+     */
+    while (!list_empty(&head)) {
+        link_t *hlp;
+        btree_node_t *node;
+        hlp = head.next;
+        ASSERT(hlp != &head);
+        node = list_get_instance(hlp, btree_node_t, bfs_link);
+        list_remove(hlp);
+        ASSERT(node);
+        if (node->depth != depth) {
+            printf("\n");
+            depth = node->depth;
+        }
+        printf("(");
+        for (i = 0; i < node->keys; i++) {
+            printf("%lld%s", node->key[i], i < node->keys - 1 ? "," : "");
+            if (node->depth && node->subtree[i]) {
+                list_append(&node->subtree[i]->bfs_link, &head);
+            }
+        }
+        if (node->depth && node->subtree[i]) {
+            list_append(&node->subtree[i]->bfs_link, &head);
+        }
+        printf(")");
+    }
+    printf("\n");
+    printf("Printing list of leaves:\n");
+    for (cur = t->leaf_head.next; cur != &t->leaf_head; cur = cur->next) {
+        btree_node_t *node;
+        node = list_get_instance(cur, btree_node_t, leaf_link);
+        ASSERT(node);
+        printf("(");
+        for (i = 0; i < node->keys; i++)
+            printf("%lld%s", node->key[i], i < node->keys - 1 ? "," : "");
+        printf(")");
+    }
+    printf("\n");
+}
+ /** @}
+ */

 /tags/0.2.0.2/kernel/generic/src/adt/hash_table.c
 ,0 → 1,178
+/*
+ * Copyright (C) 2006 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup genericadt
+ * @{
+ */
+/**
+ * @file
+ * @brief   Implementation of generic chained hash table.
+ *
+ * This file contains implementation of generic chained hash table.
+ */
+#include <adt/hash_table.h>
+#include <adt/list.h>
+#include <typedefs.h>
+#include <arch/types.h>
+#include <debug.h>
+#include <mm/slab.h>
+#include <memstr.h>
+/** Create chained hash table.
+ *
+ * @param h Hash table structure. Will be initialized by this call.
+ * @param m Number of slots in the hash table.
+ * @param max_keys Maximal number of keys needed to identify an item.
+ * @param op Hash table operations structure.
+ */
+void hash_table_create(hash_table_t *h, count_t m, count_t max_keys, hash_table_operations_t *op)
+{
+    int i;
+    ASSERT(h);
+    ASSERT(op && op->hash && op->compare);
+    ASSERT(max_keys > 0);
+    h->entry = malloc(m * sizeof(link_t), 0);
+    if (!h->entry) {
+        panic("cannot allocate memory for hash table\n");
+    }
+    memsetb((__address) h->entry, m * sizeof(link_t), 0);
+    for (i = 0; i < m; i++)
+        list_initialize(&h->entry[i]);
+    h->entries = m;
+    h->max_keys = max_keys;
+    h->op = op;
+}
+/** Insert item into hash table.
+ *
+ * @param h Hash table.
+ * @param key Array of all keys necessary to compute hash index.
+ * @param item Item to be inserted into the hash table.
+ */
+void hash_table_insert(hash_table_t *h, __native key[], link_t *item)
+{
+    index_t chain;
+    ASSERT(item);
+    ASSERT(h && h->op && h->op->hash && h->op->compare);
+    chain = h->op->hash(key);
+    ASSERT(chain < h->entries);
+    list_append(item, &h->entry[chain]);
+}
+/** Search hash table for an item matching keys.
+ *
+ * @param h Hash table.
+ * @param key Array of all keys needed to compute hash index.
+ *
+ * @return Matching item on success, NULL if there is no such item.
+ */
+link_t *hash_table_find(hash_table_t *h, __native key[])
+{
+    link_t *cur;
+    index_t chain;
+    ASSERT(h && h->op && h->op->hash && h->op->compare);
+    chain = h->op->hash(key);
+    ASSERT(chain < h->entries);
+    for (cur = h->entry[chain].next; cur != &h->entry[chain]; cur = cur->next) {
+        if (h->op->compare(key, h->max_keys, cur)) {
+            /*
+             * The entry is there.
+             */
+            return cur;
+        }
+    }
+    return NULL;
+}
+/** Remove all matching items from hash table.
+ *
+ * For each removed item, h->remove_callback() is called.
+ *
+ * @param h Hash table.
+ * @param key Array of keys that will be compared against items of the hash table.
+ * @param keys Number of keys in the key array.
+ */
+void hash_table_remove(hash_table_t *h, __native key[], count_t keys)
+{
+    index_t chain;
+    link_t *cur;
+    ASSERT(h && h->op && h->op->hash && h->op->compare && h->op->remove_callback);
+    ASSERT(keys <= h->max_keys);
+    if (keys == h->max_keys) {
+        /*
+         * All keys are known, hash_table_find() can be used to find the entry.
+         */
+        cur = hash_table_find(h, key);
+        if (cur) {
+            list_remove(cur);
+            h->op->remove_callback(cur);
+        }
+        return;
+    }
+    /*
+     * Fewer keys were passed.
+     * Any partially matching entries are to be removed.
+     */
+    for (chain = 0; chain < h->entries; chain++) {
+        for (cur = h->entry[chain].next; cur != &h->entry[chain]; cur = cur->next) {
+            if (h->op->compare(key, keys, cur)) {
+                link_t *hlp;
+                hlp = cur;
+                cur = cur->prev;
+                list_remove(hlp);
+                h->op->remove_callback(hlp);
+                continue;
+            }
+        }
+    }
+}
+ /** @}
+ */

 /tags/0.2.0.2/kernel/generic/src/adt/bitmap.c
 ,0 → 1,190
+/*
+ * Copyright (C) 2006 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup genericadt
+ * @{
+ */
+/**
+ * @file
+ * @brief   Implementation of bitmap ADT.
+ *
+ * This file implements bitmap ADT and provides functions for
+ * setting and clearing ranges of bits.
+ */
+#include <adt/bitmap.h>
+#include <typedefs.h>
+#include <arch/types.h>
+#include <align.h>
+#include <debug.h>
+#include <macros.h>
+#define ALL_ONES    0xff
+#define ALL_ZEROES  0x00
+/** Initialize bitmap.
+ *
+ * No portion of the bitmap is set or cleared by this function.
+ *
+ * @param bitmap Bitmap structure.
+ * @param map Address of the memory used to hold the map.
+ * @param bits Number of bits stored in bitmap.
+ */
+void bitmap_initialize(bitmap_t *bitmap, __u8 *map, count_t bits)
+{
+    bitmap->map = map;
+    bitmap->bits = bits;
+}
+/** Set range of bits.
+ *
+ * @param bitmap Bitmap structure.
+ * @param start Starting bit.
+ * @param bits Number of bits to set.
+ */
+void bitmap_set_range(bitmap_t *bitmap, index_t start, count_t bits)
+{
+    index_t i=0;
+    index_t aligned_start;
+    count_t lub;        /* leading unaligned bits */
+    count_t amb;        /* aligned middle bits */
+    count_t tab;        /* trailing aligned bits */
+    ASSERT(start + bits <= bitmap->bits);
+    aligned_start = ALIGN_UP(start, 8);
+    lub = min(aligned_start - start, bits);
+    amb = bits > lub ? bits - lub : 0;
+    tab = amb % 8;
+    if ( start + bits < aligned_start ) {
+        /*
+        * Set bits in the middle of byte
+        */
+        bitmap->map[start / 8] |= ((1 << lub)-1) << (start&7);
+        return;
+    }
+    if (lub) {
+        /*
+         * Make sure to set any leading unaligned bits.
+         */
+        bitmap->map[start / 8] |= ~((1 << (8 - lub)) - 1);
+    }
+    for (i = 0; i < amb / 8; i++) {
+        /*
+         * The middle bits can be set byte by byte.
+         */
+        bitmap->map[aligned_start / 8 + i] = ALL_ONES;
+    }
+    if (tab) {
+        /*
+         * Make sure to set any trailing aligned bits.
+         */
+        bitmap->map[aligned_start / 8 + i] |= (1 << tab) - 1;
+    }
+}
+/** Clear range of bits.
+ *
+ * @param bitmap Bitmap structure.
+ * @param start Starting bit.
+ * @param bits Number of bits to clear.
+ */
+void bitmap_clear_range(bitmap_t *bitmap, index_t start, count_t bits)
+{
+    index_t i=0;
+    index_t aligned_start;
+    count_t lub;        /* leading unaligned bits */
+    count_t amb;        /* aligned middle bits */
+    count_t tab;        /* trailing aligned bits */
+    ASSERT(start + bits <= bitmap->bits);
+    aligned_start = ALIGN_UP(start, 8);
+    lub = min(aligned_start - start, bits);
+    amb = bits > lub ? bits - lub : 0;
+    tab = amb % 8;
+    if ( start + bits < aligned_start )
+    {
+        /*
+        * Set bits in the middle of byte
+        */
+        bitmap->map[start / 8] &= ~(((1 << lub)-1) << (start&7));
+        return;
+    }
+    if (lub) {
+        /*
+         * Make sure to clear any leading unaligned bits.
+         */
+        bitmap->map[start / 8] &= (1 << (8 - lub)) - 1;
+    }
+    for (i = 0; i < amb / 8; i++) {
+        /*
+         * The middle bits can be cleared byte by byte.
+         */
+        bitmap->map[aligned_start / 8 + i] = ALL_ZEROES;
+    }
+    if (tab) {
+        /*
+         * Make sure to clear any trailing aligned bits.
+         */
+        bitmap->map[aligned_start / 8 + i] &= ~((1 << tab) - 1);
+    }
+}
+/** Copy portion of one bitmap into another bitmap.
+ *
+ * @param dst Destination bitmap.
+ * @param src Source bitmap.
+ * @param bits Number of bits to copy.
+ */
+void bitmap_copy(bitmap_t *dst, bitmap_t *src, count_t bits)
+{
+    index_t i;
+    ASSERT(bits <= dst->bits);
+    ASSERT(bits <= src->bits);
+    for (i = 0; i < bits / 8; i++)
+        dst->map[i] = src->map[i];
+    if (bits % 8) {
+        bitmap_clear_range(dst, i * 8, bits % 8);
+        dst->map[i] |= src->map[i] & ((1 << (bits % 8)) - 1);
+    }
+}
+ /** @}
+ */

 /tags/0.2.0.2/kernel/generic/src/adt/list.c
 ,0 → 1,95
+/*
+ * Copyright (C) 2004 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup genericadt
+ * @{
+ */
+/**
+ * @file
+ * @brief   Functions completing doubly linked circular list implementaion.
+ *
+ * This file contains some of the functions implementing doubly linked circular lists.
+ * However, this ADT is mostly implemented in @ref list.h.
+ */
+#include <adt/list.h>
+/** Check for membership
+ *
+ * Check whether link is contained in the list head.
+ * The membership is defined as pointer equivalence.
+ *
+ * @param link Item to look for.
+ * @param head List to look in.
+ *
+ * @return true if link is contained in head, false otherwise.
+ *
+ */
+bool list_member(const link_t *link, const link_t *head)
+{
+    bool found = false;
+    link_t *hlp = head->next;
+    while (hlp != head) {
+        if (hlp == link) {
+            found = true;
+            break;
+        }
+        hlp = hlp->next;
+    }
+    return found;
+}
+/** Concatenate two lists
+ *
+ * Concatenate lists head1 and head2, producing a single
+ * list head1 containing items from both (in head1, head2
+ * order) and empty list head2.
+ *
+ * @param head1 First list and concatenated output
+ * @param head2 Second list and empty output.
+ *
+ */
+void list_concat(link_t *head1, link_t *head2)
+{
+    if (list_empty(head2))
+        return;
+    head2->next->prev = head1->prev;
+    head2->prev->next = head1;
+    head1->prev->next = head2->next;
+    head1->prev = head2->prev;
+    list_initialize(head2);
+}
+ /** @}
+ */

 /tags/0.2.0.2/kernel/generic/src/syscall/copy.c
 ,0 → 1,133
+/*
+ * Copyright (C) 2006 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup generic
+ * @{
+ */
+/**
+ * @file
+ * @brief   Copying between kernel and userspace.
+ *
+ * This file contains sanitized functions for copying data
+ * between kernel and userspace.
+ */
+#include <syscall/copy.h>
+#include <proc/thread.h>
+#include <mm/as.h>
+#include <macros.h>
+#include <arch.h>
+#include <errno.h>
+#include <typedefs.h>
+/** Copy data from userspace to kernel.
+ *
+ * Provisions are made to return value even after page fault.
+ *
+ * This function can be called only from syscall.
+ *
+ * @param dst Destination kernel address.
+ * @param uspace_src Source userspace address.
+ * @param size Size of the data to be copied.
+ *
+ * @return 0 on success or error code from @ref errno.h.
+ */
+int copy_from_uspace(void *dst, const void *uspace_src, size_t size)
+{
+    ipl_t ipl;
+    int rc;
+    ASSERT(THREAD);
+    ASSERT(!THREAD->in_copy_from_uspace);
+    if (!KERNEL_ADDRESS_SPACE_SHADOWED) {
+        if (overlaps((__address) uspace_src, size,
+            KERNEL_ADDRESS_SPACE_START, KERNEL_ADDRESS_SPACE_END-KERNEL_ADDRESS_SPACE_START)) {
+            /*
+             * The userspace source block conflicts with kernel address space.
+             */
+            return EPERM;
+        }
+    }
+    ipl = interrupts_disable();
+    THREAD->in_copy_from_uspace = true;
+    rc = memcpy_from_uspace(dst, uspace_src, size);
+    THREAD->in_copy_from_uspace = false;
+    interrupts_restore(ipl);
+    return !rc ? EPERM : 0;
+}
+/** Copy data from kernel to userspace.
+ *
+ * Provisions are made to return value even after page fault.
+ *
+ * This function can be called only from syscall.
+ *
+ * @param uspace_dst Destination userspace address.
+ * @param src Source kernel address.
+ * @param size Size of the data to be copied.
+ *
+ * @return 0 on success or error code from @ref errno.h.
+ */
+int copy_to_uspace(void *uspace_dst, const void *src, size_t size)
+{
+    ipl_t ipl;
+    int rc;
+    ASSERT(THREAD);
+    ASSERT(!THREAD->in_copy_from_uspace);
+    if (!KERNEL_ADDRESS_SPACE_SHADOWED) {
+        if (overlaps((__address) uspace_dst, size,
+            KERNEL_ADDRESS_SPACE_START, KERNEL_ADDRESS_SPACE_END-KERNEL_ADDRESS_SPACE_START)) {
+            /*
+             * The userspace destination block conflicts with kernel address space.
+             */
+            return EPERM;
+        }
+    }
+    ipl = interrupts_disable();
+    THREAD->in_copy_from_uspace = true;
+    rc = memcpy_to_uspace(uspace_dst, src, size);
+    THREAD->in_copy_from_uspace = false;
+    interrupts_restore(ipl);
+    return !rc ? EPERM : 0;
+}
+ /** @}
+ */

 /tags/0.2.0.2/kernel/generic/src/syscall/syscall.c
 ,0 → 1,164
+/*
+ * Copyright (C) 2005 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup generic
+ * @{
+ */
+/**
+ * @file
+ * @brief   Syscall table and syscall wrappers.
+ */
+#include <syscall/syscall.h>
+#include <proc/thread.h>
+#include <proc/task.h>
+#include <mm/as.h>
+#include <print.h>
+#include <putchar.h>
+#include <errno.h>
+#include <arch.h>
+#include <debug.h>
+#include <ipc/sysipc.h>
+#include <synch/futex.h>
+#include <ddi/ddi.h>
+#include <security/cap.h>
+#include <syscall/copy.h>
+#include <sysinfo/sysinfo.h>
+#include <console/console.h>
+#include <console/klog.h>
+/** Print using kernel facility
+ *
+ * Some simulators can print only through kernel. Userspace can use
+ * this syscall to facilitate it.
+ */
+static __native sys_io(int fd, const void * buf, size_t count)
+{
+    size_t i;
+    char *data;
+    int rc;
+    if (count > PAGE_SIZE)
+        return ELIMIT;
+    data = malloc(count, 0);
+    if (!data)
+        return ENOMEM;
+    rc = copy_from_uspace(data, buf, count);
+    if (rc) {
+        free(data);
+        return rc;
+    }
+    for (i = 0; i < count; i++)
+        putchar(data[i]);
+    free(data);
+    return count;
+}
+/** Tell kernel to get keyboard/console access again */
+static __native sys_debug_enable_console(void)
+{
+    arch_grab_console();
+    return 0;
+}
+/** Dispatch system call */
+__native syscall_handler(__native a1, __native a2, __native a3,
+             __native a4, __native id)
+{
+    __native rc;
+    if (id < SYSCALL_END)
+        rc = syscall_table[id](a1,a2,a3,a4);
+    else {
+        klog_printf("TASK %lld: Unknown syscall id %d",TASK->taskid,id);
+        task_kill(TASK->taskid);
+        thread_exit();
+    }
+    if (THREAD->interrupted)
+        thread_exit();
+    return rc;
+}
+syshandler_t syscall_table[SYSCALL_END] = {
+    sys_io,
+    sys_tls_set,
+    /* Thread and task related syscalls. */
+    sys_thread_create,
+    sys_thread_exit,
+    sys_task_get_id,
+    /* Synchronization related syscalls. */
+    sys_futex_sleep_timeout,
+    sys_futex_wakeup,
+    /* Address space related syscalls. */
+    sys_as_area_create,
+    sys_as_area_resize,
+    sys_as_area_destroy,
+    /* IPC related syscalls. */
+    sys_ipc_call_sync_fast,
+    sys_ipc_call_sync,
+    sys_ipc_call_async_fast,
+    sys_ipc_call_async,
+    sys_ipc_answer_fast,
+    sys_ipc_answer,
+    sys_ipc_forward_fast,
+    sys_ipc_wait_for_call,
+    sys_ipc_hangup,
+    sys_ipc_register_irq,
+    sys_ipc_unregister_irq,
+    /* Capabilities related syscalls. */
+    sys_cap_grant,
+    sys_cap_revoke,
+    /* DDI related syscalls. */
+    sys_physmem_map,
+    sys_iospace_enable,
+    sys_preempt_control,
+    /* Sysinfo syscalls */
+    sys_sysinfo_valid,
+    sys_sysinfo_value,
+    /* Debug calls */
+    sys_debug_enable_console
+};
+ /** @}
+ */

 /tags/0.2.0.2/kernel/generic/src/synch/condvar.c
 ,0 → 1,109
+/*
+ * Copyright (C) 2001-2004 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup sync
+ * @{
+ */
+/**
+ * @file
+ * @brief   Condition variables.
+ */
+#include <synch/condvar.h>
+#include <synch/mutex.h>
+#include <synch/waitq.h>
+#include <synch/synch.h>
+#include <arch.h>
+#include <typedefs.h>
+/** Initialize condition variable.
+ *
+ * @param cv Condition variable.
+ */
+void condvar_initialize(condvar_t *cv)
+{
+    waitq_initialize(&cv->wq);
+}
+/**
+ * Signal the condition has become true
+ * to the first waiting thread by waking it up.
+ *
+ * @param cv Condition variable.
+ */
+void condvar_signal(condvar_t *cv)
+{
+    waitq_wakeup(&cv->wq, WAKEUP_FIRST);
+}
+/**
+ * Signal the condition has become true
+ * to all waiting threads by waking them up.
+ *
+ * @param cv Condition variable.
+ */
+void condvar_broadcast(condvar_t *cv)
+{
+    waitq_wakeup(&cv->wq, WAKEUP_ALL);
+}
+/** Wait for the condition becoming true.
+ *
+ * @param cv Condition variable.
+ * @param mtx Mutex.
+ * @param usec Timeout value in microseconds.
+ * @param flags Select mode of operation.
+ *
+ * For exact description of meaning of possible combinations
+ * of usec and flags, see comment for waitq_sleep_timeout().
+ * Note that when SYNCH_FLAGS_NON_BLOCKING is specified here,
+ * ESYNCH_WOULD_BLOCK is always returned.
+ *
+ * @return See comment for waitq_sleep_timeout().
+ */
+int _condvar_wait_timeout(condvar_t *cv, mutex_t *mtx, __u32 usec, int flags)
+{
+    int rc;
+    ipl_t ipl;
+    ipl = waitq_sleep_prepare(&cv->wq);
+    mutex_unlock(mtx);
+    cv->wq.missed_wakeups = 0;  /* Enforce blocking. */
+    rc = waitq_sleep_timeout_unsafe(&cv->wq, usec, flags);
+    mutex_lock(mtx);
+    waitq_sleep_finish(&cv->wq, rc, ipl);
+    return rc;
+}
+ /** @}
+ */

 /tags/0.2.0.2/kernel/generic/src/synch/rwlock.c
 ,0 → 1,389
+/*
+ * Copyright (C) 2001-2004 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup sync
+ * @{
+ */
+/**
+ * @file
+ * @brief   Reader/Writer locks.
+ *
+ * A reader/writer lock can be held by multiple readers at a time.
+ * Or it can be exclusively held by a sole writer at a time.
+ *
+ * These locks are not recursive.
+ * Because technique called direct hand-off is used, neither readers
+ * nor writers will suffer starvation.
+ *
+ * If there is a writer followed by a reader waiting for the rwlock
+ * and the writer times out, all leading readers are automatically woken up
+ * and allowed in.
+ */
+/*
+ * NOTE ON rwlock_holder_type
+ * This field is set on an attempt to acquire the exclusive mutex
+ * to the respective value depending whether the caller is a reader
+ * or a writer. The field is examined only if the thread had been
+ * previously blocked on the exclusive mutex. Thus it is save
+ * to store the rwlock type in the thread structure, because
+ * each thread can block on only one rwlock at a time.
+ */
+#include <synch/rwlock.h>
+#include <synch/spinlock.h>
+#include <synch/mutex.h>
+#include <synch/waitq.h>
+#include <synch/synch.h>
+#include <adt/list.h>
+#include <typedefs.h>
+#include <arch/asm.h>
+#include <arch.h>
+#include <proc/thread.h>
+#include <panic.h>
+#define ALLOW_ALL       0
+#define ALLOW_READERS_ONLY  1
+static void let_others_in(rwlock_t *rwl, int readers_only);
+static void release_spinlock(void *arg);
+/** Initialize reader/writer lock
+ *
+ * Initialize reader/writer lock.
+ *
+ * @param rwl Reader/Writer lock.
+ */
+void rwlock_initialize(rwlock_t *rwl) {
+    spinlock_initialize(&rwl->lock, "rwlock_t");
+    mutex_initialize(&rwl->exclusive);
+    rwl->readers_in = 0;
+}
+/** Acquire reader/writer lock for reading
+ *
+ * Acquire reader/writer lock for reading.
+ * Timeout and willingness to block may be specified.
+ *
+ * @param rwl Reader/Writer lock.
+ * @param usec Timeout in microseconds.
+ * @param flags Specify mode of operation.
+ *
+ * For exact description of possible combinations of
+ * usec and flags, see comment for waitq_sleep_timeout().
+ *
+ * @return See comment for waitq_sleep_timeout().
+ */
+int _rwlock_write_lock_timeout(rwlock_t *rwl, __u32 usec, int flags)
+{
+    ipl_t ipl;
+    int rc;
+    ipl = interrupts_disable();
+    spinlock_lock(&THREAD->lock);
+    THREAD->rwlock_holder_type = RWLOCK_WRITER;
+    spinlock_unlock(&THREAD->lock);
+    interrupts_restore(ipl);
+    /*
+     * Writers take the easy part.
+     * They just need to acquire the exclusive mutex.
+     */
+    rc = _mutex_lock_timeout(&rwl->exclusive, usec, flags);
+    if (SYNCH_FAILED(rc)) {
+        /*
+         * Lock operation timed out or was interrupted.
+         * The state of rwl is UNKNOWN at this point.
+         * No claims about its holder can be made.
+         */
+        ipl = interrupts_disable();
+        spinlock_lock(&rwl->lock);
+        /*
+         * Now when rwl is locked, we can inspect it again.
+         * If it is held by some readers already, we can let
+         * readers from the head of the wait queue in.
+         */
+        if (rwl->readers_in)
+            let_others_in(rwl, ALLOW_READERS_ONLY);
+        spinlock_unlock(&rwl->lock);
+        interrupts_restore(ipl);
+    }
+    return rc;
+}
+/** Acquire reader/writer lock for writing
+ *
+ * Acquire reader/writer lock for writing.
+ * Timeout and willingness to block may be specified.
+ *
+ * @param rwl Reader/Writer lock.
+ * @param usec Timeout in microseconds.
+ * @param flags Select mode of operation.
+ *
+ * For exact description of possible combinations of
+ * usec and flags, see comment for waitq_sleep_timeout().
+ *
+ * @return See comment for waitq_sleep_timeout().
+ */
+int _rwlock_read_lock_timeout(rwlock_t *rwl, __u32 usec, int flags)
+{
+    int rc;
+    ipl_t ipl;
+    ipl = interrupts_disable();
+    spinlock_lock(&THREAD->lock);
+    THREAD->rwlock_holder_type = RWLOCK_READER;
+    spinlock_unlock(&THREAD->lock);
+    spinlock_lock(&rwl->lock);
+    /*
+     * Find out whether we can get what we want without blocking.
+     */
+    rc = mutex_trylock(&rwl->exclusive);
+    if (SYNCH_FAILED(rc)) {
+        /*
+         * 'exclusive' mutex is being held by someone else.
+         * If the holder is a reader and there is no one
+         * else waiting for it, we can enter the critical
+         * section.
+         */
+        if (rwl->readers_in) {
+            spinlock_lock(&rwl->exclusive.sem.wq.lock);
+            if (list_empty(&rwl->exclusive.sem.wq.head)) {
+                /*
+                 * We can enter.
+                 */
+                spinlock_unlock(&rwl->exclusive.sem.wq.lock);
+                goto shortcut;
+            }
+            spinlock_unlock(&rwl->exclusive.sem.wq.lock);
+        }
+        /*
+         * In order to prevent a race condition when a reader
+         * could block another reader at the head of the waitq,
+         * we register a function to unlock rwl->lock
+         * after this thread is put asleep.
+         */
+        #ifdef CONFIG_SMP
+        thread_register_call_me(release_spinlock, &rwl->lock);
+        #else
+        thread_register_call_me(release_spinlock, NULL);
+        #endif
+        rc = _mutex_lock_timeout(&rwl->exclusive, usec, flags);
+        switch (rc) {
+            case ESYNCH_WOULD_BLOCK:
+                /*
+                 * release_spinlock() wasn't called
+                 */
+                thread_register_call_me(NULL, NULL);
+                spinlock_unlock(&rwl->lock);
+            case ESYNCH_TIMEOUT:
+            case ESYNCH_INTERRUPTED:
+                /*
+                 * The sleep timed out.
+                 * We just restore interrupt priority level.
+                 */
+            case ESYNCH_OK_BLOCKED:
+                /*
+                 * We were woken with rwl->readers_in already incremented.
+                 * Note that this arrangement avoids race condition between
+                 * two concurrent readers. (Race is avoided if 'exclusive' is
+                 * locked at the same time as 'readers_in' is incremented.
+                 * Same time means both events happen atomically when
+                 * rwl->lock is held.)
+                 */
+                interrupts_restore(ipl);
+                break;
+            case ESYNCH_OK_ATOMIC:
+                panic("_mutex_lock_timeout()==ESYNCH_OK_ATOMIC\n");
+                break;
+            default:
+                panic("invalid ESYNCH\n");
+                break;
+        }
+        return rc;
+    }
+shortcut:
+    /*
+     * We can increment readers_in only if we didn't go to sleep.
+     * For sleepers, rwlock_let_others_in() will do the job.
+     */
+    rwl->readers_in++;
+    spinlock_unlock(&rwl->lock);
+    interrupts_restore(ipl);
+    return ESYNCH_OK_ATOMIC;
+}
+/** Release reader/writer lock held by writer
+ *
+ * Release reader/writer lock held by writer.
+ * Handoff reader/writer lock ownership directly
+ * to waiting readers or a writer.
+ *
+ * @param rwl Reader/Writer lock.
+ */
+void rwlock_write_unlock(rwlock_t *rwl)
+{
+    ipl_t ipl;
+    ipl = interrupts_disable();
+    spinlock_lock(&rwl->lock);
+    let_others_in(rwl, ALLOW_ALL);
+    spinlock_unlock(&rwl->lock);
+    interrupts_restore(ipl);
+}
+/** Release reader/writer lock held by reader
+ *
+ * Release reader/writer lock held by reader.
+ * Handoff reader/writer lock ownership directly
+ * to a waiting writer or don't do anything if more
+ * readers poses the lock.
+ *
+ * @param rwl Reader/Writer lock.
+ */
+void rwlock_read_unlock(rwlock_t *rwl)
+{
+    ipl_t ipl;
+    ipl = interrupts_disable();
+    spinlock_lock(&rwl->lock);
+    if (!--rwl->readers_in)
+        let_others_in(rwl, ALLOW_ALL);
+    spinlock_unlock(&rwl->lock);
+    interrupts_restore(ipl);
+}
+/** Direct handoff of reader/writer lock ownership.
+ *
+ * Direct handoff of reader/writer lock ownership
+ * to waiting readers or a writer.
+ *
+ * Must be called with rwl->lock locked.
+ * Must be called with interrupts_disable()'d.
+ *
+ * @param rwl Reader/Writer lock.
+ * @param readers_only See the description below.
+ *
+ * If readers_only is false: (unlock scenario)
+ * Let the first sleeper on 'exclusive' mutex in, no matter
+ * whether it is a reader or a writer. If there are more leading
+ * readers in line, let each of them in.
+ *
+ * Otherwise: (timeout scenario)
+ * Let all leading readers in.
+ */
+void let_others_in(rwlock_t *rwl, int readers_only)
+{
+    rwlock_type_t type = RWLOCK_NONE;
+    thread_t *t = NULL;
+    bool one_more = true;
+    spinlock_lock(&rwl->exclusive.sem.wq.lock);
+    if (!list_empty(&rwl->exclusive.sem.wq.head))
+        t = list_get_instance(rwl->exclusive.sem.wq.head.next, thread_t, wq_link);
+    do {
+        if (t) {
+            spinlock_lock(&t->lock);
+            type = t->rwlock_holder_type;
+            spinlock_unlock(&t->lock);
+        }
+        /*
+         * If readers_only is true, we wake all leading readers
+         * if and only if rwl is locked by another reader.
+         * Assumption: readers_only ==> rwl->readers_in
+         */
+        if (readers_only && (type != RWLOCK_READER))
+            break;
+        if (type == RWLOCK_READER) {
+            /*
+             * Waking up a reader.
+             * We are responsible for incrementing rwl->readers_in for it.
+             */
+             rwl->readers_in++;
+        }
+        /*
+         * Only the last iteration through this loop can increment
+         * rwl->exclusive.sem.wq.missed_wakeup's. All preceeding
+         * iterations will wake up a thread.
+         */
+        /* We call the internal version of waitq_wakeup, which
+         * relies on the fact that the waitq is already locked.
+         */
+        _waitq_wakeup_unsafe(&rwl->exclusive.sem.wq, WAKEUP_FIRST);
+        t = NULL;
+        if (!list_empty(&rwl->exclusive.sem.wq.head)) {
+            t = list_get_instance(rwl->exclusive.sem.wq.head.next, thread_t, wq_link);
+            if (t) {
+                spinlock_lock(&t->lock);
+                if (t->rwlock_holder_type != RWLOCK_READER)
+                    one_more = false;
+                spinlock_unlock(&t->lock);
+            }
+        }
+    } while ((type == RWLOCK_READER) && t && one_more);
+    spinlock_unlock(&rwl->exclusive.sem.wq.lock);
+}
+/** Release spinlock callback
+ *
+ * This is a callback function invoked from the scheduler.
+ * The callback is registered in _rwlock_read_lock_timeout().
+ *
+ * @param arg Spinlock.
+ */
+void release_spinlock(void *arg)
+{
+    spinlock_unlock((spinlock_t *) arg);
+}
+ /** @}
+ */

 /tags/0.2.0.2/kernel/generic/src/synch/mutex.c
 ,0 → 1,86
+/*
+ * Copyright (C) 2001-2004 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup sync
+ * @{
+ */
+/**
+ * @file
+ * @brief   Mutexes.
+ */
+#include <synch/mutex.h>
+#include <synch/semaphore.h>
+#include <synch/synch.h>
+/** Initialize mutex
+ *
+ * Initialize mutex.
+ *
+ * @param mtx Mutex.
+ */
+void mutex_initialize(mutex_t *mtx)
+{
+    semaphore_initialize(&mtx->sem, 1);
+}
+/** Acquire mutex
+ *
+ * Acquire mutex.
+ * Timeout mode and non-blocking mode can be requested.
+ *
+ * @param mtx Mutex.
+ * @param usec Timeout in microseconds.
+ * @param flags Specify mode of operation.
+ *
+ * For exact description of possible combinations of
+ * usec and flags, see comment for waitq_sleep_timeout().
+ *
+ * @return See comment for waitq_sleep_timeout().
+ */
+int _mutex_lock_timeout(mutex_t *mtx, __u32 usec, int flags)
+{
+    return _semaphore_down_timeout(&mtx->sem, usec, flags);
+}
+/** Release mutex
+ *
+ * Release mutex.
+ *
+ * @param mtx Mutex.
+ */
+void mutex_unlock(mutex_t *mtx)
+{
+    semaphore_up(&mtx->sem);
+}
+ /** @}
+ */

 /tags/0.2.0.2/kernel/generic/src/synch/spinlock.c
 ,0 → 1,163
+/*
+ * Copyright (C) 2001-2004 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup sync
+ * @{
+ */
+/**
+ * @file
+ * @brief   Spinlocks.
+ */
+#include <synch/spinlock.h>
+#include <atomic.h>
+#include <arch/barrier.h>
+#include <arch.h>
+#include <preemption.h>
+#include <print.h>
+#include <debug.h>
+#include <symtab.h>
+#ifdef CONFIG_FB
+#include <genarch/fb/fb.h>
+#endif
+#ifdef CONFIG_SMP
+/** Initialize spinlock
+ *
+ * Initialize spinlock.
+ *
+ * @param sl Pointer to spinlock_t structure.
+ */
+void spinlock_initialize(spinlock_t *sl, char *name)
+{
+    atomic_set(&sl->val, 0);
+#ifdef CONFIG_DEBUG_SPINLOCK
+    sl->name = name;
+#endif
+}
+/** Lock spinlock
+ *
+ * Lock spinlock.
+ * This version has limitted ability to report
+ * possible occurence of deadlock.
+ *
+ * @param sl Pointer to spinlock_t structure.
+ */
+#ifdef CONFIG_DEBUG_SPINLOCK
+#define DEADLOCK_THRESHOLD  100000000
+void spinlock_lock_debug(spinlock_t *sl)
+{
+    count_t i = 0;
+    char *symbol;
+    bool deadlock_reported = false;
+    preemption_disable();
+    while (test_and_set(&sl->val)) {
+        /*
+         * We need to be careful about printflock and fb_lock.
+         * Both of them are used to report deadlocks via
+         * printf() and fb_putchar().
+         *
+         * We trust our code that there is no possible deadlock
+         * caused by these two locks (except when an exception
+         * is triggered for instance by printf() or fb_putchar()).
+         * However, we encountered false positives caused by very
+         * slow VESA framebuffer interaction (especially when
+         * run in a simulator) that caused problems with both
+         * printflock and fb_lock.
+         *
+         * Possible deadlocks on both printflock and fb_lock
+         * are therefore not reported as they would cause an
+         * infinite recursion.
+         */
+        if (sl == &printflock)
+            continue;
+#ifdef CONFIG_FB
+        if (sl == &fb_lock)
+            continue;
+#endif
+        if (i++ > DEADLOCK_THRESHOLD) {
+            printf("cpu%d: looping on spinlock %.*p:%s, caller=%.*p",
+                   CPU->id, sizeof(__address) * 2, sl, sl->name, sizeof(__address) * 2, CALLER);
+            symbol = get_symtab_entry(CALLER);
+            if (symbol)
+                printf("(%s)", symbol);
+            printf("\n");
+            i = 0;
+            deadlock_reported = true;
+        }
+    }
+    if (deadlock_reported)
+        printf("cpu%d: not deadlocked\n", CPU->id);
+    /*
+     * Prevent critical section code from bleeding out this way up.
+     */
+    CS_ENTER_BARRIER();
+}
+#endif
+/** Lock spinlock conditionally
+ *
+ * Lock spinlock conditionally.
+ * If the spinlock is not available at the moment,
+ * signal failure.
+ *
+ * @param sl Pointer to spinlock_t structure.
+ *
+ * @return Zero on failure, non-zero otherwise.
+ */
+int spinlock_trylock(spinlock_t *sl)
+{
+    int rc;
+    preemption_disable();
+    rc = !test_and_set(&sl->val);
+    /*
+     * Prevent critical section code from bleeding out this way up.
+     */
+    CS_ENTER_BARRIER();
+    if (!rc)
+        preemption_enable();
+    return rc;
+}
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/generic/src/synch/semaphore.c
 ,0 → 1,99
+/*
+ * Copyright (C) 2001-2004 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup sync
+ * @{
+ */
+/**
+ * @file
+ * @brief   Semaphores.
+ */
+#include <synch/semaphore.h>
+#include <synch/waitq.h>
+#include <synch/spinlock.h>
+#include <synch/synch.h>
+#include <arch/asm.h>
+#include <arch.h>
+/** Initialize semaphore
+ *
+ * Initialize semaphore.
+ *
+ * @param s Semaphore.
+ * @param val Maximal number of threads allowed to enter critical section.
+ */
+void semaphore_initialize(semaphore_t *s, int val)
+{
+    ipl_t ipl;
+    waitq_initialize(&s->wq);
+    ipl = interrupts_disable();
+    spinlock_lock(&s->wq.lock);
+    s->wq.missed_wakeups = val;
+    spinlock_unlock(&s->wq.lock);
+    interrupts_restore(ipl);
+}
+/** Semaphore down
+ *
+ * Semaphore down.
+ * Conditional mode and mode with timeout can be requested.
+ *
+ * @param s Semaphore.
+ * @param usec Timeout in microseconds.
+ * @param flags Select mode of operation.
+ *
+ * For exact description of possible combinations of
+ * usec and flags, see comment for waitq_sleep_timeout().
+ *
+ * @return See comment for waitq_sleep_timeout().
+ */
+int _semaphore_down_timeout(semaphore_t *s, __u32 usec, int flags)
+{
+    return waitq_sleep_timeout(&s->wq, usec, flags);
+}
+/** Semaphore up
+ *
+ * Semaphore up.
+ *
+ * @param s Semaphore.
+ */
+void semaphore_up(semaphore_t *s)
+{
+    waitq_wakeup(&s->wq, WAKEUP_FIRST);
+}
+ /** @}
+ */

 /tags/0.2.0.2/kernel/generic/src/synch/waitq.c
 ,0 → 1,455
+/*
+ * Copyright (C) 2001-2004 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup sync
+ * @{
+ */
+/**
+ * @file
+ * @brief   Wait queue.
+ *
+ * Wait queue is the basic synchronization primitive upon which all
+ * other synchronization primitives build.
+ *
+ * It allows threads to wait for an event in first-come, first-served
+ * fashion. Conditional operation as well as timeouts and interruptions
+ * are supported.
+ */
+#include <synch/waitq.h>
+#include <synch/synch.h>
+#include <synch/spinlock.h>
+#include <proc/thread.h>
+#include <proc/scheduler.h>
+#include <arch/asm.h>
+#include <arch/types.h>
+#include <typedefs.h>
+#include <time/timeout.h>
+#include <arch.h>
+#include <context.h>
+#include <adt/list.h>
+static void waitq_timeouted_sleep(void *data);
+/** Initialize wait queue
+ *
+ * Initialize wait queue.
+ *
+ * @param wq Pointer to wait queue to be initialized.
+ */
+void waitq_initialize(waitq_t *wq)
+{
+    spinlock_initialize(&wq->lock, "waitq_lock");
+    list_initialize(&wq->head);
+    wq->missed_wakeups = 0;
+}
+/** Handle timeout during waitq_sleep_timeout() call
+ *
+ * This routine is called when waitq_sleep_timeout() timeouts.
+ * Interrupts are disabled.
+ *
+ * It is supposed to try to remove 'its' thread from the wait queue;
+ * it can eventually fail to achieve this goal when these two events
+ * overlap. In that case it behaves just as though there was no
+ * timeout at all.
+ *
+ * @param data Pointer to the thread that called waitq_sleep_timeout().
+ */
+void waitq_timeouted_sleep(void *data)
+{
+    thread_t *t = (thread_t *) data;
+    waitq_t *wq;
+    bool do_wakeup = false;
+    spinlock_lock(&threads_lock);
+    if (!thread_exists(t))
+        goto out;
+grab_locks:
+    spinlock_lock(&t->lock);
+    if ((wq = t->sleep_queue)) {        /* assignment */
+        if (!spinlock_trylock(&wq->lock)) {
+            spinlock_unlock(&t->lock);
+            goto grab_locks;    /* avoid deadlock */
+        }
+        list_remove(&t->wq_link);
+        t->saved_context = t->sleep_timeout_context;
+        do_wakeup = true;
+        t->sleep_queue = NULL;
+        spinlock_unlock(&wq->lock);
+    }
+    t->timeout_pending = false;
+    spinlock_unlock(&t->lock);
+    if (do_wakeup)
+        thread_ready(t);
+out:
+    spinlock_unlock(&threads_lock);
+}
+/** Interrupt sleeping thread.
+ *
+ * This routine attempts to interrupt a thread from its sleep in a waitqueue.
+ * If the thread is not found sleeping, no action is taken.
+ *
+ * @param t Thread to be interrupted.
+ */
+void waitq_interrupt_sleep(thread_t *t)
+{
+    waitq_t *wq;
+    bool do_wakeup = false;
+    ipl_t ipl;
+    ipl = interrupts_disable();
+    spinlock_lock(&threads_lock);
+    if (!thread_exists(t))
+        goto out;
+grab_locks:
+    spinlock_lock(&t->lock);
+    if ((wq = t->sleep_queue)) {        /* assignment */
+        if (!(t->sleep_interruptible)) {
+            /*
+             * The sleep cannot be interrupted.
+             */
+            spinlock_unlock(&t->lock);
+            goto out;
+        }
+        if (!spinlock_trylock(&wq->lock)) {
+            spinlock_unlock(&t->lock);
+            goto grab_locks;    /* avoid deadlock */
+        }
+        if (t->timeout_pending && timeout_unregister(&t->sleep_timeout))
+            t->timeout_pending = false;
+        list_remove(&t->wq_link);
+        t->saved_context = t->sleep_interruption_context;
+        do_wakeup = true;
+        t->sleep_queue = NULL;
+        spinlock_unlock(&wq->lock);
+    }
+    spinlock_unlock(&t->lock);
+    if (do_wakeup)
+        thread_ready(t);
+out:
+    spinlock_unlock(&threads_lock);
+    interrupts_restore(ipl);
+}
+/** Sleep until either wakeup, timeout or interruption occurs
+ *
+ * This is a sleep implementation which allows itself to time out or to be
+ * interrupted from the sleep, restoring a failover context.
+ *
+ * Sleepers are organised in a FIFO fashion in a structure called wait queue.
+ *
+ * This function is really basic in that other functions as waitq_sleep()
+ * and all the *_timeout() functions use it.
+ *
+ * @param wq Pointer to wait queue.
+ * @param usec Timeout in microseconds.
+ * @param flags Specify mode of the sleep.
+ *
+ * The sleep can be interrupted only if the
+ * SYNCH_FLAGS_INTERRUPTIBLE bit is specified in flags.
+ * If usec is greater than zero, regardless of the value of the
+ * SYNCH_FLAGS_NON_BLOCKING bit in flags, the call will not return until either timeout,
+ * interruption or wakeup comes.
+ *
+ * If usec is zero and the SYNCH_FLAGS_NON_BLOCKING bit is not set in flags, the call
+ * will not return until wakeup or interruption comes.
+ *
+ * If usec is zero and the SYNCH_FLAGS_NON_BLOCKING bit is set in flags, the call will
+ * immediately return, reporting either success or failure.
+ *
+ * @return  Returns one of: ESYNCH_WOULD_BLOCK, ESYNCH_TIMEOUT, ESYNCH_INTERRUPTED,
+ *          ESYNCH_OK_ATOMIC, ESYNCH_OK_BLOCKED.
+ *
+ * @li ESYNCH_WOULD_BLOCK means that the sleep failed because at the time
+ * of the call there was no pending wakeup.
+ *
+ * @li ESYNCH_TIMEOUT means that the sleep timed out.
+ *
+ * @li ESYNCH_INTERRUPTED means that somebody interrupted the sleeping thread.
+ *
+ * @li ESYNCH_OK_ATOMIC means that the sleep succeeded and that there was
+ * a pending wakeup at the time of the call. The caller was not put
+ * asleep at all.
+ *
+ * @li ESYNCH_OK_BLOCKED means that the sleep succeeded; the full sleep was
+ * attempted.
+ */
+int waitq_sleep_timeout(waitq_t *wq, __u32 usec, int flags)
+{
+    ipl_t ipl;
+    int rc;
+    ipl = waitq_sleep_prepare(wq);
+    rc = waitq_sleep_timeout_unsafe(wq, usec, flags);
+    waitq_sleep_finish(wq, rc, ipl);
+    return rc;
+}
+/** Prepare to sleep in a waitq.
+ *
+ * This function will return holding the lock of the wait queue
+ * and interrupts disabled.
+ *
+ * @param wq Wait queue.
+ *
+ * @return Interrupt level as it existed on entry to this function.
+ */
+ipl_t waitq_sleep_prepare(waitq_t *wq)
+{
+    ipl_t ipl;
+restart:
+    ipl = interrupts_disable();
+    if (THREAD) {   /* needed during system initiailzation */
+        /*
+         * Busy waiting for a delayed timeout.
+         * This is an important fix for the race condition between
+         * a delayed timeout and a next call to waitq_sleep_timeout().
+         * Simply, the thread is not allowed to go to sleep if
+         * there are timeouts in progress.
+         */
+        spinlock_lock(&THREAD->lock);
+        if (THREAD->timeout_pending) {
+            spinlock_unlock(&THREAD->lock);
+            interrupts_restore(ipl);
+            goto restart;
+        }
+        spinlock_unlock(&THREAD->lock);
+    }
+    spinlock_lock(&wq->lock);
+    return ipl;
+}
+/** Finish waiting in a wait queue.
+ *
+ * This function restores interrupts to the state that existed prior
+ * to the call to waitq_sleep_prepare(). If necessary, the wait queue
+ * lock is released.
+ *
+ * @param wq Wait queue.
+ * @param rc Return code of waitq_sleep_timeout_unsafe().
+ * @param ipl Interrupt level returned by waitq_sleep_prepare().
+ */
+void waitq_sleep_finish(waitq_t *wq, int rc, ipl_t ipl)
+{
+    switch (rc) {
+    case ESYNCH_WOULD_BLOCK:
+    case ESYNCH_OK_ATOMIC:
+        spinlock_unlock(&wq->lock);
+        break;
+    default:
+        break;
+    }
+    interrupts_restore(ipl);
+}
+/** Internal implementation of waitq_sleep_timeout().
+ *
+ * This function implements logic of sleeping in a wait queue.
+ * This call must be preceeded by a call to waitq_sleep_prepare()
+ * and followed by a call to waitq_slee_finish().
+ *
+ * @param wq See waitq_sleep_timeout().
+ * @param usec See waitq_sleep_timeout().
+ * @param flags See waitq_sleep_timeout().
+ *
+ * @return See waitq_sleep_timeout().
+ */
+int waitq_sleep_timeout_unsafe(waitq_t *wq, __u32 usec, int flags)
+{
+    /* checks whether to go to sleep at all */
+    if (wq->missed_wakeups) {
+        wq->missed_wakeups--;
+        return ESYNCH_OK_ATOMIC;
+    }
+    else {
+        if ((flags & SYNCH_FLAGS_NON_BLOCKING) && (usec == 0)) {
+            /* return immediatelly instead of going to sleep */
+            return ESYNCH_WOULD_BLOCK;
+        }
+    }
+    /*
+     * Now we are firmly decided to go to sleep.
+     */
+    spinlock_lock(&THREAD->lock);
+    if (flags & SYNCH_FLAGS_INTERRUPTIBLE) {
+        /*
+         * If the thread was already interrupted,
+         * don't go to sleep at all.
+         */
+        if (THREAD->interrupted) {
+            spinlock_unlock(&THREAD->lock);
+            spinlock_unlock(&wq->lock);
+            return ESYNCH_INTERRUPTED;
+        }
+        /*
+         * Set context that will be restored if the sleep
+         * of this thread is ever interrupted.
+         */
+        THREAD->sleep_interruptible = true;
+        if (!context_save(&THREAD->sleep_interruption_context)) {
+            /* Short emulation of scheduler() return code. */
+            spinlock_unlock(&THREAD->lock);
+            return ESYNCH_INTERRUPTED;
+        }
+    } else {
+        THREAD->sleep_interruptible = false;
+    }
+    if (usec) {
+        /* We use the timeout variant. */
+        if (!context_save(&THREAD->sleep_timeout_context)) {
+            /* Short emulation of scheduler() return code. */
+            spinlock_unlock(&THREAD->lock);
+            return ESYNCH_TIMEOUT;
+        }
+        THREAD->timeout_pending = true;
+        timeout_register(&THREAD->sleep_timeout, (__u64) usec, waitq_timeouted_sleep, THREAD);
+    }
+    list_append(&THREAD->wq_link, &wq->head);
+    /*
+     * Suspend execution.
+     */
+    THREAD->state = Sleeping;
+    THREAD->sleep_queue = wq;
+    spinlock_unlock(&THREAD->lock);
+    scheduler();    /* wq->lock is released in scheduler_separated_stack() */
+    return ESYNCH_OK_BLOCKED;
+}
+/** Wake up first thread sleeping in a wait queue
+ *
+ * Wake up first thread sleeping in a wait queue.
+ * This is the SMP- and IRQ-safe wrapper meant for
+ * general use.
+ *
+ * Besides its 'normal' wakeup operation, it attempts
+ * to unregister possible timeout.
+ *
+ * @param wq Pointer to wait queue.
+ * @param all If this is non-zero, all sleeping threads
+ *        will be woken up and missed count will be zeroed.
+ */
+void waitq_wakeup(waitq_t *wq, bool all)
+{
+    ipl_t ipl;
+    ipl = interrupts_disable();
+    spinlock_lock(&wq->lock);
+    _waitq_wakeup_unsafe(wq, all);
+    spinlock_unlock(&wq->lock);
+    interrupts_restore(ipl);
+}
+/** Internal SMP- and IRQ-unsafe version of waitq_wakeup()
+ *
+ * This is the internal SMP- and IRQ-unsafe version
+ * of waitq_wakeup(). It assumes wq->lock is already
+ * locked and interrupts are already disabled.
+ *
+ * @param wq Pointer to wait queue.
+ * @param all If this is non-zero, all sleeping threads
+ *        will be woken up and missed count will be zeroed.
+ */
+void _waitq_wakeup_unsafe(waitq_t *wq, bool all)
+{
+    thread_t *t;
+loop:
+    if (list_empty(&wq->head)) {
+        wq->missed_wakeups++;
+        if (all)
+            wq->missed_wakeups = 0;
+        return;
+    }
+    t = list_get_instance(wq->head.next, thread_t, wq_link);
+    /*
+     * Lock the thread prior to removing it from the wq.
+     * This is not necessary because of mutual exclusion
+     * (the link belongs to the wait queue), but because
+     * of synchronization with waitq_timeouted_sleep()
+     * and waitq_interrupt_sleep().
+     *
+     * In order for these two functions to work, the following
+     * invariant must hold:
+     *
+     * t->sleep_queue != NULL <=> t sleeps in a wait queue
+     *
+     * For an observer who locks the thread, the invariant
+     * holds only when the lock is held prior to removing
+     * it from the wait queue.
+     */
+    spinlock_lock(&t->lock);
+    list_remove(&t->wq_link);
+    if (t->timeout_pending && timeout_unregister(&t->sleep_timeout))
+        t->timeout_pending = false;
+    t->sleep_queue = NULL;
+    spinlock_unlock(&t->lock);
+    thread_ready(t);
+    if (all)
+        goto loop;
+}
+ /** @}
+ */

 /tags/0.2.0.2/kernel/generic/src/synch/futex.c
 ,0 → 1,340
+/*
+ * Copyright (C) 2006 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup sync
+ * @{
+ */
+/**
+ * @file
+ * @brief   Kernel backend for futexes.
+ */
+#include <synch/futex.h>
+#include <synch/rwlock.h>
+#include <synch/spinlock.h>
+#include <synch/synch.h>
+#include <mm/frame.h>
+#include <mm/page.h>
+#include <mm/slab.h>
+#include <proc/thread.h>
+#include <proc/task.h>
+#include <genarch/mm/page_pt.h>
+#include <genarch/mm/page_ht.h>
+#include <adt/hash_table.h>
+#include <adt/list.h>
+#include <arch.h>
+#include <align.h>
+#include <panic.h>
+#include <errno.h>
+#include <print.h>
+#define FUTEX_HT_SIZE   1024    /* keep it a power of 2 */
+static void futex_initialize(futex_t *futex);
+static futex_t *futex_find(__address paddr);
+static index_t futex_ht_hash(__native *key);
+static bool futex_ht_compare(__native *key, count_t keys, link_t *item);
+static void futex_ht_remove_callback(link_t *item);
+/**
+ * Read-write lock protecting global futex hash table.
+ * It is also used to serialize access to all futex_t structures.
+ * Must be acquired before the task futex B+tree lock.
+ */
+static rwlock_t futex_ht_lock;
+/** Futex hash table. */
+static hash_table_t futex_ht;
+/** Futex hash table operations. */
+static hash_table_operations_t futex_ht_ops = {
+    .hash = futex_ht_hash,
+    .compare = futex_ht_compare,
+    .remove_callback = futex_ht_remove_callback
+};
+/** Initialize futex subsystem. */
+void futex_init(void)
+{
+    rwlock_initialize(&futex_ht_lock);
+    hash_table_create(&futex_ht, FUTEX_HT_SIZE, 1, &futex_ht_ops);
+}
+/** Initialize kernel futex structure.
+ *
+ * @param futex Kernel futex structure.
+ */
+void futex_initialize(futex_t *futex)
+{
+    waitq_initialize(&futex->wq);
+    link_initialize(&futex->ht_link);
+    futex->paddr = 0;
+    futex->refcount = 1;
+}
+/** Sleep in futex wait queue.
+ *
+ * @param uaddr Userspace address of the futex counter.
+ * @param usec If non-zero, number of microseconds this thread is willing to sleep.
+ * @param flags Select mode of operation.
+ *
+ * @return One of ESYNCH_TIMEOUT, ESYNCH_OK_ATOMIC and ESYNCH_OK_BLOCKED. See synch.h.
+ *     If there is no physical mapping for uaddr ENOENT is returned.
+ */
+__native sys_futex_sleep_timeout(__address uaddr, __u32 usec, int flags)
+{
+    futex_t *futex;
+    __address paddr;
+    pte_t *t;
+    ipl_t ipl;
+    ipl = interrupts_disable();
+    /*
+     * Find physical address of futex counter.
+     */
+    page_table_lock(AS, true);
+    t = page_mapping_find(AS, ALIGN_DOWN(uaddr, PAGE_SIZE));
+    if (!t || !PTE_VALID(t) || !PTE_PRESENT(t)) {
+        page_table_unlock(AS, true);
+        interrupts_restore(ipl);
+        return (__native) ENOENT;
+    }
+    paddr = PTE_GET_FRAME(t) + (uaddr - ALIGN_DOWN(uaddr, PAGE_SIZE));
+    page_table_unlock(AS, true);
+    interrupts_restore(ipl);
+    futex = futex_find(paddr);
+    return (__native) waitq_sleep_timeout(&futex->wq, usec, flags | SYNCH_FLAGS_INTERRUPTIBLE);
+}
+/** Wakeup one thread waiting in futex wait queue.
+ *
+ * @param uaddr Userspace address of the futex counter.
+ *
+ * @return ENOENT if there is no physical mapping for uaddr.
+ */
+__native sys_futex_wakeup(__address uaddr)
+{
+    futex_t *futex;
+    __address paddr;
+    pte_t *t;
+    ipl_t ipl;
+    ipl = interrupts_disable();
+    /*
+     * Find physical address of futex counter.
+     */
+    page_table_lock(AS, true);
+    t = page_mapping_find(AS, ALIGN_DOWN(uaddr, PAGE_SIZE));
+    if (!t || !PTE_VALID(t) || !PTE_PRESENT(t)) {
+        page_table_unlock(AS, true);
+        interrupts_restore(ipl);
+        return (__native) ENOENT;
+    }
+    paddr = PTE_GET_FRAME(t) + (uaddr - ALIGN_DOWN(uaddr, PAGE_SIZE));
+    page_table_unlock(AS, true);
+    interrupts_restore(ipl);
+    futex = futex_find(paddr);
+    waitq_wakeup(&futex->wq, WAKEUP_FIRST);
+    return 0;
+}
+/** Find kernel address of the futex structure corresponding to paddr.
+ *
+ * If the structure does not exist already, a new one is created.
+ *
+ * @param paddr Physical address of the userspace futex counter.
+ *
+ * @return Address of the kernel futex structure.
+ */
+futex_t *futex_find(__address paddr)
+{
+    link_t *item;
+    futex_t *futex;
+    btree_node_t *leaf;
+    /*
+     * Find the respective futex structure
+     * or allocate new one if it does not exist already.
+     */
+    rwlock_read_lock(&futex_ht_lock);
+    item = hash_table_find(&futex_ht, &paddr);
+    if (item) {
+        futex = hash_table_get_instance(item, futex_t, ht_link);
+        /*
+         * See if the current task knows this futex.
+         */
+        mutex_lock(&TASK->futexes_lock);
+        if (!btree_search(&TASK->futexes, paddr, &leaf)) {
+            /*
+             * The futex is new to the current task.
+             * However, we only have read access.
+             * Gain write access and try again.
+             */
+            mutex_unlock(&TASK->futexes_lock);
+            goto gain_write_access;
+        }
+        mutex_unlock(&TASK->futexes_lock);
+        rwlock_read_unlock(&futex_ht_lock);
+    } else {
+gain_write_access:
+        /*
+         * Upgrade to writer is not currently supported,
+         * therefore, it is necessary to release the read lock
+         * and reacquire it as a writer.
+         */
+        rwlock_read_unlock(&futex_ht_lock);
+        rwlock_write_lock(&futex_ht_lock);
+        /*
+         * Avoid possible race condition by searching
+         * the hash table once again with write access.
+         */
+        item = hash_table_find(&futex_ht, &paddr);
+        if (item) {
+            futex = hash_table_get_instance(item, futex_t, ht_link);
+            /*
+             * See if this futex is known to the current task.
+             */
+            mutex_lock(&TASK->futexes_lock);
+            if (!btree_search(&TASK->futexes, paddr, &leaf)) {
+                /*
+                 * The futex is new to the current task.
+                 * Upgrade its reference count and put it to the
+                 * current task's B+tree of known futexes.
+                 */
+                futex->refcount++;
+                btree_insert(&TASK->futexes, paddr, futex, leaf);
+            }
+            mutex_unlock(&TASK->futexes_lock);
+            rwlock_write_unlock(&futex_ht_lock);
+        } else {
+            futex = (futex_t *) malloc(sizeof(futex_t), 0);
+            futex_initialize(futex);
+            futex->paddr = paddr;
+            hash_table_insert(&futex_ht, &paddr, &futex->ht_link);
+            /*
+             * This is the first task referencing the futex.
+             * It can be directly inserted into its
+             * B+tree of known futexes.
+             */
+            mutex_lock(&TASK->futexes_lock);
+            btree_insert(&TASK->futexes, paddr, futex, NULL);
+            mutex_unlock(&TASK->futexes_lock);
+            rwlock_write_unlock(&futex_ht_lock);
+        }
+    }
+    return futex;
+}
+/** Compute hash index into futex hash table.
+ *
+ * @param key Address where the key (i.e. physical address of futex counter) is stored.
+ *
+ * @return Index into futex hash table.
+ */
+index_t futex_ht_hash(__native *key)
+{
+    return *key & (FUTEX_HT_SIZE-1);
+}
+/** Compare futex hash table item with a key.
+ *
+ * @param key Address where the key (i.e. physical address of futex counter) is stored.
+ *
+ * @return True if the item matches the key. False otherwise.
+ */
+bool futex_ht_compare(__native *key, count_t keys, link_t *item)
+{
+    futex_t *futex;
+    ASSERT(keys == 1);
+    futex = hash_table_get_instance(item, futex_t, ht_link);
+    return *key == futex->paddr;
+}
+/** Callback for removal items from futex hash table.
+ *
+ * @param item Item removed from the hash table.
+ */
+void futex_ht_remove_callback(link_t *item)
+{
+    futex_t *futex;
+    futex = hash_table_get_instance(item, futex_t, ht_link);
+    free(futex);
+}
+/** Remove references from futexes known to the current task. */
+void futex_cleanup(void)
+{
+    link_t *cur;
+    rwlock_write_lock(&futex_ht_lock);
+    mutex_lock(&TASK->futexes_lock);
+    for (cur = TASK->futexes.leaf_head.next; cur != &TASK->futexes.leaf_head; cur = cur->next) {
+        btree_node_t *node;
+        int i;
+        node = list_get_instance(cur, btree_node_t, leaf_link);
+        for (i = 0; i < node->keys; i++) {
+            futex_t *ftx;
+            __address paddr = node->key[i];
+            ftx = (futex_t *) node->value[i];
+            if (--ftx->refcount == 0)
+                hash_table_remove(&futex_ht, &paddr, 1);
+        }
+    }
+    mutex_unlock(&TASK->futexes_lock);
+    rwlock_write_unlock(&futex_ht_lock);
+}
+ /** @}
+ */

 /tags/0.2.0.2/kernel/generic/src/debug/symtab.c
 ,0 → 1,202
+/*
+ * Copyright (C) 2005 Ondrej Palkovsky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup genericdebug
+ * @{
+ */
+/**
+ * @file
+ * @brief   Kernel symbol resolver.
+ */
+#include <symtab.h>
+#include <typedefs.h>
+#include <arch/byteorder.h>
+#include <func.h>
+#include <print.h>
+/** Return entry that seems most likely to correspond to argument.
+ *
+ * Return entry that seems most likely to correspond
+ * to address passed in the argument.
+ *
+ * @param addr Address.
+ *
+ * @return Pointer to respective symbol string on success, NULL otherwise.
+ */
+char * get_symtab_entry(__native addr)
+{
+    count_t i;
+    for (i=1;symbol_table[i].address_le;++i) {
+        if (addr < __u64_le2host(symbol_table[i].address_le))
+            break;
+    }
+    if (addr >= __u64_le2host(symbol_table[i-1].address_le))
+        return symbol_table[i-1].symbol_name;
+    return NULL;
+}
+/** Find symbols that match the parameter forward and print them.
+ *
+ * @param name - search string
+ * @param startpos - starting position, changes to found position
+ * @return Pointer to the part of string that should be completed or NULL
+ */
+static char * symtab_search_one(const char *name, int *startpos)
+{
+    int namelen = strlen(name);
+    char *curname;
+    int i,j;
+    int colonoffset = -1;
+    for (i=0;name[i];i++)
+        if (name[i] == ':') {
+            colonoffset = i;
+            break;
+        }
+    for (i=*startpos;symbol_table[i].address_le;++i) {
+        /* Find a ':' in name */
+        curname = symbol_table[i].symbol_name;
+        for (j=0; curname[j] && curname[j] != ':'; j++)
+            ;
+        if (!curname[j])
+            continue;
+        j -= colonoffset;
+        curname += j;
+        if (strlen(curname) < namelen)
+            continue;
+        if (strncmp(curname, name, namelen) == 0) {
+            *startpos = i;
+            return curname+namelen;
+        }
+    }
+    return NULL;
+}
+/** Return address that corresponds to the entry
+ *
+ * Search symbol table, and if there is one match, return it
+ *
+ * @param name Name of the symbol
+ * @return 0 - Not found, -1 - Duplicate symbol, other - address of symbol
+ */
+__address get_symbol_addr(const char *name)
+{
+    count_t found = 0;
+    __address addr = NULL;
+    char *hint;
+    int i;
+    i = 0;
+    while ((hint=symtab_search_one(name, &i))) {
+        if (!strlen(hint)) {
+            addr =  __u64_le2host(symbol_table[i].address_le);
+            found++;
+        }
+        i++;
+    }
+    if (found > 1)
+        return ((__address) -1);
+    return addr;
+}
+/** Find symbols that match parameter and prints them */
+void symtab_print_search(const char *name)
+{
+    int i;
+    __address addr;
+    char *realname;
+    i = 0;
+    while (symtab_search_one(name, &i)) {
+        addr =  __u64_le2host(symbol_table[i].address_le);
+        realname = symbol_table[i].symbol_name;
+        printf("%.*p: %s\n", sizeof(__address) * 2, addr, realname);
+        i++;
+    }
+}
+/** Symtab completion
+ *
+ * @param input - Search string, completes to symbol name
+ * @returns - 0 - nothing found, 1 - success, >1 print duplicates
+ */
+int symtab_compl(char *input)
+{
+    char output[MAX_SYMBOL_NAME+1];
+    int startpos = 0;
+    char *foundtxt;
+    int found = 0;
+    int i;
+    char *name = input;
+    /* Allow completion of pointers  */
+    if (name[0] == '*' || name[0] == '&')
+        name++;
+    /* Do not print everything */
+    if (!strlen(name))
+        return 0;
+    output[0] = '\0';
+    while ((foundtxt = symtab_search_one(name, &startpos))) {
+        startpos++;
+        if (!found)
+            strncpy(output, foundtxt, strlen(foundtxt)+1);
+        else {
+            for (i=0; output[i] && foundtxt[i] && output[i]==foundtxt[i]; i++)
+                ;
+            output[i] = '\0';
+        }
+        found++;
+    }
+    if (!found)
+        return 0;
+    if (found > 1 && !strlen(output)) {
+        printf("\n");
+        startpos = 0;
+        while ((foundtxt = symtab_search_one(name, &startpos))) {
+            printf("%s\n", symbol_table[startpos].symbol_name);
+            startpos++;
+        }
+    }
+    strncpy(input, output, MAX_SYMBOL_NAME);
+    return found;
+}
+ /** @}
+ */

 /tags/0.2.0.2/kernel/generic/src/interrupt/interrupt.c
 ,0 → 1,155
+/*
+ * Copyright (C) 2005 Ondrej Palkovsky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup genericinterrupt
+ * @{
+ */
+/**
+ * @file
+ * @brief   Interrupt redirector.
+ *
+ * This file provides means of registering interrupt handlers
+ * by kernel functions and calling the handlers when interrupts
+ * occur.
+ */
+#include <interrupt.h>
+#include <debug.h>
+#include <console/kconsole.h>
+#include <console/console.h>
+#include <console/chardev.h>
+#include <console/cmd.h>
+#include <panic.h>
+#include <print.h>
+#include <symtab.h>
+static struct {
+    const char *name;
+    iroutine f;
+} exc_table[IVT_ITEMS];
+SPINLOCK_INITIALIZE(exctbl_lock);
+/** Register exception handler
+ *
+ * @param n Exception number
+ * @param name Description
+ * @param f Exception handler
+ */
+iroutine exc_register(int n, const char *name, iroutine f)
+{
+    ASSERT(n < IVT_ITEMS);
+    iroutine old;
+    spinlock_lock(&exctbl_lock);
+    old = exc_table[n].f;
+    exc_table[n].f = f;
+    exc_table[n].name = name;
+    spinlock_unlock(&exctbl_lock);
+    return old;
+}
+/** Dispatch exception according to exception table
+ *
+ * Called directly from the assembler code.
+ * CPU is interrupts_disable()'d.
+ */
+void exc_dispatch(int n, istate_t *istate)
+{
+    ASSERT(n < IVT_ITEMS);
+    exc_table[n].f(n + IVT_FIRST, istate);
+    /* This is a safe place to exit exiting thread */
+    if (THREAD && THREAD->interrupted && istate_from_uspace(istate))
+        thread_exit();
+}
+/** Default 'null' exception handler */
+static void exc_undef(int n, istate_t *istate)
+{
+    fault_if_from_uspace(istate, "Unhandled exception %d.", n);
+    panic("Unhandled exception %d.", n);
+}
+/** kconsole cmd - print all exceptions */
+static int exc_print_cmd(cmd_arg_t *argv)
+{
+    int i;
+    char *symbol;
+    spinlock_lock(&exctbl_lock);
+    printf("Exc Description Handler\n");
+    for (i=0; i < IVT_ITEMS; i++) {
+        symbol = get_symtab_entry((__native)exc_table[i].f);
+        if (!symbol)
+            symbol = "not found";
+        printf("%d %s %.*p(%s)\n", i + IVT_FIRST, exc_table[i].name,
+               sizeof(__address) * 2, exc_table[i].f,symbol);
+        if (!((i+1) % 20)) {
+            printf("Press any key to continue.");
+            spinlock_unlock(&exctbl_lock);
+            getc(stdin);
+            spinlock_lock(&exctbl_lock);
+            printf("\n");
+        }
+    }
+    spinlock_unlock(&exctbl_lock);
+    return 1;
+}
+static cmd_info_t exc_info = {
+    .name = "exc",
+    .description = "Print exception table.",
+    .func = exc_print_cmd,
+    .help = NULL,
+    .argc = 0,
+    .argv = NULL
+};
+/** Initialize generic exception handling support */
+void exc_init(void)
+{
+    int i;
+    for (i=0;i < IVT_ITEMS; i++)
+        exc_register(i, "undef", (iroutine) exc_undef);
+    cmd_initialize(&exc_info);
+    if (!cmd_register(&exc_info))
+        panic("could not register command %s\n", exc_info.name);
+}
+ /** @}
+ */

 /tags/0.2.0.2/kernel/generic/src/smp/ipi.c
 ,0 → 1,71
+/*
+ * Copyright (C) 2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup generic
+ * @{
+ */
+/**
+ * @file
+ * @brief   Generic IPI interface.
+ */
+#ifdef CONFIG_SMP
+#include <smp/ipi.h>
+#include <config.h>
+/** Broadcast IPI message
+ *
+ * Broadcast IPI message to all CPUs.
+ *
+ * @param ipi Message to broadcast.
+ *
+ * @bug The decision whether to actually send the IPI must be based
+ *  on a different criterion. The current version has
+ *  problems when some of the detected CPUs are marked
+ *  disabled in machine configuration.
+ */
+void ipi_broadcast(int ipi)
+{
+    /*
+     * Provisions must be made to avoid sending IPI:
+     * - before all CPU's were configured to accept the IPI
+     * - if there is only one CPU but the kernel was compiled with CONFIG_SMP
+     */
+    if ((config.cpu_active > 1) && (config.cpu_active == config.cpu_count))
+        ipi_broadcast_arch(ipi);
+}
+#endif /* CONFIG_SMP */
+ /** @}
+ */

 /tags/0.2.0.2/kernel/generic/src/printf/printf.c
 ,0 → 1,54
+/*
+ * Copyright (C) 2006 Josef Cejka
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup generic
+ * @{
+ */
+/** @file
+ */
+#include <print.h>
+int printf(const char *fmt, ...)
+{
+    int ret;
+    va_list args;
+    va_start(args, fmt);
+    ret = vprintf(fmt, args);
+    va_end(args);
+    return ret;
+}
+ /** @}
+ */

 /tags/0.2.0.2/kernel/generic/src/printf/snprintf.c
 ,0 → 1,53
+/*
+ * Copyright (C) 2006 Josef Cejka
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup generic
+ * @{
+ */
+/** @file
+ */
+#include <print.h>
+#include <printf/printf_core.h>
+int snprintf(char *str, size_t size, const char *fmt, ...)
+{
+    int ret;
+    va_list args;
+    va_start(args, fmt);
+    ret = vsnprintf(str, size, fmt, args);
+    va_end(args);
+    return ret;
+}
+ /** @}
+ */

 /tags/0.2.0.2/kernel/generic/src/printf/sprintf.c
 ,0 → 1,52
+/*
+ * Copyright (C) 2006 Josef Cejka
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup generic
+ * @{
+ */
+/** @file
+ */
+#include <print.h>
+int sprintf(char *str, const char *fmt, ...)
+{
+    int ret;
+    va_list args;
+    va_start(args, fmt);
+    ret = vsprintf(str, fmt, args);
+    va_end(args);
+    return ret;
+}
+ /** @}
+ */

 /tags/0.2.0.2/kernel/generic/src/printf/vprintf.c
 ,0 → 1,60
+/*
+ * Copyright (C) 2006 Josef Cejka
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup generic
+ * @{
+ */
+/** @file
+ */
+#include <print.h>
+#include <printf/printf_core.h>
+#include <putchar.h>
+int vprintf_write(const char *str, size_t count, void *unused);
+int vprintf_write(const char *str, size_t count, void *unused)
+{
+    size_t i = 0;
+    for (; i < count; i++)
+        putchar(str[i]);
+    return i;
+}
+int vprintf(const char *fmt, va_list ap)
+{
+    struct printf_spec ps = {(int(*)(void *, size_t, void *))vprintf_write, NULL};
+    return printf_core(fmt, &ps, ap);
+}
+ /** @}
+ */

 /tags/0.2.0.2/kernel/generic/src/printf/vsnprintf.c
 ,0 → 1,105
+/*
+ * Copyright (C) 2006 Josef Cejka
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup generic
+ * @{
+ */
+/** @file
+ */
+#include <print.h>
+#include <printf/printf_core.h>
+#include <memstr.h>
+struct vsnprintf_data {
+    size_t size; /* total space for string */
+    size_t len; /* count of currently used characters */
+    char *string; /* destination string */
+};
+int vsnprintf_write(const char *str, size_t count, struct vsnprintf_data *data);
+/** Write string to given buffer.
+ * Write at most data->size characters including trailing zero. According to C99, snprintf() has to return number
+ * of characters that would have been written if enough space had been available. Hence the return value is not
+ * number of really printed characters but size of the input string. Number of really used characters
+ * is stored in data->len.
+ * @param str source string to print
+ * @param count size of source string
+ * @param data structure with destination string, counter of used space and total string size.
+ * @return number of characters to print (not characters really printed!)
+ */
+int vsnprintf_write(const char *str, size_t count, struct vsnprintf_data *data)
+{
+    size_t i;
+    i = data->size - data->len;
+    if (i == 0) {
+        return count;
+    }
+    if (i == 1) {
+        /* We have only one free byte left in buffer => write there trailing zero */
+        data->string[data->size - 1] = 0;
+        data->len = data->size;
+        return count;
+    }
+    if (i <= count) {
+        /* We have not enought space for whole string with the trailing zero => print only a part of string */
+            memcpy((void *)(data->string + data->len), (void *)str, i - 1);
+            data->string[data->size - 1] = 0;
+            data->len = data->size;
+            return count;
+    }
+    /* Buffer is big enought to print whole string */
+    memcpy((void *)(data->string + data->len), (void *)str, count);
+    data->len += count;
+    /* Put trailing zero at end, but not count it into data->len so it could be rewritten next time */
+    data->string[data->len] = 0;
+    return count;
+}
+int vsnprintf(char *str, size_t size, const char *fmt, va_list ap)
+{
+    struct vsnprintf_data data = {size, 0, str};
+    struct printf_spec ps = {(int(*)(void *, size_t, void *))vsnprintf_write, &data};
+    /* Print 0 at end of string - fix the case that nothing will be printed */
+    if (size > 0)
+        str[0] = 0;
+    /* vsnprintf_write ensures that str will be terminated by zero. */
+    return printf_core(fmt, &ps, ap);
+}
+ /** @}
+ */

 /tags/0.2.0.2/kernel/generic/src/printf/printf_core.c
 ,0 → 1,724
+/*
+ * Copyright (C) 2001-2004 Jakub Jermar
+ * Copyright (C) 2006 Josef Cejka
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup generic
+ * @{
+ */
+/**
+ * @file
+ * @brief   Printing functions.
+ */
+#include <printf/printf_core.h>
+#include <putchar.h>
+#include <print.h>
+#include <synch/spinlock.h>
+#include <arch/arg.h>
+#include <arch/asm.h>
+#include <arch.h>
+SPINLOCK_INITIALIZE(printflock);            /**< printf spinlock */
+#define __PRINTF_FLAG_PREFIX        0x00000001  /**< show prefixes 0x or 0*/
+#define __PRINTF_FLAG_SIGNED        0x00000002  /**< signed / unsigned number */
+#define __PRINTF_FLAG_ZEROPADDED    0x00000004  /**< print leading zeroes */
+#define __PRINTF_FLAG_LEFTALIGNED   0x00000010  /**< align to left */
+#define __PRINTF_FLAG_SHOWPLUS      0x00000020  /**< always show + sign */
+#define __PRINTF_FLAG_SPACESIGN     0x00000040  /**< print space instead of plus */
+#define __PRINTF_FLAG_BIGCHARS      0x00000080  /**< show big characters */
+#define __PRINTF_FLAG_NEGATIVE      0x00000100  /**< number has - sign */
+#define PRINT_NUMBER_BUFFER_SIZE    (64+5)      /**< Buffer big enought for 64 bit number
+                             * printed in base 2, sign, prefix and
+                             * 0 to terminate string.. (last one is only for better testing
+                             * end of buffer by zero-filling subroutine)*/
+/** Enumeration of possible arguments types.
+ */
+typedef enum {
+    PrintfQualifierByte = 0,
+    PrintfQualifierShort,
+    PrintfQualifierInt,
+    PrintfQualifierLong,
+    PrintfQualifierLongLong,
+    PrintfQualifierNative,
+    PrintfQualifierPointer
+} qualifier_t;
+static char digits_small[] = "0123456789abcdef";    /**< Small hexadecimal characters */
+static char digits_big[] = "0123456789ABCDEF";  /**< Big hexadecimal characters */
+/** Checks c for a digit.
+ * @param c One character.
+ * @return nonzero if c is from interval '0 to '9'.
+ */
+static inline int isdigit(int c)
+{
+    return ((c >= '0' )&&( c <= '9'));
+}
+/** Compute length of given zero terminated string.
+ * @param str Pointer to valid string.
+ * @return string length without trailing zero.
+ */
+static __native strlen(const char *str)
+{
+    __native counter = 0;
+    while (str[counter] != 0) {
+        counter++;
+    }
+    return counter;
+}
+/** Print count chars from buffer without adding newline
+ * @param buf Buffer with size at least count bytes - NULL pointer NOT allowed!
+ * @param count
+ * @param ps output method and its data
+ * @return number of printed characters
+ */
+static int printf_putnchars(const char * buf, size_t count, struct printf_spec *ps)
+{
+    return ps->write((void *)buf, count, ps->data);
+}
+/** Print string without added newline
+ * @param str string to print
+ * @param ps write function specification and support data
+ * @return number of printed characters
+ */
+static int printf_putstr(const char * str, struct printf_spec *ps)
+{
+    size_t count;
+    if (str == NULL) {
+        return printf_putnchars("(NULL)", 6, ps);
+    }
+    count = strlen(str);
+    return ps->write((void *) str, count, ps->data);
+}
+/** Print one character to output
+ * @param c one character
+ * @param ps output method
+ * @return number of printed characters
+ */
+static int printf_putchar(int c, struct printf_spec *ps)
+{
+    unsigned char ch = c;
+    return ps->write((void *) &ch, 1, ps->data);
+}
+/** Print one formatted character
+ * @param c character to print
+ * @param width
+ * @param flags
+ * @return number of printed characters, negative value on fail
+ */
+static int print_char(char c, int width, __u64 flags, struct printf_spec *ps)
+{
+    int counter = 0;
+    if (!(flags & __PRINTF_FLAG_LEFTALIGNED)) {
+        while (--width > 0) {   /* one space is consumed by character itself hence predecrement */
+            if (printf_putchar(' ', ps) > 0)
+                ++counter;
+        }
+    }
+    if (printf_putchar(c, ps) > 0)
+        counter++;
+    while (--width > 0) { /* one space is consumed by character itself hence predecrement */
+        if (printf_putchar(' ', ps) > 0)
+            ++counter;
+    }
+    return ++counter;
+}
+/** Print one string
+ * @param s string
+ * @param width
+ * @param precision
+ * @param flags
+ * @return number of printed characters or negative value on fail
+ */
+static int print_string(char *s, int width, int precision, __u64 flags, struct printf_spec *ps)
+{
+    int counter = 0;
+    size_t size;
+    int retval;
+    if (s == NULL) {
+        return printf_putstr("(NULL)", ps);
+    }
+    size = strlen(s);
+    /* print leading spaces */
+    if (precision == 0)
+        precision = size;
+    width -= precision;
+    if (!(flags & __PRINTF_FLAG_LEFTALIGNED)) {
+        while (width-- > 0) {
+            if (printf_putchar(' ', ps) == 1)
+                counter++;
+        }
+    }
+    while (precision > size) {
+        precision--;
+        if (printf_putchar(' ', ps) == 1)
+            ++counter;
+    }
+    if ((retval = printf_putnchars(s, precision, ps)) < 0) {
+        return -counter;
+    }
+    counter += retval;
+    while (width-- > 0) {
+        if (printf_putchar(' ', ps) == 1)
+            ++counter;
+    }
+    return counter;
+}
+/** Print number in given base
+ *
+ * Print significant digits of a number in given
+ * base.
+ *
+ * @param num  Number to print.
+ * @param width
+ * @param precision
+ * @param base Base to print the number in (should
+ *             be in range 2 .. 16).
+ * @param flags output modifiers
+ * @return number of written characters or EOF
+ *
+ */
+static int print_number(__u64 num, int width, int precision, int base , __u64 flags, struct printf_spec *ps)
+{
+    char *digits = digits_small;
+    char d[PRINT_NUMBER_BUFFER_SIZE];   /* this is good enough even for base == 2, prefix and sign */
+    char *ptr = &d[PRINT_NUMBER_BUFFER_SIZE - 1];
+    int size = 0; /* size of number with all prefixes and signs */
+    int number_size; /* size of plain number */
+    char sgn;
+    int retval;
+    int counter = 0;
+    if (flags & __PRINTF_FLAG_BIGCHARS)
+        digits = digits_big;
+    *ptr-- = 0; /* Put zero at end of string */
+    if (num == 0) {
+        *ptr-- = '0';
+        size++;
+    } else {
+        do {
+            *ptr-- = digits[num % base];
+            size++;
+        } while (num /= base);
+    }
+    number_size = size;
+    /* Collect sum of all prefixes/signs/... to calculate padding and leading zeroes */
+    if (flags & __PRINTF_FLAG_PREFIX) {
+        switch(base) {
+            case 2: /* Binary formating is not standard, but usefull */
+                size += 2;
+                break;
+            case 8:
+                size++;
+                break;
+            case 16:
+                size += 2;
+                break;
+        }
+    }
+    sgn = 0;
+    if (flags & __PRINTF_FLAG_SIGNED) {
+        if (flags & __PRINTF_FLAG_NEGATIVE) {
+            sgn = '-';
+            size++;
+        } else if (flags & __PRINTF_FLAG_SHOWPLUS) {
+                sgn = '+';
+                size++;
+            } else if (flags & __PRINTF_FLAG_SPACESIGN) {
+                    sgn = ' ';
+                    size++;
+                }
+    }
+    if (flags & __PRINTF_FLAG_LEFTALIGNED) {
+        flags &= ~__PRINTF_FLAG_ZEROPADDED;
+    }
+    /* if number is leftaligned or precision is specified then zeropadding is ignored */
+    if (flags & __PRINTF_FLAG_ZEROPADDED) {
+        if ((precision == 0) && (width > size)) {
+            precision = width - size + number_size;
+        }
+    }
+    /* print leading spaces */
+    if (number_size > precision) /* We must print whole number not only a part */
+        precision = number_size;
+    width -= precision + size - number_size;
+    if (!(flags & __PRINTF_FLAG_LEFTALIGNED)) {
+        while (width-- > 0) {
+            if (printf_putchar(' ', ps) == 1)
+                counter++;
+        }
+    }
+    /* print sign */
+    if (sgn) {
+        if (printf_putchar(sgn, ps) == 1)
+            counter++;
+    }
+    /* print prefix */
+    if (flags & __PRINTF_FLAG_PREFIX) {
+        switch(base) {
+            case 2: /* Binary formating is not standard, but usefull */
+                if (printf_putchar('0', ps) == 1)
+                    counter++;
+                if (flags & __PRINTF_FLAG_BIGCHARS) {
+                    if (printf_putchar('B', ps) == 1)
+                        counter++;
+                } else {
+                    if (printf_putchar('b', ps) == 1)
+                        counter++;
+                }
+                break;
+            case 8:
+                if (printf_putchar('o', ps) == 1)
+                    counter++;
+                break;
+            case 16:
+                if (printf_putchar('0', ps) == 1)
+                    counter++;
+                if (flags & __PRINTF_FLAG_BIGCHARS) {
+                    if (printf_putchar('X', ps) == 1)
+                        counter++;
+                } else {
+                    if (printf_putchar('x', ps) == 1)
+                        counter++;
+                }
+                break;
+        }
+    }
+    /* print leading zeroes */
+    precision -= number_size;
+    while (precision-- > 0) {
+        if (printf_putchar('0', ps) == 1)
+            counter++;
+    }
+    /* print number itself */
+    if ((retval = printf_putstr(++ptr, ps)) > 0) {
+        counter += retval;
+    }
+    /* print ending spaces */
+    while (width-- > 0) {
+        if (printf_putchar(' ', ps) == 1)
+            counter++;
+    }
+    return counter;
+}
+/** Print formatted string.
+ *
+ * Print string formatted according to the fmt parameter
+ * and variadic arguments. Each formatting directive
+ * must have the following form:
+ *
+ *  \% [ FLAGS ] [ WIDTH ] [ .PRECISION ] [ TYPE ] CONVERSION
+ *
+ * FLAGS:@n
+ *  - "#" Force to print prefix.
+ *  For conversion \%o the prefix is 0, for %x and \%X prefixes are 0x and 0X
+ *  and for conversion \%b the prefix is 0b.
+ *
+ *  - "-"   Align to left.
+ *
+ *  - "+"   Print positive sign just as negative.
+ *
+ *  - " "   If the printed number is positive and "+" flag is not set, print space in
+ *  place of sign.
+ *
+ *  - "0"    Print 0 as padding instead of spaces. Zeroes are placed between sign and the
+ *  rest of the number. This flag is ignored if "-" flag is specified.
+ *
+ * WIDTH:@n
+ *  - Specify minimal width of printed argument. If it is bigger, width is ignored.
+ * If width is specified with a "*" character instead of number, width is taken from
+ * parameter list. And integer parameter is expected before parameter for processed
+ * conversion specification. If this value is negative its absolute value is taken
+ * and the "-" flag is set.
+ *
+ * PRECISION:@n
+ *  - Value precision. For numbers it specifies minimum valid numbers.
+ * Smaller numbers are printed with leading zeroes. Bigger numbers are not affected.
+ * Strings with more than precision characters are cut off.
+ * Just as with width, an "*" can be used used instead of a number.
+ * An integer value is then expected in parameters. When both width and precision
+ * are specified using "*", the first parameter is used for width and the second one
+ * for precision.
+ *
+ * TYPE:@n
+ *  - "hh"  Signed or unsigned char.@n
+ *  - "h"   Signed or usigned short.@n
+ *  - ""    Signed or usigned int (default value).@n
+ *  - "l"   Signed or usigned long int.@n
+ *  - "ll"  Signed or usigned long long int.@n
+ *  - "z"   __native (non-standard extension).@n
+ *
+ *
+ * CONVERSION:@n
+ *  - % Print percentile character itself.
+ *
+ *  - c Print single character.
+ *
+ *  - s Print zero terminated string. If a NULL value is passed as value, "(NULL)" is printed instead.
+ *
+ *  - P, p  Print value of a pointer. Void * value is expected and it is printed in hexadecimal notation with prefix
+ *  (as with \%#X or \%#x for 32bit or \%#X / \%#x for 64bit long pointers).
+ *
+ *  - b Print value as unsigned binary number. Prefix is not printed by default. (Nonstandard extension.)
+ *
+ *  - o Print value as unsigned octal number. Prefix is not printed by default.
+ *
+ *  - d,i   Print signed decimal number. There is no difference between d and i conversion.
+ *
+ *  - u Print unsigned decimal number.
+ *
+ *  - X, x  Print hexadecimal number with upper- or lower-case. Prefix is not printed by default.
+ *
+ * All other characters from fmt except the formatting directives
+ * are printed in verbatim.
+ *
+ * @param fmt Formatting NULL terminated string.
+ * @return Number of printed characters or negative value on failure.
+ */
+int printf_core(const char *fmt, struct printf_spec *ps, va_list ap)
+{
+    int irqpri;
+    int i = 0, j = 0; /**< i is index of currently processed char from fmt, j is index to the first not printed nonformating character */
+    int end;
+    int counter; /**< counter of printed characters */
+    int retval; /**< used to store return values from called functions */
+    char c;
+    qualifier_t qualifier;  /* type of argument */
+    int base;   /**< base in which will be parameter (numbers only) printed */
+    __u64 number; /**< argument value */
+    size_t  size; /**< byte size of integer parameter */
+    int width, precision;
+    __u64 flags;
+    counter = 0;
+    irqpri = interrupts_disable();
+    spinlock_lock(&printflock);
+    while ((c = fmt[i])) {
+        /* control character */
+        if (c == '%' ) {
+            /* print common characters if any processed */
+            if (i > j) {
+                if ((retval = printf_putnchars(&fmt[j], (size_t)(i - j), ps)) < 0) { /* error */
+                    counter = -counter;
+                    goto out;
+                }
+                counter += retval;
+            }
+            j = i;
+            /* parse modifiers */
+            flags = 0;
+            end = 0;
+            do {
+                ++i;
+                switch (c = fmt[i]) {
+                    case '#': flags |= __PRINTF_FLAG_PREFIX; break;
+                    case '-': flags |= __PRINTF_FLAG_LEFTALIGNED; break;
+                    case '+': flags |= __PRINTF_FLAG_SHOWPLUS; break;
+                    case ' ': flags |= __PRINTF_FLAG_SPACESIGN; break;
+                    case '0': flags |= __PRINTF_FLAG_ZEROPADDED; break;
+                    default: end = 1;
+                };
+            } while (end == 0);
+            /* width & '*' operator */
+            width = 0;
+            if (isdigit(fmt[i])) {
+                while (isdigit(fmt[i])) {
+                    width *= 10;
+                    width += fmt[i++] - '0';
+                }
+            } else if (fmt[i] == '*') {
+                /* get width value from argument list*/
+                i++;
+                width = (int)va_arg(ap, int);
+                if (width < 0) {
+                    /* negative width means to set '-' flag */
+                    width *= -1;
+                    flags |= __PRINTF_FLAG_LEFTALIGNED;
+                }
+            }
+            /* precision and '*' operator */
+            precision = 0;
+            if (fmt[i] == '.') {
+                ++i;
+                if (isdigit(fmt[i])) {
+                    while (isdigit(fmt[i])) {
+                        precision *= 10;
+                        precision += fmt[i++] - '0';
+                    }
+                } else if (fmt[i] == '*') {
+                    /* get precision value from argument list*/
+                    i++;
+                    precision = (int)va_arg(ap, int);
+                    if (precision < 0) {
+                        /* negative precision means to ignore it */
+                        precision = 0;
+                    }
+                }
+            }
+            switch (fmt[i++]) {
+                /** TODO: unimplemented qualifiers:
+                 * t ptrdiff_t - ISO C 99
+                 */
+                case 'h':   /* char or short */
+                    qualifier = PrintfQualifierShort;
+                    if (fmt[i] == 'h') {
+                        i++;
+                        qualifier = PrintfQualifierByte;
+                    }
+                    break;
+                case 'l':   /* long or long long*/
+                    qualifier = PrintfQualifierLong;
+                    if (fmt[i] == 'l') {
+                        i++;
+                        qualifier = PrintfQualifierLongLong;
+                    }
+                    break;
+                case 'z':   /* __native */
+                    qualifier = PrintfQualifierNative;
+                    break;
+                default:
+                    qualifier = PrintfQualifierInt; /* default type */
+                    --i;
+            }
+            base = 10;
+            switch (c = fmt[i]) {
+                /*
+                * String and character conversions.
+                */
+                case 's':
+                    if ((retval = print_string(va_arg(ap, char*), width, precision, flags, ps)) < 0) {
+                        counter = -counter;
+                        goto out;
+                    };
+                    counter += retval;
+                    j = i + 1;
+                    goto next_char;
+                case 'c':
+                    c = va_arg(ap, unsigned int);
+                    if ((retval = print_char(c, width, flags, ps)) < 0) {
+                        counter = -counter;
+                        goto out;
+                    };
+                    counter += retval;
+                    j = i + 1;
+                    goto next_char;
+                /*
+                 * Integer values
+                */
+                case 'P': /* pointer */
+                        flags |= __PRINTF_FLAG_BIGCHARS;
+                case 'p':
+                    flags |= __PRINTF_FLAG_PREFIX;
+                    base = 16;
+                    qualifier = PrintfQualifierPointer;
+                    break;
+                case 'b':
+                    base = 2;
+                    break;
+                case 'o':
+                    base = 8;
+                    break;
+                case 'd':
+                case 'i':
+                    flags |= __PRINTF_FLAG_SIGNED;
+                case 'u':
+                    break;
+                case 'X':
+                    flags |= __PRINTF_FLAG_BIGCHARS;
+                case 'x':
+                    base = 16;
+                    break;
+                /* percentile itself */
+                case '%':
+                    j = i;
+                    goto next_char;
+                /*
+                * Bad formatting.
+                */
+                default:
+                    /* Unknown format
+                     *  now, the j is index of '%' so we will
+                     * print whole bad format sequence
+                     */
+                    goto next_char;
+            }
+        /* Print integers */
+            /* print number */
+            switch (qualifier) {
+                case PrintfQualifierByte:
+                    size = sizeof(unsigned char);
+                    number = (__u64)va_arg(ap, unsigned int);
+                    break;
+                case PrintfQualifierShort:
+                    size = sizeof(unsigned short);
+                    number = (__u64)va_arg(ap, unsigned int);
+                    break;
+                case PrintfQualifierInt:
+                    size = sizeof(unsigned int);
+                    number = (__u64)va_arg(ap, unsigned int);
+                    break;
+                case PrintfQualifierLong:
+                    size = sizeof(unsigned long);
+                    number = (__u64)va_arg(ap, unsigned long);
+                    break;
+                case PrintfQualifierLongLong:
+                    size = sizeof(unsigned long long);
+                    number = (__u64)va_arg(ap, unsigned long long);
+                    break;
+                case PrintfQualifierPointer:
+                    size = sizeof(void *);
+                    number = (__u64)(unsigned long)va_arg(ap, void *);
+                    break;
+                case PrintfQualifierNative:
+                    size = sizeof(__native);
+                    number = (__u64)va_arg(ap, __native);
+                    break;
+                default: /* Unknown qualifier */
+                    counter = -counter;
+                    goto out;
+            }
+            if (flags & __PRINTF_FLAG_SIGNED) {
+                if (number & (0x1 << (size*8 - 1))) {
+                    flags |= __PRINTF_FLAG_NEGATIVE;
+                    if (size == sizeof(__u64)) {
+                        number = -((__s64)number);
+                    } else {
+                        number = ~number;
+                        number &= (~((0xFFFFFFFFFFFFFFFFll) <<  (size * 8)));
+                        number++;
+                    }
+                }
+            }
+            if ((retval = print_number(number, width, precision, base, flags, ps)) < 0) {
+                counter = -counter;
+                goto out;
+            };
+            counter += retval;
+            j = i + 1;
+        }
+next_char:
+        ++i;
+    }
+    if (i > j) {
+        if ((retval = printf_putnchars(&fmt[j], (__native)(i - j), ps)) < 0) { /* error */
+            counter = -counter;
+            goto out;
+        }
+        counter += retval;
+    }
+out:
+    spinlock_unlock(&printflock);
+    interrupts_restore(irqpri);
+    return counter;
+}
+ /** @}
+ */

 /tags/0.2.0.2/kernel/generic/src/printf/vsprintf.c
 ,0 → 1,45
+/*
+ * Copyright (C) 2006 Josef Cejka
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup generic
+ * @{
+ */
+/** @file
+ */
+#include <print.h>
+int vsprintf(char *str, const char *fmt, va_list ap)
+{
+    return vsnprintf(str, (size_t)-1, fmt, ap);
+}
+ /** @}
+ */

 /tags/0.2.0.2/kernel/generic/src/security/cap.c
 ,0 → 1,185
+/*
+ * Copyright (C) 2006 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup generic
+ * @{
+ */
+/**
+ * @file    cap.c
+ * @brief   Capabilities control.
+ *
+ * @see cap.h
+ */
+#include <security/cap.h>
+#include <proc/task.h>
+#include <synch/spinlock.h>
+#include <syscall/sysarg64.h>
+#include <syscall/copy.h>
+#include <arch.h>
+#include <typedefs.h>
+#include <errno.h>
+/** Set capabilities.
+ *
+ * @param t Task whose capabilities are to be changed.
+ * @param caps New set of capabilities.
+ */
+void cap_set(task_t *t, cap_t caps)
+{
+    ipl_t ipl;
+    ipl = interrupts_disable();
+    spinlock_lock(&t->lock);
+    t->capabilities = caps;
+    spinlock_unlock(&t->lock);
+    interrupts_restore(ipl);
+}
+/** Get capabilities.
+ *
+ * @param t Task whose capabilities are to be returned.
+ * @return Task's capabilities.
+ */
+cap_t cap_get(task_t *t)
+{
+    ipl_t ipl;
+    cap_t caps;
+    ipl = interrupts_disable();
+    spinlock_lock(&t->lock);
+    caps = t->capabilities;
+    spinlock_unlock(&t->lock);
+    interrupts_restore(ipl);
+    return caps;
+}
+/** Grant capabilities to a task.
+ *
+ * The calling task must have the CAP_CAP capability.
+ *
+ * @param uspace_taskid_arg Userspace structure holding destination task ID.
+ * @param caps Capabilities to grant.
+ *
+ * @return Zero on success or an error code from @ref errno.h.
+ */
+__native sys_cap_grant(sysarg64_t *uspace_taskid_arg, cap_t caps)
+{
+    sysarg64_t taskid_arg;
+    task_t *t;
+    ipl_t ipl;
+    int rc;
+    if (!(cap_get(TASK) & CAP_CAP))
+        return (__native) EPERM;
+    rc = copy_from_uspace(&taskid_arg, uspace_taskid_arg, sizeof(sysarg64_t));
+    if (rc != 0)
+        return (__native) rc;
+    ipl = interrupts_disable();
+    spinlock_lock(&tasks_lock);
+    t = task_find_by_id((task_id_t) taskid_arg.value);
+    if (!t) {
+        spinlock_unlock(&tasks_lock);
+        interrupts_restore(ipl);
+        return (__native) ENOENT;
+    }
+    spinlock_lock(&t->lock);
+    cap_set(t, cap_get(t) | caps);
+    spinlock_unlock(&t->lock);
+    spinlock_unlock(&tasks_lock);
+    interrupts_restore(ipl);
+    return 0;
+}
+/** Revoke capabilities from a task.
+ *
+ * The calling task must have the CAP_CAP capability or the caller must
+ * attempt to revoke capabilities from itself.
+ *
+ * @param uspace_taskid_arg Userspace structure holding destination task ID.
+ * @param caps Capabilities to revoke.
+ *
+ * @return Zero on success or an error code from @ref errno.h.
+ */
+__native sys_cap_revoke(sysarg64_t *uspace_taskid_arg, cap_t caps)
+{
+    sysarg64_t taskid_arg;
+    task_t *t;
+    ipl_t ipl;
+    int rc;
+    rc = copy_from_uspace(&taskid_arg, uspace_taskid_arg, sizeof(sysarg64_t));
+    if (rc != 0)
+        return (__native) rc;
+    ipl = interrupts_disable();
+    spinlock_lock(&tasks_lock);
+    t = task_find_by_id((task_id_t) taskid_arg.value);
+    if (!t) {
+        spinlock_unlock(&tasks_lock);
+        interrupts_restore(ipl);
+        return (__native) ENOENT;
+    }
+    /*
+     * Revoking capabilities is different from granting them in that
+     * a task can revoke capabilities from itself even if it
+     * doesn't have CAP_CAP.
+     */
+    if (!(cap_get(TASK) & CAP_CAP) || !(t == TASK)) {
+        spinlock_unlock(&tasks_lock);
+        interrupts_restore(ipl);
+        return (__native) EPERM;
+    }
+    spinlock_lock(&t->lock);
+    cap_set(t, cap_get(t) & ~caps);
+    spinlock_unlock(&t->lock);
+    spinlock_unlock(&tasks_lock);
+    interrupts_restore(ipl);
+    return 0;
+}
+ /** @}
+ */

 /tags/0.2.0.2/kernel/generic/src/preempt/preemption.c
 ,0 → 1,61
+/*
+ * Copyright (C) 2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup generic
+ * @{
+ */
+/**
+ * @file    preemption.c
+ * @brief   Preemption control.
+ */
+#include <preemption.h>
+#include <arch.h>
+#include <arch/asm.h>
+#include <arch/barrier.h>
+#include <debug.h>
+/** Increment preemption disabled counter. */
+void preemption_disable(void)
+{
+    THE->preemption_disabled++;
+    memory_barrier();
+}
+/** Decrement preemption disabled counter. */
+void preemption_enable(void)
+{
+    ASSERT(THE->preemption_disabled);
+    memory_barrier();
+    THE->preemption_disabled--;
+}
+ /** @}
+ */

 /tags/0.2.0.2/kernel/Makefile
 ,0 → 1,269
+#
+# Copyright (C) 2005 Martin Decky
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# - Redistributions of source code must retain the above copyright
+#   notice, this list of conditions and the following disclaimer.
+# - Redistributions in binary form must reproduce the above copyright
+#   notice, this list of conditions and the following disclaimer in the
+#   documentation and/or other materials provided with the distribution.
+# - The name of the author may not be used to endorse or promote products
+#   derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+## Kernel release
+#
+VERSION = 0
+PATCHLEVEL = 2
+SUBLEVEL = 0
+EXTRAVERSION = 2
+NAME = Daylight
+ifdef EXTRAVERSION
+RELEASE = $(VERSION).$(PATCHLEVEL).$(SUBLEVEL).$(EXTRAVERSION)
+else
+RELEASE = $(VERSION).$(PATCHLEVEL).$(SUBLEVEL)
+endif
+## Include configuration
+#
+-include Makefile.config
+## Common compiler flags
+#
+DEFS = -D$(ARCH) -DARCH=\"$(ARCH)\" -DRELEASE=\"$(RELEASE)\" "-DNAME=\"$(NAME)\"" -DKERNEL
+CFLAGS = -fno-builtin -fomit-frame-pointer -Wall -Werror-implicit-function-declaration -Wmissing-prototypes -Werror -O3 -nostdlib -nostdinc -Igeneric/include/
+LFLAGS = -M
+AFLAGS =
+ifdef REVISION
+    DEFS += "-DREVISION=\"$(REVISION)\""
+endif
+ifdef TIMESTAMP
+    DEFS += "-DTIMESTAMP=\"$(TIMESTAMP)\""
+endif
+## Setup kernel configuration
+#
+-include arch/$(ARCH)/Makefile.inc
+-include genarch/Makefile.inc
+ifeq ($(CONFIG_DEBUG),y)
+    DEFS += -DCONFIG_DEBUG
+endif
+ifeq ($(CONFIG_DEBUG_SPINLOCK),y)
+    DEFS += -DCONFIG_DEBUG_SPINLOCK
+endif
+ifeq ($(CONFIG_DEBUG_AS_WATCHPOINT),y)
+    DEFS += -DCONFIG_DEBUG_AS_WATCHPOINT
+endif
+ifeq ($(CONFIG_FPU_LAZY),y)
+    DEFS += -DCONFIG_FPU_LAZY
+endif
+ifeq ($(CONFIG_DEBUG_ALLREGS),y)
+    DEFS += -DCONFIG_DEBUG_ALLREGS
+endif
+ifeq ($(CONFIG_VHPT),y)
+    DEFS += -DCONFIG_VHPT
+endif
+ifeq ($(CONFIG_POWEROFF),y)
+    DEFS += -DCONFIG_POWEROFF
+endif
+ifeq ($(CONFIG_FB),y)
+ifeq ($(ARCH),ia32)
+    DEFS += -DCONFIG_VESA_WIDTH=$(CONFIG_VESA_WIDTH)
+    DEFS += -DCONFIG_VESA_HEIGHT=$(CONFIG_VESA_HEIGHT)
+    DEFS += -DCONFIG_VESA_BPP=$(CONFIG_VESA_BPP)
+endif
+ifeq ($(ARCH),amd64)
+    DEFS += -DCONFIG_VESA_WIDTH=$(CONFIG_VESA_WIDTH)
+    DEFS += -DCONFIG_VESA_HEIGHT=$(CONFIG_VESA_HEIGHT)
+    DEFS += -DCONFIG_VESA_BPP=$(CONFIG_VESA_BPP)
+endif
+endif
+## Toolchain configuration
+#
+ifeq ($(COMPILER),native)
+    CC = gcc
+    AS = as
+    LD = ld
+    OBJCOPY = objcopy
+    OBJDUMP = objdump
+else
+    CC = $(TOOLCHAIN_DIR)/$(TARGET)-gcc
+    AS = $(TOOLCHAIN_DIR)/$(TARGET)-as
+    LD = $(TOOLCHAIN_DIR)/$(TARGET)-ld
+    OBJCOPY = $(TOOLCHAIN_DIR)/$(TARGET)-objcopy
+    OBJDUMP = $(TOOLCHAIN_DIR)/$(TARGET)-objdump
+endif
+## Generic kernel sources
+#
+GENERIC_SOURCES = \
+    generic/src/adt/bitmap.c \
+    generic/src/adt/btree.c \
+    generic/src/adt/hash_table.c \
+    generic/src/adt/list.c \
+    generic/src/console/chardev.c \
+    generic/src/console/console.c \
+    generic/src/console/kconsole.c \
+    generic/src/console/klog.c \
+    generic/src/console/cmd.c \
+    generic/src/cpu/cpu.c \
+    generic/src/ddi/ddi.c \
+    generic/src/interrupt/interrupt.c \
+    generic/src/main/main.c \
+    generic/src/main/kinit.c \
+    generic/src/main/uinit.c \
+    generic/src/main/version.c \
+    generic/src/proc/scheduler.c \
+    generic/src/proc/thread.c \
+    generic/src/proc/task.c \
+    generic/src/proc/the.c \
+    generic/src/syscall/syscall.c \
+    generic/src/syscall/copy.c \
+    generic/src/mm/buddy.c \
+    generic/src/mm/frame.c \
+    generic/src/mm/page.c \
+    generic/src/mm/tlb.c \
+    generic/src/mm/as.c \
+    generic/src/mm/backend_anon.c \
+    generic/src/mm/backend_elf.c \
+    generic/src/mm/backend_phys.c \
+    generic/src/mm/slab.c \
+    generic/src/lib/func.c \
+    generic/src/lib/memstr.c \
+    generic/src/lib/sort.c \
+    generic/src/lib/elf.c \
+    generic/src/printf/printf_core.c \
+    generic/src/printf/printf.c \
+    generic/src/printf/sprintf.c \
+    generic/src/printf/snprintf.c \
+    generic/src/printf/vprintf.c \
+    generic/src/printf/vsprintf.c \
+    generic/src/printf/vsnprintf.c \
+    generic/src/debug/symtab.c \
+    generic/src/time/clock.c \
+    generic/src/time/timeout.c \
+    generic/src/time/delay.c \
+    generic/src/preempt/preemption.c \
+    generic/src/synch/spinlock.c \
+    generic/src/synch/condvar.c \
+    generic/src/synch/rwlock.c \
+    generic/src/synch/mutex.c \
+    generic/src/synch/semaphore.c \
+    generic/src/synch/waitq.c \
+    generic/src/synch/futex.c \
+    generic/src/smp/ipi.c \
+    generic/src/ipc/ipc.c \
+    generic/src/ipc/sysipc.c \
+    generic/src/ipc/ipcrsc.c \
+    generic/src/ipc/irq.c \
+    generic/src/security/cap.c \
+    generic/src/sysinfo/sysinfo.c
+## Test sources
+#
+ifneq ($(CONFIG_TEST),)
+    DEFS += -DCONFIG_TEST
+    GENERIC_SOURCES += test/$(CONFIG_TEST)/test.c
+endif
+GENERIC_OBJECTS := $(addsuffix .o,$(basename $(GENERIC_SOURCES)))
+ARCH_OBJECTS := $(addsuffix .o,$(basename $(ARCH_SOURCES)))
+GENARCH_OBJECTS := $(addsuffix .o,$(basename $(GENARCH_SOURCES)))
+.PHONY: all build config distclean clean archlinks depend disasm
+all:
+    tools/config.py default $(NARCH)
+ifdef NARCH
+ ifneq ($(ARCH), $(NARCH))
+    $(MAKE) -C . clean
+ endif
+endif
+    $(MAKE) -C . build
+build: kernel.bin disasm
+config:
+    -rm Makefile.depend
+    tools/config.py
+-include Makefile.depend
+distclean: clean
+    -rm Makefile.config
+clean:
+    -rm -f kernel.bin kernel.raw kernel.map kernel.map.pre kernel.objdump kernel.disasm generic/src/debug/real_map.bin Makefile.depend* generic/include/arch generic/include/genarch arch/$(ARCH)/_link.ld
+    find generic/src/ arch/*/src/ genarch/src/ test/ -name '*.o' -follow -exec rm \{\} \;
+    for arch in arch/*; do \
+        [ -e $$arch/_link.ld ] && rm $$arch/_link.ld 2>/dev/null;\
+    done;exit 0
+archlinks:
+    ln -sfn ../../arch/$(ARCH)/include/ generic/include/arch
+    ln -sfn ../../genarch/include/ generic/include/genarch
+depend: archlinks
+    -makedepend $(DEFS) $(CFLAGS) -f - $(ARCH_SOURCES) $(GENARCH_SOURCES) $(GENERIC_SOURCES) > Makefile.depend 2> /dev/null
+arch/$(ARCH)/_link.ld: arch/$(ARCH)/_link.ld.in
+    $(CC) $(DEFS) $(CFLAGS) -D__ASM__ -E -x c $< | grep -v "^\#" > $@
+generic/src/debug/real_map.bin: depend arch/$(ARCH)/_link.ld $(ARCH_OBJECTS) $(GENARCH_OBJECTS) $(GENERIC_OBJECTS)
+    $(OBJCOPY) -I binary -O $(BFD_NAME) -B $(BFD_ARCH) --prefix-sections=symtab Makefile generic/src/debug/empty_map.o
+    $(LD) -T arch/$(ARCH)/_link.ld $(LFLAGS) $(ARCH_OBJECTS) $(GENARCH_OBJECTS) $(GENERIC_OBJECTS) generic/src/debug/empty_map.o -o $@ -Map kernel.map.pre
+    $(OBJDUMP) -t $(ARCH_OBJECTS) $(GENARCH_OBJECTS) $(GENERIC_OBJECTS) > kernel.objdump
+    tools/genmap.py kernel.map.pre kernel.objdump generic/src/debug/real_map.bin
+    # Do it once again, this time to get correct even the symbols
+    # on architectures, that have bss after symtab
+    $(OBJCOPY) -I binary -O $(BFD_NAME) -B $(BFD_ARCH) --prefix-sections=symtab generic/src/debug/real_map.bin generic/src/debug/sizeok_map.o
+    $(LD) -T arch/$(ARCH)/_link.ld $(LFLAGS) $(ARCH_OBJECTS) $(GENARCH_OBJECTS) $(GENERIC_OBJECTS) generic/src/debug/sizeok_map.o -o $@ -Map kernel.map.pre
+    $(OBJDUMP) -t $(ARCH_OBJECTS) $(GENARCH_OBJECTS) $(GENERIC_OBJECTS) > kernel.objdump
+    tools/genmap.py kernel.map.pre kernel.objdump generic/src/debug/real_map.bin
+generic/src/debug/real_map.o: generic/src/debug/real_map.bin
+    $(OBJCOPY) -I binary -O $(BFD_NAME) -B $(BFD_ARCH) --prefix-sections=symtab $< $@
+kernel.raw: depend arch/$(ARCH)/_link.ld $(ARCH_OBJECTS) $(GENARCH_OBJECTS) $(GENERIC_OBJECTS) generic/src/debug/real_map.o
+    $(LD) -T arch/$(ARCH)/_link.ld $(LFLAGS) $(ARCH_OBJECTS) $(GENARCH_OBJECTS) $(GENERIC_OBJECTS) generic/src/debug/real_map.o -o $@ -Map kernel.map
+kernel.bin: kernel.raw
+    $(OBJCOPY) -O $(BFD) kernel.raw kernel.bin
+disasm: kernel.raw
+    $(OBJDUMP) -d kernel.raw > kernel.disasm
+%.o: %.S
+    $(CC) $(DEFS) $(CFLAGS) -D__ASM__ -c $< -o $@
+%.o: %.s
+    $(AS) $(AFLAGS) $< -o $@
+%.o: %.c
+    $(CC) $(DEFS) $(CFLAGS) -c $< -o $@

 /tags/0.2.0.2/kernel/arch/mips32/src/start.S
 ,0 → 1,337
+#
+# Copyright (C) 2003-2004 Jakub Jermar
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# - Redistributions of source code must retain the above copyright
+#   notice, this list of conditions and the following disclaimer.
+# - Redistributions in binary form must reproduce the above copyright
+#   notice, this list of conditions and the following disclaimer in the
+#   documentation and/or other materials provided with the distribution.
+# - The name of the author may not be used to endorse or promote products
+#   derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+#include <arch/asm/regname.h>
+#include <arch/mm/page.h>
+#include <arch/asm/boot.h>
+#include <arch/context_offset.h>
+.text
+.set noat
+.set noreorder
+.set nomacro
+.global kernel_image_start
+.global tlb_refill_entry
+.global cache_error_entry
+.global exception_entry
+.global userspace_asm
+# Which status bits should are thread-local
+#define REG_SAVE_MASK 0x1f # KSU(UM), EXL, ERL, IE
+# Save registers to space defined by \r
+# We will change status: Disable ERL,EXL,UM,IE
+# These changes will be automatically reversed in REGISTER_LOAD
+# SP is NOT saved as part of these registers
+.macro REGISTERS_STORE_AND_EXC_RESET r
+    sw $at,EOFFSET_AT(\r)
+    sw $v0,EOFFSET_V0(\r)
+    sw $v1,EOFFSET_V1(\r)
+    sw $a0,EOFFSET_A0(\r)
+    sw $a1,EOFFSET_A1(\r)
+    sw $a2,EOFFSET_A2(\r)
+    sw $a3,EOFFSET_A3(\r)
+    sw $t0,EOFFSET_T0(\r)
+    sw $t1,EOFFSET_T1(\r)
+    sw $t2,EOFFSET_T2(\r)
+    sw $t3,EOFFSET_T3(\r)
+    sw $t4,EOFFSET_T4(\r)
+    sw $t5,EOFFSET_T5(\r)
+    sw $t6,EOFFSET_T6(\r)
+    sw $t7,EOFFSET_T7(\r)
+    sw $t8,EOFFSET_T8(\r)
+    sw $t9,EOFFSET_T9(\r)
+    mflo $at
+    sw $at, EOFFSET_LO(\r)
+    mfhi $at
+    sw $at, EOFFSET_HI(\r)
+#ifdef CONFIG_DEBUG_ALLREGS
+    sw $s0,EOFFSET_S0(\r)
+    sw $s1,EOFFSET_S1(\r)
+    sw $s2,EOFFSET_S2(\r)
+    sw $s3,EOFFSET_S3(\r)
+    sw $s4,EOFFSET_S4(\r)
+    sw $s5,EOFFSET_S5(\r)
+    sw $s6,EOFFSET_S6(\r)
+    sw $s7,EOFFSET_S7(\r)
+    sw $s8,EOFFSET_S8(\r)
+#endif
+    sw $gp,EOFFSET_GP(\r)
+    sw $ra,EOFFSET_RA(\r)
+    sw $k1,EOFFSET_K1(\r)
+    mfc0 $t0, $status
+    mfc0 $t1, $epc
+    and $t2, $t0, REG_SAVE_MASK  # Save only KSU,EXL,ERL,IE
+    li $t3, ~(0x1f)
+    and $t0, $t0, $t3           # Clear KSU,EXL,ERL,IE
+    sw $t2,EOFFSET_STATUS(\r)
+    sw $t1,EOFFSET_EPC(\r)
+    mtc0 $t0, $status
+.endm
+.macro REGISTERS_LOAD r
+    # Update only UM,EXR,IE from status, the rest
+    # is controlled by OS and not bound to task
+    mfc0 $t0, $status
+    lw $t1,EOFFSET_STATUS(\r)
+    li $t2, ~REG_SAVE_MASK    # Mask UM,EXL,ERL,IE
+    and $t0, $t0, $t2
+    or $t0, $t0, $t1   # Copy UM,EXL,ERL,IE from saved status
+    mtc0 $t0, $status
+    lw $v0,EOFFSET_V0(\r)
+    lw $v1,EOFFSET_V1(\r)
+    lw $a0,EOFFSET_A0(\r)
+    lw $a1,EOFFSET_A1(\r)
+    lw $a2,EOFFSET_A2(\r)
+    lw $a3,EOFFSET_A3(\r)
+    lw $t0,EOFFSET_T0(\r)
+    lw $t1,EOFFSET_T1(\r)
+    lw $t2,EOFFSET_T2(\r)
+    lw $t3,EOFFSET_T3(\r)
+    lw $t4,EOFFSET_T4(\r)
+    lw $t5,EOFFSET_T5(\r)
+    lw $t6,EOFFSET_T6(\r)
+    lw $t7,EOFFSET_T7(\r)
+    lw $t8,EOFFSET_T8(\r)
+    lw $t9,EOFFSET_T9(\r)
+#ifdef CONFIG_DEBUG_ALLREGS
+    lw $s0,EOFFSET_S0(\r)
+    lw $s1,EOFFSET_S1(\r)
+    lw $s2,EOFFSET_S2(\r)
+    lw $s3,EOFFSET_S3(\r)
+    lw $s4,EOFFSET_S4(\r)
+    lw $s5,EOFFSET_S5(\r)
+    lw $s6,EOFFSET_S6(\r)
+    lw $s7,EOFFSET_S7(\r)
+    lw $s8,EOFFSET_S8(\r)
+#endif
+    lw $gp,EOFFSET_GP(\r)
+    lw $ra,EOFFSET_RA(\r)
+    lw $k1,EOFFSET_K1(\r)
+    lw $at,EOFFSET_LO(\r)
+    mtlo $at
+    lw $at,EOFFSET_HI(\r)
+    mthi $at
+    lw $at,EOFFSET_EPC(\r)
+    mtc0 $at, $epc
+    lw $at,EOFFSET_AT(\r)
+    lw $sp,EOFFSET_SP(\r)
+.endm
+# Move kernel stack pointer address to register K0
+# - if we are in user mode, load the appropriate stack
+# address
+.macro KERNEL_STACK_TO_K0
+    # If we are in user mode
+    mfc0 $k0, $status
+    andi $k0, 0x10
+    beq $k0, $0, 1f
+    add $k0, $sp, 0
+    # Move $k0 pointer to kernel stack
+    lui $k0, %hi(supervisor_sp)
+    ori $k0, $k0, %lo(supervisor_sp)
+    # Move $k0 (superveisor_sp)
+    lw $k0, 0($k0)
+:
+.endm
+.org 0x0
+kernel_image_start:
+    /* Load temporary stack */
+    lui $sp, %hi(end_stack)
+    ori $sp, $sp, %lo(end_stack)
+    /* $a1 contains physical address of bootinfo_t */
+    /* $a2 contains size of bootinfo_t */
+    beq $a2, $0, bootinfo_end
+    /* Not sure about this, but might be needed for PIC code???? */
+    lui $gp, 0x8000
+    lui $a3, %hi(bootinfo)
+    ori $a3, $a3, %lo(bootinfo)
+    bootinfo_loop:
+        lw $v0, 0($a1)
+        sw $v0, 0($a3)
+        addi $a1, $a1, 4
+        addi $a3, $a3, 4
+        addi $a2, $a2, -4
+        bgtz $a2, bootinfo_loop
+        nop
+    bootinfo_end:
+    jal arch_pre_main
+    nop
+    j main_bsp
+    nop
+    .space TEMP_STACK_SIZE
+end_stack:
+tlb_refill_entry:
+    j tlb_refill_handler
+    nop
+cache_error_entry:
+    j cache_error_handler
+    nop
+exception_entry:
+    j exception_handler
+    nop
+exception_handler:
+    KERNEL_STACK_TO_K0
+    sub $k0, REGISTER_SPACE
+    sw $sp,EOFFSET_SP($k0)
+    move $sp, $k0
+    mfc0 $k0, $cause
+    sra $k0, $k0, 0x2     # cp0_exc_cause() part 1
+    andi $k0, $k0, 0x1f   # cp0_exc_cause() part 2
+    sub $k0, 8            # 8=SYSCALL
+    beqz $k0, syscall_shortcut
+    add $k0, 8            # Revert $k0 back to correct exc number
+    REGISTERS_STORE_AND_EXC_RESET $sp
+    move $a1, $sp
+    jal exc_dispatch      # exc_dispatch(excno, register_space)
+    move $a0, $k0
+    REGISTERS_LOAD $sp
+    # The $sp is automatically restored to former value
+    eret
+# it seems that mips reserves some space on stack for varfuncs???
+#define SS_ARG4   16
+#define SS_SP     EOFFSET_SP
+#define SS_STATUS EOFFSET_STATUS
+#define SS_EPC    EOFFSET_EPC
+#define SS_K1     EOFFSET_K1
+syscall_shortcut:
+    # We have a lot of space on the stack, with free use
+    mfc0 $t1, $epc
+    mfc0 $t0, $status
+    sw $t1,SS_EPC($sp)  # Save EPC
+    sw $k1,SS_K1($sp)   # Save k1, which is not saved during context switch
+    and $t2, $t0, REG_SAVE_MASK # Save only KSU,EXL,ERL,IE
+    li $t3, ~(0x1f)
+    and $t0, $t0, $t3           # Clear KSU,EXL,ERL
+    ori $t0, $t0, 0x1           # Set IE
+    sw $t2,SS_STATUS($sp)
+    mtc0 $t0, $status
+    # CALL Syscall handler
+    jal syscall_handler
+    sw $v0, SS_ARG4($sp)        # save v0 - arg4 to stack
+    # restore status
+    mfc0 $t0, $status
+    lw $t1,SS_STATUS($sp)
+    # Change back to EXL=1(from last exception), otherwise
+    # an interrupt could rewrite the CP0-EPC
+    li $t2, ~REG_SAVE_MASK      # Mask UM,EXL,ERL,IE
+    and $t0, $t0, $t2
+    or $t0, $t0, $t1            # Copy UM,EXL,ERL,IE from saved status
+    mtc0 $t0, $status
+    # restore epc+4
+    lw $t0,SS_EPC($sp)
+    lw $k1,SS_K1($sp)
+    addi $t0, $t0, 4
+    mtc0 $t0, $epc
+    lw $sp,SS_SP($sp) # restore sp
+    eret
+tlb_refill_handler:
+    KERNEL_STACK_TO_K0
+    sub $k0, REGISTER_SPACE
+    REGISTERS_STORE_AND_EXC_RESET $k0
+    sw $sp,EOFFSET_SP($k0)
+    add $sp, $k0, 0
+    jal tlb_refill /* tlb_refill(register_space) */
+    add $a0, $sp, 0
+    REGISTERS_LOAD $sp
+    eret
+cache_error_handler:
+    KERNEL_STACK_TO_K0
+    sub $k0, REGISTER_SPACE
+    REGISTERS_STORE_AND_EXC_RESET $k0
+    sw $sp,EOFFSET_SP($k0)
+    add $sp, $k0, 0
+    jal cache_error
+    nop
+    REGISTERS_LOAD $sp
+    eret
+userspace_asm:
+    add $sp, $a0, 0
+    add $v0, $a1, 0
+    add $t9, $a2, 0   # Set up correct entry into PIC code
+    eret

 /tags/0.2.0.2/kernel/arch/mips32/src/mips32.c
 ,0 → 1,185
+/*
+ * Copyright (C) 2003-2004 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup mips32
+ * @{
+ */
+/** @file
+ */
+#include <arch.h>
+#include <arch/boot.h>
+#include <arch/cp0.h>
+#include <arch/exception.h>
+#include <arch/asm.h>
+#include <mm/as.h>
+#include <userspace.h>
+#include <arch/console.h>
+#include <memstr.h>
+#include <proc/thread.h>
+#include <proc/uarg.h>
+#include <print.h>
+#include <syscall/syscall.h>
+#include <sysinfo/sysinfo.h>
+#include <arch/interrupt.h>
+#include <arch/drivers/arc.h>
+#include <console/chardev.h>
+#include <arch/debugger.h>
+#include <genarch/fb/fb.h>
+#include <debug.h>
+#include <arch/asm/regname.h>
+/* Size of the code jumping to the exception handler code
+ * - J+NOP
+ */
+#define EXCEPTION_JUMP_SIZE    8
+#define TLB_EXC ((char *) 0x80000000)
+#define NORM_EXC ((char *) 0x80000180)
+#define CACHE_EXC ((char *) 0x80000100)
+/* Why the linker moves the variable 64K away in assembler
+ * when not in .text section ????????
+ */
+__address supervisor_sp __attribute__ ((section (".text")));
+/* Stack pointer saved when entering user mode */
+/* TODO: How do we do it on SMP system???? */
+bootinfo_t bootinfo __attribute__ ((section (".text")));
+void arch_pre_main(void)
+{
+    /* Setup usermode */
+    init.cnt = bootinfo.cnt;
+    __u32 i;
+    for (i = 0; i < bootinfo.cnt; i++) {
+        init.tasks[i].addr = bootinfo.tasks[i].addr;
+        init.tasks[i].size = bootinfo.tasks[i].size;
+    }
+}
+void arch_pre_mm_init(void)
+{
+    /* It is not assumed by default */
+    interrupts_disable();
+    /* Initialize dispatch table */
+    exception_init();
+    arc_init();
+    /* Copy the exception vectors to the right places */
+    memcpy(TLB_EXC, (char *)tlb_refill_entry, EXCEPTION_JUMP_SIZE);
+    memcpy(NORM_EXC, (char *)exception_entry, EXCEPTION_JUMP_SIZE);
+    memcpy(CACHE_EXC, (char *)cache_error_entry, EXCEPTION_JUMP_SIZE);
+    interrupt_init();
+    /*
+     * Switch to BEV normal level so that exception vectors point to the kernel.
+     * Clear the error level.
+     */
+    cp0_status_write(cp0_status_read() & ~(cp0_status_bev_bootstrap_bit|cp0_status_erl_error_bit));
+    /*
+     * Mask all interrupts
+     */
+    cp0_mask_all_int();
+    /*
+     * Unmask hardware clock interrupt.
+     */
+    cp0_unmask_int(TIMER_IRQ);
+    console_init();
+    debugger_init();
+}
+void arch_post_mm_init(void)
+{
+#ifdef CONFIG_FB
+    fb_init(0x12000000, 640, 480, 24, 1920); // gxemul framebuffer
+#endif
+    sysinfo_set_item_val("machine." STRING(MACHINE),NULL,1);
+}
+void arch_pre_smp_init(void)
+{
+}
+void arch_post_smp_init(void)
+{
+}
+void userspace(uspace_arg_t *kernel_uarg)
+{
+    /* EXL=1, UM=1, IE=1 */
+    cp0_status_write(cp0_status_read() | (cp0_status_exl_exception_bit |
+                          cp0_status_um_bit |
+                          cp0_status_ie_enabled_bit));
+    cp0_epc_write((__address) kernel_uarg->uspace_entry);
+    userspace_asm(((__address) kernel_uarg->uspace_stack+PAGE_SIZE),
+              (__address) kernel_uarg->uspace_uarg,
+              (__address) kernel_uarg->uspace_entry);
+    while (1)
+        ;
+}
+/** Perform mips32 specific tasks needed before the new task is run. */
+void before_task_runs_arch(void)
+{
+}
+/** Perform mips32 specific tasks needed before the new thread is scheduled. */
+void before_thread_runs_arch(void)
+{
+    supervisor_sp = (__address) &THREAD->kstack[THREAD_STACK_SIZE-SP_DELTA];
+}
+void after_thread_ran_arch(void)
+{
+}
+/** Set thread-local-storage pointer
+ *
+ * We have it currently in K1, it is
+ * possible to have it separately in the future.
+ */
+__native sys_tls_set(__native addr)
+{
+    return 0;
+}
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/mips32/src/drivers/msim.c
 ,0 → 1,131
+/*
+ * Copyright (C) 2005 Ondrej Palkovsky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup mips32
+ * @{
+ */
+/** @file
+ */
+#include <interrupt.h>
+#include <console/chardev.h>
+#include <arch/drivers/msim.h>
+#include <arch/cp0.h>
+#include <console/console.h>
+static chardev_t console;
+static void msim_write(chardev_t *dev, const char ch);
+static void msim_enable(chardev_t *dev);
+static void msim_disable(chardev_t *dev);
+static char msim_do_read(chardev_t *dev);
+static chardev_operations_t msim_ops = {
+    .resume = msim_enable,
+    .suspend = msim_disable,
+    .write = msim_write,
+    .read = msim_do_read,
+};
+/** Putchar that works with MSIM & gxemul */
+void msim_write(chardev_t *dev, const char ch)
+{
+    *((char *) MSIM_VIDEORAM) = ch;
+}
+/* Called from getc(). */
+void msim_enable(chardev_t *dev)
+{
+    cp0_unmask_int(MSIM_KBD_IRQ);
+}
+/* Called from getc(). */
+void msim_disable(chardev_t *dev)
+{
+    cp0_mask_int(MSIM_KBD_IRQ);
+}
+#include <print.h>
+/** Read character using polling, assume interrupts disabled */
+static char msim_do_read(chardev_t *dev)
+{
+    char ch;
+    while (1) {
+        ch = *((volatile char *) MSIM_KBD_ADDRESS);
+        if (ch) {
+            if (ch == '\r')
+                return '\n';
+            if (ch == 0x7f)
+                return '\b';
+            return ch;
+        }
+    }
+}
+/** Process keyboard interrupt. */
+static void msim_interrupt(int n, istate_t *istate)
+{
+    char ch = 0;
+    ch = *((char *) MSIM_KBD_ADDRESS);
+    if (ch =='\r')
+        ch = '\n';
+    if (ch == 0x7f)
+        ch = '\b';
+    chardev_push_character(&console, ch);
+}
+/* Return console object representing msim console */
+void msim_console(void)
+{
+    chardev_initialize("msim_console", &console, &msim_ops);
+    int_register(MSIM_KBD_IRQ, "msim_kbd", msim_interrupt);
+    cp0_unmask_int(MSIM_KBD_IRQ);
+    stdin = &console;
+    stdout = &console;
+}
+static iroutine oldvector;
+void msim_kbd_grab(void)
+{
+    oldvector = int_register(MSIM_KBD_IRQ, "msim_kbd", msim_interrupt);
+}
+void msim_kbd_release(void)
+{
+    if (oldvector)
+        int_register(MSIM_KBD_IRQ, "user_interrupt", oldvector);
+}
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/mips32/src/drivers/serial.c
 ,0 → 1,148
+/*
+ * Copyright (C) 2005 Ondrej Palkovsky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup mips32
+ * @{
+ */
+/** @file
+ */
+#include <interrupt.h>
+#include <arch/cp0.h>
+#include <arch/drivers/serial.h>
+#include <console/chardev.h>
+#include <console/console.h>
+static chardev_t console;
+static serial_t sconf[SERIAL_MAX];
+static bool kb_enabled;
+static void serial_write(chardev_t *d, const char ch)
+{
+    serial_t *sd = (serial_t *)d->data;
+    if (ch == '\n')
+        serial_write(d, '\r');
+    /* Wait until transmit buffer empty */
+    while (! (SERIAL_READ_LSR(sd->port) & (1<<TRANSMIT_EMPTY_BIT)))
+        ;
+    SERIAL_WRITE(sd->port, ch);
+}
+static void serial_enable(chardev_t *d)
+{
+    kb_enabled = true;
+}
+static void serial_disable(chardev_t *d)
+{
+    kb_enabled = false;
+}
+int serial_init(void)
+{
+    int i = 0;
+    if (SERIAL_READ_LSR(SERIAL_COM1) == 0x60) {
+        sconf[i].port = SERIAL_COM1;
+        sconf[i].irq = SERIAL_COM1_IRQ;
+        /* Enable interrupt on available data */
+        i++;
+    }
+    return i;
+}
+/** Read character from serial port, wait until available */
+static char serial_do_read(chardev_t *dev)
+{
+    serial_t *sd = (serial_t *)dev->data;
+    char ch;
+    while (!(SERIAL_READ_LSR(sd->port) & 1))
+        ;
+    ch = SERIAL_READ(sd->port);
+    if (ch =='\r')
+        ch = '\n';
+    return ch;
+}
+/** Process keyboard interrupt. Does not work in simics? */
+static void serial_interrupt(int n, void *stack)
+{
+    serial_t *sd = (serial_t *)console.data;
+    char ch;
+    if (!(SERIAL_READ_LSR(sd->port) & 1))
+        return;
+    ch = SERIAL_READ(sd->port);
+    if (ch =='\r')
+        ch = '\n';
+    chardev_push_character(&console, ch);
+}
+static chardev_operations_t serial_ops = {
+    .resume = serial_enable,
+    .suspend = serial_disable,
+    .write = serial_write,
+    .read = serial_do_read
+};
+iroutine old_timer;
+/** Do polling on timer interrupt */
+static void timer_replace(int n, istate_t *istate)
+{
+    old_timer(n, istate);
+    serial_interrupt(n, istate);
+}
+void serial_console(void)
+{
+    serial_t *sd = &sconf[0];
+    chardev_initialize("serial_console", &console, &serial_ops);
+    console.data = sd;
+    kb_enabled = true;
+//  int_register(2, "serial_drvr", serial_interrupt);
+    /* I don't know why, but the serial interrupts simply
+     * don't work on simics
+     */
+    old_timer = int_register(TIMER_IRQ, "serial_drvr_poll", timer_replace);
+    stdin = &console;
+    stdout = &console;
+}
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/mips32/src/drivers/arc.c
 ,0 → 1,413
+/*
+ * Copyright (C) 2005 Ondrej Palkovsky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup mips32
+ * @{
+ */
+/** @file
+ */
+#include <arch/drivers/arc.h>
+#include <arch/mm/page.h>
+#include <print.h>
+#include <arch.h>
+#include <arch/byteorder.h>
+#include <arch/mm/frame.h>
+#include <mm/frame.h>
+#include <interrupt.h>
+#include <align.h>
+#include <console/console.h>
+#include <console/kconsole.h>
+#include <console/cmd.h>
+#include <mm/slab.h>
+/* This is a good joke, SGI HAS different types than NT bioses... */
+/* Here is the SGI type */
+static char *basetypes[] = {
+    "ExceptionBlock",
+    "SystemParameterBlock",
+    "FreeContiguous",
+    "FreeMemory",
+    "BadMemory",
+    "LoadedProgram",
+    "FirmwareTemporary",
+    "FirmwarePermanent"
+};
+static char *ctypes[] = {
+    "ARC_type",
+    "CPU_type",
+    "FPU_type",
+    "PrimaryICache",
+    "PrimaryDCache",
+    "SecondaryICache",
+    "SecondaryDCache",
+    "SecondaryCache",
+    "Memory",
+    "EISAAdapter",
+    "TCAdapter",
+    "SCSIAdapter",
+    "DTIAdapter",
+    "MultiFunctionAdapter",
+    "DiskController",
+    "TapeController",
+    "CDROMController",
+    "WORMController",
+    "SerialController",
+    "NetworkController",
+    "DisplayController",
+    "ParallelController",
+    "PointerController",
+    "KeyboardController",
+    "AudioController",
+    "OtherController",
+    "DiskPeripheral",
+    "FloppyDiskPeripheral",
+    "TapePeripheral",
+    "ModemPeripheral",
+    "MonitorPeripheral",
+    "PrinterPeripheral",
+    "PointerPeripheral",
+    "KeyboardPeripheral",
+    "TerminalPeripheral",
+    "OtherPeripheral",
+    "LinePeripheral",
+    "NetworkPeripheral"
+    "OtherPeripheral",
+    "XTalkAdapter",
+    "PCIAdapter",
+    "GIOAdapter",
+    "TPUAdapter",
+    "Anonymous"
+};
+static arc_sbp *sbp = (arc_sbp *)PA2KA(0x1000);
+static arc_func_vector_t *arc_entry;
+static void arc_putchar(char ch);
+/** Return true if ARC is available */
+int arc_enabled(void)
+{
+    return sbp != NULL;
+}
+/** Print configuration data that ARC reports about component */
+static void arc_print_confdata(arc_component *c)
+{
+    cm_resource_list *configdata;
+    int i;
+    if (!c->configdatasize)
+        return; /* No configuration data */
+    configdata = malloc(c->configdatasize, 0);
+    if (arc_entry->getconfigurationdata(configdata, c)) {
+        free(configdata);
+        return;
+    }
+    /* Does not seem to return meaningful data, don't use now */
+    free(configdata);
+    return;
+    for (i=0; i < configdata->count; i++) {
+        switch (configdata->descr[i].type) {
+        case CmResourceTypePort:
+            printf("Port: %p-size:%d ",
+                   (__address)configdata->descr[i].u.port.start,
+                   configdata->descr[i].u.port.length);
+            break;
+        case CmResourceTypeInterrupt:
+            printf("Irq: level(%d) vector(%d) ",
+                   configdata->descr[i].u.interrupt.level,
+                   configdata->descr[i].u.interrupt.vector);
+            break;
+        case CmResourceTypeMemory:
+            printf("Memory: %p-size:%d ",
+                   (__address)configdata->descr[i].u.port.start,
+                   configdata->descr[i].u.port.length);
+            break;
+        default:
+            break;
+        }
+    }
+    free(configdata);
+}
+/** Print information about component */
+static void arc_print_component(arc_component *c)
+{
+    int i;
+    printf("%s: ",ctypes[c->type]);
+    for (i=0;i < c->identifier_len;i++)
+        printf("%c",c->identifier[i]);
+    printf(" ");
+    arc_print_confdata(c);
+    printf("\n");
+}
+/**
+ * Read from ARC bios configuration data and print it
+ */
+static int cmd_arc_print_devices(cmd_arg_t *argv)
+{
+    arc_component *c,*next;
+    c = arc_entry->getchild(NULL);
+    while (c) {
+        arc_print_component(c);
+        next = arc_entry->getchild(c);
+        while (!next) {
+            next = arc_entry->getpeer(c);
+            if (!next)
+                c = arc_entry->getparent(c);
+            if (!c)
+                return 0;
+        }
+        c = next;
+    }
+    return 1;
+}
+static cmd_info_t devlist_info = {
+    .name = "arcdevlist",
+    .description = "Print arc device list",
+    .func = cmd_arc_print_devices,
+    .argc = 0
+};
+/** Read from arc bios memory map and print it
+ *
+ */
+static int cmd_arc_print_memmap(cmd_arg_t *argv)
+{
+    arc_memdescriptor_t *desc;
+    printf("Memory map:\n");
+    desc = arc_entry->getmemorydescriptor(NULL);
+    while (desc) {
+        printf("%s: %d(%p) (size: %dKB)\n",basetypes[desc->type],
+               desc->basepage * ARC_FRAME,
+               desc->basepage * ARC_FRAME,
+               desc->basecount*ARC_FRAME/1024);
+        desc = arc_entry->getmemorydescriptor(desc);
+    }
+    return 1;
+}
+static cmd_info_t memmap_info = {
+    .name = "arcmemmap",
+    .description = "Print arc memory map",
+    .func = cmd_arc_print_memmap,
+    .argc = 0
+};
+/** Print charactor to console */
+static void arc_putchar(char ch)
+{
+    __u32 cnt;
+    ipl_t ipl;
+    /* TODO: Should be spinlock? */
+    ipl = interrupts_disable();
+    arc_entry->write(1, &ch, 1, &cnt);
+    interrupts_restore(ipl);
+}
+static int cmd_reboot(cmd_arg_t *argv)
+{
+    arc_entry->reboot();
+    return 0;
+}
+static cmd_info_t reboot_info = {
+    .name = "reboot",
+    .description = "Reboot computer",
+    .func = cmd_reboot,
+    .argc = 0
+};
+/** Initialize ARC structure
+ *
+ * @return 0 - ARC OK, -1 - ARC does not exist
+ */
+int arc_init(void)
+{
+    if (sbp->signature != ARC_MAGIC) {
+        sbp = NULL;
+        return -1;
+    }
+    arc_entry = sbp->firmwarevector;
+    arc_putchar('A');
+    arc_putchar('R');
+    arc_putchar('C');
+    arc_putchar('\n');
+    /* Add command for resetting the computer */
+    cmd_initialize(&reboot_info);
+    cmd_register(&reboot_info);
+    cmd_initialize(&memmap_info);
+    cmd_register(&memmap_info);
+    cmd_initialize(&devlist_info);
+    cmd_register(&devlist_info);
+    return 0;
+}
+static bool kbd_polling_enabled;
+static chardev_t console;
+/** Try to get character, return character or -1 if not available */
+static void arc_keyboard_poll(void)
+{
+    char ch;
+    __u32 count;
+    long result;
+    if (! kbd_polling_enabled)
+        return;
+    if (arc_entry->getreadstatus(0))
+        return;
+    result = arc_entry->read(0, &ch, 1, &count);
+    if (result || count!=1) {
+        return;
+    }
+    if (ch == '\r')
+        ch = '\n';
+    if (ch == 0x7f)
+        ch = '\b';
+    chardev_push_character(&console, ch);
+}
+static char arc_read(chardev_t *dev)
+{
+    char ch;
+    __u32 count;
+    long result;
+    result = arc_entry->read(0, &ch, 1, &count);
+    if (result || count!=1) {
+        printf("Error reading from ARC keyboard.\n");
+        cpu_halt();
+    }
+    if (ch == '\r')
+        return '\n';
+    if (ch == 0x7f)
+        return '\b';
+    return ch;
+}
+static void arc_write(chardev_t *dev, const char ch)
+{
+    arc_putchar(ch);
+}
+static void arc_enable(chardev_t *dev)
+{
+    kbd_polling_enabled = true;
+}
+static void arc_disable(chardev_t *dev)
+{
+    kbd_polling_enabled = false;
+}
+static chardev_operations_t arc_ops = {
+    .resume = arc_enable,
+    .suspend = arc_disable,
+    .write = arc_write,
+    .read = arc_read
+};
+iroutine old_timer;
+/** Do polling on timer interrupt */
+static void timer_replace(int n, istate_t *istate)
+{
+    arc_keyboard_poll();
+    old_timer(n, istate);
+    arc_keyboard_poll();
+}
+void arc_console(void)
+{
+    kbd_polling_enabled = true;
+    chardev_initialize("arc_console", &console, &arc_ops);
+    old_timer = int_register(TIMER_IRQ, "arc_kb_poll", timer_replace);
+    stdin = &console;
+    stdout = &console;
+}
+/* Initialize frame zones from ARC firmware.
+ * In the future we may use even the FirmwareTemporary regions,
+ * currently we use the FreeMemory (what about the LoadedProgram?)
+ */
+void arc_frame_init(void)
+{
+    arc_memdescriptor_t *desc;
+    int total = 0;
+    __address base;
+    size_t basesize;
+    desc = arc_entry->getmemorydescriptor(NULL);
+    while (desc) {
+        if (desc->type == FreeMemory ||
+            desc->type == FreeContiguous) {
+            base = desc->basepage*ARC_FRAME;
+            basesize = desc->basecount*ARC_FRAME;
+            if (base % FRAME_SIZE ) {
+                basesize -= FRAME_SIZE - (base % FRAME_SIZE);
+                base = ALIGN_UP(base, FRAME_SIZE);
+            }
+            basesize = ALIGN_DOWN(basesize, FRAME_SIZE);
+            total += basesize;
+            zone_create(ADDR2PFN(base), SIZE2FRAMES(basesize),
+                    ADDR2PFN(base), 0);
+        }
+        desc = arc_entry->getmemorydescriptor(desc);
+    }
+    config.memory_size = total;
+}
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/mips32/src/mm/tlb.c
 ,0 → 1,614
+/*
+ * Copyright (C) 2003-2004 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup mips32mm
+ * @{
+ */
+/** @file
+ */
+#include <arch/mm/tlb.h>
+#include <mm/asid.h>
+#include <mm/tlb.h>
+#include <mm/page.h>
+#include <mm/as.h>
+#include <arch/cp0.h>
+#include <panic.h>
+#include <arch.h>
+#include <symtab.h>
+#include <synch/spinlock.h>
+#include <print.h>
+#include <debug.h>
+#include <align.h>
+#include <interrupt.h>
+static void tlb_refill_fail(istate_t *istate);
+static void tlb_invalid_fail(istate_t *istate);
+static void tlb_modified_fail(istate_t *istate);
+static pte_t *find_mapping_and_check(__address badvaddr, int access, istate_t *istate, int *pfrc);
+static void prepare_entry_lo(entry_lo_t *lo, bool g, bool v, bool d, bool cacheable, __address pfn);
+static void prepare_entry_hi(entry_hi_t *hi, asid_t asid, __address addr);
+/** Initialize TLB
+ *
+ * Initialize TLB.
+ * Invalidate all entries and mark wired entries.
+ */
+void tlb_arch_init(void)
+{
+    int i;
+    cp0_pagemask_write(TLB_PAGE_MASK_16K);
+    cp0_entry_hi_write(0);
+    cp0_entry_lo0_write(0);
+    cp0_entry_lo1_write(0);
+    /* Clear and initialize TLB. */
+    for (i = 0; i < TLB_ENTRY_COUNT; i++) {
+        cp0_index_write(i);
+        tlbwi();
+    }
+    /*
+     * The kernel is going to make use of some wired
+     * entries (e.g. mapping kernel stacks in kseg3).
+     */
+    cp0_wired_write(TLB_WIRED);
+}
+/** Process TLB Refill Exception
+ *
+ * Process TLB Refill Exception.
+ *
+ * @param istate Interrupted register context.
+ */
+void tlb_refill(istate_t *istate)
+{
+    entry_lo_t lo;
+    entry_hi_t hi;
+    asid_t asid;
+    __address badvaddr;
+    pte_t *pte;
+    int pfrc;
+    badvaddr = cp0_badvaddr_read();
+    spinlock_lock(&AS->lock);
+    asid = AS->asid;
+    spinlock_unlock(&AS->lock);
+    page_table_lock(AS, true);
+    pte = find_mapping_and_check(badvaddr, PF_ACCESS_READ, istate, &pfrc);
+    if (!pte) {
+        switch (pfrc) {
+        case AS_PF_FAULT:
+            goto fail;
+            break;
+        case AS_PF_DEFER:
+            /*
+             * The page fault came during copy_from_uspace()
+             * or copy_to_uspace().
+             */
+            page_table_unlock(AS, true);
+            return;
+        default:
+            panic("unexpected pfrc (%d)\n", pfrc);
+        }
+    }
+    /*
+     * Record access to PTE.
+     */
+    pte->a = 1;
+    prepare_entry_hi(&hi, asid, badvaddr);
+    prepare_entry_lo(&lo, pte->g, pte->p, pte->d, pte->cacheable, pte->pfn);
+    /*
+     * New entry is to be inserted into TLB
+     */
+    cp0_entry_hi_write(hi.value);
+    if ((badvaddr/PAGE_SIZE) % 2 == 0) {
+        cp0_entry_lo0_write(lo.value);
+        cp0_entry_lo1_write(0);
+    }
+    else {
+        cp0_entry_lo0_write(0);
+        cp0_entry_lo1_write(lo.value);
+    }
+    cp0_pagemask_write(TLB_PAGE_MASK_16K);
+    tlbwr();
+    page_table_unlock(AS, true);
+    return;
+fail:
+    page_table_unlock(AS, true);
+    tlb_refill_fail(istate);
+}
+/** Process TLB Invalid Exception
+ *
+ * Process TLB Invalid Exception.
+ *
+ * @param istate Interrupted register context.
+ */
+void tlb_invalid(istate_t *istate)
+{
+    tlb_index_t index;
+    __address badvaddr;
+    entry_lo_t lo;
+    entry_hi_t hi;
+    pte_t *pte;
+    int pfrc;
+    badvaddr = cp0_badvaddr_read();
+    /*
+     * Locate the faulting entry in TLB.
+     */
+    hi.value = cp0_entry_hi_read();
+    prepare_entry_hi(&hi, hi.asid, badvaddr);
+    cp0_entry_hi_write(hi.value);
+    tlbp();
+    index.value = cp0_index_read();
+    page_table_lock(AS, true);
+    /*
+     * Fail if the entry is not in TLB.
+     */
+    if (index.p) {
+        printf("TLB entry not found.\n");
+        goto fail;
+    }
+    pte = find_mapping_and_check(badvaddr, PF_ACCESS_READ, istate, &pfrc);
+    if (!pte) {
+        switch (pfrc) {
+        case AS_PF_FAULT:
+            goto fail;
+            break;
+        case AS_PF_DEFER:
+            /*
+             * The page fault came during copy_from_uspace()
+             * or copy_to_uspace().
+             */
+            page_table_unlock(AS, true);
+            return;
+        default:
+            panic("unexpected pfrc (%d)\n", pfrc);
+        }
+    }
+    /*
+     * Read the faulting TLB entry.
+     */
+    tlbr();
+    /*
+     * Record access to PTE.
+     */
+    pte->a = 1;
+    prepare_entry_lo(&lo, pte->g, pte->p, pte->d, pte->cacheable, pte->pfn);
+    /*
+     * The entry is to be updated in TLB.
+     */
+    if ((badvaddr/PAGE_SIZE) % 2 == 0)
+        cp0_entry_lo0_write(lo.value);
+    else
+        cp0_entry_lo1_write(lo.value);
+    cp0_pagemask_write(TLB_PAGE_MASK_16K);
+    tlbwi();
+    page_table_unlock(AS, true);
+    return;
+fail:
+    page_table_unlock(AS, true);
+    tlb_invalid_fail(istate);
+}
+/** Process TLB Modified Exception
+ *
+ * Process TLB Modified Exception.
+ *
+ * @param istate Interrupted register context.
+ */
+void tlb_modified(istate_t *istate)
+{
+    tlb_index_t index;
+    __address badvaddr;
+    entry_lo_t lo;
+    entry_hi_t hi;
+    pte_t *pte;
+    int pfrc;
+    badvaddr = cp0_badvaddr_read();
+    /*
+     * Locate the faulting entry in TLB.
+     */
+    hi.value = cp0_entry_hi_read();
+    prepare_entry_hi(&hi, hi.asid, badvaddr);
+    cp0_entry_hi_write(hi.value);
+    tlbp();
+    index.value = cp0_index_read();
+    page_table_lock(AS, true);
+    /*
+     * Fail if the entry is not in TLB.
+     */
+    if (index.p) {
+        printf("TLB entry not found.\n");
+        goto fail;
+    }
+    pte = find_mapping_and_check(badvaddr, PF_ACCESS_WRITE, istate, &pfrc);
+    if (!pte) {
+        switch (pfrc) {
+        case AS_PF_FAULT:
+            goto fail;
+            break;
+        case AS_PF_DEFER:
+            /*
+             * The page fault came during copy_from_uspace()
+             * or copy_to_uspace().
+             */
+            page_table_unlock(AS, true);
+            return;
+        default:
+            panic("unexpected pfrc (%d)\n", pfrc);
+        }
+    }
+    /*
+     * Fail if the page is not writable.
+     */
+    if (!pte->w)
+        goto fail;
+    /*
+     * Read the faulting TLB entry.
+     */
+    tlbr();
+    /*
+     * Record access and write to PTE.
+     */
+    pte->a = 1;
+    pte->d = 1;
+    prepare_entry_lo(&lo, pte->g, pte->p, pte->w, pte->cacheable, pte->pfn);
+    /*
+     * The entry is to be updated in TLB.
+     */
+    if ((badvaddr/PAGE_SIZE) % 2 == 0)
+        cp0_entry_lo0_write(lo.value);
+    else
+        cp0_entry_lo1_write(lo.value);
+    cp0_pagemask_write(TLB_PAGE_MASK_16K);
+    tlbwi();
+    page_table_unlock(AS, true);
+    return;
+fail:
+    page_table_unlock(AS, true);
+    tlb_modified_fail(istate);
+}
+void tlb_refill_fail(istate_t *istate)
+{
+    char *symbol = "";
+    char *sym2 = "";
+    char *s = get_symtab_entry(istate->epc);
+    if (s)
+        symbol = s;
+    s = get_symtab_entry(istate->ra);
+    if (s)
+        sym2 = s;
+    fault_if_from_uspace(istate, "TLB Refill Exception on %p", cp0_badvaddr_read());
+    panic("%x: TLB Refill Exception at %x(%s<-%s)\n", cp0_badvaddr_read(), istate->epc, symbol, sym2);
+}
+void tlb_invalid_fail(istate_t *istate)
+{
+    char *symbol = "";
+    char *s = get_symtab_entry(istate->epc);
+    if (s)
+        symbol = s;
+    fault_if_from_uspace(istate, "TLB Invalid Exception on %p", cp0_badvaddr_read());
+    panic("%x: TLB Invalid Exception at %x(%s)\n", cp0_badvaddr_read(), istate->epc, symbol);
+}
+void tlb_modified_fail(istate_t *istate)
+{
+    char *symbol = "";
+    char *s = get_symtab_entry(istate->epc);
+    if (s)
+        symbol = s;
+    fault_if_from_uspace(istate, "TLB Modified Exception on %p", cp0_badvaddr_read());
+    panic("%x: TLB Modified Exception at %x(%s)\n", cp0_badvaddr_read(), istate->epc, symbol);
+}
+/** Try to find PTE for faulting address
+ *
+ * Try to find PTE for faulting address.
+ * The AS->lock must be held on entry to this function.
+ *
+ * @param badvaddr Faulting virtual address.
+ * @param access Access mode that caused the fault.
+ * @param istate Pointer to interrupted state.
+ * @param pfrc Pointer to variable where as_page_fault() return code will be stored.
+ *
+ * @return PTE on success, NULL otherwise.
+ */
+pte_t *find_mapping_and_check(__address badvaddr, int access, istate_t *istate, int *pfrc)
+{
+    entry_hi_t hi;
+    pte_t *pte;
+    hi.value = cp0_entry_hi_read();
+    /*
+     * Handler cannot succeed if the ASIDs don't match.
+     */
+    if (hi.asid != AS->asid) {
+        printf("EntryHi.asid=%d, AS->asid=%d\n", hi.asid, AS->asid);
+        return NULL;
+    }
+    /*
+     * Check if the mapping exists in page tables.
+     */
+    pte = page_mapping_find(AS, badvaddr);
+    if (pte && pte->p) {
+        /*
+         * Mapping found in page tables.
+         * Immediately succeed.
+         */
+        return pte;
+    } else {
+        int rc;
+        /*
+         * Mapping not found in page tables.
+         * Resort to higher-level page fault handler.
+         */
+        page_table_unlock(AS, true);
+        switch (rc = as_page_fault(badvaddr, access, istate)) {
+        case AS_PF_OK:
+            /*
+             * The higher-level page fault handler succeeded,
+             * The mapping ought to be in place.
+             */
+            page_table_lock(AS, true);
+            pte = page_mapping_find(AS, badvaddr);
+            ASSERT(pte && pte->p);
+            return pte;
+            break;
+        case AS_PF_DEFER:
+            page_table_lock(AS, true);
+            *pfrc = AS_PF_DEFER;
+            return NULL;
+            break;
+        case AS_PF_FAULT:
+            page_table_lock(AS, true);
+            printf("Page fault.\n");
+            *pfrc = AS_PF_FAULT;
+            return NULL;
+            break;
+        default:
+            panic("unexpected rc (%d)\n", rc);
+        }
+    }
+}
+void prepare_entry_lo(entry_lo_t *lo, bool g, bool v, bool d, bool cacheable, __address pfn)
+{
+    lo->value = 0;
+    lo->g = g;
+    lo->v = v;
+    lo->d = d;
+    lo->c = cacheable ? PAGE_CACHEABLE_EXC_WRITE : PAGE_UNCACHED;
+    lo->pfn = pfn;
+}
+void prepare_entry_hi(entry_hi_t *hi, asid_t asid, __address addr)
+{
+    hi->value = ALIGN_DOWN(addr, PAGE_SIZE * 2);
+    hi->asid = asid;
+}
+/** Print contents of TLB. */
+void tlb_print(void)
+{
+    page_mask_t mask;
+    entry_lo_t lo0, lo1;
+    entry_hi_t hi, hi_save;
+    int i;
+    hi_save.value = cp0_entry_hi_read();
+    printf("TLB:\n");
+    for (i = 0; i < TLB_ENTRY_COUNT; i++) {
+        cp0_index_write(i);
+        tlbr();
+        mask.value = cp0_pagemask_read();
+        hi.value = cp0_entry_hi_read();
+        lo0.value = cp0_entry_lo0_read();
+        lo1.value = cp0_entry_lo1_read();
+        printf("%d: asid=%d, vpn2=%d, mask=%d\tg[0]=%d, v[0]=%d, d[0]=%d, c[0]=%hhd, pfn[0]=%d\n"
+               "\t\t\t\tg[1]=%d, v[1]=%d, d[1]=%d, c[1]=%hhd, pfn[1]=%d\n",
+               i, hi.asid, hi.vpn2, mask.mask, lo0.g, lo0.v, lo0.d, lo0.c, lo0.pfn,
+               lo1.g, lo1.v, lo1.d, lo1.c, lo1.pfn);
+    }
+    cp0_entry_hi_write(hi_save.value);
+}
+/** Invalidate all not wired TLB entries. */
+void tlb_invalidate_all(void)
+{
+    ipl_t ipl;
+    entry_lo_t lo0, lo1;
+    entry_hi_t hi_save;
+    int i;
+    hi_save.value = cp0_entry_hi_read();
+    ipl = interrupts_disable();
+    for (i = TLB_WIRED; i < TLB_ENTRY_COUNT; i++) {
+        cp0_index_write(i);
+        tlbr();
+        lo0.value = cp0_entry_lo0_read();
+        lo1.value = cp0_entry_lo1_read();
+        lo0.v = 0;
+        lo1.v = 0;
+        cp0_entry_lo0_write(lo0.value);
+        cp0_entry_lo1_write(lo1.value);
+        tlbwi();
+    }
+    interrupts_restore(ipl);
+    cp0_entry_hi_write(hi_save.value);
+}
+/** Invalidate all TLB entries belonging to specified address space.
+ *
+ * @param asid Address space identifier.
+ */
+void tlb_invalidate_asid(asid_t asid)
+{
+    ipl_t ipl;
+    entry_lo_t lo0, lo1;
+    entry_hi_t hi, hi_save;
+    int i;
+    ASSERT(asid != ASID_INVALID);
+    hi_save.value = cp0_entry_hi_read();
+    ipl = interrupts_disable();
+    for (i = 0; i < TLB_ENTRY_COUNT; i++) {
+        cp0_index_write(i);
+        tlbr();
+        hi.value = cp0_entry_hi_read();
+        if (hi.asid == asid) {
+            lo0.value = cp0_entry_lo0_read();
+            lo1.value = cp0_entry_lo1_read();
+            lo0.v = 0;
+            lo1.v = 0;
+            cp0_entry_lo0_write(lo0.value);
+            cp0_entry_lo1_write(lo1.value);
+            tlbwi();
+        }
+    }
+    interrupts_restore(ipl);
+    cp0_entry_hi_write(hi_save.value);
+}
+/** Invalidate TLB entries for specified page range belonging to specified address space.
+ *
+ * @param asid Address space identifier.
+ * @param page First page whose TLB entry is to be invalidated.
+ * @param cnt Number of entries to invalidate.
+ */
+void tlb_invalidate_pages(asid_t asid, __address page, count_t cnt)
+{
+    int i;
+    ipl_t ipl;
+    entry_lo_t lo0, lo1;
+    entry_hi_t hi, hi_save;
+    tlb_index_t index;
+    ASSERT(asid != ASID_INVALID);
+    hi_save.value = cp0_entry_hi_read();
+    ipl = interrupts_disable();
+    for (i = 0; i < cnt+1; i+=2) {
+        hi.value = 0;
+        prepare_entry_hi(&hi, asid, page + i * PAGE_SIZE);
+        cp0_entry_hi_write(hi.value);
+        tlbp();
+        index.value = cp0_index_read();
+        if (!index.p) {
+            /* Entry was found, index register contains valid index. */
+            tlbr();
+            lo0.value = cp0_entry_lo0_read();
+            lo1.value = cp0_entry_lo1_read();
+            lo0.v = 0;
+            lo1.v = 0;
+            cp0_entry_lo0_write(lo0.value);
+            cp0_entry_lo1_write(lo1.value);
+            tlbwi();
+        }
+    }
+    interrupts_restore(ipl);
+    cp0_entry_hi_write(hi_save.value);
+}
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/mips32/src/mm/as.c
 ,0 → 1,78
+/*
+ * Copyright (C) 2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup mips32mm
+ * @{
+ */
+/** @file
+ */
+#include <arch/mm/as.h>
+#include <genarch/mm/as_pt.h>
+#include <genarch/mm/asid_fifo.h>
+#include <arch/mm/tlb.h>
+#include <mm/tlb.h>
+#include <mm/as.h>
+#include <arch/cp0.h>
+#include <arch.h>
+/** Architecture dependent address space init. */
+void as_arch_init(void)
+{
+        as_operations = &as_pt_operations;
+    asid_fifo_init();
+}
+/** Install address space.
+ *
+ * Install ASID.
+ *
+ * @param as Address space structure.
+ */
+void as_install_arch(as_t *as)
+{
+    entry_hi_t hi;
+    ipl_t ipl;
+    /*
+     * Install ASID.
+     */
+    hi.value = cp0_entry_hi_read();
+    ipl = interrupts_disable();
+    spinlock_lock(&as->lock);
+    hi.asid = as->asid;
+    cp0_entry_hi_write(hi.value);
+    spinlock_unlock(&as->lock);
+    interrupts_restore(ipl);
+}
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/mips32/src/mm/frame.c
 ,0 → 1,61
+/*
+ * Copyright (C) 2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup mips32mm
+ * @{
+ */
+/** @file
+ */
+#include <arch/mm/frame.h>
+#include <mm/frame.h>
+#include <config.h>
+#include <arch/drivers/arc.h>
+/** Create memory zones
+ *
+ * If ARC is known, read information from ARC, otherwise
+ * assume some defaults.
+ * - blacklist first FRAME because there is an exception vector
+ */
+void frame_arch_init(void)
+{
+    if (arc_enabled())
+        arc_frame_init();
+    else {
+        zone_create(0, ADDR2PFN(config.memory_size), 1, 0);
+        /*
+         * Blacklist interrupt vektor
+         */
+        frame_mark_unavailable(0, 1);
+    }
+}
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/mips32/src/mm/page.c
 ,0 → 1,55
+/*
+ * Copyright (C) 2003-2004 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup mips32mm
+ * @{
+ */
+/** @file
+ */
+#include <arch/mm/page.h>
+#include <genarch/mm/page_pt.h>
+#include <mm/page.h>
+void page_arch_init(void)
+{
+    page_mapping_operations = &pt_mapping_operations;
+}
+/** Map device into kernel space
+ * - on mips, all devices are already mapped into kernel space,
+ *   translate the physical address to uncached area
+ */
+__address hw_map(__address physaddr, size_t size)
+{
+    return physaddr + 0xa0000000;
+}
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/mips32/src/cpu/cpu.c
 ,0 → 1,138
+/*
+ * Copyright (C) 2003-2004 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/** @addtogroup mips32
+ * @{
+ */
+/** @file
+ */
+#include <arch/cpu.h>
+#include <cpu.h>
+#include <arch.h>
+#include <arch/cp0.h>
+#include <typedefs.h>
+#include <print.h>
+struct data_t {
+    char *vendor;
+    char *model;
+};
+static struct data_t imp_data[] = {
+    { "Invalid", "Invalid" },   /* 0x00 */
+    { "MIPS", "R2000" },        /* 0x01 */
+    { "MIPS", "R3000" },        /* 0x02 */
+    { "MIPS", "R6000" },        /* 0x03 */
+    { "MIPS", " R4000/R4400" },     /* 0x04 */
+    { "LSI Logic", "R3000" },   /* 0x05 */
+    { "MIPS", "R6000A" },       /* 0x06 */
+    { "IDT", "3051/3052" },     /* 0x07 */
+    { "Invalid", "Invalid" },   /* 0x08 */
+    { "MIPS", "R10000/T5" },    /* 0x09 */
+    { "MIPS", "R4200" },        /* 0x0a */
+    { "Unknown", "Unknown" },   /* 0x0b */
+    { "Unknown", "Unknown" },   /* 0x0c */
+    { "Invalid", "Invalid" },   /* 0x0d */
+    { "Invalid", "Invalid" },   /* 0x0e */
+    { "Invalid", "Invalid" },   /* 0x0f */
+    { "MIPS", "R8000" },        /* 0x10 */
+    { "Invalid", "Invalid" },   /* 0x11 */
+    { "Invalid", "Invalid" },   /* 0x12 */
+    { "Invalid", "Invalid" },   /* 0x13 */
+    { "Invalid", "Invalid" },   /* 0x14 */
+    { "Invalid", "Invalid" },   /* 0x15 */
+    { "Invalid", "Invalid" },   /* 0x16 */
+    { "Invalid", "Invalid" },   /* 0x17 */
+    { "Invalid", "Invalid" },   /* 0x18 */
+    { "Invalid", "Invalid" },   /* 0x19 */
+    { "Invalid", "Invalid" },   /* 0x1a */
+    { "Invalid", "Invalid" },   /* 0x1b */
+    { "Invalid", "Invalid" },   /* 0x1c */
+    { "Invalid", "Invalid" },   /* 0x1d */
+    { "Invalid", "Invalid" },   /* 0x1e */
+    { "Invalid", "Invalid" },   /* 0x1f */
+    { "QED", "R4600" },     /* 0x20 */
+    { "Sony", "R3000" },        /* 0x21 */
+    { "Toshiba", "R3000" },     /* 0x22 */
+    { "NKK", "R3000" },     /* 0x23 */
+    { NULL, NULL }
+};
+static struct data_t imp_data80[] = {
+    { "MIPS", "4Kc" },  /* 0x80 */
+    {"Invalid","Invalid"}, /* 0x81 */
+    {"Invalid","Invalid"}, /* 0x82 */
+    {"MIPS","4Km & 4Kp"}, /* 0x83 */
+    { NULL, NULL}
+};
+void cpu_arch_init(void)
+{
+}
+void cpu_identify(void)
+{
+    CPU->arch.rev_num = cp0_prid_read() & 0xff;
+    CPU->arch.imp_num = (cp0_prid_read() >> 8) & 0xff;
+}
+void cpu_print_report(cpu_t *m)
+{
+    struct data_t *data;
+    int i;
+    if (m->arch.imp_num & 0x80) {
+        /* Count records */
+        for (i=0;imp_data80[i].vendor;i++)
+            ;
+        if ((m->arch.imp_num & 0x7f) >= i) {
+            printf("imp=%d\n",m->arch.imp_num);
+            return;
+        }
+        data = &imp_data80[m->arch.imp_num & 0x7f];
+    } else {
+        for (i=0;imp_data[i].vendor;i++)
+            ;
+        if (m->arch.imp_num >= i) {
+            printf("imp=%d\n",m->arch.imp_num);
+            return;
+        }
+        data = &imp_data[m->arch.imp_num];
+    }
+    printf("cpu%d: %s %s (rev=%d.%d, imp=%d)\n",
+        m->id, data->vendor, data->model, m->arch.rev_num >> 4,
+           m->arch.rev_num & 0xf, m->arch.imp_num);
+}
+/** @}
+ */

 /tags/0.2.0.2/kernel/arch/mips32/src/ddi/ddi.c
 ,0 → 1,60
+/*
+ * Copyright (C) 2006 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup mips32ddi
+ * @{
+ */
+/** @file
+ */
+#include <ddi/ddi.h>
+#include <proc/task.h>
+#include <arch/types.h>
+#include <typedefs.h>
+#include <security/cap.h>
+#include <arch.h>
+#include <arch/cp0.h>
+/** Enable I/O space range for task.
+ *
+ * Interrupts are disabled and task is locked.
+ *
+ * @param task Task.
+ * @param ioaddr Startign I/O space address.
+ * @param size Size of the enabled I/O range.
+ *
+ * @return 0 on success or an error code from errno.h.
+ */
+int ddi_iospace_enable_arch(task_t *task, __address ioaddr, size_t size)
+{
+    return 0;
+}
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/mips32/src/debugger.c
 ,0 → 1,388
+/*
+ * Copyright (C) 2005 Ondrej Palkovsky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup mips32debug
+ * @{
+ */
+/** @file
+ */
+#include <arch/debugger.h>
+#include <memstr.h>
+#include <console/kconsole.h>
+#include <console/cmd.h>
+#include <symtab.h>
+#include <print.h>
+#include <panic.h>
+#include <arch.h>
+#include <arch/cp0.h>
+#include <func.h>
+bpinfo_t breakpoints[BKPOINTS_MAX];
+SPINLOCK_INITIALIZE(bkpoint_lock);
+static int cmd_print_breakpoints(cmd_arg_t *argv);
+static cmd_info_t bkpts_info = {
+    .name = "bkpts",
+    .description = "Print breakpoint table.",
+    .func = cmd_print_breakpoints,
+    .argc = 0,
+};
+static int cmd_del_breakpoint(cmd_arg_t *argv);
+static cmd_arg_t del_argv = {
+    .type = ARG_TYPE_INT
+};
+static cmd_info_t delbkpt_info = {
+    .name = "delbkpt",
+    .description = "delbkpt <number> - Delete breakpoint.",
+    .func = cmd_del_breakpoint,
+    .argc = 1,
+    .argv = &del_argv
+};
+static int cmd_add_breakpoint(cmd_arg_t *argv);
+static cmd_arg_t add_argv = {
+    .type = ARG_TYPE_INT
+};
+static cmd_info_t addbkpt_info = {
+    .name = "addbkpt",
+    .description = "addbkpt <&symbol> - new bkpoint. Break on J/Branch insts unsupported.",
+    .func = cmd_add_breakpoint,
+    .argc = 1,
+    .argv = &add_argv
+};
+static cmd_arg_t adde_argv[] = {
+    { .type = ARG_TYPE_INT },
+    { .type = ARG_TYPE_INT }
+};
+static cmd_info_t addbkpte_info = {
+    .name = "addbkpte",
+    .description = "addebkpte <&symbol> <&func> - new bkpoint. Call func(or Nothing if 0).",
+    .func = cmd_add_breakpoint,
+    .argc = 2,
+    .argv = adde_argv
+};
+static struct {
+    __u32 andmask;
+    __u32 value;
+}jmpinstr[] = {
+    {0xf3ff0000, 0x41000000}, /* BCzF */
+    {0xf3ff0000, 0x41020000}, /* BCzFL */
+    {0xf3ff0000, 0x41010000}, /* BCzT */
+    {0xf3ff0000, 0x41030000}, /* BCzTL */
+    {0xfc000000, 0x10000000}, /* BEQ */
+    {0xfc000000, 0x50000000}, /* BEQL */
+    {0xfc1f0000, 0x04010000}, /* BEQL */
+    {0xfc1f0000, 0x04110000}, /* BGEZAL */
+    {0xfc1f0000, 0x04130000}, /* BGEZALL */
+    {0xfc1f0000, 0x04030000}, /* BGEZL */
+    {0xfc1f0000, 0x1c000000}, /* BGTZ */
+    {0xfc1f0000, 0x5c000000}, /* BGTZL */
+    {0xfc1f0000, 0x18000000}, /* BLEZ */
+    {0xfc1f0000, 0x58000000}, /* BLEZL */
+    {0xfc1f0000, 0x04000000}, /* BLTZ */
+    {0xfc1f0000, 0x04100000}, /* BLTZAL */
+    {0xfc1f0000, 0x04120000}, /* BLTZALL */
+    {0xfc1f0000, 0x04020000}, /* BLTZL */
+    {0xfc000000, 0x14000000}, /* BNE */
+    {0xfc000000, 0x54000000}, /* BNEL */
+    {0xfc000000, 0x08000000}, /* J */
+    {0xfc000000, 0x0c000000}, /* JAL */
+    {0xfc1f07ff, 0x00000009}, /* JALR */
+    {0,0} /* EndOfTable */
+};
+/** Test, if the given instruction is a jump or branch instruction
+ *
+ * @param instr Instruction code
+ * @return true - it is jump instruction, false otherwise
+ */
+static bool is_jump(__native instr)
+{
+    int i;
+    for (i=0;jmpinstr[i].andmask;i++) {
+        if ((instr & jmpinstr[i].andmask) == jmpinstr[i].value)
+            return true;
+    }
+    return false;
+}
+/** Add new breakpoint to table */
+int cmd_add_breakpoint(cmd_arg_t *argv)
+{
+    bpinfo_t *cur = NULL;
+    ipl_t ipl;
+    int i;
+    if (argv->intval & 0x3) {
+        printf("Not aligned instruction, forgot to use &symbol?\n");
+        return 1;
+    }
+    ipl = interrupts_disable();
+    spinlock_lock(&bkpoint_lock);
+    /* Check, that the breakpoints do not conflict */
+    for (i=0; i<BKPOINTS_MAX; i++) {
+        if (breakpoints[i].address == (__address)argv->intval) {
+            printf("Duplicate breakpoint %d.\n", i);
+            spinlock_unlock(&bkpoints_lock);
+            return 0;
+        } else if (breakpoints[i].address == (__address)argv->intval + sizeof(__native) || \
+               breakpoints[i].address == (__address)argv->intval - sizeof(__native)) {
+            printf("Adjacent breakpoints not supported, conflict with %d.\n", i);
+            spinlock_unlock(&bkpoints_lock);
+            return 0;
+        }
+    }
+    for (i=0; i<BKPOINTS_MAX; i++)
+        if (!breakpoints[i].address) {
+            cur = &breakpoints[i];
+            break;
+        }
+    if (!cur) {
+        printf("Too many breakpoints.\n");
+        spinlock_unlock(&bkpoint_lock);
+        interrupts_restore(ipl);
+        return 0;
+    }
+    cur->address = (__address) argv->intval;
+    printf("Adding breakpoint on address: %p\n", argv->intval);
+    cur->instruction = ((__native *)cur->address)[0];
+    cur->nextinstruction = ((__native *)cur->address)[1];
+    if (argv == &add_argv) {
+        cur->flags = 0;
+    } else { /* We are add extended */
+        cur->flags = BKPOINT_FUNCCALL;
+        cur->bkfunc =   (void (*)(void *, istate_t *)) argv[1].intval;
+    }
+    if (is_jump(cur->instruction))
+        cur->flags |= BKPOINT_ONESHOT;
+    cur->counter = 0;
+    /* Set breakpoint */
+    *((__native *)cur->address) = 0x0d;
+    spinlock_unlock(&bkpoint_lock);
+    interrupts_restore(ipl);
+    return 1;
+}
+/** Remove breakpoint from table */
+int cmd_del_breakpoint(cmd_arg_t *argv)
+{
+    bpinfo_t *cur;
+    ipl_t ipl;
+    if (argv->intval < 0 || argv->intval > BKPOINTS_MAX) {
+        printf("Invalid breakpoint number.\n");
+        return 0;
+    }
+    ipl = interrupts_disable();
+    spinlock_lock(&bkpoint_lock);
+    cur = &breakpoints[argv->intval];
+    if (!cur->address) {
+        printf("Breakpoint does not exist.\n");
+        spinlock_unlock(&bkpoint_lock);
+        interrupts_restore(ipl);
+        return 0;
+    }
+    if ((cur->flags & BKPOINT_INPROG) && (cur->flags & BKPOINT_ONESHOT)) {
+        printf("Cannot remove one-shot breakpoint in-progress\n");
+        spinlock_unlock(&bkpoint_lock);
+        interrupts_restore(ipl);
+        return 0;
+    }
+    ((__u32 *)cur->address)[0] = cur->instruction;
+    ((__u32 *)cur->address)[1] = cur->nextinstruction;
+    cur->address = NULL;
+    spinlock_unlock(&bkpoint_lock);
+    interrupts_restore(ipl);
+    return 1;
+}
+/** Print table of active breakpoints */
+int cmd_print_breakpoints(cmd_arg_t *argv)
+{
+    int i;
+    char *symbol;
+    printf("Breakpoint table.\n");
+    for (i=0; i < BKPOINTS_MAX; i++)
+        if (breakpoints[i].address) {
+            symbol = get_symtab_entry(breakpoints[i].address);
+            printf("%d. %p in %s\n",i,
+                   breakpoints[i].address, symbol);
+            printf("     Count(%d) ", breakpoints[i].counter);
+            if (breakpoints[i].flags & BKPOINT_INPROG)
+                printf("INPROG ");
+            if (breakpoints[i].flags & BKPOINT_ONESHOT)
+                printf("ONESHOT ");
+            if (breakpoints[i].flags & BKPOINT_FUNCCALL)
+                printf("FUNCCALL ");
+            printf("\n");
+        }
+    return 1;
+}
+/** Initialize debugger */
+void debugger_init()
+{
+    int i;
+    for (i=0; i<BKPOINTS_MAX; i++)
+        breakpoints[i].address = NULL;
+    cmd_initialize(&bkpts_info);
+    if (!cmd_register(&bkpts_info))
+        panic("could not register command %s\n", bkpts_info.name);
+    cmd_initialize(&delbkpt_info);
+    if (!cmd_register(&delbkpt_info))
+        panic("could not register command %s\n", delbkpt_info.name);
+    cmd_initialize(&addbkpt_info);
+    if (!cmd_register(&addbkpt_info))
+        panic("could not register command %s\n", addbkpt_info.name);
+    cmd_initialize(&addbkpte_info);
+    if (!cmd_register(&addbkpte_info))
+        panic("could not register command %s\n", addbkpte_info.name);
+}
+/** Handle breakpoint
+ *
+ * Find breakpoint in breakpoint table.
+ * If found, call kconsole, set break on next instruction and reexecute.
+ * If we are on "next instruction", set it back on the first and reexecute.
+ * If breakpoint not found in breakpoint table, call kconsole and start
+ * next instruction.
+ */
+void debugger_bpoint(istate_t *istate)
+{
+    bpinfo_t *cur = NULL;
+    __address fireaddr = istate->epc;
+    int i;
+    /* test branch delay slot */
+    if (cp0_cause_read() & 0x80000000)
+        panic("Breakpoint in branch delay slot not supported.\n");
+    spinlock_lock(&bkpoint_lock);
+    for (i=0; i<BKPOINTS_MAX; i++) {
+        /* Normal breakpoint */
+        if (fireaddr == breakpoints[i].address \
+            && !(breakpoints[i].flags & BKPOINT_REINST)) {
+            cur = &breakpoints[i];
+            break;
+        }
+        /* Reinst only breakpoint */
+        if ((breakpoints[i].flags & BKPOINT_REINST) \
+            && (fireaddr ==breakpoints[i].address+sizeof(__native))) {
+            cur = &breakpoints[i];
+            break;
+        }
+    }
+    if (cur) {
+        if (cur->flags & BKPOINT_REINST) {
+            /* Set breakpoint on first instruction */
+            ((__u32 *)cur->address)[0] = 0x0d;
+            /* Return back the second */
+            ((__u32 *)cur->address)[1] = cur->nextinstruction;
+            cur->flags &= ~BKPOINT_REINST;
+            spinlock_unlock(&bkpoint_lock);
+            return;
+        }
+        if (cur->flags & BKPOINT_INPROG)
+            printf("Warning: breakpoint recursion\n");
+        if (!(cur->flags & BKPOINT_FUNCCALL))
+            printf("***Breakpoint %d: %p in %s.\n", i,
+                   fireaddr, get_symtab_entry(istate->epc));
+        /* Return first instruction back */
+        ((__u32 *)cur->address)[0] = cur->instruction;
+        if (! (cur->flags & BKPOINT_ONESHOT)) {
+            /* Set Breakpoint on next instruction */
+            ((__u32 *)cur->address)[1] = 0x0d;
+            cur->flags |= BKPOINT_REINST;
+        }
+        cur->flags |= BKPOINT_INPROG;
+    } else {
+        printf("***Breakpoint %p in %s.\n", fireaddr,
+               get_symtab_entry(fireaddr));
+        /* Move on to next instruction */
+        istate->epc += 4;
+    }
+    if (cur)
+        cur->counter++;
+    if (cur && (cur->flags & BKPOINT_FUNCCALL)) {
+        /* Allow zero bkfunc, just for counting */
+        if (cur->bkfunc)
+            cur->bkfunc(cur, istate);
+    } else {
+        printf("***Type 'exit' to exit kconsole.\n");
+        /* This disables all other processors - we are not SMP,
+         * actually this gets us to cpu_halt, if scheduler() is run
+         * - we generally do not want scheduler to be run from debug,
+         *   so this is a good idea
+         */
+        atomic_set(&haltstate,1);
+        spinlock_unlock(&bkpoint_lock);
+        kconsole("debug");
+        spinlock_lock(&bkpoint_lock);
+        atomic_set(&haltstate,0);
+    }
+    if (cur && cur->address == fireaddr && (cur->flags & BKPOINT_INPROG)) {
+        /* Remove one-shot breakpoint */
+        if ((cur->flags & BKPOINT_ONESHOT))
+            cur->address = NULL;
+        /* Remove in-progress flag */
+        cur->flags &= ~BKPOINT_INPROG;
+    }
+    spinlock_unlock(&bkpoint_lock);
+}
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/mips32/src/interrupt.c
 ,0 → 1,146
+/*
+ * Copyright (C) 2003-2004 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup mips32interrupt
+ * @{
+ */
+/** @file
+ */
+#include <interrupt.h>
+#include <arch/interrupt.h>
+#include <arch/types.h>
+#include <arch.h>
+#include <arch/cp0.h>
+#include <time/clock.h>
+#include <arch/drivers/arc.h>
+#include <ipc/sysipc.h>
+/** Disable interrupts.
+ *
+ * @return Old interrupt priority level.
+ */
+ipl_t interrupts_disable(void)
+{
+    ipl_t ipl = (ipl_t) cp0_status_read();
+    cp0_status_write(ipl & ~cp0_status_ie_enabled_bit);
+    return ipl;
+}
+/** Enable interrupts.
+ *
+ * @return Old interrupt priority level.
+ */
+ipl_t interrupts_enable(void)
+{
+    ipl_t ipl = (ipl_t) cp0_status_read();
+    cp0_status_write(ipl | cp0_status_ie_enabled_bit);
+    return ipl;
+}
+/** Restore interrupt priority level.
+ *
+ * @param ipl Saved interrupt priority level.
+ */
+void interrupts_restore(ipl_t ipl)
+{
+    cp0_status_write(cp0_status_read() | (ipl & cp0_status_ie_enabled_bit));
+}
+/** Read interrupt priority level.
+ *
+ * @return Current interrupt priority level.
+ */
+ipl_t interrupts_read(void)
+{
+    return cp0_status_read();
+}
+/* TODO: This is SMP unsafe!!! */
+static unsigned long nextcount;
+/** Start hardware clock */
+static void timer_start(void)
+{
+    nextcount = cp0_compare_value + cp0_count_read();
+    cp0_compare_write(nextcount);
+}
+static void timer_exception(int n, istate_t *istate)
+{
+    unsigned long drift;
+    drift = cp0_count_read() - nextcount;
+    while (drift > cp0_compare_value) {
+        drift -= cp0_compare_value;
+        CPU->missed_clock_ticks++;
+    }
+    nextcount = cp0_count_read() + cp0_compare_value - drift;
+    cp0_compare_write(nextcount);
+    clock();
+}
+static void swint0(int n, istate_t *istate)
+{
+    cp0_cause_write(cp0_cause_read() & ~(1 << 8)); /* clear SW0 interrupt */
+    ipc_irq_send_notif(0);
+}
+static void swint1(int n, istate_t *istate)
+{
+    cp0_cause_write(cp0_cause_read() & ~(1 << 9)); /* clear SW1 interrupt */
+    ipc_irq_send_notif(1);
+}
+/* Initialize basic tables for exception dispatching */
+void interrupt_init(void)
+{
+    int_register(TIMER_IRQ, "timer", timer_exception);
+    int_register(0, "swint0", swint0);
+    int_register(1, "swint1", swint1);
+    timer_start();
+}
+static void ipc_int(int n, istate_t *istate)
+{
+    ipc_irq_send_notif(n-INT_OFFSET);
+}
+/* Reregister irq to be IPC-ready */
+void irq_ipc_bind_arch(__native irq)
+{
+    /* Do not allow to redefine timer */
+    /* Swint0, Swint1 are already handled */
+    if (irq == TIMER_IRQ || irq < 2)
+        return;
+    int_register(irq, "ipc_int", ipc_int);
+}
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/mips32/src/fpu_context.c
 ,0 → 1,62
+/*
+ * Copyright (C) 2005 Jakub Vana
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup mips32
+ * @{
+ */
+/** @file
+ *
+ */
+#include <fpu_context.h>
+#include <arch.h>
+#include <arch/cp0.h>
+#include <proc/thread.h>
+void fpu_disable(void)
+{
+#ifdef ARCH_HAS_FPU
+    cp0_status_write(cp0_status_read() & ~cp0_status_fpu_bit);
+#endif
+}
+void fpu_enable(void)
+{
+#ifdef ARCH_HAS_FPU
+    cp0_status_write(cp0_status_read() | cp0_status_fpu_bit);
+#endif
+}
+void fpu_init()
+{
+    /* TODO: Zero all registers */
+}
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/mips32/src/exception.c
 ,0 → 1,177
+/*
+ * Copyright (C) 2003-2004 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup mips32
+ * @{
+ */
+/** @file
+ */
+#include <arch/exception.h>
+#include <arch/interrupt.h>
+#include <panic.h>
+#include <arch/cp0.h>
+#include <arch/types.h>
+#include <arch.h>
+#include <debug.h>
+#include <proc/thread.h>
+#include <symtab.h>
+#include <print.h>
+#include <interrupt.h>
+#include <func.h>
+#include <console/kconsole.h>
+#include <arch/debugger.h>
+static char * exctable[] = {
+    "Interrupt","TLB Modified","TLB Invalid","TLB Invalid Store",
+        "Address Error - load/instr. fetch",
+        "Address Error - store",
+        "Bus Error - fetch instruction",
+        "Bus Error - data reference",
+        "Syscall",
+        "BreakPoint",
+        "Reserved Instruction",
+        "Coprocessor Unusable",
+        "Arithmetic Overflow",
+        "Trap",
+        "Virtual Coherency - instruction",
+        "Floating Point",
+        NULL, NULL, NULL, NULL, NULL, NULL, NULL,
+        "WatchHi/WatchLo", /* 23 */
+        NULL, NULL, NULL, NULL, NULL, NULL, NULL,
+        "Virtual Coherency - data",
+};
+static void print_regdump(istate_t *istate)
+{
+    char *pcsymbol = "";
+    char *rasymbol = "";
+    char *s = get_symtab_entry(istate->epc);
+    if (s)
+        pcsymbol = s;
+    s = get_symtab_entry(istate->ra);
+    if (s)
+        rasymbol = s;
+    printf("PC: %#x(%s) RA: %#x(%s), SP(%p)\n", istate->epc, pcsymbol, istate->ra, rasymbol, istate->sp);
+}
+static void unhandled_exception(int n, istate_t *istate)
+{
+    fault_if_from_uspace(istate, "unhandled exception %s", exctable[n]);
+    print_regdump(istate);
+    panic("unhandled exception %s\n", exctable[n]);
+}
+static void reserved_instr_exception(int n, istate_t *istate)
+{
+    if (*((__u32 *)istate->epc) == 0x7c03e83b) {
+        ASSERT(THREAD);
+        istate->epc += 4;
+        istate->v1 = istate->k1;
+    } else
+        unhandled_exception(n, istate);
+}
+static void breakpoint_exception(int n, istate_t *istate)
+{
+#ifdef CONFIG_DEBUG
+    debugger_bpoint(istate);
+#else
+    /* it is necessary to not re-execute BREAK instruction after
+       returning from Exception handler
+       (see page 138 in R4000 Manual for more information) */
+    istate->epc += 4;
+#endif
+}
+static void tlbmod_exception(int n, istate_t *istate)
+{
+    tlb_modified(istate);
+}
+static void tlbinv_exception(int n, istate_t *istate)
+{
+    tlb_invalid(istate);
+}
+#ifdef CONFIG_FPU_LAZY
+static void cpuns_exception(int n, istate_t *istate)
+{
+    if (cp0_cause_coperr(cp0_cause_read()) == fpu_cop_id)
+        scheduler_fpu_lazy_request();
+    else {
+        fault_if_from_uspace(istate, "unhandled Coprocessor Unusable Exception");
+        panic("unhandled Coprocessor Unusable Exception\n");
+    }
+}
+#endif
+static void interrupt_exception(int n, istate_t *istate)
+{
+    __u32 cause;
+    int i;
+    /* decode interrupt number and process the interrupt */
+    cause = (cp0_cause_read() >> 8) &0xff;
+    for (i = 0; i < 8; i++)
+        if (cause & (1 << i))
+            exc_dispatch(i+INT_OFFSET, istate);
+}
+/** Handle syscall userspace call */
+static void syscall_exception(int n, istate_t *istate)
+{
+    panic("Syscall is handled through shortcut");
+}
+void exception_init(void)
+{
+    int i;
+    /* Clear exception table */
+    for (i=0;i < IVT_ITEMS; i++)
+        exc_register(i, "undef", (iroutine) unhandled_exception);
+    exc_register(EXC_Bp, "bkpoint", (iroutine) breakpoint_exception);
+    exc_register(EXC_RI, "resinstr", (iroutine) reserved_instr_exception);
+    exc_register(EXC_Mod, "tlb_mod", (iroutine) tlbmod_exception);
+    exc_register(EXC_TLBL, "tlbinvl", (iroutine) tlbinv_exception);
+    exc_register(EXC_TLBS, "tlbinvl", (iroutine) tlbinv_exception);
+    exc_register(EXC_Int, "interrupt", (iroutine) interrupt_exception);
+#ifdef CONFIG_FPU_LAZY
+    exc_register(EXC_CpU, "cpunus", (iroutine) cpuns_exception);
+#endif
+    exc_register(EXC_Sys, "syscall", (iroutine) syscall_exception);
+}
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/mips32/src/console.c
 ,0 → 1,69
+/*
+ * Copyright (C) 2005 Ondrej Palkovsky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup mips32
+ * @{
+ */
+/** @file
+ */
+#include <console/console.h>
+#include <arch/console.h>
+#include <arch/drivers/arc.h>
+#include <arch/drivers/serial.h>
+#include <arch/drivers/msim.h>
+void console_init(void)
+{
+    if (arc_enabled()) {
+        arc_console();
+    } else if (serial_init()) {
+        serial_console();
+    } else {
+        msim_console();
+    }
+}
+/** Acquire console back for kernel
+ *
+ */
+void arch_grab_console(void)
+{
+    msim_kbd_grab();
+}
+/** Return console to userspace
+ *
+ */
+void arch_release_console(void)
+{
+    msim_kbd_release();
+}
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/mips32/src/cache.c
 ,0 → 1,45
+/*
+ * Copyright (C) 2003-2004 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup mips32
+ * @{
+ */
+/** @file
+ */
+#include <arch/cache.h>
+#include <panic.h>
+void cache_error(void)
+{
+    panic("cache_error exception\n");
+}
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/mips32/src/asm.S
 ,0 → 1,299
+#
+# Copyright (C) 2003-2004 Jakub Jermar
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# - Redistributions of source code must retain the above copyright
+#   notice, this list of conditions and the following disclaimer.
+# - Redistributions in binary form must reproduce the above copyright
+#   notice, this list of conditions and the following disclaimer in the
+#   documentation and/or other materials provided with the distribution.
+# - The name of the author may not be used to endorse or promote products
+#   derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+#include <arch/asm/regname.h>
+.text
+.macro cp0_read reg
+    mfc0 $2,\reg
+    j $31
+    nop
+.endm
+.macro cp0_write reg
+    mtc0 $4,\reg
+    j $31
+    nop
+.endm
+.set noat
+.set noreorder
+.set nomacro
+.global cpu_halt
+cpu_halt:
+    j cpu_halt
+    nop
+.global memsetb
+memsetb:
+    j _memsetb
+    nop
+.global memcpy
+.global memcpy_from_uspace
+.global memcpy_to_uspace
+.global memcpy_from_uspace_failover_address
+.global memcpy_to_uspace_failover_address
+memcpy:
+memcpy_from_uspace:
+memcpy_to_uspace:
+    addiu   $v0,$a1,3
+    li  $v1,-4          # 0xfffffffffffffffc
+    and $v0,$v0,$v1
+    beq $a1,$v0,3f
+    move    $t0,$a0
+:
+    beq $a2,$zero,2f
+    move    $a3,$zero
+:
+    addu    $v0,$a1,$a3
+    lbu $a0,0($v0)
+    addu    $v1,$t0,$a3
+    addiu   $a3,$a3,1
+    bne $a3,$a2,1b
+    sb  $a0,0($v1)
+:
+    jr  $ra
+    move    $v0,$a1
+:
+    addiu   $v0,$a0,3
+    and $v0,$v0,$v1
+    bne $a0,$v0,0b
+    srl $t1,$a2,2
+    beq $t1,$zero,5f
+    move    $a3,$zero
+    move    $a3,$zero
+    move    $a0,$zero
+:
+    addu    $v0,$a1,$a0
+    lw  $v1,0($v0)
+    addiu   $a3,$a3,1
+    addu    $v0,$t0,$a0
+    sw  $v1,0($v0)
+    bne $a3,$t1,4b
+    addiu   $a0,$a0,4
+:
+    andi    $a2,$a2,0x3
+    beq $a2,$zero,2b
+    nop
+    sll $v0,$a3,2
+    addu    $t1,$v0,$t0
+    move    $a3,$zero
+    addu    $t0,$v0,$a1
+:
+    addu    $v0,$t0,$a3
+    lbu $a0,0($v0)
+    addu    $v1,$t1,$a3
+    addiu   $a3,$a3,1
+    bne $a3,$a2,6b
+    sb  $a0,0($v1)
+    jr  $ra
+    move    $v0,$a1
+memcpy_from_uspace_failover_address:
+memcpy_to_uspace_failover_address:
+    jr  $ra
+    move    $v0, $zero
+.macro fpu_gp_save reg ctx
+    mfc1 $t0,$\reg
+    sw $t0, \reg*4(\ctx)
+.endm
+.macro fpu_gp_restore reg ctx
+    lw $t0, \reg*4(\ctx)
+    mtc1 $t0,$\reg
+.endm
+.macro fpu_ct_save reg ctx
+    cfc1 $t0,$1
+    sw $t0, (\reg+32)*4(\ctx)
+.endm
+.macro fpu_ct_restore reg ctx
+    lw $t0, (\reg+32)*4(\ctx)
+    ctc1 $t0,$\reg
+.endm
+.global fpu_context_save
+fpu_context_save:
+#ifdef ARCH_HAS_FPU
+    fpu_gp_save 0,$a0
+    fpu_gp_save 1,$a0
+    fpu_gp_save 2,$a0
+    fpu_gp_save 3,$a0
+    fpu_gp_save 4,$a0
+    fpu_gp_save 5,$a0
+    fpu_gp_save 6,$a0
+    fpu_gp_save 7,$a0
+    fpu_gp_save 8,$a0
+    fpu_gp_save 9,$a0
+    fpu_gp_save 10,$a0
+    fpu_gp_save 11,$a0
+    fpu_gp_save 12,$a0
+    fpu_gp_save 13,$a0
+    fpu_gp_save 14,$a0
+    fpu_gp_save 15,$a0
+    fpu_gp_save 16,$a0
+    fpu_gp_save 17,$a0
+    fpu_gp_save 18,$a0
+    fpu_gp_save 19,$a0
+    fpu_gp_save 20,$a0
+    fpu_gp_save 21,$a0
+    fpu_gp_save 22,$a0
+    fpu_gp_save 23,$a0
+    fpu_gp_save 24,$a0
+    fpu_gp_save 25,$a0
+    fpu_gp_save 26,$a0
+    fpu_gp_save 27,$a0
+    fpu_gp_save 28,$a0
+    fpu_gp_save 29,$a0
+    fpu_gp_save 30,$a0
+    fpu_gp_save 31,$a0
+    fpu_ct_save 1,$a0
+    fpu_ct_save 2,$a0
+    fpu_ct_save 3,$a0
+    fpu_ct_save 4,$a0
+    fpu_ct_save 5,$a0
+    fpu_ct_save 6,$a0
+    fpu_ct_save 7,$a0
+    fpu_ct_save 8,$a0
+    fpu_ct_save 9,$a0
+    fpu_ct_save 10,$a0
+    fpu_ct_save 11,$a0
+    fpu_ct_save 12,$a0
+    fpu_ct_save 13,$a0
+    fpu_ct_save 14,$a0
+    fpu_ct_save 15,$a0
+    fpu_ct_save 16,$a0
+    fpu_ct_save 17,$a0
+    fpu_ct_save 18,$a0
+    fpu_ct_save 19,$a0
+    fpu_ct_save 20,$a0
+    fpu_ct_save 21,$a0
+    fpu_ct_save 22,$a0
+    fpu_ct_save 23,$a0
+    fpu_ct_save 24,$a0
+    fpu_ct_save 25,$a0
+    fpu_ct_save 26,$a0
+    fpu_ct_save 27,$a0
+    fpu_ct_save 28,$a0
+    fpu_ct_save 29,$a0
+    fpu_ct_save 30,$a0
+    fpu_ct_save 31,$a0
+#endif
+    j $ra
+    nop
+.global fpu_context_restore
+fpu_context_restore:
+#ifdef ARCH_HAS_FPU
+    fpu_gp_restore 0,$a0
+    fpu_gp_restore 1,$a0
+    fpu_gp_restore 2,$a0
+    fpu_gp_restore 3,$a0
+    fpu_gp_restore 4,$a0
+    fpu_gp_restore 5,$a0
+    fpu_gp_restore 6,$a0
+    fpu_gp_restore 7,$a0
+    fpu_gp_restore 8,$a0
+    fpu_gp_restore 9,$a0
+    fpu_gp_restore 10,$a0
+    fpu_gp_restore 11,$a0
+    fpu_gp_restore 12,$a0
+    fpu_gp_restore 13,$a0
+    fpu_gp_restore 14,$a0
+    fpu_gp_restore 15,$a0
+    fpu_gp_restore 16,$a0
+    fpu_gp_restore 17,$a0
+    fpu_gp_restore 18,$a0
+    fpu_gp_restore 19,$a0
+    fpu_gp_restore 20,$a0
+    fpu_gp_restore 21,$a0
+    fpu_gp_restore 22,$a0
+    fpu_gp_restore 23,$a0
+    fpu_gp_restore 24,$a0
+    fpu_gp_restore 25,$a0
+    fpu_gp_restore 26,$a0
+    fpu_gp_restore 27,$a0
+    fpu_gp_restore 28,$a0
+    fpu_gp_restore 29,$a0
+    fpu_gp_restore 30,$a0
+    fpu_gp_restore 31,$a0
+    fpu_ct_restore 1,$a0
+    fpu_ct_restore 2,$a0
+    fpu_ct_restore 3,$a0
+    fpu_ct_restore 4,$a0
+    fpu_ct_restore 5,$a0
+    fpu_ct_restore 6,$a0
+    fpu_ct_restore 7,$a0
+    fpu_ct_restore 8,$a0
+    fpu_ct_restore 9,$a0
+    fpu_ct_restore 10,$a0
+    fpu_ct_restore 11,$a0
+    fpu_ct_restore 12,$a0
+    fpu_ct_restore 13,$a0
+    fpu_ct_restore 14,$a0
+    fpu_ct_restore 15,$a0
+    fpu_ct_restore 16,$a0
+    fpu_ct_restore 17,$a0
+    fpu_ct_restore 18,$a0
+    fpu_ct_restore 19,$a0
+    fpu_ct_restore 20,$a0
+    fpu_ct_restore 21,$a0
+    fpu_ct_restore 22,$a0
+    fpu_ct_restore 23,$a0
+    fpu_ct_restore 24,$a0
+    fpu_ct_restore 25,$a0
+    fpu_ct_restore 26,$a0
+    fpu_ct_restore 27,$a0
+    fpu_ct_restore 28,$a0
+    fpu_ct_restore 29,$a0
+    fpu_ct_restore 30,$a0
+    fpu_ct_restore 31,$a0
+#endif
+    j $ra
+    nop

 /tags/0.2.0.2/kernel/arch/mips32/src/panic.S
 ,0 → 1,48
+#
+# Copyright (C) 2003-2004 Jakub Jermar
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# - Redistributions of source code must retain the above copyright
+#   notice, this list of conditions and the following disclaimer.
+# - Redistributions in binary form must reproduce the above copyright
+#   notice, this list of conditions and the following disclaimer in the
+#   documentation and/or other materials provided with the distribution.
+# - The name of the author may not be used to endorse or promote products
+#   derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+.text
+.set noat
+.set noreorder
+.set nomacro
+#include <arch/asm/regname.h>
+.global panic_printf
+/* From printf return directly to halt() */
+panic_printf:
+    jal printf
+    nop
+    j halt
+    nop
+/* This code does not work, god knows why */
+/*  lui $ra, %hi(halt)
+    j printf
+    ori $ra, %lo(halt) */

 /tags/0.2.0.2/kernel/arch/mips32/src/context.S
 ,0 → 1,86
+#
+# Copyright (C) 2003-2004 Jakub Jermar
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# - Redistributions of source code must retain the above copyright
+#   notice, this list of conditions and the following disclaimer.
+# - Redistributions in binary form must reproduce the above copyright
+#   notice, this list of conditions and the following disclaimer in the
+#   documentation and/or other materials provided with the distribution.
+# - The name of the author may not be used to endorse or promote products
+#   derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+#include <arch/asm/regname.h>
+#include <arch/context_offset.h>
+.text
+.set noat
+.set noreorder
+.set nomacro
+.global context_save_arch
+.global context_restore_arch
+.macro CONTEXT_STORE r
+    sw $s0,OFFSET_S0(\r)
+    sw $s1,OFFSET_S1(\r)
+    sw $s2,OFFSET_S2(\r)
+    sw $s3,OFFSET_S3(\r)
+    sw $s4,OFFSET_S4(\r)
+    sw $s5,OFFSET_S5(\r)
+    sw $s6,OFFSET_S6(\r)
+    sw $s7,OFFSET_S7(\r)
+    sw $s8,OFFSET_S8(\r)
+    sw $gp,OFFSET_GP(\r)
+    sw $ra,OFFSET_PC(\r)
+    sw $sp,OFFSET_SP(\r)
+.endm
+.macro CONTEXT_LOAD r
+    lw $s0,OFFSET_S0(\r)
+    lw $s1,OFFSET_S1(\r)
+    lw $s2,OFFSET_S2(\r)
+    lw $s3,OFFSET_S3(\r)
+    lw $s4,OFFSET_S4(\r)
+    lw $s5,OFFSET_S5(\r)
+    lw $s6,OFFSET_S6(\r)
+    lw $s7,OFFSET_S7(\r)
+    lw $s8,OFFSET_S8(\r)
+    lw $gp,OFFSET_GP(\r)
+    lw $ra,OFFSET_PC(\r)
+    lw $sp,OFFSET_SP(\r)
+.endm
+context_save_arch:
+    CONTEXT_STORE $a0
+    # context_save returns 1
+    j $31
+    li $2, 1
+context_restore_arch:
+    CONTEXT_LOAD $a0
+    # context_restore returns 0
+    j $31
+    xor $2, $2

 /tags/0.2.0.2/kernel/arch/mips32/src/dummy.S
 ,0 → 1,41
+#
+# Copyright (C) 2003-2004 Jakub Jermar
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# - Redistributions of source code must retain the above copyright
+#   notice, this list of conditions and the following disclaimer.
+# - Redistributions in binary form must reproduce the above copyright
+#   notice, this list of conditions and the following disclaimer in the
+#   documentation and/or other materials provided with the distribution.
+# - The name of the author may not be used to endorse or promote products
+#   derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+.text
+.set noat
+.global calibrate_delay_loop
+.global asm_delay_loop
+.global dummy
+calibrate_delay_loop:
+asm_delay_loop:
+dummy:
+    j $31
+    nop

 /tags/0.2.0.2/kernel/arch/mips32/Makefile.inc
 ,0 → 1,135
+#
+# Copyright (C) 2005 Martin Decky
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# - Redistributions of source code must retain the above copyright
+#   notice, this list of conditions and the following disclaimer.
+# - Redistributions in binary form must reproduce the above copyright
+#   notice, this list of conditions and the following disclaimer in the
+#   documentation and/or other materials provided with the distribution.
+# - The name of the author may not be used to endorse or promote products
+#   derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+## Toolchain configuration
+#
+BFD_ARCH = mips
+TARGET = mipsel-linux-gnu
+TOOLCHAIN_DIR = /usr/local/mipsel/bin
+## Make some default assumptions
+#
+ifndef MIPS_MACHINE
+    MIPS_MACHINE = msim
+endif
+KERNEL_LOAD_ADDRESS = 0x80100000
+INIT_ADDRESS = 0x81000000
+INIT_SIZE = 262144
+CFLAGS += -mno-abicalls -G 0 -fno-zero-initialized-in-bss
+DEFS += -D__32_BITS__ -DMACHINE=${MIPS_MACHINE} -DKERNEL_LOAD_ADDRESS=${KERNEL_LOAD_ADDRESS} -DINIT_ADDRESS=${INIT_ADDRESS} -DINIT_SIZE=${INIT_SIZE}
+## Compile with hierarchical page tables support.
+#
+CONFIG_PAGE_PT = y
+DEFS += -DCONFIG_PAGE_PT
+## Compile with support for address space identifiers.
+#
+CONFIG_ASID = y
+CONFIG_ASID_FIFO = y
+## Accepted MACHINEs
+#
+ifeq ($(MIPS_MACHINE),indy)
+    # GCC 4.0.1 compiled for mipsEL has problems compiling in
+    # BigEndian mode with the swl/swr/lwl/lwr instructions.
+    # We have to compile it with mips-sgi-irix5 to get it right.
+    BFD_NAME = elf32-bigmips
+    BFD = ecoff-bigmips --impure
+    TARGET = mips-sgi-irix5
+    TOOLCHAIN_DIR = /usr/local/mips/bin
+    KERNEL_LOAD_ADDRESS = 0x88002000
+    CFLAGS += -EB -DBIG_ENDIAN -DARCH_HAS_FPU -march=r4600
+    INIT_ADDRESS = 0
+    INIT_SIZE = 0
+endif
+ifeq ($(MIPS_MACHINE),lgxemul)
+    BFD_NAME = elf32-tradlittlemips
+    BFD = binary
+    CFLAGS += -DFB_BIG_ENDIAN -DARCH_HAS_FPU -mips3
+endif
+ifeq ($(MIPS_MACHINE),bgxemul)
+    BFD_NAME = elf32-bigmips
+    BFD = ecoff-bigmips
+    TARGET = mips-sgi-irix5
+    TOOLCHAIN_DIR = /usr/local/mips/bin
+    CFLAGS += -EB -DBIG_ENDIAN -DARCH_HAS_FPU -mips3
+    INIT_ADDRESS = 0x81800000
+endif
+ifeq ($(MIPS_MACHINE),simics)
+    # SIMICS 4kc emulation is broken, although for instructions
+    # that do not bother us
+    BFD_NAME = elf32-tradlittlemips
+    BFD = elf32-tradlittlemips
+    CFLAGS += -mhard-float -mips3 -DTLBCNT=16
+    TLBCNT = 16
+endif
+ifeq ($(MIPS_MACHINE),msim)
+    BFD_NAME = elf32-tradlittlemips
+    BFD = binary
+    CFLAGS += -mhard-float -mips3
+endif
+## Compile with support for software integer division.
+#
+CONFIG_SOFTINT = y
+ARCH_SOURCES = \
+    arch/$(ARCH)/src/start.S \
+    arch/$(ARCH)/src/context.S \
+    arch/$(ARCH)/src/panic.S \
+    arch/$(ARCH)/src/mips32.c \
+    arch/$(ARCH)/src/dummy.S \
+    arch/$(ARCH)/src/console.c \
+    arch/$(ARCH)/src/asm.S \
+    arch/$(ARCH)/src/exception.c \
+    arch/$(ARCH)/src/interrupt.c \
+    arch/$(ARCH)/src/cache.c \
+    arch/$(ARCH)/src/debugger.c \
+    arch/$(ARCH)/src/cpu/cpu.c \
+    arch/$(ARCH)/src/mm/frame.c \
+    arch/$(ARCH)/src/mm/page.c \
+    arch/$(ARCH)/src/mm/tlb.c \
+    arch/$(ARCH)/src/mm/as.c \
+    arch/$(ARCH)/src/fpu_context.c \
+    arch/$(ARCH)/src/ddi/ddi.c \
+    arch/$(ARCH)/src/drivers/arc.c \
+    arch/$(ARCH)/src/drivers/msim.c \
+    arch/$(ARCH)/src/drivers/serial.c

 /tags/0.2.0.2/kernel/arch/mips32/include/cp0.h
 ,0 → 1,123
+/*
+ * Copyright (C) 2003-2004 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/** @addtogroup mips32
+ * @{
+ */
+/** @file
+ */
+#ifndef __mips32_CP0_H__
+#define __mips32_CP0_H__
+#include <arch/types.h>
+#include <arch/mm/tlb.h>
+#define cp0_status_ie_enabled_bit   (1<<0)
+#define cp0_status_exl_exception_bit    (1<<1)
+#define cp0_status_erl_error_bit    (1<<2)
+#define cp0_status_um_bit           (1<<4)
+#define cp0_status_bev_bootstrap_bit    (1<<22)
+#define cp0_status_fpu_bit              (1<<29)
+#define cp0_status_im_shift     8
+#define cp0_status_im_mask              0xff00
+#define cp0_cause_excno(cause) ((cause >> 2) & 0x1f)
+#define cp0_cause_coperr(cause) ((cause >> 28) & 0x3)
+#define fpu_cop_id 1
+/*
+ * Magic value for use in msim.
+ */
+#define cp0_compare_value       100000
+#define cp0_mask_all_int() cp0_status_write(cp0_status_read() & ~(cp0_status_im_mask))
+#define cp0_unmask_all_int() cp0_status_write(cp0_status_read() | cp0_status_im_mask)
+#define cp0_mask_int(it) cp0_status_write(cp0_status_read() & ~(1<<(cp0_status_im_shift+(it))))
+#define cp0_unmask_int(it) cp0_status_write(cp0_status_read() | (1<<(cp0_status_im_shift+(it))))
+#define GEN_READ_CP0(nm,reg) static inline __u32 cp0_ ##nm##_read(void) \
+  { \
+      __u32 retval; \
+      asm("mfc0 %0, $" #reg : "=r"(retval)); \
+      return retval; \
+  }
+#define GEN_WRITE_CP0(nm,reg) static inline void cp0_ ##nm##_write(__u32 val) \
+ { \
+    asm("mtc0 %0, $" #reg : : "r"(val) ); \
+ }
+GEN_READ_CP0(index, 0);
+GEN_WRITE_CP0(index, 0);
+GEN_READ_CP0(random, 1);
+GEN_READ_CP0(entry_lo0, 2);
+GEN_WRITE_CP0(entry_lo0, 2);
+GEN_READ_CP0(entry_lo1, 3);
+GEN_WRITE_CP0(entry_lo1, 3);
+GEN_READ_CP0(context, 4);
+GEN_WRITE_CP0(context, 4);
+GEN_READ_CP0(pagemask, 5);
+GEN_WRITE_CP0(pagemask, 5);
+GEN_READ_CP0(wired, 6);
+GEN_WRITE_CP0(wired, 6);
+GEN_READ_CP0(badvaddr, 8);
+GEN_READ_CP0(count, 9);
+GEN_WRITE_CP0(count, 9);
+GEN_READ_CP0(entry_hi, 10);
+GEN_WRITE_CP0(entry_hi, 10);
+GEN_READ_CP0(compare, 11);
+GEN_WRITE_CP0(compare, 11);
+GEN_READ_CP0(status, 12);
+GEN_WRITE_CP0(status, 12);
+GEN_READ_CP0(cause, 13);
+GEN_WRITE_CP0(cause, 13);
+GEN_READ_CP0(epc, 14);
+GEN_WRITE_CP0(epc, 14);
+GEN_READ_CP0(prid, 15);
+#endif
+/** @}
+ */

 /tags/0.2.0.2/kernel/arch/mips32/include/cpu.h
 ,0 → 1,48
+/*
+ * Copyright (C) 2003-2004 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/** @addtogroup mips32
+ * @{
+ */
+/** @file
+ */
+#ifndef __mips32_CPU_H__
+#define __mips32_CPU_H__
+#include <arch/types.h>
+struct cpu_arch {
+    __u32 imp_num;
+    __u32 rev_num;
+};
+#endif
+/** @}
+ */

 /tags/0.2.0.2/kernel/arch/mips32/include/proc/task.h
 ,0 → 1,48
+/*
+ * Copyright (C) 2006 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup mips32proc
+ * @{
+ */
+/** @file
+ */
+#ifndef __mips32_TASK_H__
+#define __mips32_TASK_H__
+typedef struct {
+} task_arch_t;
+#define task_create_arch(t)
+#define task_destroy_arch(t)
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/mips32/include/proc/thread.h
 ,0 → 1,47
+/*
+ * Copyright (C) 2003-2004 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup mips32proc
+ * @{
+ */
+/** @file
+ */
+#ifndef __mips32_THREAD_H__
+#define __mips32_THREAD_H__
+typedef struct {
+} thread_arch_t;
+#define thread_create_arch(t)
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/mips32/include/context_offset.h
 ,0 → 1,56
+/* This file is automatically generated by gencontext.c. */
+/* struct context */
+#define OFFSET_SP      0x0
+#define OFFSET_PC      0x4
+#define OFFSET_S0      0x8
+#define OFFSET_S1      0xc
+#define OFFSET_S2      0x10
+#define OFFSET_S3      0x14
+#define OFFSET_S4      0x18
+#define OFFSET_S5      0x1c
+#define OFFSET_S6      0x20
+#define OFFSET_S7      0x24
+#define OFFSET_S8      0x28
+#define OFFSET_GP      0x2c
+/* struct register_dump */
+#define EOFFSET_AT     0x0
+#define EOFFSET_V0     0x4
+#define EOFFSET_V1     0x8
+#define EOFFSET_A0     0xc
+#define EOFFSET_A1     0x10
+#define EOFFSET_A2     0x14
+#define EOFFSET_A3     0x18
+#define EOFFSET_T0     0x1c
+#define EOFFSET_T1     0x20
+#define EOFFSET_T2     0x24
+#define EOFFSET_T3     0x28
+#define EOFFSET_T4     0x2c
+#define EOFFSET_T5     0x30
+#define EOFFSET_T6     0x34
+#define EOFFSET_T7     0x38
+#define EOFFSET_S0     0x3c
+#define EOFFSET_S1     0x40
+#define EOFFSET_S2     0x44
+#define EOFFSET_S3     0x48
+#define EOFFSET_S4     0x4c
+#define EOFFSET_S5     0x50
+#define EOFFSET_S6     0x54
+#define EOFFSET_S7     0x58
+#define EOFFSET_T8     0x5c
+#define EOFFSET_T9     0x60
+#define EOFFSET_GP     0x64
+#define EOFFSET_SP     0x68
+#define EOFFSET_S8     0x6c
+#define EOFFSET_RA     0x70
+#define EOFFSET_LO     0x74
+#define EOFFSET_HI     0x78
+#define EOFFSET_STATUS 0x7c
+#define EOFFSET_EPC    0x80
+#define EOFFSET_K1     0x84
+#define REGISTER_SPACE 136
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/mips32/include/asm/regname.h
 ,0 → 1,99
+/*
+ * Copyright (C) 2005 Ondrej Palkovsky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup mips32
+ * @{
+ */
+/** @file
+ */
+#ifndef __mips32_REGNAME_H_
+#define __mips32_REGNAME_H_
+#define zero    0
+#define at      1
+#define v0      2
+#define v1      3
+#define a0      4
+#define a1      5
+#define a2      6
+#define a3      7
+#define t0      8
+#define t1      9
+#define t2      10
+#define t3      11
+#define t4      12
+#define t5      13
+#define t6      14
+#define t7      15
+#define s0      16
+#define s1      17
+#define s2      18
+#define s3      19
+#define s4      20
+#define s5      21
+#define s6      22
+#define s7      23
+#define t8      24
+#define t9      25
+#define k0      26
+#define k1      27
+#define gp      28
+#define sp      29
+#define s8      30
+#define ra      31
+#define rindex      0
+#define rrandom     1
+#define entrylo0    2
+#define entrylo1    3
+#define context     4
+#define pagemask    5
+#define wired       6
+#define badvaddr    8
+#define count       9
+#define entryhi     10
+#define compare     11
+#define status      12
+#define cause       13
+#define epc     14
+#define rconfig     16
+#define lladdr      17
+#define watchlo     18
+#define watchhi     19
+#define xcontext    20
+#define rdebug      23
+#define depc        24
+#define eepc        30
+#endif /* _REGNAME_H_ */
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/mips32/include/asm/boot.h
 ,0 → 1,46
+/*
+ * Copyright (C) 2005 Ondrej Palkovsky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup mips32
+ * @{
+ */
+/** @file
+ */
+#ifndef __mips32_BOOT_H_
+#define __mips32_BOOT_H_
+/* Temporary stack size for boot process */
+#define TEMP_STACK_SIZE 0x100
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/mips32/include/interrupt.h
 ,0 → 1,58
+/*
+ * Copyright (C) 2003-2004 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup mips32interrupt
+ * @{
+ */
+/** @file
+ */
+#ifndef __mips32_INTERRUPT_H__
+#define __mips32_INTERRUPT_H__
+#include <arch/exception.h>
+#define IVT_ITEMS   40
+#define INT_OFFSET  32
+#define IRQ_COUNT   8
+#define int_register(it, name, handler) exc_register(((it)+INT_OFFSET),name,handler)
+#define IRQ2    2
+#define IRQ3    3
+#define IRQ7    7
+#define TIMER_IRQ       IRQ7
+extern void interrupt_init(void);
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/mips32/include/exception.h
 ,0 → 1,128
+/*
+ * Copyright (C) 2003-2004 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup mips32
+ * @{
+ */
+/** @file
+ */
+#ifndef __mips32_EXCEPTION_H__
+#define __mips32_EXCEPTION_H__
+#ifndef __mips32_TYPES_H__
+#  include <arch/types.h>
+#endif
+#include <typedefs.h>
+#include <arch/cp0.h>
+#define EXC_Int     0
+#define EXC_Mod     1
+#define EXC_TLBL    2
+#define EXC_TLBS    3
+#define EXC_AdEL    4
+#define EXC_AdES    5
+#define EXC_IBE     6
+#define EXC_DBE     7
+#define EXC_Sys     8
+#define EXC_Bp      9
+#define EXC_RI      10
+#define EXC_CpU     11
+#define EXC_Ov      12
+#define EXC_Tr      13
+#define EXC_VCEI    14
+#define EXC_FPE     15
+#define EXC_WATCH   23
+#define EXC_VCED    31
+struct istate {
+    __u32 at;
+    __u32 v0;
+    __u32 v1;
+    __u32 a0;
+    __u32 a1;
+    __u32 a2;
+    __u32 a3;
+    __u32 t0;
+    __u32 t1;
+    __u32 t2;
+    __u32 t3;
+    __u32 t4;
+    __u32 t5;
+    __u32 t6;
+    __u32 t7;
+    __u32 s0;
+    __u32 s1;
+    __u32 s2;
+    __u32 s3;
+    __u32 s4;
+    __u32 s5;
+    __u32 s6;
+    __u32 s7;
+    __u32 t8;
+    __u32 t9;
+    __u32 gp;
+    __u32 sp;
+    __u32 s8;
+    __u32 ra;
+    __u32 lo;
+    __u32 hi;
+    __u32 status; /* cp0_status */
+    __u32 epc; /* cp0_epc */
+    __u32 k1; /* We use it as thread-local pointer */
+};
+static inline void istate_set_retaddr(istate_t *istate, __address retaddr)
+{
+    istate->epc = retaddr;
+}
+/** Return true if exception happened while in userspace */
+static inline int istate_from_uspace(istate_t *istate)
+{
+    return istate->status & cp0_status_um_bit;
+}
+static inline __native istate_get_pc(istate_t *istate)
+{
+    return istate->epc;
+}
+extern void exception(istate_t *istate);
+extern void tlb_refill_entry(void);
+extern void exception_entry(void);
+extern void cache_error_entry(void);
+extern void exception_init(void);
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/mips32/include/fpu_context.h
 ,0 → 1,51
+/*
+ * Copyright (C) 2005 Jakub Vana
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup mips32
+ * @{
+ */
+/** @file
+ */
+#ifndef __mips32_FPU_CONTEXT_H__
+#define __mips32_FPU_CONTEXT_H__
+#include <arch/types.h>
+#define FPU_CONTEXT_ALIGN    sizeof(__native)
+struct fpu_context {
+    __native dregs[32];
+    __native cregs[32];
+};
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/mips32/include/byteorder.h
 ,0 → 1,61
+/*
+ * Copyright (C) 2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup mips32
+ * @{
+ */
+/** @file
+ */
+#ifndef __mips32_BYTEORDER_H__
+#define __mips32_BYTEORDER_H__
+#include <arch/types.h>
+#include <byteorder.h>
+#ifdef BIG_ENDIAN
+static inline __u64 __u64_le2host(__u64 n)
+{
+    return __u64_byteorder_swap(n);
+}
+static inline __native __native_le2host(__native n)
+{
+    return __u32_byteorder_swap(n);
+}
+#else
+#  define __native_le2host(n)       (n)
+#  define __u64_le2host(n)      (n)
+#endif
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/mips32/include/console.h
 ,0 → 1,45
+/*
+ * Copyright (C) 2005 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup mips32
+ * @{
+ */
+/** @file
+ */
+#ifndef __mips32_CONSOLE_H__
+#define __mips32_CONSOLE_H__
+void console_init(void);
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/mips32/include/cache.h
 ,0 → 1,44
+/*
+ * Copyright (C) 2003-2004 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup mips32
+ * @{
+ */
+/** @file
+ */
+#ifndef __mips32_CACHE_H__
+#define __mips32_CACHE_H__
+extern void cache_error(void);
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/mips32/include/types.h
 ,0 → 1,67
+/*
+ * Copyright (C) 2003-2004 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup mips32
+ * @{
+ */
+/** @file
+ */
+#ifndef __mips32_TYPES_H__
+#define __mips32_TYPES_H__
+#define NULL    0
+typedef signed char __s8;
+typedef unsigned char __u8;
+typedef signed short __s16;
+typedef unsigned short __u16;
+typedef unsigned long __u32;
+typedef signed long __s32;
+typedef unsigned long long __u64;
+typedef signed long long __s64;
+typedef __u32 __address;
+typedef __u32 ipl_t;
+typedef __u32 __native;
+typedef __s32 __snative;
+typedef struct pte pte_t;
+typedef __u32 pfn_t;
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/mips32/include/stack.h
 ,0 → 1,45
+/*
+ * Copyright (C) 2006 Josef Cejka
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup mips32
+ * @{
+ */
+/** @file
+ */
+#ifndef __mips32_STACK_H__
+#define __mips32_STACK_H__
+#define STACK_ITEM_SIZE     4
+#define STACK_ALIGNMENT     8
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/mips32/include/elf.h
 ,0 → 1,52
+/*
+ * Copyright (C) 2006 Sergey Bondari
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup mips32
+ * @{
+ */
+/** @file
+ */
+#ifndef __mips32_ELF_H__
+#define __mips32_ELF_H__
+#define ELF_MACHINE     EM_MIPS
+#ifdef BIG_ENDIAN
+#  define ELF_DATA_ENCODING ELFDATA2MSB
+#else
+#  define ELF_DATA_ENCODING ELFDATA2LSB
+#endif
+#define ELF_CLASS       ELFCLASS32
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/mips32/include/memstr.h
 ,0 → 1,49
+/*
+ * Copyright (C) 2005 Sergey Bondari
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup mips32
+ * @{
+ */
+/** @file
+ */
+#ifndef __mips32_MEMSTR_H__
+#define __mips32_MEMSTR_H__
+#define memcpy(dst, src, cnt)  __builtin_memcpy((dst), (src), (cnt))
+extern void memsetw(__address dst, size_t cnt, __u16 x);
+extern void memsetb(__address dst, size_t cnt, __u8 x);
+extern int memcmp(__address src, __address dst, int cnt);
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/mips32/include/arg.h
 ,0 → 1,61
+/*
+ * Copyright (C) 2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup mips32
+ * @{
+ */
+/** @file
+ */
+#ifndef __mips32_ARG_H__
+#define __mips32_ARG_H__
+#include <arch/types.h>
+/**
+ * va_arg macro for MIPS32 - problem is that 64 bit values must be aligned on an 8-byte boundary (32bit values not)
+ * To satisfy this, paddings must be sometimes inserted.
+ */
+typedef __address va_list;
+#define va_start(ap, lst) \
+    ((ap) = (va_list)&(lst) + sizeof(lst))
+#define va_arg(ap, type)    \
+    (((type *)((ap) = (va_list)( (sizeof(type) <= 4) ? ((__address)((ap) + 2*4 - 1) & (~3)) : ((__address)((ap) + 2*8 -1) & (~7)) )))[-1])
+#define va_copy(dst,src) ((dst)=(src))
+#define va_end(ap)
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/mips32/include/atomic.h
 ,0 → 1,77
+/*
+ * Copyright (C) 2005 Ondrej Palkovsky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup mips32
+ * @{
+ */
+/** @file
+ */
+#ifndef __mips32_ATOMIC_H__
+#define __mips32_ATOMIC_H__
+#define atomic_inc(x)   ((void) atomic_add(x, 1))
+#define atomic_dec(x)   ((void) atomic_add(x, -1))
+#define atomic_postinc(x) (atomic_add(x, 1) - 1)
+#define atomic_postdec(x) (atomic_add(x, -1) + 1)
+#define atomic_preinc(x) atomic_add(x, 1)
+#define atomic_predec(x) atomic_add(x, -1)
+/* Atomic addition of immediate value.
+ *
+ * @param val Memory location to which will be the immediate value added.
+ * @param i Signed immediate that will be added to *val.
+ *
+ * @return Value after addition.
+ */
+static inline long atomic_add(atomic_t *val, int i)
+{
+    long tmp, v;
+    __asm__ volatile (
+        "1:\n"
+        "   ll %0, %1\n"
+        "   addiu %0, %0, %3\n" /* same as addi, but never traps on overflow */
+        "       move %2, %0\n"
+        "   sc %0, %1\n"
+        "   beq %0, %4, 1b\n"   /* if the atomic operation failed, try again */
+        /*  nop */      /* nop is inserted automatically by compiler */
+        : "=r" (tmp), "=m" (val->count), "=r" (v)
+        : "i" (i), "i" (0)
+        );
+    return v;
+}
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/mips32/include/arch.h
 ,0 → 1,42
+/*
+ * Copyright (C) 2005 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup mips32
+ * @{
+ */
+/** @file
+ */
+#ifndef __mips32_ARCH_H__
+#define __mips32_ARCH_H__
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/mips32/include/asm.h
 ,0 → 1,73
+/*
+ * Copyright (C) 2003-2004 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup mips32
+ * @{
+ */
+/** @file
+ */
+#ifndef __mips32_ASM_H__
+#define __mips32_ASM_H__
+#include <arch/types.h>
+#include <typedefs.h>
+#include <config.h>
+static inline void cpu_sleep(void)
+{
+    /* Most of the simulators do not support */
+/*  __asm__ volatile ("wait"); */
+}
+/** Return base address of current stack
+ *
+ * Return the base address of the current stack.
+ * The stack is assumed to be STACK_SIZE bytes long.
+ * The stack must start on page boundary.
+ */
+static inline __address get_stack_base(void)
+{
+    __address v;
+    __asm__ volatile ("and %0, $29, %1\n" : "=r" (v) : "r" (~(STACK_SIZE-1)));
+    return v;
+}
+extern void cpu_halt(void);
+extern void asm_delay_loop(__u32 t);
+extern void userspace_asm(__address ustack, __address uspace_uarg,
+              __address entry);
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/mips32/include/faddr.h
 ,0 → 1,46
+/*
+ * Copyright (C) 2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup mips32
+ * @{
+ */
+/** @file
+ */
+#ifndef __mips32_FADDR_H__
+#define __mips32_FADDR_H__
+#include <arch/types.h>
+#define FADDR(fptr)     ((__address) (fptr))
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/mips32/include/mm/frame.h
 ,0 → 1,53
+/*
+ * Copyright (C) 2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup mips32mm
+ * @{
+ */
+/** @file
+ */
+#ifndef __mips32_FRAME_H__
+#define __mips32_FRAME_H__
+#define FRAME_WIDTH     14  /* 16K */
+#define FRAME_SIZE      (1<<FRAME_WIDTH)
+#ifdef KERNEL
+#ifndef __ASM__
+extern void frame_arch_init(void);
+#endif /* __ASM__ */
+#endif /* KERNEL */
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/mips32/include/mm/memory_init.h
 ,0 → 1,49
+/*
+ * Copyright (C) 2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup mips32mm
+ * @{
+ */
+/** @file
+ */
+#ifndef __mips32_MEMORY_INIT_H__
+#define __mips32_MEMORY_INIT_H__
+#include <config.h>
+/* When this function is called, we do not have ARC initiated
+ * - provide some reasonable minimum and update it later
+ */
+#define get_memory_size()   CONFIG_MEMORY_SIZE
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/mips32/include/mm/page.h
 ,0 → 1,157
+/*
+ * Copyright (C) 2003-2004 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup mips32mm
+ * @{
+ */
+/** @file
+ */
+#ifndef __mips32_PAGE_H__
+#define __mips32_PAGE_H__
+#include <arch/mm/frame.h>
+#define PAGE_WIDTH  FRAME_WIDTH
+#define PAGE_SIZE   FRAME_SIZE
+#ifndef __ASM__
+#  define KA2PA(x)  (((__address) (x)) - 0x80000000)
+#  define PA2KA(x)  (((__address) (x)) + 0x80000000)
+#else
+#  define KA2PA(x)  ((x) - 0x80000000)
+#  define PA2KA(x)  ((x) + 0x80000000)
+#endif
+#ifdef KERNEL
+/*
+ * Implementation of generic 4-level page table interface.
+ * NOTE: this implementation is under construction
+ *
+ * Page table layout:
+ * - 32-bit virtual addresses
+ * - Offset is 14 bits => pages are 16K long
+ * - PTE's use similar format as CP0 EntryLo[01] registers => PTE is therefore 4 bytes long
+ * - PTE's replace EntryLo v (valid) bit with p (present) bit
+ * - PTE's use only one bit to distinguish between cacheable and uncacheable mappings
+ * - PTE's define soft_valid field to ensure there is at least one 1 bit even if the p bit is cleared
+ * - PTE's make use of CP0 EntryLo's two-bit reserved field for bit W (writable) and bit A (accessed)
+ * - PTL0 has 64 entries (6 bits)
+ * - PTL1 is not used
+ * - PTL2 is not used
+ * - PTL3 has 4096 entries (12 bits)
+ */
+#define PTL0_ENTRIES_ARCH   64
+#define PTL1_ENTRIES_ARCH   0
+#define PTL2_ENTRIES_ARCH   0
+#define PTL3_ENTRIES_ARCH   4096
+#define PTL0_INDEX_ARCH(vaddr)  ((vaddr)>>26)
+#define PTL1_INDEX_ARCH(vaddr)  0
+#define PTL2_INDEX_ARCH(vaddr)  0
+#define PTL3_INDEX_ARCH(vaddr)  (((vaddr)>>14) & 0xfff)
+#define SET_PTL0_ADDRESS_ARCH(ptl0)
+#define GET_PTL1_ADDRESS_ARCH(ptl0, i)      (((pte_t *)(ptl0))[(i)].pfn<<12)
+#define GET_PTL2_ADDRESS_ARCH(ptl1, i)      (ptl1)
+#define GET_PTL3_ADDRESS_ARCH(ptl2, i)      (ptl2)
+#define GET_FRAME_ADDRESS_ARCH(ptl3, i)     (((pte_t *)(ptl3))[(i)].pfn<<12)
+#define SET_PTL1_ADDRESS_ARCH(ptl0, i, a)   (((pte_t *)(ptl0))[(i)].pfn = (a)>>12)
+#define SET_PTL2_ADDRESS_ARCH(ptl1, i, a)
+#define SET_PTL3_ADDRESS_ARCH(ptl2, i, a)
+#define SET_FRAME_ADDRESS_ARCH(ptl3, i, a)  (((pte_t *)(ptl3))[(i)].pfn = (a)>>12)
+#define GET_PTL1_FLAGS_ARCH(ptl0, i)        get_pt_flags((pte_t *)(ptl0), (index_t)(i))
+#define GET_PTL2_FLAGS_ARCH(ptl1, i)        PAGE_PRESENT
+#define GET_PTL3_FLAGS_ARCH(ptl2, i)        PAGE_PRESENT
+#define GET_FRAME_FLAGS_ARCH(ptl3, i)       get_pt_flags((pte_t *)(ptl3), (index_t)(i))
+#define SET_PTL1_FLAGS_ARCH(ptl0, i, x)     set_pt_flags((pte_t *)(ptl0), (index_t)(i), (x))
+#define SET_PTL2_FLAGS_ARCH(ptl1, i, x)
+#define SET_PTL3_FLAGS_ARCH(ptl2, i, x)
+#define SET_FRAME_FLAGS_ARCH(ptl3, i, x)    set_pt_flags((pte_t *)(ptl3), (index_t)(i), (x))
+#define PTE_VALID_ARCH(pte)         (*((__u32 *) (pte)) != 0)
+#define PTE_PRESENT_ARCH(pte)           ((pte)->p != 0)
+#define PTE_GET_FRAME_ARCH(pte)         ((pte)->pfn<<12)
+#define PTE_WRITABLE_ARCH(pte)          ((pte)->w != 0)
+#define PTE_EXECUTABLE_ARCH(pte)        1
+#ifndef __ASM__
+#include <arch/mm/tlb.h>
+#include <mm/page.h>
+#include <arch/mm/frame.h>
+#include <arch/types.h>
+static inline int get_pt_flags(pte_t *pt, index_t i)
+{
+    pte_t *p = &pt[i];
+    return (
+        (p->cacheable<<PAGE_CACHEABLE_SHIFT) |
+        ((!p->p)<<PAGE_PRESENT_SHIFT) |
+        (1<<PAGE_USER_SHIFT) |
+        (1<<PAGE_READ_SHIFT) |
+        ((p->w)<<PAGE_WRITE_SHIFT) |
+        (1<<PAGE_EXEC_SHIFT) |
+        (p->g<<PAGE_GLOBAL_SHIFT)
+    );
+}
+static inline void set_pt_flags(pte_t *pt, index_t i, int flags)
+{
+    pte_t *p = &pt[i];
+    p->cacheable = (flags & PAGE_CACHEABLE) != 0;
+    p->p = !(flags & PAGE_NOT_PRESENT);
+    p->g = (flags & PAGE_GLOBAL) != 0;
+    p->w = (flags & PAGE_WRITE) != 0;
+    /*
+     * Ensure that valid entries have at least one bit set.
+     */
+    p->soft_valid = 1;
+}
+extern void page_arch_init(void);
+#endif /* __ASM__ */
+#endif /* KERNEL */
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/mips32/include/mm/asid.h
 ,0 → 1,48
+/*
+ * Copyright (C) 2005 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup mips32mm
+ * @{
+ */
+/** @file
+ */
+#ifndef __mips32_ASID_H__
+#define __mips32_ASID_H__
+#include <arch/types.h>
+#define ASID_MAX_ARCH       255 /* 2^8 - 1 */
+typedef __u8 asid_t;
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/mips32/include/mm/tlb.h
 ,0 → 1,186
+/*
+ * Copyright (C) 2003-2004 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup mips32mm
+ * @{
+ */
+/** @file
+ */
+#ifndef __mips32_TLB_H__
+#define __mips32_TLB_H__
+#include <arch/exception.h>
+#include <typedefs.h>
+#ifdef TLBCNT
+#   define TLB_ENTRY_COUNT      TLBCNT
+#else
+#   define TLB_ENTRY_COUNT      48
+#endif
+#define TLB_WIRED       1
+#define TLB_KSTACK_WIRED_INDEX  0
+#define TLB_PAGE_MASK_16K   (0x3<<13)
+#define PAGE_UNCACHED           2
+#define PAGE_CACHEABLE_EXC_WRITE    5
+typedef union entry_lo entry_lo_t;
+typedef union entry_hi entry_hi_t;
+typedef union page_mask page_mask_t;
+typedef union index tlb_index_t;
+union entry_lo {
+    struct {
+#ifdef BIG_ENDIAN
+        unsigned : 2;       /* zero */
+        unsigned pfn : 24;  /* frame number */
+        unsigned c : 3;     /* cache coherency attribute */
+        unsigned d : 1;     /* dirty/write-protect bit */
+        unsigned v : 1;     /* valid bit */
+        unsigned g : 1;     /* global bit */
+#else
+        unsigned g : 1;     /* global bit */
+        unsigned v : 1;     /* valid bit */
+        unsigned d : 1;     /* dirty/write-protect bit */
+        unsigned c : 3;     /* cache coherency attribute */
+        unsigned pfn : 24;  /* frame number */
+        unsigned : 2;       /* zero */
+#endif
+    } __attribute__ ((packed));
+    __u32 value;
+};
+/** Page Table Entry. */
+struct pte {
+    unsigned g : 1;         /**< Global bit. */
+    unsigned p : 1;         /**< Present bit. */
+    unsigned d : 1;         /**< Dirty bit. */
+    unsigned cacheable : 1;     /**< Cacheable bit. */
+    unsigned : 1;           /**< Unused. */
+    unsigned soft_valid : 1;    /**< Valid content even if not present. */
+    unsigned pfn : 24;      /**< Physical frame number. */
+    unsigned w : 1;         /**< Page writable bit. */
+    unsigned a : 1;         /**< Accessed bit. */
+};
+union entry_hi {
+    struct {
+#ifdef BIG_ENDIAN
+        unsigned vpn2 : 19;
+        unsigned : 5;
+        unsigned asid : 8;
+#else
+        unsigned asid : 8;
+        unsigned : 5;
+        unsigned vpn2 : 19;
+#endif
+    } __attribute__ ((packed));
+    __u32 value;
+};
+union page_mask {
+    struct {
+#ifdef BIG_ENDIAN
+        unsigned : 7;
+        unsigned mask : 12;
+        unsigned : 13;
+#else
+        unsigned : 13;
+        unsigned mask : 12;
+        unsigned : 7;
+#endif
+    } __attribute__ ((packed));
+    __u32 value;
+};
+union index {
+    struct {
+#ifdef BIG_ENDIAN
+        unsigned p : 1;
+        unsigned : 27;
+        unsigned index : 4;
+#else
+        unsigned index : 4;
+        unsigned : 27;
+        unsigned p : 1;
+#endif
+    } __attribute__ ((packed));
+    __u32 value;
+};
+/** Probe TLB for Matching Entry
+ *
+ * Probe TLB for Matching Entry.
+ */
+static inline void tlbp(void)
+{
+    __asm__ volatile ("tlbp\n\t");
+}
+/** Read Indexed TLB Entry
+ *
+ * Read Indexed TLB Entry.
+ */
+static inline void tlbr(void)
+{
+    __asm__ volatile ("tlbr\n\t");
+}
+/** Write Indexed TLB Entry
+ *
+ * Write Indexed TLB Entry.
+ */
+static inline void tlbwi(void)
+{
+    __asm__ volatile ("tlbwi\n\t");
+}
+/** Write Random TLB Entry
+ *
+ * Write Random TLB Entry.
+ */
+static inline void tlbwr(void)
+{
+    __asm__ volatile ("tlbwr\n\t");
+}
+#define tlb_invalidate(asid)    tlb_invalidate_asid(asid)
+extern void tlb_invalid(istate_t *istate);
+extern void tlb_refill(istate_t *istate);
+extern void tlb_modified(istate_t *istate);
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/mips32/include/mm/as.h
 ,0 → 1,53
+/*
+ * Copyright (C) 2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup mips32mm
+ * @{
+ */
+/** @file
+ */
+#ifndef __mips32_AS_H__
+#define __mips32_AS_H__
+#define KERNEL_ADDRESS_SPACE_SHADOWED_ARCH  0
+#define KERNEL_ADDRESS_SPACE_START_ARCH     (unsigned long) 0x80000000
+#define KERNEL_ADDRESS_SPACE_END_ARCH       (unsigned long) 0xffffffff
+#define USER_ADDRESS_SPACE_START_ARCH       (unsigned long) 0x00000000
+#define USER_ADDRESS_SPACE_END_ARCH     (unsigned long) 0x7fffffff
+#define USTACK_ADDRESS_ARCH (0x80000000-PAGE_SIZE)
+extern void as_arch_init(void);
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/mips32/include/debugger.h
 ,0 → 1,70
+/*
+ * Copyright (C) 2005 Ondrej Palkovsky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup mips32debug
+ * @{
+ */
+/** @file
+ */
+#ifndef _mips32_DEBUGGER_H_
+#define _mips32_DEBUGGER_H_
+#include <typedefs.h>
+#include <arch/exception.h>
+#include <arch/types.h>
+#define BKPOINTS_MAX 10
+#define BKPOINT_INPROG   (1 << 0)   /**< Breakpoint was shot */
+#define BKPOINT_ONESHOT  (1 << 1)   /**< One-time breakpoint,mandatory for j/b
+                         instructions */
+#define BKPOINT_REINST   (1 << 2)   /**< Breakpoint is set on the next
+                         instruction, so that it could be
+                     reinstalled on the previous one */
+#define BKPOINT_FUNCCALL (1 << 3)   /**< Call a predefined function */
+typedef struct  {
+    __address address;      /**< Breakpoint address */
+    __native instruction; /**< Original instruction */
+    __native nextinstruction;  /**< Original instruction following break */
+    int flags;        /**< Flags regarding breakpoint */
+    count_t counter;
+    void (*bkfunc)(void *b, istate_t *istate);
+} bpinfo_t;
+extern void debugger_init(void);
+void debugger_bpoint(istate_t *istate);
+extern bpinfo_t breakpoints[BKPOINTS_MAX];
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/mips32/include/context.h
 ,0 → 1,81
+/*
+ * Copyright (C) 2003-2004 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup mips32
+ * @{
+ */
+/** @file
+ */
+#ifndef __mips32_CONTEXT_H__
+#define __mips32_CONTEXT_H__
+#include <align.h>
+#include <arch/stack.h>
+/*
+ * Put one item onto the stack to support get_stack_base() and align it up.
+ */
+#define SP_DELTA    (0 + ALIGN_UP(STACK_ITEM_SIZE, STACK_ALIGNMENT))
+#ifndef __ASM__
+#ifndef __mips32_TYPES_H__
+# include <arch/types.h>
+#endif
+/*
+ * Only save registers that must be preserved across
+ * function calls.
+ */
+struct context {
+    __address sp;
+    __address pc;
+    __u32 s0;
+    __u32 s1;
+    __u32 s2;
+    __u32 s3;
+    __u32 s4;
+    __u32 s5;
+    __u32 s6;
+    __u32 s7;
+    __u32 s8;
+    __u32 gp;
+    ipl_t ipl;
+};
+#endif /* __ASM__ */
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/mips32/include/debug.h
 ,0 → 1,56
+/*
+ * Copyright (C) 2005 Ondrej Palkovsky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup mips32debug
+ * @{
+ */
+/** @file
+ */
+#ifndef __mips32_DEBUG_H__
+#define __mips23_DEBUG_H__
+/** simulator enters the trace mode */
+#define ___traceon()    asm volatile ( "\t.word\t0x39\n");
+/**     simulator leaves the trace mode */
+#define ___traceoff()   asm volatile ( "\t.word\t0x3d\n");
+/**     register dump */
+#define ___regview()    asm volatile ( "\t.word\t0x37\n");
+/**     halt the simulator */
+#define ___halt()   asm volatile ( "\t.word\t0x28\n");
+/**     simulator enters interactive mode */
+#define ___intmode()    asm volatile ( "\t.word\t0x29\n");
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/mips32/include/barrier.h
 ,0 → 1,52
+/*
+ * Copyright (C) 2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup mips32
+ * @{
+ */
+/** @file
+ */
+#ifndef __mips32_BARRIER_H__
+#define __mips32_BARRIER_H__
+/*
+ * TODO: implement true MIPS memory barriers for macros below.
+ */
+#define CS_ENTER_BARRIER()  __asm__ volatile ("" ::: "memory")
+#define CS_LEAVE_BARRIER()  __asm__ volatile ("" ::: "memory")
+#define memory_barrier()        __asm__ volatile ("" ::: "memory")
+#define read_barrier()          __asm__ volatile ("" ::: "memory")
+#define write_barrier()         __asm__ volatile ("" ::: "memory")
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/mips32/include/drivers/serial.h
 ,0 → 1,72
+/*
+ * Copyright (C) 2005 Ondrej Palkovsky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup mips32
+ * @{
+ */
+/** @file
+ */
+#ifndef __DRV_SERIAL_H__
+#define __DRV_SERIAL_H__
+#include <console/chardev.h>
+#define SERIAL_MAX        4
+#define SERIAL_COM1       0x3f8
+#define SERIAL_COM1_IRQ   4
+#define SERIAL_COM2       0x2f8
+#define SERIAL_COM2_IRQ   3
+#define P_WRITEB(where,what)     (*((volatile char *) (0xB8000000+where))=what)
+#define P_READB(where)           (*((volatile char *)(0xB8000000+where)))
+#define SERIAL_READ(x)           P_READB(x)
+#define SERIAL_WRITE(x,c)        P_WRITEB(x,c)
+/* Interrupt enable register */
+#define SERIAL_READ_IER(x)              (P_READB((x) + 1))
+#define SERIAL_WRITE_IER(x,c)           (P_WRITEB((x)+1,c))
+/* Interrupt identification register */
+#define SERIAL_READ_IIR(x)             (P_READB((x) + 2))
+/* Line status register */
+#define SERIAL_READ_LSR(x)             (P_READB((x) + 5))
+#define TRANSMIT_EMPTY_BIT      5
+typedef struct {
+    int port;
+    int irq;
+}serial_t;
+void serial_console(void);
+int serial_init(void);
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/mips32/include/drivers/arc.h
 ,0 → 1,268
+/*
+ * Copyright (C) 2005 Ondrej Palkovsky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup mips32
+ * @{
+ */
+/** @file
+ */
+#ifndef __mips32_ARC_H__
+#define __mips32_ARC_H__
+#include <arch/types.h>
+#include <console/chardev.h>
+#define ARC_BASE_ADDR 0x1000;
+#define ARC_MAGIC 0x53435241
+/* Frame size used by ARC */
+#define ARC_FRAME 4096
+typedef enum {
+    CmResourceTypeNull = 0,
+    CmResourceTypePort,
+    CmResourceTypeInterrupt,
+    CmResourceTypeMemory,
+    CmResourceTypeDma,
+    CmResourceTypeDeviceSpecific,
+    CmResourceTypeVendor,
+    CmResourceTypeProductName,
+    CmResourceTypeSerialNumber
+}cm_resource_type;
+typedef struct {
+    __u8 type;
+    __u8 sharedisposition;
+    __u16 flags;
+    union {
+        struct {
+            long long start; /* 64-bit phys address */
+            unsigned long length;
+        }port;
+        struct {
+            unsigned long level;
+            unsigned long vector;
+            unsigned long reserved1;
+        }interrupt;
+        struct {
+            long long start; /* 64-bit phys address */
+            unsigned long length;
+        }memory;
+    }u;
+}__attribute__ ((packed)) cm_resource_descriptor;
+typedef struct {
+    __u16 version;
+    __u16 revision;
+    unsigned long count;
+    cm_resource_descriptor descr[1];
+}__attribute__ ((packed)) cm_resource_list;
+typedef enum {
+    SystemClass = 0,
+    ProcessorClass,
+    CacheClass,
+    AdapterClass,
+    ControllerClass,
+    PeripheralClass,
+    MemoryClass
+} arc_component_class;
+typedef enum {
+    ARC_type = 0,
+    CPU_type,
+    FPU_type,
+    PrimaryICache,
+    PrimaryDCache,
+    SecondaryICache,
+    SecondaryDCache,
+    SecondaryCache,
+    Memory, /* Not in NT PROM */
+    EISAAdapter,
+    TCAdapter,
+    SCSIAdapter,
+    DTIAdapter,
+    MultiFunctionAdapter,
+    DiskController,
+    TapeController,
+    CDROMController,
+    WORMController,
+    SerialController,
+    NetworkController,
+    DisplayController,
+    ParallelController,
+    PointerController,
+    KeyboardController,
+    AudioController,
+    OtherController,
+    DiskPeripheral,
+    FloppyDiskPeripheral,
+    TapePeripheral,
+    ModemPeripheral,
+    MonitorPeripheral,
+    PrinterPeripheral,
+    PointerPeripheral,
+    KeyboardPeripheral,
+    TerminalPeripheral,
+    LinePeripheral,
+    NetworkPeripheral,
+    OtherPeripheral,
+    XTalkAdapter,
+    PCIAdapter,
+    GIOAdapter,
+    TPUAdapter,
+    Anonymous
+}arc_component_type;
+typedef enum {
+    Failed = 1,
+    ReadOnly = 2,
+    Removable = 4,
+    ConsoleIn = 8,
+    ConsoleOut = 16,
+    Input = 32,
+    Output = 64
+}arc_component_flags;
+typedef struct  {
+    arc_component_class class;
+    arc_component_type type;
+    arc_component_flags flags;
+    __u16 revision;
+    __u16 version;
+    __u32 key;
+    __u32 affinitymask;
+    __u32 configdatasize;
+    __u32 identifier_len;
+    char *identifier;
+} __attribute__ ((packed)) arc_component;
+typedef struct {
+    __u16 year;
+    __u16 month;
+    __u16 day;
+    __u16 hour;
+    __u16 minutes;
+    __u16 seconds;
+    __u16 mseconds;
+} __attribute__ ((packed)) arc_timeinfo;
+/* This is the SGI block structure, WinNT has it different */
+typedef enum {
+    ExceptionBlock,
+    SystemParameterBlock,
+    FreeContiguous,
+    FreeMemory,
+    BadMemory,
+    LoadedProgram,
+    FirmwareTemporary,
+    FirmwarePermanent
+}arc_memorytype_t;
+typedef struct  {
+    arc_memorytype_t type;
+    __u32 basepage;  /* *4096 = baseaddr */
+    __u32 basecount;
+}arc_memdescriptor_t;
+typedef struct {
+    char vendorid[8];
+    char prodid[8];
+}arc_sysid_t;
+typedef struct {
+    long (*load)(void); /* ... */
+    long (*invoke)(__u32 eaddr,__u32 saddr,__u32 argc,char **argv,
+               char **envp);
+    long (*execute)(char *path,__u32 argc,char **argv,char **envp);
+    void (*halt)(void);
+    void (*powerdown)(void);
+    void (*restart)(void);
+    void (*reboot)(void);
+    void (*enterinteractivemode)(void);
+    long (*reserved)(void);
+/* 10 */
+    arc_component * (*getpeer)(arc_component *c);
+    arc_component * (*getchild)(arc_component *c);
+    arc_component * (*getparent)(arc_component *c);
+    long (*getconfigurationdata)(void *configdata, arc_component *c);
+    long (*addchild)(arc_component *c, arc_component *template,
+             void *configdata);
+    long (*deletecomponet)(arc_component *current);
+    long (*getcomponent)(char *path);
+    long (*saveconfiguration)(void);
+    arc_sysid_t (*getsystemid)(void);
+    arc_memdescriptor_t * (*getmemorydescriptor)(arc_memdescriptor_t *cur);
+/* 20 */
+    long (*reserved2)(void);
+    arc_timeinfo * (*gettime)(void);
+    __u32 (*getrelativetime)(void);
+    long (*getdirectoryentry)();
+    long (*open)(void); /* ... */
+    long (*close)(__u32 fileid);
+    long (*read)(__u32 fileid,void *buf,__u32 n,__u32 *cnt);
+    long (*getreadstatus)(__u32 fileid);
+    long (*write)(__u32 fileid, void *buf,__u32 n,__u32 *cnt);
+    long (*seek)(void); /* ... */
+/* 30 */
+    long (*mount)(void); /* ... */
+    char * (*getenvironmentvariable)(char *name);
+    char * (*setenvironmentvariable)(char *name, char *value);
+    long (*getfileinformation)(void); /* ... */
+    long (*setfileinformation)(__u32 fileid,__u32 attflags,__u32 attmask);
+    void (*flushallcaches)(void);
+    long (*testunicodecharacter)(void); /* ... */
+    long (*getdisplaystatus)(void); /* ... */
+} arc_func_vector_t;
+typedef struct {
+    __u32 signature;
+    __u32 length;
+    __u16 version;
+    __u16 revision;
+    void *restartblock;
+    void *debugblock;
+    void *gevector;
+    void *utlbmissvector;
+    __u32 firmwarevectorlen;
+    arc_func_vector_t *firmwarevector;
+    __u32 privvectorlen;
+    void *privvector;
+    __u32 adaptercount;
+}__attribute__ ((packed)) arc_sbp;
+extern int arc_init(void);
+extern int arc_enabled(void);
+void arc_frame_init(void);
+void arc_console(void);
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/mips32/include/drivers/msim.h
 ,0 → 1,53
+/*
+ * Copyright (C) 2005 Ondrej Palkovsky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup mips32
+ * @{
+ */
+/** @file
+ */
+#ifndef _MSIM_H_
+#define _MSIM_H_
+#include <console/chardev.h>
+#define MSIM_VIDEORAM            0xB0000000
+/** Address of 'keyboard' device. */
+#define MSIM_KBD_ADDRESS        0xB0000000
+#define MSIM_KBD_IRQ    2
+void msim_console(void);
+void msim_kbd_release(void);
+void msim_kbd_grab(void);
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/mips32/include/boot.h
 ,0 → 1,48
+/*
+ * Copyright (C) 2006 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#ifndef __mips32_BOOT_H__
+#define __mips32_BOOT_H__
+#define TASKMAP_MAX_RECORDS 32
+#include <arch/types.h>
+typedef struct {
+    __address addr;
+    __u32 size;
+} utask_t;
+typedef struct {
+    __u32 cnt;
+    utask_t tasks[TASKMAP_MAX_RECORDS];
+} bootinfo_t;
+extern bootinfo_t bootinfo;
+#endif

 /tags/0.2.0.2/kernel/arch/mips32/_link.ld.in
 ,0 → 1,60
+/*
+ *  MIPS32 linker script
+ *
+ *  kernel text
+ *  kernel data
+ *
+ */
+#undef mips
+#define mips mips
+OUTPUT_ARCH(mips)
+ENTRY(kernel_image_start)
+SECTIONS {
+    . = KERNEL_LOAD_ADDRESS;
+    .text : {
+        ktext_start = .;
+        *(.text);
+        ktext_end = .;
+    }
+    .data : {
+        kdata_start = .;
+        *(.data);       /* initialized data */
+        hardcoded_ktext_size = .;
+        LONG(ktext_end - ktext_start);
+        hardcoded_kdata_size = .;
+        LONG(kdata_end - kdata_start);
+        hardcoded_load_address = .;
+        LONG(KERNEL_LOAD_ADDRESS);
+        *(.rodata*);
+        *(.sdata);
+        *(.reginfo);
+        /* Unfortunately IRIX does not allow us
+             * to include this as a last section :-(
+         * BSS/SBSS addresses will be wrong */
+        symbol_table = .;
+        *(symtab.*);
+    }
+    _gp = . + 0x8000;
+    .lit8 : { *(.lit8) }
+    .lit4 : { *(.lit4) }
+    .sbss : {
+        *(.sbss);
+        *(.scommon);
+    }
+    .bss : {
+        *(.bss);        /* uninitialized static variables */
+        *(COMMON);      /* global variables */
+    }
+    kdata_end = .;
+    /DISCARD/ : {
+      *(.mdebug*);
+      *(.pdr);
+      *(.comment);
+      *(.note);
+    }
+}

 /tags/0.2.0.2/kernel/arch/ppc64/src/mm/tlb.c
 ,0 → 1,86
+/*
+ * Copyright (C) 2006 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/** @addtogroup ppc64mm
+ * @{
+ */
+/** @file
+ */
+#include <mm/tlb.h>
+/** Initialize Page Hash Table.
+ *
+ * Setup the Page Hash Table with no entries.
+ *
+ */
+void tlb_arch_init(void)
+{
+    tlb_invalidate_all();
+}
+void tlb_invalidate_all(void)
+{
+    asm volatile (
+        "tlbia\n"
+        "tlbsync\n"
+    );
+}
+/** Invalidate all entries in TLB that belong to specified address space.
+ *
+ * @param asid This parameter is ignored as the architecture doesn't support it.
+ */
+void tlb_invalidate_asid(asid_t asid)
+{
+    tlb_invalidate_all();
+}
+/** Invalidate TLB entries for specified page range belonging to specified address space.
+ *
+ * @param asid This parameter is ignored as the architecture doesn't support it.
+ * @param page Address of the first page whose entry is to be invalidated.
+ * @param cnt Number of entries to invalidate.
+ */
+void tlb_invalidate_pages(asid_t asid, __address page, count_t cnt)
+{
+    tlb_invalidate_all();
+}
+/** Print contents of Page Hash Table. */
+void tlb_print(void)
+{
+}
+/** @}
+ */

 /tags/0.2.0.2/kernel/arch/ppc64/src/mm/page.c
 ,0 → 1,309
+/*
+ * Copyright (C) 2005 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup ppc64mm
+ * @{
+ */
+/** @file
+ */
+#include <arch/mm/page.h>
+#include <genarch/mm/page_pt.h>
+#include <arch/mm/frame.h>
+#include <arch/asm.h>
+#include <mm/frame.h>
+#include <mm/page.h>
+#include <mm/as.h>
+#include <arch.h>
+#include <arch/types.h>
+#include <arch/exception.h>
+#include <align.h>
+#include <config.h>
+#include <print.h>
+#include <symtab.h>
+static phte_t *phte;
+/** Try to find PTE for faulting address
+ *
+ * Try to find PTE for faulting address.
+ * The as->lock must be held on entry to this function
+ * if lock is true.
+ *
+ * @param as       Address space.
+ * @param lock     Lock/unlock the address space.
+ * @param badvaddr Faulting virtual address.
+ * @param access   Access mode that caused the fault.
+ * @param istate   Pointer to interrupted state.
+ * @param pfrc     Pointer to variable where as_page_fault() return code will be stored.
+ * @return         PTE on success, NULL otherwise.
+ *
+ */
+static pte_t *find_mapping_and_check(as_t *as, bool lock, __address badvaddr, int access,
+                     istate_t *istate, int *pfrc)
+{
+    /*
+     * Check if the mapping exists in page tables.
+     */
+    pte_t *pte = page_mapping_find(as, badvaddr);
+    if ((pte) && (pte->p)) {
+        /*
+         * Mapping found in page tables.
+         * Immediately succeed.
+         */
+        return pte;
+    } else {
+        int rc;
+        /*
+         * Mapping not found in page tables.
+         * Resort to higher-level page fault handler.
+         */
+        page_table_unlock(as, lock);
+        switch (rc = as_page_fault(badvaddr, access, istate)) {
+            case AS_PF_OK:
+                /*
+                 * The higher-level page fault handler succeeded,
+                 * The mapping ought to be in place.
+                 */
+                page_table_lock(as, lock);
+                pte = page_mapping_find(as, badvaddr);
+                ASSERT((pte) && (pte->p));
+                *pfrc = 0;
+                return pte;
+            case AS_PF_DEFER:
+                page_table_lock(as, lock);
+                *pfrc = rc;
+                return NULL;
+            case AS_PF_FAULT:
+                page_table_lock(as, lock);
+                printf("Page fault.\n");
+                *pfrc = rc;
+                return NULL;
+            default:
+                panic("unexpected rc (%d)\n", rc);
+        }
+    }
+}
+static void pht_refill_fail(__address badvaddr, istate_t *istate)
+{
+    char *symbol = "";
+    char *sym2 = "";
+    char *s = get_symtab_entry(istate->pc);
+    if (s)
+        symbol = s;
+    s = get_symtab_entry(istate->lr);
+    if (s)
+        sym2 = s;
+    panic("%p: PHT Refill Exception at %p (%s<-%s)\n", badvaddr, istate->pc, symbol, sym2);
+}
+static void pht_insert(const __address vaddr, const pfn_t pfn)
+{
+    __u32 page = (vaddr >> 12) & 0xffff;
+    __u32 api = (vaddr >> 22) & 0x3f;
+    __u32 vsid;
+    asm volatile (
+        "mfsrin %0, %1\n"
+        : "=r" (vsid)
+        : "r" (vaddr)
+    );
+    /* Primary hash (xor) */
+    __u32 h = 0;
+    __u32 hash = vsid ^ page;
+    __u32 base = (hash & 0x3ff) << 3;
+    __u32 i;
+    bool found = false;
+    /* Find unused or colliding
+       PTE in PTEG */
+    for (i = 0; i < 8; i++) {
+        if ((!phte[base + i].v) || ((phte[base + i].vsid == vsid) && (phte[base + i].api == api))) {
+            found = true;
+            break;
+        }
+    }
+    if (!found) {
+        /* Secondary hash (not) */
+        __u32 base2 = (~hash & 0x3ff) << 3;
+        /* Find unused or colliding
+           PTE in PTEG */
+        for (i = 0; i < 8; i++) {
+            if ((!phte[base2 + i].v) || ((phte[base2 + i].vsid == vsid) && (phte[base2 + i].api == api))) {
+                found = true;
+                base = base2;
+                h = 1;
+                break;
+            }
+        }
+        if (!found) {
+            // TODO: A/C precedence groups
+            i = page % 8;
+        }
+    }
+    phte[base + i].v = 1;
+    phte[base + i].vsid = vsid;
+    phte[base + i].h = h;
+    phte[base + i].api = api;
+    phte[base + i].rpn = pfn;
+    phte[base + i].r = 0;
+    phte[base + i].c = 0;
+    phte[base + i].pp = 2; // FIXME
+}
+/** Process Instruction/Data Storage Interrupt
+ *
+ * @param data   True if Data Storage Interrupt.
+ * @param istate Interrupted register context.
+ *
+ */
+void pht_refill(bool data, istate_t *istate)
+{
+    __address badvaddr;
+    pte_t *pte;
+    int pfrc;
+    as_t *as;
+    bool lock;
+    if (AS == NULL) {
+        as = AS_KERNEL;
+        lock = false;
+    } else {
+        as = AS;
+        lock = true;
+    }
+    if (data) {
+        asm volatile (
+            "mfdar %0\n"
+            : "=r" (badvaddr)
+        );
+    } else
+        badvaddr = istate->pc;
+    page_table_lock(as, lock);
+    pte = find_mapping_and_check(as, lock, badvaddr, PF_ACCESS_READ /* FIXME */, istate, &pfrc);
+    if (!pte) {
+        switch (pfrc) {
+            case AS_PF_FAULT:
+                goto fail;
+                break;
+            case AS_PF_DEFER:
+                /*
+                 * The page fault came during copy_from_uspace()
+                 * or copy_to_uspace().
+                 */
+                page_table_unlock(as, lock);
+                return;
+            default:
+                panic("Unexpected pfrc (%d)\n", pfrc);
+        }
+    }
+    pte->a = 1; /* Record access to PTE */
+    pht_insert(badvaddr, pte->pfn);
+    page_table_unlock(as, lock);
+    return;
+fail:
+    page_table_unlock(as, lock);
+    pht_refill_fail(badvaddr, istate);
+}
+void pht_init(void)
+{
+    memsetb((__address) phte, 1 << PHT_BITS, 0);
+}
+void page_arch_init(void)
+{
+    if (config.cpu_active == 1) {
+        page_mapping_operations = &pt_mapping_operations;
+        __address cur;
+        int flags;
+        /* Frames below 128 MB are mapped using BAT,
+           map rest of the physical memory */
+        for (cur = 128 << 20; cur < last_frame; cur += FRAME_SIZE) {
+            flags = PAGE_CACHEABLE;
+            if ((PA2KA(cur) >= config.base) && (PA2KA(cur) < config.base + config.kernel_size))
+                flags |= PAGE_GLOBAL;
+            page_mapping_insert(AS_KERNEL, PA2KA(cur), cur, flags);
+        }
+        /* Allocate page hash table */
+        phte_t *physical_phte = (phte_t *) PFN2ADDR(frame_alloc(PHT_ORDER, FRAME_KA | FRAME_PANIC));
+        phte = (phte_t *) PA2KA((__address) physical_phte);
+        ASSERT((__address) physical_phte % (1 << PHT_BITS) == 0);
+        pht_init();
+        asm volatile (
+            "mtsdr1 %0\n"
+            :
+            : "r" ((__address) physical_phte)
+        );
+    }
+}
+__address hw_map(__address physaddr, size_t size)
+{
+    if (last_frame + ALIGN_UP(size, PAGE_SIZE) > KA2PA(KERNEL_ADDRESS_SPACE_END_ARCH))
+        panic("Unable to map physical memory %p (%d bytes)", physaddr, size)
+    __address virtaddr = PA2KA(last_frame);
+    pfn_t i;
+    for (i = 0; i < ADDR2PFN(ALIGN_UP(size, PAGE_SIZE)); i++)
+        page_mapping_insert(AS_KERNEL, virtaddr + PFN2ADDR(i), physaddr + PFN2ADDR(i), PAGE_NOT_CACHEABLE);
+    last_frame = ALIGN_UP(last_frame + size, FRAME_SIZE);
+    return virtaddr;
+}
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/ppc64/src/mm/as.c
 ,0 → 1,46
+/*
+ * Copyright (C) 2006 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup ppc64mm
+  * @{
+ */
+/** @file
+ */
+#include <arch/mm/as.h>
+#include <genarch/mm/as_pt.h>
+/** Architecture dependent address space init. */
+void as_arch_init(void)
+{
+    as_operations = &as_pt_operations;
+}
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/ppc64/src/mm/frame.c
 ,0 → 1,72
+/*
+ * Copyright (C) 2005 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup ppc64mm
+ * @{
+ */
+/** @file
+ */
+#include <arch/boot/boot.h>
+#include <arch/mm/frame.h>
+#include <arch/mm/memory_init.h>
+#include <mm/frame.h>
+#include <align.h>
+#include <macros.h>
+__address last_frame = 0;
+void frame_arch_init(void)
+{
+    pfn_t minconf = 2;
+    count_t i;
+    pfn_t start, conf;
+    size_t size;
+    for (i = 0; i < bootinfo.memmap.count; i++) {
+        start = ADDR2PFN(ALIGN_UP(bootinfo.memmap.zones[i].start, FRAME_SIZE));
+        size = SIZE2FRAMES(ALIGN_DOWN(bootinfo.memmap.zones[i].size, FRAME_SIZE));
+        if ((minconf < start) || (minconf >= start + size))
+            conf = start;
+        else
+            conf = minconf;
+        zone_create(start, size, conf, 0);
+        if (last_frame < ALIGN_UP(bootinfo.memmap.zones[i].start + bootinfo.memmap.zones[i].size, FRAME_SIZE))
+            last_frame = ALIGN_UP(bootinfo.memmap.zones[i].start + bootinfo.memmap.zones[i].size, FRAME_SIZE);
+    }
+    /* First is exception vector, second is 'implementation specific', third and fourth is reserved */
+    frame_mark_unavailable(0, 4);
+}
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/ppc64/src/mm/memory_init.c
 ,0 → 1,57
+/*
+ * Copyright (C) 2005 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup ppc64mm
+ * @{
+ */
+/** @file
+ */
+#include <arch/boot/boot.h>
+#include <arch/mm/memory_init.h>
+#include <typedefs.h>
+#include <print.h>
+size_t get_memory_size(void)
+{
+    return bootinfo.memmap.total;
+}
+void memory_print_map(void)
+{
+    count_t i;
+    for (i = 0; i < bootinfo.memmap.count; i++)
+        printf("base: %#x size: %#x\n", bootinfo.memmap.zones[i].start, bootinfo.memmap.zones[i].size);
+}
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/ppc64/src/cpu/cpu.c
 ,0 → 1,63
+/*
+ * Copyright (C) 2005 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/** @addtogroup ppc64
+ * @{
+ */
+/** @file
+ */
+#include <arch/cpu.h>
+#include <arch/cpuid.h>
+#include <cpu.h>
+#include <arch.h>
+#include <typedefs.h>
+#include <print.h>
+void cpu_arch_init(void)
+{
+}
+void cpu_identify(void)
+{
+    cpu_info_t info;
+    cpu_version(&info);
+    CPU->arch.version = info.version;
+    CPU->arch.revision = info.revision;
+}
+void cpu_print_report(cpu_t *m)
+{
+    printf("cpu%d: version=%d, revision=%d\n", m->id, m->arch.version, m->arch.revision);
+}
+/** @}
+ */

 /tags/0.2.0.2/kernel/arch/ppc64/src/ddi/ddi.c
 ,0 → 1,57
+/*
+ * Copyright (C) 2006 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup ppc64ddi
+ * @{
+ */
+/** @file
+ */
+#include <ddi/ddi.h>
+#include <proc/task.h>
+#include <arch/types.h>
+#include <typedefs.h>
+/** Enable I/O space range for task.
+ *
+ * Interrupts are disabled and task is locked.
+ *
+ * @param task Task.
+ * @param ioaddr Startign I/O space address.
+ * @param size Size of the enabled I/O range.
+ *
+ * @return 0 on success or an error code from errno.h.
+ */
+int ddi_iospace_enable_arch(task_t *task, __address ioaddr, size_t size)
+{
+    return 0;
+}
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/ppc64/src/proc/scheduler.c
 ,0 → 1,64
+/*
+ * Copyright (C) 2006 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup ppc64proc
+ * @{
+ */
+/** @file
+ */
+#include <arch/mm/page.h>
+#include <arch/boot/boot.h>
+#include <proc/scheduler.h>
+#include <proc/thread.h>
+#include <arch.h>
+/** Perform ppc64 specific tasks needed before the new task is run. */
+void before_task_runs_arch(void)
+{
+}
+/** Perform ppc64 specific tasks needed before the new thread is scheduled. */
+void before_thread_runs_arch(void)
+{
+    pht_init();
+    tlb_invalidate_all();
+    asm volatile (
+        "mtsprg0 %0\n"
+        :
+        : "r" (KA2PA(&THREAD->kstack[THREAD_STACK_SIZE - SP_DELTA]))
+    );
+}
+void after_thread_ran_arch(void)
+{
+}
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/ppc64/src/interrupt.c
 ,0 → 1,76
+/*
+ * Copyright (C) 2006 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup ppc64interrupt
+ * @{
+ */
+/** @file
+ */
+#include <interrupt.h>
+#include <arch/interrupt.h>
+#include <arch/types.h>
+#include <arch.h>
+#include <time/clock.h>
+#include <ipc/sysipc.h>
+void start_decrementer(void)
+{
+    asm volatile (
+        "mtdec %0\n"
+        :
+        : "r" (1000)
+    );
+}
+static void exception_decrementer(int n, istate_t *istate)
+{
+    clock();
+    start_decrementer();
+}
+/* Initialize basic tables for exception dispatching */
+void interrupt_init(void)
+{
+    exc_register(VECTOR_DECREMENTER, "timer", exception_decrementer);
+}
+/* Reregister irq to be IPC-ready */
+void irq_ipc_bind_arch(__native irq)
+{
+    panic("not implemented\n");
+    /* TODO */
+}
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/ppc64/src/ppc64.c
 ,0 → 1,115
+/*
+ * Copyright (C) 2006 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup ppc64
+ * @{
+ */
+/** @file
+ */
+#include <arch.h>
+#include <arch/boot/boot.h>
+#include <arch/mm/memory_init.h>
+#include <arch/interrupt.h>
+#include <genarch/fb/fb.h>
+#include <userspace.h>
+#include <proc/uarg.h>
+#include <console/console.h>
+bootinfo_t bootinfo;
+void arch_pre_main(void)
+{
+    /* Setup usermode */
+    init.cnt = bootinfo.taskmap.count;
+    __u32 i;
+    for (i = 0; i < bootinfo.taskmap.count; i++) {
+        init.tasks[i].addr = PA2KA(bootinfo.taskmap.tasks[i].addr);
+        init.tasks[i].size = bootinfo.taskmap.tasks[i].size;
+    }
+}
+void arch_pre_mm_init(void)
+{
+    /* Initialize dispatch table */
+    interrupt_init();
+    /* Start decrementer */
+    start_decrementer();
+}
+void arch_post_mm_init(void)
+{
+    if (config.cpu_active == 1) {
+        fb_init(bootinfo.screen.addr, bootinfo.screen.width, bootinfo.screen.height, bootinfo.screen.bpp, bootinfo.screen.scanline);
+        /* Merge all zones to 1 big zone */
+        zone_merge_all();
+    }
+}
+void arch_pre_smp_init(void)
+{
+    memory_print_map();
+}
+void arch_post_smp_init(void)
+{
+}
+void calibrate_delay_loop(void)
+{
+}
+void userspace(uspace_arg_t *kernel_uarg)
+{
+    userspace_asm((__address) kernel_uarg->uspace_uarg, (__address) kernel_uarg->uspace_stack + THREAD_STACK_SIZE - SP_DELTA, (__address) kernel_uarg->uspace_entry);
+    /* Unreachable */
+    for (;;)
+        ;
+}
+/** Acquire console back for kernel
+ *
+ */
+void arch_grab_console(void)
+{
+}
+/** Return console to userspace
+ *
+ */
+void arch_release_console(void)
+{
+}
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/ppc64/src/exception.S
 ,0 → 1,237
+#
+# Copyright (C) 2006 Martin Decky
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# - Redistributions of source code must retain the above copyright
+#   notice, this list of conditions and the following disclaimer.
+# - Redistributions in binary form must reproduce the above copyright
+#   notice, this list of conditions and the following disclaimer in the
+#   documentation and/or other materials provided with the distribution.
+# - The name of the author may not be used to endorse or promote products
+#   derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+#include <arch/asm/regname.h>
+#include <arch/mm/page.h>
+.section K_UNMAPPED_TEXT_START, "ax"
+.macro CONTEXT_STORE
+    # save R12 in SPRG1, backup CR in R12
+    # save SP in SPRG2
+    mtsprg1 r12
+    mfcr r12
+    mtsprg2 sp
+    # check whether SP is in kernel
+    andis. sp, sp, 0x8000
+    bne 1f
+        # stack is in user-space
+        mfsprg0 sp
+    b 2f
+:
+        # stack is in kernel
+        mfsprg2 sp
+        subis sp, sp, 0x8000
+:
+    subi sp, sp, 160
+    stw r0, 8(sp)
+    stw r2, 12(sp)
+    stw r3, 16(sp)
+    stw r4, 20(sp)
+    stw r5, 24(sp)
+    stw r6, 28(sp)
+    stw r7, 32(sp)
+    stw r8, 36(sp)
+    stw r9, 40(sp)
+    stw r10, 44(sp)
+    stw r11, 48(sp)
+    stw r13, 52(sp)
+    stw r14, 56(sp)
+    stw r15, 60(sp)
+    stw r16, 64(sp)
+    stw r17, 68(sp)
+    stw r18, 72(sp)
+    stw r19, 76(sp)
+    stw r20, 80(sp)
+    stw r21, 84(sp)
+    stw r22, 88(sp)
+    stw r23, 92(sp)
+    stw r24, 96(sp)
+    stw r25, 100(sp)
+    stw r26, 104(sp)
+    stw r27, 108(sp)
+    stw r28, 112(sp)
+    stw r29, 116(sp)
+    stw r30, 120(sp)
+    stw r31, 124(sp)
+    stw r12, 128(sp)
+    mfsrr0 r12
+    stw r12, 132(sp)
+    mfsrr1 r12
+    stw r12, 136(sp)
+    mflr r12
+    stw r12, 140(sp)
+    mfctr r12
+    stw r12, 144(sp)
+    mfxer r12
+    stw r12, 148(sp)
+    mfsprg1 r12
+    stw r12, 152(sp)
+    mfsprg2 r12
+    stw r12, 156(sp)
+.endm
+.org 0x060
+jump_to_kernel:
+    lis r12, iret@ha
+    addi r12, r12, iret@l
+    mtlr r12
+    mfmsr r12
+    ori r12, r12, (msr_ir | msr_dr)@l
+    mtsrr1 r12
+    addis sp, sp, 0x8000
+    mr r4, sp
+    addi r4, r4, 8
+    rfi
+jump_to_kernel_syscall:
+    lis r12, syscall_handler@ha
+    addi r12, r12, syscall_handler@l
+    mtsrr0 r12
+    lis r12, iret_syscall@ha
+    addi r12, r12, iret_syscall@l
+    mtlr r12
+    mfmsr r12
+    ori r12, r12, (msr_ir | msr_dr)@l
+    mtsrr1 r12
+    addis sp, sp, 0x8000
+    rfi
+.org 0x100
+.global exc_system_reset
+exc_system_reset:
+    b exc_system_reset
+.org 0x200
+.global exc_machine_check
+exc_machine_check:
+    b exc_machine_check
+.org 0x300
+.global exc_data_storage
+exc_data_storage:
+    CONTEXT_STORE
+    lis r12, pht_refill@ha
+    addi r12, r12, pht_refill@l
+    mtsrr0 r12
+    li r3, 1
+    b jump_to_kernel
+.org 0x400
+.global exc_instruction_storage
+exc_instruction_storage:
+    CONTEXT_STORE
+    lis r12, pht_refill@ha
+    addi r12, r12, pht_refill@l
+    mtsrr0 r12
+    li r3, 0
+    b jump_to_kernel
+.org 0x500
+.global exc_external
+exc_external:
+    b exc_external
+.org 0x600
+.global exc_alignment
+exc_alignment:
+    b exc_alignment
+.org 0x700
+.global exc_program
+exc_program:
+    b exc_program
+.org 0x800
+.global exc_fp_unavailable
+exc_fp_unavailable:
+    b exc_fp_unavailable
+.org 0x900
+.global exc_decrementer
+exc_decrementer:
+    CONTEXT_STORE
+    lis r12, exc_dispatch@ha
+    addi r12, r12, exc_dispatch@l
+    mtsrr0 r12
+    li r3, 10
+    b jump_to_kernel
+.org 0xa00
+.global exc_reserved0
+exc_reserved0:
+    b exc_reserved0
+.org 0xb00
+.global exc_reserved1
+exc_reserved1:
+    b exc_reserved1
+.org 0xc00
+.global exc_syscall
+exc_syscall:
+    CONTEXT_STORE
+    b jump_to_kernel_syscall
+.org 0xd00
+.global exc_trace
+exc_trace:
+    b exc_trace

 /tags/0.2.0.2/kernel/arch/ppc64/src/asm.S
 ,0 → 1,311
+#
+# Copyright (C) 2006 Martin Decky
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# - Redistributions of source code must retain the above copyright
+#   notice, this list of conditions and the following disclaimer.
+# - Redistributions in binary form must reproduce the above copyright
+#   notice, this list of conditions and the following disclaimer in the
+#   documentation and/or other materials provided with the distribution.
+# - The name of the author may not be used to endorse or promote products
+#   derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+#include <arch/asm/regname.h>
+.text
+.global userspace_asm
+.global iret
+.global iret_syscall
+.global memsetb
+.global memcpy
+.global memcpy_from_uspace
+.global memcpy_to_uspace
+.global memcpy_from_uspace_failover_address
+.global memcpy_to_uspace_failover_address
+userspace_asm:
+    # r3 = uspace_uarg
+    # r4 = stack
+    # r5 = entry
+    # disable interrupts
+    mfmsr r31
+    rlwinm r31, r31, 0, 17, 15
+    mtmsr r31
+    # set entry point
+    mtsrr0 r5
+    # set problem state, enable interrupts
+    ori r31, r31, msr_pr
+    ori r31, r31, msr_ee
+    mtsrr1 r31
+    # set stack
+    mr sp, r4
+    # jump to userspace
+    rfi
+iret:
+    # disable interrupts
+    mfmsr r31
+    rlwinm r31, r31, 0, 17, 15
+    mtmsr r31
+    lwz r0, 8(sp)
+    lwz r2, 12(sp)
+    lwz r3, 16(sp)
+    lwz r4, 20(sp)
+    lwz r5, 24(sp)
+    lwz r6, 28(sp)
+    lwz r7, 32(sp)
+    lwz r8, 36(sp)
+    lwz r9, 40(sp)
+    lwz r10, 44(sp)
+    lwz r11, 48(sp)
+    lwz r13, 52(sp)
+    lwz r14, 56(sp)
+    lwz r15, 60(sp)
+    lwz r16, 64(sp)
+    lwz r17, 68(sp)
+    lwz r18, 72(sp)
+    lwz r19, 76(sp)
+    lwz r20, 80(sp)
+    lwz r21, 84(sp)
+    lwz r22, 88(sp)
+    lwz r23, 92(sp)
+    lwz r24, 96(sp)
+    lwz r25, 100(sp)
+    lwz r26, 104(sp)
+    lwz r27, 108(sp)
+    lwz r28, 112(sp)
+    lwz r29, 116(sp)
+    lwz r30, 120(sp)
+    lwz r31, 124(sp)
+    lwz r12, 128(sp)
+    mtcr r12
+    lwz r12, 132(sp)
+    mtsrr0 r12
+    lwz r12, 136(sp)
+    mtsrr1 r12
+    lwz r12, 140(sp)
+    mtlr r12
+    lwz r12, 144(sp)
+    mtctr r12
+    lwz r12, 148(sp)
+    mtxer r12
+    lwz r12, 152(sp)
+    lwz sp, 156(sp)
+    rfi
+iret_syscall:
+    # reset decrementer
+    li r31, 1000
+    mtdec r31
+    # disable interrupts
+    mfmsr r31
+    rlwinm r31, r31, 0, 17, 15
+    mtmsr r31
+    lwz r0, 8(sp)
+    lwz r2, 12(sp)
+    lwz r4, 20(sp)
+    lwz r5, 24(sp)
+    lwz r6, 28(sp)
+    lwz r7, 32(sp)
+    lwz r8, 36(sp)
+    lwz r9, 40(sp)
+    lwz r10, 44(sp)
+    lwz r11, 48(sp)
+    lwz r13, 52(sp)
+    lwz r14, 56(sp)
+    lwz r15, 60(sp)
+    lwz r16, 64(sp)
+    lwz r17, 68(sp)
+    lwz r18, 72(sp)
+    lwz r19, 76(sp)
+    lwz r20, 80(sp)
+    lwz r21, 84(sp)
+    lwz r22, 88(sp)
+    lwz r23, 92(sp)
+    lwz r24, 96(sp)
+    lwz r25, 100(sp)
+    lwz r26, 104(sp)
+    lwz r27, 108(sp)
+    lwz r28, 112(sp)
+    lwz r29, 116(sp)
+    lwz r30, 120(sp)
+    lwz r31, 124(sp)
+    lwz r12, 128(sp)
+    mtcr r12
+    lwz r12, 132(sp)
+    mtsrr0 r12
+    lwz r12, 136(sp)
+    mtsrr1 r12
+    lwz r12, 140(sp)
+    mtlr r12
+    lwz r12, 144(sp)
+    mtctr r12
+    lwz r12, 148(sp)
+    mtxer r12
+    lwz r12, 152(sp)
+    lwz sp, 156(sp)
+    rfi
+memsetb:
+    rlwimi r5, r5, 8, 16, 23
+    rlwimi r5, r5, 16, 0, 15
+    addi r14, r3, -4
+    cmplwi 0, r4, 4
+    blt 7f
+    stwu r5, 4(r14)
+    beqlr
+    andi. r15, r14, 3
+    add r4, r15, r4
+    subf r14, r15, r14
+    srwi r15, r4, 2
+    mtctr r15
+    bdz 6f
+:
+        stwu r5, 4(r14)
+        bdnz 1b
+:
+    andi. r4, r4, 3
+:
+    cmpwi 0, r4, 0
+    beqlr
+    mtctr r4
+    addi r6, r6, 3
+:
+    stbu r5, 1(r14)
+    bdnz 8b
+    blr
+memcpy:
+memcpy_from_uspace:
+memcpy_to_uspace:
+    srwi. r7, r5, 3
+    addi r6, r3, -4
+    addi r4, r4, -4
+    beq 2f
+    andi. r0, r6, 3
+    mtctr r7
+    bne 5f
+:
+    lwz r7, 4(r4)
+    lwzu r8, 8(r4)
+    stw r7, 4(r6)
+    stwu r8, 8(r6)
+    bdnz 1b
+    andi. r5, r5, 7
+:
+    cmplwi 0, r5, 4
+    blt 3f
+    lwzu r0, 4(r4)
+    addi r5, r5, -4
+    stwu r0, 4(r6)
+:
+    cmpwi 0, r5, 0
+    beqlr
+    mtctr r5
+    addi r4, r4, 3
+    addi r6, r6, 3
+:
+    lbzu r0, 1(r4)
+    stbu r0, 1(r6)
+    bdnz 4b
+    blr
+:
+    subfic r0, r0, 4
+    mtctr r0
+:
+    lbz r7, 4(r4)
+    addi r4, r4, 1
+    stb r7, 4(r6)
+    addi r6, r6, 1
+    bdnz 6b
+    subf r5, r0, r5
+    rlwinm. r7, r5, 32-3, 3, 31
+    beq 2b
+    mtctr r7
+    b 1b
+memcpy_from_uspace_failover_address:
+memcpy_to_uspace_failover_address:
+    b memcpy_from_uspace_failover_address

 /tags/0.2.0.2/kernel/arch/ppc64/src/boot/boot.S
 ,0 → 1,81
+#
+# Copyright (C) 2005 Jakub Jermar
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# - Redistributions of source code must retain the above copyright
+#   notice, this list of conditions and the following disclaimer.
+# - Redistributions in binary form must reproduce the above copyright
+#   notice, this list of conditions and the following disclaimer in the
+#   documentation and/or other materials provided with the distribution.
+# - The name of the author may not be used to endorse or promote products
+#   derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+#include <arch/asm/regname.h>
+#include <arch/boot/boot.h>
+.section K_TEXT_START, "ax"
+.global kernel_image_start
+kernel_image_start:
+    # load temporal kernel stack
+    lis sp, kernel_stack@ha
+    addi sp, sp, kernel_stack@l
+    # set kernel stack for interrupt handling
+    mr r31, sp
+    subis r31, r31, 0x8000
+    mtsprg0 r31
+    # r3 contains physical address of bootinfo_t
+    # r4 contains size of bootinfo_t
+    addis r3, r3, 0x8000
+    lis r31, bootinfo@ha
+    addi r31, r31, bootinfo@l  # r31 = bootinfo
+    cmpwi r4, 0
+    beq bootinfo_end
+    bootinfo_loop:
+        lwz r30, 0(r3)
+        stw r30, 0(r31)
+        addi r3, r3, 4
+        addi r31, r31, 4
+        subi r4, r4, 4
+        cmpwi r4, 0
+        bgt bootinfo_loop
+    bootinfo_end:
+    bl arch_pre_main
+    b main_bsp
+.section K_DATA_START, "aw", @progbits
+.align 12
+kernel_stack_bottom:
+    .space TEMP_STACK_SIZE
+kernel_stack:

 /tags/0.2.0.2/kernel/arch/ppc64/src/dummy.s
 ,0 → 1,38
+#
+# Copyright (C) 2005 Jakub Jermar
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# - Redistributions of source code must retain the above copyright
+#   notice, this list of conditions and the following disclaimer.
+# - Redistributions in binary form must reproduce the above copyright
+#   notice, this list of conditions and the following disclaimer in the
+#   documentation and/or other materials provided with the distribution.
+# - The name of the author may not be used to endorse or promote products
+#   derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+.text
+.global asm_delay_loop
+.global sys_tls_set
+sys_tls_set:
+    b sys_tls_set
+asm_delay_loop:
+    blr

 /tags/0.2.0.2/kernel/arch/ppc64/src/fpu_context.S
 ,0 → 1,105
+#
+# Copyright (C) 2006 Martin Decky
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# - Redistributions of source code must retain the above copyright
+#   notice, this list of conditions and the following disclaimer.
+# - Redistributions in binary form must reproduce the above copyright
+#   notice, this list of conditions and the following disclaimer in the
+#   documentation and/or other materials provided with the distribution.
+# - The name of the author may not be used to endorse or promote products
+#   derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+#include <arch/asm/regname.h>
+#include <arch/context_offset.h>
+.text
+.global fpu_context_save
+.global fpu_context_restore
+.global fpu_init
+.global fpu_enable
+.global fpu_disable
+.macro FPU_CONTEXT_STORE r
+    stfd fr14, OFFSET_FR14(\r)
+    stfd fr15, OFFSET_FR15(\r)
+    stfd fr16, OFFSET_FR16(\r)
+    stfd fr17, OFFSET_FR17(\r)
+    stfd fr18, OFFSET_FR18(\r)
+    stfd fr19, OFFSET_FR19(\r)
+    stfd fr20, OFFSET_FR20(\r)
+    stfd fr21, OFFSET_FR21(\r)
+    stfd fr22, OFFSET_FR22(\r)
+    stfd fr23, OFFSET_FR23(\r)
+    stfd fr24, OFFSET_FR24(\r)
+    stfd fr25, OFFSET_FR25(\r)
+    stfd fr26, OFFSET_FR26(\r)
+    stfd fr27, OFFSET_FR27(\r)
+    stfd fr28, OFFSET_FR28(\r)
+    stfd fr29, OFFSET_FR29(\r)
+    stfd fr30, OFFSET_FR30(\r)
+    stfd fr31, OFFSET_FR31(\r)
+.endm
+.macro FPU_CONTEXT_LOAD r
+    lfd fr14, OFFSET_FR14(\r)
+    lfd fr15, OFFSET_FR15(\r)
+    lfd fr16, OFFSET_FR16(\r)
+    lfd fr17, OFFSET_FR17(\r)
+    lfd fr18, OFFSET_FR18(\r)
+    lfd fr19, OFFSET_FR19(\r)
+    lfd fr20, OFFSET_FR20(\r)
+    lfd fr21, OFFSET_FR21(\r)
+    lfd fr22, OFFSET_FR22(\r)
+    lfd fr23, OFFSET_FR23(\r)
+    lfd fr24, OFFSET_FR24(\r)
+    lfd fr25, OFFSET_FR25(\r)
+    lfd fr26, OFFSET_FR26(\r)
+    lfd fr27, OFFSET_FR27(\r)
+    lfd fr28, OFFSET_FR28(\r)
+    lfd fr29, OFFSET_FR29(\r)
+    lfd fr30, OFFSET_FR30(\r)
+    lfd fr31, OFFSET_FR31(\r)
+.endm
+fpu_context_save:
+//  FPU_CONTEXT_STORE r3
+//
+//  mffs fr0
+//  stfd fr0, OFFSET_FPSCR(r3)
+    blr
+fpu_context_restore:
+//  FPU_CONTEXT_LOAD r3
+//
+//  lfd fr0, OFFSET_FPSCR(r3)
+//  mtfsf 7, fr0
+    blr
+fpu_init:
+    blr
+fpu_enable:
+    blr
+fpu_disable:
+    blr

 /tags/0.2.0.2/kernel/arch/ppc64/src/context.S
 ,0 → 1,109
+#
+# Copyright (C) 2005 Martin Decky
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# - Redistributions of source code must retain the above copyright
+#   notice, this list of conditions and the following disclaimer.
+# - Redistributions in binary form must reproduce the above copyright
+#   notice, this list of conditions and the following disclaimer in the
+#   documentation and/or other materials provided with the distribution.
+# - The name of the author may not be used to endorse or promote products
+#   derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+#include <arch/asm/regname.h>
+#include <arch/context_offset.h>
+.text
+.global context_save_arch
+.global context_restore_arch
+.macro CONTEXT_STORE r
+    stw sp, OFFSET_SP(\r)
+    stw r2, OFFSET_R2(\r)
+    stw r13, OFFSET_R13(\r)
+    stw r14, OFFSET_R14(\r)
+    stw r15, OFFSET_R15(\r)
+    stw r16, OFFSET_R16(\r)
+    stw r17, OFFSET_R17(\r)
+    stw r18, OFFSET_R18(\r)
+    stw r19, OFFSET_R19(\r)
+    stw r20, OFFSET_R20(\r)
+    stw r21, OFFSET_R21(\r)
+    stw r22, OFFSET_R22(\r)
+    stw r23, OFFSET_R23(\r)
+    stw r24, OFFSET_R24(\r)
+    stw r25, OFFSET_R25(\r)
+    stw r26, OFFSET_R26(\r)
+    stw r27, OFFSET_R27(\r)
+    stw r28, OFFSET_R28(\r)
+    stw r29, OFFSET_R29(\r)
+    stw r30, OFFSET_R30(\r)
+    stw r31, OFFSET_R31(\r)
+.endm
+.macro CONTEXT_LOAD r
+    lwz sp, OFFSET_SP(\r)
+    lwz r2, OFFSET_R2(\r)
+    lwz r13, OFFSET_R13(\r)
+    lwz r14, OFFSET_R14(\r)
+    lwz r15, OFFSET_R15(\r)
+    lwz r16, OFFSET_R16(\r)
+    lwz r17, OFFSET_R17(\r)
+    lwz r18, OFFSET_R18(\r)
+    lwz r19, OFFSET_R19(\r)
+    lwz r20, OFFSET_R20(\r)
+    lwz r21, OFFSET_R21(\r)
+    lwz r22, OFFSET_R22(\r)
+    lwz r23, OFFSET_R23(\r)
+    lwz r24, OFFSET_R24(\r)
+    lwz r25, OFFSET_R25(\r)
+    lwz r26, OFFSET_R26(\r)
+    lwz r27, OFFSET_R27(\r)
+    lwz r28, OFFSET_R28(\r)
+    lwz r29, OFFSET_R29(\r)
+    lwz r30, OFFSET_R30(\r)
+    lwz r31, OFFSET_R31(\r)
+.endm
+context_save_arch:
+    CONTEXT_STORE r3
+    mflr r4
+    stw r4, OFFSET_PC(r3)
+    mfcr r4
+    stw r4, OFFSET_CR(r3)
+    # context_save returns 1
+    li r3, 1
+    blr
+context_restore_arch:
+    CONTEXT_LOAD r3
+    lwz r4, OFFSET_CR(r3)
+    mtcr r4
+    lwz r4, OFFSET_PC(r3)
+    mtlr r4
+    # context_restore returns 0
+    li r3, 0
+    blr

 /tags/0.2.0.2/kernel/arch/ppc64/src/debug/panic.s
 ,0 → 1,38
+#
+# Copyright (C) 2005 Martin Decky
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# - Redistributions of source code must retain the above copyright
+#   notice, this list of conditions and the following disclaimer.
+# - Redistributions in binary form must reproduce the above copyright
+#   notice, this list of conditions and the following disclaimer in the
+#   documentation and/or other materials provided with the distribution.
+# - The name of the author may not be used to endorse or promote products
+#   derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+#include <arch/asm/macro.h>
+.text
+.global panic_printf
+panic_printf:
+    lis %r14, halt@ha
+    addi %r14, %r14, halt@l
+    mtlr %r14   # fake stack to make printf return to halt
+    b printf

 /tags/0.2.0.2/kernel/arch/ppc64/include/cpuid.h
 ,0 → 1,56
+/*
+ * Copyright (C) 2006 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/** @addtogroup ppc64
+ * @{
+ */
+/** @file
+ */
+#ifndef __ppc64_CPUID_H__
+#define __ppc64_CPUID_H__
+#include <arch/types.h>
+struct cpu_info {
+    __u16 version;
+    __u16 revision;
+} __attribute__ ((packed));
+static inline void cpu_version(struct cpu_info *info)
+{
+    asm volatile (
+        "mfpvr %0\n"
+        : "=r" (*info)
+    );
+}
+#endif
+/** @}
+ */

 /tags/0.2.0.2/kernel/arch/ppc64/include/cpu.h
 ,0 → 1,48
+/*
+ * Copyright (C) 2006 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/** @addtogroup ppc64
+ * @{
+ */
+/** @file
+ */
+#ifndef __ppc64_CPU_H__
+#define __ppc64_CPU_H__
+#include <typedefs.h>
+struct cpu_arch {
+    int version;
+    int revision;
+};
+#endif
+/** @}
+ */

 /tags/0.2.0.2/kernel/arch/ppc64/include/debug.h
 ,0 → 1,42
+/*
+ * Copyright (C) 2005
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup ppc64debug
+ * @{
+ */
+/** @file
+ */
+#ifndef __ppc64_DEBUG_H__
+#define __ppc64_DEBUG_H__
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/ppc64/include/context_offset.h
 ,0 → 1,49
+/* This file is automatically generated by gencontext.c. */
+/* struct context */
+#define OFFSET_SP    0x0
+#define OFFSET_PC    0x8
+#define OFFSET_R2    0x10
+#define OFFSET_R13   0x18
+#define OFFSET_R14   0x20
+#define OFFSET_R15   0x28
+#define OFFSET_R16   0x30
+#define OFFSET_R17   0x38
+#define OFFSET_R18   0x40
+#define OFFSET_R19   0x48
+#define OFFSET_R20   0x50
+#define OFFSET_R21   0x58
+#define OFFSET_R22   0x60
+#define OFFSET_R23   0x68
+#define OFFSET_R24   0x70
+#define OFFSET_R25   0x78
+#define OFFSET_R26   0x80
+#define OFFSET_R27   0x88
+#define OFFSET_R28   0x90
+#define OFFSET_R29   0x98
+#define OFFSET_R30   0xa0
+#define OFFSET_R31   0xa8
+#define OFFSET_CR    0xb0
+#define OFFSET_FR14  0x0
+#define OFFSET_FR15  0x8
+#define OFFSET_FR16  0x10
+#define OFFSET_FR17  0x18
+#define OFFSET_FR18  0x20
+#define OFFSET_FR19  0x28
+#define OFFSET_FR20  0x30
+#define OFFSET_FR21  0x38
+#define OFFSET_FR22  0x40
+#define OFFSET_FR23  0x48
+#define OFFSET_FR24  0x50
+#define OFFSET_FR25  0x58
+#define OFFSET_FR26  0x60
+#define OFFSET_FR27  0x68
+#define OFFSET_FR28  0x70
+#define OFFSET_FR29  0x78
+#define OFFSET_FR30  0x80
+#define OFFSET_FR31  0x88
+#define OFFSET_FPSCR 0x90
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/ppc64/include/asm/regname.h
 ,0 → 1,216
+/*
+ * Copyright (C) 2005 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup ppc64
+ * @{
+ */
+/** @file
+ */
+#ifndef __ppc64_REGNAME_H__
+#define __ppc64_REGNAME_H__
+/* Condition Register Bit Fields */
+#define cr0 0
+#define cr1 1
+#define cr2 2
+#define cr3 3
+#define cr4 4
+#define cr5 5
+#define cr6 6
+#define cr7 7
+/* General Purpose Registers (GPRs) */
+#define r0  0
+#define r1  1
+#define r2  2
+#define r3  3
+#define r4  4
+#define r5  5
+#define r6  6
+#define r7  7
+#define r8  8
+#define r9  9
+#define r10 10
+#define r11 11
+#define r12 12
+#define r13 13
+#define r14 14
+#define r15 15
+#define r16 16
+#define r17 17
+#define r18 18
+#define r19 19
+#define r20 20
+#define r21 21
+#define r22 22
+#define r23 23
+#define r24 24
+#define r25 25
+#define r26 26
+#define r27 27
+#define r28 28
+#define r29 29
+#define r30 30
+#define r31 31
+/* GPR Aliases */
+#define sp  1
+/* Floating Point Registers (FPRs) */
+#define fr0     0
+#define fr1     1
+#define fr2     2
+#define fr3     3
+#define fr4     4
+#define fr5     5
+#define fr6     6
+#define fr7     7
+#define fr8     8
+#define fr9     9
+#define fr10    10
+#define fr11    11
+#define fr12    12
+#define fr13    13
+#define fr14    14
+#define fr15    15
+#define fr16    16
+#define fr17    17
+#define fr18    18
+#define fr19    19
+#define fr20    20
+#define fr21    21
+#define fr22    22
+#define fr23    23
+#define fr24    24
+#define fr25    25
+#define fr26    26
+#define fr27    27
+#define fr28    28
+#define fr29    29
+#define fr30    30
+#define fr31    31
+#define vr0     0
+#define vr1     1
+#define vr2     2
+#define vr3     3
+#define vr4     4
+#define vr5     5
+#define vr6     6
+#define vr7     7
+#define vr8     8
+#define vr9     9
+#define vr10    10
+#define vr11    11
+#define vr12    12
+#define vr13    13
+#define vr14    14
+#define vr15    15
+#define vr16    16
+#define vr17    17
+#define vr18    18
+#define vr19    19
+#define vr20    20
+#define vr21    21
+#define vr22    22
+#define vr23    23
+#define vr24    24
+#define vr25    25
+#define vr26    26
+#define vr27    27
+#define vr28    28
+#define vr29    29
+#define vr30    30
+#define vr31    31
+#define evr0    0
+#define evr1    1
+#define evr2    2
+#define evr3    3
+#define evr4    4
+#define evr5    5
+#define evr6    6
+#define evr7    7
+#define evr8    8
+#define evr9    9
+#define evr10   10
+#define evr11   11
+#define evr12   12
+#define evr13   13
+#define evr14   14
+#define evr15   15
+#define evr16   16
+#define evr17   17
+#define evr18   18
+#define evr19   19
+#define evr20   20
+#define evr21   21
+#define evr22   22
+#define evr23   23
+#define evr24   24
+#define evr25   25
+#define evr26   26
+#define evr27   27
+#define evr28   28
+#define evr29   29
+#define evr30   30
+#define evr31   31
+/* Special Purpose Registers (SPRs) */
+#define xer     1
+#define lr      8
+#define ctr     9
+#define dec     22
+#define sdr1    25
+#define srr0    26
+#define srr1    27
+#define sprg0   272
+#define sprg1   273
+#define sprg2   274
+#define sprg3   275
+#define prv     287
+#define hid0    1008
+/* MSR bits */
+#define msr_ir  (1 << 4)
+#define msr_dr  (1 << 5)
+#define msr_pr  (1 << 14)
+#define msr_ee  (1 << 15)
+/* HID0 bits */
+#define hid0_ice    (1 << 15)
+#define hid0_dce    (1 << 14)
+#define hid0_icfi   (1 << 11)
+#define hid0_dci    (1 << 10)
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/ppc64/include/interrupt.h
 ,0 → 1,53
+/*
+ * Copyright (C) 2006 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup ppc64interrupt
+ * @{
+ */
+/** @file
+ */
+#ifndef __ppc64_INTERRUPT_H__
+#define __ppc64_INTERRUPT_H__
+#include <arch/exception.h>
+#define IRQ_COUNT   1
+#define IVT_ITEMS   15
+#define INT_OFFSET  0
+#define VECTOR_DECREMENTER 10
+extern void start_decrementer(void);
+extern void interrupt_init(void);
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/ppc64/include/exception.h
 ,0 → 1,105
+/*
+ * Copyright (C) 2006 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup ppc64
+ * @{
+ */
+/** @file
+ */
+#ifndef __ppc64_EXCEPTION_H__
+#define __ppc64_EXCEPTION_H__
+#ifndef __ppc64_TYPES_H__
+#  include <arch/types.h>
+#endif
+#include <typedefs.h>
+struct istate {
+    __u64 r0;
+    __u64 r2;
+    __u64 r3;
+    __u64 r4;
+    __u64 r5;
+    __u64 r6;
+    __u64 r7;
+    __u64 r8;
+    __u64 r9;
+    __u64 r10;
+    __u64 r11;
+    __u64 r13;
+    __u64 r14;
+    __u64 r15;
+    __u64 r16;
+    __u64 r17;
+    __u64 r18;
+    __u64 r19;
+    __u64 r20;
+    __u64 r21;
+    __u64 r22;
+    __u64 r23;
+    __u64 r24;
+    __u64 r25;
+    __u64 r26;
+    __u64 r27;
+    __u64 r28;
+    __u64 r29;
+    __u64 r30;
+    __u64 r31;
+    __u64 cr;
+    __u64 pc;
+    __u64 srr1;
+    __u64 lr;
+    __u64 ctr;
+    __u64 xer;
+    __u64 r12;
+    __u64 sp;
+};
+static inline void istate_set_retaddr(istate_t *istate, __address retaddr)
+{
+    istate->pc = retaddr;
+}
+/** Return true if exception happened while in userspace */
+#include <panic.h>
+static inline int istate_from_uspace(istate_t *istate)
+{
+    panic("istate_from_uspace not yet implemented");
+    return 0;
+}
+static inline __native istate_get_pc(istate_t *istate)
+{
+    return istate->pc;
+}
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/ppc64/include/fpu_context.h
 ,0 → 1,68
+/*
+ * Copyright (C) 2005 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup ppc64
+ * @{
+ */
+/** @file
+ */
+#ifndef __ppc64_FPU_CONTEXT_H__
+#define __ppc64_FPU_CONTEXT_H__
+#ifndef __ppc64_TYPES_H__
+# include <arch/types.h>
+#endif
+struct fpu_context {
+    __u64 fr14;
+    __u64 fr15;
+    __u64 fr16;
+    __u64 fr17;
+    __u64 fr18;
+    __u64 fr19;
+    __u64 fr20;
+    __u64 fr21;
+    __u64 fr22;
+    __u64 fr23;
+    __u64 fr24;
+    __u64 fr25;
+    __u64 fr26;
+    __u64 fr27;
+    __u64 fr28;
+    __u64 fr29;
+    __u64 fr30;
+    __u64 fr31;
+    __u32 fpscr;
+} __attribute__ ((packed));
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/ppc64/include/byteorder.h
 ,0 → 1,74
+/*
+ * Copyright (C) 2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup ppc64
+ * @{
+ */
+/** @file
+ */
+#ifndef __ppc64_BYTEORDER_H__
+#define __ppc64_BYTEORDER_H__
+#include <arch/types.h>
+#include <byteorder.h>
+#define BIG_ENDIAN
+static inline __u64 __u64_le2host(__u64 n)
+{
+    return __u64_byteorder_swap(n);
+}
+/** Convert little-endian __native to host __native
+ *
+ * Convert little-endian __native parameter to host endianess.
+ *
+ * @param n Little-endian __native argument.
+ *
+ * @return Result in host endianess.
+ *
+ */
+static inline __native __native_le2host(__native n)
+{
+    __address v;
+    asm volatile (
+        "lwbrx %0, %1, %2\n"
+        : "=r" (v)
+        : "i" (0), "r" (&n)
+    );
+    return v;
+}
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/ppc64/include/types.h
 ,0 → 1,70
+/*
+ * Copyright (C) 2006 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup ppc64
+ * @{
+ */
+/** @file
+ */
+#ifndef __ppc64_TYPES_H__
+#define __ppc64_TYPES_H__
+#define NULL 0
+typedef signed char __s8;
+typedef signed short __s16;
+typedef signed int __s32;
+typedef signed long __s64;
+typedef unsigned char __u8;
+typedef unsigned short __u16;
+typedef unsigned int __u32;
+typedef unsigned long __u64;
+typedef __u64 __address;
+typedef __u64 pfn_t;
+typedef __u64 ipl_t;
+typedef __u64 __native;
+/** Page Table Entry. */
+typedef struct {
+    unsigned p : 1;       /**< Present bit. */
+    unsigned a : 1;       /**< Accessed bit. */
+    unsigned g : 1;       /**< Global bit. */
+    unsigned valid : 1;   /**< Valid content even if not present. */
+    unsigned pfn : 20;    /**< Physical frame number. */
+} pte_t;
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/ppc64/include/elf.h
 ,0 → 1,46
+/*
+ * Copyright (C) 2006 Sergey Bondari
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup ppc64
+ * @{
+ */
+/** @file
+ */
+#ifndef __ppc64_ELF_H__
+#define __ppc64_ELF_H__
+#define ELF_MACHINE     EM_PPC64
+#define ELF_DATA_ENCODING   ELFDATA2MSB
+#define ELF_CLASS       ELFCLASS32
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/ppc64/include/memstr.h
 ,0 → 1,49
+/*
+ * Copyright (C) 2005 Sergey Bondari
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup ppc64
+ * @{
+ */
+/** @file
+ */
+#ifndef __ppc64_MEMSTR_H__
+#define __ppc64_MEMSTR_H__
+#define memcpy(dst, src, cnt)  __builtin_memcpy((dst), (src), (cnt))
+extern void memsetw(__address dst, size_t cnt, __u16 x);
+extern void memsetb(__address dst, size_t cnt, __u8 x);
+extern int memcmp(__address src, __address dst, int cnt);
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/ppc64/include/arg.h
 ,0 → 1,44
+/*
+ * Copyright (C) 2005 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup ppc64
+ * @{
+ */
+/** @file
+ */
+#ifndef __ppc64_ARG_H__
+#define __ppc64_ARG_H__
+#include <stdarg.h>
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/ppc64/include/atomic.h
 ,0 → 1,98
+/*
+ * Copyright (C) 2005 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup ppc64
+ * @{
+ */
+/** @file
+ */
+#ifndef __ppc64_ATOMIC_H__
+#define __ppc64_ATOMIC_H__
+static inline void atomic_inc(atomic_t *val)
+{
+    long tmp;
+    asm volatile (
+        "1:\n"
+        "lwarx %0, 0, %2\n"
+        "addic %0, %0, 1\n"
+        "stwcx. %0, 0, %2\n"
+        "bne- 1b"
+        : "=&r" (tmp), "=m" (val->count)
+        : "r" (&val->count), "m" (val->count)
+        : "cc"
+    );
+}
+static inline void atomic_dec(atomic_t *val)
+{
+    long tmp;
+    asm volatile (
+        "1:\n"
+        "lwarx %0, 0, %2\n"
+        "addic %0, %0, -1\n"
+        "stwcx. %0, 0, %2\n"
+        "bne- 1b"
+        : "=&r" (tmp), "=m" (val->count)
+        : "r" (&val->count), "m" (val->count)
+        : "cc"
+    );
+}
+static inline long atomic_postinc(atomic_t *val)
+{
+    atomic_inc(val);
+    return val->count - 1;
+}
+static inline long atomic_postdec(atomic_t *val)
+{
+    atomic_dec(val);
+    return val->count + 1;
+}
+static inline long atomic_preinc(atomic_t *val)
+{
+    atomic_inc(val);
+    return val->count;
+}
+static inline long atomic_predec(atomic_t *val)
+{
+    atomic_dec(val);
+    return val->count;
+}
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/ppc64/include/boot/boot.h
 ,0 → 1,93
+/*
+ * Copyright (C) 2006 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup ppc64
+ * @{
+ */
+/** @file
+ */
+#ifndef __ppc64_BOOT_H__
+#define __ppc64_BOOT_H__
+#define BOOT_OFFSET     0x4000
+/* Temporary stack size for boot process */
+#define TEMP_STACK_SIZE 0x100
+#define TASKMAP_MAX_RECORDS 32
+#define MEMMAP_MAX_RECORDS 32
+#ifndef __ASM__
+#include <arch/types.h>
+typedef struct {
+    __address addr;
+    __u64 size;
+} utask_t;
+typedef struct {
+    __u32 count;
+    utask_t tasks[TASKMAP_MAX_RECORDS];
+} taskmap_t;
+typedef struct {
+    __address start;
+    __u64 size;
+} memzone_t;
+typedef struct {
+    __u64 total;
+    __u32 count;
+    memzone_t zones[MEMMAP_MAX_RECORDS];
+} memmap_t;
+typedef struct {
+    __address addr;
+    unsigned int width;
+    unsigned int height;
+    unsigned int bpp;
+    unsigned int scanline;
+} screen_t;
+typedef struct {
+    taskmap_t taskmap;
+    memmap_t memmap;
+    screen_t screen;
+} bootinfo_t;
+extern bootinfo_t bootinfo;
+#endif
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/ppc64/include/arch.h
 ,0 → 1,42
+/*
+ * Copyright (C) 2005 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup ppc64
+ * @{
+ */
+/** @file
+ */
+#ifndef __ppc64_ARCH_H__
+#define __ppc64_ARCH_H__
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/ppc64/include/proc/task.h
 ,0 → 1,48
+/*
+ * Copyright (C) 2006 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup ppc64proc
+ * @{
+ */
+/** @file
+ */
+#ifndef __ppc64_TASK_H__
+#define __ppc64_TASK_H__
+typedef struct {
+} task_arch_t;
+#define task_create_arch(t)
+#define task_destroy_arch(t)
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/ppc64/include/proc/thread.h
 ,0 → 1,47
+/*
+ * Copyright (C) 2005 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup ppc64proc
+ * @{
+ */
+/** @file
+ */
+#ifndef __ppc64_THREAD_H__
+#define __ppc64_THREAD_H__
+typedef struct {
+} thread_arch_t;
+#define thread_create_arch(t)
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/ppc64/include/faddr.h
 ,0 → 1,46
+/*
+ * Copyright (C) 2005 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup ppc64
+ * @{
+ */
+/** @file
+ */
+#ifndef __ppc64_FADDR_H__
+#define __ppc64_FADDR_H__
+#include <arch/types.h>
+#define FADDR(fptr)     ((__address) (fptr))
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/ppc64/include/asm.h
 ,0 → 1,162
+/*
+ * Copyright (C) 2005 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup ppc64
+ * @{
+ */
+/** @file
+ */
+#ifndef __ppc64_ASM_H__
+#define __ppc64_ASM_H__
+#include <arch/types.h>
+#include <config.h>
+/** Enable interrupts.
+ *
+ * Enable interrupts and return previous
+ * value of EE.
+ *
+ * @return Old interrupt priority level.
+ */
+static inline ipl_t interrupts_enable(void)
+{
+    ipl_t v;
+    ipl_t tmp;
+    asm volatile (
+        "mfmsr %0\n"
+        "mfmsr %1\n"
+        "ori %1, %1, 1 << 15\n"
+        "mtmsr %1\n"
+        : "=r" (v), "=r" (tmp)
+    );
+    return v;
+}
+/** Disable interrupts.
+ *
+ * Disable interrupts and return previous
+ * value of EE.
+ *
+ * @return Old interrupt priority level.
+ */
+static inline ipl_t interrupts_disable(void)
+{
+    ipl_t v;
+    ipl_t tmp;
+    asm volatile (
+        "mfmsr %0\n"
+        "mfmsr %1\n"
+        "rlwinm %1, %1, 0, 17, 15\n"
+        "mtmsr %1\n"
+        : "=r" (v), "=r" (tmp)
+    );
+    return v;
+}
+/** Restore interrupt priority level.
+ *
+ * Restore EE.
+ *
+ * @param ipl Saved interrupt priority level.
+ */
+static inline void interrupts_restore(ipl_t ipl)
+{
+    ipl_t tmp;
+    asm volatile (
+        "mfmsr %1\n"
+        "rlwimi  %0, %1, 0, 17, 15\n"
+        "cmpw 0, %0, %1\n"
+        "beq 0f\n"
+        "mtmsr %0\n"
+        "0:\n"
+        : "=r" (ipl), "=r" (tmp)
+        : "0" (ipl)
+        : "cr0"
+    );
+}
+/** Return interrupt priority level.
+ *
+ * Return EE.
+ *
+ * @return Current interrupt priority level.
+ */
+static inline ipl_t interrupts_read(void)
+{
+    ipl_t v;
+    asm volatile (
+        "mfmsr %0\n"
+        : "=r" (v)
+    );
+    return v;
+}
+/** Return base address of current stack.
+ *
+ * Return the base address of the current stack.
+ * The stack is assumed to be STACK_SIZE bytes long.
+ * The stack must start on page boundary.
+ */
+static inline __address get_stack_base(void)
+{
+    __address v;
+    asm volatile (
+        "and %0, %%sp, %1\n"
+        : "=r" (v)
+        : "r" (~(STACK_SIZE - 1))
+    );
+    return v;
+}
+static inline void cpu_sleep(void)
+{
+}
+static inline void cpu_halt(void)
+{
+    asm volatile (
+        "b 0\n"
+    );
+}
+void asm_delay_loop(__u32 t);
+extern void userspace_asm(__address uspace_uarg, __address stack, __address entry);
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/ppc64/include/mm/frame.h
 ,0 → 1,57
+/*
+ * Copyright (C) 2005 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup ppc64mm
+ * @{
+ */
+/** @file
+ */
+#ifndef __ppc64_FRAME_H__
+#define __ppc64_FRAME_H__
+#define FRAME_WIDTH     12  /* 4K */
+#define FRAME_SIZE      (1 << FRAME_WIDTH)
+#ifdef KERNEL
+#ifndef __ASM__
+#include <arch/types.h>
+extern __address last_frame;
+extern void frame_arch_init(void);
+#endif /* __ASM__ */
+#endif /* KERNEL */
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/ppc64/include/mm/memory_init.h
 ,0 → 1,48
+/*
+ * Copyright (C) 2005 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup ppc64mm
+ * @{
+ */
+/** @file
+ */
+#ifndef __ppc64_MEMORY_INIT_H__
+#define __ppc64_MEMORY_INIT_H__
+#include <typedefs.h>
+size_t get_memory_size(void);
+void memory_print_map(void);
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/ppc64/include/mm/page.h
 ,0 → 1,163
+/*
+ * Copyright (C) 2005 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup ppc64mm
+ * @{
+ */
+/** @file
+ */
+#ifndef __ppc64_PAGE_H__
+#define __ppc64_PAGE_H__
+#include <arch/mm/frame.h>
+#define PAGE_WIDTH  FRAME_WIDTH
+#define PAGE_SIZE   FRAME_SIZE
+#ifdef KERNEL
+#ifndef __ASM__
+#   define KA2PA(x) (((__address) (x)) - 0x80000000)
+#   define PA2KA(x) (((__address) (x)) + 0x80000000)
+#else
+#   define KA2PA(x) ((x) - 0x80000000)
+#   define PA2KA(x) ((x) + 0x80000000)
+#endif
+/*
+ * Implementation of generic 4-level page table interface,
+ * the hardware Page Hash Table is used as cache.
+ *
+ * Page table layout:
+ * - 32-bit virtual addressess
+ * - Offset is 12 bits => pages are 4K long
+ * - PTL0 has 1024 entries (10 bits)
+ * - PTL1 is not used
+ * - PTL2 is not used
+ * - PLT3 has 1024 entries (10 bits)
+ */
+#define PTL0_ENTRIES_ARCH   1024
+#define PTL1_ENTRIES_ARCH   0
+#define PTL2_ENTRIES_ARCH   0
+#define PTL3_ENTRIES_ARCH   1024
+#define PTL0_INDEX_ARCH(vaddr)  (((vaddr) >> 22) & 0x3ff)
+#define PTL1_INDEX_ARCH(vaddr)  0
+#define PTL2_INDEX_ARCH(vaddr)  0
+#define PTL3_INDEX_ARCH(vaddr)  (((vaddr) >> 12) & 0x3ff)
+#define GET_PTL1_ADDRESS_ARCH(ptl0, i)      (((pte_t *) (ptl0))[(i)].pfn << 12)
+#define GET_PTL2_ADDRESS_ARCH(ptl1, i)      (ptl1)
+#define GET_PTL3_ADDRESS_ARCH(ptl2, i)      (ptl2)
+#define GET_FRAME_ADDRESS_ARCH(ptl3, i)     (((pte_t *) (ptl3))[(i)].pfn << 12)
+#define SET_PTL0_ADDRESS_ARCH(ptl0)
+#define SET_PTL1_ADDRESS_ARCH(ptl0, i, a)   (((pte_t *) (ptl0))[(i)].pfn = (a) >> 12)
+#define SET_PTL2_ADDRESS_ARCH(ptl1, i, a)
+#define SET_PTL3_ADDRESS_ARCH(ptl2, i, a)
+#define SET_FRAME_ADDRESS_ARCH(ptl3, i, a)  (((pte_t *) (ptl3))[(i)].pfn = (a) >> 12)
+#define GET_PTL1_FLAGS_ARCH(ptl0, i)        get_pt_flags((pte_t *) (ptl0), (index_t) (i))
+#define GET_PTL2_FLAGS_ARCH(ptl1, i)        PAGE_PRESENT
+#define GET_PTL3_FLAGS_ARCH(ptl2, i)        PAGE_PRESENT
+#define GET_FRAME_FLAGS_ARCH(ptl3, i)       get_pt_flags((pte_t *) (ptl3), (index_t) (i))
+#define SET_PTL1_FLAGS_ARCH(ptl0, i, x)     set_pt_flags((pte_t *) (ptl0), (index_t) (i), (x))
+#define SET_PTL2_FLAGS_ARCH(ptl1, i, x)
+#define SET_PTL3_FLAGS_ARCH(ptl2, i, x)
+#define SET_FRAME_FLAGS_ARCH(ptl3, i, x)    set_pt_flags((pte_t *) (ptl3), (index_t) (i), (x))
+#define PTE_VALID_ARCH(pte)         (*((__u32 *) (pte)) != 0)
+#define PTE_PRESENT_ARCH(pte)           ((pte)->p != 0)
+#define PTE_GET_FRAME_ARCH(pte)         ((__address) ((pte)->pfn << 12))
+#define PTE_WRITABLE_ARCH(pte)          1
+#define PTE_EXECUTABLE_ARCH(pte)        1
+#ifndef __ASM__
+#include <mm/page.h>
+#include <arch/mm/frame.h>
+#include <arch/types.h>
+static inline int get_pt_flags(pte_t *pt, index_t i)
+{
+    pte_t *p = &pt[i];
+    return (
+        (1 << PAGE_CACHEABLE_SHIFT) |
+        ((!p->p) << PAGE_PRESENT_SHIFT) |
+        (1 << PAGE_USER_SHIFT) |
+        (1 << PAGE_READ_SHIFT) |
+        (1 << PAGE_WRITE_SHIFT) |
+        (1 << PAGE_EXEC_SHIFT) |
+        (p->g << PAGE_GLOBAL_SHIFT)
+    );
+}
+static inline void set_pt_flags(pte_t *pt, index_t i, int flags)
+{
+    pte_t *p = &pt[i];
+    p->p = !(flags & PAGE_NOT_PRESENT);
+    p->g = (flags & PAGE_GLOBAL) != 0;
+    p->valid = 1;
+}
+extern void page_arch_init(void);
+#define PHT_BITS    16
+#define PHT_ORDER   4
+typedef struct {
+    unsigned v : 1;          /**< Valid */
+    unsigned vsid : 24;      /**< Virtual Segment ID */
+    unsigned h : 1;          /**< Primary/secondary hash */
+    unsigned api : 6;        /**< Abbreviated Page Index */
+    unsigned rpn : 20;       /**< Real Page Number */
+    unsigned reserved0 : 3;
+    unsigned r : 1;          /**< Reference */
+    unsigned c : 1;          /**< Change */
+    unsigned wimg : 4;       /**< Access control */
+    unsigned reserved1 : 1;
+    unsigned pp : 2;         /**< Page protection */
+} phte_t;
+extern void pht_refill(bool data, istate_t *istate);
+extern void pht_init(void);
+#endif /* __ASM__ */
+#endif /* KERNEL */
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/ppc64/include/mm/asid.h
 ,0 → 1,49
+/*
+ * Copyright (C) 2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup ppc64mm
+ * @{
+ */
+/** @file
+ */
+#ifndef __ppc64_ASID_H__
+#define __ppc64_ASID_H__
+typedef int asid_t;
+#define ASID_MAX_ARCH       3
+#define asid_get()      (ASID_START+1)
+#define asid_put(asid)
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/ppc64/include/mm/tlb.h
 ,0 → 1,43
+/*
+ * Copyright (C) 2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup ppc64mm
+ * @{
+ */
+/** @file
+ */
+#ifndef __ppc64_TLB_H__
+#define __ppc64_TLB_H__
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/ppc64/include/mm/as.h
 ,0 → 1,55
+/*
+ * Copyright (C) 2005 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup ppc64mm
+ * @{
+ */
+/** @file
+ */
+#ifndef __ppc64_AS_H__
+#define __ppc64_AS_H__
+#define KERNEL_ADDRESS_SPACE_SHADOWED_ARCH  0
+#define KERNEL_ADDRESS_SPACE_START_ARCH     ((unsigned long) 0x80000000)
+#define KERNEL_ADDRESS_SPACE_END_ARCH       ((unsigned long) 0xffffffff)
+#define USER_ADDRESS_SPACE_START_ARCH       ((unsigned long) 0x00000000)
+#define USER_ADDRESS_SPACE_END_ARCH     ((unsigned long) 0x7fffffff)
+#define USTACK_ADDRESS_ARCH (0x7fffffff-(PAGE_SIZE-1))
+#define as_install_arch(as)
+extern void as_arch_init(void);
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/ppc64/include/context.h
 ,0 → 1,78
+/*
+ * Copyright (C) 2005 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup ppc64
+ * @{
+ */
+/** @file
+ */
+#ifndef __ppc64_CONTEXT_H__
+#define __ppc64_CONTEXT_H__
+#ifndef __ppc64_TYPES_H__
+# include <arch/types.h>
+#endif
+#define SP_DELTA    16
+struct context {
+    __address sp;
+    __address pc;
+    __u64 r2;
+    __u64 r13;
+    __u64 r14;
+    __u64 r15;
+    __u64 r16;
+    __u64 r17;
+    __u64 r18;
+    __u64 r19;
+    __u64 r20;
+    __u64 r21;
+    __u64 r22;
+    __u64 r23;
+    __u64 r24;
+    __u64 r25;
+    __u64 r26;
+    __u64 r27;
+    __u64 r28;
+    __u64 r29;
+    __u64 r30;
+    __u64 r31;
+    __u64 cr;
+    ipl_t ipl;
+} __attribute__ ((packed));
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/ppc64/include/barrier.h
 ,0 → 1,49
+/*
+ * Copyright (C) 2005 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup ppc64
+ * @{
+ */
+/** @file
+ */
+#ifndef __ppc64_BARRIER_H__
+#define __ppc64_BARRIER_H__
+#define CS_ENTER_BARRIER()  asm volatile ("" ::: "memory")
+#define CS_LEAVE_BARRIER()  asm volatile ("" ::: "memory")
+#define memory_barrier() asm volatile ("sync" ::: "memory")
+#define read_barrier() asm volatile ("sync" ::: "memory")
+#define write_barrier() asm volatile ("eieio" ::: "memory")
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/ppc64/Makefile.inc
 ,0 → 1,75
+#
+# Copyright (C) 2006 Martin Decky
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# - Redistributions of source code must retain the above copyright
+#   notice, this list of conditions and the following disclaimer.
+# - Redistributions in binary form must reproduce the above copyright
+#   notice, this list of conditions and the following disclaimer in the
+#   documentation and/or other materials provided with the distribution.
+# - The name of the author may not be used to endorse or promote products
+#   derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+## Toolchain configuration
+#
+BFD_NAME = elf64-powerpc
+BFD_ARCH = powerpc:common64
+BFD = binary
+TARGET = ppc64-linux-gnu
+TOOLCHAIN_DIR = /usr/local/ppc64/bin
+## Make some default assumptions
+#
+CFLAGS += -mcpu=powerpc64 -msoft-float -m64
+AFLAGS += -a64
+LFLAGS += -no-check-sections -N
+DEFS += -D__64_BITS__
+## Own configuration directives
+#
+CONFIG_FB = y
+## Compile with hierarchical page tables support.
+#
+CONFIG_PAGE_PT = y
+DEFS += -DCONFIG_PAGE_PT
+ARCH_SOURCES = \
+    arch/$(ARCH)/src/context.S \
+    arch/$(ARCH)/src/debug/panic.s \
+    arch/$(ARCH)/src/fpu_context.S \
+    arch/$(ARCH)/src/boot/boot.S \
+    arch/$(ARCH)/src/ppc64.c \
+    arch/$(ARCH)/src/dummy.s \
+    arch/$(ARCH)/src/exception.S \
+    arch/$(ARCH)/src/interrupt.c \
+    arch/$(ARCH)/src/asm.S \
+    arch/$(ARCH)/src/cpu/cpu.c \
+    arch/$(ARCH)/src/proc/scheduler.c \
+    arch/$(ARCH)/src/ddi/ddi.c \
+    arch/$(ARCH)/src/mm/as.c \
+    arch/$(ARCH)/src/mm/frame.c \
+    arch/$(ARCH)/src/mm/memory_init.c \
+    arch/$(ARCH)/src/mm/page.c \
+    arch/$(ARCH)/src/mm/tlb.c

 /tags/0.2.0.2/kernel/arch/ppc64/_link.ld.in
 ,0 → 1,59
+/** PPC64 linker script
+ *
+ * umapped section:
+ *  kernel text
+ *  kernel data
+ * mapped section:
+ *  kernel text
+ *  kernel data
+ *
+ */
+#define __ASM__
+#include <arch/boot/boot.h>
+#include <arch/mm/page.h>
+ENTRY(kernel_image_start)
+OUTPUT_FORMAT("elf64-powerpc")
+OUTPUT_ARCH(powerpc:common64)
+SECTIONS {
+    .unmapped 0: AT (0) {
+        unmapped_ktext_start = .;
+        *(K_UNMAPPED_TEXT_START);
+        unmapped_ktext_end = .;
+        unmapped_kdata_start = .;
+        *(K_UNMAPPED_DATA_START);
+        unmapped_kdata_start = .;
+    }
+    .mapped PA2KA(BOOT_OFFSET): AT (BOOT_OFFSET) {
+        ktext_start = .;
+        *(K_TEXT_START);
+        *(.text);
+        ktext_end = .;
+        kdata_start = .;
+        *(K_DATA_START);
+        *(.rodata);
+        *(.rodata.*);
+        *(.data);       /* initialized data */
+        *(.sdata);
+        *(.sdata2);
+        *(.sbss);
+        hardcoded_ktext_size = .;
+        LONG(ktext_end - ktext_start);
+        hardcoded_kdata_size = .;
+        LONG(kdata_end - kdata_start);
+        hardcoded_load_address = .;
+        LONG(PA2KA(BOOT_OFFSET));
+        *(.bss);        /* uninitialized static variables */
+        *(COMMON);      /* global variables */
+        symbol_table = .;
+        *(symtab.*);            /* Symbol table, must be LAST symbol!*/
+        kdata_end = .;
+    }
+}

 /tags/0.2.0.2/kernel/arch/ppc32/src/mm/tlb.c
 ,0 → 1,433
+/*
+ * Copyright (C) 2006 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/** @addtogroup ppc32mm
+ * @{
+ */
+/** @file
+ */
+#include <mm/tlb.h>
+#include <arch/mm/tlb.h>
+#include <arch/interrupt.h>
+#include <mm/as.h>
+#include <arch.h>
+#include <print.h>
+#include <symtab.h>
+/** Try to find PTE for faulting address
+ *
+ * Try to find PTE for faulting address.
+ * The as->lock must be held on entry to this function
+ * if lock is true.
+ *
+ * @param as       Address space.
+ * @param lock     Lock/unlock the address space.
+ * @param badvaddr Faulting virtual address.
+ * @param access   Access mode that caused the fault.
+ * @param istate   Pointer to interrupted state.
+ * @param pfrc     Pointer to variable where as_page_fault() return code will be stored.
+ * @return         PTE on success, NULL otherwise.
+ *
+ */
+static pte_t *find_mapping_and_check(as_t *as, bool lock, __address badvaddr, int access, istate_t *istate, int *pfrc)
+{
+    /*
+     * Check if the mapping exists in page tables.
+     */
+    pte_t *pte = page_mapping_find(as, badvaddr);
+    if ((pte) && (pte->p)) {
+        /*
+         * Mapping found in page tables.
+         * Immediately succeed.
+         */
+        return pte;
+    } else {
+        int rc;
+        /*
+         * Mapping not found in page tables.
+         * Resort to higher-level page fault handler.
+         */
+        page_table_unlock(as, lock);
+        switch (rc = as_page_fault(badvaddr, access, istate)) {
+            case AS_PF_OK:
+                /*
+                 * The higher-level page fault handler succeeded,
+                 * The mapping ought to be in place.
+                 */
+                page_table_lock(as, lock);
+                pte = page_mapping_find(as, badvaddr);
+                ASSERT((pte) && (pte->p));
+                *pfrc = 0;
+                return pte;
+            case AS_PF_DEFER:
+                page_table_lock(as, lock);
+                *pfrc = rc;
+                return NULL;
+            case AS_PF_FAULT:
+                page_table_lock(as, lock);
+                printf("Page fault.\n");
+                *pfrc = rc;
+                return NULL;
+            default:
+                panic("unexpected rc (%d)\n", rc);
+        }
+    }
+}
+static void pht_refill_fail(__address badvaddr, istate_t *istate)
+{
+    char *symbol = "";
+    char *sym2 = "";
+    char *s = get_symtab_entry(istate->pc);
+    if (s)
+        symbol = s;
+    s = get_symtab_entry(istate->lr);
+    if (s)
+        sym2 = s;
+    panic("%p: PHT Refill Exception at %p (%s<-%s)\n", badvaddr, istate->pc, symbol, sym2);
+}
+static void pht_insert(const __address vaddr, const pfn_t pfn)
+{
+    __u32 page = (vaddr >> 12) & 0xffff;
+    __u32 api = (vaddr >> 22) & 0x3f;
+    __u32 vsid;
+    asm volatile (
+        "mfsrin %0, %1\n"
+        : "=r" (vsid)
+        : "r" (vaddr)
+    );
+    __u32 sdr1;
+    asm volatile (
+        "mfsdr1 %0\n"
+        : "=r" (sdr1)
+    );
+    phte_t *phte = (phte_t *) PA2KA(sdr1 & 0xffff0000);
+    /* Primary hash (xor) */
+    __u32 h = 0;
+    __u32 hash = vsid ^ page;
+    __u32 base = (hash & 0x3ff) << 3;
+    __u32 i;
+    bool found = false;
+    /* Find unused or colliding
+       PTE in PTEG */
+    for (i = 0; i < 8; i++) {
+        if ((!phte[base + i].v) || ((phte[base + i].vsid == vsid) && (phte[base + i].api == api))) {
+            found = true;
+            break;
+        }
+    }
+    if (!found) {
+        /* Secondary hash (not) */
+        __u32 base2 = (~hash & 0x3ff) << 3;
+        /* Find unused or colliding
+           PTE in PTEG */
+        for (i = 0; i < 8; i++) {
+            if ((!phte[base2 + i].v) || ((phte[base2 + i].vsid == vsid) && (phte[base2 + i].api == api))) {
+                found = true;
+                base = base2;
+                h = 1;
+                break;
+            }
+        }
+        if (!found) {
+            // TODO: A/C precedence groups
+            i = page % 8;
+        }
+    }
+    phte[base + i].v = 1;
+    phte[base + i].vsid = vsid;
+    phte[base + i].h = h;
+    phte[base + i].api = api;
+    phte[base + i].rpn = pfn;
+    phte[base + i].r = 0;
+    phte[base + i].c = 0;
+    phte[base + i].pp = 2; // FIXME
+}
+static void pht_real_insert(const __address vaddr, const pfn_t pfn)
+{
+    __u32 page = (vaddr >> 12) & 0xffff;
+    __u32 api = (vaddr >> 22) & 0x3f;
+    __u32 vsid;
+    asm volatile (
+        "mfsrin %0, %1\n"
+        : "=r" (vsid)
+        : "r" (vaddr)
+    );
+    __u32 sdr1;
+    asm volatile (
+        "mfsdr1 %0\n"
+        : "=r" (sdr1)
+    );
+    phte_t *phte_physical = (phte_t *) (sdr1 & 0xffff0000);
+    /* Primary hash (xor) */
+    __u32 h = 0;
+    __u32 hash = vsid ^ page;
+    __u32 base = (hash & 0x3ff) << 3;
+    __u32 i;
+    bool found = false;
+    /* Find unused or colliding
+       PTE in PTEG */
+    for (i = 0; i < 8; i++) {
+        if ((!phte_physical[base + i].v) || ((phte_physical[base + i].vsid == vsid) && (phte_physical[base + i].api == api))) {
+            found = true;
+            break;
+        }
+    }
+    if (!found) {
+        /* Secondary hash (not) */
+        __u32 base2 = (~hash & 0x3ff) << 3;
+        /* Find unused or colliding
+           PTE in PTEG */
+        for (i = 0; i < 8; i++) {
+            if ((!phte_physical[base2 + i].v) || ((phte_physical[base2 + i].vsid == vsid) && (phte_physical[base2 + i].api == api))) {
+                found = true;
+                base = base2;
+                h = 1;
+                break;
+            }
+        }
+        if (!found) {
+            // TODO: A/C precedence groups
+            i = page % 8;
+        }
+    }
+    phte_physical[base + i].v = 1;
+    phte_physical[base + i].vsid = vsid;
+    phte_physical[base + i].h = h;
+    phte_physical[base + i].api = api;
+    phte_physical[base + i].rpn = pfn;
+    phte_physical[base + i].r = 0;
+    phte_physical[base + i].c = 0;
+    phte_physical[base + i].pp = 2; // FIXME
+}
+/** Process Instruction/Data Storage Interrupt
+ *
+ * @param n Interrupt vector number.
+ * @param istate Interrupted register context.
+ *
+ */
+void pht_refill(int n, istate_t *istate)
+{
+    __address badvaddr;
+    pte_t *pte;
+    int pfrc;
+    as_t *as;
+    bool lock;
+    if (AS == NULL) {
+        as = AS_KERNEL;
+        lock = false;
+    } else {
+        as = AS;
+        lock = true;
+    }
+    if (n == VECTOR_DATA_STORAGE) {
+        asm volatile (
+            "mfdar %0\n"
+            : "=r" (badvaddr)
+        );
+    } else
+        badvaddr = istate->pc;
+    page_table_lock(as, lock);
+    pte = find_mapping_and_check(as, lock, badvaddr, PF_ACCESS_READ /* FIXME */, istate, &pfrc);
+    if (!pte) {
+        switch (pfrc) {
+            case AS_PF_FAULT:
+                goto fail;
+                break;
+            case AS_PF_DEFER:
+                /*
+                 * The page fault came during copy_from_uspace()
+                 * or copy_to_uspace().
+                 */
+                page_table_unlock(as, lock);
+                return;
+            default:
+                panic("Unexpected pfrc (%d)\n", pfrc);
+        }
+    }
+    pte->a = 1; /* Record access to PTE */
+    pht_insert(badvaddr, pte->pfn);
+    page_table_unlock(as, lock);
+    return;
+fail:
+    page_table_unlock(as, lock);
+    pht_refill_fail(badvaddr, istate);
+}
+/** Process Instruction/Data Storage Interrupt in Real Mode
+ *
+ * @param n Interrupt vector number.
+ * @param istate Interrupted register context.
+ *
+ */
+bool pht_real_refill(int n, istate_t *istate)
+{
+    __address badvaddr;
+    if (n == VECTOR_DATA_STORAGE) {
+        asm volatile (
+            "mfdar %0\n"
+            : "=r" (badvaddr)
+        );
+    } else
+        badvaddr = istate->pc;
+    __u32 physmem;
+    asm volatile (
+        "mfsprg3 %0\n"
+        : "=r" (physmem)
+    );
+    if ((badvaddr >= PA2KA(0)) && (badvaddr < PA2KA(physmem))) {
+        pht_real_insert(badvaddr, KA2PA(badvaddr) >> 12);
+        return true;
+    }
+    return false;
+}
+void tlb_arch_init(void)
+{
+    tlb_invalidate_all();
+}
+void tlb_invalidate_all(void)
+{
+    asm volatile (
+        "tlbia\n"
+        "tlbsync\n"
+    );
+}
+void tlb_invalidate_asid(asid_t asid)
+{
+    // TODO
+    tlb_invalidate_all();
+}
+void tlb_invalidate_pages(asid_t asid, __address page, count_t cnt)
+{
+    // TODO
+    tlb_invalidate_all();
+}
+#define PRINT_BAT(name, ureg, lreg) \
+    asm volatile ( \
+        "mfspr %0," #ureg "\n" \
+        "mfspr %1," #lreg "\n" \
+        : "=r" (upper), "=r" (lower) \
+    ); \
+    mask = (upper & 0x1ffc) >> 2; \
+    if (upper & 3) { \
+        __u32 tmp = mask; \
+        length = 128; \
+        while (tmp) { \
+            if ((tmp & 1) == 0) { \
+                printf("ibat[0]: error in mask\n"); \
+                break; \
+            } \
+            length <<= 1; \
+            tmp >>= 1; \
+        } \
+    } else \
+        length = 0; \
+    printf(name ": page=%.*p frame=%.*p length=%d KB (mask=%#x)%s%s\n", sizeof(upper) * 2, upper & 0xffff0000, sizeof(lower) * 2, lower & 0xffff0000, length, mask, ((upper >> 1) & 1) ? " supervisor" : "", (upper & 1) ? " user" : "");
+void tlb_print(void)
+{
+    __u32 sr;
+    for (sr = 0; sr < 16; sr++) {
+        __u32 vsid;
+        asm volatile (
+            "mfsrin %0, %1\n"
+            : "=r" (vsid)
+            : "r" (sr << 28)
+        );
+        printf("vsid[%d]: VSID=%.*p (ASID=%d)%s%s\n", sr, sizeof(vsid) * 2, vsid & 0xffffff, (vsid & 0xffffff) >> 4, ((vsid >> 30) & 1) ? " supervisor" : "", ((vsid >> 29) & 1) ? " user" : "");
+    }
+    __u32 upper;
+    __u32 lower;
+    __u32 mask;
+    __u32 length;
+    PRINT_BAT("ibat[0]", 528, 529);
+    PRINT_BAT("ibat[1]", 530, 531);
+    PRINT_BAT("ibat[2]", 532, 533);
+    PRINT_BAT("ibat[3]", 534, 535);
+    PRINT_BAT("dbat[0]", 536, 537);
+    PRINT_BAT("dbat[1]", 538, 539);
+    PRINT_BAT("dbat[2]", 540, 541);
+    PRINT_BAT("dbat[3]", 542, 543);
+}
+/** @}
+ */

 /tags/0.2.0.2/kernel/arch/ppc32/src/mm/memory_init.c
 ,0 → 1,56
+/*
+ * Copyright (C) 2005 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/** @addtogroup ppc32mm
+ * @{
+ */
+/** @file
+ */
+#include <arch/boot/boot.h>
+#include <arch/mm/memory_init.h>
+#include <typedefs.h>
+#include <print.h>
+size_t get_memory_size(void)
+{
+    return bootinfo.memmap.total;
+}
+void memory_print_map(void)
+{
+    count_t i;
+    for (i = 0; i < bootinfo.memmap.count; i++)
+        printf("base: %.*p size: %#x\n", sizeof(bootinfo.memmap.zones[i].start) * 2, bootinfo.memmap.zones[i].start, bootinfo.memmap.zones[i].size);
+}
+/** @}
+ */

 /tags/0.2.0.2/kernel/arch/ppc32/src/mm/as.c
 ,0 → 1,88
+/*
+ * Copyright (C) 2006 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/** @addtogroup ppc32mm
+ * @{
+ */
+/** @file
+ */
+#include <arch/mm/as.h>
+#include <genarch/mm/as_pt.h>
+#include <genarch/mm/asid_fifo.h>
+#include <arch.h>
+/** Architecture dependent address space init. */
+void as_arch_init(void)
+{
+    as_operations = &as_pt_operations;
+    asid_fifo_init();
+}
+/** Install address space.
+ *
+ * Install ASID.
+ *
+ * @param as Address space structure.
+ *
+ */
+void as_install_arch(as_t *as)
+{
+    asid_t asid;
+    ipl_t ipl;
+    __u32 sr;
+    ipl = interrupts_disable();
+    spinlock_lock(&as->lock);
+    asid = as->asid;
+    /* Lower 2 GB, user and supervisor access */
+    for (sr = 0; sr < 8; sr++) {
+        asm volatile (
+            "mtsrin %0, %1\n"
+            :
+            : "r" ((0x6000 << 16) + (asid << 4) + sr), "r" (sr << 28)
+        );
+    }
+    /* Upper 2 GB, only supervisor access */
+    for (sr = 8; sr < 16; sr++) {
+        asm volatile (
+            "mtsrin %0, %1\n"
+            :
+            : "r" ((0x4000 << 16) + (asid << 4) + sr), "r" (sr << 28)
+        );
+    }
+    spinlock_unlock(&as->lock);
+    interrupts_restore(ipl);
+}
+/** @}
+ */

 /tags/0.2.0.2/kernel/arch/ppc32/src/mm/frame.c
 ,0 → 1,79
+/*
+ * Copyright (C) 2005 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/** @addtogroup ppc32mm
+ * @{
+ */
+/** @file
+ */
+#include <arch/boot/boot.h>
+#include <arch/mm/frame.h>
+#include <arch/mm/memory_init.h>
+#include <mm/frame.h>
+#include <align.h>
+#include <macros.h>
+__address last_frame = 0;
+void frame_arch_init(void)
+{
+    pfn_t minconf = 2;
+    count_t i;
+    pfn_t start, conf;
+    size_t size;
+    for (i = 0; i < bootinfo.memmap.count; i++) {
+        start = ADDR2PFN(ALIGN_UP(bootinfo.memmap.zones[i].start, FRAME_SIZE));
+        size = SIZE2FRAMES(ALIGN_DOWN(bootinfo.memmap.zones[i].size, FRAME_SIZE));
+        if ((minconf < start) || (minconf >= start + size))
+            conf = start;
+        else
+            conf = minconf;
+        zone_create(start, size, conf, 0);
+        if (last_frame < ALIGN_UP(bootinfo.memmap.zones[i].start + bootinfo.memmap.zones[i].size, FRAME_SIZE))
+            last_frame = ALIGN_UP(bootinfo.memmap.zones[i].start + bootinfo.memmap.zones[i].size, FRAME_SIZE);
+    }
+    /* First is exception vector, second is 'implementation specific',
+       third and fourth is reserved, other contain real mode code */
+    frame_mark_unavailable(0, 8);
+    /* Mark the Page Hash Table frames as unavailable */
+    __u32 sdr1;
+    asm volatile (
+        "mfsdr1 %0\n"
+        : "=r" (sdr1)
+    );
+    frame_mark_unavailable(ADDR2PFN(sdr1 & 0xffff000), 16); // FIXME
+}
+/** @}
+ */

 /tags/0.2.0.2/kernel/arch/ppc32/src/mm/page.c
 ,0 → 1,64
+/*
+ * Copyright (C) 2005 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/** @addtogroup ppc32mm
+ * @{
+ */
+/** @file
+ */
+#include <genarch/mm/page_pt.h>
+#include <mm/frame.h>
+#include <mm/as.h>
+#include <align.h>
+#include <config.h>
+void page_arch_init(void)
+{
+    if (config.cpu_active == 1)
+        page_mapping_operations = &pt_mapping_operations;
+}
+__address hw_map(__address physaddr, size_t size)
+{
+    if (last_frame + ALIGN_UP(size, PAGE_SIZE) > KA2PA(KERNEL_ADDRESS_SPACE_END_ARCH))
+        panic("Unable to map physical memory %p (%d bytes)", physaddr, size)
+    __address virtaddr = PA2KA(last_frame);
+    pfn_t i;
+    for (i = 0; i < ADDR2PFN(ALIGN_UP(size, PAGE_SIZE)); i++)
+        page_mapping_insert(AS_KERNEL, virtaddr + PFN2ADDR(i), physaddr + PFN2ADDR(i), PAGE_NOT_CACHEABLE);
+    last_frame = ALIGN_UP(last_frame + size, FRAME_SIZE);
+    return virtaddr;
+}
+/** @}
+ */

 /tags/0.2.0.2/kernel/arch/ppc32/src/ppc32.c
 ,0 → 1,124
+/*
+ * Copyright (C) 2005 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/** @addtogroup ppc32
+ * @{
+ */
+/** @file
+ */
+#include <arch.h>
+#include <arch/boot/boot.h>
+#include <arch/drivers/cuda.h>
+#include <arch/mm/memory_init.h>
+#include <arch/interrupt.h>
+#include <genarch/fb/fb.h>
+#include <userspace.h>
+#include <proc/uarg.h>
+#include <console/console.h>
+#include <arch/drivers/pic.h>
+bootinfo_t bootinfo;
+void arch_pre_main(void)
+{
+    /* Setup usermode */
+    init.cnt = bootinfo.taskmap.count;
+    __u32 i;
+    for (i = 0; i < bootinfo.taskmap.count; i++) {
+        init.tasks[i].addr = PA2KA(bootinfo.taskmap.tasks[i].addr);
+        init.tasks[i].size = bootinfo.taskmap.tasks[i].size;
+    }
+}
+void arch_pre_mm_init(void)
+{
+    /* Initialize dispatch table */
+    interrupt_init();
+    /* Start decrementer */
+    start_decrementer();
+}
+void arch_post_mm_init(void)
+{
+    if (config.cpu_active == 1) {
+        fb_init(bootinfo.screen.addr, bootinfo.screen.width, bootinfo.screen.height, bootinfo.screen.bpp, bootinfo.screen.scanline);
+        /* Initialize PIC */
+        pic_init();
+        cuda_init(bootinfo.keyboard.addr, bootinfo.keyboard.size);
+        /* Merge all zones to 1 big zone */
+        zone_merge_all();
+    }
+}
+void arch_pre_smp_init(void)
+{
+    memory_print_map();
+}
+void arch_post_smp_init(void)
+{
+}
+void calibrate_delay_loop(void)
+{
+}
+void userspace(uspace_arg_t *kernel_uarg)
+{
+    userspace_asm((__address) kernel_uarg->uspace_uarg, (__address) kernel_uarg->uspace_stack + THREAD_STACK_SIZE - SP_DELTA, (__address) kernel_uarg->uspace_entry);
+    /* Unreachable */
+    for (;;)
+        ;
+}
+/** Acquire console back for kernel
+ *
+ */
+void arch_grab_console(void)
+{
+    cuda_grab();
+}
+/** Return console to userspace
+ *
+ */
+void arch_release_console(void)
+{
+    cuda_release();
+}
+/** @}
+ */

 /tags/0.2.0.2/kernel/arch/ppc32/src/drivers/cuda.c
 ,0 → 1,327
+/*
+ * Copyright (C) 2006 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/** @addtogroup ppc32
+ * @{
+ */
+/** @file
+ */
+#include <arch/drivers/cuda.h>
+#include <arch/asm.h>
+#include <console/console.h>
+#include <console/chardev.h>
+#include <arch/drivers/pic.h>
+#include <sysinfo/sysinfo.h>
+#include <interrupt.h>
+#include <stdarg.h>
+#define SPECIAL     '?'
+#define PACKET_ADB  0x00
+#define PACKET_CUDA 0x01
+#define CUDA_POWERDOWN 0x0a
+#define RS 0x200
+#define B (0 * RS)
+#define A (1 * RS)
+#define SR (10 * RS)
+#define ACR (11 * RS)
+#define SR_OUT 0x10
+#define TACK 0x10
+#define TIP 0x20
+static volatile __u8 *cuda = NULL;
+static iroutine vector;
+static char lchars[0x80] = {
+    'a',
+    's',
+    'd',
+    'f',
+    'h',
+    'g',
+    'z',
+    'x',
+    'c',
+    'v',
+    SPECIAL,
+    'b',
+    'q',
+    'w',
+    'e',
+    'r',
+    'y',
+    't',
+    '1',
+    '2',
+    '3',
+    '4',
+    '6',
+    '5',
+    '=',
+    '9',
+    '7',
+    '-',
+    '8',
+    '0',
+    ']',
+    'o',
+    'u',
+    '[',
+    'i',
+    'p',
+    '\n',    /* Enter */
+    'l',
+    'j',
+    '\'',
+    'k',
+    ';',
+    '\\',
+    ',',
+    '/',
+    'n',
+    'm',
+    '.',
+    '\t',    /* Tab */
+    ' ',
+    '`',
+    '\b',    /* Backspace */
+    SPECIAL,
+    SPECIAL, /* Escape */
+    SPECIAL, /* Ctrl */
+    SPECIAL, /* Alt */
+    SPECIAL, /* Shift */
+    SPECIAL, /* Caps-Lock */
+    SPECIAL, /* RAlt */
+    SPECIAL, /* Left */
+    SPECIAL, /* Right */
+    SPECIAL, /* Down */
+    SPECIAL, /* Up */
+    SPECIAL,
+    SPECIAL,
+    '.',     /* Keypad . */
+    SPECIAL,
+    '*',     /* Keypad * */
+    SPECIAL,
+    '+',     /* Keypad + */
+    SPECIAL,
+    SPECIAL, /* NumLock */
+    SPECIAL,
+    SPECIAL,
+    SPECIAL,
+    '/',     /* Keypad / */
+    '\n',    /* Keypad Enter */
+    SPECIAL,
+    '-',     /* Keypad - */
+    SPECIAL,
+    SPECIAL,
+    SPECIAL,
+    '0',     /* Keypad 0 */
+    '1',     /* Keypad 1 */
+    '2',     /* Keypad 2 */
+    '3',     /* Keypad 3 */
+    '4',     /* Keypad 4 */
+    '5',     /* Keypad 5 */
+    '6',     /* Keypad 6 */
+    '7',     /* Keypad 7 */
+    SPECIAL,
+    '8',     /* Keypad 8 */
+    '9',     /* Keypad 9 */
+    SPECIAL,
+    SPECIAL,
+    SPECIAL,
+    SPECIAL, /* F5 */
+    SPECIAL, /* F6 */
+    SPECIAL, /* F7 */
+    SPECIAL, /* F3 */
+    SPECIAL, /* F8 */
+    SPECIAL, /* F9 */
+    SPECIAL,
+    SPECIAL, /* F11 */
+    SPECIAL,
+    SPECIAL, /* F13 */
+    SPECIAL,
+    SPECIAL, /* ScrollLock */
+    SPECIAL,
+    SPECIAL, /* F10 */
+    SPECIAL,
+    SPECIAL, /* F12 */
+    SPECIAL,
+    SPECIAL, /* Pause */
+    SPECIAL, /* Insert */
+    SPECIAL, /* Home */
+    SPECIAL, /* PageUp */
+    SPECIAL, /* Delete */
+    SPECIAL, /* F4 */
+    SPECIAL, /* End */
+    SPECIAL, /* F2 */
+    SPECIAL, /* PageDown */
+    SPECIAL  /* F1 */
+};
+void send_packet(const __u8 kind, index_t count, ...);
+static void receive_packet(__u8 *kind, index_t count, __u8 data[])
+{
+    cuda[B] = cuda[B] & ~TIP;
+    *kind = cuda[SR];
+    index_t i;
+    for (i = 0; i < count; i++)
+        data[i] = cuda[SR];
+    cuda[B] = cuda[B] | TIP;
+}
+/* Called from getc(). */
+static void cuda_resume(chardev_t *d)
+{
+}
+/* Called from getc(). */
+static void cuda_suspend(chardev_t *d)
+{
+}
+static char key_read(chardev_t *d)
+{
+    char ch;
+    ch = 0;
+    return ch;
+}
+static chardev_t kbrd;
+static chardev_operations_t ops = {
+    .suspend = cuda_suspend,
+    .resume = cuda_resume,
+    .read = key_read
+};
+int cuda_get_scancode(void)
+{
+    __u8 kind;
+    __u8 data[4];
+    receive_packet(&kind, 4, data);
+    if ((kind == PACKET_ADB) && (data[0] == 0x40) && (data[1] == 0x2c))
+        return data[2];
+    return -1;
+}
+static void cuda_irq(int n, istate_t *istate)
+{
+    int scan_code = cuda_get_scancode();
+    if (scan_code != -1) {
+        __u8 scancode = (__u8) scan_code;
+        if ((scancode & 0x80) != 0x80)
+            chardev_push_character(&kbrd, lchars[scancode & 0x7f]);
+    }
+}
+/** Initialize keyboard and service interrupts using kernel routine */
+void cuda_grab(void)
+{
+    vector = int_register(CUDA_IRQ, "cuda", cuda_irq);
+}
+/** Resume the former interrupt vector */
+void cuda_release(void)
+{
+    if (vector)
+        int_register(CUDA_IRQ, "user_interrupt", vector);
+}
+void cuda_init(__address base, size_t size)
+{
+    cuda = (__u8 *) hw_map(base, size);
+    int_register(CUDA_IRQ, "cuda", cuda_irq);
+    pic_enable_interrupt(CUDA_IRQ);
+    chardev_initialize("cuda_kbd", &kbrd, &ops);
+    stdin = &kbrd;
+    sysinfo_set_item_val("cuda", NULL, true);
+    sysinfo_set_item_val("cuda.irq", NULL, CUDA_IRQ);
+}
+void send_packet(const __u8 kind, index_t count, ...)
+{
+    index_t i;
+    va_list va;
+    cuda[B] = cuda[B] | TIP;
+    cuda[ACR] = cuda[ACR] | SR_OUT;
+    cuda[SR] = kind;
+    cuda[B] = cuda[B] & ~TIP;
+    va_start(va, count);
+    for (i = 0; i < count; i++) {
+        cuda[ACR] = cuda[ACR] | SR_OUT;
+        cuda[SR] = va_arg(va, int);
+        cuda[B] = cuda[B] | TACK;
+    }
+    va_end(va);
+    cuda[B] = cuda[B] | TIP;
+}
+void cpu_halt(void) {
+#ifdef CONFIG_POWEROFF
+    send_packet(PACKET_CUDA, 1, CUDA_POWERDOWN);
+#endif
+    asm volatile (
+        "b 0\n"
+    );
+}
+/** @}
+ */

 /tags/0.2.0.2/kernel/arch/ppc32/src/drivers/pic.c
 ,0 → 1,95
+/*
+ * Copyright (C) 2006 Ondrej Palkovsky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup ppc32
+ * @{
+ */
+/** @file
+ */
+#include <arch/asm.h>
+#include <arch/drivers/pic.h>
+#include <byteorder.h>
+#include <bitops.h>
+static volatile __u32 *pic;
+void pic_init(void)
+{
+    pic = (__u32 *)hw_map(PIC_HW_ADDR, PAGE_SIZE);
+}
+void pic_enable_interrupt(int intnum)
+{
+    if (intnum < 32) {
+        pic[PIC_MASK_LOW] = pic[PIC_MASK_LOW] | (1 << intnum);
+    } else {
+        pic[PIC_MASK_HIGH] = pic[PIC_MASK_HIGH] | (1 << (intnum - 32));
+    }
+}
+void pic_disable_interrupt(int intnum)
+{
+    if (intnum < 32) {
+        pic[PIC_MASK_LOW] = pic[PIC_MASK_LOW] & (~(1 << intnum));
+    } else {
+        pic[PIC_MASK_HIGH] = pic[PIC_MASK_HIGH] & (~(1 << (intnum - 32)));
+    }
+}
+void pic_ack_interrupt(int intnum)
+{
+    if (intnum < 32)
+        pic[PIC_ACK_LOW] = 1 << intnum;
+    else
+        pic[PIC_ACK_HIGH] = 1 << (intnum - 32);
+}
+/** Return number of pending interrupt */
+int pic_get_pending(void)
+{
+    int pending;
+    pending = pic[PIC_PENDING_LOW];
+    if (pending) {
+        return fnzb32(pending);
+    }
+    pending = pic[PIC_PENDING_HIGH];
+    if (pending) {
+        return fnzb32(pending) + 32;
+    }
+    return -1;
+}
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/ppc32/src/cpu/cpu.c
 ,0 → 1,63
+/*
+ * Copyright (C) 2005 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/** @addtogroup ppc32
+ * @{
+ */
+/** @file
+ */
+#include <arch/cpu.h>
+#include <arch/cpuid.h>
+#include <cpu.h>
+#include <arch.h>
+#include <typedefs.h>
+#include <print.h>
+void cpu_arch_init(void)
+{
+}
+void cpu_identify(void)
+{
+    cpu_info_t info;
+    cpu_version(&info);
+    CPU->arch.version = info.version;
+    CPU->arch.revision = info.revision;
+}
+void cpu_print_report(cpu_t *m)
+{
+    printf("cpu%d: version=%d, revision=%d\n", m->id, m->arch.version, m->arch.revision);
+}
+/** @}
+ */

 /tags/0.2.0.2/kernel/arch/ppc32/src/exception.S
 ,0 → 1,328
+#
+# Copyright (C) 2006 Martin Decky
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# - Redistributions of source code must retain the above copyright
+#   notice, this list of conditions and the following disclaimer.
+# - Redistributions in binary form must reproduce the above copyright
+#   notice, this list of conditions and the following disclaimer in the
+#   documentation and/or other materials provided with the distribution.
+# - The name of the author may not be used to endorse or promote products
+#   derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+#include <arch/asm/regname.h>
+#include <arch/mm/page.h>
+.section K_UNMAPPED_TEXT_START, "ax"
+.macro CONTEXT_STORE
+    # save R12 in SPRG1, backup CR in R12
+    # save SP in SPRG2
+    mtsprg1 r12
+    mfcr r12
+    mtsprg2 sp
+    # check whether SP is in kernel
+    andis. sp, sp, 0x8000
+    bne 1f
+        # stack is in user-space
+        mfsprg0 sp
+    b 2f
+:
+        # stack is in kernel
+        mfsprg2 sp
+        subis sp, sp, 0x8000
+:
+    subi sp, sp, 160
+    stw r0, 8(sp)
+    stw r2, 12(sp)
+    stw r3, 16(sp)
+    stw r4, 20(sp)
+    stw r5, 24(sp)
+    stw r6, 28(sp)
+    stw r7, 32(sp)
+    stw r8, 36(sp)
+    stw r9, 40(sp)
+    stw r10, 44(sp)
+    stw r11, 48(sp)
+    stw r13, 52(sp)
+    stw r14, 56(sp)
+    stw r15, 60(sp)
+    stw r16, 64(sp)
+    stw r17, 68(sp)
+    stw r18, 72(sp)
+    stw r19, 76(sp)
+    stw r20, 80(sp)
+    stw r21, 84(sp)
+    stw r22, 88(sp)
+    stw r23, 92(sp)
+    stw r24, 96(sp)
+    stw r25, 100(sp)
+    stw r26, 104(sp)
+    stw r27, 108(sp)
+    stw r28, 112(sp)
+    stw r29, 116(sp)
+    stw r30, 120(sp)
+    stw r31, 124(sp)
+    stw r12, 128(sp)
+    mfsrr0 r12
+    stw r12, 132(sp)
+    mfsrr1 r12
+    stw r12, 136(sp)
+    mflr r12
+    stw r12, 140(sp)
+    mfctr r12
+    stw r12, 144(sp)
+    mfxer r12
+    stw r12, 148(sp)
+    mfsprg1 r12
+    stw r12, 152(sp)
+    mfsprg2 r12
+    stw r12, 156(sp)
+.endm
+.org 0x100
+.global exc_system_reset
+exc_system_reset:
+    CONTEXT_STORE
+    li r3, 0
+    b jump_to_kernel
+.org 0x200
+.global exc_machine_check
+exc_machine_check:
+    CONTEXT_STORE
+    li r3, 1
+    b jump_to_kernel
+.org 0x300
+.global exc_data_storage
+exc_data_storage:
+    CONTEXT_STORE
+    li r3, 2
+    mr r4, sp
+    addi r4, r4, 8
+    bl pht_real_refill
+    cmpwi r3, 0
+    bne iret_real
+    li r3, 2
+    b jump_to_kernel
+.org 0x400
+.global exc_instruction_storage
+exc_instruction_storage:
+    CONTEXT_STORE
+    li r3, 3
+    mr r4, sp
+    addi r4, r4, 8
+    bl pht_real_refill
+    cmpwi r3, 0
+    bne iret_real
+    li r3, 3
+    b jump_to_kernel
+.org 0x500
+.global exc_external
+exc_external:
+    CONTEXT_STORE
+    li r3, 4
+    b jump_to_kernel
+.org 0x600
+.global exc_alignment
+exc_alignment:
+    CONTEXT_STORE
+    li r3, 5
+    b jump_to_kernel
+.org 0x700
+.global exc_program
+exc_program:
+    CONTEXT_STORE
+    li r3, 6
+    b jump_to_kernel
+.org 0x800
+.global exc_fp_unavailable
+exc_fp_unavailable:
+    CONTEXT_STORE
+    li r3, 7
+    b jump_to_kernel
+.org 0x900
+.global exc_decrementer
+exc_decrementer:
+    CONTEXT_STORE
+    li r3, 8
+    b jump_to_kernel
+.org 0xa00
+.global exc_reserved0
+exc_reserved0:
+    CONTEXT_STORE
+    li r3, 9
+    b jump_to_kernel
+.org 0xb00
+.global exc_reserved1
+exc_reserved1:
+    CONTEXT_STORE
+    li r3, 10
+    b jump_to_kernel
+.org 0xc00
+.global exc_syscall
+exc_syscall:
+    CONTEXT_STORE
+    b jump_to_kernel_syscall
+.org 0xd00
+.global exc_trace
+exc_trace:
+    CONTEXT_STORE
+    li r3, 12
+    b jump_to_kernel
+.org 0x4000
+jump_to_kernel:
+    lis r12, iret@ha
+    addi r12, r12, iret@l
+    mtlr r12
+    lis r12, exc_dispatch@ha
+    addi r12, r12, exc_dispatch@l
+    mtsrr0 r12
+    mfmsr r12
+    ori r12, r12, (msr_ir | msr_dr)@l
+    mtsrr1 r12
+    addis sp, sp, 0x8000
+    mr r4, sp
+    addi r4, r4, 8
+    rfi
+jump_to_kernel_syscall:
+    lis r12, syscall_handler@ha
+    addi r12, r12, syscall_handler@l
+    mtsrr0 r12
+    lis r12, iret_syscall@ha
+    addi r12, r12, iret_syscall@l
+    mtlr r12
+    mfmsr r12
+    ori r12, r12, (msr_ir | msr_dr)@l
+    mtsrr1 r12
+    addis sp, sp, 0x8000
+    rfi
+iret_real:
+    lwz r0, 8(sp)
+    lwz r2, 12(sp)
+    lwz r3, 16(sp)
+    lwz r4, 20(sp)
+    lwz r5, 24(sp)
+    lwz r6, 28(sp)
+    lwz r7, 32(sp)
+    lwz r8, 36(sp)
+    lwz r9, 40(sp)
+    lwz r10, 44(sp)
+    lwz r11, 48(sp)
+    lwz r13, 52(sp)
+    lwz r14, 56(sp)
+    lwz r15, 60(sp)
+    lwz r16, 64(sp)
+    lwz r17, 68(sp)
+    lwz r18, 72(sp)
+    lwz r19, 76(sp)
+    lwz r20, 80(sp)
+    lwz r21, 84(sp)
+    lwz r22, 88(sp)
+    lwz r23, 92(sp)
+    lwz r24, 96(sp)
+    lwz r25, 100(sp)
+    lwz r26, 104(sp)
+    lwz r27, 108(sp)
+    lwz r28, 112(sp)
+    lwz r29, 116(sp)
+    lwz r30, 120(sp)
+    lwz r31, 124(sp)
+    lwz r12, 128(sp)
+    mtcr r12
+    lwz r12, 132(sp)
+    mtsrr0 r12
+    lwz r12, 136(sp)
+    mtsrr1 r12
+    lwz r12, 140(sp)
+    mtlr r12
+    lwz r12, 144(sp)
+    mtctr r12
+    lwz r12, 148(sp)
+    mtxer r12
+    lwz r12, 152(sp)
+    lwz sp, 156(sp)
+    rfi

 /tags/0.2.0.2/kernel/arch/ppc32/src/proc/scheduler.c
 ,0 → 1,62
+/*
+ * Copyright (C) 2006 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/** @addtogroup ppc32proc
+ * @{
+ */
+/** @file
+ */
+#include <arch/mm/page.h>
+#include <arch/boot/boot.h>
+#include <proc/scheduler.h>
+#include <proc/thread.h>
+#include <arch.h>
+/** Perform ppc32 specific tasks needed before the new task is run. */
+void before_task_runs_arch(void)
+{
+}
+/** Perform ppc32 specific tasks needed before the new thread is scheduled. */
+void before_thread_runs_arch(void)
+{
+    tlb_invalidate_all();
+    asm volatile (
+        "mtsprg0 %0\n"
+        :
+        : "r" (KA2PA(&THREAD->kstack[THREAD_STACK_SIZE - SP_DELTA]))
+    );
+}
+void after_thread_ran_arch(void)
+{
+}
+/** @}
+ */

 /tags/0.2.0.2/kernel/arch/ppc32/src/interrupt.c
 ,0 → 1,97
+/*
+ * Copyright (C) 2006 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/** @addtogroup ppc32interrupt
+ * @{
+ */
+/** @file
+ */
+#include <interrupt.h>
+#include <arch/interrupt.h>
+#include <arch/types.h>
+#include <arch.h>
+#include <time/clock.h>
+#include <ipc/sysipc.h>
+#include <arch/drivers/pic.h>
+#include <arch/mm/tlb.h>
+void start_decrementer(void)
+{
+    asm volatile (
+        "mtdec %0\n"
+        :
+        : "r" (1000)
+    );
+}
+/** Handler of external interrupts */
+static void exception_external(int n, istate_t *istate)
+{
+    int inum;
+    while ((inum = pic_get_pending()) != -1) {
+        exc_dispatch(inum + INT_OFFSET, istate);
+        pic_ack_interrupt(inum);
+    }
+}
+static void exception_decrementer(int n, istate_t *istate)
+{
+    clock();
+    start_decrementer();
+}
+/* Initialize basic tables for exception dispatching */
+void interrupt_init(void)
+{
+    exc_register(VECTOR_DATA_STORAGE, "data_storage", pht_refill);
+    exc_register(VECTOR_INSTRUCTION_STORAGE, "instruction_storage", pht_refill);
+    exc_register(VECTOR_EXTERNAL, "external", exception_external);
+    exc_register(VECTOR_DECREMENTER, "timer", exception_decrementer);
+}
+static void ipc_int(int n, istate_t *istate)
+{
+    ipc_irq_send_notif(n - INT_OFFSET);
+}
+/* Reregister irq to be IPC-ready */
+void irq_ipc_bind_arch(__native irq)
+{
+    int_register(irq, "ipc_int", ipc_int);
+}
+/** @}
+ */

 /tags/0.2.0.2/kernel/arch/ppc32/src/ddi/ddi.c
 ,0 → 1,57
+/*
+ * Copyright (C) 2006 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup ppc32ddi
+ * @{
+ */
+/** @file
+ */
+#include <ddi/ddi.h>
+#include <proc/task.h>
+#include <arch/types.h>
+#include <typedefs.h>
+/** Enable I/O space range for task.
+ *
+ * Interrupts are disabled and task is locked.
+ *
+ * @param task Task.
+ * @param ioaddr Startign I/O space address.
+ * @param size Size of the enabled I/O range.
+ *
+ * @return 0 on success or an error code from errno.h.
+ */
+int ddi_iospace_enable_arch(task_t *task, __address ioaddr, size_t size)
+{
+    return 0;
+}
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/ppc32/src/boot/boot.S
 ,0 → 1,81
+#
+# Copyright (C) 2005 Jakub Jermar
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# - Redistributions of source code must retain the above copyright
+#   notice, this list of conditions and the following disclaimer.
+# - Redistributions in binary form must reproduce the above copyright
+#   notice, this list of conditions and the following disclaimer in the
+#   documentation and/or other materials provided with the distribution.
+# - The name of the author may not be used to endorse or promote products
+#   derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+#include <arch/asm/regname.h>
+#include <arch/boot/boot.h>
+.section K_TEXT_START, "ax"
+.global kernel_image_start
+kernel_image_start:
+    # load temporal kernel stack
+    lis sp, kernel_stack@ha
+    addi sp, sp, kernel_stack@l
+    # set kernel stack for interrupt handling
+    mr r31, sp
+    subis r31, r31, 0x8000
+    mtsprg0 r31
+    # r3 contains physical address of bootinfo_t
+    # r4 contains size of bootinfo_t
+    cmpwi r4, 0
+    beq bootinfo_end
+    addis r3, r3, 0x8000
+    lis r31, bootinfo@ha
+    addi r31, r31, bootinfo@l  # r31 = bootinfo
+    bootinfo_loop:
+        lwz r30, 0(r3)
+        stw r30, 0(r31)
+        addi r3, r3, 4
+        addi r31, r31, 4
+        subi r4, r4, 4
+        cmpwi r4, 0
+        bgt bootinfo_loop
+    bootinfo_end:
+    bl arch_pre_main
+    b main_bsp
+.section K_DATA_START, "aw", @progbits
+.align 12
+kernel_stack_bottom:
+    .space TEMP_STACK_SIZE
+kernel_stack:

 /tags/0.2.0.2/kernel/arch/ppc32/src/asm.S
 ,0 → 1,311
+#
+# Copyright (C) 2005 Martin Decky
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# - Redistributions of source code must retain the above copyright
+#   notice, this list of conditions and the following disclaimer.
+# - Redistributions in binary form must reproduce the above copyright
+#   notice, this list of conditions and the following disclaimer in the
+#   documentation and/or other materials provided with the distribution.
+# - The name of the author may not be used to endorse or promote products
+#   derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+#include <arch/asm/regname.h>
+.text
+.global userspace_asm
+.global iret
+.global iret_syscall
+.global memsetb
+.global memcpy
+.global memcpy_from_uspace
+.global memcpy_to_uspace
+.global memcpy_from_uspace_failover_address
+.global memcpy_to_uspace_failover_address
+userspace_asm:
+    # r3 = uspace_uarg
+    # r4 = stack
+    # r5 = entry
+    # disable interrupts
+    mfmsr r31
+    rlwinm r31, r31, 0, 17, 15
+    mtmsr r31
+    # set entry point
+    mtsrr0 r5
+    # set problem state, enable interrupts
+    ori r31, r31, msr_pr
+    ori r31, r31, msr_ee
+    mtsrr1 r31
+    # set stack
+    mr sp, r4
+    # jump to userspace
+    rfi
+iret:
+    # disable interrupts
+    mfmsr r31
+    rlwinm r31, r31, 0, 17, 15
+    mtmsr r31
+    lwz r0, 8(sp)
+    lwz r2, 12(sp)
+    lwz r3, 16(sp)
+    lwz r4, 20(sp)
+    lwz r5, 24(sp)
+    lwz r6, 28(sp)
+    lwz r7, 32(sp)
+    lwz r8, 36(sp)
+    lwz r9, 40(sp)
+    lwz r10, 44(sp)
+    lwz r11, 48(sp)
+    lwz r13, 52(sp)
+    lwz r14, 56(sp)
+    lwz r15, 60(sp)
+    lwz r16, 64(sp)
+    lwz r17, 68(sp)
+    lwz r18, 72(sp)
+    lwz r19, 76(sp)
+    lwz r20, 80(sp)
+    lwz r21, 84(sp)
+    lwz r22, 88(sp)
+    lwz r23, 92(sp)
+    lwz r24, 96(sp)
+    lwz r25, 100(sp)
+    lwz r26, 104(sp)
+    lwz r27, 108(sp)
+    lwz r28, 112(sp)
+    lwz r29, 116(sp)
+    lwz r30, 120(sp)
+    lwz r31, 124(sp)
+    lwz r12, 128(sp)
+    mtcr r12
+    lwz r12, 132(sp)
+    mtsrr0 r12
+    lwz r12, 136(sp)
+    mtsrr1 r12
+    lwz r12, 140(sp)
+    mtlr r12
+    lwz r12, 144(sp)
+    mtctr r12
+    lwz r12, 148(sp)
+    mtxer r12
+    lwz r12, 152(sp)
+    lwz sp, 156(sp)
+    rfi
+iret_syscall:
+    # reset decrementer
+    li r31, 1000
+    mtdec r31
+    # disable interrupts
+    mfmsr r31
+    rlwinm r31, r31, 0, 17, 15
+    mtmsr r31
+    lwz r0, 8(sp)
+    lwz r2, 12(sp)
+    lwz r4, 20(sp)
+    lwz r5, 24(sp)
+    lwz r6, 28(sp)
+    lwz r7, 32(sp)
+    lwz r8, 36(sp)
+    lwz r9, 40(sp)
+    lwz r10, 44(sp)
+    lwz r11, 48(sp)
+    lwz r13, 52(sp)
+    lwz r14, 56(sp)
+    lwz r15, 60(sp)
+    lwz r16, 64(sp)
+    lwz r17, 68(sp)
+    lwz r18, 72(sp)
+    lwz r19, 76(sp)
+    lwz r20, 80(sp)
+    lwz r21, 84(sp)
+    lwz r22, 88(sp)
+    lwz r23, 92(sp)
+    lwz r24, 96(sp)
+    lwz r25, 100(sp)
+    lwz r26, 104(sp)
+    lwz r27, 108(sp)
+    lwz r28, 112(sp)
+    lwz r29, 116(sp)
+    lwz r30, 120(sp)
+    lwz r31, 124(sp)
+    lwz r12, 128(sp)
+    mtcr r12
+    lwz r12, 132(sp)
+    mtsrr0 r12
+    lwz r12, 136(sp)
+    mtsrr1 r12
+    lwz r12, 140(sp)
+    mtlr r12
+    lwz r12, 144(sp)
+    mtctr r12
+    lwz r12, 148(sp)
+    mtxer r12
+    lwz r12, 152(sp)
+    lwz sp, 156(sp)
+    rfi
+memsetb:
+    rlwimi r5, r5, 8, 16, 23
+    rlwimi r5, r5, 16, 0, 15
+    addi r14, r3, -4
+    cmplwi 0, r4, 4
+    blt 7f
+    stwu r5, 4(r14)
+    beqlr
+    andi. r15, r14, 3
+    add r4, r15, r4
+    subf r14, r15, r14
+    srwi r15, r4, 2
+    mtctr r15
+    bdz 6f
+:
+        stwu r5, 4(r14)
+        bdnz 1b
+:
+    andi. r4, r4, 3
+:
+    cmpwi 0, r4, 0
+    beqlr
+    mtctr r4
+    addi r6, r6, 3
+:
+    stbu r5, 1(r14)
+    bdnz 8b
+    blr
+memcpy:
+memcpy_from_uspace:
+memcpy_to_uspace:
+    srwi. r7, r5, 3
+    addi r6, r3, -4
+    addi r4, r4, -4
+    beq 2f
+    andi. r0, r6, 3
+    mtctr r7
+    bne 5f
+:
+    lwz r7, 4(r4)
+    lwzu r8, 8(r4)
+    stw r7, 4(r6)
+    stwu r8, 8(r6)
+    bdnz 1b
+    andi. r5, r5, 7
+:
+    cmplwi 0, r5, 4
+    blt 3f
+    lwzu r0, 4(r4)
+    addi r5, r5, -4
+    stwu r0, 4(r6)
+:
+    cmpwi 0, r5, 0
+    beqlr
+    mtctr r5
+    addi r4, r4, 3
+    addi r6, r6, 3
+:
+    lbzu r0, 1(r4)
+    stbu r0, 1(r6)
+    bdnz 4b
+    blr
+:
+    subfic r0, r0, 4
+    mtctr r0
+:
+    lbz r7, 4(r4)
+    addi r4, r4, 1
+    stb r7, 4(r6)
+    addi r6, r6, 1
+    bdnz 6b
+    subf r5, r0, r5
+    rlwinm. r7, r5, 32-3, 3, 31
+    beq 2b
+    mtctr r7
+    b 1b
+memcpy_from_uspace_failover_address:
+memcpy_to_uspace_failover_address:
+    b memcpy_from_uspace_failover_address

 /tags/0.2.0.2/kernel/arch/ppc32/src/dummy.s
 ,0 → 1,38
+#
+# Copyright (C) 2005 Jakub Jermar
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# - Redistributions of source code must retain the above copyright
+#   notice, this list of conditions and the following disclaimer.
+# - Redistributions in binary form must reproduce the above copyright
+#   notice, this list of conditions and the following disclaimer in the
+#   documentation and/or other materials provided with the distribution.
+# - The name of the author may not be used to endorse or promote products
+#   derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+.text
+.global asm_delay_loop
+.global sys_tls_set
+sys_tls_set:
+    b sys_tls_set
+asm_delay_loop:
+    blr

 /tags/0.2.0.2/kernel/arch/ppc32/src/fpu_context.S
 ,0 → 1,105
+#
+# Copyright (C) 2006 Martin Decky
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# - Redistributions of source code must retain the above copyright
+#   notice, this list of conditions and the following disclaimer.
+# - Redistributions in binary form must reproduce the above copyright
+#   notice, this list of conditions and the following disclaimer in the
+#   documentation and/or other materials provided with the distribution.
+# - The name of the author may not be used to endorse or promote products
+#   derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+#include <arch/asm/regname.h>
+#include <arch/context_offset.h>
+.text
+.global fpu_context_save
+.global fpu_context_restore
+.global fpu_init
+.global fpu_enable
+.global fpu_disable
+.macro FPU_CONTEXT_STORE r
+    stfd fr14, OFFSET_FR14(\r)
+    stfd fr15, OFFSET_FR15(\r)
+    stfd fr16, OFFSET_FR16(\r)
+    stfd fr17, OFFSET_FR17(\r)
+    stfd fr18, OFFSET_FR18(\r)
+    stfd fr19, OFFSET_FR19(\r)
+    stfd fr20, OFFSET_FR20(\r)
+    stfd fr21, OFFSET_FR21(\r)
+    stfd fr22, OFFSET_FR22(\r)
+    stfd fr23, OFFSET_FR23(\r)
+    stfd fr24, OFFSET_FR24(\r)
+    stfd fr25, OFFSET_FR25(\r)
+    stfd fr26, OFFSET_FR26(\r)
+    stfd fr27, OFFSET_FR27(\r)
+    stfd fr28, OFFSET_FR28(\r)
+    stfd fr29, OFFSET_FR29(\r)
+    stfd fr30, OFFSET_FR30(\r)
+    stfd fr31, OFFSET_FR31(\r)
+.endm
+.macro FPU_CONTEXT_LOAD r
+    lfd fr14, OFFSET_FR14(\r)
+    lfd fr15, OFFSET_FR15(\r)
+    lfd fr16, OFFSET_FR16(\r)
+    lfd fr17, OFFSET_FR17(\r)
+    lfd fr18, OFFSET_FR18(\r)
+    lfd fr19, OFFSET_FR19(\r)
+    lfd fr20, OFFSET_FR20(\r)
+    lfd fr21, OFFSET_FR21(\r)
+    lfd fr22, OFFSET_FR22(\r)
+    lfd fr23, OFFSET_FR23(\r)
+    lfd fr24, OFFSET_FR24(\r)
+    lfd fr25, OFFSET_FR25(\r)
+    lfd fr26, OFFSET_FR26(\r)
+    lfd fr27, OFFSET_FR27(\r)
+    lfd fr28, OFFSET_FR28(\r)
+    lfd fr29, OFFSET_FR29(\r)
+    lfd fr30, OFFSET_FR30(\r)
+    lfd fr31, OFFSET_FR31(\r)
+.endm
+fpu_context_save:
+//  FPU_CONTEXT_STORE r3
+//
+//  mffs fr0
+//  stfd fr0, OFFSET_FPSCR(r3)
+    blr
+fpu_context_restore:
+//  FPU_CONTEXT_LOAD r3
+//
+//  lfd fr0, OFFSET_FPSCR(r3)
+//  mtfsf 7, fr0
+    blr
+fpu_init:
+    blr
+fpu_enable:
+    blr
+fpu_disable:
+    blr

 /tags/0.2.0.2/kernel/arch/ppc32/src/context.S
 ,0 → 1,109
+#
+# Copyright (C) 2005 Martin Decky
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# - Redistributions of source code must retain the above copyright
+#   notice, this list of conditions and the following disclaimer.
+# - Redistributions in binary form must reproduce the above copyright
+#   notice, this list of conditions and the following disclaimer in the
+#   documentation and/or other materials provided with the distribution.
+# - The name of the author may not be used to endorse or promote products
+#   derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+#include <arch/asm/regname.h>
+#include <arch/context_offset.h>
+.text
+.global context_save_arch
+.global context_restore_arch
+.macro CONTEXT_STORE r
+    stw sp, OFFSET_SP(\r)
+    stw r2, OFFSET_R2(\r)
+    stw r13, OFFSET_R13(\r)
+    stw r14, OFFSET_R14(\r)
+    stw r15, OFFSET_R15(\r)
+    stw r16, OFFSET_R16(\r)
+    stw r17, OFFSET_R17(\r)
+    stw r18, OFFSET_R18(\r)
+    stw r19, OFFSET_R19(\r)
+    stw r20, OFFSET_R20(\r)
+    stw r21, OFFSET_R21(\r)
+    stw r22, OFFSET_R22(\r)
+    stw r23, OFFSET_R23(\r)
+    stw r24, OFFSET_R24(\r)
+    stw r25, OFFSET_R25(\r)
+    stw r26, OFFSET_R26(\r)
+    stw r27, OFFSET_R27(\r)
+    stw r28, OFFSET_R28(\r)
+    stw r29, OFFSET_R29(\r)
+    stw r30, OFFSET_R30(\r)
+    stw r31, OFFSET_R31(\r)
+.endm
+.macro CONTEXT_LOAD r
+    lwz sp, OFFSET_SP(\r)
+    lwz r2, OFFSET_R2(\r)
+    lwz r13, OFFSET_R13(\r)
+    lwz r14, OFFSET_R14(\r)
+    lwz r15, OFFSET_R15(\r)
+    lwz r16, OFFSET_R16(\r)
+    lwz r17, OFFSET_R17(\r)
+    lwz r18, OFFSET_R18(\r)
+    lwz r19, OFFSET_R19(\r)
+    lwz r20, OFFSET_R20(\r)
+    lwz r21, OFFSET_R21(\r)
+    lwz r22, OFFSET_R22(\r)
+    lwz r23, OFFSET_R23(\r)
+    lwz r24, OFFSET_R24(\r)
+    lwz r25, OFFSET_R25(\r)
+    lwz r26, OFFSET_R26(\r)
+    lwz r27, OFFSET_R27(\r)
+    lwz r28, OFFSET_R28(\r)
+    lwz r29, OFFSET_R29(\r)
+    lwz r30, OFFSET_R30(\r)
+    lwz r31, OFFSET_R31(\r)
+.endm
+context_save_arch:
+    CONTEXT_STORE r3
+    mflr r4
+    stw r4, OFFSET_PC(r3)
+    mfcr r4
+    stw r4, OFFSET_CR(r3)
+    # context_save returns 1
+    li r3, 1
+    blr
+context_restore_arch:
+    CONTEXT_LOAD r3
+    lwz r4, OFFSET_CR(r3)
+    mtcr r4
+    lwz r4, OFFSET_PC(r3)
+    mtlr r4
+    # context_restore returns 0
+    li r3, 0
+    blr

 /tags/0.2.0.2/kernel/arch/ppc32/src/debug/panic.s
 ,0 → 1,38
+#
+# Copyright (C) 2005 Martin Decky
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# - Redistributions of source code must retain the above copyright
+#   notice, this list of conditions and the following disclaimer.
+# - Redistributions in binary form must reproduce the above copyright
+#   notice, this list of conditions and the following disclaimer in the
+#   documentation and/or other materials provided with the distribution.
+# - The name of the author may not be used to endorse or promote products
+#   derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+#include <arch/asm/macro.h>
+.text
+.global panic_printf
+panic_printf:
+    lis %r14, halt@ha
+    addi %r14, %r14, halt@l
+    mtlr %r14   # fake stack to make printf return to halt
+    b printf

 /tags/0.2.0.2/kernel/arch/ppc32/include/asm/regname.h
 ,0 → 1,231
+/*
+ * Copyright (C) 2005 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/** @addtogroup ppc32
+ * @{
+ */
+/** @file
+ */
+#ifndef __ppc32_REGNAME_H__
+#define __ppc32_REGNAME_H__
+/* Condition Register Bit Fields */
+#define cr0 0
+#define cr1 1
+#define cr2 2
+#define cr3 3
+#define cr4 4
+#define cr5 5
+#define cr6 6
+#define cr7 7
+/* General Purpose Registers (GPRs) */
+#define r0  0
+#define r1  1
+#define r2  2
+#define r3  3
+#define r4  4
+#define r5  5
+#define r6  6
+#define r7  7
+#define r8  8
+#define r9  9
+#define r10 10
+#define r11 11
+#define r12 12
+#define r13 13
+#define r14 14
+#define r15 15
+#define r16 16
+#define r17 17
+#define r18 18
+#define r19 19
+#define r20 20
+#define r21 21
+#define r22 22
+#define r23 23
+#define r24 24
+#define r25 25
+#define r26 26
+#define r27 27
+#define r28 28
+#define r29 29
+#define r30 30
+#define r31 31
+/* GPR Aliases */
+#define sp  1
+/* Floating Point Registers (FPRs) */
+#define fr0     0
+#define fr1     1
+#define fr2     2
+#define fr3     3
+#define fr4     4
+#define fr5     5
+#define fr6     6
+#define fr7     7
+#define fr8     8
+#define fr9     9
+#define fr10    10
+#define fr11    11
+#define fr12    12
+#define fr13    13
+#define fr14    14
+#define fr15    15
+#define fr16    16
+#define fr17    17
+#define fr18    18
+#define fr19    19
+#define fr20    20
+#define fr21    21
+#define fr22    22
+#define fr23    23
+#define fr24    24
+#define fr25    25
+#define fr26    26
+#define fr27    27
+#define fr28    28
+#define fr29    29
+#define fr30    30
+#define fr31    31
+#define vr0     0
+#define vr1     1
+#define vr2     2
+#define vr3     3
+#define vr4     4
+#define vr5     5
+#define vr6     6
+#define vr7     7
+#define vr8     8
+#define vr9     9
+#define vr10    10
+#define vr11    11
+#define vr12    12
+#define vr13    13
+#define vr14    14
+#define vr15    15
+#define vr16    16
+#define vr17    17
+#define vr18    18
+#define vr19    19
+#define vr20    20
+#define vr21    21
+#define vr22    22
+#define vr23    23
+#define vr24    24
+#define vr25    25
+#define vr26    26
+#define vr27    27
+#define vr28    28
+#define vr29    29
+#define vr30    30
+#define vr31    31
+#define evr0    0
+#define evr1    1
+#define evr2    2
+#define evr3    3
+#define evr4    4
+#define evr5    5
+#define evr6    6
+#define evr7    7
+#define evr8    8
+#define evr9    9
+#define evr10   10
+#define evr11   11
+#define evr12   12
+#define evr13   13
+#define evr14   14
+#define evr15   15
+#define evr16   16
+#define evr17   17
+#define evr18   18
+#define evr19   19
+#define evr20   20
+#define evr21   21
+#define evr22   22
+#define evr23   23
+#define evr24   24
+#define evr25   25
+#define evr26   26
+#define evr27   27
+#define evr28   28
+#define evr29   29
+#define evr30   30
+#define evr31   31
+/* Special Purpose Registers (SPRs) */
+#define xer     1
+#define lr      8
+#define ctr     9
+#define dec     22
+#define sdr1    25
+#define srr0    26
+#define srr1    27
+#define sprg0   272
+#define sprg1   273
+#define sprg2   274
+#define sprg3   275
+#define prv     287
+#define ibat0u  528
+#define ibat0l  529
+#define ibat1u  530
+#define ibat1l  531
+#define ibat2u  532
+#define ibat2l  533
+#define ibat3u  534
+#define ibat3l  535
+#define dbat0u  536
+#define dbat0l  537
+#define dbat1u  538
+#define dbat1l  539
+#define dbat2u  540
+#define dbat2l  541
+#define dbat3u  542
+#define dbat3l  543
+#define hid0    1008
+/* MSR bits */
+#define msr_ir  (1 << 4)
+#define msr_dr  (1 << 5)
+#define msr_pr  (1 << 14)
+#define msr_ee  (1 << 15)
+/* HID0 bits */
+#define hid0_ice    (1 << 15)
+#define hid0_dce    (1 << 14)
+#define hid0_icfi   (1 << 11)
+#define hid0_dci    (1 << 10)
+#endif
+/** @}
+ */

 /tags/0.2.0.2/kernel/arch/ppc32/include/drivers/cuda.h
 ,0 → 1,51
+/*
+ * Copyright (C) 2006 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/** @addtogroup ppc32
+ * @{
+ */
+/** @file
+ */
+#ifndef __CUDA_H__
+#define __CUDA_H__
+#include <arch/types.h>
+#include <typedefs.h>
+#define CUDA_IRQ 10
+extern void cuda_init(__address base, size_t size);
+extern int cuda_get_scancode(void);
+extern void cuda_grab(void);
+extern void cuda_release(void);
+#endif
+/** @}
+ */

 /tags/0.2.0.2/kernel/arch/ppc32/include/drivers/pic.h
 ,0 → 1,58
+/*
+ * Copyright (C) 2006 Ondrej Palkovsky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup ppc32
+ * @{
+ */
+/** @file
+ */
+#ifndef __PIC_H_
+#define __PIC_H_
+/* PIC handler, read from pearpc source codes */
+#define PIC_HW_ADDR 0x80800000
+#define PIC_PENDING_LOW    8
+#define PIC_PENDING_HIGH   4
+#define PIC_MASK_LOW       9
+#define PIC_MASK_HIGH      5
+#define PIC_ACK_LOW        10
+#define PIC_ACK_HIGH       6
+void pic_init(void);
+void pic_enable_interrupt(int intnum);
+void pic_disable_interrupt(int intnum);
+void pic_ack_interrupt(int intnum);
+int pic_get_pending(void);
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/ppc32/include/cpuid.h
 ,0 → 1,56
+/*
+ * Copyright (C) 2006 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/** @addtogroup ppc32
+ * @{
+ */
+/** @file
+ */
+#ifndef __ppc32_CPUID_H__
+#define __ppc32_CPUID_H__
+#include <arch/types.h>
+struct cpu_info {
+    __u16 version;
+    __u16 revision;
+} __attribute__ ((packed));
+static inline void cpu_version(struct cpu_info *info)
+{
+    asm volatile (
+        "mfpvr %0\n"
+        : "=r" (*info)
+    );
+}
+#endif
+/** @}
+ */

 /tags/0.2.0.2/kernel/arch/ppc32/include/cpu.h
 ,0 → 1,48
+/*
+ * Copyright (C) 2005 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/** @addtogroup ppc32
+ * @{
+ */
+/** @file
+ */
+#ifndef __ppc32_CPU_H__
+#define __ppc32_CPU_H__
+#include <typedefs.h>
+struct cpu_arch {
+    int version;
+    int revision;
+};
+#endif
+/** @}
+ */

 /tags/0.2.0.2/kernel/arch/ppc32/include/interrupt.h
 ,0 → 1,60
+/*
+ * Copyright (C) 2005 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/** @addtogroup ppc32interrupt
+ * @{
+ */
+/** @file
+ */
+#ifndef __ppc32_INTERRUPT_H__
+#define __ppc32_INTERRUPT_H__
+#include <arch/exception.h>
+#define IRQ_COUNT   64
+#define IVT_ITEMS   (16 + IRQ_COUNT)
+#define INT_OFFSET  16
+#define int_register(it, name, handler) exc_register(((it) + INT_OFFSET), name, handler)
+#define VECTOR_DATA_STORAGE 2
+#define VECTOR_INSTRUCTION_STORAGE 3
+#define VECTOR_EXTERNAL 4
+#define VECTOR_DECREMENTER 8
+extern void start_decrementer(void);
+extern void interrupt_init(void);
+extern void extint_handler(int n, istate_t *istate);
+#endif
+/** @}
+ */

 /tags/0.2.0.2/kernel/arch/ppc32/include/exception.h
 ,0 → 1,104
+/*
+ * Copyright (C) 2006 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/** @addtogroup ppc32
+ * @{
+ */
+/** @file
+ */
+#ifndef __ppc32_EXCEPTION_H__
+#define __ppc32_EXCEPTION_H__
+#ifndef __ppc32_TYPES_H__
+#  include <arch/types.h>
+#endif
+#include <typedefs.h>
+struct istate {
+    __u32 r0;
+    __u32 r2;
+    __u32 r3;
+    __u32 r4;
+    __u32 r5;
+    __u32 r6;
+    __u32 r7;
+    __u32 r8;
+    __u32 r9;
+    __u32 r10;
+    __u32 r11;
+    __u32 r13;
+    __u32 r14;
+    __u32 r15;
+    __u32 r16;
+    __u32 r17;
+    __u32 r18;
+    __u32 r19;
+    __u32 r20;
+    __u32 r21;
+    __u32 r22;
+    __u32 r23;
+    __u32 r24;
+    __u32 r25;
+    __u32 r26;
+    __u32 r27;
+    __u32 r28;
+    __u32 r29;
+    __u32 r30;
+    __u32 r31;
+    __u32 cr;
+    __u32 pc;
+    __u32 srr1;
+    __u32 lr;
+    __u32 ctr;
+    __u32 xer;
+    __u32 r12;
+    __u32 sp;
+};
+static inline void istate_set_retaddr(istate_t *istate, __address retaddr)
+{
+    istate->pc = retaddr;
+}
+/** Return true if exception happened while in userspace */
+#include <panic.h>
+static inline int istate_from_uspace(istate_t *istate)
+{
+    panic("istate_from_uspace not yet implemented");
+    return 0;
+}
+static inline __native istate_get_pc(istate_t *istate)
+{
+    return istate->pc;
+}
+#endif
+/** @}
+ */

 /tags/0.2.0.2/kernel/arch/ppc32/include/types.h
 ,0 → 1,69
+/*
+ * Copyright (C) 2005 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/** @addtogroup ppc32
+ * @{
+ */
+/** @file
+ */
+#ifndef __ppc32_TYPES_H__
+#define __ppc32_TYPES_H__
+#define NULL 0
+typedef signed char __s8;
+typedef signed short __s16;
+typedef signed int __s32;
+typedef signed long long __s64;
+typedef unsigned char __u8;
+typedef unsigned short __u16;
+typedef unsigned int __u32;
+typedef unsigned long long __u64;
+typedef __u32 __address;
+typedef __u32 pfn_t;
+typedef __u32 ipl_t;
+typedef __u32 __native;
+/** Page Table Entry. */
+typedef struct {
+    unsigned p : 1;       /**< Present bit. */
+    unsigned a : 1;       /**< Accessed bit. */
+    unsigned g : 1;       /**< Global bit. */
+    unsigned valid : 1;   /**< Valid content even if not present. */
+    unsigned pfn : 20;    /**< Physical frame number. */
+} pte_t;
+#endif
+/** @}
+ */

 /tags/0.2.0.2/kernel/arch/ppc32/include/boot/boot.h
 ,0 → 1,98
+/*
+ * Copyright (C) 2006 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/** @addtogroup ppc32
+ * @{
+ */
+/** @file
+ */
+#ifndef __ppc32_BOOT_H__
+#define __ppc32_BOOT_H__
+#define BOOT_OFFSET     0x8000
+/* Temporary stack size for boot process */
+#define TEMP_STACK_SIZE 0x100
+#define TASKMAP_MAX_RECORDS 32
+#define MEMMAP_MAX_RECORDS 32
+#ifndef __ASM__
+#include <arch/types.h>
+typedef struct {
+    __address addr;
+    __u32 size;
+} utask_t;
+typedef struct {
+    __u32 count;
+    utask_t tasks[TASKMAP_MAX_RECORDS];
+} taskmap_t;
+typedef struct {
+    __address start;
+    __u32 size;
+} memzone_t;
+typedef struct {
+    __u32 total;
+    __u32 count;
+    memzone_t zones[MEMMAP_MAX_RECORDS];
+} memmap_t;
+typedef struct {
+    __address addr;
+    unsigned int width;
+    unsigned int height;
+    unsigned int bpp;
+    unsigned int scanline;
+} screen_t;
+typedef struct {
+    __address addr;
+    unsigned int size;
+} keyboard_t;
+typedef struct {
+    memmap_t memmap;
+    taskmap_t taskmap;
+    screen_t screen;
+    keyboard_t keyboard;
+} bootinfo_t;
+extern bootinfo_t bootinfo;
+#endif
+#endif
+/** @}
+ */

 /tags/0.2.0.2/kernel/arch/ppc32/include/arch.h
 ,0 → 1,43
+/*
+ * Copyright (C) 2005 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/** @addtogroup ppc32
+ * @{
+ */
+/** @file
+ */
+#ifndef __ppc32_ARCH_H__
+#define __ppc32_ARCH_H__
+#include <arch/drivers/cuda.h>
+#endif
+/** @}
+ */

 /tags/0.2.0.2/kernel/arch/ppc32/include/mm/frame.h
 ,0 → 1,56
+/*
+ * Copyright (C) 2005 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/** @addtogroup ppc32mm
+ * @{
+ */
+/** @file
+ */
+#ifndef __ppc32_FRAME_H__
+#define __ppc32_FRAME_H__
+#define FRAME_WIDTH     12  /* 4K */
+#define FRAME_SIZE      (1 << FRAME_WIDTH)
+#ifdef KERNEL
+#ifndef __ASM__
+#include <arch/types.h>
+extern __address last_frame;
+extern void frame_arch_init(void);
+#endif /* __ASM__ */
+#endif /* KERNEL */
+#endif
+/** @}
+ */

 /tags/0.2.0.2/kernel/arch/ppc32/include/mm/memory_init.h
 ,0 → 1,47
+/*
+ * Copyright (C) 2005 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/** @addtogroup ppc32mm
+ * @{
+ */
+/** @file
+ */
+#ifndef __ppc32_MEMORY_INIT_H__
+#define __ppc32_MEMORY_INIT_H__
+#include <typedefs.h>
+size_t get_memory_size(void);
+void memory_print_map(void);
+#endif
+/** @}
+ */

 /tags/0.2.0.2/kernel/arch/ppc32/include/mm/page.h
 ,0 → 1,142
+/*
+ * Copyright (C) 2005 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/** @addtogroup ppc32mm
+ * @{
+ */
+/** @file
+ */
+#ifndef __ppc32_PAGE_H__
+#define __ppc32_PAGE_H__
+#include <arch/mm/frame.h>
+#define PAGE_WIDTH  FRAME_WIDTH
+#define PAGE_SIZE   FRAME_SIZE
+#ifdef KERNEL
+#ifndef __ASM__
+#   define KA2PA(x) (((__address) (x)) - 0x80000000)
+#   define PA2KA(x) (((__address) (x)) + 0x80000000)
+#else
+#   define KA2PA(x) ((x) - 0x80000000)
+#   define PA2KA(x) ((x) + 0x80000000)
+#endif
+/*
+ * Implementation of generic 4-level page table interface,
+ * the hardware Page Hash Table is used as cache.
+ *
+ * Page table layout:
+ * - 32-bit virtual addressess
+ * - Offset is 12 bits => pages are 4K long
+ * - PTL0 has 1024 entries (10 bits)
+ * - PTL1 is not used
+ * - PTL2 is not used
+ * - PLT3 has 1024 entries (10 bits)
+ */
+#define PTL0_ENTRIES_ARCH   1024
+#define PTL1_ENTRIES_ARCH   0
+#define PTL2_ENTRIES_ARCH   0
+#define PTL3_ENTRIES_ARCH   1024
+#define PTL0_INDEX_ARCH(vaddr)  (((vaddr) >> 22) & 0x3ff)
+#define PTL1_INDEX_ARCH(vaddr)  0
+#define PTL2_INDEX_ARCH(vaddr)  0
+#define PTL3_INDEX_ARCH(vaddr)  (((vaddr) >> 12) & 0x3ff)
+#define GET_PTL1_ADDRESS_ARCH(ptl0, i)      (((pte_t *) (ptl0))[(i)].pfn << 12)
+#define GET_PTL2_ADDRESS_ARCH(ptl1, i)      (ptl1)
+#define GET_PTL3_ADDRESS_ARCH(ptl2, i)      (ptl2)
+#define GET_FRAME_ADDRESS_ARCH(ptl3, i)     (((pte_t *) (ptl3))[(i)].pfn << 12)
+#define SET_PTL0_ADDRESS_ARCH(ptl0)
+#define SET_PTL1_ADDRESS_ARCH(ptl0, i, a)   (((pte_t *) (ptl0))[(i)].pfn = (a) >> 12)
+#define SET_PTL2_ADDRESS_ARCH(ptl1, i, a)
+#define SET_PTL3_ADDRESS_ARCH(ptl2, i, a)
+#define SET_FRAME_ADDRESS_ARCH(ptl3, i, a)  (((pte_t *) (ptl3))[(i)].pfn = (a) >> 12)
+#define GET_PTL1_FLAGS_ARCH(ptl0, i)        get_pt_flags((pte_t *) (ptl0), (index_t) (i))
+#define GET_PTL2_FLAGS_ARCH(ptl1, i)        PAGE_PRESENT
+#define GET_PTL3_FLAGS_ARCH(ptl2, i)        PAGE_PRESENT
+#define GET_FRAME_FLAGS_ARCH(ptl3, i)       get_pt_flags((pte_t *) (ptl3), (index_t) (i))
+#define SET_PTL1_FLAGS_ARCH(ptl0, i, x)     set_pt_flags((pte_t *) (ptl0), (index_t) (i), (x))
+#define SET_PTL2_FLAGS_ARCH(ptl1, i, x)
+#define SET_PTL3_FLAGS_ARCH(ptl2, i, x)
+#define SET_FRAME_FLAGS_ARCH(ptl3, i, x)    set_pt_flags((pte_t *) (ptl3), (index_t) (i), (x))
+#define PTE_VALID_ARCH(pte)         (*((__u32 *) (pte)) != 0)
+#define PTE_PRESENT_ARCH(pte)           ((pte)->p != 0)
+#define PTE_GET_FRAME_ARCH(pte)         ((pte)->pfn << 12)
+#define PTE_WRITABLE_ARCH(pte)          1
+#define PTE_EXECUTABLE_ARCH(pte)        1
+#ifndef __ASM__
+#include <mm/page.h>
+#include <arch/mm/frame.h>
+#include <arch/types.h>
+static inline int get_pt_flags(pte_t *pt, index_t i)
+{
+    pte_t *p = &pt[i];
+    return (
+        (1 << PAGE_CACHEABLE_SHIFT) |
+        ((!p->p) << PAGE_PRESENT_SHIFT) |
+        (1 << PAGE_USER_SHIFT) |
+        (1 << PAGE_READ_SHIFT) |
+        (1 << PAGE_WRITE_SHIFT) |
+        (1 << PAGE_EXEC_SHIFT) |
+        (p->g << PAGE_GLOBAL_SHIFT)
+    );
+}
+static inline void set_pt_flags(pte_t *pt, index_t i, int flags)
+{
+    pte_t *p = &pt[i];
+    p->p = !(flags & PAGE_NOT_PRESENT);
+    p->g = (flags & PAGE_GLOBAL) != 0;
+    p->valid = 1;
+}
+extern void page_arch_init(void);
+#endif /* __ASM__ */
+#endif /* KERNEL */
+#endif
+/** @}
+ */

 /tags/0.2.0.2/kernel/arch/ppc32/include/mm/asid.h
 ,0 → 1,47
+/*
+ * Copyright (C) 2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/** @addtogroup ppc32mm
+ * @{
+ */
+/** @file
+ */
+#ifndef __ppc32_ASID_H__
+#define __ppc32_ASID_H__
+#include <arch/types.h>
+#define ASID_MAX_ARCH       4096
+typedef __u32 asid_t;
+#endif
+/** @}
+ */

 /tags/0.2.0.2/kernel/arch/ppc32/include/mm/tlb.h
 ,0 → 1,59
+/*
+ * Copyright (C) 2006 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/** @addtogroup ppc32mm
+ * @{
+ */
+/** @file
+ */
+#ifndef __ppc32_TLB_H__
+#define __ppc32_TLB_H__
+typedef struct {
+    unsigned v : 1;          /**< Valid */
+    unsigned vsid : 24;      /**< Virtual Segment ID */
+    unsigned h : 1;          /**< Primary/secondary hash */
+    unsigned api : 6;        /**< Abbreviated Page Index */
+    unsigned rpn : 20;       /**< Real Page Number */
+    unsigned reserved0 : 3;
+    unsigned r : 1;          /**< Reference */
+    unsigned c : 1;          /**< Change */
+    unsigned wimg : 4;       /**< Access control */
+    unsigned reserved1 : 1;
+    unsigned pp : 2;         /**< Page protection */
+} phte_t;
+extern void pht_refill(int n, istate_t *istate);
+extern bool pht_real_refill(int n, istate_t *istate) __attribute__ ((section("K_UNMAPPED_TEXT_START")));
+extern void pht_init(void);
+#endif
+/** @}
+ */

 /tags/0.2.0.2/kernel/arch/ppc32/include/mm/as.h
 ,0 → 1,52
+/*
+ * Copyright (C) 2005 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/** @addtogroup ppc32mm
+ * @{
+ */
+/** @file
+ */
+#ifndef __ppc32_AS_H__
+#define __ppc32_AS_H__
+#define KERNEL_ADDRESS_SPACE_SHADOWED_ARCH  0
+#define KERNEL_ADDRESS_SPACE_START_ARCH     ((unsigned long) 0x80000000)
+#define KERNEL_ADDRESS_SPACE_END_ARCH       ((unsigned long) 0xffffffff)
+#define USER_ADDRESS_SPACE_START_ARCH       ((unsigned long) 0x00000000)
+#define USER_ADDRESS_SPACE_END_ARCH     ((unsigned long) 0x7fffffff)
+#define USTACK_ADDRESS_ARCH (0x7fffffff-(PAGE_SIZE-1))
+extern void as_arch_init(void);
+#endif
+/** @}
+ */

 /tags/0.2.0.2/kernel/arch/ppc32/include/debug.h
 ,0 → 1,42
+/*
+ * Copyright (C) 2005
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup ppc32debug
+ * @{
+ */
+/** @file
+ */
+#ifndef __ppc32_DEBUG_H__
+#define __ppc32_DEBUG_H__
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/ppc32/include/context_offset.h
 ,0 → 1,49
+/* This file is automatically generated by gencontext.c. */
+/* struct context */
+#define OFFSET_SP    0x0
+#define OFFSET_PC    0x4
+#define OFFSET_R2    0x8
+#define OFFSET_R13   0xc
+#define OFFSET_R14   0x10
+#define OFFSET_R15   0x14
+#define OFFSET_R16   0x18
+#define OFFSET_R17   0x1c
+#define OFFSET_R18   0x20
+#define OFFSET_R19   0x24
+#define OFFSET_R20   0x28
+#define OFFSET_R21   0x2c
+#define OFFSET_R22   0x30
+#define OFFSET_R23   0x34
+#define OFFSET_R24   0x38
+#define OFFSET_R25   0x3c
+#define OFFSET_R26   0x40
+#define OFFSET_R27   0x44
+#define OFFSET_R28   0x48
+#define OFFSET_R29   0x4c
+#define OFFSET_R30   0x50
+#define OFFSET_R31   0x54
+#define OFFSET_CR    0x58
+#define OFFSET_FR14  0x0
+#define OFFSET_FR15  0x8
+#define OFFSET_FR16  0x10
+#define OFFSET_FR17  0x18
+#define OFFSET_FR18  0x20
+#define OFFSET_FR19  0x28
+#define OFFSET_FR20  0x30
+#define OFFSET_FR21  0x38
+#define OFFSET_FR22  0x40
+#define OFFSET_FR23  0x48
+#define OFFSET_FR24  0x50
+#define OFFSET_FR25  0x58
+#define OFFSET_FR26  0x60
+#define OFFSET_FR27  0x68
+#define OFFSET_FR28  0x70
+#define OFFSET_FR29  0x78
+#define OFFSET_FR30  0x80
+#define OFFSET_FR31  0x88
+#define OFFSET_FPSCR 0x90
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/ppc32/include/fpu_context.h
 ,0 → 1,68
+/*
+ * Copyright (C) 2005 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup ppc32
+ * @{
+ */
+/** @file
+ */
+#ifndef __ppc32_FPU_CONTEXT_H__
+#define __ppc32_FPU_CONTEXT_H__
+#ifndef __ppc32_TYPES_H__
+# include <arch/types.h>
+#endif
+struct fpu_context {
+    __u64 fr14;
+    __u64 fr15;
+    __u64 fr16;
+    __u64 fr17;
+    __u64 fr18;
+    __u64 fr19;
+    __u64 fr20;
+    __u64 fr21;
+    __u64 fr22;
+    __u64 fr23;
+    __u64 fr24;
+    __u64 fr25;
+    __u64 fr26;
+    __u64 fr27;
+    __u64 fr28;
+    __u64 fr29;
+    __u64 fr30;
+    __u64 fr31;
+    __u32 fpscr;
+} __attribute__ ((packed));
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/ppc32/include/byteorder.h
 ,0 → 1,74
+/*
+ * Copyright (C) 2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup ppc32
+ * @{
+ */
+/** @file
+ */
+#ifndef __ppc32_BYTEORDER_H__
+#define __ppc32_BYTEORDER_H__
+#include <arch/types.h>
+#include <byteorder.h>
+#define BIG_ENDIAN
+static inline __u64 __u64_le2host(__u64 n)
+{
+    return __u64_byteorder_swap(n);
+}
+/** Convert little-endian __native to host __native
+ *
+ * Convert little-endian __native parameter to host endianess.
+ *
+ * @param n Little-endian __native argument.
+ *
+ * @return Result in host endianess.
+ *
+ */
+static inline __native __native_le2host(__native n)
+{
+    __address v;
+    asm volatile (
+        "lwbrx %0, %1, %2\n"
+        : "=r" (v)
+        : "i" (0), "r" (&n)
+    );
+    return v;
+}
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/ppc32/include/elf.h
 ,0 → 1,46
+/*
+ * Copyright (C) 2006 Sergey Bondari
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup ppc32
+ * @{
+ */
+/** @file
+ */
+#ifndef __ppc32_ELF_H__
+#define __ppc32_ELF_H__
+#define ELF_MACHINE     EM_PPC
+#define ELF_DATA_ENCODING   ELFDATA2MSB
+#define ELF_CLASS       ELFCLASS32
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/ppc32/include/memstr.h
 ,0 → 1,49
+/*
+ * Copyright (C) 2005 Sergey Bondari
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup ppc32
+ * @{
+ */
+/** @file
+ */
+#ifndef __ppc32_MEMSTR_H__
+#define __ppc32_MEMSTR_H__
+#define memcpy(dst, src, cnt)  __builtin_memcpy((dst), (src), (cnt))
+extern void memsetw(__address dst, size_t cnt, __u16 x);
+extern void memsetb(__address dst, size_t cnt, __u8 x);
+extern int memcmp(__address src, __address dst, int cnt);
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/ppc32/include/arg.h
 ,0 → 1,44
+/*
+ * Copyright (C) 2005 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup ppc32
+ * @{
+ */
+/** @file
+ */
+#ifndef __ppc32_ARG_H__
+#define __ppc32_ARG_H__
+#include <stdarg.h>
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/ppc32/include/atomic.h
 ,0 → 1,98
+/*
+ * Copyright (C) 2005 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup ppc32
+ * @{
+ */
+/** @file
+ */
+#ifndef __ppc32_ATOMIC_H__
+#define __ppc32_ATOMIC_H__
+static inline void atomic_inc(atomic_t *val)
+{
+    long tmp;
+    asm volatile (
+        "1:\n"
+        "lwarx %0, 0, %2\n"
+        "addic %0, %0, 1\n"
+        "stwcx. %0, 0, %2\n"
+        "bne- 1b"
+        : "=&r" (tmp), "=m" (val->count)
+        : "r" (&val->count), "m" (val->count)
+        : "cc"
+    );
+}
+static inline void atomic_dec(atomic_t *val)
+{
+    long tmp;
+    asm volatile (
+        "1:\n"
+        "lwarx %0, 0, %2\n"
+        "addic %0, %0, -1\n"
+        "stwcx. %0, 0, %2\n"
+        "bne- 1b"
+        : "=&r" (tmp), "=m" (val->count)
+        : "r" (&val->count), "m" (val->count)
+        : "cc"
+    );
+}
+static inline long atomic_postinc(atomic_t *val)
+{
+    atomic_inc(val);
+    return val->count - 1;
+}
+static inline long atomic_postdec(atomic_t *val)
+{
+    atomic_dec(val);
+    return val->count + 1;
+}
+static inline long atomic_preinc(atomic_t *val)
+{
+    atomic_inc(val);
+    return val->count;
+}
+static inline long atomic_predec(atomic_t *val)
+{
+    atomic_dec(val);
+    return val->count;
+}
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/ppc32/include/proc/task.h
 ,0 → 1,48
+/*
+ * Copyright (C) 2006 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup ppc32proc
+ * @{
+ */
+/** @file
+ */
+#ifndef __ppc32_TASK_H__
+#define __ppc32_TASK_H__
+typedef struct {
+} task_arch_t;
+#define task_create_arch(t)
+#define task_destroy_arch(t)
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/ppc32/include/proc/thread.h
 ,0 → 1,47
+/*
+ * Copyright (C) 2005 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup ppc32proc
+ * @{
+ */
+/** @file
+ */
+#ifndef __ppc32_THREAD_H__
+#define __ppc32_THREAD_H__
+typedef struct {
+} thread_arch_t;
+#define thread_create_arch(t)
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/ppc32/include/asm.h
 ,0 → 1,156
+/*
+ * Copyright (C) 2005 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup ppc32
+ * @{
+ */
+/** @file
+ */
+#ifndef __ppc32_ASM_H__
+#define __ppc32_ASM_H__
+#include <arch/types.h>
+#include <config.h>
+/** Enable interrupts.
+ *
+ * Enable interrupts and return previous
+ * value of EE.
+ *
+ * @return Old interrupt priority level.
+ */
+static inline ipl_t interrupts_enable(void)
+{
+    ipl_t v;
+    ipl_t tmp;
+    asm volatile (
+        "mfmsr %0\n"
+        "mfmsr %1\n"
+        "ori %1, %1, 1 << 15\n"
+        "mtmsr %1\n"
+        : "=r" (v), "=r" (tmp)
+    );
+    return v;
+}
+/** Disable interrupts.
+ *
+ * Disable interrupts and return previous
+ * value of EE.
+ *
+ * @return Old interrupt priority level.
+ */
+static inline ipl_t interrupts_disable(void)
+{
+    ipl_t v;
+    ipl_t tmp;
+    asm volatile (
+        "mfmsr %0\n"
+        "mfmsr %1\n"
+        "rlwinm %1, %1, 0, 17, 15\n"
+        "mtmsr %1\n"
+        : "=r" (v), "=r" (tmp)
+    );
+    return v;
+}
+/** Restore interrupt priority level.
+ *
+ * Restore EE.
+ *
+ * @param ipl Saved interrupt priority level.
+ */
+static inline void interrupts_restore(ipl_t ipl)
+{
+    ipl_t tmp;
+    asm volatile (
+        "mfmsr %1\n"
+        "rlwimi  %0, %1, 0, 17, 15\n"
+        "cmpw 0, %0, %1\n"
+        "beq 0f\n"
+        "mtmsr %0\n"
+        "0:\n"
+        : "=r" (ipl), "=r" (tmp)
+        : "0" (ipl)
+        : "cr0"
+    );
+}
+/** Return interrupt priority level.
+ *
+ * Return EE.
+ *
+ * @return Current interrupt priority level.
+ */
+static inline ipl_t interrupts_read(void)
+{
+    ipl_t v;
+    asm volatile (
+        "mfmsr %0\n"
+        : "=r" (v)
+    );
+    return v;
+}
+/** Return base address of current stack.
+ *
+ * Return the base address of the current stack.
+ * The stack is assumed to be STACK_SIZE bytes long.
+ * The stack must start on page boundary.
+ */
+static inline __address get_stack_base(void)
+{
+    __address v;
+    asm volatile (
+        "and %0, %%sp, %1\n"
+        : "=r" (v)
+        : "r" (~(STACK_SIZE - 1))
+    );
+    return v;
+}
+static inline void cpu_sleep(void)
+{
+}
+void cpu_halt(void);
+void asm_delay_loop(__u32 t);
+extern void userspace_asm(__address uspace_uarg, __address stack, __address entry);
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/ppc32/include/faddr.h
 ,0 → 1,46
+/*
+ * Copyright (C) 2005 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup ppc32
+ * @{
+ */
+/** @file
+ */
+#ifndef __ppc32_FADDR_H__
+#define __ppc32_FADDR_H__
+#include <arch/types.h>
+#define FADDR(fptr)     ((__address) (fptr))
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/ppc32/include/context.h
 ,0 → 1,78
+/*
+ * Copyright (C) 2005 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup ppc32
+ * @{
+ */
+/** @file
+ */
+#ifndef __ppc32_CONTEXT_H__
+#define __ppc32_CONTEXT_H__
+#ifndef __ppc32_TYPES_H__
+# include <arch/types.h>
+#endif
+#define SP_DELTA    16
+struct context {
+    __address sp;
+    __address pc;
+    __u32 r2;
+    __u32 r13;
+    __u32 r14;
+    __u32 r15;
+    __u32 r16;
+    __u32 r17;
+    __u32 r18;
+    __u32 r19;
+    __u32 r20;
+    __u32 r21;
+    __u32 r22;
+    __u32 r23;
+    __u32 r24;
+    __u32 r25;
+    __u32 r26;
+    __u32 r27;
+    __u32 r28;
+    __u32 r29;
+    __u32 r30;
+    __u32 r31;
+    __u32 cr;
+    ipl_t ipl;
+} __attribute__ ((packed));
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/ppc32/include/barrier.h
 ,0 → 1,49
+/*
+ * Copyright (C) 2005 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup ppc32
+ * @{
+ */
+/** @file
+ */
+#ifndef __ppc32_BARRIER_H__
+#define __ppc32_BARRIER_H__
+#define CS_ENTER_BARRIER()  asm volatile ("" ::: "memory")
+#define CS_LEAVE_BARRIER()  asm volatile ("" ::: "memory")
+#define memory_barrier() asm volatile ("sync" ::: "memory")
+#define read_barrier() asm volatile ("sync" ::: "memory")
+#define write_barrier() asm volatile ("eieio" ::: "memory")
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/ppc32/Makefile.inc
 ,0 → 1,88
+#
+# Copyright (C) 2005 Martin Decky
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# - Redistributions of source code must retain the above copyright
+#   notice, this list of conditions and the following disclaimer.
+# - Redistributions in binary form must reproduce the above copyright
+#   notice, this list of conditions and the following disclaimer in the
+#   documentation and/or other materials provided with the distribution.
+# - The name of the author may not be used to endorse or promote products
+#   derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+## Toolchain configuration
+#
+BFD_NAME = elf32-powerpc
+BFD_ARCH = powerpc:common
+BFD = binary
+TARGET = ppc-linux-gnu
+TOOLCHAIN_DIR = /usr/local/ppc/bin
+## Make some default assumptions
+#
+CFLAGS += -mcpu=powerpc -msoft-float -m32
+AFLAGS += -a32
+LFLAGS += -no-check-sections -N
+DEFS += -D__32_BITS__
+## Own configuration directives
+#
+CONFIG_FB = y
+## Compile with hierarchical page tables support.
+#
+CONFIG_PAGE_PT = y
+DEFS += -DCONFIG_PAGE_PT
+## Compile with support for address space identifiers.
+#
+CONFIG_ASID = y
+CONFIG_ASID_FIFO = y
+## Compile with support for software integer division.
+#
+CONFIG_SOFTINT = y
+ARCH_SOURCES = \
+    arch/$(ARCH)/src/context.S \
+    arch/$(ARCH)/src/debug/panic.s \
+    arch/$(ARCH)/src/fpu_context.S \
+    arch/$(ARCH)/src/boot/boot.S \
+    arch/$(ARCH)/src/ppc32.c \
+    arch/$(ARCH)/src/dummy.s \
+    arch/$(ARCH)/src/exception.S \
+    arch/$(ARCH)/src/interrupt.c \
+    arch/$(ARCH)/src/asm.S \
+    arch/$(ARCH)/src/cpu/cpu.c \
+    arch/$(ARCH)/src/proc/scheduler.c \
+    arch/$(ARCH)/src/ddi/ddi.c \
+    arch/$(ARCH)/src/drivers/cuda.c \
+    arch/$(ARCH)/src/mm/as.c \
+    arch/$(ARCH)/src/mm/frame.c \
+    arch/$(ARCH)/src/mm/memory_init.c \
+    arch/$(ARCH)/src/mm/page.c \
+    arch/$(ARCH)/src/mm/tlb.c \
+    arch/$(ARCH)/src/drivers/pic.c

 /tags/0.2.0.2/kernel/arch/ppc32/_link.ld.in
 ,0 → 1,59
+/** PPC32 linker script
+ *
+ * umapped section:
+ *  kernel text
+ *  kernel data
+ * mapped section:
+ *  kernel text
+ *  kernel data
+ *
+ */
+#define __ASM__
+#include <arch/boot/boot.h>
+#include <arch/mm/page.h>
+ENTRY(kernel_image_start)
+OUTPUT_FORMAT("elf32-powerpc")
+OUTPUT_ARCH("powerpc:common")
+SECTIONS {
+    .unmapped 0: AT (0) {
+        unmapped_ktext_start = .;
+        *(K_UNMAPPED_TEXT_START);
+        unmapped_ktext_end = .;
+        unmapped_kdata_start = .;
+        *(K_UNMAPPED_DATA_START);
+        unmapped_kdata_start = .;
+    }
+    .mapped PA2KA(BOOT_OFFSET): AT (BOOT_OFFSET) {
+        ktext_start = .;
+        *(K_TEXT_START);
+        *(.text);
+        ktext_end = .;
+        kdata_start = .;
+        *(K_DATA_START);
+        *(.rodata);
+        *(.rodata.*);
+        *(.data);       /* initialized data */
+        *(.sdata);
+        *(.sdata2);
+        *(.sbss);
+        hardcoded_ktext_size = .;
+        LONG(ktext_end - ktext_start);
+        hardcoded_kdata_size = .;
+        LONG(kdata_end - kdata_start);
+        hardcoded_load_address = .;
+        LONG(PA2KA(BOOT_OFFSET));
+        *(.bss);        /* uninitialized static variables */
+        *(COMMON);      /* global variables */
+        symbol_table = .;
+        *(symtab.*);            /* Symbol table, must be LAST symbol!*/
+        kdata_end = .;
+    }
+}

 /tags/0.2.0.2/kernel/arch/sparc64/src/trap/exception.c
 ,0 → 1,66
+/*
+ * Copyright (C) 2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/** @addtogroup sparc64interrupt
+ * @{
+ */
+/** @file
+ *
+ */
+#include <arch/trap/exception.h>
+#include <arch/asm.h>
+#include <debug.h>
+/** Handle instruction_access_exception. */
+void do_instruction_access_exc(void)
+{
+    panic("Instruction Access Exception\n");
+}
+/** Handle mem_address_not_aligned. */
+void do_mem_address_not_aligned(void)
+{
+    panic("Memory Address Not Aligned\n");
+}
+/** Handle data_access_error. */
+void do_data_access_error(void)
+{
+    panic("Data Access Error: %p\n", tpc_read());
+}
+/** Handle mem_address_not_aligned. */
+void do_illegal_instruction(void)
+{
+    panic("Illegal Instruction: %p\n", tpc_read());
+}
+/** @}
+ */

 /tags/0.2.0.2/kernel/arch/sparc64/src/trap/interrupt.c
 ,0 → 1,63
+/*
+ * Copyright (C) 2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/** @addtogroup sparc64interrupt
+ * @{
+ */
+/** @file
+ */
+#include <arch/interrupt.h>
+#include <interrupt.h>
+#include <arch/types.h>
+#include <debug.h>
+#include <ipc/sysipc.h>
+/** Register Interrupt Level Handler.
+ *
+ * @param n Interrupt Level (1 - 15).
+ * @param name Short descriptive string.
+ * @param f Handler.
+ */
+void interrupt_register(int n, const char *name, iroutine f)
+{
+    ASSERT(n >= IVT_FIRST && n <= IVT_ITEMS);
+    exc_register(n - 1, name, f);
+}
+/* Reregister irq to be IPC-ready */
+void irq_ipc_bind_arch(__native irq)
+{
+    panic("not implemented\n");
+    /* TODO */
+}
+/** @}
+ */

 /tags/0.2.0.2/kernel/arch/sparc64/src/trap/trap.c
 ,0 → 1,56
+/*
+ * Copyright (C) 2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/** @addtogroup sparc64interrupt
+ * @{
+ */
+/** @file
+ *
+ */
+#include <arch/trap/trap.h>
+#include <arch/trap/trap_table.h>
+#include <arch/trap/regwin.h>
+#include <arch/trap/exception.h>
+#include <arch/trap/interrupt.h>
+#include <arch/trap/mmu.h>
+#include <arch/asm.h>
+#include <memstr.h>
+#include <debug.h>
+#include <arch/types.h>
+#include <typedefs.h>
+#include <arch/drivers/tick.h>
+/** Initialize trap table. */
+void trap_init(void)
+{
+}
+/** @}
+ */

 /tags/0.2.0.2/kernel/arch/sparc64/src/trap/trap_table.S
 ,0 → 1,379
+#
+# Copyright (C) 2005 Jakub Jermar
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# - Redistributions of source code must retain the above copyright
+#   notice, this list of conditions and the following disclaimer.
+# - Redistributions in binary form must reproduce the above copyright
+#   notice, this list of conditions and the following disclaimer in the
+#   documentation and/or other materials provided with the distribution.
+# - The name of the author may not be used to endorse or promote products
+#   derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+/**
+ * This file contains kernel trap table.
+ */
+.register %g2, #scratch
+.register %g3, #scratch
+.register %g6, #scratch
+.register %g7, #scratch
+.text
+#include <arch/trap/trap_table.h>
+#include <arch/trap/regwin.h>
+#include <arch/trap/interrupt.h>
+#include <arch/trap/exception.h>
+#include <arch/trap/mmu.h>
+#include <arch/stack.h>
+#define TABLE_SIZE  TRAP_TABLE_SIZE
+#define ENTRY_SIZE  TRAP_TABLE_ENTRY_SIZE
+/*
+ * Kernel trap table.
+ */
+.align TABLE_SIZE
+.global trap_table
+trap_table:
+/* TT = 0x08, TL = 0, instruction_access_exception */
+.org trap_table + TT_INSTRUCTION_ACCESS_EXCEPTION*ENTRY_SIZE
+.global instruction_access_exception
+instruction_access_exception:
+    SIMPLE_HANDLER do_instruction_access_exc
+/* TT = 0x10, TL = 0, illegal_instruction */
+.org trap_table + TT_ILLEGAL_INSTRUCTION*ENTRY_SIZE
+.global illegal_instruction
+illegal_instruction:
+    SIMPLE_HANDLER do_illegal_instruction
+/* TT = 0x24, TL = 0, clean_window handler */
+.org trap_table + TT_CLEAN_WINDOW*ENTRY_SIZE
+.global clean_window_handler
+clean_window_handler:
+    CLEAN_WINDOW_HANDLER
+/* TT = 0x32, TL = 0, data_access_error */
+.org trap_table + TT_DATA_ACCESS_ERROR*ENTRY_SIZE
+.global data_access_error
+data_access_error:
+    SIMPLE_HANDLER do_data_access_error
+/* TT = 0x34, TL = 0, mem_address_not_aligned */
+.org trap_table + TT_MEM_ADDRESS_NOT_ALIGNED*ENTRY_SIZE
+.global mem_address_not_aligned
+mem_address_not_aligned:
+    SIMPLE_HANDLER do_mem_address_not_aligned
+/* TT = 0x41, TL = 0, interrupt_level_1 handler */
+.org trap_table + TT_INTERRUPT_LEVEL_1*ENTRY_SIZE
+.global interrupt_level_1_handler
+interrupt_level_1_handler:
+    INTERRUPT_LEVEL_N_HANDLER 1
+/* TT = 0x42, TL = 0, interrupt_level_2 handler */
+.org trap_table + TT_INTERRUPT_LEVEL_2*ENTRY_SIZE
+.global interrupt_level_2_handler
+interrupt_level_2_handler:
+    INTERRUPT_LEVEL_N_HANDLER 2
+/* TT = 0x43, TL = 0, interrupt_level_3 handler */
+.org trap_table + TT_INTERRUPT_LEVEL_3*ENTRY_SIZE
+.global interrupt_level_3_handler
+interrupt_level_3_handler:
+    INTERRUPT_LEVEL_N_HANDLER 3
+/* TT = 0x44, TL = 0, interrupt_level_4 handler */
+.org trap_table + TT_INTERRUPT_LEVEL_4*ENTRY_SIZE
+.global interrupt_level_4_handler
+interrupt_level_4_handler:
+    INTERRUPT_LEVEL_N_HANDLER 4
+/* TT = 0x45, TL = 0, interrupt_level_5 handler */
+.org trap_table + TT_INTERRUPT_LEVEL_5*ENTRY_SIZE
+.global interrupt_level_5_handler
+interrupt_level_5_handler:
+    INTERRUPT_LEVEL_N_HANDLER 5
+/* TT = 0x46, TL = 0, interrupt_level_6 handler */
+.org trap_table + TT_INTERRUPT_LEVEL_6*ENTRY_SIZE
+.global interrupt_level_6_handler
+interrupt_level_6_handler:
+    INTERRUPT_LEVEL_N_HANDLER 6
+/* TT = 0x47, TL = 0, interrupt_level_7 handler */
+.org trap_table + TT_INTERRUPT_LEVEL_7*ENTRY_SIZE
+.global interrupt_level_7_handler
+interrupt_level_7_handler:
+    INTERRUPT_LEVEL_N_HANDLER 7
+/* TT = 0x48, TL = 0, interrupt_level_8 handler */
+.org trap_table + TT_INTERRUPT_LEVEL_8*ENTRY_SIZE
+.global interrupt_level_8_handler
+interrupt_level_8_handler:
+    INTERRUPT_LEVEL_N_HANDLER 8
+/* TT = 0x49, TL = 0, interrupt_level_9 handler */
+.org trap_table + TT_INTERRUPT_LEVEL_9*ENTRY_SIZE
+.global interrupt_level_9_handler
+interrupt_level_9_handler:
+    INTERRUPT_LEVEL_N_HANDLER 9
+/* TT = 0x4a, TL = 0, interrupt_level_10 handler */
+.org trap_table + TT_INTERRUPT_LEVEL_10*ENTRY_SIZE
+.global interrupt_level_10_handler
+interrupt_level_10_handler:
+    INTERRUPT_LEVEL_N_HANDLER 10
+/* TT = 0x4b, TL = 0, interrupt_level_11 handler */
+.org trap_table + TT_INTERRUPT_LEVEL_11*ENTRY_SIZE
+.global interrupt_level_11_handler
+interrupt_level_11_handler:
+    INTERRUPT_LEVEL_N_HANDLER 11
+/* TT = 0x4c, TL = 0, interrupt_level_12 handler */
+.org trap_table + TT_INTERRUPT_LEVEL_12*ENTRY_SIZE
+.global interrupt_level_12_handler
+interrupt_level_12_handler:
+    INTERRUPT_LEVEL_N_HANDLER 12
+/* TT = 0x4d, TL = 0, interrupt_level_13 handler */
+.org trap_table + TT_INTERRUPT_LEVEL_13*ENTRY_SIZE
+.global interrupt_level_13_handler
+interrupt_level_13_handler:
+    INTERRUPT_LEVEL_N_HANDLER 13
+/* TT = 0x4e, TL = 0, interrupt_level_14 handler */
+.org trap_table + TT_INTERRUPT_LEVEL_14*ENTRY_SIZE
+.global interrupt_level_14_handler
+interrupt_level_14_handler:
+    INTERRUPT_LEVEL_N_HANDLER 14
+/* TT = 0x4f, TL = 0, interrupt_level_15 handler */
+.org trap_table + TT_INTERRUPT_LEVEL_15*ENTRY_SIZE
+.global interrupt_level_15_handler
+interrupt_level_15_handler:
+    INTERRUPT_LEVEL_N_HANDLER 15
+/* TT = 0x60, TL = 0, interrupt_vector_trap handler */
+.org trap_table + TT_INTERRUPT_VECTOR_TRAP*ENTRY_SIZE
+.global interrupt_vector_trap_handler
+interrupt_vector_trap_handler:
+    INTERRUPT_VECTOR_TRAP_HANDLER
+/* TT = 0x64, TL = 0, fast_instruction_access_MMU_miss */
+.org trap_table + TT_FAST_INSTRUCTION_ACCESS_MMU_MISS*ENTRY_SIZE
+.global fast_instruction_access_mmu_miss_handler
+fast_instruction_access_mmu_miss_handler:
+    FAST_INSTRUCTION_ACCESS_MMU_MISS_HANDLER
+/* TT = 0x68, TL = 0, fast_data_access_MMU_miss */
+.org trap_table + TT_FAST_DATA_ACCESS_MMU_MISS*ENTRY_SIZE
+.global fast_data_access_mmu_miss_handler
+fast_data_access_mmu_miss_handler:
+    FAST_DATA_ACCESS_MMU_MISS_HANDLER
+/* TT = 0x6c, TL = 0, fast_data_access_protection */
+.org trap_table + TT_FAST_DATA_ACCESS_PROTECTION*ENTRY_SIZE
+.global fast_data_access_protection_handler
+fast_data_access_protection_handler:
+    FAST_DATA_ACCESS_PROTECTION_HANDLER
+/* TT = 0x80, TL = 0, spill_0_normal handler */
+.org trap_table + TT_SPILL_0_NORMAL*ENTRY_SIZE
+.global spill_0_normal
+spill_0_normal:
+    SPILL_NORMAL_HANDLER
+/* TT = 0xc0, TL = 0, fill_0_normal handler */
+.org trap_table + TT_FILL_0_NORMAL*ENTRY_SIZE
+.global fill_0_normal
+fill_0_normal:
+    FILL_NORMAL_HANDLER
+/*
+ * Handlers for TL>0.
+ */
+/* TT = 0x08, TL > 0, instruction_access_exception */
+.org trap_table + (TT_INSTRUCTION_ACCESS_EXCEPTION+512)*ENTRY_SIZE
+.global instruction_access_exception_high
+instruction_access_exception_high:
+    SIMPLE_HANDLER do_instruction_access_exc
+/* TT = 0x10, TL > 0, illegal_instruction */
+.org trap_table + (TT_ILLEGAL_INSTRUCTION+512)*ENTRY_SIZE
+.global illegal_instruction_high
+illegal_instruction_high:
+    SIMPLE_HANDLER do_illegal_instruction
+/* TT = 0x24, TL > 0, clean_window handler */
+.org trap_table + (TT_CLEAN_WINDOW+512)*ENTRY_SIZE
+.global clean_window_handler_high
+clean_window_handler_high:
+    CLEAN_WINDOW_HANDLER
+/* TT = 0x32, TL > 0, data_access_error */
+.org trap_table + (TT_DATA_ACCESS_ERROR+512)*ENTRY_SIZE
+.global data_access_error_high
+data_access_error_high:
+    SIMPLE_HANDLER do_data_access_error
+/* TT = 0x34, TL > 0, mem_address_not_aligned */
+.org trap_table + (TT_MEM_ADDRESS_NOT_ALIGNED+512)*ENTRY_SIZE
+.global mem_address_not_aligned_high
+mem_address_not_aligned_high:
+    SIMPLE_HANDLER do_mem_address_not_aligned
+/* TT = 0x64, TL > 0, fast_instruction_access_MMU_miss */
+.org trap_table + (TT_FAST_INSTRUCTION_ACCESS_MMU_MISS+512)*ENTRY_SIZE
+.global fast_instruction_access_mmu_miss_handler_high
+fast_instruction_access_mmu_miss_handler_high:
+    FAST_INSTRUCTION_ACCESS_MMU_MISS_HANDLER
+/* TT = 0x68, TL > 0, fast_data_access_MMU_miss */
+.org trap_table + (TT_FAST_DATA_ACCESS_MMU_MISS+512)*ENTRY_SIZE
+.global fast_data_access_mmu_miss_handler_high
+fast_data_access_mmu_miss_handler_high:
+    FAST_DATA_ACCESS_MMU_MISS_HANDLER
+/* TT = 0x6c, TL > 0, fast_data_access_protection */
+.org trap_table + (TT_FAST_DATA_ACCESS_PROTECTION+512)*ENTRY_SIZE
+.global fast_data_access_protection_handler_high
+fast_data_access_protection_handler_high:
+    FAST_DATA_ACCESS_PROTECTION_HANDLER
+/* TT = 0x80, TL > 0, spill_0_normal handler */
+.org trap_table + (TT_SPILL_0_NORMAL+512)*ENTRY_SIZE
+.global spill_0_normal_high
+spill_0_normal_high:
+    SPILL_NORMAL_HANDLER
+/* TT = 0xc0, TL > 0, fill_0_normal handler */
+.org trap_table + (TT_FILL_0_NORMAL+512)*ENTRY_SIZE
+.global fill_0_normal_high
+fill_0_normal_high:
+    FILL_NORMAL_HANDLER
+/* Preemptible trap handler.
+ *
+ * This trap handler makes arrangements to
+ * make calling scheduler() possible.
+ *
+ * The caller is responsible for doing save
+ * and allocating PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE
+ * bytes on stack.
+ *
+ * Input registers:
+ *  %l0     Address of function to call.
+ * Output registers:
+ *   %l1 - %l7  Copy of %g1 - %g7
+ */
+.global preemptible_handler
+preemptible_handler:
+    /*
+     * Save TSTATE, TPC, TNPC and PSTATE aside.
+     */
+    rdpr %tstate, %g1
+    rdpr %tpc, %g2
+    rdpr %tnpc, %g3
+    rdpr %pstate, %g4
+    stx %g1, [%fp + STACK_BIAS + SAVED_TSTATE]
+    stx %g2, [%fp + STACK_BIAS + SAVED_TPC]
+    stx %g3, [%fp + STACK_BIAS + SAVED_TNPC]
+    stx %g4, [%fp + STACK_BIAS + SAVED_PSTATE]
+    /*
+     * Write 0 to TL.
+     */
+    wrpr %g0, 0, %tl
+    /*
+     * Alter PSTATE.
+     * - switch to normal globals.
+     */
+    and %g4, ~1, %g4        ! mask alternate globals
+    wrpr %g4, 0, %pstate
+    /*
+     * Save the normal globals.
+     */
+    SAVE_GLOBALS
+    /*
+     * Call the higher-level handler.
+     */
+    call %l0
+    nop
+    /*
+     * Restore the normal global register set.
+     */
+    RESTORE_GLOBALS
+    /*
+     * Restore PSTATE from saved copy.
+     * Alternate globals become active.
+     */
+    ldx [%fp + STACK_BIAS + SAVED_PSTATE], %l4
+    wrpr %l4, 0, %pstate
+    /*
+     * Write 1 to TL.
+     */
+    wrpr %g0, 1, %tl
+    /*
+     * Read TSTATE, TPC and TNPC from saved copy.
+     */
+    ldx [%fp + STACK_BIAS + SAVED_TSTATE], %g1
+    ldx [%fp + STACK_BIAS + SAVED_TPC], %g2
+    ldx [%fp + STACK_BIAS + SAVED_TNPC], %g3
+    /*
+     * Do restore to match the save instruction from the top-level handler.
+     */
+    restore
+    /*
+     * On execution of retry instruction, CWP will be restored from TSTATE register.
+     * However, because of scheduling, it is possible that CWP in saved TSTATE
+     * is different from current CWP. The following chunk of code fixes CWP
+     * in the saved copy of TSTATE.
+     */
+    rdpr %cwp, %g4      ! read current CWP
+    and %g1, ~0x1f, %g1 ! clear CWP field in saved TSTATE
+    or %g1, %g4, %g1    ! write current CWP to TSTATE
+    /*
+     * Restore TSTATE, TPC and TNPC from saved copies.
+     */
+    wrpr %g1, 0, %tstate
+    wrpr %g2, 0, %tpc
+    wrpr %g3, 0, %tnpc
+    /*
+     * Return from interrupt.
+     */
+    retry

 /tags/0.2.0.2/kernel/arch/sparc64/src/mm/tlb.c
 ,0 → 1,284
+/*
+ * Copyright (C) 2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup sparc64mm
+ * @{
+ */
+/** @file
+ */
+#include <arch/mm/tlb.h>
+#include <mm/tlb.h>
+#include <arch/mm/frame.h>
+#include <arch/mm/page.h>
+#include <arch/mm/mmu.h>
+#include <mm/asid.h>
+#include <print.h>
+#include <arch/types.h>
+#include <typedefs.h>
+#include <config.h>
+#include <arch/trap/trap.h>
+#include <panic.h>
+#include <arch/asm.h>
+#include <symtab.h>
+#include <arch/drivers/fb.h>
+#include <arch/drivers/i8042.h>
+char *context_encoding[] = {
+    "Primary",
+    "Secondary",
+    "Nucleus",
+    "Reserved"
+};
+/** Initialize ITLB and DTLB.
+ *
+ * The goal of this function is to disable MMU
+ * so that both TLBs can be purged and new
+ * kernel 4M locked entry can be installed.
+ * After TLB is initialized, MMU is enabled
+ * again.
+ *
+ * Switching MMU off imposes the requirement for
+ * the kernel to run in identity mapped environment.
+ */
+void tlb_arch_init(void)
+{
+    tlb_tag_access_reg_t tag;
+    tlb_data_t data;
+    frame_address_t fr;
+    page_address_t pg;
+    fr.address = config.base;
+    pg.address = config.base;
+    immu_disable();
+    dmmu_disable();
+    /*
+     * Demap everything, especially OpenFirmware.
+     */
+    itlb_demap(TLB_DEMAP_CONTEXT, TLB_DEMAP_NUCLEUS, 0);
+    dtlb_demap(TLB_DEMAP_CONTEXT, TLB_DEMAP_NUCLEUS, 0);
+    /*
+     * We do identity mapping of 4M-page at 4M.
+     */
+    tag.value = ASID_KERNEL;
+    tag.vpn = pg.vpn;
+    itlb_tag_access_write(tag.value);
+    dtlb_tag_access_write(tag.value);
+    data.value = 0;
+    data.v = true;
+    data.size = PAGESIZE_4M;
+    data.pfn = fr.pfn;
+    data.l = true;
+    data.cp = 1;
+    data.cv = 1;
+    data.p = true;
+    data.w = true;
+    data.g = true;
+    itlb_data_in_write(data.value);
+    dtlb_data_in_write(data.value);
+    /*
+     * Register window traps can occur before MMU is enabled again.
+     * This ensures that any such traps will be handled from
+     * kernel identity mapped trap handler.
+     */
+    trap_switch_trap_table();
+    tlb_invalidate_all();
+    dmmu_enable();
+    immu_enable();
+}
+/** Insert privileged mapping into DMMU TLB.
+ *
+ * @param page Virtual page address.
+ * @param frame Physical frame address.
+ * @param pagesize Page size.
+ * @param locked True for permanent mappings, false otherwise.
+ * @param cacheable True if the mapping is cacheable, false otherwise.
+ */
+void dtlb_insert_mapping(__address page, __address frame, int pagesize, bool locked, bool cacheable)
+{
+    tlb_tag_access_reg_t tag;
+    tlb_data_t data;
+    page_address_t pg;
+    frame_address_t fr;
+    pg.address = page;
+    fr.address = frame;
+    tag.value = ASID_KERNEL;
+    tag.vpn = pg.vpn;
+    dtlb_tag_access_write(tag.value);
+    data.value = 0;
+    data.v = true;
+    data.size = pagesize;
+    data.pfn = fr.pfn;
+    data.l = locked;
+    data.cp = cacheable;
+    data.cv = cacheable;
+    data.p = true;
+    data.w = true;
+    data.g = true;
+    dtlb_data_in_write(data.value);
+}
+/** ITLB miss handler. */
+void fast_instruction_access_mmu_miss(void)
+{
+    panic("%s\n", __FUNCTION__);
+}
+/** DTLB miss handler. */
+void fast_data_access_mmu_miss(void)
+{
+    tlb_tag_access_reg_t tag;
+    __address tpc;
+    char *tpc_str;
+    tag.value = dtlb_tag_access_read();
+    if (tag.context != ASID_KERNEL || tag.vpn == 0) {
+        tpc = tpc_read();
+        tpc_str = get_symtab_entry(tpc);
+        printf("Faulting page: %p, ASID=%d\n", tag.vpn * PAGE_SIZE, tag.context);
+        printf("TPC=%p, (%s)\n", tpc, tpc_str ? tpc_str : "?");
+        panic("%s\n", __FUNCTION__);
+    }
+    /*
+     * Identity map piece of faulting kernel address space.
+     */
+    dtlb_insert_mapping(tag.vpn * PAGE_SIZE, tag.vpn * FRAME_SIZE, PAGESIZE_8K, false, true);
+}
+/** DTLB protection fault handler. */
+void fast_data_access_protection(void)
+{
+    panic("%s\n", __FUNCTION__);
+}
+/** Print contents of both TLBs. */
+void tlb_print(void)
+{
+    int i;
+    tlb_data_t d;
+    tlb_tag_read_reg_t t;
+    printf("I-TLB contents:\n");
+    for (i = 0; i < ITLB_ENTRY_COUNT; i++) {
+        d.value = itlb_data_access_read(i);
+        t.value = itlb_tag_read_read(i);
+        printf("%d: vpn=%#llx, context=%d, v=%d, size=%d, nfo=%d, ie=%d, soft2=%#x, diag=%#x, pfn=%#x, soft=%#x, l=%d, cp=%d, cv=%d, e=%d, p=%d, w=%d, g=%d\n",
+            i, t.vpn, t.context, d.v, d.size, d.nfo, d.ie, d.soft2, d.diag, d.pfn, d.soft, d.l, d.cp, d.cv, d.e, d.p, d.w, d.g);
+    }
+    printf("D-TLB contents:\n");
+    for (i = 0; i < DTLB_ENTRY_COUNT; i++) {
+        d.value = dtlb_data_access_read(i);
+        t.value = dtlb_tag_read_read(i);
+        printf("%d: vpn=%#llx, context=%d, v=%d, size=%d, nfo=%d, ie=%d, soft2=%#x, diag=%#x, pfn=%#x, soft=%#x, l=%d, cp=%d, cv=%d, e=%d, p=%d, w=%d, g=%d\n",
+            i, t.vpn, t.context, d.v, d.size, d.nfo, d.ie, d.soft2, d.diag, d.pfn, d.soft, d.l, d.cp, d.cv, d.e, d.p, d.w, d.g);
+    }
+}
+/** Invalidate all unlocked ITLB and DTLB entries. */
+void tlb_invalidate_all(void)
+{
+    int i;
+    tlb_data_t d;
+    tlb_tag_read_reg_t t;
+    for (i = 0; i < ITLB_ENTRY_COUNT; i++) {
+        d.value = itlb_data_access_read(i);
+        if (!d.l) {
+            t.value = itlb_tag_read_read(i);
+            d.v = false;
+            itlb_tag_access_write(t.value);
+            itlb_data_access_write(i, d.value);
+        }
+    }
+    for (i = 0; i < DTLB_ENTRY_COUNT; i++) {
+        d.value = dtlb_data_access_read(i);
+        if (!d.l) {
+            t.value = dtlb_tag_read_read(i);
+            d.v = false;
+            dtlb_tag_access_write(t.value);
+            dtlb_data_access_write(i, d.value);
+        }
+    }
+}
+/** Invalidate all ITLB and DTLB entries that belong to specified ASID (Context).
+ *
+ * @param asid Address Space ID.
+ */
+void tlb_invalidate_asid(asid_t asid)
+{
+    /* TODO: write asid to some Context register and encode the register in second parameter below. */
+    itlb_demap(TLB_DEMAP_CONTEXT, TLB_DEMAP_NUCLEUS, 0);
+    dtlb_demap(TLB_DEMAP_CONTEXT, TLB_DEMAP_NUCLEUS, 0);
+}
+/** Invalidate all ITLB and DTLB entries for specified page range in specified address space.
+ *
+ * @param asid Address Space ID.
+ * @param page First page which to sweep out from ITLB and DTLB.
+ * @param cnt Number of ITLB and DTLB entries to invalidate.
+ */
+void tlb_invalidate_pages(asid_t asid, __address page, count_t cnt)
+{
+    int i;
+    for (i = 0; i < cnt; i++) {
+        /* TODO: write asid to some Context register and encode the register in second parameter below. */
+        itlb_demap(TLB_DEMAP_PAGE, TLB_DEMAP_NUCLEUS, page + i * PAGE_SIZE);
+        dtlb_demap(TLB_DEMAP_PAGE, TLB_DEMAP_NUCLEUS, page + i * PAGE_SIZE);
+    }
+}
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/sparc64/src/mm/as.c
 ,0 → 1,48
+/*
+ * Copyright (C) 2006 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup sparc64mm
+ * @{
+ */
+/** @file
+ */
+#include <arch/mm/as.h>
+#include <genarch/mm/as_ht.h>
+#include <genarch/mm/asid_fifo.h>
+/** Architecture dependent address space init. */
+void as_arch_init(void)
+{
+    as_operations = &as_ht_operations;
+    asid_fifo_init();
+}
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/sparc64/src/mm/frame.c
 ,0 → 1,56
+/*
+ * Copyright (C) 2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup sparc64mm
+ * @{
+ */
+/** @file
+ */
+#include <arch/mm/frame.h>
+#include <genarch/ofw/memory_init.h>
+#include <mm/frame.h>
+#include <config.h>
+#include <align.h>
+void frame_arch_init(void)
+{
+    ofw_init_zones();
+    /*
+     * Workaround to prevent slab allocator from allocating frame 0.
+     * Frame 0 is
+     * a) not mapped by OFW
+     * b) would be confused with NULL error return code
+     */
+    frame_mark_unavailable(0, 1);
+}
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/sparc64/src/mm/memory_init.c
 ,0 → 1,46
+/*
+ * Copyright (C) 2006 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup sparc64mm
+ * @{
+ */
+/** @file
+ */
+#include <arch/mm/memory_init.h>
+#include <genarch/ofw/memory_init.h>
+#include <typedefs.h>
+size_t get_memory_size(void)
+{
+    return ofw_get_memory_size();
+}
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/sparc64/src/mm/page.c
 ,0 → 1,88
+/*
+ * Copyright (C) 2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup sparc64mm
+ * @{
+ */
+/** @file
+ */
+#include <arch/mm/page.h>
+#include <arch/mm/tlb.h>
+#include <genarch/mm/page_ht.h>
+#include <mm/frame.h>
+#include <bitops.h>
+#include <debug.h>
+void page_arch_init(void)
+{
+    page_mapping_operations = &ht_mapping_operations;
+}
+__address hw_map(__address physaddr, size_t size)
+{
+    unsigned int order;
+    int i;
+    struct {
+        int pagesize;
+        size_t increment;
+        count_t count;
+    } sizemap[] = {
+        { PAGESIZE_8K, 0, 1 },          /* 8K */
+        { PAGESIZE_8K, PAGE_SIZE, 2 },      /* 16K */
+        { PAGESIZE_8K, PAGE_SIZE, 4 },      /* 32K */
+        { PAGESIZE_64K, 0, 1},          /* 64K */
+        { PAGESIZE_64K, 8*PAGE_SIZE, 2 },   /* 128K */
+        { PAGESIZE_64K, 8*PAGE_SIZE, 4 },   /* 256K */
+        { PAGESIZE_512K, 0, 1 },        /* 512K */
+        { PAGESIZE_512K, 64*PAGE_SIZE, 2 }, /* 1M */
+        { PAGESIZE_512K, 64*PAGE_SIZE, 4 }, /* 2M */
+        { PAGESIZE_4M, 0, 1 }           /* 4M */
+    };
+    ASSERT(size <= 4*1024*1024);
+    if (size <= FRAME_SIZE)
+        order = 0;
+    else
+        order = (fnzb32(size - 1) + 1) - FRAME_WIDTH;
+    __address virtaddr = PA2KA(PFN2ADDR(frame_alloc(order, FRAME_KA)));
+    for (i = 0; i < sizemap[order].count; i++)
+        dtlb_insert_mapping(virtaddr + i*sizemap[order].increment,
+                    physaddr + i*sizemap[order].increment,
+                    sizemap[order].pagesize, true, false);
+    return virtaddr;
+}
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/sparc64/src/cpu/cpu.c
 ,0 → 1,100
+/*
+ * Copyright (C) 2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/** @addtogroup sparc64
+ * @{
+ */
+/** @file
+ */
+#include <cpu.h>
+#include <arch.h>
+#include <arch/register.h>
+#include <arch/asm.h>
+#include <print.h>
+void cpu_arch_init(void)
+{
+}
+void cpu_identify(void)
+{
+    CPU->arch.ver.value = ver_read();
+}
+void cpu_print_report(cpu_t *m)
+{
+    char *manuf, *impl;
+    switch (CPU->arch.ver.manuf) {
+        case MANUF_FUJITSU:
+        manuf = "Fujitsu";
+        break;
+        case MANUF_ULTRASPARC:
+        manuf = "UltraSPARC";
+        break;
+        case MANUF_SUN:
+            manuf = "Sun";
+        break;
+        default:
+        manuf = "Unknown";
+        break;
+    }
+    switch (CPU->arch.ver.impl) {
+        case IMPL_ULTRASPARCI:
+        impl = "UltraSPARC I";
+        break;
+        case IMPL_ULTRASPARCII:
+        impl = "UltraSPARC II";
+        break;
+        case IMPL_ULTRASPARCII_I:
+        impl = "UltraSPARC IIi";
+        break;
+        case IMPL_ULTRASPARCII_E:
+        impl = "UltraSPARC IIe";
+        break;
+        case IMPL_ULTRASPARCIII:
+        impl = "UltraSPARC III";
+        break;
+        case IMPL_ULTRASPARCIV_PLUS:
+        impl = "UltraSPARC IV+";
+        break;
+        case IMPL_SPARC64V:
+        impl = "SPARC 64V";
+        break;
+        default:
+        impl = "Unknown";
+        break;
+    }
+    printf("cpu%d: manuf=%s, impl=%s, mask=%d\n", CPU->id, manuf, impl, CPU->arch.ver.mask);
+}
+/** @}
+ */

 /tags/0.2.0.2/kernel/arch/sparc64/src/ddi/ddi.c
 ,0 → 1,57
+/*
+ * Copyright (C) 2006 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup sparc64ddi
+ * @{
+ */
+/** @file
+ */
+#include <ddi/ddi.h>
+#include <proc/task.h>
+#include <arch/types.h>
+#include <typedefs.h>
+/** Enable I/O space range for task.
+ *
+ * Interrupts are disabled and task is locked.
+ *
+ * @param task Task.
+ * @param ioaddr Startign I/O space address.
+ * @param size Size of the enabled I/O range.
+ *
+ * @return 0 on success or an error code from errno.h.
+ */
+int ddi_iospace_enable_arch(task_t *task, __address ioaddr, size_t size)
+{
+    return 0;
+}
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/sparc64/src/proc/scheduler.c
 ,0 → 1,84
+/*
+ * Copyright (C) 2006 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup sparc64proc
+ * @{
+ */
+/** @file
+ */
+#include <proc/scheduler.h>
+#include <proc/thread.h>
+#include <arch.h>
+#include <arch/mm/tlb.h>
+#include <arch/mm/page.h>
+#include <config.h>
+#include <align.h>
+/** Perform sparc64 specific tasks needed before the new task is run. */
+void before_task_runs_arch(void)
+{
+}
+/** Ensure that thread's kernel stack is locked in TLB. */
+void before_thread_runs_arch(void)
+{
+    __address base;
+    base = ALIGN_DOWN(config.base, 1<<KERNEL_PAGE_WIDTH);
+    if ((__address) THREAD->kstack < base || (__address) THREAD->kstack > base + (1<<KERNEL_PAGE_WIDTH)) {
+        /*
+         * Kernel stack of this thread is not locked in DTLB.
+         * First, make sure it is not mapped already.
+         * If not, create a locked mapping for it.
+         */
+         dtlb_demap(TLB_DEMAP_PAGE, TLB_DEMAP_NUCLEUS, (__address) THREAD->kstack);
+         dtlb_insert_mapping((__address) THREAD->kstack, KA2PA(THREAD->kstack), PAGESIZE_8K, true, true);
+    }
+}
+/** Unlock thread's stack from TLB, if necessary. */
+void after_thread_ran_arch(void)
+{
+    __address base;
+    base = ALIGN_DOWN(config.base, 1<<KERNEL_PAGE_WIDTH);
+    if ((__address) THREAD->kstack < base || (__address) THREAD->kstack > base + (1<<KERNEL_PAGE_WIDTH)) {
+        /*
+         * Kernel stack of this thread is locked in DTLB.
+         * Destroy the mapping.
+         */
+        dtlb_demap(TLB_DEMAP_PAGE, TLB_DEMAP_NUCLEUS, (__address) THREAD->kstack);
+    }
+}
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/sparc64/src/sparc64.c
 ,0 → 1,100
+/*
+ * Copyright (C) 2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup sparc64
+ * @{
+ */
+/** @file
+ */
+#include <arch.h>
+#include <debug.h>
+#include <arch/trap/trap.h>
+#include <arch/console.h>
+#include <arch/drivers/tick.h>
+#include <proc/thread.h>
+#include <console/console.h>
+void arch_pre_mm_init(void)
+{
+    interrupts_disable();
+    ofw_sparc64_console_init();
+    trap_init();
+    tick_init();
+}
+void arch_post_mm_init(void)
+{
+    standalone_sparc64_console_init();
+}
+void arch_pre_smp_init(void)
+{
+}
+void arch_post_smp_init(void)
+{
+    thread_t *t;
+    /*
+         * Create thread that reads characters from OFW's input.
+         */
+    t = thread_create(kofwinput, NULL, TASK, 0, "kofwinput");
+    if (!t)
+        panic("cannot create kofwinput\n");
+    thread_ready(t);
+    /*
+         * Create thread that polls keyboard.
+         */
+    t = thread_create(kkbdpoll, NULL, TASK, 0, "kkbdpoll");
+    if (!t)
+        panic("cannot create kkbdpoll\n");
+    thread_ready(t);
+}
+void calibrate_delay_loop(void)
+{
+}
+/** Acquire console back for kernel
+ *
+ */
+void arch_grab_console(void)
+{
+}
+/** Return console to userspace
+ *
+ */
+void arch_release_console(void)
+{
+}
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/sparc64/src/console.c
 ,0 → 1,188
+/*
+ * Copyright (C) 2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup sparc64
+ * @{
+ */
+/** @file
+ */
+#include <arch/console.h>
+#include <arch/types.h>
+#include <typedefs.h>
+#include <genarch/fb/fb.h>
+#include <arch/drivers/fb.h>
+#include <arch/drivers/i8042.h>
+#include <genarch/i8042/i8042.h>
+#include <genarch/ofw/ofw.h>
+#include <console/chardev.h>
+#include <console/console.h>
+#include <arch/asm.h>
+#include <arch/register.h>
+#include <proc/thread.h>
+#include <synch/mutex.h>
+#include <arch/mm/tlb.h>
+#define KEYBOARD_POLL_PAUSE 50000   /* 50ms */
+static void ofw_sparc64_putchar(chardev_t *d, const char ch);
+static char ofw_sparc64_getchar(chardev_t *d);
+static void ofw_sparc64_suspend(chardev_t *d);
+static void ofw_sparc64_resume(chardev_t *d);
+mutex_t canwork;
+static volatile int ofw_console_active;
+static chardev_t ofw_sparc64_console;
+static chardev_operations_t ofw_sparc64_console_ops = {
+    .write = ofw_sparc64_putchar,
+    .read = ofw_sparc64_getchar,
+    .resume = ofw_sparc64_resume,
+    .suspend = ofw_sparc64_suspend
+};
+/** Initialize kernel console to use OpenFirmware services. */
+void ofw_sparc64_console_init(void)
+{
+    chardev_initialize("ofw_sparc64_console", &ofw_sparc64_console, &ofw_sparc64_console_ops);
+    stdin = &ofw_sparc64_console;
+    stdout = &ofw_sparc64_console;
+    mutex_initialize(&canwork);
+    ofw_console_active = 1;
+}
+/** Initialize kernel console to use framebuffer and keyboard directly. */
+void standalone_sparc64_console_init(void)
+{
+    ofw_console_active = 0;
+    stdin = NULL;
+    kbd_init();
+    fb_init(FB_PHYS_ADDRESS, FB_X_RES, FB_Y_RES, FB_COLOR_DEPTH, FB_X_RES * FB_COLOR_DEPTH / 8);
+}
+/** Write one character using OpenFirmware.
+ *
+ * @param d Character device (ignored).
+ * @param ch Character to be written.
+ */
+void ofw_sparc64_putchar(chardev_t *d, const char ch)
+{
+    pstate_reg_t pstate;
+    /*
+     * 32-bit OpenFirmware depends on PSTATE.AM bit set.
+     */
+    pstate.value = pstate_read();
+    pstate.am = true;
+    pstate_write(pstate.value);
+    if (ch == '\n')
+        ofw_putchar('\r');
+    ofw_putchar(ch);
+    pstate.am = false;
+    pstate_write(pstate.value);
+}
+/** Read one character using OpenFirmware.
+ *
+ * The call is non-blocking.
+ *
+ * @param d Character device (ignored).
+ * @return Character read or zero if no character was read.
+ */
+char ofw_sparc64_getchar(chardev_t *d)
+{
+    char ch;
+    pstate_reg_t pstate;
+    /*
+     * 32-bit OpenFirmware depends on PSTATE.AM bit set.
+     */
+    pstate.value = pstate_read();
+    pstate.am = true;
+    pstate_write(pstate.value);
+    ch = ofw_getchar();
+    pstate.am = false;
+    pstate_write(pstate.value);
+    return ch;
+}
+void ofw_sparc64_suspend(chardev_t *d)
+{
+    mutex_lock(&canwork);
+}
+void ofw_sparc64_resume(chardev_t *d)
+{
+    mutex_unlock(&canwork);
+}
+/** Kernel thread for pushing characters read from OFW to input buffer.
+ *
+ * @param arg Ignored.
+ */
+void kofwinput(void *arg)
+{
+    while (ofw_console_active) {
+        char ch = 0;
+        mutex_lock(&canwork);
+        mutex_unlock(&canwork);
+        ch = ofw_sparc64_getchar(NULL);
+        if (ch) {
+            if (ch == '\r')
+                ch = '\n';
+            chardev_push_character(&ofw_sparc64_console, ch);
+        }
+        thread_usleep(KEYBOARD_POLL_PAUSE);
+    }
+}
+/** Kernel thread for polling keyboard.
+ *
+ * @param arg Ignored.
+ */
+void kkbdpoll(void *arg)
+{
+    while (1) {
+        i8042_poll();
+        thread_usleep(KEYBOARD_POLL_PAUSE);
+    }
+}
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/sparc64/src/drivers/i8042.c
 ,0 → 1,50
+/*
+ * Copyright (C) 2006 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup sparc64
+ * @{
+ */
+/** @file
+ */
+#include <arch/drivers/i8042.h>
+#include <genarch/i8042/i8042.h>
+#include <arch/types.h>
+#include <arch/mm/page.h>
+volatile __u8 *kbd_virt_address = NULL;
+void kbd_init()
+{
+    kbd_virt_address = (__u8 *) hw_map(KBD_PHYS_ADDRESS, LAST_REG);
+    i8042_init();
+}
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/sparc64/src/drivers/tick.c
 ,0 → 1,93
+/*
+ * Copyright (C) 2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup sparc64
+ * @{
+ */
+/** @file
+ */
+#include <arch/drivers/tick.h>
+#include <arch/interrupt.h>
+#include <arch/asm.h>
+#include <arch/register.h>
+#include <debug.h>
+#include <time/clock.h>
+#include <typedefs.h>
+/** Initialize tick interrupt. */
+void tick_init(void)
+{
+    tick_compare_reg_t compare;
+    interrupt_register(14, "tick_int", tick_interrupt);
+    compare.int_dis = false;
+    compare.tick_cmpr = TICK_DELTA;
+    tick_compare_write(compare.value);
+    tick_write(0);
+}
+/** Process tick interrupt.
+ *
+ * @param n Interrupt Level, 14,  (can be ignored)
+ * @param istate Interrupted state.
+ */
+void tick_interrupt(int n, istate_t *istate)
+{
+    softint_reg_t softint, clear;
+    softint.value = softint_read();
+    /*
+     * Make sure we are servicing interrupt_level_14
+     */
+    ASSERT(n == 14);
+    /*
+     * Make sure we are servicing TICK_INT.
+     */
+    ASSERT(softint.tick_int);
+    /*
+     * Clear tick interrupt.
+     */
+    clear.value = 0;
+    clear.tick_int = 1;
+    clear_softint_write(clear.value);
+    /*
+     * Restart counter.
+     */
+    tick_write(0);
+    clock();
+}
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/sparc64/src/asm.S
 ,0 → 1,53
+#
+# Copyright (C) 2005 Jakub Jermar
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# - Redistributions of source code must retain the above copyright
+#   notice, this list of conditions and the following disclaimer.
+# - Redistributions in binary form must reproduce the above copyright
+#   notice, this list of conditions and the following disclaimer in the
+#   documentation and/or other materials provided with the distribution.
+# - The name of the author may not be used to endorse or promote products
+#   derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+.text
+.global memcpy
+.global memcpy_from_uspace
+.global memcpy_to_uspace
+.global memcpy_from_uspace_failover_address
+.global memcpy_to_uspace_failover_address
+.global memsetb
+memcpy:
+memcpy_from_uspace:
+memcpy_to_uspace:
+    b _memcpy
+    nop
+memcpy_from_uspace_failover_address:
+memcpy_to_uspace_failover_address:
+    b memcpy_from_uspace_failover_address
+    nop
+memsetb:
+    b _memsetb
+    nop

 /tags/0.2.0.2/kernel/arch/sparc64/src/dummy.s
 ,0 → 1,68
+#
+# Copyright (C) 2005 Jakub Jermar
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# - Redistributions of source code must retain the above copyright
+#   notice, this list of conditions and the following disclaimer.
+# - Redistributions in binary form must reproduce the above copyright
+#   notice, this list of conditions and the following disclaimer in the
+#   documentation and/or other materials provided with the distribution.
+# - The name of the author may not be used to endorse or promote products
+#   derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+.text
+.global asm_delay_loop
+.global cpu_sleep
+.global fmath_dpow
+.global fmath_fint
+.global fmath_get_decimal_exponent
+.global fmath_is_infinity
+.global fmath_is_nan
+.global fpu_context_restore
+.global fpu_context_save
+.global fpu_enable
+.global fpu_init
+.global userspace
+.global sys_tls_set
+.global dummy
+asm_delay_loop:
+cpu_sleep:
+fmath_dpow:
+fmath_fint:
+fmath_get_decimal_exponent:
+fmath_is_infinity:
+fmath_is_nan:
+fpu_context_restore:
+fpu_context_save:
+fpu_enable:
+fpu_init:
+userspace:
+sys_tls_set:
+dummy:
+    retl
+    nop
+.global cpu_halt
+cpu_halt:
+    b cpu_halt
+    nop

 /tags/0.2.0.2/kernel/arch/sparc64/src/start.S
 ,0 → 1,113
+#
+# Copyright (C) 2005 Jakub Jermar
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# - Redistributions of source code must retain the above copyright
+#   notice, this list of conditions and the following disclaimer.
+# - Redistributions in binary form must reproduce the above copyright
+#   notice, this list of conditions and the following disclaimer in the
+#   documentation and/or other materials provided with the distribution.
+# - The name of the author may not be used to endorse or promote products
+#   derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+#include <arch/boot/boot.h>
+.register %g2, #scratch
+.register %g3, #scratch
+.register %g6, #scratch
+.register %g7, #scratch
+.section K_TEXT_START, "ax"
+/*
+ * Here is where the kernel is passed control.
+ * The code must be position independent until
+ * the kernel relocates itself to its VMA.
+ */
+.global kernel_image_start
+kernel_image_start:
+:
+    b 1f
+    nop
+/*
+ * This header forces SILO to load the kernel at 0x4000.
+ * More precisely, SILO will think this is an old version of Linux.
+ */
+.ascii "HdrS"
+.word 0
+.half 0
+.align 8
+:
+    flushw              ! flush all but the active register window
+    /*
+     * Prepare to copy the kernel image to 4M.
+     */
+    set LMA, %g1            ! source address
+    set VMA, %g2            ! destination address
+    set hardcoded_ktext_size, %g3   ! link address of hardcoded_ktext_size
+    set hardcoded_kdata_size, %g4   ! link address of hardcoded_kdata_size
+    sub %g3, %g2, %g3       ! offset of hardcoded_ktext_size from the beginning of the load address
+    sub %g4, %g2, %g4       ! offset of hardcoded_kdata_size from the beginning of the load address
+    ldx [%g3 + %g1], %g3        ! hardcoded_ktext_size -> %g3
+    ldx [%g4 + %g1], %g4        ! hardcoded_kdata_size -> %g4
+    add %g3, %g4, %g3       ! size of kernel text and data
+    /*
+     * Start copying the kernel from higher addresses towards lower addresses.
+     */
+:  dec %g3
+    ldub [%g1 + %g3], %g4
+    stb %g4, [%g2 + %g3]
+    cmp %g3, 0
+    bnz 2b
+    nop
+    set relocated, %g1
+    jmp %g1
+    nop
+relocated:
+    set ofw, %l0
+    call ofw_init
+    stx %o4, [%l0]
+    call ofw_init_memmap
+    nop
+    wrpr %r0, 0, %pil
+    call main_bsp
+    nop
+    /* Not reached. */
+:
+    b 2b
+    nop

 /tags/0.2.0.2/kernel/arch/sparc64/src/panic.S
 ,0 → 1,40
+#
+# Copyright (C) 2005 Jakub Jermar
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# - Redistributions of source code must retain the above copyright
+#   notice, this list of conditions and the following disclaimer.
+# - Redistributions in binary form must reproduce the above copyright
+#   notice, this list of conditions and the following disclaimer in the
+#   documentation and/or other materials provided with the distribution.
+# - The name of the author may not be used to endorse or promote products
+#   derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+.text
+#include <arch/stack.h>
+.global panic_printf
+panic_printf:
+    call printf
+    nop
+    call halt
+    nop
+    /* Not reached. */

 /tags/0.2.0.2/kernel/arch/sparc64/src/context.S
 ,0 → 1,108
+#
+# Copyright (C) 2005 Jakub Jermar
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# - Redistributions of source code must retain the above copyright
+#   notice, this list of conditions and the following disclaimer.
+# - Redistributions in binary form must reproduce the above copyright
+#   notice, this list of conditions and the following disclaimer in the
+#   documentation and/or other materials provided with the distribution.
+# - The name of the author may not be used to endorse or promote products
+#   derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+#include <arch/context_offset.h>
+#include <arch/stack.h>
+/**
+ * Both context_save_arch() and context_restore_arch() are
+ * leaf-optimized procedures. This kind of optimization
+ * is very important and prevents any implicit window
+ * spill/fill/clean traps in these very core kernel
+ * functions.
+ */
+.text
+.global context_save_arch
+.global context_restore_arch
+.macro CONTEXT_STORE r
+    stx %sp, [\r + OFFSET_SP]
+    stx %o7, [\r + OFFSET_PC]
+    stx %i0, [\r + OFFSET_I0]
+    stx %i1, [\r + OFFSET_I1]
+    stx %i2, [\r + OFFSET_I2]
+    stx %i3, [\r + OFFSET_I3]
+    stx %i4, [\r + OFFSET_I4]
+    stx %i5, [\r + OFFSET_I5]
+    stx %fp, [\r + OFFSET_FP]
+    stx %i7, [\r + OFFSET_I7]
+    stx %l0, [\r + OFFSET_L0]
+    stx %l1, [\r + OFFSET_L1]
+    stx %l2, [\r + OFFSET_L2]
+    stx %l3, [\r + OFFSET_L3]
+    stx %l4, [\r + OFFSET_L4]
+    stx %l5, [\r + OFFSET_L5]
+    stx %l6, [\r + OFFSET_L6]
+    stx %l7, [\r + OFFSET_L7]
+    rdpr %cleanwin, %g1
+    stx %g1, [\r + OFFSET_CLEANWIN]
+.endm
+.macro CONTEXT_LOAD r
+    ldx [\r + OFFSET_SP], %sp
+    ldx [\r + OFFSET_PC], %o7
+    ldx [\r + OFFSET_I0], %i0
+    ldx [\r + OFFSET_I1], %i1
+    ldx [\r + OFFSET_I2], %i2
+    ldx [\r + OFFSET_I3], %i3
+    ldx [\r + OFFSET_I4], %i4
+    ldx [\r + OFFSET_I5], %i5
+    ldx [\r + OFFSET_FP], %fp
+    ldx [\r + OFFSET_I7], %i7
+    ldx [\r + OFFSET_L0], %l0
+    ldx [\r + OFFSET_L1], %l1
+    ldx [\r + OFFSET_L2], %l2
+    ldx [\r + OFFSET_L3], %l3
+    ldx [\r + OFFSET_L4], %l4
+    ldx [\r + OFFSET_L5], %l5
+    ldx [\r + OFFSET_L6], %l6
+    ldx [\r + OFFSET_L7], %l7
+    ldx [\r + OFFSET_CLEANWIN], %g1
+    wrpr %g1, %g0, %cleanwin
+.endm
+context_save_arch:
+    CONTEXT_STORE %o0
+    retl
+    mov 1, %o0      ! context_save_arch returns 1
+context_restore_arch:
+    #
+    # Flush all active windows.
+    # This is essential, because CONTEXT_LOAD overwrites
+    # %sp of CWP - 1 with the value written to %fp of CWP.
+    # Flushing all active windows mitigates this problem
+    # as CWP - 1 becomes the overlap window.
+    #
+    flushw
+    CONTEXT_LOAD %o0
+    retl
+    xor %o0, %o0, %o0   ! context_restore_arch returns 0

 /tags/0.2.0.2/kernel/arch/sparc64/include/cpu.h
 ,0 → 1,60
+/*
+ * Copyright (C) 2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/** @addtogroup sparc64
+ * @{
+ */
+/** @file
+ */
+#ifndef __sparc64_CPU_H__
+#define __sparc64_CPU_H__
+#include <arch/register.h>
+#define MANUF_FUJITSU       0x04
+#define MANUF_ULTRASPARC    0x17    /**< UltraSPARC I, UltraSPARC II */
+#define MANUF_SUN       0x3e
+#define IMPL_ULTRASPARCI    0x10
+#define IMPL_ULTRASPARCII   0x11
+#define IMPL_ULTRASPARCII_I 0x12
+#define IMPL_ULTRASPARCII_E 0x13
+#define IMPL_ULTRASPARCIII  0x15
+#define IMPL_ULTRASPARCIV_PLUS  0x19
+#define IMPL_SPARC64V       0x5
+struct cpu_arch {
+    ver_reg_t ver;
+};
+#endif
+/** @}
+ */

 /tags/0.2.0.2/kernel/arch/sparc64/include/asm.h
 ,0 → 1,317
+/*
+ * Copyright (C) 2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup sparc64
+ * @{
+ */
+/** @file
+ */
+#ifndef __sparc64_ASM_H__
+#define __sparc64_ASM_H__
+#include <typedefs.h>
+#include <arch/types.h>
+#include <arch/register.h>
+#include <config.h>
+/** Read Processor State register.
+ *
+ * @return Value of PSTATE register.
+ */
+static inline __u64 pstate_read(void)
+{
+    __u64 v;
+    __asm__ volatile ("rdpr %%pstate, %0\n" : "=r" (v));
+    return v;
+}
+/** Write Processor State register.
+ *
+ * @param v New value of PSTATE register.
+ */
+static inline void pstate_write(__u64 v)
+{
+    __asm__ volatile ("wrpr %0, %1, %%pstate\n" : : "r" (v), "i" (0));
+}
+/** Read TICK_compare Register.
+ *
+ * @return Value of TICK_comapre register.
+ */
+static inline __u64 tick_compare_read(void)
+{
+    __u64 v;
+    __asm__ volatile ("rd %%tick_cmpr, %0\n" : "=r" (v));
+    return v;
+}
+/** Write TICK_compare Register.
+ *
+ * @param v New value of TICK_comapre register.
+ */
+static inline void tick_compare_write(__u64 v)
+{
+    __asm__ volatile ("wr %0, %1, %%tick_cmpr\n" : : "r" (v), "i" (0));
+}
+/** Read TICK Register.
+ *
+ * @return Value of TICK register.
+ */
+static inline __u64 tick_read(void)
+{
+    __u64 v;
+    __asm__ volatile ("rdpr %%tick, %0\n" : "=r" (v));
+    return v;
+}
+/** Write TICK Register.
+ *
+ * @param v New value of TICK register.
+ */
+static inline void tick_write(__u64 v)
+{
+    __asm__ volatile ("wrpr %0, %1, %%tick\n" : : "r" (v), "i" (0));
+}
+/** Read SOFTINT Register.
+ *
+ * @return Value of SOFTINT register.
+ */
+static inline __u64 softint_read(void)
+{
+    __u64 v;
+    __asm__ volatile ("rd %%softint, %0\n" : "=r" (v));
+    return v;
+}
+/** Write SOFTINT Register.
+ *
+ * @param v New value of SOFTINT register.
+ */
+static inline void softint_write(__u64 v)
+{
+    __asm__ volatile ("wr %0, %1, %%softint\n" : : "r" (v), "i" (0));
+}
+/** Write CLEAR_SOFTINT Register.
+ *
+ * Bits set in CLEAR_SOFTINT register will be cleared in SOFTINT register.
+ *
+ * @param v New value of CLEAR_SOFTINT register.
+ */
+static inline void clear_softint_write(__u64 v)
+{
+    __asm__ volatile ("wr %0, %1, %%clear_softint\n" : : "r" (v), "i" (0));
+}
+/** Enable interrupts.
+ *
+ * Enable interrupts and return previous
+ * value of IPL.
+ *
+ * @return Old interrupt priority level.
+ */
+static inline ipl_t interrupts_enable(void) {
+    pstate_reg_t pstate;
+    __u64 value;
+    value = pstate_read();
+    pstate.value = value;
+    pstate.ie = true;
+    pstate_write(pstate.value);
+    return (ipl_t) value;
+}
+/** Disable interrupts.
+ *
+ * Disable interrupts and return previous
+ * value of IPL.
+ *
+ * @return Old interrupt priority level.
+ */
+static inline ipl_t interrupts_disable(void) {
+    pstate_reg_t pstate;
+    __u64 value;
+    value = pstate_read();
+    pstate.value = value;
+    pstate.ie = false;
+    pstate_write(pstate.value);
+    return (ipl_t) value;
+}
+/** Restore interrupt priority level.
+ *
+ * Restore IPL.
+ *
+ * @param ipl Saved interrupt priority level.
+ */
+static inline void interrupts_restore(ipl_t ipl) {
+    pstate_reg_t pstate;
+    pstate.value = pstate_read();
+    pstate.ie = ((pstate_reg_t) ipl).ie;
+    pstate_write(pstate.value);
+}
+/** Return interrupt priority level.
+ *
+ * Return IPL.
+ *
+ * @return Current interrupt priority level.
+ */
+static inline ipl_t interrupts_read(void) {
+    return (ipl_t) pstate_read();
+}
+/** Return base address of current stack.
+ *
+ * Return the base address of the current stack.
+ * The stack is assumed to be STACK_SIZE bytes long.
+ * The stack must start on page boundary.
+ */
+static inline __address get_stack_base(void)
+{
+    __address v;
+    __asm__ volatile ("and %%sp, %1, %0\n" : "=r" (v) : "r" (~(STACK_SIZE-1)));
+    return v;
+}
+/** Read Version Register.
+ *
+ * @return Value of VER register.
+ */
+static inline __u64 ver_read(void)
+{
+    __u64 v;
+    __asm__ volatile ("rdpr %%ver, %0\n" : "=r" (v));
+    return v;
+}
+/** Read Trap Base Address register.
+ *
+ * @return Current value in TBA.
+ */
+static inline __u64 tba_read(void)
+{
+    __u64 v;
+    __asm__ volatile ("rdpr %%tba, %0\n" : "=r" (v));
+    return v;
+}
+/** Read Trap Program Counter register.
+ *
+ * @return Current value in TPC.
+ */
+static inline __u64 tpc_read(void)
+{
+    __u64 v;
+    __asm__ volatile ("rdpr %%tpc, %0\n" : "=r" (v));
+    return v;
+}
+/** Read Trap Level register.
+ *
+ * @return Current value in TL.
+ */
+static inline __u64 tl_read(void)
+{
+    __u64 v;
+    __asm__ volatile ("rdpr %%tl, %0\n" : "=r" (v));
+    return v;
+}
+/** Write Trap Base Address register.
+ *
+ * @param v New value of TBA.
+ */
+static inline void tba_write(__u64 v)
+{
+    __asm__ volatile ("wrpr %0, %1, %%tba\n" : : "r" (v), "i" (0));
+}
+/** Load __u64 from alternate space.
+ *
+ * @param asi ASI determining the alternate space.
+ * @param va Virtual address within the ASI.
+ *
+ * @return Value read from the virtual address in the specified address space.
+ */
+static inline __u64 asi_u64_read(asi_t asi, __address va)
+{
+    __u64 v;
+    __asm__ volatile ("ldxa [%1] %2, %0\n" : "=r" (v) : "r" (va), "i" (asi));
+    return v;
+}
+/** Store __u64 to alternate space.
+ *
+ * @param asi ASI determining the alternate space.
+ * @param va Virtual address within the ASI.
+ * @param v Value to be written.
+ */
+static inline void asi_u64_write(asi_t asi, __address va, __u64 v)
+{
+    __asm__ volatile ("stxa %0, [%1] %2\n" : :  "r" (v), "r" (va), "i" (asi) : "memory");
+}
+void cpu_halt(void);
+void cpu_sleep(void);
+void asm_delay_loop(__u32 t);
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/sparc64/include/debug.h
 ,0 → 1,42
+/*
+ * Copyright (C) 2005
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup sparc64debug
+ * @{
+ */
+/** @file
+ */
+#ifndef __sparc64_DEBUG_H__
+#define __sparc64_DEBUG_H__
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/sparc64/include/trap/regwin.h
 ,0 → 1,141
+/*
+ * Copyright (C) 2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/** @addtogroup sparc64interrupt
+ * @{
+ */
+/**
+ * @file
+ * @brief This file contains register window trap handlers.
+ */
+#ifndef __sparc64_REGWIN_H__
+#define __sparc64_REGWIN_H__
+#include <arch/stack.h>
+#define TT_CLEAN_WINDOW         0x24
+#define TT_SPILL_0_NORMAL       0x80
+#define TT_FILL_0_NORMAL        0xc0
+#define REGWIN_HANDLER_SIZE     128
+#define CLEAN_WINDOW_HANDLER_SIZE   REGWIN_HANDLER_SIZE
+#define SPILL_HANDLER_SIZE      REGWIN_HANDLER_SIZE
+#define FILL_HANDLER_SIZE       REGWIN_HANDLER_SIZE
+/** Window Save Area offsets. */
+#define L0_OFFSET   0
+#define L1_OFFSET   8
+#define L2_OFFSET   16
+#define L3_OFFSET   24
+#define L4_OFFSET   32
+#define L5_OFFSET   40
+#define L6_OFFSET   48
+#define L7_OFFSET   56
+#define I0_OFFSET   64
+#define I1_OFFSET   72
+#define I2_OFFSET   80
+#define I3_OFFSET   88
+#define I4_OFFSET   96
+#define I5_OFFSET   104
+#define I6_OFFSET   112
+#define I7_OFFSET   120
+#ifdef __ASM__
+.macro SPILL_NORMAL_HANDLER
+    stx %l0, [%sp + STACK_BIAS + L0_OFFSET]
+    stx %l1, [%sp + STACK_BIAS + L1_OFFSET]
+    stx %l2, [%sp + STACK_BIAS + L2_OFFSET]
+    stx %l3, [%sp + STACK_BIAS + L3_OFFSET]
+    stx %l4, [%sp + STACK_BIAS + L4_OFFSET]
+    stx %l5, [%sp + STACK_BIAS + L5_OFFSET]
+    stx %l6, [%sp + STACK_BIAS + L6_OFFSET]
+    stx %l7, [%sp + STACK_BIAS + L7_OFFSET]
+    stx %i0, [%sp + STACK_BIAS + I0_OFFSET]
+    stx %i1, [%sp + STACK_BIAS + I1_OFFSET]
+    stx %i2, [%sp + STACK_BIAS + I2_OFFSET]
+    stx %i3, [%sp + STACK_BIAS + I3_OFFSET]
+    stx %i4, [%sp + STACK_BIAS + I4_OFFSET]
+    stx %i5, [%sp + STACK_BIAS + I5_OFFSET]
+    stx %i6, [%sp + STACK_BIAS + I6_OFFSET]
+    stx %i7, [%sp + STACK_BIAS + I7_OFFSET]
+    saved
+    retry
+.endm
+.macro FILL_NORMAL_HANDLER
+    ldx [%sp + STACK_BIAS + L0_OFFSET], %l0
+    ldx [%sp + STACK_BIAS + L1_OFFSET], %l1
+    ldx [%sp + STACK_BIAS + L2_OFFSET], %l2
+    ldx [%sp + STACK_BIAS + L3_OFFSET], %l3
+    ldx [%sp + STACK_BIAS + L4_OFFSET], %l4
+    ldx [%sp + STACK_BIAS + L5_OFFSET], %l5
+    ldx [%sp + STACK_BIAS + L6_OFFSET], %l6
+    ldx [%sp + STACK_BIAS + L7_OFFSET], %l7
+    ldx [%sp + STACK_BIAS + I0_OFFSET], %i0
+    ldx [%sp + STACK_BIAS + I1_OFFSET], %i1
+    ldx [%sp + STACK_BIAS + I2_OFFSET], %i2
+    ldx [%sp + STACK_BIAS + I3_OFFSET], %i3
+    ldx [%sp + STACK_BIAS + I4_OFFSET], %i4
+    ldx [%sp + STACK_BIAS + I5_OFFSET], %i5
+    ldx [%sp + STACK_BIAS + I6_OFFSET], %i6
+    ldx [%sp + STACK_BIAS + I7_OFFSET], %i7
+    restored
+    retry
+.endm
+.macro CLEAN_WINDOW_HANDLER
+    rdpr %cleanwin, %l0
+    add %l0, 1, %l0
+    wrpr %l0, 0, %cleanwin
+    mov %r0, %l0
+    mov %r0, %l1
+    mov %r0, %l2
+    mov %r0, %l3
+    mov %r0, %l4
+    mov %r0, %l5
+    mov %r0, %l6
+    mov %r0, %l7
+    mov %r0, %o0
+    mov %r0, %o1
+    mov %r0, %o2
+    mov %r0, %o3
+    mov %r0, %o4
+    mov %r0, %o5
+    mov %r0, %o6
+    mov %r0, %o7
+    retry
+.endm
+#endif /* __ASM__ */
+#endif
+/** @}
+ */

 /tags/0.2.0.2/kernel/arch/sparc64/include/trap/interrupt.h
 ,0 → 1,81
+/*
+ * Copyright (C) 2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/** @addtogroup sparc64interrupt
+ * @{
+ */
+/**
+ * @file
+ * @brief This file contains interrupt vector trap handler.
+ */
+#ifndef __sparc64_TRAP_INTERRUPT_H__
+#define __sparc64_TRAP_INTERRUPT_H__
+#include <arch/trap/trap_table.h>
+#include <arch/stack.h>
+#define TT_INTERRUPT_LEVEL_1            0x41
+#define TT_INTERRUPT_LEVEL_2            0x42
+#define TT_INTERRUPT_LEVEL_3            0x43
+#define TT_INTERRUPT_LEVEL_4            0x44
+#define TT_INTERRUPT_LEVEL_5            0x45
+#define TT_INTERRUPT_LEVEL_6            0x46
+#define TT_INTERRUPT_LEVEL_7            0x47
+#define TT_INTERRUPT_LEVEL_8            0x48
+#define TT_INTERRUPT_LEVEL_9            0x49
+#define TT_INTERRUPT_LEVEL_10           0x4a
+#define TT_INTERRUPT_LEVEL_11           0x4b
+#define TT_INTERRUPT_LEVEL_12           0x4c
+#define TT_INTERRUPT_LEVEL_13           0x4d
+#define TT_INTERRUPT_LEVEL_14           0x4e
+#define TT_INTERRUPT_LEVEL_15           0x4f
+#define TT_INTERRUPT_VECTOR_TRAP        0x60
+#define INTERRUPT_LEVEL_N_HANDLER_SIZE      TRAP_TABLE_ENTRY_SIZE
+#define INTERRUPT_VECTOR_TRAP_HANDLER_SIZE  TRAP_TABLE_ENTRY_SIZE
+#ifdef __ASM__
+.macro INTERRUPT_LEVEL_N_HANDLER n
+    save %sp, -PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE, %sp
+    mov \n - 1, %o0
+    mov %fp, %o1
+    PREEMPTIBLE_HANDLER exc_dispatch
+.endm
+.macro INTERRUPT_VECTOR_TRAP_HANDLER
+    retry
+.endm
+#endif /* __ASM__ */
+#endif
+/** @}
+ */

 /tags/0.2.0.2/kernel/arch/sparc64/include/trap/trap_table.h
 ,0 → 1,102
+/*
+ * Copyright (C) 2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/** @addtogroup sparc64interrupt
+ * @{
+ */
+/** @file
+ */
+#ifndef __sparc64_TRAP_TABLE_H__
+#define __sparc64_TRAP_TABLE_H__
+#ifndef __ASM__
+#include <arch/types.h>
+#endif /* __ASM__ */
+#include <arch/stack.h>
+#define TRAP_TABLE_ENTRY_COUNT  1024
+#define TRAP_TABLE_ENTRY_SIZE   32
+#define TRAP_TABLE_SIZE     (TRAP_TABLE_ENTRY_COUNT*TRAP_TABLE_ENTRY_SIZE)
+#ifndef __ASM__
+struct trap_table_entry {
+    __u8 octets[TRAP_TABLE_ENTRY_SIZE];
+} __attribute__ ((packed));
+typedef struct trap_table_entry trap_table_entry_t;
+extern trap_table_entry_t trap_table[TRAP_TABLE_ENTRY_COUNT];
+extern trap_table_entry_t trap_table_save[TRAP_TABLE_ENTRY_COUNT];
+#endif /* !__ASM__ */
+#ifdef __ASM__
+.macro SAVE_GLOBALS
+    mov %g1, %l1
+    mov %g2, %l2
+    mov %g3, %l3
+    mov %g4, %l4
+    mov %g5, %l5
+    mov %g6, %l6
+    mov %g7, %l7
+.endm
+.macro RESTORE_GLOBALS
+    mov %l1, %g1
+    mov %l2, %g2
+    mov %l3, %g3
+    mov %l4, %g4
+    mov %l5, %g5
+    mov %l6, %g6
+    mov %l7, %g7
+.endm
+#define PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE    (STACK_WINDOW_SAVE_AREA_SIZE+(4*8))
+#define SAVED_TSTATE    -(1*8)
+#define SAVED_TPC   -(2*8)
+#define SAVED_TNPC  -(3*8)
+#define SAVED_PSTATE    -(4*8)
+.macro PREEMPTIBLE_HANDLER f
+    set \f, %l0
+    b preemptible_handler
+    nop
+.endm
+.macro SIMPLE_HANDLER f
+    call \f
+    nop
+.endm
+#endif /* __ASM__ */
+#endif
+/** @}
+ */

 /tags/0.2.0.2/kernel/arch/sparc64/include/trap/exception.h
 ,0 → 1,55
+/*
+ * Copyright (C) 2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/** @addtogroup sparc64interrupt
+ * @{
+ */
+/**
+ * @file
+ */
+#ifndef __sparc64_EXCEPTION_H__
+#define __sparc64_EXCEPTION_H__
+#define TT_INSTRUCTION_ACCESS_EXCEPTION     0x08
+#define TT_ILLEGAL_INSTRUCTION          0x10
+#define TT_DATA_ACCESS_ERROR            0x32
+#define TT_MEM_ADDRESS_NOT_ALIGNED      0x34
+#ifndef __ASM__
+extern void do_instruction_access_exc(void);
+extern void do_mem_address_not_aligned(void);
+extern void do_data_access_error(void);
+extern void do_illegal_instruction(void);
+#endif /* !__ASM__ */
+#endif
+/** @}
+ */

 /tags/0.2.0.2/kernel/arch/sparc64/include/trap/mmu.h
 ,0 → 1,77
+/*
+ * Copyright (C) 2006 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/** @addtogroup sparc64interrupt
+ * @{
+ */
+/**
+ * @file
+ * @brief This file contains fast MMU trap handlers.
+ */
+#ifndef __sparc64_MMU_TRAP_H__
+#define __sparc64_MMU_TRAP_H__
+#include <arch/stack.h>
+#define TT_FAST_INSTRUCTION_ACCESS_MMU_MISS 0x64
+#define TT_FAST_DATA_ACCESS_MMU_MISS        0x68
+#define TT_FAST_DATA_ACCESS_PROTECTION      0x6c
+#define FAST_MMU_HANDLER_SIZE           128
+#ifdef __ASM__
+.macro FAST_INSTRUCTION_ACCESS_MMU_MISS_HANDLER
+    save %sp, -STACK_WINDOW_SAVE_AREA_SIZE, %sp
+    call fast_instruction_access_mmu_miss
+    nop
+    restore
+    retry
+.endm
+.macro FAST_DATA_ACCESS_MMU_MISS_HANDLER
+    save %sp, -STACK_WINDOW_SAVE_AREA_SIZE, %sp
+    call fast_data_access_mmu_miss
+    nop
+    restore
+    retry
+.endm
+.macro FAST_DATA_ACCESS_PROTECTION_HANDLER
+    save %sp, -STACK_WINDOW_SAVE_AREA_SIZE, %sp
+    call fast_data_access_protection
+    nop
+    restore
+    retry
+.endm
+#endif /* __ASM__ */
+#endif
+/** @}
+ */

 /tags/0.2.0.2/kernel/arch/sparc64/include/trap/trap.h
 ,0 → 1,54
+/*
+ * Copyright (C) 2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/** @addtogroup sparc64interrupt
+ * @{
+ */
+/** @file
+ */
+#ifndef __sparc64_TRAP_H__
+#define __sparc64_TRAP_H__
+#include <arch/trap/trap_table.h>
+#include <arch/asm.h>
+/** Switch to in-kernel trap table. */
+static inline void trap_switch_trap_table(void)
+{
+    /* Point TBA to kernel copy of OFW's trap table. */
+    tba_write((__u64) trap_table);
+}
+extern void trap_init(void);
+#endif
+/** @}
+ */

 /tags/0.2.0.2/kernel/arch/sparc64/include/context_offset.h
 ,0 → 1,25
+/* This file is automatically generated by gencontext.c. */
+/* struct context */
+#define OFFSET_SP       0x0
+#define OFFSET_PC       0x8
+#define OFFSET_I0       0x10
+#define OFFSET_I1       0x18
+#define OFFSET_I2       0x20
+#define OFFSET_I3       0x28
+#define OFFSET_I4       0x30
+#define OFFSET_I5       0x38
+#define OFFSET_FP       0x40
+#define OFFSET_I7       0x48
+#define OFFSET_L0       0x50
+#define OFFSET_L1       0x58
+#define OFFSET_L2       0x60
+#define OFFSET_L3       0x68
+#define OFFSET_L4       0x70
+#define OFFSET_L5       0x78
+#define OFFSET_L6       0x80
+#define OFFSET_L7       0x88
+#define OFFSET_CLEANWIN 0x98
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/sparc64/include/interrupt.h
 ,0 → 1,79
+/*
+ * Copyright (C) 2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup sparc64interrupt sparc64
+ * @ingroup interrupt
+ * @{
+ */
+/** @file
+ */
+#ifndef __sparc64_INTERRUPT_H__
+#define __sparc64_INTERRUPT_H__
+#include <typedefs.h>
+#include <arch/types.h>
+#define IRQ_COUNT   1   /* TODO */
+#define IVT_ITEMS   15
+#define IVT_FIRST   1
+/* Dummy macros. */
+#define IRQ_KBD     2
+#define VECTOR_KBD  IRQ_KBD
+#define trap_virtual_enable_irqs(x)
+#define trap_virtual_eoi()
+struct istate {
+};
+static inline void istate_set_retaddr(istate_t *istate, __address retaddr)
+{
+    /* TODO */
+}
+static inline int istate_from_uspace(istate_t *istate)
+{
+    /* TODO */
+    return 0;
+}
+static inline __native istate_get_pc(istate_t *istate)
+{
+    /* TODO */
+    return 0;
+}
+extern void interrupt_register(int n, const char *name, iroutine f);
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/sparc64/include/fpu_context.h
 ,0 → 1,47
+/*
+ * Copyright (C) 2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup sparc64
+ * @{
+ */
+/** @file
+ */
+#ifndef __sparc64_FPU_CONTEXT_H__
+#define __sparc64_FPU_CONTEXT_H__
+#include <arch/types.h>
+struct fpu_context {
+};
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/sparc64/include/byteorder.h
 ,0 → 1,55
+/*
+ * Copyright (C) 2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup sparc64
+ * @{
+ */
+/** @file
+ */
+#ifndef __sparc64_BYTEORDER_H__
+#define __sparc64_BYTEORDER_H__
+#include <arch/types.h>
+#include <byteorder.h>
+static inline __u64 __u64_le2host(__u64 n)
+{
+    return __u64_byteorder_swap(n);
+}
+static inline __native __native_le2host(__native n)
+{
+    return __u64_byteorder_swap(n);
+}
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/sparc64/include/console.h
 ,0 → 1,47
+/*
+ * Copyright (C) 2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup sparc64
+ * @{
+ */
+/** @file
+ */
+#ifndef __sparc64_CONSOLE_H__
+#define __sparc64_CONSOLE_H__
+extern void kofwinput(void *arg);
+extern void kkbdpoll(void *arg);
+extern void ofw_sparc64_console_init(void);
+extern void standalone_sparc64_console_init(void);
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/sparc64/include/types.h
 ,0 → 1,66
+/*
+ * Copyright (C) 2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup sparc64
+ * @{
+ */
+/** @file
+ */
+#ifndef __sparc64_TYPES_H__
+#define __sparc64_TYPES_H__
+#define NULL    0
+typedef signed char __s8;
+typedef signed short __s16;
+typedef signed int __s32;
+typedef signed long __s64;
+typedef unsigned char __u8;
+typedef unsigned short __u16;
+typedef unsigned int __u32;
+typedef unsigned long __u64;
+typedef __u64 __address;
+typedef __u64 pfn_t;
+typedef __u64 ipl_t;
+typedef __u64 __native;
+typedef __s64 __snative;
+typedef struct pte pte_t;
+typedef __u8 asi_t;
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/sparc64/include/stack.h
 ,0 → 1,57
+/*
+ * Copyright (C) 2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup sparc64
+ * @{
+ */
+/** @file
+ */
+#ifndef __sparc64_STACK_H__
+#define __sparc64_STACK_H__
+#define STACK_ITEM_SIZE         8
+/** According to SPARC Compliance Definition, every stack frame is 16-byte aligned. */
+#define STACK_ALIGNMENT         16
+/**
+ * 16-extended-word save area for %i[0-7] and %l[0-7] registers.
+ */
+#define STACK_WINDOW_SAVE_AREA_SIZE (16*STACK_ITEM_SIZE)
+/**
+ * By convention, the actual top of the stack is %sp + STACK_BIAS.
+ */
+#define STACK_BIAS            2047
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/sparc64/include/elf.h
 ,0 → 1,46
+/*
+ * Copyright (C) 2006 Sergey Bondari
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup sparc64
+ * @{
+ */
+/** @file
+ */
+#ifndef __sparc64_ELF_H__
+#define __sparc64_ELF_H__
+#define ELF_MACHINE     EM_SPARCV9
+#define ELF_DATA_ENCODING   ELFDATA2MSB
+#define ELF_CLASS       ELFCLASS64
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/sparc64/include/memstr.h
 ,0 → 1,49
+/*
+ * Copyright (C) 2005 Sergey Bondari
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup sparc64
+ * @{
+ */
+/** @file
+ */
+#ifndef __sparc64_MEMSTR_H__
+#define __sparc64_MEMSTR_H__
+#define memcpy(dst, src, cnt)  __builtin_memcpy((dst), (src), (cnt))
+extern void memsetw(__address dst, size_t cnt, __u16 x);
+extern void memsetb(__address dst, size_t cnt, __u8 x);
+extern int memcmp(__address src, __address dst, int cnt);
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/sparc64/include/arg.h
 ,0 → 1,44
+/*
+ * Copyright (C) 2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup sparc64
+ * @{
+ */
+/** @file
+ */
+#ifndef __sparc64_ARG_H__
+#define __sparc64_ARG_H__
+#include <stdarg.h>
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/sparc64/include/atomic.h
 ,0 → 1,104
+/*
+ * Copyright (C) 2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup sparc64
+ * @{
+ */
+/** @file
+ */
+#ifndef __sparc64_ATOMIC_H__
+#define __sparc64_ATOMIC_H__
+#include <arch/types.h>
+#include <typedefs.h>
+/** Atomic add operation.
+ *
+ * Use atomic compare and swap operation to atomically add signed value.
+ *
+ * @param val Atomic variable.
+ * @param i Signed value to be added.
+ *
+ * @return Value of the atomic variable as it existed before addition.
+ */
+static inline long atomic_add(atomic_t *val, int i)
+{
+    __u64 a, b;
+    volatile __u64 x = (__u64) &val->count;
+    __asm__ volatile (
+        "0:\n"
+        "ldx %0, %1\n"
+        "add %1, %3, %2\n"
+        "casx %0, %1, %2\n"
+        "cmp %1, %2\n"
+        "bne 0b\n"      /* The operation failed and must be attempted again if a != b. */
+        "nop\n"
+        : "=m" (*((__u64 *)x)), "=r" (a), "=r" (b)
+        : "r" (i)
+    );
+    return a;
+}
+static inline long atomic_preinc(atomic_t *val)
+{
+    return atomic_add(val, 1) + 1;
+}
+static inline long atomic_postinc(atomic_t *val)
+{
+    return atomic_add(val, 1);
+}
+static inline long atomic_predec(atomic_t *val)
+{
+    return atomic_add(val, -1) - 1;
+}
+static inline long atomic_postdec(atomic_t *val)
+{
+    return atomic_add(val, -1);
+}
+static inline void atomic_inc(atomic_t *val)
+{
+    (void) atomic_add(val, 1);
+}
+static inline void atomic_dec(atomic_t *val)
+{
+    (void) atomic_add(val, -1);
+}
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/sparc64/include/boot/boot.h
 ,0 → 1,45
+/*
+ * Copyright (C) 2006 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup sparc64
+ * @{
+ */
+/** @file
+ */
+#ifndef __sparc64_BOOT_H__
+#define __sparc64_BOOT_H__
+#define VMA         0x400000
+#define LMA         0x4000
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/sparc64/include/arch.h
 ,0 → 1,42
+/*
+ * Copyright (C) 2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup sparc64
+ * @{
+ */
+/** @file
+ */
+#ifndef __sparc64_ARCH_H__
+#define __sparc64_ARCH_H__
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/sparc64/include/proc/task.h
 ,0 → 1,48
+/*
+ * Copyright (C) 2006 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup sparc64proc
+ * @{
+ */
+/** @file
+ */
+#ifndef __sparc64_TASK_H__
+#define __sparc64_TASK_H__
+typedef struct {
+} task_arch_t;
+#define task_create_arch(t)
+#define task_destroy_arch(t)
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/sparc64/include/proc/thread.h
 ,0 → 1,47
+/*
+ * Copyright (C) 2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup sparc64proc
+ * @{
+ */
+/** @file
+ */
+#ifndef __sparc64_THREAD_H__
+#define __sparc64_THREAD_H__
+typedef struct {
+} thread_arch_t;
+#define thread_create_arch(t)
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/sparc64/include/faddr.h
 ,0 → 1,46
+/*
+ * Copyright (C) 2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup sparc64
+ * @{
+ */
+/** @file
+ */
+#ifndef __sparc64_FADDR_H__
+#define __sparc64_FADDR_H__
+#include <arch/types.h>
+#define FADDR(fptr)     ((__address) (fptr))
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/sparc64/include/mm/frame.h
 ,0 → 1,66
+/*
+ * Copyright (C) 2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup sparc64mm
+ * @{
+ */
+/** @file
+ */
+#ifndef __sparc64_FRAME_H__
+#define __sparc64_FRAME_H__
+#define FRAME_WIDTH     13  /* 8K */
+#define FRAME_SIZE      (1<<FRAME_WIDTH)
+#ifdef KERNEL
+#ifndef __ASM__
+#include <arch/types.h>
+union frame_address {
+    __address address;
+    struct {
+        unsigned : 23;
+        __u64 pfn : 28;         /**< Physical Frame Number. */
+        unsigned offset : 13;   /**< Offset. */
+    } __attribute__ ((packed));
+};
+typedef union frame_address frame_address_t;
+extern void frame_arch_init(void);
+#endif
+#endif
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/sparc64/include/mm/memory_init.h
 ,0 → 1,46
+/*
+ * Copyright (C) 2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup sparc64mm
+ * @{
+ */
+/** @file
+ */
+#ifndef __sparc64_MEMORY_INIT_H__
+#define __sparc64_MEMORY_INIT_H__
+#include <typedefs.h>
+extern size_t get_memory_size(void);
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/sparc64/include/mm/page.h
 ,0 → 1,70
+/*
+ * Copyright (C) 2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup sparc64mm
+ * @{
+ */
+/** @file
+ */
+#ifndef __sparc64_PAGE_H__
+#define __sparc64_PAGE_H__
+#include <arch/mm/frame.h>
+#define PAGE_WIDTH  FRAME_WIDTH
+#define PAGE_SIZE   FRAME_SIZE
+#ifdef KERNEL
+#include <mm/page.h>
+#include <arch/types.h>
+#include <genarch/mm/page_ht.h>
+#define KA2PA(x)    ((__address) (x))
+#define PA2KA(x)    ((__address) (x))
+union page_address {
+    __address address;
+    struct {
+        __u64 vpn : 51;     /**< Virtual Page Number. */
+        unsigned offset : 13;   /**< Offset. */
+    } __attribute__ ((packed));
+};
+typedef union page_address page_address_t;
+extern void page_arch_init(void);
+#endif /* KERNEL */
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/sparc64/include/mm/tte.h
 ,0 → 1,82
+/*
+ * Copyright (C) 2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup sparc64mm
+ * @{
+ */
+/** @file
+ */
+#ifndef __sparc64_TTE_H__
+#define __sparc64_TTE_H__
+#include <arch/types.h>
+/** Translation Table Entry - Tag. */
+union tte_tag {
+    __u64 value;
+    struct {
+        unsigned g : 1;     /**< Global. */
+        unsigned : 2;       /**< Reserved. */
+        unsigned context : 13;  /**< Context identifier. */
+        unsigned : 6;       /**< Reserved. */
+        __u64 va_tag : 42;  /**< Virtual Address Tag, bits 63:22. */
+    } __attribute__ ((packed));
+};
+typedef union tte_tag tte_tag_t;
+/** Translation Table Entry - Data. */
+union tte_data {
+    __u64 value;
+    struct {
+        unsigned v : 1;     /**< Valid. */
+        unsigned size : 2;  /**< Page size of this entry. */
+        unsigned nfo : 1;   /**< No-Fault-Only. */
+        unsigned ie : 1;    /**< Invert Endianness. */
+        unsigned soft2 : 9; /**< Software defined field. */
+        unsigned diag : 9;  /**< Diagnostic data. */
+        unsigned pfn : 28;  /**< Physical Address bits, bits 40:13. */
+        unsigned soft : 6;  /**< Software defined field. */
+        unsigned l : 1;     /**< Lock. */
+        unsigned cp : 1;    /**< Cacheable in physically indexed cache. */
+        unsigned cv : 1;    /**< Cacheable in virtually indexed cache. */
+        unsigned e : 1;     /**< Side-effect. */
+        unsigned p : 1;     /**< Privileged. */
+        unsigned w : 1;     /**< Writable. */
+        unsigned g : 1;     /**< Global. */
+    } __attribute__ ((packed));
+};
+typedef union tte_data tte_data_t;
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/sparc64/include/mm/mmu.h
 ,0 → 1,137
+/*
+ * Copyright (C) 2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup sparc64mm
+ * @{
+ */
+/** @file
+ */
+#ifndef __sparc64_MMU_H__
+#define __sparc64_MMU_H__
+#include <arch/asm.h>
+#include <arch/barrier.h>
+#include <arch/types.h>
+#include <typedefs.h>
+/** LSU Control Register ASI. */
+#define ASI_LSU_CONTROL_REG     0x45    /**< Load/Store Unit Control Register. */
+/** I-MMU ASIs. */
+#define ASI_IMMU            0x50
+#define ASI_IMMU_TSB_8KB_PTR_REG    0x51
+#define ASI_IMMU_TSB_64KB_PTR_REG   0x52
+#define ASI_ITLB_DATA_IN_REG        0x54
+#define ASI_ITLB_DATA_ACCESS_REG    0x55
+#define ASI_ITLB_TAG_READ_REG       0x56
+#define ASI_IMMU_DEMAP          0x57
+/** Virtual Addresses within ASI_IMMU. */
+#define VA_IMMU_TAG_TARGET      0x0 /**< IMMU tag target register. */
+#define VA_IMMU_SFSR            0x18    /**< IMMU sync fault status register. */
+#define VA_IMMU_TSB_BASE        0x28    /**< IMMU TSB base register. */
+#define VA_IMMU_TAG_ACCESS      0x30    /**< IMMU TLB tag access register. */
+/** D-MMU ASIs. */
+#define ASI_DMMU            0x58
+#define ASI_DMMU_TSB_8KB_PTR_REG    0x59
+#define ASI_DMMU_TSB_64KB_PTR_REG   0x5a
+#define ASI_DMMU_TSB_DIRECT_PTR_REG 0x5b
+#define ASI_DTLB_DATA_IN_REG        0x5c
+#define ASI_DTLB_DATA_ACCESS_REG    0x5d
+#define ASI_DTLB_TAG_READ_REG       0x5e
+#define ASI_DMMU_DEMAP          0x5f
+/** Virtual Addresses within ASI_DMMU. */
+#define VA_DMMU_TAG_TARGET      0x0 /**< DMMU tag target register. */
+#define VA_PRIMARY_CONTEXT_REG      0x8 /**< DMMU primary context register. */
+#define VA_SECONDARY_CONTEXT_REG    0x10    /**< DMMU secondary context register. */
+#define VA_DMMU_SFSR            0x18    /**< DMMU sync fault status register. */
+#define VA_DMMU_SFAR            0x20    /**< DMMU sync fault address register. */
+#define VA_DMMU_TSB_BASE        0x28    /**< DMMU TSB base register. */
+#define VA_DMMU_TAG_ACCESS      0x30    /**< DMMU TLB tag access register. */
+#define VA_DMMU_VA_WATCHPOINT_REG   0x38    /**< DMMU VA data watchpoint register. */
+#define VA_DMMU_PA_WATCHPOINT_REG   0x40    /**< DMMU PA data watchpoint register. */
+/** LSU Control Register. */
+union lsu_cr_reg {
+    __u64 value;
+    struct {
+        unsigned : 23;
+        unsigned pm : 8;
+        unsigned vm : 8;
+        unsigned pr : 1;
+        unsigned pw : 1;
+        unsigned vr : 1;
+        unsigned vw : 1;
+        unsigned : 1;
+        unsigned fm : 16;
+        unsigned dm : 1;    /**< D-MMU enable. */
+        unsigned im : 1;    /**< I-MMU enable. */
+        unsigned dc : 1;    /**< D-Cache enable. */
+        unsigned ic : 1;    /**< I-Cache enable. */
+    } __attribute__ ((packed));
+};
+typedef union lsu_cr_reg lsu_cr_reg_t;
+#define immu_enable()   immu_set(true)
+#define immu_disable()  immu_set(false)
+#define dmmu_enable()   dmmu_set(true)
+#define dmmu_disable()  dmmu_set(false)
+/** Disable or Enable IMMU. */
+static inline void immu_set(bool enable)
+{
+    lsu_cr_reg_t cr;
+    cr.value = asi_u64_read(ASI_LSU_CONTROL_REG, 0);
+    cr.im = enable;
+    asi_u64_write(ASI_LSU_CONTROL_REG, 0, cr.value);
+    membar();
+}
+/** Disable or Enable DMMU. */
+static inline void dmmu_set(bool enable)
+{
+    lsu_cr_reg_t cr;
+    cr.value = asi_u64_read(ASI_LSU_CONTROL_REG, 0);
+    cr.dm = enable;
+    asi_u64_write(ASI_LSU_CONTROL_REG, 0, cr.value);
+    membar();
+}
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/sparc64/include/mm/asid.h
 ,0 → 1,51
+/*
+ * Copyright (C) 2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup sparc64mm
+ * @{
+ */
+/** @file
+ */
+#ifndef __sparc64_ASID_H__
+#define __sparc64_ASID_H__
+#include <arch/types.h>
+/*
+ * On SPARC, Context means the same thing as ASID trough out the kernel.
+ */
+typedef __u16 asid_t;
+#define ASID_MAX_ARCH       8191    /* 2^13 - 1 */
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/sparc64/include/mm/tlb.h
 ,0 → 1,423
+/*
+ * Copyright (C) 2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup sparc64mm
+ * @{
+ */
+/** @file
+ */
+#ifndef __sparc64_TLB_H__
+#define __sparc64_TLB_H__
+#include <arch/mm/tte.h>
+#include <arch/mm/mmu.h>
+#include <arch/mm/page.h>
+#include <arch/asm.h>
+#include <arch/barrier.h>
+#include <arch/types.h>
+#include <typedefs.h>
+#define ITLB_ENTRY_COUNT        64
+#define DTLB_ENTRY_COUNT        64
+/** Page sizes. */
+#define PAGESIZE_8K 0
+#define PAGESIZE_64K    1
+#define PAGESIZE_512K   2
+#define PAGESIZE_4M 3
+/** Bit width of the TLB-locked portion of kernel address space. */
+#define KERNEL_PAGE_WIDTH       22  /* 4M */
+union tlb_context_reg {
+    __u64 v;
+    struct {
+        unsigned long : 51;
+        unsigned context : 13;      /**< Context/ASID. */
+    } __attribute__ ((packed));
+};
+typedef union tlb_context_reg tlb_context_reg_t;
+/** I-/D-TLB Data In/Access Register type. */
+typedef tte_data_t tlb_data_t;
+/** I-/D-TLB Data Access Address in Alternate Space. */
+union tlb_data_access_addr {
+    __u64 value;
+    struct {
+        __u64 : 55;
+        unsigned tlb_entry : 6;
+        unsigned : 3;
+    } __attribute__ ((packed));
+};
+typedef union tlb_data_access_addr tlb_data_access_addr_t;
+typedef union tlb_data_access_addr tlb_tag_read_addr_t;
+/** I-/D-TLB Tag Read Register. */
+union tlb_tag_read_reg {
+    __u64 value;
+    struct {
+        __u64 vpn : 51;     /**< Virtual Address bits 63:13. */
+        unsigned context : 13;  /**< Context identifier. */
+    } __attribute__ ((packed));
+};
+typedef union tlb_tag_read_reg tlb_tag_read_reg_t;
+typedef union tlb_tag_read_reg tlb_tag_access_reg_t;
+/** TLB Demap Operation types. */
+#define TLB_DEMAP_PAGE      0
+#define TLB_DEMAP_CONTEXT   1
+/** TLB Demap Operation Context register encodings. */
+#define TLB_DEMAP_PRIMARY   0
+#define TLB_DEMAP_SECONDARY 1
+#define TLB_DEMAP_NUCLEUS   2
+/** TLB Demap Operation Address. */
+union tlb_demap_addr {
+    __u64 value;
+    struct {
+        __u64 vpn: 51;      /**< Virtual Address bits 63:13. */
+        unsigned : 6;       /**< Ignored. */
+        unsigned type : 1;  /**< The type of demap operation. */
+        unsigned context : 2;   /**< Context register selection. */
+        unsigned : 4;       /**< Zero. */
+    } __attribute__ ((packed));
+};
+typedef union tlb_demap_addr tlb_demap_addr_t;
+/** TLB Synchronous Fault Status Register. */
+union tlb_sfsr_reg {
+    __u64 value;
+    struct {
+        unsigned long : 39; /**< Implementation dependent. */
+        unsigned nf : 1;    /**< Nonfaulting load. */
+        unsigned asi : 8;   /**< ASI. */
+        unsigned tm : 1;    /**< TLB miss. */
+        unsigned : 1;
+        unsigned ft : 7;    /**< Fault type. */
+        unsigned e : 1;     /**< Side-effect bit. */
+        unsigned ct : 2;    /**< Context Register selection. */
+        unsigned pr : 1;    /**< Privilege bit. */
+        unsigned w : 1;     /**< Write bit. */
+        unsigned ow : 1;    /**< Overwrite bit. */
+        unsigned fv : 1;    /**< Fault Valid bit. */
+    } __attribute__ ((packed));
+};
+typedef union tlb_sfsr_reg tlb_sfsr_reg_t;
+/** Read MMU Primary Context Register.
+ *
+ * @return Current value of Primary Context Register.
+ */
+static inline __u64 mmu_primary_context_read(void)
+{
+    return asi_u64_read(ASI_DMMU, VA_PRIMARY_CONTEXT_REG);
+}
+/** Write MMU Primary Context Register.
+ *
+ * @param v New value of Primary Context Register.
+ */
+static inline void mmu_primary_context_write(__u64 v)
+{
+    asi_u64_write(ASI_DMMU, VA_PRIMARY_CONTEXT_REG, v);
+    flush();
+}
+/** Read MMU Secondary Context Register.
+ *
+ * @return Current value of Secondary Context Register.
+ */
+static inline __u64 mmu_secondary_context_read(void)
+{
+    return asi_u64_read(ASI_DMMU, VA_SECONDARY_CONTEXT_REG);
+}
+/** Write MMU Primary Context Register.
+ *
+ * @param v New value of Primary Context Register.
+ */
+static inline void mmu_secondary_context_write(__u64 v)
+{
+    asi_u64_write(ASI_DMMU, VA_PRIMARY_CONTEXT_REG, v);
+    flush();
+}
+/** Read IMMU TLB Data Access Register.
+ *
+ * @param entry TLB Entry index.
+ *
+ * @return Current value of specified IMMU TLB Data Access Register.
+ */
+static inline __u64 itlb_data_access_read(index_t entry)
+{
+    tlb_data_access_addr_t reg;
+    reg.value = 0;
+    reg.tlb_entry = entry;
+    return asi_u64_read(ASI_ITLB_DATA_ACCESS_REG, reg.value);
+}
+/** Write IMMU TLB Data Access Register.
+ *
+ * @param entry TLB Entry index.
+ * @param value Value to be written.
+ */
+static inline void itlb_data_access_write(index_t entry, __u64 value)
+{
+    tlb_data_access_addr_t reg;
+    reg.value = 0;
+    reg.tlb_entry = entry;
+    asi_u64_write(ASI_ITLB_DATA_ACCESS_REG, reg.value, value);
+    flush();
+}
+/** Read DMMU TLB Data Access Register.
+ *
+ * @param entry TLB Entry index.
+ *
+ * @return Current value of specified DMMU TLB Data Access Register.
+ */
+static inline __u64 dtlb_data_access_read(index_t entry)
+{
+    tlb_data_access_addr_t reg;
+    reg.value = 0;
+    reg.tlb_entry = entry;
+    return asi_u64_read(ASI_DTLB_DATA_ACCESS_REG, reg.value);
+}
+/** Write DMMU TLB Data Access Register.
+ *
+ * @param entry TLB Entry index.
+ * @param value Value to be written.
+ */
+static inline void dtlb_data_access_write(index_t entry, __u64 value)
+{
+    tlb_data_access_addr_t reg;
+    reg.value = 0;
+    reg.tlb_entry = entry;
+    asi_u64_write(ASI_DTLB_DATA_ACCESS_REG, reg.value, value);
+    flush();
+}
+/** Read IMMU TLB Tag Read Register.
+ *
+ * @param entry TLB Entry index.
+ *
+ * @return Current value of specified IMMU TLB Tag Read Register.
+ */
+static inline __u64 itlb_tag_read_read(index_t entry)
+{
+    tlb_tag_read_addr_t tag;
+    tag.value = 0;
+    tag.tlb_entry = entry;
+    return asi_u64_read(ASI_ITLB_TAG_READ_REG, tag.value);
+}
+/** Read DMMU TLB Tag Read Register.
+ *
+ * @param entry TLB Entry index.
+ *
+ * @return Current value of specified DMMU TLB Tag Read Register.
+ */
+static inline __u64 dtlb_tag_read_read(index_t entry)
+{
+    tlb_tag_read_addr_t tag;
+    tag.value = 0;
+    tag.tlb_entry = entry;
+    return asi_u64_read(ASI_DTLB_TAG_READ_REG, tag.value);
+}
+/** Write IMMU TLB Tag Access Register.
+ *
+ * @param v Value to be written.
+ */
+static inline void itlb_tag_access_write(__u64 v)
+{
+    asi_u64_write(ASI_IMMU, VA_IMMU_TAG_ACCESS, v);
+    flush();
+}
+/** Read IMMU TLB Tag Access Register.
+ *
+ * @return Current value of IMMU TLB Tag Access Register.
+ */
+static inline __u64 itlb_tag_access_read(void)
+{
+    return asi_u64_read(ASI_IMMU, VA_IMMU_TAG_ACCESS);
+}
+/** Write DMMU TLB Tag Access Register.
+ *
+ * @param v Value to be written.
+ */
+static inline void dtlb_tag_access_write(__u64 v)
+{
+    asi_u64_write(ASI_DMMU, VA_DMMU_TAG_ACCESS, v);
+    flush();
+}
+/** Read DMMU TLB Tag Access Register.
+ *
+ * @return Current value of DMMU TLB Tag Access Register.
+ */
+static inline __u64 dtlb_tag_access_read(void)
+{
+    return asi_u64_read(ASI_DMMU, VA_DMMU_TAG_ACCESS);
+}
+/** Write IMMU TLB Data in Register.
+ *
+ * @param v Value to be written.
+ */
+static inline void itlb_data_in_write(__u64 v)
+{
+    asi_u64_write(ASI_ITLB_DATA_IN_REG, 0, v);
+    flush();
+}
+/** Write DMMU TLB Data in Register.
+ *
+ * @param v Value to be written.
+ */
+static inline void dtlb_data_in_write(__u64 v)
+{
+    asi_u64_write(ASI_DTLB_DATA_IN_REG, 0, v);
+    flush();
+}
+/** Read ITLB Synchronous Fault Status Register.
+ *
+ * @return Current content of I-SFSR register.
+ */
+static inline __u64 itlb_sfsr_read(void)
+{
+    return asi_u64_read(ASI_IMMU, VA_IMMU_SFSR);
+}
+/** Write ITLB Synchronous Fault Status Register.
+ *
+ * @param v New value of I-SFSR register.
+ */
+static inline void itlb_sfsr_write(__u64 v)
+{
+    asi_u64_write(ASI_IMMU, VA_IMMU_SFSR, v);
+    flush();
+}
+/** Read DTLB Synchronous Fault Status Register.
+ *
+ * @return Current content of D-SFSR register.
+ */
+static inline __u64 dtlb_sfsr_read(void)
+{
+    return asi_u64_read(ASI_DMMU, VA_DMMU_SFSR);
+}
+/** Write DTLB Synchronous Fault Status Register.
+ *
+ * @param v New value of D-SFSR register.
+ */
+static inline void dtlb_sfsr_write(__u64 v)
+{
+    asi_u64_write(ASI_DMMU, VA_DMMU_SFSR, v);
+    flush();
+}
+/** Read DTLB Synchronous Fault Address Register.
+ *
+ * @return Current content of D-SFAR register.
+ */
+static inline __u64 dtlb_sfar_read(void)
+{
+    return asi_u64_read(ASI_DMMU, VA_DMMU_SFAR);
+}
+/** Perform IMMU TLB Demap Operation.
+ *
+ * @param type Selects between context and page demap.
+ * @param context_encoding Specifies which Context register has Context ID for demap.
+ * @param page Address which is on the page to be demapped.
+ */
+static inline void itlb_demap(int type, int context_encoding, __address page)
+{
+    tlb_demap_addr_t da;
+    page_address_t pg;
+    da.value = 0;
+    pg.address = page;
+    da.type = type;
+    da.context = context_encoding;
+    da.vpn = pg.vpn;
+    asi_u64_write(ASI_IMMU_DEMAP, da.value, 0);
+    flush();
+}
+/** Perform DMMU TLB Demap Operation.
+ *
+ * @param type Selects between context and page demap.
+ * @param context_encoding Specifies which Context register has Context ID for demap.
+ * @param page Address which is on the page to be demapped.
+ */
+static inline void dtlb_demap(int type, int context_encoding, __address page)
+{
+    tlb_demap_addr_t da;
+    page_address_t pg;
+    da.value = 0;
+    pg.address = page;
+    da.type = type;
+    da.context = context_encoding;
+    da.vpn = pg.vpn;
+    asi_u64_write(ASI_DMMU_DEMAP, da.value, 0);
+    flush();
+}
+extern void fast_instruction_access_mmu_miss(void);
+extern void fast_data_access_mmu_miss(void);
+extern void fast_data_access_protection(void);
+extern void dtlb_insert_mapping(__address page, __address frame, int pagesize, bool locked, bool cacheable);
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/sparc64/include/mm/as.h
 ,0 → 1,55
+/*
+ * Copyright (C) 2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup sparc64mm
+ * @{
+ */
+/** @file
+ */
+#ifndef __sparc64_AS_H__
+#define __sparc64_AS_H__
+#define KERNEL_ADDRESS_SPACE_SHADOWED_ARCH  1
+#define KERNEL_ADDRESS_SPACE_START_ARCH     (unsigned long) 0x0000000000000000
+#define KERNEL_ADDRESS_SPACE_END_ARCH       (unsigned long) 0xffffffffffffffff
+#define USER_ADDRESS_SPACE_START_ARCH       (unsigned long) 0x0000000000000000
+#define USER_ADDRESS_SPACE_END_ARCH     (unsigned long) 0xffffffffffffffff
+#define USTACK_ADDRESS_ARCH (0x7fffffffffffffff-(PAGE_SIZE-1))
+#define as_install_arch(as)
+extern void as_arch_init(void);
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/sparc64/include/context.h
 ,0 → 1,94
+/*
+ * Copyright (C) 2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup sparc64
+ * @{
+ */
+/** @file
+ */
+#ifndef __sparc64_CONTEXT_H__
+#define __sparc64_CONTEXT_H__
+#ifndef __sparc64_STACK_H__
+# include <arch/stack.h>
+#endif
+#ifndef __sparc64_TYPES_H__
+# include <arch/types.h>
+#endif
+#ifndef __ALIGN_H__
+# include <align.h>
+#endif
+#define SP_DELTA    STACK_WINDOW_SAVE_AREA_SIZE
+#ifdef context_set
+#undef context_set
+#endif
+#define context_set(c, _pc, stack, size)                                \
+        (c)->pc = ((__address) _pc) - 8;                                \
+        (c)->sp = ((__address) stack) + ALIGN_UP((size), STACK_ALIGNMENT) - (STACK_BIAS + SP_DELTA);    \
+    (c)->fp = -STACK_BIAS;                                      \
+    (c)->cleanwin = 0
+/*
+ * Only save registers that must be preserved across
+ * function calls.
+ */
+struct context {
+    __address sp;       /* %o6 */
+    __address pc;       /* %o7 */
+    __u64 i0;
+    __u64 i1;
+    __u64 i2;
+    __u64 i3;
+    __u64 i4;
+    __u64 i5;
+    __address fp;       /* %i6 */
+    __address i7;
+    __u64 l0;
+    __u64 l1;
+    __u64 l2;
+    __u64 l3;
+    __u64 l4;
+    __u64 l5;
+    __u64 l6;
+    __u64 l7;
+    ipl_t ipl;
+    __u64 cleanwin;
+};
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/sparc64/include/register.h
 ,0 → 1,111
+/*
+ * Copyright (C) 2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup sparc64
+ * @{
+ */
+/** @file
+ */
+#ifndef __sparc64_REGISTER_H__
+#define __sparc64_REGISTER_H__
+#include <arch/types.h>
+/** Version Register. */
+union ver_reg {
+    __u64 value;
+    struct {
+        __u16 manuf;    /**< Manufacturer code. */
+        __u16 impl; /**< Implementation code. */
+        __u8 mask;  /**< Mask set revision. */
+        unsigned : 8;
+        __u8 maxtl;
+        unsigned : 3;
+        unsigned maxwin : 5;
+    } __attribute__ ((packed));
+};
+typedef union ver_reg ver_reg_t;
+/** Processor State Register. */
+union pstate_reg {
+    __u64 value;
+    struct {
+        __u64 : 52;
+        unsigned ig : 1;    /**< Interrupt Globals. */
+        unsigned mg : 1;    /**< MMU Globals. */
+        unsigned cle : 1;   /**< Current Little Endian. */
+        unsigned tle : 1;   /**< Trap Little Endian. */
+        unsigned mm : 2;    /**< Memory Model. */
+        unsigned red : 1;   /**< RED state. */
+        unsigned pef : 1;   /**< Enable floating-point. */
+        unsigned am : 1;    /**< 32-bit Address Mask. */
+        unsigned priv : 1;  /**< Privileged Mode. */
+        unsigned ie : 1;    /**< Interrupt Enable. */
+        unsigned ag : 1;    /**< Alternate Globals*/
+    } __attribute__ ((packed));
+};
+typedef union pstate_reg pstate_reg_t;
+/** TICK Register. */
+union tick_reg {
+    __u64 value;
+    struct {
+        unsigned npt : 1;   /**< Non-privileged Trap enable. */
+        __u64 counter : 63; /**< Elapsed CPU clck cycle counter. */
+    } __attribute__ ((packed));
+};
+typedef union tick_reg tick_reg_t;
+/** TICK_compare Register. */
+union tick_compare_reg {
+    __u64 value;
+    struct {
+        unsigned int_dis : 1;   /**< TICK_INT interrupt disabled flag. */
+        __u64 tick_cmpr : 63;   /**< Compare value for TICK interrupts. */
+    } __attribute__ ((packed));
+};
+typedef union tick_compare_reg tick_compare_reg_t;
+/** SOFTINT Register. */
+union softint_reg {
+    __u64 value;
+    struct {
+        __u64 : 47;
+        unsigned stick_int : 1;
+        unsigned int_level : 15;
+        unsigned tick_int : 1;
+    } __attribute__ ((packed));
+};
+typedef union softint_reg softint_reg_t;
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/sparc64/include/barrier.h
 ,0 → 1,74
+/*
+ * Copyright (C) 2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup sparc64
+ * @{
+ */
+/** @file
+ */
+#ifndef __sparc64_BARRIER_H__
+#define __sparc64_BARRIER_H__
+/*
+ * TODO: Implement true SPARC V9 memory barriers for macros below.
+ */
+#define CS_ENTER_BARRIER()  __asm__ volatile ("" ::: "memory")
+#define CS_LEAVE_BARRIER()  __asm__ volatile ("" ::: "memory")
+#define memory_barrier()
+#define read_barrier()
+#define write_barrier()
+/** Flush Instruction Memory instruction. */
+static inline void flush(void)
+{
+    /*
+     * The FLUSH instruction takes address parameter.
+     * As such, it may trap if the address is not found in DTLB.
+     * However, JPS1 implementations are free to ignore the trap.
+     */
+    /*
+     * %i7 should provide address that is always mapped in DTLB
+     * as it is a pointer to kernel code.
+     */
+        __asm__ volatile ("flush %i7\n");
+}
+/** Memory Barrier instruction. */
+static inline void membar(void)
+{
+    __asm__ volatile ("membar #Sync\n");
+}
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/sparc64/include/drivers/tick.h
 ,0 → 1,49
+/*
+ * Copyright (C) 2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup sparc64
+ * @{
+ */
+/** @file
+ */
+#ifndef __sparc64_TICK_H__
+#define __sparc64_TICK_H__
+#include <typedefs.h>
+#define TICK_DELTA        500000
+extern void tick_init(void);
+extern void tick_interrupt(int n, istate_t *istate);
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/sparc64/include/drivers/i8042.h
 ,0 → 1,76
+/*
+ * Copyright (C) 2006 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup sparc64
+ * @{
+ */
+/** @file
+ */
+#ifndef __sparc64_I8042_H__
+#define __sparc64_I8042_H__
+#include <arch/types.h>
+#define KBD_PHYS_ADDRESS    0x1fff8904000ULL
+#define STATUS_REG  4
+#define COMMAND_REG 4
+#define DATA_REG    6
+#define LAST_REG    DATA_REG
+extern volatile __u8 *kbd_virt_address;
+static inline void i8042_data_write(__u8 data)
+{
+    kbd_virt_address[DATA_REG] = data;
+}
+static inline __u8 i8042_data_read(void)
+{
+    return kbd_virt_address[DATA_REG];
+}
+static inline __u8 i8042_status_read(void)
+{
+    return kbd_virt_address[STATUS_REG];
+}
+static inline void i8042_command_write(__u8 command)
+{
+    kbd_virt_address[COMMAND_REG] = command;
+}
+extern void kbd_init(void);
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/sparc64/include/drivers/fb.h
 ,0 → 1,49
+/*
+ * Copyright (C) 2006 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup sparc64
+ * @{
+ */
+/** @file
+ */
+#ifndef __sparc64_FB_H__
+#define __sparc64_FB_H__
+#define FB_PHYS_ADDRESS     0x1c901000000ULL
+#define FB_X_RES        1152
+#define FB_Y_RES        900
+#define FB_COLOR_DEPTH      8
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/sparc64/Makefile.inc
 ,0 → 1,94
+#
+# Copyright (C) 2005 Martin Decky
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# - Redistributions of source code must retain the above copyright
+#   notice, this list of conditions and the following disclaimer.
+# - Redistributions in binary form must reproduce the above copyright
+#   notice, this list of conditions and the following disclaimer in the
+#   documentation and/or other materials provided with the distribution.
+# - The name of the author may not be used to endorse or promote products
+#   derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+## Toolchain configuration
+#
+BFD_NAME = elf64-sparc
+BFD_ARCH = sparc
+BFD = elf64-sparc
+TARGET = sparc64-linux-gnu
+TOOLCHAIN_DIR = /usr/local/sparc64/bin
+## Make some default assumptions
+#
+CFLAGS += -mcpu=ultrasparc -m64
+LFLAGS += -no-check-sections -N
+DEFS += -D__64_BITS__
+## Own configuration directives
+#
+CONFIG_OFW = y
+## Compile with page hash table support.
+#
+CONFIG_PAGE_HT = y
+DEFS += -DCONFIG_PAGE_HT
+## Compile with support for address space identifiers.
+#
+CONFIG_ASID = y
+CONFIG_ASID_FIFO = y
+## Compile with support for framebuffer.
+#
+CONFIG_FB = y
+## Compile with support for i8042 controller.
+#
+CONFIG_I8042 = y
+ARCH_SOURCES = \
+    arch/$(ARCH)/src/cpu/cpu.c \
+    arch/$(ARCH)/src/asm.S \
+    arch/$(ARCH)/src/panic.S \
+    arch/$(ARCH)/src/console.c \
+    arch/$(ARCH)/src/context.S \
+    arch/$(ARCH)/src/dummy.s \
+    arch/$(ARCH)/src/mm/as.c \
+    arch/$(ARCH)/src/mm/frame.c \
+    arch/$(ARCH)/src/mm/page.c \
+    arch/$(ARCH)/src/mm/tlb.c \
+    arch/$(ARCH)/src/mm/memory_init.c \
+    arch/$(ARCH)/src/sparc64.c \
+    arch/$(ARCH)/src/start.S \
+    arch/$(ARCH)/src/proc/scheduler.c \
+    arch/$(ARCH)/src/trap/trap_table.S \
+    arch/$(ARCH)/src/trap/trap.c \
+    arch/$(ARCH)/src/trap/exception.c \
+    arch/$(ARCH)/src/trap/interrupt.c \
+    arch/$(ARCH)/src/ddi/ddi.c \
+    arch/$(ARCH)/src/drivers/tick.c \
+    arch/$(ARCH)/src/drivers/i8042.c

 /tags/0.2.0.2/kernel/arch/sparc64/_link.ld.in
 ,0 → 1,49
+/** SPARC64 linker script
+ *
+ *  It is ELF format, but its only section looks like this:
+ *  kernel text
+ *  kernel data
+ *
+ */
+#define __ASM__
+#include <arch/boot/boot.h>
+ENTRY(kernel_image_start)
+SECTIONS {
+    .image VMA: AT (LMA) {
+        ktext_start = .;
+        *(K_TEXT_START)
+        *(.text);
+        ktext_end = .;
+        kdata_start = .;
+        *(K_DATA_START)
+        *(.rodata);
+        *(.rodata.*);
+        *(.data);       /* initialized data */
+        *(.sdata);
+        *(.sdata2);
+        *(.sbss);
+        hardcoded_ktext_size = .;
+        QUAD(ktext_end - ktext_start);
+        hardcoded_kdata_size = .;
+        QUAD(kdata_end - kdata_start);
+        hardcoded_load_address = .;
+        QUAD(VMA);
+        *(.bss);        /* uninitialized static variables */
+        *(COMMON);      /* global variables */
+        symbol_table = .;
+                *(symtab.*);            /* Symbol table, must be LAST symbol!*/
+        kdata_end = .;
+    }
+    /DISCARD/ : {
+        *(.comment);
+        *(.note*);
+    }
+}

 /tags/0.2.0.2/kernel/arch/ia64/src/mm/tlb.c
 ,0 → 1,690
+/*
+ * Copyright (C) 2006 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup ia64mm
+ * @{
+ */
+/** @file
+ */
+/*
+ * TLB management.
+ */
+#include <mm/tlb.h>
+#include <mm/asid.h>
+#include <mm/page.h>
+#include <mm/as.h>
+#include <arch/mm/tlb.h>
+#include <arch/mm/page.h>
+#include <arch/mm/vhpt.h>
+#include <arch/barrier.h>
+#include <arch/interrupt.h>
+#include <arch/pal/pal.h>
+#include <arch/asm.h>
+#include <typedefs.h>
+#include <panic.h>
+#include <print.h>
+#include <arch.h>
+#include <interrupt.h>
+/** Invalidate all TLB entries. */
+void tlb_invalidate_all(void)
+{
+        ipl_t ipl;
+        __address adr;
+        __u32 count1, count2, stride1, stride2;
+        int i,j;
+        adr = PAL_PTCE_INFO_BASE();
+        count1 = PAL_PTCE_INFO_COUNT1();
+        count2 = PAL_PTCE_INFO_COUNT2();
+        stride1 = PAL_PTCE_INFO_STRIDE1();
+        stride2 = PAL_PTCE_INFO_STRIDE2();
+        ipl = interrupts_disable();
+        for(i = 0; i < count1; i++) {
+            for(j = 0; j < count2; j++) {
+                __asm__ volatile (
+                    "ptc.e %0 ;;"
+                    :
+                    : "r" (adr)
+                );
+                adr += stride2;
+            }
+            adr += stride1;
+        }
+        interrupts_restore(ipl);
+        srlz_d();
+        srlz_i();
+#ifdef CONFIG_VHPT
+        vhpt_invalidate_all();
+#endif
+}
+/** Invalidate entries belonging to an address space.
+ *
+ * @param asid Address space identifier.
+ */
+void tlb_invalidate_asid(asid_t asid)
+{
+    tlb_invalidate_all();
+}
+void tlb_invalidate_pages(asid_t asid, __address page, count_t cnt)
+{
+    region_register rr;
+    bool restore_rr = false;
+    int b = 0;
+    int c = cnt;
+    __address va;
+    va = page;
+    rr.word = rr_read(VA2VRN(va));
+    if ((restore_rr = (rr.map.rid != ASID2RID(asid, VA2VRN(va))))) {
+        /*
+         * The selected region register does not contain required RID.
+         * Save the old content of the register and replace the RID.
+         */
+        region_register rr0;
+        rr0 = rr;
+        rr0.map.rid = ASID2RID(asid, VA2VRN(va));
+        rr_write(VA2VRN(va), rr0.word);
+        srlz_d();
+        srlz_i();
+    }
+    while(c >>= 1)
+        b++;
+    b >>= 1;
+    __u64 ps;
+    switch (b) {
+        case 0: /*cnt 1-3*/
+            ps = PAGE_WIDTH;
+            break;
+        case 1: /*cnt 4-15*/
+            /*cnt=((cnt-1)/4)+1;*/
+            ps = PAGE_WIDTH+2;
+            va &= ~((1<<ps)-1);
+            break;
+        case 2: /*cnt 16-63*/
+            /*cnt=((cnt-1)/16)+1;*/
+            ps = PAGE_WIDTH+4;
+            va &= ~((1<<ps)-1);
+            break;
+        case 3: /*cnt 64-255*/
+            /*cnt=((cnt-1)/64)+1;*/
+            ps = PAGE_WIDTH+6;
+            va &= ~((1<<ps)-1);
+            break;
+        case 4: /*cnt 256-1023*/
+            /*cnt=((cnt-1)/256)+1;*/
+            ps = PAGE_WIDTH+8;
+            va &= ~((1<<ps)-1);
+            break;
+        case 5: /*cnt 1024-4095*/
+            /*cnt=((cnt-1)/1024)+1;*/
+            ps = PAGE_WIDTH+10;
+            va &= ~((1<<ps)-1);
+            break;
+        case 6: /*cnt 4096-16383*/
+            /*cnt=((cnt-1)/4096)+1;*/
+            ps = PAGE_WIDTH+12;
+            va &= ~((1<<ps)-1);
+            break;
+        case 7: /*cnt 16384-65535*/
+        case 8: /*cnt 65536-(256K-1)*/
+            /*cnt=((cnt-1)/16384)+1;*/
+            ps = PAGE_WIDTH+14;
+            va &= ~((1<<ps)-1);
+            break;
+        default:
+            /*cnt=((cnt-1)/(16384*16))+1;*/
+            ps=PAGE_WIDTH+18;
+            va&=~((1<<ps)-1);
+            break;
+    }
+    /*cnt+=(page!=va);*/
+    for(; va<(page+cnt*(PAGE_SIZE)); va += (1<<ps)) {
+        __asm__ volatile (
+            "ptc.l %0,%1;;"
+            :
+            : "r" (va), "r" (ps<<2)
+        );
+    }
+    srlz_d();
+    srlz_i();
+    if (restore_rr) {
+        rr_write(VA2VRN(va), rr.word);
+        srlz_d();
+        srlz_i();
+    }
+}
+/** Insert data into data translation cache.
+ *
+ * @param va Virtual page address.
+ * @param asid Address space identifier.
+ * @param entry The rest of TLB entry as required by TLB insertion format.
+ */
+void dtc_mapping_insert(__address va, asid_t asid, tlb_entry_t entry)
+{
+    tc_mapping_insert(va, asid, entry, true);
+}
+/** Insert data into instruction translation cache.
+ *
+ * @param va Virtual page address.
+ * @param asid Address space identifier.
+ * @param entry The rest of TLB entry as required by TLB insertion format.
+ */
+void itc_mapping_insert(__address va, asid_t asid, tlb_entry_t entry)
+{
+    tc_mapping_insert(va, asid, entry, false);
+}
+/** Insert data into instruction or data translation cache.
+ *
+ * @param va Virtual page address.
+ * @param asid Address space identifier.
+ * @param entry The rest of TLB entry as required by TLB insertion format.
+ * @param dtc If true, insert into data translation cache, use instruction translation cache otherwise.
+ */
+void tc_mapping_insert(__address va, asid_t asid, tlb_entry_t entry, bool dtc)
+{
+    region_register rr;
+    bool restore_rr = false;
+    rr.word = rr_read(VA2VRN(va));
+    if ((restore_rr = (rr.map.rid != ASID2RID(asid, VA2VRN(va))))) {
+        /*
+         * The selected region register does not contain required RID.
+         * Save the old content of the register and replace the RID.
+         */
+        region_register rr0;
+        rr0 = rr;
+        rr0.map.rid = ASID2RID(asid, VA2VRN(va));
+        rr_write(VA2VRN(va), rr0.word);
+        srlz_d();
+        srlz_i();
+    }
+    __asm__ volatile (
+        "mov r8=psr;;\n"
+        "rsm %0;;\n"            /* PSR_IC_MASK */
+        "srlz.d;;\n"
+        "srlz.i;;\n"
+        "mov cr.ifa=%1\n"       /* va */
+        "mov cr.itir=%2;;\n"        /* entry.word[1] */
+        "cmp.eq p6,p7 = %4,r0;;\n"  /* decide between itc and dtc */
+        "(p6) itc.i %3;;\n"
+        "(p7) itc.d %3;;\n"
+        "mov psr.l=r8;;\n"
+        "srlz.d;;\n"
+        :
+        : "i" (PSR_IC_MASK), "r" (va), "r" (entry.word[1]), "r" (entry.word[0]), "r" (dtc)
+        : "p6", "p7", "r8"
+    );
+    if (restore_rr) {
+        rr_write(VA2VRN(va), rr.word);
+        srlz_d();
+        srlz_i();
+    }
+}
+/** Insert data into instruction translation register.
+ *
+ * @param va Virtual page address.
+ * @param asid Address space identifier.
+ * @param entry The rest of TLB entry as required by TLB insertion format.
+ * @param tr Translation register.
+ */
+void itr_mapping_insert(__address va, asid_t asid, tlb_entry_t entry, index_t tr)
+{
+    tr_mapping_insert(va, asid, entry, false, tr);
+}
+/** Insert data into data translation register.
+ *
+ * @param va Virtual page address.
+ * @param asid Address space identifier.
+ * @param entry The rest of TLB entry as required by TLB insertion format.
+ * @param tr Translation register.
+ */
+void dtr_mapping_insert(__address va, asid_t asid, tlb_entry_t entry, index_t tr)
+{
+    tr_mapping_insert(va, asid, entry, true, tr);
+}
+/** Insert data into instruction or data translation register.
+ *
+ * @param va Virtual page address.
+ * @param asid Address space identifier.
+ * @param entry The rest of TLB entry as required by TLB insertion format.
+ * @param dtr If true, insert into data translation register, use instruction translation register otherwise.
+ * @param tr Translation register.
+ */
+void tr_mapping_insert(__address va, asid_t asid, tlb_entry_t entry, bool dtr, index_t tr)
+{
+    region_register rr;
+    bool restore_rr = false;
+    rr.word = rr_read(VA2VRN(va));
+    if ((restore_rr = (rr.map.rid != ASID2RID(asid, VA2VRN(va))))) {
+        /*
+         * The selected region register does not contain required RID.
+         * Save the old content of the register and replace the RID.
+         */
+        region_register rr0;
+        rr0 = rr;
+        rr0.map.rid = ASID2RID(asid, VA2VRN(va));
+        rr_write(VA2VRN(va), rr0.word);
+        srlz_d();
+        srlz_i();
+    }
+    __asm__ volatile (
+        "mov r8=psr;;\n"
+        "rsm %0;;\n"            /* PSR_IC_MASK */
+        "srlz.d;;\n"
+        "srlz.i;;\n"
+        "mov cr.ifa=%1\n"           /* va */
+        "mov cr.itir=%2;;\n"        /* entry.word[1] */
+        "cmp.eq p6,p7=%5,r0;;\n"    /* decide between itr and dtr */
+        "(p6) itr.i itr[%4]=%3;;\n"
+        "(p7) itr.d dtr[%4]=%3;;\n"
+        "mov psr.l=r8;;\n"
+        "srlz.d;;\n"
+        :
+        : "i" (PSR_IC_MASK), "r" (va), "r" (entry.word[1]), "r" (entry.word[0]), "r" (tr), "r" (dtr)
+        : "p6", "p7", "r8"
+    );
+    if (restore_rr) {
+        rr_write(VA2VRN(va), rr.word);
+        srlz_d();
+        srlz_i();
+    }
+}
+/** Insert data into DTLB.
+ *
+ * @param page Virtual page address including VRN bits.
+ * @param frame Physical frame address.
+ * @param dtr If true, insert into data translation register, use data translation cache otherwise.
+ * @param tr Translation register if dtr is true, ignored otherwise.
+ */
+void dtlb_kernel_mapping_insert(__address page, __address frame, bool dtr, index_t tr)
+{
+    tlb_entry_t entry;
+    entry.word[0] = 0;
+    entry.word[1] = 0;
+    entry.p = true;         /* present */
+    entry.ma = MA_WRITEBACK;
+    entry.a = true;         /* already accessed */
+    entry.d = true;         /* already dirty */
+    entry.pl = PL_KERNEL;
+    entry.ar = AR_READ | AR_WRITE;
+    entry.ppn = frame >> PPN_SHIFT;
+    entry.ps = PAGE_WIDTH;
+    if (dtr)
+        dtr_mapping_insert(page, ASID_KERNEL, entry, tr);
+    else
+        dtc_mapping_insert(page, ASID_KERNEL, entry);
+}
+/** Purge kernel entries from DTR.
+ *
+ * Purge DTR entries used by the kernel.
+ *
+ * @param page Virtual page address including VRN bits.
+ * @param width Width of the purge in bits.
+ */
+void dtr_purge(__address page, count_t width)
+{
+    __asm__ volatile ("ptr.d %0, %1\n" : : "r" (page), "r" (width<<2));
+}
+/** Copy content of PTE into data translation cache.
+ *
+ * @param t PTE.
+ */
+void dtc_pte_copy(pte_t *t)
+{
+    tlb_entry_t entry;
+    entry.word[0] = 0;
+    entry.word[1] = 0;
+    entry.p = t->p;
+    entry.ma = t->c ? MA_WRITEBACK : MA_UNCACHEABLE;
+    entry.a = t->a;
+    entry.d = t->d;
+    entry.pl = t->k ? PL_KERNEL : PL_USER;
+    entry.ar = t->w ? AR_WRITE : AR_READ;
+    entry.ppn = t->frame >> PPN_SHIFT;
+    entry.ps = PAGE_WIDTH;
+    dtc_mapping_insert(t->page, t->as->asid, entry);
+#ifdef CONFIG_VHPT
+    vhpt_mapping_insert(t->page, t->as->asid, entry);
+#endif
+}
+/** Copy content of PTE into instruction translation cache.
+ *
+ * @param t PTE.
+ */
+void itc_pte_copy(pte_t *t)
+{
+    tlb_entry_t entry;
+    entry.word[0] = 0;
+    entry.word[1] = 0;
+    ASSERT(t->x);
+    entry.p = t->p;
+    entry.ma = t->c ? MA_WRITEBACK : MA_UNCACHEABLE;
+    entry.a = t->a;
+    entry.pl = t->k ? PL_KERNEL : PL_USER;
+    entry.ar = t->x ? (AR_EXECUTE | AR_READ) : AR_READ;
+    entry.ppn = t->frame >> PPN_SHIFT;
+    entry.ps = PAGE_WIDTH;
+    itc_mapping_insert(t->page, t->as->asid, entry);
+#ifdef CONFIG_VHPT
+    vhpt_mapping_insert(t->page, t->as->asid, entry);
+#endif
+}
+/** Instruction TLB fault handler for faults with VHPT turned off.
+ *
+ * @param vector Interruption vector.
+ * @param istate Structure with saved interruption state.
+ */
+void alternate_instruction_tlb_fault(__u64 vector, istate_t *istate)
+{
+    region_register rr;
+    rid_t rid;
+    __address va;
+    pte_t *t;
+    va = istate->cr_ifa;    /* faulting address */
+    rr.word = rr_read(VA2VRN(va));
+    rid = rr.map.rid;
+    page_table_lock(AS, true);
+    t = page_mapping_find(AS, va);
+    if (t) {
+        /*
+         * The mapping was found in software page hash table.
+         * Insert it into data translation cache.
+         */
+        itc_pte_copy(t);
+        page_table_unlock(AS, true);
+    } else {
+        /*
+         * Forward the page fault to address space page fault handler.
+         */
+        page_table_unlock(AS, true);
+        if (as_page_fault(va, PF_ACCESS_EXEC, istate) == AS_PF_FAULT) {
+            fault_if_from_uspace(istate,"Page fault at %p",va);
+            panic("%s: va=%p, rid=%d, iip=%p\n", __FUNCTION__, va, rid, istate->cr_iip);
+        }
+    }
+}
+/** Data TLB fault handler for faults with VHPT turned off.
+ *
+ * @param vector Interruption vector.
+ * @param istate Structure with saved interruption state.
+ */
+void alternate_data_tlb_fault(__u64 vector, istate_t *istate)
+{
+    region_register rr;
+    rid_t rid;
+    __address va;
+    pte_t *t;
+    va = istate->cr_ifa;    /* faulting address */
+    rr.word = rr_read(VA2VRN(va));
+    rid = rr.map.rid;
+    if (RID2ASID(rid) == ASID_KERNEL) {
+        if (VA2VRN(va) == VRN_KERNEL) {
+            /*
+             * Provide KA2PA(identity) mapping for faulting piece of
+             * kernel address space.
+             */
+            dtlb_kernel_mapping_insert(va, KA2PA(va), false, 0);
+            return;
+        }
+    }
+    page_table_lock(AS, true);
+    t = page_mapping_find(AS, va);
+    if (t) {
+        /*
+         * The mapping was found in software page hash table.
+         * Insert it into data translation cache.
+         */
+        dtc_pte_copy(t);
+        page_table_unlock(AS, true);
+    } else {
+        /*
+         * Forward the page fault to address space page fault handler.
+         */
+        page_table_unlock(AS, true);
+        if (as_page_fault(va, PF_ACCESS_READ, istate) == AS_PF_FAULT) {
+            fault_if_from_uspace(istate,"Page fault at %p",va);
+            panic("%s: va=%p, rid=%d, iip=%p\n", __FUNCTION__, va, rid, istate->cr_iip);
+        }
+    }
+}
+/** Data nested TLB fault handler.
+ *
+ * This fault should not occur.
+ *
+ * @param vector Interruption vector.
+ * @param istate Structure with saved interruption state.
+ */
+void data_nested_tlb_fault(__u64 vector, istate_t *istate)
+{
+    panic("%s\n", __FUNCTION__);
+}
+/** Data Dirty bit fault handler.
+ *
+ * @param vector Interruption vector.
+ * @param istate Structure with saved interruption state.
+ */
+void data_dirty_bit_fault(__u64 vector, istate_t *istate)
+{
+    region_register rr;
+    rid_t rid;
+    __address va;
+    pte_t *t;
+    va = istate->cr_ifa;    /* faulting address */
+    rr.word = rr_read(VA2VRN(va));
+    rid = rr.map.rid;
+    page_table_lock(AS, true);
+    t = page_mapping_find(AS, va);
+    ASSERT(t && t->p);
+    if (t && t->p && t->w) {
+        /*
+         * Update the Dirty bit in page tables and reinsert
+         * the mapping into DTC.
+         */
+        t->d = true;
+        dtc_pte_copy(t);
+    } else {
+        if (as_page_fault(va, PF_ACCESS_WRITE, istate) == AS_PF_FAULT) {
+            fault_if_from_uspace(istate,"Page fault at %p",va);
+            panic("%s: va=%p, rid=%d, iip=%p\n", __FUNCTION__, va, rid, istate->cr_iip);
+            t->d = true;
+            dtc_pte_copy(t);
+        }
+    }
+    page_table_unlock(AS, true);
+}
+/** Instruction access bit fault handler.
+ *
+ * @param vector Interruption vector.
+ * @param istate Structure with saved interruption state.
+ */
+void instruction_access_bit_fault(__u64 vector, istate_t *istate)
+{
+    region_register rr;
+    rid_t rid;
+    __address va;
+    pte_t *t;
+    va = istate->cr_ifa;    /* faulting address */
+    rr.word = rr_read(VA2VRN(va));
+    rid = rr.map.rid;
+    page_table_lock(AS, true);
+    t = page_mapping_find(AS, va);
+    ASSERT(t && t->p);
+    if (t && t->p && t->x) {
+        /*
+         * Update the Accessed bit in page tables and reinsert
+         * the mapping into ITC.
+         */
+        t->a = true;
+        itc_pte_copy(t);
+    } else {
+        if (as_page_fault(va, PF_ACCESS_EXEC, istate) == AS_PF_FAULT) {
+            fault_if_from_uspace(istate,"Page fault at %p",va);
+            panic("%s: va=%p, rid=%d, iip=%p\n", __FUNCTION__, va, rid, istate->cr_iip);
+            t->a = true;
+            itc_pte_copy(t);
+        }
+    }
+    page_table_unlock(AS, true);
+}
+/** Data access bit fault handler.
+ *
+ * @param vector Interruption vector.
+ * @param istate Structure with saved interruption state.
+ */
+void data_access_bit_fault(__u64 vector, istate_t *istate)
+{
+    region_register rr;
+    rid_t rid;
+    __address va;
+    pte_t *t;
+    va = istate->cr_ifa;    /* faulting address */
+    rr.word = rr_read(VA2VRN(va));
+    rid = rr.map.rid;
+    page_table_lock(AS, true);
+    t = page_mapping_find(AS, va);
+    ASSERT(t && t->p);
+    if (t && t->p) {
+        /*
+         * Update the Accessed bit in page tables and reinsert
+         * the mapping into DTC.
+         */
+        t->a = true;
+        dtc_pte_copy(t);
+    } else {
+        if (as_page_fault(va, PF_ACCESS_READ, istate) == AS_PF_FAULT) {
+            fault_if_from_uspace(istate,"Page fault at %p",va);
+            panic("%s: va=%p, rid=%d, iip=%p\n", __FUNCTION__, va, rid, istate->cr_iip);
+            t->a = true;
+            itc_pte_copy(t);
+        }
+    }
+    page_table_unlock(AS, true);
+}
+/** Page not present fault handler.
+ *
+ * @param vector Interruption vector.
+ * @param istate Structure with saved interruption state.
+ */
+void page_not_present(__u64 vector, istate_t *istate)
+{
+    region_register rr;
+    rid_t rid;
+    __address va;
+    pte_t *t;
+    va = istate->cr_ifa;    /* faulting address */
+    rr.word = rr_read(VA2VRN(va));
+    rid = rr.map.rid;
+    page_table_lock(AS, true);
+    t = page_mapping_find(AS, va);
+    ASSERT(t);
+    if (t->p) {
+        /*
+         * If the Present bit is set in page hash table, just copy it
+         * and update ITC/DTC.
+         */
+        if (t->x)
+            itc_pte_copy(t);
+        else
+            dtc_pte_copy(t);
+        page_table_unlock(AS, true);
+    } else {
+        page_table_unlock(AS, true);
+        if (as_page_fault(va, PF_ACCESS_READ, istate) == AS_PF_FAULT) {
+            fault_if_from_uspace(istate,"Page fault at %p",va);
+            panic("%s: va=%p, rid=%d\n", __FUNCTION__, va, rid);
+        }
+    }
+}
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/ia64/src/mm/page.c
 ,0 → 1,268
+/*
+ * Copyright (C) 2006 Jakub Jermar
+ * Copyright (C) 2006 Jakub Vana
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup ia64mm
+ * @{
+ */
+/** @file
+ */
+#include <arch/mm/page.h>
+#include <genarch/mm/page_ht.h>
+#include <mm/asid.h>
+#include <arch/mm/asid.h>
+#include <arch/mm/vhpt.h>
+#include <arch/types.h>
+#include <typedefs.h>
+#include <print.h>
+#include <mm/page.h>
+#include <mm/frame.h>
+#include <config.h>
+#include <panic.h>
+#include <arch/asm.h>
+#include <arch/barrier.h>
+#include <memstr.h>
+static void set_environment(void);
+/** Initialize ia64 virtual address translation subsystem. */
+void page_arch_init(void)
+{
+    page_mapping_operations = &ht_mapping_operations;
+    pk_disable();
+    set_environment();
+}
+/** Initialize VHPT and region registers. */
+void set_environment(void)
+{
+    region_register rr;
+    pta_register pta;
+    int i;
+#ifdef CONFIG_VHPT
+    __address vhpt_base;
+#endif
+    /*
+     * First set up kernel region register.
+     * This is redundant (see start.S) but we keep it here just for sure.
+     */
+    rr.word = rr_read(VRN_KERNEL);
+    rr.map.ve = 0;                  /* disable VHPT walker */
+    rr.map.ps = PAGE_WIDTH;
+    rr.map.rid = ASID2RID(ASID_KERNEL, VRN_KERNEL);
+    rr_write(VRN_KERNEL, rr.word);
+    srlz_i();
+    srlz_d();
+    /*
+     * And setup the rest of region register.
+     */
+    for(i = 0; i < REGION_REGISTERS; i++) {
+        /* skip kernel rr */
+        if (i == VRN_KERNEL)
+            continue;
+        rr.word = rr_read(i);
+        rr.map.ve = 0;      /* disable VHPT walker */
+        rr.map.rid = RID_KERNEL;
+        rr.map.ps = PAGE_WIDTH;
+        rr_write(i, rr.word);
+        srlz_i();
+        srlz_d();
+    }
+#ifdef CONFIG_VHPT
+    vhpt_base = vhpt_set_up();
+#endif
+    /*
+     * Set up PTA register.
+     */
+    pta.word = pta_read();
+#ifndef CONFIG_VHPT
+    pta.map.ve = 0;                   /* disable VHPT walker */
+    pta.map.base = 0 >> PTA_BASE_SHIFT;
+#else
+    pta.map.ve = 1;                   /* enable VHPT walker */
+    pta.map.base = vhpt_base >> PTA_BASE_SHIFT;
+#endif
+    pta.map.vf = 1;                   /* large entry format */
+    pta.map.size = VHPT_WIDTH;
+    pta_write(pta.word);
+    srlz_i();
+    srlz_d();
+}
+/** Calculate address of collision chain from VPN and ASID.
+ *
+ * Interrupts must be disabled.
+ *
+ * @param page Address of virtual page including VRN bits.
+ * @param asid Address space identifier.
+ *
+ * @return VHPT entry address.
+ */
+vhpt_entry_t *vhpt_hash(__address page, asid_t asid)
+{
+    region_register rr_save, rr;
+    index_t vrn;
+    rid_t rid;
+    vhpt_entry_t *v;
+    vrn = page >> VRN_SHIFT;
+    rid = ASID2RID(asid, vrn);
+    rr_save.word = rr_read(vrn);
+    if (rr_save.map.rid == rid) {
+        /*
+         * The RID is already in place, compute thash and return.
+         */
+        v = (vhpt_entry_t *) thash(page);
+        return v;
+    }
+    /*
+     * The RID must be written to some region register.
+     * To speed things up, register indexed by vrn is used.
+     */
+    rr.word = rr_save.word;
+    rr.map.rid = rid;
+    rr_write(vrn, rr.word);
+    srlz_i();
+    v = (vhpt_entry_t *) thash(page);
+    rr_write(vrn, rr_save.word);
+    srlz_i();
+    srlz_d();
+    return v;
+}
+/** Compare ASID and VPN against PTE.
+ *
+ * Interrupts must be disabled.
+ *
+ * @param page Address of virtual page including VRN bits.
+ * @param asid Address space identifier.
+ *
+ * @return True if page and asid match the page and asid of t, false otherwise.
+ */
+bool vhpt_compare(__address page, asid_t asid, vhpt_entry_t *v)
+{
+    region_register rr_save, rr;
+    index_t vrn;
+    rid_t rid;
+    bool match;
+    ASSERT(v);
+    vrn = page >> VRN_SHIFT;
+    rid = ASID2RID(asid, vrn);
+    rr_save.word = rr_read(vrn);
+    if (rr_save.map.rid == rid) {
+        /*
+         * The RID is already in place, compare ttag with t and return.
+         */
+        return ttag(page) == v->present.tag.tag_word;
+    }
+    /*
+     * The RID must be written to some region register.
+     * To speed things up, register indexed by vrn is used.
+     */
+    rr.word = rr_save.word;
+    rr.map.rid = rid;
+    rr_write(vrn, rr.word);
+    srlz_i();
+    match = (ttag(page) == v->present.tag.tag_word);
+    rr_write(vrn, rr_save.word);
+    srlz_i();
+    srlz_d();
+    return match;
+}
+/** Set up one VHPT entry.
+ *
+ * @param v VHPT entry to be set up.
+ * @param page Virtual address of the page mapped by the entry.
+ * @param asid Address space identifier of the address space to which page belongs.
+ * @param frame Physical address of the frame to wich page is mapped.
+ * @param flags Different flags for the mapping.
+ */
+void vhpt_set_record(vhpt_entry_t *v, __address page, asid_t asid, __address frame, int flags)
+{
+    region_register rr_save, rr;
+    index_t vrn;
+    rid_t rid;
+    __u64 tag;
+    ASSERT(v);
+    vrn = page >> VRN_SHIFT;
+    rid = ASID2RID(asid, vrn);
+    /*
+     * Compute ttag.
+     */
+    rr_save.word = rr_read(vrn);
+    rr.word = rr_save.word;
+    rr.map.rid = rid;
+    rr_write(vrn, rr.word);
+    srlz_i();
+    tag = ttag(page);
+    rr_write(vrn, rr_save.word);
+    srlz_i();
+    srlz_d();
+    /*
+     * Clear the entry.
+     */
+    v->word[0] = 0;
+    v->word[1] = 0;
+    v->word[2] = 0;
+    v->word[3] = 0;
+    v->present.p = true;
+    v->present.ma = (flags & PAGE_CACHEABLE) ? MA_WRITEBACK : MA_UNCACHEABLE;
+    v->present.a = false;   /* not accessed */
+    v->present.d = false;   /* not dirty */
+    v->present.pl = (flags & PAGE_USER) ? PL_USER : PL_KERNEL;
+    v->present.ar = (flags & PAGE_WRITE) ? AR_WRITE : AR_READ;
+    v->present.ar |= (flags & PAGE_EXEC) ? AR_EXECUTE : 0;
+    v->present.ppn = frame >> PPN_SHIFT;
+    v->present.ed = false;  /* exception not deffered */
+    v->present.ps = PAGE_WIDTH;
+    v->present.key = 0;
+    v->present.tag.tag_word = tag;
+}
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/ia64/src/mm/as.c
 ,0 → 1,90
+/*
+ * Copyright (C) 2006 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup ia64mm
+ * @{
+ */
+/** @file
+ */
+#include <arch/mm/as.h>
+#include <arch/mm/asid.h>
+#include <arch/mm/page.h>
+#include <genarch/mm/as_ht.h>
+#include <genarch/mm/asid_fifo.h>
+#include <mm/asid.h>
+#include <arch.h>
+#include <arch/barrier.h>
+#include <synch/spinlock.h>
+/** Architecture dependent address space init. */
+void as_arch_init(void)
+{
+    as_operations = &as_ht_operations;
+    asid_fifo_init();
+}
+/** Prepare registers for switching to another address space.
+ *
+ * @param as Address space.
+ */
+void as_install_arch(as_t *as)
+{
+    ipl_t ipl;
+    region_register rr;
+    int i;
+    ipl = interrupts_disable();
+    spinlock_lock(&as->lock);
+    ASSERT(as->asid != ASID_INVALID);
+    /*
+     * Load respective ASID (7 consecutive RIDs) to
+     * region registers.
+     */
+    for (i = 0; i < REGION_REGISTERS; i++) {
+        if (i == VRN_KERNEL)
+            continue;
+        rr.word = rr_read(i);
+        rr.map.ve = false;          /* disable VHPT walker */
+        rr.map.rid = ASID2RID(as->asid, i);
+        rr.map.ps = PAGE_WIDTH;
+        rr_write(i, rr.word);
+    }
+    srlz_d();
+    srlz_i();
+    spinlock_unlock(&as->lock);
+    interrupts_restore(ipl);
+}
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/ia64/src/mm/vhpt.c
 ,0 → 1,98
+/*
+* Copyright (C) 2006 Jakub Vana
+* All rights reserved.
+*
+* Redistribution and use in source and binary forms, with or without
+* modification, are permitted provided that the following conditions
+* are met:
+*
+* - Redistributions of source code must retain the above copyright
+*   notice, this list of conditions and the following disclaimer.
+* - Redistributions in binary form must reproduce the above copyright
+*   notice, this list of conditions and the following disclaimer in the
+*   documentation and/or other materials provided with the distribution.
+* - The name of the author may not be used to endorse or promote products
+*   derived from this software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup ia64mm
+ * @{
+ */
+/** @file
+*/
+#include <arch/mm/vhpt.h>
+#include <mm/frame.h>
+#include <print.h>
+static vhpt_entry_t* vhpt_base;
+__address vhpt_set_up(void)
+{
+    vhpt_base=(vhpt_entry_t*) PA2KA(PFN2ADDR(frame_alloc(VHPT_WIDTH-FRAME_WIDTH,FRAME_KA)));
+    if(!vhpt_base) panic("Kernel configured with VHPT but no memory for table.");
+    vhpt_invalidate_all();
+    return (__address) vhpt_base;
+}
+void vhpt_mapping_insert(__address va, asid_t asid, tlb_entry_t entry)
+{
+    region_register rr_save, rr;
+    index_t vrn;
+    rid_t rid;
+    __u64 tag;
+    vhpt_entry_t *ventry;
+    vrn = va >> VRN_SHIFT;
+    rid = ASID2RID(asid, vrn);
+  rr_save.word = rr_read(vrn);
+  rr.word = rr_save.word;
+  rr.map.rid = rid;
+  rr_write(vrn, rr.word);
+  srlz_i();
+    ventry = (vhpt_entry_t *) thash(va);
+  tag = ttag(va);
+  rr_write(vrn, rr_save.word);
+  srlz_i();
+  srlz_d();
+    ventry->word[0]=entry.word[0];
+    ventry->word[1]=entry.word[1];
+    ventry->present.tag.tag_word = tag;
+}
+void vhpt_invalidate_all()
+{
+    memsetb((__address)vhpt_base,1<<VHPT_WIDTH,0);
+}
+void vhpt_invalidate_asid(asid_t asid)
+{
+    vhpt_invalidate_all();
+}
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/ia64/src/mm/frame.c
 ,0 → 1,59
+/*
+ * Copyright (C) 2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup ia64mm
+ * @{
+ */
+/** @file
+ */
+#include <arch/mm/frame.h>
+#include <mm/frame.h>
+#include <config.h>
+#include <panic.h>
+/*
+ * This is Ski-specific and certainly not sufficient
+ * for real ia64 systems that provide memory map.
+ */
+#define ROM_BASE    0xa0000
+#define ROM_SIZE    (384*1024)
+void frame_arch_init(void)
+{
+    zone_create(0, config.memory_size >> FRAME_WIDTH, 1, 0);
+    /*
+     * Blacklist ROM regions.
+     */
+    frame_mark_unavailable(ADDR2PFN(ROM_BASE), ROM_SIZE >> FRAME_WIDTH);
+}
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/ia64/src/ddi/ddi.c
 ,0 → 1,56
+/*
+ * Copyright (C) 2006 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/** @addtogroup ia64ddi
+ * @{
+ */
+/** @file
+ */
+#include <ddi/ddi.h>
+#include <proc/task.h>
+#include <arch/types.h>
+#include <typedefs.h>
+/** Enable I/O space range for task.
+ *
+ * Interrupts are disabled and task is locked.
+ *
+ * @param task Task.
+ * @param ioaddr Startign I/O space address.
+ * @param size Size of the enabled I/O range.
+ *
+ * @return 0 on success or an error code from errno.h.
+ */
+int ddi_iospace_enable_arch(task_t *task, __address ioaddr, size_t size)
+{
+    return 0;
+}
+/** @}
+ */

 /tags/0.2.0.2/kernel/arch/ia64/src/cpu/cpu.c
 ,0 → 1,76
+/*
+ * Copyright (C) 2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/** @addtogroup ia64
+ * @{
+ */
+/** @file
+ */
+#include <cpu.h>
+#include <arch.h>
+#include <arch/register.h>
+#include <print.h>
+void cpu_arch_init(void)
+{
+}
+void cpu_identify(void)
+{
+    CPU->arch.cpuid0 = cpuid_read(0);
+    CPU->arch.cpuid1 = cpuid_read(1);
+    CPU->arch.cpuid3.value = cpuid_read(3);
+}
+void cpu_print_report(cpu_t *m)
+{
+    char *family_str;
+    char vendor[2*sizeof(__u64)+1];
+    *((__u64 *) &vendor[0*sizeof(__u64)]) = CPU->arch.cpuid0;
+    *((__u64 *) &vendor[1*sizeof(__u64)]) = CPU->arch.cpuid1;
+    vendor[sizeof(vendor)-1] = '\0';
+    switch(m->arch.cpuid3.family) {
+        case FAMILY_ITANIUM:
+            family_str = "Itanium";
+        break;
+        case FAMILY_ITANIUM2:
+            family_str = "Itanium 2";
+        break;
+        default:
+            family_str = "Unknown";
+        break;
+    }
+    printf("cpu%d: %s (%s), archrev=%d, model=%d, revision=%d\n", CPU->id, family_str, vendor, CPU->arch.cpuid3.archrev, CPU->arch.cpuid3.model, CPU->arch.cpuid3.revision);
+}
+/** @}
+ */

 /tags/0.2.0.2/kernel/arch/ia64/src/proc/scheduler.c
 ,0 → 1,93
+/*
+ * Copyright (C) 2006 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup ia64proc
+ * @{
+ */
+/** @file
+ */
+#include <proc/scheduler.h>
+#include <proc/thread.h>
+#include <arch.h>
+#include <arch/register.h>
+#include <arch/context.h>
+#include <arch/stack.h>
+#include <arch/mm/tlb.h>
+#include <config.h>
+#include <align.h>
+/** Perform ia64 specific tasks needed before the new task is run. */
+void before_task_runs_arch(void)
+{
+}
+/** Prepare kernel stack pointers in bank 0 r22 and r23 and make sure the stack is mapped in DTR. */
+void before_thread_runs_arch(void)
+{
+    __address base;
+    base = ALIGN_DOWN(config.base, 1<<KERNEL_PAGE_WIDTH);
+    if ((__address) THREAD->kstack < base || (__address) THREAD->kstack > base + (1<<(KERNEL_PAGE_WIDTH))) {
+        /*
+         * Kernel stack of this thread is not mapped by DTR[TR_KERNEL].
+         * Use DTR[TR_KSTACK1] and DTR[TR_KSTACK2] to map it.
+         */
+        /* purge DTR[TR_STACK1] and DTR[TR_STACK2] */
+        dtr_purge((__address) THREAD->kstack, PAGE_WIDTH+1);
+        /* insert DTR[TR_STACK1] and DTR[TR_STACK2] */
+        dtlb_kernel_mapping_insert((__address) THREAD->kstack, KA2PA(THREAD->kstack), true, DTR_KSTACK1);
+        dtlb_kernel_mapping_insert((__address) THREAD->kstack + PAGE_SIZE, KA2PA(THREAD->kstack) + FRAME_SIZE, true, DTR_KSTACK2);
+    }
+    /*
+     * Record address of kernel backing store to bank 0 r22.
+     * Record address of kernel stack to bank 0 r23.
+     * These values will be found there after switch from userspace.
+     */
+    __asm__ volatile (
+        "bsw.0\n"
+        "mov r22 = %0\n"
+        "mov r23 = %1\n"
+        "bsw.1\n"
+        :
+        : "r" (&THREAD->kstack[THREAD_STACK_SIZE]),
+          "r" (&THREAD->kstack[THREAD_STACK_SIZE - SP_DELTA])
+        );
+}
+void after_thread_ran_arch(void)
+{
+}
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/ia64/src/ia64.c
 ,0 → 1,157
+/*
+ * Copyright (C) 2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup ia64
+ * @{
+ */
+/** @file
+ */
+#include <arch.h>
+#include <arch/ski/ski.h>
+#include <arch/drivers/it.h>
+#include <arch/interrupt.h>
+#include <arch/barrier.h>
+#include <arch/asm.h>
+#include <arch/register.h>
+#include <arch/types.h>
+#include <arch/context.h>
+#include <arch/stack.h>
+#include <arch/mm/page.h>
+#include <mm/as.h>
+#include <config.h>
+#include <userspace.h>
+#include <console/console.h>
+#include <proc/uarg.h>
+#include <syscall/syscall.h>
+static int kbd_release=0;
+void arch_pre_main(void)
+{
+    /* Setup usermode init tasks. */
+    init.cnt = 8;
+    init.tasks[0].addr = INIT0_ADDRESS;
+    init.tasks[0].size = INIT0_SIZE;
+    init.tasks[1].addr = INIT0_ADDRESS + 0x400000;
+    init.tasks[1].size = INIT0_SIZE;
+    init.tasks[2].addr = INIT0_ADDRESS + 0x800000;
+    init.tasks[2].size = INIT0_SIZE;
+    init.tasks[3].addr = INIT0_ADDRESS + 0xc00000;
+    init.tasks[3].size = INIT0_SIZE;
+    init.tasks[4].addr = INIT0_ADDRESS + 0x1000000;
+    init.tasks[4].size = INIT0_SIZE;
+    init.tasks[5].addr = INIT0_ADDRESS + 0x1400000;
+    init.tasks[5].size = INIT0_SIZE;
+    init.tasks[6].addr = INIT0_ADDRESS + 0x1800000;
+    init.tasks[6].size = INIT0_SIZE;
+    init.tasks[7].addr = INIT0_ADDRESS + 0x1c00000;
+    init.tasks[7].size = INIT0_SIZE;
+}
+void arch_pre_mm_init(void)
+{
+    /* Set Interruption Vector Address (i.e. location of interruption vector table). */
+    iva_write((__address) &ivt);
+    srlz_d();
+    ski_init_console();
+    it_init();
+}
+void arch_post_mm_init(void)
+{
+    ski_set_console_sysinfo();
+}
+void arch_pre_smp_init(void)
+{
+}
+void arch_post_smp_init(void)
+{
+}
+/** Enter userspace and never return. */
+void userspace(uspace_arg_t *kernel_uarg)
+{
+    psr_t psr;
+    rsc_t rsc;
+    psr.value = psr_read();
+    psr.cpl = PL_USER;
+    psr.i = true;               /* start with interrupts enabled */
+    psr.ic = true;
+    psr.ri = 0;             /* start with instruction #0 */
+    psr.bn = 1;             /* start in bank 0 */
+    __asm__ volatile ("mov %0 = ar.rsc\n" : "=r" (rsc.value));
+    rsc.loadrs = 0;
+    rsc.be = false;
+    rsc.pl = PL_USER;
+    rsc.mode = 3;               /* eager mode */
+    switch_to_userspace((__address) kernel_uarg->uspace_entry,
+                ((__address) kernel_uarg->uspace_stack)+PAGE_SIZE-ALIGN_UP(STACK_ITEM_SIZE, STACK_ALIGNMENT),
+                ((__address) kernel_uarg->uspace_stack)+PAGE_SIZE,
+                (__address) kernel_uarg->uspace_uarg,
+                psr.value, rsc.value);
+    while (1) {
+        ;
+    }
+}
+/** Set thread-local-storage pointer.
+ *
+ * We use r13 (a.k.a. tp) for this purpose.
+ */
+__native sys_tls_set(__native addr)
+{
+        return 0;
+}
+/** Acquire console back for kernel
+ *
+ */
+void arch_grab_console(void)
+{
+    kbd_release=kbd_uspace;
+    kbd_uspace=0;
+}
+/** Return console to userspace
+ *
+ */
+void arch_release_console(void)
+{
+    kbd_uspace=kbd_release;
+}
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/ia64/src/interrupt.c
 ,0 → 1,283
+/*
+ * Copyright (C) 2005 Jakub Jermar
+ * Copyright (C) 2005 Jakub Vana
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/** @addtogroup ia64interrupt
+ * @{
+ */
+/** @file
+ */
+#include <arch/interrupt.h>
+#include <panic.h>
+#include <print.h>
+#include <console/console.h>
+#include <arch/types.h>
+#include <arch/asm.h>
+#include <arch/barrier.h>
+#include <arch/register.h>
+#include <arch/drivers/it.h>
+#include <arch.h>
+#include <symtab.h>
+#include <debug.h>
+#include <syscall/syscall.h>
+#include <print.h>
+#include <proc/scheduler.h>
+#include <ipc/sysipc.h>
+#include <ipc/irq.h>
+#include <ipc/ipc.h>
+#include <interrupt.h>
+#define VECTORS_64_BUNDLE   20
+#define VECTORS_16_BUNDLE   48
+#define VECTORS_16_BUNDLE_START 0x5000
+#define VECTOR_MAX      0x7f00
+#define BUNDLE_SIZE     16
+char *vector_names_64_bundle[VECTORS_64_BUNDLE] = {
+    "VHPT Translation vector",
+    "Instruction TLB vector",
+    "Data TLB vector",
+    "Alternate Instruction TLB vector",
+    "Alternate Data TLB vector",
+    "Data Nested TLB vector",
+    "Instruction Key Miss vector",
+    "Data Key Miss vector",
+    "Dirty-Bit vector",
+    "Instruction Access-Bit vector",
+    "Data Access-Bit vector"
+    "Break Instruction vector",
+    "External Interrupt vector"
+    "Reserved",
+    "Reserved",
+    "Reserved",
+    "Reserved",
+    "Reserved",
+    "Reserved",
+    "Reserved"
+};
+char *vector_names_16_bundle[VECTORS_16_BUNDLE] = {
+    "Page Not Present vector",
+    "Key Permission vector",
+    "Instruction Access rights vector",
+    "Data Access Rights vector",
+    "General Exception vector",
+    "Disabled FP-Register vector",
+    "NaT Consumption vector",
+    "Speculation vector",
+    "Reserved",
+    "Debug vector",
+    "Unaligned Reference vector",
+    "Unsupported Data Reference vector",
+    "Floating-point Fault vector",
+    "Floating-point Trap vector",
+    "Lower-Privilege Transfer Trap vector",
+    "Taken Branch Trap vector",
+    "Single STep Trap vector",
+    "Reserved",
+    "Reserved",
+    "Reserved",
+    "Reserved",
+    "Reserved",
+    "Reserved",
+    "Reserved",
+    "Reserved",
+    "IA-32 Exception vector",
+    "IA-32 Intercept vector",
+    "IA-32 Interrupt vector",
+    "Reserved",
+    "Reserved",
+    "Reserved"
+};
+static char *vector_to_string(__u16 vector);
+static void dump_interrupted_context(istate_t *istate);
+char *vector_to_string(__u16 vector)
+{
+    ASSERT(vector <= VECTOR_MAX);
+    if (vector >= VECTORS_16_BUNDLE_START)
+        return vector_names_16_bundle[(vector-VECTORS_16_BUNDLE_START)/(16*BUNDLE_SIZE)];
+    else
+        return vector_names_64_bundle[vector/(64*BUNDLE_SIZE)];
+}
+void dump_interrupted_context(istate_t *istate)
+{
+    char *ifa, *iipa, *iip;
+    ifa = get_symtab_entry(istate->cr_ifa);
+    iipa = get_symtab_entry(istate->cr_iipa);
+    iip = get_symtab_entry(istate->cr_iip);
+    putchar('\n');
+    printf("Interrupted context dump:\n");
+    printf("ar.bsp=%p\tar.bspstore=%p\n", istate->ar_bsp, istate->ar_bspstore);
+    printf("ar.rnat=%#018llx\tar.rsc=%#018llx\n", istate->ar_rnat, istate->ar_rsc);
+    printf("ar.ifs=%#018llx\tar.pfs=%#018llx\n", istate->ar_ifs, istate->ar_pfs);
+    printf("cr.isr=%#018llx\tcr.ipsr=%#018llx\t\n", istate->cr_isr.value, istate->cr_ipsr);
+    printf("cr.iip=%#018llx, #%d\t(%s)\n", istate->cr_iip, istate->cr_isr.ei, iip);
+    printf("cr.iipa=%#018llx\t(%s)\n", istate->cr_iipa, iipa);
+    printf("cr.ifa=%#018llx\t(%s)\n", istate->cr_ifa, ifa);
+}
+void general_exception(__u64 vector, istate_t *istate)
+{
+    char *desc = "";
+    switch (istate->cr_isr.ge_code) {
+        case GE_ILLEGALOP:
+        desc = "Illegal Operation fault";
+        break;
+        case GE_PRIVOP:
+        desc = "Privileged Operation fault";
+        break;
+        case GE_PRIVREG:
+        desc = "Privileged Register fault";
+        break;
+        case GE_RESREGFLD:
+        desc = "Reserved Register/Field fault";
+        break;
+        case GE_DISBLDISTRAN:
+        desc = "Disabled Instruction Set Transition fault";
+        break;
+        case GE_ILLEGALDEP:
+        desc = "Illegal Dependency fault";
+        break;
+        default:
+            desc = "unknown";
+        break;
+    }
+    fault_if_from_uspace(istate, "General Exception (%s)", desc);
+    dump_interrupted_context(istate);
+    panic("General Exception (%s)\n", desc);
+}
+void fpu_enable(void);
+void disabled_fp_register(__u64 vector, istate_t *istate)
+{
+#ifdef CONFIG_FPU_LAZY
+    scheduler_fpu_lazy_request();
+#else
+    fault_if_from_uspace(istate, "Interruption: %#hx (%s)", (__u16) vector, vector_to_string(vector));
+    dump_interrupted_context(istate);
+    panic("Interruption: %#hx (%s)\n", (__u16) vector, vector_to_string(vector));
+#endif
+}
+void nop_handler(__u64 vector, istate_t *istate)
+{
+}
+/** Handle syscall. */
+int break_instruction(__u64 vector, istate_t *istate)
+{
+    /*
+     * Move to next instruction after BREAK.
+     */
+    if (istate->cr_ipsr.ri == 2) {
+        istate->cr_ipsr.ri = 0;
+        istate->cr_iip += 16;
+    } else {
+        istate->cr_ipsr.ri++;
+    }
+    if (istate->in4 < SYSCALL_END)
+        return syscall_table[istate->in4](istate->in0, istate->in1, istate->in2, istate->in3);
+    else
+        panic("Undefined syscall %d", istate->in4);
+    return -1;
+}
+void universal_handler(__u64 vector, istate_t *istate)
+{
+    fault_if_from_uspace(istate,"Interruption: %#hx (%s)\n",(__u16) vector, vector_to_string(vector));
+    dump_interrupted_context(istate);
+    panic("Interruption: %#hx (%s)\n", (__u16) vector, vector_to_string(vector));
+}
+void external_interrupt(__u64 vector, istate_t *istate)
+{
+    cr_ivr_t ivr;
+    ivr.value = ivr_read();
+    srlz_d();
+    switch(ivr.vector) {
+        case INTERRUPT_TIMER:
+        it_interrupt();
+            break;
+        case INTERRUPT_SPURIOUS:
+            printf("cpu%d: spurious interrupt\n", CPU->id);
+        break;
+        default:
+        panic("\nUnhandled External Interrupt Vector %d\n", ivr.vector);
+        break;
+    }
+}
+void virtual_interrupt(__u64 irq,void *param)
+{
+    switch(irq) {
+        case IRQ_KBD:
+            if(kbd_uspace) ipc_irq_send_notif(irq);
+            break;
+        default:
+            panic("\nUnhandled Virtual Interrupt request %d\n", irq);
+        break;
+    }
+}
+/* Reregister irq to be IPC-ready */
+void irq_ipc_bind_arch(__native irq)
+{
+    if(irq==IRQ_KBD) {
+        kbd_uspace=1;
+        return;
+    }
+    return;
+    panic("not implemented\n");
+    /* TODO */
+}
+/** @}
+ */

 /tags/0.2.0.2/kernel/arch/ia64/src/fpu_context.c
 ,0 → 1,485
+/*
+ * Copyright (C) 2005 Jakub Vana
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup ia64
+ * @{
+ */
+/** @file
+ *
+ */
+#include <fpu_context.h>
+#include <arch/register.h>
+#include <print.h>
+void fpu_context_save(fpu_context_t *fctx){
+        asm volatile(
+            "stf.spill [%0]=f32,0x80\n"
+            "stf.spill [%1]=f33,0x80\n"
+            "stf.spill [%2]=f34,0x80\n"
+            "stf.spill [%3]=f35,0x80\n"
+            "stf.spill [%4]=f36,0x80\n"
+            "stf.spill [%5]=f37,0x80\n"
+            "stf.spill [%6]=f38,0x80\n"
+            "stf.spill [%7]=f39,0x80\n;;"
+            "stf.spill [%0]=f40,0x80\n"
+            "stf.spill [%1]=f41,0x80\n"
+            "stf.spill [%2]=f42,0x80\n"
+            "stf.spill [%3]=f43,0x80\n"
+            "stf.spill [%4]=f44,0x80\n"
+            "stf.spill [%5]=f45,0x80\n"
+            "stf.spill [%6]=f46,0x80\n"
+            "stf.spill [%7]=f47,0x80\n;;"
+            "stf.spill [%0]=f48,0x80\n"
+            "stf.spill [%1]=f49,0x80\n"
+            "stf.spill [%2]=f50,0x80\n"
+            "stf.spill [%3]=f51,0x80\n"
+            "stf.spill [%4]=f52,0x80\n"
+            "stf.spill [%5]=f53,0x80\n"
+            "stf.spill [%6]=f54,0x80\n"
+            "stf.spill [%7]=f55,0x80\n;;"
+            "stf.spill [%0]=f56,0x80\n"
+            "stf.spill [%1]=f57,0x80\n"
+            "stf.spill [%2]=f58,0x80\n"
+            "stf.spill [%3]=f59,0x80\n"
+            "stf.spill [%4]=f60,0x80\n"
+            "stf.spill [%5]=f61,0x80\n"
+            "stf.spill [%6]=f62,0x80\n"
+            "stf.spill [%7]=f63,0x80\n;;"
+            "stf.spill [%0]=f64,0x80\n"
+            "stf.spill [%1]=f65,0x80\n"
+            "stf.spill [%2]=f66,0x80\n"
+            "stf.spill [%3]=f67,0x80\n"
+            "stf.spill [%4]=f68,0x80\n"
+            "stf.spill [%5]=f69,0x80\n"
+            "stf.spill [%6]=f70,0x80\n"
+            "stf.spill [%7]=f71,0x80\n;;"
+            "stf.spill [%0]=f72,0x80\n"
+            "stf.spill [%1]=f73,0x80\n"
+            "stf.spill [%2]=f74,0x80\n"
+            "stf.spill [%3]=f75,0x80\n"
+            "stf.spill [%4]=f76,0x80\n"
+            "stf.spill [%5]=f77,0x80\n"
+            "stf.spill [%6]=f78,0x80\n"
+            "stf.spill [%7]=f79,0x80\n;;"
+            "stf.spill [%0]=f80,0x80\n"
+            "stf.spill [%1]=f81,0x80\n"
+            "stf.spill [%2]=f82,0x80\n"
+            "stf.spill [%3]=f83,0x80\n"
+            "stf.spill [%4]=f84,0x80\n"
+            "stf.spill [%5]=f85,0x80\n"
+            "stf.spill [%6]=f86,0x80\n"
+            "stf.spill [%7]=f87,0x80\n;;"
+            "stf.spill [%0]=f88,0x80\n"
+            "stf.spill [%1]=f89,0x80\n"
+            "stf.spill [%2]=f90,0x80\n"
+            "stf.spill [%3]=f91,0x80\n"
+            "stf.spill [%4]=f92,0x80\n"
+            "stf.spill [%5]=f93,0x80\n"
+            "stf.spill [%6]=f94,0x80\n"
+            "stf.spill [%7]=f95,0x80\n;;"
+            "stf.spill [%0]=f96,0x80\n"
+            "stf.spill [%1]=f97,0x80\n"
+            "stf.spill [%2]=f98,0x80\n"
+            "stf.spill [%3]=f99,0x80\n"
+            "stf.spill [%4]=f100,0x80\n"
+            "stf.spill [%5]=f101,0x80\n"
+            "stf.spill [%6]=f102,0x80\n"
+            "stf.spill [%7]=f103,0x80\n;;"
+            "stf.spill [%0]=f104,0x80\n"
+            "stf.spill [%1]=f105,0x80\n"
+            "stf.spill [%2]=f106,0x80\n"
+            "stf.spill [%3]=f107,0x80\n"
+            "stf.spill [%4]=f108,0x80\n"
+            "stf.spill [%5]=f109,0x80\n"
+            "stf.spill [%6]=f110,0x80\n"
+            "stf.spill [%7]=f111,0x80\n;;"
+            "stf.spill [%0]=f112,0x80\n"
+            "stf.spill [%1]=f113,0x80\n"
+            "stf.spill [%2]=f114,0x80\n"
+            "stf.spill [%3]=f115,0x80\n"
+            "stf.spill [%4]=f116,0x80\n"
+            "stf.spill [%5]=f117,0x80\n"
+            "stf.spill [%6]=f118,0x80\n"
+            "stf.spill [%7]=f119,0x80\n;;"
+            "stf.spill [%0]=f120,0x80\n"
+            "stf.spill [%1]=f121,0x80\n"
+            "stf.spill [%2]=f122,0x80\n"
+            "stf.spill [%3]=f123,0x80\n"
+            "stf.spill [%4]=f124,0x80\n"
+            "stf.spill [%5]=f125,0x80\n"
+            "stf.spill [%6]=f126,0x80\n"
+            "stf.spill [%7]=f127,0x80\n;;"
+            :
+            :"r" (&((fctx->fr)[0])),"r" (&((fctx->fr)[1])),"r" (&((fctx->fr)[2])),"r" (&((fctx->fr)[3])),
+             "r" (&((fctx->fr)[4])),"r" (&((fctx->fr)[5])),"r" (&((fctx->fr)[6])),"r" (&((fctx->fr)[7]))
+        );
+}
+void fpu_context_restore(fpu_context_t *fctx)
+{
+        asm volatile(
+            "ldf.fill f32=[%0],0x80\n"
+            "ldf.fill f33=[%1],0x80\n"
+            "ldf.fill f34=[%2],0x80\n"
+            "ldf.fill f35=[%3],0x80\n"
+            "ldf.fill f36=[%4],0x80\n"
+            "ldf.fill f37=[%5],0x80\n"
+            "ldf.fill f38=[%6],0x80\n"
+            "ldf.fill f39=[%7],0x80\n;;"
+            "ldf.fill f40=[%0],0x80\n"
+            "ldf.fill f41=[%1],0x80\n"
+            "ldf.fill f42=[%2],0x80\n"
+            "ldf.fill f43=[%3],0x80\n"
+            "ldf.fill f44=[%4],0x80\n"
+            "ldf.fill f45=[%5],0x80\n"
+            "ldf.fill f46=[%6],0x80\n"
+            "ldf.fill f47=[%7],0x80\n;;"
+            "ldf.fill f48=[%0],0x80\n"
+            "ldf.fill f49=[%1],0x80\n"
+            "ldf.fill f50=[%2],0x80\n"
+            "ldf.fill f51=[%3],0x80\n"
+            "ldf.fill f52=[%4],0x80\n"
+            "ldf.fill f53=[%5],0x80\n"
+            "ldf.fill f54=[%6],0x80\n"
+            "ldf.fill f55=[%7],0x80\n;;"
+            "ldf.fill f56=[%0],0x80\n"
+            "ldf.fill f57=[%1],0x80\n"
+            "ldf.fill f58=[%2],0x80\n"
+            "ldf.fill f59=[%3],0x80\n"
+            "ldf.fill f60=[%4],0x80\n"
+            "ldf.fill f61=[%5],0x80\n"
+            "ldf.fill f62=[%6],0x80\n"
+            "ldf.fill f63=[%7],0x80\n;;"
+            "ldf.fill f64=[%0],0x80\n"
+            "ldf.fill f65=[%1],0x80\n"
+            "ldf.fill f66=[%2],0x80\n"
+            "ldf.fill f67=[%3],0x80\n"
+            "ldf.fill f68=[%4],0x80\n"
+            "ldf.fill f69=[%5],0x80\n"
+            "ldf.fill f70=[%6],0x80\n"
+            "ldf.fill f71=[%7],0x80\n;;"
+            "ldf.fill f72=[%0],0x80\n"
+            "ldf.fill f73=[%1],0x80\n"
+            "ldf.fill f74=[%2],0x80\n"
+            "ldf.fill f75=[%3],0x80\n"
+            "ldf.fill f76=[%4],0x80\n"
+            "ldf.fill f77=[%5],0x80\n"
+            "ldf.fill f78=[%6],0x80\n"
+            "ldf.fill f79=[%7],0x80\n;;"
+            "ldf.fill f80=[%0],0x80\n"
+            "ldf.fill f81=[%1],0x80\n"
+            "ldf.fill f82=[%2],0x80\n"
+            "ldf.fill f83=[%3],0x80\n"
+            "ldf.fill f84=[%4],0x80\n"
+            "ldf.fill f85=[%5],0x80\n"
+            "ldf.fill f86=[%6],0x80\n"
+            "ldf.fill f87=[%7],0x80\n;;"
+            "ldf.fill f88=[%0],0x80\n"
+            "ldf.fill f89=[%1],0x80\n"
+            "ldf.fill f90=[%2],0x80\n"
+            "ldf.fill f91=[%3],0x80\n"
+            "ldf.fill f92=[%4],0x80\n"
+            "ldf.fill f93=[%5],0x80\n"
+            "ldf.fill f94=[%6],0x80\n"
+            "ldf.fill f95=[%7],0x80\n;;"
+            "ldf.fill f96=[%0],0x80\n"
+            "ldf.fill f97=[%1],0x80\n"
+            "ldf.fill f98=[%2],0x80\n"
+            "ldf.fill f99=[%3],0x80\n"
+            "ldf.fill f100=[%4],0x80\n"
+            "ldf.fill f101=[%5],0x80\n"
+            "ldf.fill f102=[%6],0x80\n"
+            "ldf.fill f103=[%7],0x80\n;;"
+            "ldf.fill f104=[%0],0x80\n"
+            "ldf.fill f105=[%1],0x80\n"
+            "ldf.fill f106=[%2],0x80\n"
+            "ldf.fill f107=[%3],0x80\n"
+            "ldf.fill f108=[%4],0x80\n"
+            "ldf.fill f109=[%5],0x80\n"
+            "ldf.fill f110=[%6],0x80\n"
+            "ldf.fill f111=[%7],0x80\n;;"
+            "ldf.fill f112=[%0],0x80\n"
+            "ldf.fill f113=[%1],0x80\n"
+            "ldf.fill f114=[%2],0x80\n"
+            "ldf.fill f115=[%3],0x80\n"
+            "ldf.fill f116=[%4],0x80\n"
+            "ldf.fill f117=[%5],0x80\n"
+            "ldf.fill f118=[%6],0x80\n"
+            "ldf.fill f119=[%7],0x80\n;;"
+            "ldf.fill f120=[%0],0x80\n"
+            "ldf.fill f121=[%1],0x80\n"
+            "ldf.fill f122=[%2],0x80\n"
+            "ldf.fill f123=[%3],0x80\n"
+            "ldf.fill f124=[%4],0x80\n"
+            "ldf.fill f125=[%5],0x80\n"
+            "ldf.fill f126=[%6],0x80\n"
+            "ldf.fill f127=[%7],0x80\n;;"
+            :
+            :"r" (&((fctx->fr)[0])),"r" (&((fctx->fr)[1])),"r" (&((fctx->fr)[2])),"r" (&((fctx->fr)[3])),
+             "r" (&((fctx->fr)[4])),"r" (&((fctx->fr)[5])),"r" (&((fctx->fr)[6])),"r" (&((fctx->fr)[7]))
+        );
+}
+void fpu_enable(void)
+{
+        __u64 a = 0 ;
+        asm volatile(
+            "rsm %0;;"
+            "srlz.i\n"
+            "srlz.d;;\n"
+            :
+            :"i" (PSR_DFH_MASK)
+        );
+        asm volatile
+        (
+            "mov %0=ar.fpsr;;\n"
+            "or %0=%0,%1;;\n"
+            "mov ar.fpsr=%0;;\n"
+            : "+r" (a)
+            : "r" (0x38)
+        );
+}
+void fpu_disable(void)
+{
+        __u64 a = 0 ;
+        asm volatile(
+            "ssm %0;;\n"
+            "srlz.i\n"
+            "srlz.d;;\n"
+            :
+            :"i" (PSR_DFH_MASK)
+        );
+        asm volatile
+        (
+            "mov %0=ar.fpsr;;\n"
+            "or %0=%0,%1;;\n"
+            "mov ar.fpsr=%0;;\n"
+            : "+r" (a)
+            : "r" (0x38)
+        );
+}
+void fpu_init(void)
+{
+        __u64 a = 0 ;
+        asm volatile
+        (
+            "mov %0=ar.fpsr;;\n"
+            "or %0=%0,%1;;\n"
+            "mov ar.fpsr=%0;;\n"
+            : "+r" (a)
+            : "r" (0x38)
+        );
+        asm volatile(
+            "mov f2=f0\n"
+            "mov f3=f0\n"
+            "mov f4=f0\n"
+            "mov f5=f0\n"
+            "mov f6=f0\n"
+            "mov f7=f0\n"
+            "mov f8=f0\n"
+            "mov f9=f0\n"
+            "mov f10=f0\n"
+            "mov f11=f0\n"
+            "mov f12=f0\n"
+            "mov f13=f0\n"
+            "mov f14=f0\n"
+            "mov f15=f0\n"
+            "mov f16=f0\n"
+            "mov f17=f0\n"
+            "mov f18=f0\n"
+            "mov f19=f0\n"
+            "mov f20=f0\n"
+            "mov f21=f0\n"
+            "mov f22=f0\n"
+            "mov f23=f0\n"
+            "mov f24=f0\n"
+            "mov f25=f0\n"
+            "mov f26=f0\n"
+            "mov f27=f0\n"
+            "mov f28=f0\n"
+            "mov f29=f0\n"
+            "mov f30=f0\n"
+            "mov f31=f0\n"
+            "mov f32=f0\n"
+            "mov f33=f0\n"
+            "mov f34=f0\n"
+            "mov f35=f0\n"
+            "mov f36=f0\n"
+            "mov f37=f0\n"
+            "mov f38=f0\n"
+            "mov f39=f0\n"
+            "mov f40=f0\n"
+            "mov f41=f0\n"
+            "mov f42=f0\n"
+            "mov f43=f0\n"
+            "mov f44=f0\n"
+            "mov f45=f0\n"
+            "mov f46=f0\n"
+            "mov f47=f0\n"
+            "mov f48=f0\n"
+            "mov f49=f0\n"
+            "mov f50=f0\n"
+            "mov f51=f0\n"
+            "mov f52=f0\n"
+            "mov f53=f0\n"
+            "mov f54=f0\n"
+            "mov f55=f0\n"
+            "mov f56=f0\n"
+            "mov f57=f0\n"
+            "mov f58=f0\n"
+            "mov f59=f0\n"
+            "mov f60=f0\n"
+            "mov f61=f0\n"
+            "mov f62=f0\n"
+            "mov f63=f0\n"
+            "mov f64=f0\n"
+            "mov f65=f0\n"
+            "mov f66=f0\n"
+            "mov f67=f0\n"
+            "mov f68=f0\n"
+            "mov f69=f0\n"
+            "mov f70=f0\n"
+            "mov f71=f0\n"
+            "mov f72=f0\n"
+            "mov f73=f0\n"
+            "mov f74=f0\n"
+            "mov f75=f0\n"
+            "mov f76=f0\n"
+            "mov f77=f0\n"
+            "mov f78=f0\n"
+            "mov f79=f0\n"
+            "mov f80=f0\n"
+            "mov f81=f0\n"
+            "mov f82=f0\n"
+            "mov f83=f0\n"
+            "mov f84=f0\n"
+            "mov f85=f0\n"
+            "mov f86=f0\n"
+            "mov f87=f0\n"
+            "mov f88=f0\n"
+            "mov f89=f0\n"
+            "mov f90=f0\n"
+            "mov f91=f0\n"
+            "mov f92=f0\n"
+            "mov f93=f0\n"
+            "mov f94=f0\n"
+            "mov f95=f0\n"
+            "mov f96=f0\n"
+            "mov f97=f0\n"
+            "mov f98=f0\n"
+            "mov f99=f0\n"
+            "mov f100=f0\n"
+            "mov f101=f0\n"
+            "mov f102=f0\n"
+            "mov f103=f0\n"
+            "mov f104=f0\n"
+            "mov f105=f0\n"
+            "mov f106=f0\n"
+            "mov f107=f0\n"
+            "mov f108=f0\n"
+            "mov f109=f0\n"
+            "mov f110=f0\n"
+            "mov f111=f0\n"
+            "mov f112=f0\n"
+            "mov f113=f0\n"
+            "mov f114=f0\n"
+            "mov f115=f0\n"
+            "mov f116=f0\n"
+            "mov f117=f0\n"
+            "mov f118=f0\n"
+            "mov f119=f0\n"
+            "mov f120=f0\n"
+            "mov f121=f0\n"
+            "mov f122=f0\n"
+            "mov f123=f0\n"
+            "mov f124=f0\n"
+            "mov f125=f0\n"
+            "mov f126=f0\n"
+            "mov f127=f0\n"
+        );
+}
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/ia64/src/ski/ski.c
 ,0 → 1,205
+/*
+ * Copyright (C) 2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup ia64
+ * @{
+ */
+/** @file
+ */
+#include <arch/ski/ski.h>
+#include <console/console.h>
+#include <console/chardev.h>
+#include <arch/interrupt.h>
+#include <sysinfo/sysinfo.h>
+chardev_t ski_console;
+chardev_t ski_uconsole;
+static bool kb_disable;
+int kbd_uspace=0;
+static void ski_putchar(chardev_t *d, const char ch);
+static __s32 ski_getchar(void);
+/** Display character on debug console
+ *
+ * Use SSC (Simulator System Call) to
+ * display character on debug console.
+ *
+ * @param d Character device.
+ * @param ch Character to be printed.
+ */
+void ski_putchar(chardev_t *d, const char ch)
+{
+    __asm__ volatile (
+        "mov r15=%0\n"
+        "mov r32=%1\n"      /* r32 is in0 */
+        "break 0x80000\n"   /* modifies r8 */
+        :
+        : "i" (SKI_PUTCHAR), "r" (ch)
+        : "r15", "in0", "r8"
+    );
+    if (ch == '\n')
+        ski_putchar(d, '\r');
+}
+/** Ask debug console if a key was pressed.
+ *
+ * Use SSC (Simulator System Call) to
+ * get character from debug console.
+ *
+ * This call is non-blocking.
+ *
+ * @return ASCII code of pressed key or 0 if no key pressed.
+ */
+__s32 ski_getchar(void)
+{
+    __u64 ch;
+    __asm__ volatile (
+        "mov r15=%1\n"
+        "break 0x80000;;\n" /* modifies r8 */
+        "mov %0=r8;;\n"
+        : "=r" (ch)
+        : "i" (SKI_GETCHAR)
+        : "r15",  "r8"
+    );
+    return (__s32) ch;
+}
+/**
+ * This is a blocking wrapper for ski_getchar().
+ * To be used when the kernel crashes.
+ */
+static char ski_getchar_blocking(chardev_t *d)
+{
+    int ch;
+    while(!(ch=ski_getchar()))
+        ;
+    if(ch == '\r')
+        ch = '\n';
+    return (char) ch;
+}
+/** Ask keyboard if a key was pressed. */
+void poll_keyboard(void)
+{
+    char ch;
+    static char last;
+    if (kb_disable)
+        return;
+    ch = ski_getchar();
+    if(ch == '\r')
+        ch = '\n';
+    if (ch){
+        if(kbd_uspace){
+            chardev_push_character(&ski_uconsole, ch);
+            virtual_interrupt(IRQ_KBD,NULL);
+        }
+        else {
+            chardev_push_character(&ski_console, ch);
+        }
+        last = ch;
+        return;
+    }
+    if (last){
+        if(kbd_uspace){
+            chardev_push_character(&ski_uconsole, 0);
+            virtual_interrupt(IRQ_KBD,NULL);
+        }
+        else {
+        }
+        last = 0;
+    }
+}
+/* Called from getc(). */
+static void ski_kb_enable(chardev_t *d)
+{
+    kb_disable = false;
+}
+/* Called from getc(). */
+static void ski_kb_disable(chardev_t *d)
+{
+    kb_disable = true;
+}
+static chardev_operations_t ski_ops = {
+    .resume = ski_kb_enable,
+    .suspend = ski_kb_disable,
+    .write = ski_putchar,
+    .read = ski_getchar_blocking
+};
+/** Initialize debug console
+ *
+ * Issue SSC (Simulator System Call) to
+ * to open debug console.
+ */
+void ski_init_console(void)
+{
+    __asm__ volatile (
+        "mov r15=%0\n"
+        "break 0x80000\n"
+        :
+        : "i" (SKI_INIT_CONSOLE)
+        : "r15", "r8"
+    );
+    chardev_initialize("ski_console", &ski_console, &ski_ops);
+    chardev_initialize("ski_uconsole", &ski_uconsole, &ski_ops);
+    stdin = &ski_console;
+    stdout = &ski_console;
+}
+/** Setup console sysinfo (i.e. Keyboard IRQ)
+ *
+ * Because sysinfo neads memory allocation/dealocation
+ * this functions should be called separetely from init.
+ *
+ */
+void ski_set_console_sysinfo(void)
+{
+    sysinfo_set_item_val("kbd",NULL,true);
+    sysinfo_set_item_val("kbd.irq",NULL,IRQ_KBD);
+}
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/ia64/src/putchar.c
 ,0 → 1,45
+/*
+ * Copyright (C) 2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup ia64
+ * @{
+ */
+/** @file
+ */
+#include <putchar.h>
+#include <arch/ski/ski.h>
+void putchar(const char ch)
+{
+    ski_write(ch);
+}
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/ia64/src/drivers/it.c
 ,0 → 1,106
+/*
+ * Copyright (C) 2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup ia64
+ * @{
+ */
+/** @file
+ */
+/** Interval Timer driver. */
+#include <arch/drivers/it.h>
+#include <arch/ski/ski.h>
+#include <arch/interrupt.h>
+#include <arch/register.h>
+#include <arch/asm.h>
+#include <arch/barrier.h>
+#include <time/clock.h>
+#include <arch.h>
+#define IT_SERVICE_CLOCKS 64
+/** Initialize Interval Timer. */
+void it_init(void)
+{
+    cr_itv_t itv;
+    /* initialize Interval Timer external interrupt vector */
+    itv.value = itv_read();
+    itv.vector = INTERRUPT_TIMER;
+    itv.m = 0;
+    itv_write(itv.value);
+    /* set Interval Timer Counter to zero */
+    itc_write(0);
+    /* generate first Interval Timer interrupt in IT_DELTA ticks */
+    itm_write(IT_DELTA);
+    /* propagate changes */
+    srlz_d();
+}
+/** Process Interval Timer interrupt. */
+void it_interrupt(void)
+{
+    __s64 c;
+    __s64 m;
+    eoi_write(EOI);
+    m=itm_read();
+    while(1)
+    {
+        c=itc_read();
+        c+=IT_SERVICE_CLOCKS;
+        m+=IT_DELTA;
+        if(m-c<0)
+        {
+            CPU->missed_clock_ticks++;
+        }
+        else break;
+    }
+    itm_write(m);
+    srlz_d();               /* propagate changes */
+    clock();
+    poll_keyboard();
+}
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/ia64/src/asm.S
 ,0 → 1,184
+#
+# Copyright (C) 2005 Jakub Jermar
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# - Redistributions of source code must retain the above copyright
+#   notice, this list of conditions and the following disclaimer.
+# - Redistributions in binary form must reproduce the above copyright
+#   notice, this list of conditions and the following disclaimer in the
+#   documentation and/or other materials provided with the distribution.
+# - The name of the author may not be used to endorse or promote products
+#   derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+#include <arch/register.h>
+.text
+/** Copy memory from/to userspace.
+ *
+ * This memcpy() has been taken from the assembler output of
+ * the generic _memcpy() and modified to have the failover part.
+ *
+ * @param in0 Destination address.
+ * @param in1 Source address.
+ * @param in2 Number of byte to copy.
+ */
+.global memcpy
+.global memcpy_from_uspace
+.global memcpy_to_uspace
+.global memcpy_from_uspace_failover_address
+.global memcpy_to_uspace_failover_address
+memcpy:
+memcpy_from_uspace:
+memcpy_to_uspace:
+    alloc loc0 = ar.pfs, 3, 1, 0, 0
+    adds r14 = 7, in1
+    mov r2 = ar.lc
+    mov r8 = in1 ;;
+    and r14 = -8, r14 ;;
+    cmp.ne p6, p7 = r14, in1
+(p7)    br.cond.dpnt 3f ;;
+:
+    cmp.ne p6, p7 = 0, in2
+(p7)    br.cond.dpnt 2f ;;
+(p6)    adds r14 = -1, in2
+(p6)    mov r16 = r0
+(p6)    mov r17 = r0 ;;
+(p6)    mov ar.lc = r14
+:
+    add r14 = r16, r8
+    add r15 = r16, in0
+    adds r17 = 1, r17 ;;
+    ld1 r14 = [r14]
+    mov r16 = r17 ;;
+    st1 [r15] = r14
+    br.cloop.sptk.few 1b ;;
+:
+    mov ar.lc = r2
+    mov ar.pfs = loc0
+    br.ret.sptk.many rp
+:
+    adds r14 = 7, in0 ;;
+    and r14 = -8, r14 ;;
+    cmp.eq p6, p7 = r14, in0
+(p7)    br.cond.dptk 0b
+    shr.u r18 = in2, 3 ;;
+    cmp.ne p6, p7 = 0, r18
+(p7)    br.cond.dpnt 5f ;;
+(p6)    adds r14 = -1, r18
+(p6)    mov r16 = r0
+(p6)    mov r17 = r0 ;;
+(p6)    mov ar.lc = r14
+:
+    shladd r14 = r16, 3, r0
+    adds r16 = 1, r17 ;;
+    add r15 = r8, r14
+    add r14 = in0, r14
+    mov r17 = r16 ;;
+    ld8 r15 = [r15] ;;
+    st8 [r14] = r15
+    br.cloop.sptk.few 4b
+:
+    and r15 = 7, in2
+    shladd r14 = r18, 3, r0
+    mov r16 = r0
+    mov r18 = r0 ;;
+    cmp.eq p6, p7 = 0, r15
+    add in0 = r14, in0
+    adds r15 = -1, r15
+    add r17 = r14, r8
+(p6)    br.cond.dpnt 2b ;;
+    mov ar.lc = r15
+:
+    add r14 = r16, r17
+    add r15 = r16, in0
+    adds r16 = 1, r18 ;;
+    ld1 r14 = [r14]
+    mov r18 = r16 ;;
+    st1 [r15] = r14
+    br.cloop.sptk.few 6b ;;
+    mov ar.lc = r2
+    mov ar.pfs = loc0
+    br.ret.sptk.many rp
+memcpy_from_uspace_failover_address:
+memcpy_to_uspace_failover_address:
+    mov r8 = r0         /* return 0 on failure */
+    mov ar.pfs = loc0
+    br.ret.sptk.many rp
+.global memsetb
+memsetb:
+    br _memsetb
+.global cpu_halt
+cpu_halt:
+    br cpu_halt
+.global panic_printf
+panic_printf:
+    {
+        br.call.sptk.many b0=printf
+    }
+    br halt
+/** Switch to userspace - low level code.
+ *
+ * @param in0 Userspace entry point address.
+ * @param in1 Userspace stack pointer address.
+ * @param in2 Userspace register stack pointer address.
+ * @param in3 Userspace address of thread uspace_arg_t structure.
+ * @param in4 Value to be stored in IPSR.
+ * @param in5 Value to be stored in RSC.
+ */
+.global switch_to_userspace
+switch_to_userspace:
+    alloc loc0 = ar.pfs, 6, 3, 0, 0
+    rsm (PSR_IC_MASK | PSR_I_MASK)      /* disable interruption collection and interrupts */
+    srlz.d ;;
+    srlz.i ;;
+    mov cr.ipsr = in4
+    mov cr.iip = in0
+    mov r12 = in1
+    xor r1 = r1, r1
+    mov loc1 = cr.ifs
+    movl loc2 = PFM_MASK ;;
+    and loc1 = loc2, loc1 ;;
+    mov cr.ifs = loc1 ;;            /* prevent decrementing BSP by rfi */
+    invala
+    mov loc1 = ar.rsc ;;
+    and loc1 = ~3, loc1 ;;
+    mov ar.rsc = loc1 ;;            /* put RSE into enforced lazy mode */
+    flushrs ;;
+    mov ar.bspstore = in2 ;;
+    mov ar.rsc = in5 ;;
+    mov r8 = in3
+    rfi ;;

 /tags/0.2.0.2/kernel/arch/ia64/src/start.S
 ,0 → 1,139
+#
+# Copyright (C) 2005 Jakub Jermar
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# - Redistributions of source code must retain the above copyright
+#   notice, this list of conditions and the following disclaimer.
+# - Redistributions in binary form must reproduce the above copyright
+#   notice, this list of conditions and the following disclaimer in the
+#   documentation and/or other materials provided with the distribution.
+# - The name of the author may not be used to endorse or promote products
+#   derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+#include <arch/register.h>
+#include <arch/mm/page.h>
+#include <arch/mm/asid.h>
+#include <mm/asid.h>
+#define RR_MASK (0xFFFFFFFF00000002)
+#define RID_SHIFT 8
+#define PS_SHIFT 2
+#define KERNEL_TRANSLATION_I 0x0010000000000661
+#define KERNEL_TRANSLATION_D 0x0010000000000661
+.section K_TEXT_START, "ax"
+.global kernel_image_start
+stack0:
+kernel_image_start:
+    .auto
+    # Fill TR.i and TR.d using Region Register #VRN_KERNEL
+    movl r8=(VRN_KERNEL<<VRN_SHIFT)
+    mov r9=rr[r8]
+    movl r10=(RR_MASK)
+    and r9=r10,r9
+    movl r10=((RID_KERNEL<<RID_SHIFT)|(KERNEL_PAGE_WIDTH<<PS_SHIFT))
+    or  r9=r10,r9
+    mov rr[r8]=r9
+    movl r8=(VRN_KERNEL<<VRN_SHIFT)
+    mov cr.ifa=r8
+    movl r10=(KERNEL_PAGE_WIDTH<<PS_SHIFT)
+    mov cr.itir=r10
+    movl r10=(KERNEL_TRANSLATION_I)
+    itr.i itr[r0]=r10
+    movl r10=(KERNEL_TRANSLATION_D)
+    itr.d dtr[r0]=r10
+    # initialize PSR
+    mov psr.l = r0
+    srlz.i
+    srlz.d
+    movl r10=(PSR_DT_MASK|PSR_RT_MASK|PSR_IT_MASK|PSR_IC_MASK)  /* Enable paging */
+    mov r9=psr
+    or r10=r10,r9
+    mov cr.ipsr=r10
+    mov cr.ifs=r0
+    movl r8=paging_start
+    mov cr.iip=r8
+    srlz.d
+    srlz.i
+    .explicit
+    /*
+     * Return From Interupt is the only the way to fill upper half word of PSR.
+     */
+    rfi;;
+.global paging_start
+paging_start:
+    /*
+     * Now we are paging.
+     */
+    # switch to register bank 1
+    bsw.1
+    # initialize register stack
+    mov ar.rsc = r0
+    movl r8=(VRN_KERNEL<<VRN_SHIFT) ;;
+    mov ar.bspstore = r8
+    loadrs
+    # initialize memory stack to some sane value
+    movl r12 = stack0;;
+    add r12 = - 16, r12 /* allocate a scratch area on the stack */
+    # initialize gp (Global Pointer) register
+    movl r1 = _hardcoded_load_address
+    /*
+     * Initialize hardcoded_* variables.
+     */
+    movl r14 = _hardcoded_ktext_size
+    movl r15 = _hardcoded_kdata_size
+    movl r16 = _hardcoded_load_address ;;
+    addl r17 = @gprel(hardcoded_ktext_size), gp
+    addl r18 = @gprel(hardcoded_kdata_size), gp
+    addl r19 = @gprel(hardcoded_load_address), gp
+    ;;
+    st8 [r17] = r14
+    st8 [r18] = r15
+    st8 [r19] = r16
+    ssm (1<<19);; /*Disable f32 - f127*/
+    srlz.i;
+    srlz.d;;
+    br.call.sptk.many b0 = arch_pre_main
+    movl r18=main_bsp ;;
+    mov b1=r18 ;;
+    br.call.sptk.many b0=b1
+:
+    br 0b

 /tags/0.2.0.2/kernel/arch/ia64/src/ivt.S
 ,0 → 1,582
+#
+# Copyright (C) 2005 Jakub Vana
+# Copyright (C) 2005 Jakub Jermar
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# - Redistributions of source code must retain the above copyright
+#   notice, this list of conditions and the following disclaimer.
+# - Redistributions in binary form must reproduce the above copyright
+#   notice, this list of conditions and the following disclaimer in the
+#   documentation and/or other materials provided with the distribution.
+# - The name of the author may not be used to endorse or promote products
+#   derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+#include <arch/stack.h>
+#include <arch/register.h>
+#include <arch/mm/page.h>
+#include <align.h>
+#define FRS_TO_SAVE 30
+#define STACK_ITEMS     (19 + FRS_TO_SAVE*2)
+#define STACK_FRAME_SIZE    ALIGN_UP((STACK_ITEMS*STACK_ITEM_SIZE) + STACK_SCRATCH_AREA_SIZE, STACK_ALIGNMENT)
+#if (STACK_ITEMS % 2 == 0)
+#   define STACK_FRAME_BIAS 8
+#else
+#   define STACK_FRAME_BIAS 16
+#endif
+/** Partitioning of bank 0 registers. */
+#define R_OFFS      r16
+#define R_HANDLER   r17
+#define R_RET       r18
+#define R_TMP       r19
+#define R_KSTACK_BSP    r22 /* keep in sync with before_thread_runs_arch() */
+#define R_KSTACK    r23 /* keep in sync with before_thread_runs_arch() */
+/** Heavyweight interrupt handler
+ *
+ * This macro roughly follows steps from 1 to 19 described in
+ * Intel Itanium Architecture Software Developer's Manual, Chapter 3.4.2.
+ *
+ * HEAVYWEIGHT_HANDLER macro must cram into 16 bundles (48 instructions).
+ * This goal is achieved by using procedure calls after RSE becomes operational.
+ *
+ * Some steps are skipped (enabling and disabling interrupts).
+ *
+ * @param offs Offset from the beginning of IVT.
+ * @param handler Interrupt handler address.
+ */
+.macro HEAVYWEIGHT_HANDLER offs, handler=universal_handler
+    .org ivt + \offs
+    mov R_OFFS = \offs
+    movl R_HANDLER = \handler ;;
+    br heavyweight_handler
+.endm
+.global heavyweight_handler
+heavyweight_handler:
+    /* 1. copy interrupt registers into bank 0 */
+    /*
+     * Note that r24-r31 from bank 0 can be used only as long as PSR.ic = 0.
+     */
+    /* Set up FPU as in interrupted context. */
+    mov r24 = psr
+    mov r25 = cr.ipsr
+    mov r26 = PSR_DFH_MASK
+    mov r27 = ~PSR_DFH_MASK ;;
+    and r26 = r25, r26
+    and r24 = r24, r27;;
+    or r24 = r24, r26;;
+    mov psr.l = r24;;
+    srlz.i
+    srlz.d;;
+    mov r24 = cr.iip
+    mov r25 = cr.ipsr
+    mov r26 = cr.iipa
+    mov r27 = cr.isr
+    mov r28 = cr.ifa
+    /* 2. preserve predicate register into bank 0 */
+    mov r29 = pr ;;
+    /* 3. switch to kernel memory stack */
+        mov r30 = cr.ipsr
+    shr.u r31 = r12, VRN_SHIFT ;;
+    shr.u r30 = r30, PSR_CPL_SHIFT ;;
+    and r30 = PSR_CPL_MASK_SHIFTED, r30 ;;
+    /*
+     * Set p3 to true if the interrupted context executed in kernel mode.
+     * Set p4 to false if the interrupted context didn't execute in kernel mode.
+     */
+    cmp.eq p3, p4 = r30, r0 ;;
+    cmp.eq p1, p2 = r30, r0 ;;  /* remember IPSR setting in p1 and p2 */
+    /*
+     * Set p3 to true if the stack register references kernel address space.
+     * Set p4 to false if the stack register doesn't reference kernel address space.
+     */
+(p3)    cmp.eq p3, p4 = VRN_KERNEL, r31 ;;
+    /*
+     * Now, p4 is true iff the stack needs to be switched to kernel stack.
+     */
+    mov r30 = r12
+(p4)    mov r12 = R_KSTACK ;;
+    add r31 = -STACK_FRAME_BIAS, r12 ;;
+    add r12 = -STACK_FRAME_SIZE, r12
+    /* 4. save registers in bank 0 into memory stack */
+    /*
+     * If this is break_instruction handler,
+     * copy input parameters to stack.
+     */
+        mov R_TMP = 0x2c00 ;;
+    cmp.eq p6,p5 = R_OFFS, R_TMP ;;
+    /*
+     * From now on, if this is break_instruction handler, p6 is true and p5 is false.
+     * Otherwise p6 is false and p5 is true.
+     * Note that p5 is a preserved predicate register and we make use of it.
+     */
+(p6)    st8 [r31] = r36, -8 ;;      /* save in4 */
+(p6)    st8 [r31] = r35, -8 ;;      /* save in3 */
+(p6)    st8 [r31] = r34, -8 ;;      /* save in2 */
+(p6)    st8 [r31] = r33, -8 ;;      /* save in1 */
+(p6)    st8 [r31] = r32, -8 ;;      /* save in0 */
+(p5)    add r31 = -40, r31 ;;
+    st8 [r31] = r30, -8 ;;      /* save old stack pointer */
+    st8 [r31] = r29, -8 ;;      /* save predicate registers */
+    st8 [r31] = r24, -8 ;;      /* save cr.iip */
+    st8 [r31] = r25, -8 ;;      /* save cr.ipsr */
+    st8 [r31] = r26, -8 ;;      /* save cr.iipa */
+    st8 [r31] = r27, -8 ;;      /* save cr.isr */
+    st8 [r31] = r28, -8 ;;      /* save cr.ifa */
+    /* 5. RSE switch from interrupted context */
+    mov r24 = ar.rsc
+    mov r25 = ar.pfs
+    cover
+    mov r26 = cr.ifs
+    st8 [r31] = r24, -8 ;;      /* save ar.rsc */
+    st8 [r31] = r25, -8 ;;      /* save ar.pfs */
+    st8 [r31] = r26, -8     /* save ar.ifs */
+    and r24 = ~(RSC_PL_MASK), r24 ;;
+    and r30 = ~(RSC_MODE_MASK), r24 ;;
+    mov ar.rsc = r30 ;;     /* update RSE state */
+    mov r27 = ar.rnat
+    mov r28 = ar.bspstore ;;
+    /*
+     * Inspect BSPSTORE to figure out whether it is necessary to switch to kernel BSPSTORE.
+     */
+(p1)    shr.u r30 = r28, VRN_SHIFT ;;
+(p1)    cmp.eq p1, p2 = VRN_KERNEL, r30 ;;
+    /*
+     * If BSPSTORE needs to be switched, p1 is false and p2 is true.
+     */
+(p1)    mov r30 = r28
+(p2)    mov r30 = R_KSTACK_BSP ;;
+(p2)    mov ar.bspstore = r30 ;;
+    mov r29 = ar.bsp
+    st8 [r31] = r27, -8 ;;      /* save ar.rnat */
+    st8 [r31] = r30, -8 ;;      /* save new value written to ar.bspstore */
+    st8 [r31] = r28, -8 ;;      /* save ar.bspstore */
+    st8 [r31] = r29, -8         /* save ar.bsp */
+    mov ar.rsc = r24        /* restore RSE's setting + kernel privileges */
+    /* steps 6 - 15 are done by heavyweight_handler_inner() */
+    mov R_RET = b0          /* save b0 belonging to interrupted context */
+    br.call.sptk.many b0 = heavyweight_handler_inner
+:  mov b0 = R_RET          /* restore b0 belonging to the interrupted context */
+    /* 16. RSE switch to interrupted context */
+    cover               /* allocate zerro size frame (step 1 (from Intel Docs)) */
+    add r31 = (STACK_SCRATCH_AREA_SIZE+(FRS_TO_SAVE*2*8)), r12 ;;
+    ld8 r30 = [r31], +8 ;;      /* load ar.bsp */
+    ld8 r29 = [r31], +8 ;;      /* load ar.bspstore */
+    ld8 r28 = [r31], +8 ;;      /* load ar.bspstore_new */
+    sub r27 = r30 , r28 ;;      /* calculate loadrs (step 2) */
+    shl r27 = r27, 16
+    mov r24 = ar.rsc ;;
+    and r30 = ~3, r24 ;;
+    or  r24 = r30 , r27 ;;
+    mov ar.rsc = r24 ;;     /* place RSE in enforced lazy mode */
+    loadrs              /* (step 3) */
+    ld8 r27 = [r31], +8 ;;      /* load ar.rnat */
+    ld8 r26 = [r31], +8 ;;      /* load cr.ifs */
+    ld8 r25 = [r31], +8 ;;      /* load ar.pfs */
+    ld8 r24 = [r31], +8 ;;      /* load ar.rsc */
+    mov ar.bspstore = r29 ;;    /* (step 4) */
+    mov ar.rnat = r27       /* (step 5) */
+    mov ar.pfs = r25        /* (step 6) */
+    mov cr.ifs = r26
+    mov ar.rsc = r24        /* (step 7) */
+    /* 17. restore interruption state from memory stack */
+    ld8 r28 = [r31], +8 ;;      /* load cr.ifa */
+    ld8 r27 = [r31], +8 ;;      /* load cr.isr */
+    ld8 r26 = [r31], +8 ;;      /* load cr.iipa */
+    ld8 r25 = [r31], +8 ;;      /* load cr.ipsr */
+    ld8 r24 = [r31], +8 ;;      /* load cr.iip */
+    mov cr.iip = r24;;
+    mov cr.iipa = r26
+    mov cr.isr = r27
+    mov cr.ifa = r28
+    /* Set up FPU as in exception. */
+    mov r24 = psr
+    mov r26 = PSR_DFH_MASK
+    mov r27 = ~PSR_DFH_MASK ;;
+    and r25 = r25, r27
+    and r24 = r24, r26 ;;
+    or r25 = r25, r24;;
+    mov cr.ipsr = r25
+    /* 18. restore predicate registers from memory stack */
+    ld8 r29 = [r31], +8 ;;      /* load predicate registers */
+    mov pr = r29
+    /* 19. return from interruption */
+        ld8 r12 = [r31]         /* load stack pointer */
+    rfi ;;
+.global heavyweight_handler_inner
+heavyweight_handler_inner:
+    /*
+     * From this point, the rest of the interrupted context
+     * will be preserved in stacked registers and backing store.
+     */
+    alloc loc0 = ar.pfs, 0, 48, 2, 0 ;;
+    /* bank 0 is going to be shadowed, copy essential data from there */
+    mov loc1 = R_RET    /* b0 belonging to interrupted context */
+    mov loc2 = R_HANDLER
+    mov out0 = R_OFFS
+    add out1 = STACK_SCRATCH_AREA_SIZE, r12
+    /* 6. switch to bank 1 and reenable PSR.ic */
+    ssm PSR_IC_MASK
+    bsw.1 ;;
+    srlz.d
+    /* 7. preserve branch and application registers */
+        mov loc3 = ar.unat
+    mov loc4 = ar.lc
+    mov loc5 = ar.ec
+    mov loc6 = ar.ccv
+    mov loc7 = ar.csd
+    mov loc8 = ar.ssd
+    mov loc9 = b0
+    mov loc10 = b1
+    mov loc11 = b2
+    mov loc12 = b3
+    mov loc13 = b4
+    mov loc14 = b5
+    mov loc15 = b6
+    mov loc16 = b7
+    /* 8. preserve general and floating-point registers */
+    mov loc17 = r1
+    mov loc18 = r2
+    mov loc19 = r3
+    mov loc20 = r4
+    mov loc21 = r5
+    mov loc22 = r6
+    mov loc23 = r7
+(p5)    mov loc24 = r8      /* only if not in break_instruction handler */
+    mov loc25 = r9
+    mov loc26 = r10
+    mov loc27 = r11
+    /* skip r12 (stack pointer) */
+    mov loc28 = r13
+    mov loc29 = r14
+    mov loc30 = r15
+    mov loc31 = r16
+    mov loc32 = r17
+    mov loc33 = r18
+    mov loc34 = r19
+    mov loc35 = r20
+    mov loc36 = r21
+    mov loc37 = r22
+    mov loc38 = r23
+    mov loc39 = r24
+    mov loc40 = r25
+    mov loc41 = r26
+    mov loc42 = r27
+    mov loc43 = r28
+    mov loc44 = r29
+    mov loc45 = r30
+    mov loc46 = r31
+    add r24 = 96 + STACK_SCRATCH_AREA_SIZE, r12
+    add r25 = 112 + STACK_SCRATCH_AREA_SIZE, r12
+    add r26 = 0 + STACK_SCRATCH_AREA_SIZE, r12
+    add r27 = 16 + STACK_SCRATCH_AREA_SIZE, r12
+    add r28 = 32 + STACK_SCRATCH_AREA_SIZE, r12
+    add r29 = 48 + STACK_SCRATCH_AREA_SIZE, r12
+    add r30 = 64 + STACK_SCRATCH_AREA_SIZE, r12
+    add r31 = 80 + STACK_SCRATCH_AREA_SIZE, r12 ;;
+    stf.spill [r26] = f2, 0x80
+    stf.spill [r27] = f3, 0x80
+    stf.spill [r28] = f4, 0x80
+    stf.spill [r29] = f5, 0x80
+    stf.spill [r30] = f6, 0x80
+    stf.spill [r31] = f7, 0x80 ;;
+    stf.spill [r24] = f8, 0x80
+    stf.spill [r25] = f9, 0x80
+    stf.spill [r26] = f10, 0x80
+    stf.spill [r27] = f11, 0x80
+    stf.spill [r28] = f12, 0x80
+    stf.spill [r29] = f13, 0x80
+    stf.spill [r30] = f14, 0x80
+    stf.spill [r31] = f15, 0x80 ;;
+    stf.spill [r24] = f16, 0x80
+    stf.spill [r25] = f17, 0x80
+    stf.spill [r26] = f18, 0x80
+    stf.spill [r27] = f19, 0x80
+    stf.spill [r28] = f20, 0x80
+    stf.spill [r29] = f21, 0x80
+    stf.spill [r30] = f22, 0x80
+    stf.spill [r31] = f23, 0x80 ;;
+    stf.spill [r24] = f24, 0x80
+    stf.spill [r25] = f25, 0x80
+    stf.spill [r26] = f26, 0x80
+    stf.spill [r27] = f27, 0x80
+    stf.spill [r28] = f28, 0x80
+    stf.spill [r29] = f29, 0x80
+    stf.spill [r30] = f30, 0x80
+    stf.spill [r31] = f31, 0x80 ;;
+    mov loc47 = ar.fpsr /* preserve floating point status register */
+    /* 9. skipped (will not enable interrupts) */
+    /*
+         * ssm PSR_I_MASK
+     * ;;
+     * srlz.d
+     */
+    /* 10. call handler */
+        movl r1 = _hardcoded_load_address
+        mov b1 = loc2
+    br.call.sptk.many b0 = b1
+    /* 11. return from handler */
+:
+    /* 12. skipped (will not disable interrupts) */
+    /*
+         * rsm PSR_I_MASK
+     * ;;
+     * srlz.d
+     */
+    /* 13. restore general and floating-point registers */
+    add r24 = 96 + STACK_SCRATCH_AREA_SIZE, r12
+    add r25 = 112 + STACK_SCRATCH_AREA_SIZE, r12
+    add r26 = 0 + STACK_SCRATCH_AREA_SIZE, r12
+    add r27 = 16 + STACK_SCRATCH_AREA_SIZE, r12
+    add r28 = 32 + STACK_SCRATCH_AREA_SIZE, r12
+    add r29 = 48 + STACK_SCRATCH_AREA_SIZE, r12
+    add r30 = 64 + STACK_SCRATCH_AREA_SIZE, r12
+    add r31 = 80 + STACK_SCRATCH_AREA_SIZE, r12 ;;
+    ldf.fill f2 = [r26], 0x80
+    ldf.fill f3 = [r27], 0x80
+    ldf.fill f4 = [r28], 0x80
+    ldf.fill f5 = [r29], 0x80
+    ldf.fill f6 = [r30], 0x80
+    ldf.fill f7 = [r31], 0x80 ;;
+    ldf.fill f8 = [r24], 0x80
+    ldf.fill f9 = [r25], 0x80
+    ldf.fill f10 = [r26], 0x80
+    ldf.fill f11 = [r27], 0x80
+    ldf.fill f12 = [r28], 0x80
+    ldf.fill f13 = [r29], 0x80
+    ldf.fill f14 = [r30], 0x80
+    ldf.fill f15 = [r31], 0x80 ;;
+    ldf.fill f16 = [r24], 0x80
+    ldf.fill f17 = [r25], 0x80
+    ldf.fill f18 = [r26], 0x80
+    ldf.fill f19 = [r27], 0x80
+    ldf.fill f20 = [r28], 0x80
+    ldf.fill f21 = [r29], 0x80
+    ldf.fill f22 = [r30], 0x80
+    ldf.fill f23 = [r31], 0x80 ;;
+    ldf.fill f24 = [r24], 0x80
+    ldf.fill f25 = [r25], 0x80
+    ldf.fill f26 = [r26], 0x80
+    ldf.fill f27 = [r27], 0x80
+    ldf.fill f28 = [r28], 0x80
+    ldf.fill f29 = [r29], 0x80
+    ldf.fill f30 = [r30], 0x80
+    ldf.fill f31 = [r31], 0x80 ;;
+    mov r1 = loc17
+    mov r2 = loc18
+    mov r3 = loc19
+    mov r4 = loc20
+    mov r5 = loc21
+    mov r6 = loc22
+    mov r7 = loc23
+(p5)    mov r8 = loc24      /* only if not in break_instruction handler */
+    mov r9 = loc25
+    mov r10 = loc26
+    mov r11 = loc27
+    /* skip r12 (stack pointer) */
+    mov r13 = loc28
+    mov r14 = loc29
+    mov r15 = loc30
+    mov r16 = loc31
+    mov r17 = loc32
+    mov r18 = loc33
+    mov r19 = loc34
+    mov r20 = loc35
+    mov r21 = loc36
+    mov r22 = loc37
+    mov r23 = loc38
+    mov r24 = loc39
+    mov r25 = loc40
+    mov r26 = loc41
+    mov r27 = loc42
+    mov r28 = loc43
+    mov r29 = loc44
+    mov r30 = loc45
+    mov r31 = loc46
+    mov ar.fpsr = loc47 /* restore floating point status register */
+    /* 14. restore branch and application registers */
+        mov ar.unat = loc3
+    mov ar.lc = loc4
+    mov ar.ec = loc5
+    mov ar.ccv = loc6
+    mov ar.csd = loc7
+    mov ar.ssd = loc8
+    mov b0 = loc9
+    mov b1 = loc10
+    mov b2 = loc11
+    mov b3 = loc12
+    mov b4 = loc13
+    mov b5 = loc14
+    mov b6 = loc15
+    mov b7 = loc16
+    /* 15. disable PSR.ic and switch to bank 0 */
+    rsm PSR_IC_MASK
+    bsw.0 ;;
+    srlz.d
+    mov R_RET = loc1
+    mov ar.pfs = loc0
+    br.ret.sptk.many b0
+.global ivt
+.align 32768
+ivt:
+    HEAVYWEIGHT_HANDLER 0x0000
+    HEAVYWEIGHT_HANDLER 0x0400
+    HEAVYWEIGHT_HANDLER 0x0800
+    HEAVYWEIGHT_HANDLER 0x0c00 alternate_instruction_tlb_fault
+    HEAVYWEIGHT_HANDLER 0x1000 alternate_data_tlb_fault
+    HEAVYWEIGHT_HANDLER 0x1400 data_nested_tlb_fault
+    HEAVYWEIGHT_HANDLER 0x1800
+    HEAVYWEIGHT_HANDLER 0x1c00
+    HEAVYWEIGHT_HANDLER 0x2000 data_dirty_bit_fault
+    HEAVYWEIGHT_HANDLER 0x2400 instruction_access_bit_fault
+    HEAVYWEIGHT_HANDLER 0x2800 data_access_bit_fault
+    HEAVYWEIGHT_HANDLER 0x2c00 break_instruction
+    HEAVYWEIGHT_HANDLER 0x3000 external_interrupt   /* For external interrupt, heavyweight handler is used. */
+    HEAVYWEIGHT_HANDLER 0x3400
+    HEAVYWEIGHT_HANDLER 0x3800
+    HEAVYWEIGHT_HANDLER 0x3c00
+    HEAVYWEIGHT_HANDLER 0x4000
+    HEAVYWEIGHT_HANDLER 0x4400
+    HEAVYWEIGHT_HANDLER 0x4800
+    HEAVYWEIGHT_HANDLER 0x4c00
+    HEAVYWEIGHT_HANDLER 0x5000 page_not_present
+    HEAVYWEIGHT_HANDLER 0x5100
+    HEAVYWEIGHT_HANDLER 0x5200
+    HEAVYWEIGHT_HANDLER 0x5300
+    HEAVYWEIGHT_HANDLER 0x5400 general_exception
+    HEAVYWEIGHT_HANDLER 0x5500 disabled_fp_register
+    HEAVYWEIGHT_HANDLER 0x5600
+    HEAVYWEIGHT_HANDLER 0x5700
+    HEAVYWEIGHT_HANDLER 0x5800
+    HEAVYWEIGHT_HANDLER 0x5900
+    HEAVYWEIGHT_HANDLER 0x5a00
+    HEAVYWEIGHT_HANDLER 0x5b00
+    HEAVYWEIGHT_HANDLER 0x5c00
+    HEAVYWEIGHT_HANDLER 0x5d00
+    HEAVYWEIGHT_HANDLER 0x5e00
+    HEAVYWEIGHT_HANDLER 0x5f00
+    HEAVYWEIGHT_HANDLER 0x6000
+    HEAVYWEIGHT_HANDLER 0x6100
+    HEAVYWEIGHT_HANDLER 0x6200
+    HEAVYWEIGHT_HANDLER 0x6300
+    HEAVYWEIGHT_HANDLER 0x6400
+    HEAVYWEIGHT_HANDLER 0x6500
+    HEAVYWEIGHT_HANDLER 0x6600
+    HEAVYWEIGHT_HANDLER 0x6700
+    HEAVYWEIGHT_HANDLER 0x6800
+    HEAVYWEIGHT_HANDLER 0x6900
+    HEAVYWEIGHT_HANDLER 0x6a00
+    HEAVYWEIGHT_HANDLER 0x6b00
+    HEAVYWEIGHT_HANDLER 0x6c00
+    HEAVYWEIGHT_HANDLER 0x6d00
+    HEAVYWEIGHT_HANDLER 0x6e00
+    HEAVYWEIGHT_HANDLER 0x6f00
+    HEAVYWEIGHT_HANDLER 0x7000
+    HEAVYWEIGHT_HANDLER 0x7100
+    HEAVYWEIGHT_HANDLER 0x7200
+    HEAVYWEIGHT_HANDLER 0x7300
+    HEAVYWEIGHT_HANDLER 0x7400
+    HEAVYWEIGHT_HANDLER 0x7500
+    HEAVYWEIGHT_HANDLER 0x7600
+    HEAVYWEIGHT_HANDLER 0x7700
+    HEAVYWEIGHT_HANDLER 0x7800
+    HEAVYWEIGHT_HANDLER 0x7900
+    HEAVYWEIGHT_HANDLER 0x7a00
+    HEAVYWEIGHT_HANDLER 0x7b00
+    HEAVYWEIGHT_HANDLER 0x7c00
+    HEAVYWEIGHT_HANDLER 0x7d00
+    HEAVYWEIGHT_HANDLER 0x7e00
+    HEAVYWEIGHT_HANDLER 0x7f00

 /tags/0.2.0.2/kernel/arch/ia64/src/context.S
 ,0 → 1,246
+#
+# Copyright (C) 2005 Jakub Jermar
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# - Redistributions of source code must retain the above copyright
+#   notice, this list of conditions and the following disclaimer.
+# - Redistributions in binary form must reproduce the above copyright
+#   notice, this list of conditions and the following disclaimer in the
+#   documentation and/or other materials provided with the distribution.
+# - The name of the author may not be used to endorse or promote products
+#   derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+.text
+.global context_save_arch
+.global context_restore_arch
+context_save_arch:
+    alloc loc0 = ar.pfs, 1, 8, 0, 0
+    mov loc1 = ar.unat  ;;
+    /* loc2 */
+    mov loc3 = ar.rsc
+    .auto
+    /*
+     * Flush dirty registers to backing store.
+     * After this ar.bsp and ar.bspstore are equal.
+     */
+    flushrs
+    mov loc4 = ar.bsp
+    /*
+     * Put RSE to enforced lazy mode.
+     * So that ar.rnat can be read.
+     */
+    and loc5 = ~3, loc3
+    mov ar.rsc = loc5
+    mov loc5 = ar.rnat
+    .explicit
+    mov loc6 = ar.lc
+    /*
+     * Save application registers
+     */
+    st8 [in0] = loc0, 8 ;;  /* save ar.pfs */
+    st8 [in0] = loc1, 8 ;;  /* save ar.unat (caller) */
+    mov loc2 = in0      ;;
+    add in0 = 8, in0    ;;  /* skip ar.unat (callee) */
+    st8 [in0] = loc3, 8 ;;  /* save ar.rsc */
+    st8 [in0] = loc4, 8 ;;  /* save ar.bsp */
+    st8 [in0] = loc5, 8 ;;  /* save ar.rnat */
+    st8 [in0] = loc6, 8 ;;  /* save ar.lc */
+    /*
+     * Save general registers including NaT bits
+     */
+    st8.spill [in0] = r1, 8     ;;
+    st8.spill [in0] = r4, 8     ;;
+    st8.spill [in0] = r5, 8     ;;
+    st8.spill [in0] = r6, 8     ;;
+    st8.spill [in0] = r7, 8     ;;
+    st8.spill [in0] = r12, 8    ;;  /* save sp */
+    st8.spill [in0] = r13, 8    ;;
+    mov loc3 = ar.unat      ;;
+    st8 [loc2] = loc3       /* save ar.unat (callee) */
+    /*
+     * Save branch registers
+     */
+    mov loc2 = b0       ;;
+    st8 [in0] = loc2, 8     /* save pc */
+    mov loc3 = b1       ;;
+    st8 [in0] = loc3, 8
+    mov loc4 = b2       ;;
+    st8 [in0] = loc4, 8
+    mov loc5 = b3       ;;
+    st8 [in0] = loc5, 8
+    mov loc6 = b4       ;;
+    st8 [in0] = loc6, 8
+    mov loc7 = b5       ;;
+    st8 [in0] = loc7, 8
+    /*
+     * Save predicate registers
+     */
+    mov loc2 = pr       ;;
+    st8 [in0] = loc2, 16;;      /* Next fpu registers should be spilled to 16B aligned address */
+    /*
+     * Save floating-point registers.
+     */
+    stf.spill [in0] = f2, 16 ;;
+    stf.spill [in0] = f3, 16 ;;
+    stf.spill [in0] = f4, 16 ;;
+    stf.spill [in0] = f5, 16 ;;
+    stf.spill [in0] = f16, 16 ;;
+    stf.spill [in0] = f17, 16 ;;
+    stf.spill [in0] = f18, 16 ;;
+    stf.spill [in0] = f19, 16 ;;
+    stf.spill [in0] = f20, 16 ;;
+    stf.spill [in0] = f21, 16 ;;
+    stf.spill [in0] = f22, 16 ;;
+    stf.spill [in0] = f23, 16 ;;
+    stf.spill [in0] = f24, 16 ;;
+    stf.spill [in0] = f25, 16 ;;
+    stf.spill [in0] = f26, 16 ;;
+    stf.spill [in0] = f27, 16 ;;
+    stf.spill [in0] = f28, 16 ;;
+    stf.spill [in0] = f29, 16 ;;
+    stf.spill [in0] = f30, 16 ;;
+    stf.spill [in0] = f31, 16 ;;
+    mov ar.unat = loc1
+    add r8 = r0, r0, 1      /* context_save returns 1 */
+    br.ret.sptk.many b0
+context_restore_arch:
+    alloc loc0 = ar.pfs, 1, 9, 0, 0 ;;
+    ld8 loc0 = [in0], 8 ;;  /* load ar.pfs */
+    ld8 loc1 = [in0], 8 ;;  /* load ar.unat (caller) */
+    ld8 loc2 = [in0], 8 ;;  /* load ar.unat (callee) */
+    ld8 loc3 = [in0], 8 ;;  /* load ar.rsc */
+    ld8 loc4 = [in0], 8 ;;  /* load ar.bsp */
+    ld8 loc5 = [in0], 8 ;;  /* load ar.rnat */
+    ld8 loc6 = [in0], 8 ;;  /* load ar.lc */
+    .auto
+    /*
+     * Invalidate the ALAT
+     */
+    invala
+    /*
+     * Put RSE to enforced lazy mode.
+     * So that ar.bspstore and ar.rnat can be written.
+     */
+    movl loc8 = ~3
+    and loc8 = loc3, loc8
+    mov ar.rsc = loc8
+    /*
+     * Flush dirty registers to backing store.
+     * We do this because we want the following move
+     * to ar.bspstore to assign the same value to ar.bsp.
+     */
+    flushrs
+    /*
+     * Restore application registers
+     */
+    mov ar.bspstore = loc4  /* rse.bspload = ar.bsp = ar.bspstore = loc4 */
+    mov ar.rnat = loc5
+    mov ar.pfs = loc0
+    mov ar.rsc = loc3
+    .explicit
+    mov ar.unat = loc2  ;;
+    mov ar.lc = loc6
+    /*
+     * Restore general registers including NaT bits
+     */
+    ld8.fill r1 = [in0], 8  ;;
+    ld8.fill r4 = [in0], 8  ;;
+    ld8.fill r5 = [in0], 8  ;;
+    ld8.fill r6 = [in0], 8  ;;
+    ld8.fill r7 = [in0], 8  ;;
+    ld8.fill r12 = [in0], 8 ;;  /* restore sp */
+    ld8.fill r13 = [in0], 8 ;;
+    /*
+     * Restore branch registers
+     */
+    ld8 loc2 = [in0], 8 ;;  /* restore pc */
+    mov b0 = loc2
+    ld8 loc3 = [in0], 8 ;;
+    mov b1 = loc3
+    ld8 loc4 = [in0], 8 ;;
+    mov b2 = loc4
+    ld8 loc5 = [in0], 8 ;;
+    mov b3 = loc5
+    ld8 loc6 = [in0], 8 ;;
+    mov b4 = loc6
+    ld8 loc7 = [in0], 8 ;;
+    mov b5 = loc7
+    /*
+     * Restore predicate registers
+     */
+    ld8 loc2 = [in0], 16    ;;
+    mov pr = loc2, ~0
+    /*
+     * Restore floating-point registers.
+     */
+    ldf.fill f2 = [in0], 16 ;;
+    ldf.fill f3 = [in0], 16 ;;
+    ldf.fill f4 = [in0], 16 ;;
+    ldf.fill f5 = [in0], 16 ;;
+    ldf.fill f16 = [in0], 16 ;;
+    ldf.fill f17 = [in0], 16 ;;
+    ldf.fill f18 = [in0], 16 ;;
+    ldf.fill f19 = [in0], 16 ;;
+    ldf.fill f20 = [in0], 16 ;;
+    ldf.fill f21 = [in0], 16 ;;
+    ldf.fill f22 = [in0], 16 ;;
+    ldf.fill f23 = [in0], 16 ;;
+    ldf.fill f24 = [in0], 16 ;;
+    ldf.fill f25 = [in0], 16 ;;
+    ldf.fill f26 = [in0], 16 ;;
+    ldf.fill f27 = [in0], 16 ;;
+    ldf.fill f28 = [in0], 16 ;;
+    ldf.fill f29 = [in0], 16 ;;
+    ldf.fill f30 = [in0], 16 ;;
+    ldf.fill f31 = [in0], 16 ;;
+    mov ar.unat = loc1
+    mov r8 = r0         /* context_restore returns 0 */
+    br.ret.sptk.many b0

 /tags/0.2.0.2/kernel/arch/ia64/src/dummy.s
 ,0 → 1,42
+#
+# Copyright (C) 2005 Jakub Jermar
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# - Redistributions of source code must retain the above copyright
+#   notice, this list of conditions and the following disclaimer.
+# - Redistributions in binary form must reproduce the above copyright
+#   notice, this list of conditions and the following disclaimer in the
+#   documentation and/or other materials provided with the distribution.
+# - The name of the author may not be used to endorse or promote products
+#   derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+.text
+.global calibrate_delay_loop
+.global asm_delay_loop
+.global cpu_sleep
+.global dummy
+calibrate_delay_loop:
+asm_delay_loop:
+cpu_sleep:
+dummy:
+    br.ret.sptk.many b0

 /tags/0.2.0.2/kernel/arch/ia64/include/cpu.h
 ,0 → 1,69
+/*
+ * Copyright (C) 2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/** @addtogroup ia64
+ * @{
+ */
+/** @file
+ */
+#ifndef __ia64_CPU_H__
+#define __ia64_CPU_H__
+#include <arch/types.h>
+#include <typedefs.h>
+#include <arch/register.h>
+#define FAMILY_ITANIUM  0x7
+#define FAMILY_ITANIUM2 0x1f
+struct cpu_arch {
+    __u64 cpuid0;
+    __u64 cpuid1;
+    cpuid3_t cpuid3;
+};
+/** Read CPUID register.
+ *
+ * @param n CPUID register number.
+ *
+ * @return Value of CPUID[n] register.
+ */
+static inline __u64 cpuid_read(int n)
+{
+    __u64 v;
+    __asm__ volatile ("mov %0 = cpuid[%1]\n" : "=r" (v) : "r" (n));
+    return v;
+}
+#endif
+/** @}
+ */

 /tags/0.2.0.2/kernel/arch/ia64/include/faddr.h
 ,0 → 1,54
+/*
+ * Copyright (C) 2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup ia64
+ * @{
+ */
+/** @file
+ */
+#ifndef __ia64_FADDR_H__
+#define __ia64_FADDR_H__
+#include <arch/types.h>
+/**
+ *
+ * Calculate absolute address of function
+ * referenced by fptr pointer.
+ *
+ * @param f Function pointer.
+ *
+ */
+#define FADDR(f)     (*((__address *)(f)));
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/ia64/include/asm.h
 ,0 → 1,286
+/*
+ * Copyright (C) 2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup ia64
+ * @{
+ */
+/** @file
+ */
+#ifndef __ia64_ASM_H__
+#define __ia64_ASM_H__
+#include <config.h>
+#include <arch/types.h>
+#include <arch/register.h>
+/** Return base address of current stack
+ *
+ * Return the base address of the current stack.
+ * The stack is assumed to be STACK_SIZE long.
+ * The stack must start on page boundary.
+ */
+static inline __address get_stack_base(void)
+{
+    __u64 v;
+    __asm__ volatile ("and %0 = %1, r12" : "=r" (v) : "r" (~(STACK_SIZE-1)));
+    return v;
+}
+/** Return Processor State Register.
+ *
+ * @return PSR.
+ */
+static inline __u64 psr_read(void)
+{
+    __u64 v;
+    __asm__ volatile ("mov %0 = psr\n" : "=r" (v));
+    return v;
+}
+/** Read IVA (Interruption Vector Address).
+ *
+ * @return Return location of interruption vector table.
+ */
+static inline __u64 iva_read(void)
+{
+    __u64 v;
+    __asm__ volatile ("mov %0 = cr.iva\n" : "=r" (v));
+    return v;
+}
+/** Write IVA (Interruption Vector Address) register.
+ *
+ * @param v New location of interruption vector table.
+ */
+static inline void iva_write(__u64 v)
+{
+    __asm__ volatile ("mov cr.iva = %0\n" : : "r" (v));
+}
+/** Read IVR (External Interrupt Vector Register).
+ *
+ * @return Highest priority, pending, unmasked external interrupt vector.
+ */
+static inline __u64 ivr_read(void)
+{
+    __u64 v;
+    __asm__ volatile ("mov %0 = cr.ivr\n" : "=r" (v));
+    return v;
+}
+/** Write ITC (Interval Timer Counter) register.
+ *
+ * @param v New counter value.
+ */
+static inline void itc_write(__u64 v)
+{
+    __asm__ volatile ("mov ar.itc = %0\n" : : "r" (v));
+}
+/** Read ITC (Interval Timer Counter) register.
+ *
+ * @return Current counter value.
+ */
+static inline __u64 itc_read(void)
+{
+    __u64 v;
+    __asm__ volatile ("mov %0 = ar.itc\n" : "=r" (v));
+    return v;
+}
+/** Write ITM (Interval Timer Match) register.
+ *
+ * @param v New match value.
+ */
+static inline void itm_write(__u64 v)
+{
+    __asm__ volatile ("mov cr.itm = %0\n" : : "r" (v));
+}
+/** Read ITM (Interval Timer Match) register.
+ *
+ * @return Match value.
+ */
+static inline __u64 itm_read(void)
+{
+    __u64 v;
+    __asm__ volatile ("mov %0 = cr.itm\n" : "=r" (v));
+    return v;
+}
+/** Read ITV (Interval Timer Vector) register.
+ *
+ * @return Current vector and mask bit.
+ */
+static inline __u64 itv_read(void)
+{
+    __u64 v;
+    __asm__ volatile ("mov %0 = cr.itv\n" : "=r" (v));
+    return v;
+}
+/** Write ITV (Interval Timer Vector) register.
+ *
+ * @param v New vector and mask bit.
+ */
+static inline void itv_write(__u64 v)
+{
+    __asm__ volatile ("mov cr.itv = %0\n" : : "r" (v));
+}
+/** Write EOI (End Of Interrupt) register.
+ *
+ * @param v This value is ignored.
+ */
+static inline void eoi_write(__u64 v)
+{
+    __asm__ volatile ("mov cr.eoi = %0\n" : : "r" (v));
+}
+/** Read TPR (Task Priority Register).
+ *
+ * @return Current value of TPR.
+ */
+static inline __u64 tpr_read(void)
+{
+    __u64 v;
+    __asm__ volatile ("mov %0 = cr.tpr\n"  : "=r" (v));
+    return v;
+}
+/** Write TPR (Task Priority Register).
+ *
+ * @param v New value of TPR.
+ */
+static inline void tpr_write(__u64 v)
+{
+    __asm__ volatile ("mov cr.tpr = %0\n" : : "r" (v));
+}
+/** Disable interrupts.
+ *
+ * Disable interrupts and return previous
+ * value of PSR.
+ *
+ * @return Old interrupt priority level.
+ */
+static ipl_t interrupts_disable(void)
+{
+    __u64 v;
+    __asm__ volatile (
+        "mov %0 = psr\n"
+        "rsm %1\n"
+        : "=r" (v)
+        : "i" (PSR_I_MASK)
+    );
+    return (ipl_t) v;
+}
+/** Enable interrupts.
+ *
+ * Enable interrupts and return previous
+ * value of PSR.
+ *
+ * @return Old interrupt priority level.
+ */
+static ipl_t interrupts_enable(void)
+{
+    __u64 v;
+    __asm__ volatile (
+        "mov %0 = psr\n"
+        "ssm %1\n"
+        ";;\n"
+        "srlz.d\n"
+        : "=r" (v)
+        : "i" (PSR_I_MASK)
+    );
+    return (ipl_t) v;
+}
+/** Restore interrupt priority level.
+ *
+ * Restore PSR.
+ *
+ * @param ipl Saved interrupt priority level.
+ */
+static inline void interrupts_restore(ipl_t ipl)
+{
+    if (ipl & PSR_I_MASK)
+        (void) interrupts_enable();
+    else
+        (void) interrupts_disable();
+}
+/** Return interrupt priority level.
+ *
+ * @return PSR.
+ */
+static inline ipl_t interrupts_read(void)
+{
+    return (ipl_t) psr_read();
+}
+/** Disable protection key checking. */
+static inline void pk_disable(void)
+{
+    __asm__ volatile ("rsm %0\n" : : "i" (PSR_PK_MASK));
+}
+extern void cpu_halt(void);
+extern void cpu_sleep(void);
+extern void asm_delay_loop(__u32 t);
+extern void switch_to_userspace(__address entry, __address sp, __address bsp, __address uspace_uarg, __u64 ipsr, __u64 rsc);
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/ia64/include/interrupt.h
 ,0 → 1,148
+/*
+ * Copyright (C) 2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup ia64interrupt
+ * @{
+ */
+/** @file
+ */
+#ifndef __ia64_INTERRUPT_H__
+#define __ia64_INTERRUPT_H__
+#include <typedefs.h>
+#include <arch/types.h>
+#include <arch/register.h>
+#define IRQ_COUNT               257 /* 256 NOT suppotred IRQS*//* TODO */
+#define IRQ_KBD                 256 /* One simulated interrupt for ski simulator keyboard*/
+/** External Interrupt vectors. */
+#define INTERRUPT_TIMER     0
+#define INTERRUPT_SPURIOUS  15
+/** General Exception codes. */
+#define GE_ILLEGALOP        0
+#define GE_PRIVOP       1
+#define GE_PRIVREG      2
+#define GE_RESREGFLD        3
+#define GE_DISBLDISTRAN     4
+#define GE_ILLEGALDEP       8
+#define EOI 0        /**< The actual value doesn't matter. */
+struct istate {
+    __r128 f2;
+    __r128 f3;
+    __r128 f4;
+    __r128 f5;
+    __r128 f6;
+    __r128 f7;
+    __r128 f8;
+    __r128 f9;
+    __r128 f10;
+    __r128 f11;
+    __r128 f12;
+    __r128 f13;
+    __r128 f14;
+    __r128 f15;
+    __r128 f16;
+    __r128 f17;
+    __r128 f18;
+    __r128 f19;
+    __r128 f20;
+    __r128 f21;
+    __r128 f22;
+    __r128 f23;
+    __r128 f24;
+    __r128 f25;
+    __r128 f26;
+    __r128 f27;
+    __r128 f28;
+    __r128 f29;
+    __r128 f30;
+    __r128 f31;
+    __address ar_bsp;
+    __address ar_bspstore;
+    __address ar_bspstore_new;
+    __u64 ar_rnat;
+    __u64 ar_ifs;
+    __u64 ar_pfs;
+    __u64 ar_rsc;
+    __address cr_ifa;
+    cr_isr_t cr_isr;
+    __address cr_iipa;
+    psr_t cr_ipsr;
+    __address cr_iip;
+    __u64 pr;
+    __address sp;
+    /*
+     * The following variables are defined only for break_instruction handler.
+     */
+    __u64 in0;
+    __u64 in1;
+    __u64 in2;
+    __u64 in3;
+    __u64 in4;
+};
+static inline void istate_set_retaddr(istate_t *istate, __address retaddr)
+{
+    istate->cr_iip = retaddr;
+    istate->cr_ipsr.ri = 0;     /* return to instruction slot #0 */
+}
+static inline __native istate_get_pc(istate_t *istate)
+{
+    return istate->cr_iip;
+}
+#include <panic.h>
+static inline int istate_from_uspace(istate_t *istate)
+{
+    return (istate->cr_iip)<0xe000000000000000ULL;
+}
+extern void *ivt;
+extern void general_exception(__u64 vector, istate_t *istate);
+extern int break_instruction(__u64 vector, istate_t *istate);
+extern void universal_handler(__u64 vector, istate_t *istate);
+extern void nop_handler(__u64 vector, istate_t *istate);
+extern void external_interrupt(__u64 vector, istate_t *istate);
+extern void virtual_interrupt(__u64 irq, void *param);
+extern void disabled_fp_register(__u64 vector, istate_t *istate);
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/ia64/include/fpu_context.h
 ,0 → 1,54
+/*
+ * Copyright (C) 2005 Jakub Vana
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup ia64
+ * @{
+ */
+/** @file
+ */
+#ifndef __ia64_FPU_CONTEXT_H__
+#define __ia64_FPU_CONTEXT_H__
+#define ARCH_HAS_FPU 1
+#define FPU_CONTEXT_ALIGN 16
+#include <arch/types.h>
+#define FRS 96
+struct fpu_context {
+    __r128 fr[FRS];
+};
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/ia64/include/byteorder.h
 ,0 → 1,46
+/*
+ * Copyright (C) 2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup ia64
+ * @{
+ */
+/** @file
+ */
+#ifndef __ia64_BYTEORDER_H__
+#define __ia64_BYTEORDER_H__
+/* IA-64 is little-endian */
+#define __native_le2host(n)     (n)
+#define __u64_le2host(n)        (n)
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/ia64/include/ski/ski.h
 ,0 → 1,56
+/*
+ * Copyright (C) 2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup ia64
+ * @{
+ */
+/** @file
+ */
+#ifndef __SKI_H__
+#define __SKI_H__
+#include <arch/types.h>
+#include <console/console.h>
+#define SKI_INIT_CONSOLE    20
+#define SKI_GETCHAR     21
+#define SKI_PUTCHAR     31
+extern void ski_init_console(void);
+extern void ski_set_console_sysinfo(void);
+extern void poll_keyboard(void);
+extern chardev_t ski_uconsole;
+extern int kbd_uspace;
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/ia64/include/types.h
 ,0 → 1,72
+/*
+ * Copyright (C) 2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup ia64
+ * @{
+ */
+/** @file
+ */
+#ifndef __TYPES_H__
+#define __TYPES_H__
+#define NULL    0
+typedef signed char __s8;
+typedef signed short int __s16;
+typedef signed int __s32;
+typedef signed long __s64;
+typedef unsigned char __u8;
+typedef unsigned short __u16;
+typedef unsigned int __u32;
+typedef unsigned long __u64;
+typedef unsigned char __r8;             /*Reserve byte*/
+typedef unsigned short __r16;
+typedef unsigned int __r32;
+typedef unsigned long __r64;
+typedef struct __r128{__r64 lo;__r64 hi;} __r128;
+typedef __u64 __address;
+typedef __u64 pfn_t;
+typedef __u64 ipl_t;
+typedef __u64 __native;
+typedef __s64 __snative;
+typedef struct pte pte_t;
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/ia64/include/stack.h
 ,0 → 1,47
+/*
+ * Copyright (C) 2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup ia64
+ * @{
+ */
+/** @file
+ */
+#ifndef __ia64_STACK_H__
+#define __ia64_STACK_H__
+#define STACK_ITEM_SIZE         8
+#define STACK_ALIGNMENT         16
+#define STACK_SCRATCH_AREA_SIZE     16
+#define REGISTER_STACK_ALIGNMENT    8
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/ia64/include/elf.h
 ,0 → 1,46
+/*
+ * Copyright (C) 2006 Sergey Bondari
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup ia64
+ * @{
+ */
+/** @file
+ */
+#ifndef __ia64_ELF_H__
+#define __ia64_ELF_H__
+#define ELF_MACHINE     EM_IA_64
+#define ELF_DATA_ENCODING   ELFDATA2LSB
+#define ELF_CLASS       ELFCLASS64
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/ia64/include/memstr.h
 ,0 → 1,49
+/*
+ * Copyright (C) 2005 Sergey Bondari
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup ia64
+ * @{
+ */
+/** @file
+ */
+#ifndef __ia64_MEMSTR_H__
+#define __ia64_MEMSTR_H__
+#define memcpy(dst, src, cnt)  __builtin_memcpy((dst), (src), (cnt))
+extern void memsetw(__address dst, size_t cnt, __u16 x);
+extern void memsetb(__address dst, size_t cnt, __u8 x);
+extern int memcmp(__address src, __address dst, int cnt);
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/ia64/include/arg.h
 ,0 → 1,44
+/*
+ * Copyright (C) 2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup ia64
+ * @{
+ */
+/** @file
+ */
+#ifndef __ia64_ARG_H__
+#define __ia64_ARG_H__
+#include <stdarg.h>
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/ia64/include/atomic.h
 ,0 → 1,67
+/*
+ * Copyright (C) 2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup ia64
+ * @{
+ */
+/** @file
+ */
+#ifndef __ia64_ATOMIC_H__
+#define __ia64_ATOMIC_H__
+/** Atomic addition.
+ *
+ * @param val Atomic value.
+ * @param imm Value to add.
+ *
+ * @return Value before addition.
+ */
+static inline long atomic_add(atomic_t *val, int imm)
+{
+    long v;
+    __asm__ volatile ("fetchadd8.rel %0 = %1, %2\n" : "=r" (v), "+m" (val->count) : "i" (imm));
+    return v;
+}
+static inline void atomic_inc(atomic_t *val) { atomic_add(val, 1); }
+static inline void atomic_dec(atomic_t *val) { atomic_add(val, -1); }
+static inline long atomic_preinc(atomic_t *val) { return atomic_add(val, 1) + 1; }
+static inline long atomic_predec(atomic_t *val) { return atomic_add(val, -1) - 1; }
+static inline long atomic_postinc(atomic_t *val) { return atomic_add(val, 1); }
+static inline long atomic_postdec(atomic_t *val) { return atomic_add(val, -1); }
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/ia64/include/arch.h
 ,0 → 1,46
+/*
+ * Copyright (C) 2005 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup ia64
+ * @{
+ */
+/** @file
+ */
+#ifndef __ia64_ARCH_H__
+#define __ia64_ARCH_H__
+#define LOADED_PROG_STACK_PAGES_NO 2
+#include <arch/ski/ski.h>
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/ia64/include/proc/task.h
 ,0 → 1,48
+/*
+ * Copyright (C) 2006 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup ia64proc
+ * @{
+ */
+/** @file
+ */
+#ifndef __ia64_TASK_H__
+#define __ia64_TASK_H__
+typedef struct {
+} task_arch_t;
+#define task_create_arch(t)
+#define task_destroy_arch(t)
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/ia64/include/proc/thread.h
 ,0 → 1,47
+/*
+ * Copyright (C) 2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup ia64proc
+ * @{
+ */
+/** @file
+ */
+#ifndef __ia64_THREAD_H__
+#define __ia64_THREAD_H__
+typedef struct {
+} thread_arch_t;
+#define thread_create_arch(t)
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/ia64/include/mm/frame.h
 ,0 → 1,55
+/*
+ * Copyright (C) 2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup ia64mm
+ * @{
+ */
+/** @file
+ */
+#ifndef __ia64_FRAME_H__
+#define __ia64_FRAME_H__
+#define FRAME_WIDTH   14    /* 16K */
+#define FRAME_SIZE      (1<<FRAME_WIDTH)
+#ifdef KERNEL
+#ifndef __ASM__
+extern void frame_arch_init(void);
+#define ARCH_STACK_FRAMES TWO_FRAMES
+#endif /* __ASM__ */
+#endif /* KERNEL */
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/ia64/include/mm/memory_init.h
 ,0 → 1,46
+/*
+ * Copyright (C) 2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup ia64mm
+ * @{
+ */
+/** @file
+ */
+#ifndef __ia64_MEMORY_INIT_H__
+#define __ia64_MEMORY_INIT_H__
+#include <config.h>
+#define get_memory_size()   (512*1024*1024)     /* 512M */
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/ia64/include/mm/page.h
 ,0 → 1,284
+/*
+ * Copyright (C) 2005 - 2006 Jakub Jermar
+ * Copyright (C) 2006 Jakub Vana
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup ia64mm
+ * @{
+ */
+/** @file
+ */
+#ifndef __ia64_PAGE_H__
+#define __ia64_PAGE_H__
+#include <arch/mm/frame.h>
+#define PAGE_SIZE   FRAME_SIZE
+#define PAGE_WIDTH  FRAME_WIDTH
+#ifdef KERNEL
+/** Bit width of the TLB-locked portion of kernel address space. */
+#define KERNEL_PAGE_WIDTH   28  /* 256M */
+#define PPN_SHIFT           12
+#define VRN_SHIFT           61
+#define VRN_MASK            (7LL << VRN_SHIFT)
+#define VA2VRN(va)          ((va)>>VRN_SHIFT)
+#ifdef __ASM__
+#define VRN_KERNEL          7
+#else
+#define VRN_KERNEL          7LL
+#endif
+#define REGION_REGISTERS        8
+#define KA2PA(x)    ((__address) (x-(VRN_KERNEL<<VRN_SHIFT)))
+#define PA2KA(x)    ((__address) (x+(VRN_KERNEL<<VRN_SHIFT)))
+#define VHPT_WIDTH          20          /* 1M */
+#define VHPT_SIZE           (1 << VHPT_WIDTH)
+#define PTA_BASE_SHIFT          15
+/** Memory Attributes. */
+#define MA_WRITEBACK    0x0
+#define MA_UNCACHEABLE  0x4
+/** Privilege Levels. Only the most and the least privileged ones are ever used. */
+#define PL_KERNEL   0x0
+#define PL_USER     0x3
+/* Access Rigths. Only certain combinations are used by the kernel. */
+#define AR_READ     0x0
+#define AR_EXECUTE  0x1
+#define AR_WRITE    0x2
+#ifndef __ASM__
+#include <arch/mm/frame.h>
+#include <arch/barrier.h>
+#include <genarch/mm/page_ht.h>
+#include <arch/mm/asid.h>
+#include <arch/types.h>
+#include <typedefs.h>
+#include <debug.h>
+struct vhpt_tag_info {
+    unsigned long long tag : 63;
+    unsigned ti : 1;
+} __attribute__ ((packed));
+union vhpt_tag {
+    struct vhpt_tag_info tag_info;
+    unsigned tag_word;
+};
+struct vhpt_entry_present {
+    /* Word 0 */
+    unsigned p : 1;
+    unsigned : 1;
+    unsigned ma : 3;
+    unsigned a : 1;
+    unsigned d : 1;
+    unsigned pl : 2;
+    unsigned ar : 3;
+    unsigned long long ppn : 38;
+    unsigned : 2;
+    unsigned ed : 1;
+    unsigned ig1 : 11;
+    /* Word 1 */
+    unsigned : 2;
+    unsigned ps : 6;
+    unsigned key : 24;
+    unsigned : 32;
+    /* Word 2 */
+    union vhpt_tag tag;
+    /* Word 3 */
+    __u64 ig3 : 64;
+} __attribute__ ((packed));
+struct vhpt_entry_not_present {
+    /* Word 0 */
+    unsigned p : 1;
+    unsigned long long ig0 : 52;
+    unsigned ig1 : 11;
+    /* Word 1 */
+    unsigned : 2;
+    unsigned ps : 6;
+    unsigned long long ig2 : 56;
+    /* Word 2 */
+    union vhpt_tag tag;
+    /* Word 3 */
+    __u64 ig3 : 64;
+} __attribute__ ((packed));
+typedef union vhpt_entry {
+    struct vhpt_entry_present present;
+    struct vhpt_entry_not_present not_present;
+    __u64 word[4];
+} vhpt_entry_t;
+struct region_register_map {
+    unsigned ve : 1;
+    unsigned : 1;
+    unsigned ps : 6;
+    unsigned rid : 24;
+    unsigned : 32;
+} __attribute__ ((packed));
+typedef union region_register {
+    struct region_register_map map;
+    unsigned long long word;
+} region_register;
+struct pta_register_map {
+    unsigned ve : 1;
+    unsigned : 1;
+    unsigned size : 6;
+    unsigned vf : 1;
+    unsigned : 6;
+    unsigned long long base : 49;
+} __attribute__ ((packed));
+typedef union pta_register {
+    struct pta_register_map map;
+    __u64 word;
+} pta_register;
+/** Return Translation Hashed Entry Address.
+ *
+ * VRN bits are used to read RID (ASID) from one
+ * of the eight region registers registers.
+ *
+ * @param va Virtual address including VRN bits.
+ *
+ * @return Address of the head of VHPT collision chain.
+ */
+static inline __u64 thash(__u64 va)
+{
+    __u64 ret;
+    __asm__ volatile ("thash %0 = %1\n" : "=r" (ret) : "r" (va));
+    return ret;
+}
+/** Return Translation Hashed Entry Tag.
+ *
+ * VRN bits are used to read RID (ASID) from one
+ * of the eight region registers.
+ *
+ * @param va Virtual address including VRN bits.
+ *
+ * @return The unique tag for VPN and RID in the collision chain returned by thash().
+ */
+static inline __u64 ttag(__u64 va)
+{
+    __u64 ret;
+    __asm__ volatile ("ttag %0 = %1\n" : "=r" (ret) : "r" (va));
+    return ret;
+}
+/** Read Region Register.
+ *
+ * @param i Region register index.
+ *
+ * @return Current contents of rr[i].
+ */
+static inline __u64 rr_read(index_t i)
+{
+    __u64 ret;
+    ASSERT(i < REGION_REGISTERS);
+    __asm__ volatile ("mov %0 = rr[%1]\n" : "=r" (ret) : "r" (i << VRN_SHIFT));
+    return ret;
+}
+/** Write Region Register.
+ *
+ * @param i Region register index.
+ * @param v Value to be written to rr[i].
+ */
+static inline void rr_write(index_t i, __u64 v)
+{
+    ASSERT(i < REGION_REGISTERS);
+    __asm__ volatile (
+        "mov rr[%0] = %1\n"
+        :
+        : "r" (i << VRN_SHIFT), "r" (v)
+    );
+}
+/** Read Page Table Register.
+ *
+ * @return Current value stored in PTA.
+ */
+static inline __u64 pta_read(void)
+{
+    __u64 ret;
+    __asm__ volatile ("mov %0 = cr.pta\n" : "=r" (ret));
+    return ret;
+}
+/** Write Page Table Register.
+ *
+ * @param v New value to be stored in PTA.
+ */
+static inline void pta_write(__u64 v)
+{
+    __asm__ volatile ("mov cr.pta = %0\n" : : "r" (v));
+}
+extern void page_arch_init(void);
+extern vhpt_entry_t *vhpt_hash(__address page, asid_t asid);
+extern bool vhpt_compare(__address page, asid_t asid, vhpt_entry_t *v);
+extern void vhpt_set_record(vhpt_entry_t *v, __address page, asid_t asid, __address frame, int flags);
+#endif /* __ASM__ */
+#endif /* KERNEL */
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/ia64/include/mm/asid.h
 ,0 → 1,67
+/*
+ * Copyright (C) 2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup ia64mm
+ * @{
+ */
+/** @file
+ */
+#ifndef __ia64_ASID_H__
+#define __ia64_ASID_H__
+#ifndef __ASM__
+#include <arch/types.h>
+typedef __u16 asid_t;
+typedef __u32 rid_t;
+#endif  /* __ASM__ */
+/**
+ * Number of ia64 RIDs (Region Identifiers) per kernel ASID.
+ * Note that some architectures may support more bits,
+ * but those extra bits are not used by the kernel.
+ */
+#define RIDS_PER_ASID       7
+#define RID_MAX         262143      /* 2^18 - 1 */
+#define RID_KERNEL      0
+#define RID_INVALID     1
+#define ASID2RID(asid, vrn) (((asid)>RIDS_PER_ASID)?(((asid)*RIDS_PER_ASID)+(vrn)):(asid))
+#define RID2ASID(rid)       ((rid)/RIDS_PER_ASID)
+#define ASID_MAX_ARCH       (RID_MAX/RIDS_PER_ASID)
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/ia64/include/mm/tlb.h
 ,0 → 1,105
+/*
+ * Copyright (C) 2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup ia64mm
+ * @{
+ */
+/** @file
+ */
+#ifndef __ia64_TLB_H__
+#define __ia64_TLB_H__
+#define tlb_arch_init()
+#define tlb_print()
+#include <arch/mm/page.h>
+#include <arch/mm/asid.h>
+#include <arch/interrupt.h>
+#include <arch/types.h>
+#include <typedefs.h>
+/** Data and instruction Translation Register indices. */
+#define DTR_KERNEL  0
+#define ITR_KERNEL  0
+#define DTR_KSTACK1 1
+#define DTR_KSTACK2 2
+/** Portion of TLB insertion format data structure. */
+union tlb_entry {
+    __u64 word[2];
+    struct {
+        /* Word 0 */
+        unsigned p : 1;         /**< Present. */
+        unsigned : 1;
+        unsigned ma : 3;        /**< Memory attribute. */
+        unsigned a : 1;         /**< Accessed. */
+        unsigned d : 1;         /**< Dirty. */
+        unsigned pl : 2;        /**< Privilege level. */
+        unsigned ar : 3;        /**< Access rights. */
+        unsigned long long ppn : 38;    /**< Physical Page Number, a.k.a. PFN. */
+        unsigned : 2;
+        unsigned ed : 1;
+        unsigned ig1 : 11;
+        /* Word 1 */
+        unsigned : 2;
+        unsigned ps : 6;        /**< Page size will be 2^ps. */
+        unsigned key : 24;      /**< Protection key, unused. */
+        unsigned : 32;
+    } __attribute__ ((packed));
+} __attribute__ ((packed));
+typedef union tlb_entry tlb_entry_t;
+extern void tc_mapping_insert(__address va, asid_t asid, tlb_entry_t entry, bool dtc);
+extern void dtc_mapping_insert(__address va, asid_t asid, tlb_entry_t entry);
+extern void itc_mapping_insert(__address va, asid_t asid, tlb_entry_t entry);
+extern void tr_mapping_insert(__address va, asid_t asid, tlb_entry_t entry, bool dtr, index_t tr);
+extern void dtr_mapping_insert(__address va, asid_t asid, tlb_entry_t entry, index_t tr);
+extern void itr_mapping_insert(__address va, asid_t asid, tlb_entry_t entry, index_t tr);
+extern void dtlb_kernel_mapping_insert(__address page, __address frame, bool dtr, index_t tr);
+extern void dtr_purge(__address page, count_t width);
+extern void dtc_pte_copy(pte_t *t);
+extern void itc_pte_copy(pte_t *t);
+extern void alternate_instruction_tlb_fault(__u64 vector, istate_t *istate);
+extern void alternate_data_tlb_fault(__u64 vector, istate_t *istate);
+extern void data_nested_tlb_fault(__u64 vector, istate_t *istate);
+extern void data_dirty_bit_fault(__u64 vector, istate_t *istate);
+extern void instruction_access_bit_fault(__u64 vector, istate_t *istate);
+extern void data_access_bit_fault(__u64 vector, istate_t *istate);
+extern void page_not_present(__u64 vector, istate_t *istate);
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/ia64/include/mm/vhpt.h
 ,0 → 1,64
+/*
+* Copyright (C) 2006 Jakub Vana
+* All rights reserved.
+*
+* Redistribution and use in source and binary forms, with or without
+* modification, are permitted provided that the following conditions
+* are met:
+*
+* - Redistributions of source code must retain the above copyright
+*   notice, this list of conditions and the following disclaimer.
+* - Redistributions in binary form must reproduce the above copyright
+*   notice, this list of conditions and the following disclaimer in the
+*   documentation and/or other materials provided with the distribution.
+* - The name of the author may not be used to endorse or promote products
+*   derived from this software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup ia64mm
+ * @{
+ */
+/** @file
+*/
+#ifndef __ia64_VHPT_H__
+#define __ia64_VHPT_H__
+#include <arch/mm/tlb.h>
+#include <arch/mm/page.h>
+__address vhpt_set_up(void);
+static inline vhpt_entry_t tlb_entry_t2vhpt_entry_t(tlb_entry_t tentry)
+{
+    vhpt_entry_t ventry;
+    ventry.word[0]=tentry.word[0];
+    ventry.word[1]=tentry.word[1];
+    return ventry;
+}
+void vhpt_mapping_insert(__address va, asid_t asid, tlb_entry_t entry);
+void vhpt_invalidate_all(void);
+void vhpt_invalidate_asid(asid_t asid);
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/ia64/include/mm/as.h
 ,0 → 1,53
+/*
+ * Copyright (C) 2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup ia64mm
+ * @{
+ */
+/** @file
+ */
+#ifndef __ia64_AS_H__
+#define __ia64_AS_H__
+#define KERNEL_ADDRESS_SPACE_SHADOWED_ARCH  0
+#define KERNEL_ADDRESS_SPACE_START_ARCH     (unsigned long) 0xe000000000000000ULL
+#define KERNEL_ADDRESS_SPACE_END_ARCH       (unsigned long) 0xffffffffffffffffULL
+#define USER_ADDRESS_SPACE_START_ARCH       (unsigned long) 0x0000000000000000ULL
+#define USER_ADDRESS_SPACE_END_ARCH     (unsigned long) 0xdfffffffffffffffULL
+#define USTACK_ADDRESS_ARCH 0x0000000ff0000000ULL
+extern void as_arch_init(void);
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/ia64/include/context.h
 ,0 → 1,137
+/*
+ * Copyright (C) 2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup ia64
+ * @{
+ */
+/** @file
+ */
+#ifndef __ia64_CONTEXT_H__
+#define __ia64_CONTEXT_H__
+#include <arch/types.h>
+#include <arch/register.h>
+#include <typedefs.h>
+#include <align.h>
+#include <arch/stack.h>
+/*
+ * context_save_arch() and context_restore_arch() are both leaf procedures.
+ * No need to allocate scratch area.
+ *
+ * One item is put onto the stack to support get_stack_base().
+ */
+#define SP_DELTA    (0+ALIGN_UP(STACK_ITEM_SIZE, STACK_ALIGNMENT))
+#ifdef context_set
+#undef context_set
+#endif
+/* RSE stack starts at the bottom of memory stack. */
+#define context_set(c, _pc, stack, size)                                \
+    do {                                                \
+        (c)->pc = (__address) _pc;                              \
+        (c)->bsp = ((__address) stack) + ALIGN_UP((size), REGISTER_STACK_ALIGNMENT);        \
+        (c)->ar_pfs &= PFM_MASK;                                \
+        (c)->sp = ((__address) stack) + ALIGN_UP((size), STACK_ALIGNMENT) - SP_DELTA;       \
+    } while (0);
+/*
+ * Only save registers that must be preserved across
+ * function calls.
+ */
+struct context {
+    /*
+     * Application registers
+     */
+    __u64 ar_pfs;
+    __u64 ar_unat_caller;
+    __u64 ar_unat_callee;
+    __u64 ar_rsc;
+    __address bsp;      /* ar_bsp */
+    __u64 ar_rnat;
+    __u64 ar_lc;
+    /*
+     * General registers
+     */
+    __u64 r1;
+    __u64 r4;
+    __u64 r5;
+    __u64 r6;
+    __u64 r7;
+    __address sp;       /* r12 */
+    __u64 r13;
+    /*
+     * Branch registers
+     */
+    __address pc;       /* b0 */
+    __u64 b1;
+    __u64 b2;
+    __u64 b3;
+    __u64 b4;
+    __u64 b5;
+    /*
+     * Predicate registers
+     */
+    __u64 pr;
+    __r128 f2 __attribute__ ((aligned(16)));
+    __r128 f3;
+    __r128 f4;
+    __r128 f5;
+    __r128 f16;
+    __r128 f17;
+    __r128 f18;
+    __r128 f19;
+    __r128 f20;
+    __r128 f21;
+    __r128 f22;
+    __r128 f23;
+    __r128 f24;
+    __r128 f25;
+    __r128 f26;
+    __r128 f27;
+    __r128 f28;
+    __r128 f29;
+    __r128 f30;
+    __r128 f31;
+    ipl_t ipl;
+};
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/ia64/include/register.h
 ,0 → 1,279
+/*
+ * Copyright (C) 2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup ia64
+ * @{
+ */
+/** @file
+ */
+#ifndef __ia64_REGISTER_H__
+#define __ia64_REGISTER_H__
+#define CR_IVR_MASK 0xf
+#define PSR_IC_MASK 0x2000
+#define PSR_I_MASK  0x4000
+#define PSR_PK_MASK 0x8000
+#define PSR_DT_MASK (1<<17)
+#define PSR_RT_MASK (1<<27)
+#define PSR_DFL_MASK    (1<<18)
+#define PSR_DFH_MASK    (1<<19)
+#define PSR_IT_MASK 0x0000001000000000
+#define PSR_CPL_SHIFT       32
+#define PSR_CPL_MASK_SHIFTED    3
+#define PFM_MASK        (~0x3fffffffff)
+#define RSC_MODE_MASK   3
+#define RSC_PL_MASK 12
+/** Application registers. */
+#define AR_KR0      0
+#define AR_KR1      1
+#define AR_KR2      2
+#define AR_KR3      3
+#define AR_KR4      4
+#define AR_KR5      5
+#define AR_KR6      6
+#define AR_KR7      7
+/* AR 8-15 reserved */
+#define AR_RSC      16
+#define AR_BSP      17
+#define AR_BSPSTORE 18
+#define AR_RNAT     19
+/* AR 20 reserved */
+#define AR_FCR      21
+/* AR 22-23 reserved */
+#define AR_EFLAG    24
+#define AR_CSD      25
+#define AR_SSD      26
+#define AR_CFLG     27
+#define AR_FSR      28
+#define AR_FIR      29
+#define AR_FDR      30
+/* AR 31 reserved */
+#define AR_CCV      32
+/* AR 33-35 reserved */
+#define AR_UNAT     36
+/* AR 37-39 reserved */
+#define AR_FPSR     40
+/* AR 41-43 reserved */
+#define AR_ITC      44
+/* AR 45-47 reserved */
+/* AR 48-63 ignored */
+#define AR_PFS      64
+#define AR_LC       65
+#define AR_EC       66
+/* AR 67-111 reserved */
+/* AR 112-127 ignored */
+/** Control registers. */
+#define CR_DCR      0
+#define CR_ITM      1
+#define CR_IVA      2
+/* CR3-CR7 reserved */
+#define CR_PTA      8
+/* CR9-CR15 reserved */
+#define CR_IPSR     16
+#define CR_ISR      17
+/* CR18 reserved */
+#define CR_IIP      19
+#define CR_IFA      20
+#define CR_ITIR     21
+#define CR_IIPA     22
+#define CR_IFS      23
+#define CR_IIM      24
+#define CR_IHA      25
+/* CR26-CR63 reserved */
+#define CR_LID      64
+#define CR_IVR      65
+#define CR_TPR      66
+#define CR_EOI      67
+#define CR_IRR0     68
+#define CR_IRR1     69
+#define CR_IRR2     70
+#define CR_IRR3     71
+#define CR_ITV      72
+#define CR_PMV      73
+#define CR_CMCV     74
+/* CR75-CR79 reserved */
+#define CR_LRR0     80
+#define CR_LRR1     81
+/* CR82-CR127 reserved */
+#ifndef __ASM__
+#include <arch/types.h>
+/** Processor Status Register. */
+union psr {
+    __u64 value;
+    struct {
+        unsigned : 1;
+        unsigned be : 1;    /**< Big-Endian data accesses. */
+        unsigned up : 1;    /**< User Performance monitor enable. */
+        unsigned ac : 1;    /**< Alignment Check. */
+        unsigned mfl : 1;   /**< Lower floating-point register written. */
+        unsigned mfh : 1;   /**< Upper floating-point register written. */
+        unsigned : 7;
+        unsigned ic : 1;    /**< Interruption Collection. */
+        unsigned i : 1;     /**< Interrupt Bit. */
+        unsigned pk : 1;    /**< Protection Key enable. */
+        unsigned : 1;
+        unsigned dt : 1;    /**< Data address Translation. */
+        unsigned dfl : 1;   /**< Disabled Floating-point Low register set. */
+        unsigned dfh : 1;   /**< Disabled Floating-point High register set. */
+        unsigned sp : 1;    /**< Secure Performance monitors. */
+        unsigned pp : 1;    /**< Privileged Performance monitor enable. */
+        unsigned di : 1;    /**< Disable Instruction set transition. */
+        unsigned si : 1;    /**< Secure Interval timer. */
+        unsigned db : 1;    /**< Debug Breakpoint fault. */
+        unsigned lp : 1;    /**< Lower Privilege transfer trap. */
+        unsigned tb : 1;    /**< Taken Branch trap. */
+        unsigned rt : 1;    /**< Register Stack Translation. */
+        unsigned : 4;
+        unsigned cpl : 2;   /**< Current Privilege Level. */
+        unsigned is : 1;    /**< Instruction Set. */
+        unsigned mc : 1;    /**< Machine Check abort mask. */
+        unsigned it : 1;    /**< Instruction address Translation. */
+        unsigned id : 1;    /**< Instruction Debug fault disable. */
+        unsigned da : 1;    /**< Disable Data Access and Dirty-bit faults. */
+        unsigned dd : 1;    /**< Data Debug fault disable. */
+        unsigned ss : 1;    /**< Single Step enable. */
+        unsigned ri : 2;    /**< Restart Instruction. */
+        unsigned ed : 1;    /**< Exception Deferral. */
+        unsigned bn : 1;    /**< Register Bank. */
+        unsigned ia : 1;    /**< Disable Instruction Access-bit faults. */
+    } __attribute__ ((packed));
+};
+typedef union psr psr_t;
+/** Register Stack Configuration Register */
+union rsc {
+    __u64 value;
+    struct {
+        unsigned mode : 2;
+        unsigned pl : 2;    /**< Privilege Level. */
+        unsigned be : 1;    /**< Big-endian. */
+        unsigned : 11;
+        unsigned loadrs : 14;
+    } __attribute__ ((packed));
+};
+typedef union rsc rsc_t;
+/** External Interrupt Vector Register */
+union cr_ivr {
+    __u8  vector;
+    __u64 value;
+};
+typedef union cr_ivr cr_ivr_t;
+/** Task Priority Register */
+union cr_tpr {
+    struct {
+        unsigned : 4;
+        unsigned mic: 4;        /**< Mask Interrupt Class. */
+        unsigned : 8;
+        unsigned mmi: 1;        /**< Mask Maskable Interrupts. */
+    } __attribute__ ((packed));
+    __u64 value;
+};
+typedef union cr_tpr cr_tpr_t;
+/** Interval Timer Vector */
+union cr_itv {
+    struct {
+        unsigned vector : 8;
+        unsigned : 4;
+        unsigned : 1;
+        unsigned : 3;
+        unsigned m : 1;         /**< Mask. */
+    } __attribute__ ((packed));
+    __u64 value;
+};
+typedef union cr_itv cr_itv_t;
+/** Interruption Status Register */
+union cr_isr {
+    struct {
+        union {
+            /** General Exception code field structuring. */
+            struct {
+                unsigned ge_na : 4;
+                unsigned ge_code : 4;
+            } __attribute__ ((packed));
+            __u16 code;
+        };
+        __u8 vector;
+        unsigned : 8;
+        unsigned x : 1;         /**< Execute exception. */
+        unsigned w : 1;         /**< Write exception. */
+        unsigned r : 1;         /**< Read exception. */
+        unsigned na : 1;        /**< Non-access exception. */
+        unsigned sp : 1;        /**< Speculative load exception. */
+        unsigned rs : 1;        /**< Register stack. */
+        unsigned ir : 1;        /**< Incomplete Register frame. */
+        unsigned ni : 1;        /**< Nested Interruption. */
+        unsigned so : 1;        /**< IA-32 Supervisor Override. */
+        unsigned ei : 2;        /**< Excepting Instruction. */
+        unsigned ed : 1;        /**< Exception Deferral. */
+        unsigned : 20;
+    } __attribute__ ((packed));
+    __u64 value;
+};
+typedef union cr_isr cr_isr_t;
+/** CPUID Register 3 */
+union cpuid3 {
+    struct {
+        __u8 number;
+        __u8 revision;
+        __u8 model;
+        __u8 family;
+        __u8 archrev;
+    } __attribute__ ((packed));
+    __u64 value;
+};
+typedef union cpuid3 cpuid3_t;
+#endif /* !__ASM__ */
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/ia64/include/debug.h
 ,0 → 1,43
+/*
+ * Copyright (C) 2005
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup ia64debug ia64
+ * @ingroup debug
+ * @{
+ */
+/** @file
+ */
+#ifndef __ia64_DEBUG_H__
+#define __ia64_DEBUG_H__
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/ia64/include/barrier.h
 ,0 → 1,55
+/*
+ * Copyright (C) 2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup ia64
+ * @{
+ */
+/** @file
+ */
+#ifndef __ia64_BARRIER_H__
+#define __ia64_BARRIER_H__
+/*
+ * TODO: Implement true IA-64 memory barriers for macros below.
+ */
+#define CS_ENTER_BARRIER()  memory_barrier()
+#define CS_LEAVE_BARRIER()  memory_barrier()
+#define memory_barrier()    __asm__ volatile ("mf\n" ::: "memory")
+#define read_barrier()      memory_barrier()
+#define write_barrier()     memory_barrier()
+#define srlz_i()        __asm__ volatile (";; srlz.i ;;\n" ::: "memory")
+#define srlz_d()        __asm__ volatile (";; srlz.d\n" ::: "memory")
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/ia64/include/pal/pal.h
 ,0 → 1,111
+/*
+ * Copyright (C) 2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup ia64
+ * @{
+ */
+/** @file
+ */
+#ifndef __ia64_PAL_H__
+#define __ia64_PAL_H__
+#define PAL_OK       0  /**< Call completed without error. */
+#define PAL_UNIMPL  -1  /**< Unimplemented procedure. */
+#define PAL_INVARG  -2  /**< Invalid argument. */
+#define PAL_ERR     -3  /**< Can not compete call without error. */
+/** These are the indices for PAL_PROC. */
+#define PAL_CACHE_FLUSH     1
+#define PAL_CACHE_INFO      2
+#define PAL_CACHE_INIT      3
+#define PAL_CACHE_PROT_INFO 38
+#define PAL_CACHE_SHARED_INFO   43
+#define PAL_CACHE_SUMMARY   4
+#define PAL_MEM_ATTRIB      5
+#define PAL_PREFETCH_VISIBILITY 41
+#define PAL_PTCE_INFO       6
+#define PAL_VM_INFO     7
+#define PAL_VM_PAGE_SIZE    34
+#define PAL_VM_SUMMARY      8
+#define PAL_VM_TR_READ      261
+#define PAL_BUS_GET_FEATURES    9
+#define PAL_BUS_SET_FEATURES    10
+#define PAL_DEBUG_INFO      11
+#define PAL_FIXED_ADDR      12
+#define PAL_FREQ_BASE       13
+#define PAL_FREQ_RATIOS     14
+#define PAL_LOGICAL_TO_PHYSICAL 42
+#define PAL_PERF_MON_INFO   15
+#define PAL_PLATFORM_ADDR   16
+#define PAL_PROC_GET_FEATURES   17
+#define PAL_PROC_SET_FEATURES   18
+#define PAL_REGISTER_INFO   39
+#define PAL_RSE_INFO        19
+#define PAL_VERSION     20
+#define PAL_MC_CLEAR_LOG    21
+#define PAL_MC_DRAIN        22
+#define PAL_MC_DYNAMIC_STATE    24
+#define PAL_MC_ERROR_INFO   25
+#define PAL_MC_EXPECTED     23
+#define PAL_MC_REGISTER_MEM 27
+#define PAL_MC_RESUME       26
+#define PAL_HALT        28
+#define PAL_HALT_INFO       257
+#define PAL_HALT_LIGHT      29
+#define PAL_CACHE_LINE_INIT 31
+#define PAL_CACHE_READ      259
+#define PAL_CACHE_WRITE     260
+#define PAL_TEST_INFO       37
+#define PAL_TEST_PROC       258
+#define PAL_COPY_INFO       30
+#define PAL_COPY_PAL        256
+#define PAL_ENTER_IA_32_ENV 33
+#define PAL_PMI_ENTRYPOINT  32
+/*
+    Ski PTCE data
+*/
+#define PAL_PTCE_INFO_BASE() (0x100000000LL)
+#define PAL_PTCE_INFO_COUNT1() (2)
+#define PAL_PTCE_INFO_COUNT2() (3)
+#define PAL_PTCE_INFO_STRIDE1() (0x10000000)
+#define PAL_PTCE_INFO_STRIDE2() (0x2000)
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/ia64/include/drivers/it.h
 ,0 → 1,53
+/*
+ * Copyright (C) 2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup ia64
+ * @{
+ */
+/** @file
+ */
+#ifndef __ia64_IT_H__
+#define __ia64_IT_H__
+/*
+ * Unfortunately, Ski does not emulate PAL,
+ * so we can't read the real frequency ratios
+ * from firmware.
+ *
+ */
+#define IT_DELTA        100000
+extern void it_init(void);
+extern void it_interrupt(void);
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/ia64/Makefile.inc
 ,0 → 1,86
+#
+# Copyright (C) 2005 Martin Decky
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# - Redistributions of source code must retain the above copyright
+#   notice, this list of conditions and the following disclaimer.
+# - Redistributions in binary form must reproduce the above copyright
+#   notice, this list of conditions and the following disclaimer in the
+#   documentation and/or other materials provided with the distribution.
+# - The name of the author may not be used to endorse or promote products
+#   derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+## Toolchain configuration
+#
+BFD_NAME = elf64-little
+BFD_ARCH = ia64-elf64
+BFD = elf64-ia64-little
+TARGET = ia64-pc-linux-gnu
+TOOLCHAIN_DIR = /usr/local/ia64/bin
+## Make some default assumptions
+#
+INIT0_ADDRESS = 0xe000000000400000
+INIT0_SIZE = 0x100000
+CFLAGS += -mconstant-gp -fno-unwind-tables -mfixed-range=f32-f127
+LFLAGS += -EL
+AFLAGS += -mconstant-gp
+DEFS += -D__64_BITS__ -DINIT0_ADDRESS=$(INIT0_ADDRESS) -DINIT0_SIZE=$(INIT0_SIZE)
+## Compile with page hash table support.
+#
+CONFIG_PAGE_HT = y
+DEFS += -DCONFIG_PAGE_HT
+## Compile with support for address space identifiers.
+#
+CONFIG_ASID = y
+CONFIG_ASID_FIFO = y
+## Compile with support for software integer division.
+#
+CONFIG_SOFTINT = y
+ARCH_SOURCES = \
+    arch/$(ARCH)/src/start.S \
+    arch/$(ARCH)/src/asm.S \
+    arch/$(ARCH)/src/dummy.s \
+    arch/$(ARCH)/src/ia64.c \
+    arch/$(ARCH)/src/fpu_context.c \
+    arch/$(ARCH)/src/context.S \
+    arch/$(ARCH)/src/ski/ski.c \
+    arch/$(ARCH)/src/cpu/cpu.c \
+    arch/$(ARCH)/src/ivt.S \
+    arch/$(ARCH)/src/interrupt.c \
+    arch/$(ARCH)/src/mm/as.c \
+    arch/$(ARCH)/src/mm/frame.c \
+    arch/$(ARCH)/src/mm/page.c \
+    arch/$(ARCH)/src/mm/tlb.c \
+    arch/$(ARCH)/src/mm/vhpt.c \
+    arch/$(ARCH)/src/proc/scheduler.c \
+    arch/$(ARCH)/src/ddi/ddi.c \
+    arch/$(ARCH)/src/drivers/it.c

 /tags/0.2.0.2/kernel/arch/ia64/_link.ld.in
 ,0 → 1,46
+/** IA-64 linker script
+ *
+ *  It is ELF format, but its only section looks like this:
+ *  kernel text
+ *  kernel data
+ *
+ */
+#define __ASM__
+ENTRY(kernel_image_start)
+SECTIONS {
+    .image 0xe000000000100000: AT (0x0000000000100000) {
+        ktext_start = .;
+        *(K_TEXT_START);
+        *(.text)
+        ktext_end = .;
+        kdata_start = .;
+        *(K_DATA_START)
+        *(.rodata .rodata.*)
+        *(.opd)
+        *(.data .data.*)
+        *(.got .got.*)
+        *(.sdata)
+        *(.sbss)
+        *(.scommon)
+        *(.bss)
+        *(COMMON);
+                symbol_table = .;
+                *(symtab.*);            /* Symbol table, must be LAST symbol!*/
+        kdata_end = .;
+    }
+    /DISCARD/ : {
+        *(*);
+    }
+    _hardcoded_ktext_size = ktext_end - ktext_start;
+    _hardcoded_kdata_size = kdata_end - kdata_start;
+    _hardcoded_load_address = 0xe000000000100000;
+}

 /tags/0.2.0.2/kernel/arch/amd64/src/mm/memory_init.c
 ,0 → 1,81
+/*
+ * Copyright (C) 2005 Josef Cejka
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup amd64mm
+ * @{
+ */
+/** @file
+ */
+#include <arch/boot/memmap.h>
+#include <arch/mm/memory_init.h>
+#include <arch/mm/page.h>
+#include <print.h>
+__u8 e820counter = 0xff;
+struct e820memmap_ e820table[MEMMAP_E820_MAX_RECORDS];
+__u32 e801memorysize;
+size_t get_memory_size(void)
+{
+    return e801memorysize*1024;
+}
+void memory_print_map(void)
+{
+    __u8 i;
+    for (i=0;i<e820counter;i++) {
+        printf("E820 base: %#llx size: %#llx type: ", e820table[i].base_address, e820table[i].size);
+        switch (e820table[i].type) {
+            case MEMMAP_MEMORY_AVAILABLE:
+                printf("available memory\n");
+                break;
+            case MEMMAP_MEMORY_RESERVED:
+                printf("reserved memory\n");
+                break;
+            case MEMMAP_MEMORY_ACPI:
+                printf("ACPI table\n");
+                break;
+            case MEMMAP_MEMORY_NVS:
+                printf("NVS\n");
+                break;
+            case MEMMAP_MEMORY_UNUSABLE:
+                printf("unusable memory\n");
+                break;
+            default:
+                printf("undefined memory type\n");
+        }
+    }
+}
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/amd64/src/mm/page.c
 ,0 → 1,218
+/*
+ * Copyright (C) 2001-2004 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup amd64mm
+ * @{
+ */
+/** @file
+ */
+#include <arch/mm/page.h>
+#include <genarch/mm/page_pt.h>
+#include <arch/mm/frame.h>
+#include <mm/page.h>
+#include <mm/frame.h>
+#include <mm/as.h>
+#include <arch/interrupt.h>
+#include <arch/asm.h>
+#include <config.h>
+#include <memstr.h>
+#include <interrupt.h>
+#include <print.h>
+#include <panic.h>
+#include <align.h>
+/* Definitions for identity page mapper */
+pte_t helper_ptl1[512] __attribute__((aligned (PAGE_SIZE)));
+pte_t helper_ptl2[512] __attribute__((aligned (PAGE_SIZE)));
+pte_t helper_ptl3[512] __attribute__((aligned (PAGE_SIZE)));
+extern pte_t ptl_0; /* From boot.S */
+#define PTL1_PRESENT(ptl0, page) (!(GET_PTL1_FLAGS_ARCH(ptl0, PTL0_INDEX_ARCH(page)) & PAGE_NOT_PRESENT))
+#define PTL2_PRESENT(ptl1, page) (!(GET_PTL2_FLAGS_ARCH(ptl1, PTL1_INDEX_ARCH(page)) & PAGE_NOT_PRESENT))
+#define PTL3_PRESENT(ptl2, page) (!(GET_PTL3_FLAGS_ARCH(ptl2, PTL2_INDEX_ARCH(page)) & PAGE_NOT_PRESENT))
+#define PTL1_ADDR(ptl0, page) ((pte_t *)PA2KA(GET_PTL1_ADDRESS_ARCH(ptl0, PTL0_INDEX_ARCH(page))))
+#define PTL2_ADDR(ptl1, page) ((pte_t *)PA2KA(GET_PTL2_ADDRESS_ARCH(ptl1, PTL1_INDEX_ARCH(page))))
+#define PTL3_ADDR(ptl2, page) ((pte_t *)PA2KA(GET_PTL3_ADDRESS_ARCH(ptl2, PTL2_INDEX_ARCH(page))))
+#define SETUP_PTL1(ptl0, page, tgt)  {  \
+    SET_PTL1_ADDRESS_ARCH(ptl0, PTL0_INDEX_ARCH(page), (__address)KA2PA(tgt)); \
+        SET_PTL1_FLAGS_ARCH(ptl0, PTL0_INDEX_ARCH(page), PAGE_WRITE | PAGE_EXEC); \
+    }
+#define SETUP_PTL2(ptl1, page, tgt)  {  \
+    SET_PTL2_ADDRESS_ARCH(ptl1, PTL1_INDEX_ARCH(page), (__address)KA2PA(tgt)); \
+        SET_PTL2_FLAGS_ARCH(ptl1, PTL1_INDEX_ARCH(page), PAGE_WRITE | PAGE_EXEC); \
+    }
+#define SETUP_PTL3(ptl2, page, tgt)  {  \
+    SET_PTL3_ADDRESS_ARCH(ptl2, PTL2_INDEX_ARCH(page), (__address)KA2PA(tgt)); \
+        SET_PTL3_FLAGS_ARCH(ptl2, PTL2_INDEX_ARCH(page), PAGE_WRITE | PAGE_EXEC); \
+    }
+#define SETUP_FRAME(ptl3, page, tgt)  { \
+    SET_FRAME_ADDRESS_ARCH(ptl3, PTL3_INDEX_ARCH(page), (__address)KA2PA(tgt)); \
+        SET_FRAME_FLAGS_ARCH(ptl3, PTL3_INDEX_ARCH(page), PAGE_WRITE | PAGE_EXEC); \
+    }
+void page_arch_init(void)
+{
+    __address cur;
+    int i;
+    int identity_flags = PAGE_CACHEABLE | PAGE_EXEC | PAGE_GLOBAL;
+    if (config.cpu_active == 1) {
+        page_mapping_operations = &pt_mapping_operations;
+        /*
+         * PA2KA(identity) mapping for all frames.
+         */
+        for (cur = 0; cur < last_frame; cur += FRAME_SIZE) {
+            /* Standard identity mapping */
+            page_mapping_insert(AS_KERNEL, PA2KA(cur), cur, identity_flags);
+        }
+        /* Upper kernel mapping
+         * - from zero to top of kernel (include bottom addresses
+         *   because some are needed for init )
+         */
+        for (cur = PA2KA_CODE(0); cur < config.base+config.kernel_size; cur += FRAME_SIZE) {
+            page_mapping_insert(AS_KERNEL, cur, KA2PA(cur), identity_flags);
+        }
+        for (i=0; i < init.cnt; i++) {
+            for (cur=init.tasks[i].addr;cur < init.tasks[i].size; cur += FRAME_SIZE) {
+                page_mapping_insert(AS_KERNEL, PA2KA_CODE(KA2PA(cur)), KA2PA(cur), identity_flags);
+            }
+        }
+        exc_register(14, "page_fault", (iroutine)page_fault);
+        write_cr3((__address) AS_KERNEL->page_table);
+    }
+    else {
+        write_cr3((__address) AS_KERNEL->page_table);
+    }
+}
+/** Identity page mapper
+ *
+ * We need to map whole physical memory identically before the page subsystem
+ * is initializaed. This thing clears page table and fills in the specific
+ * items.
+ */
+void ident_page_fault(int n, istate_t *istate)
+{
+    __address page;
+    static __address oldpage = 0;
+    pte_t *aptl_1, *aptl_2, *aptl_3;
+    page = read_cr2();
+    if (oldpage) {
+        /* Unmap old address */
+        aptl_1 = PTL1_ADDR(&ptl_0, oldpage);
+        aptl_2 = PTL2_ADDR(aptl_1, oldpage);
+        aptl_3 = PTL3_ADDR(aptl_2, oldpage);
+        SET_FRAME_FLAGS_ARCH(aptl_3, PTL3_INDEX_ARCH(oldpage), PAGE_NOT_PRESENT);
+        if (KA2PA(aptl_3) == KA2PA(helper_ptl3))
+            SET_PTL3_FLAGS_ARCH(aptl_2, PTL2_INDEX_ARCH(oldpage), PAGE_NOT_PRESENT);
+        if (KA2PA(aptl_2) == KA2PA(helper_ptl2))
+            SET_PTL2_FLAGS_ARCH(aptl_1, PTL1_INDEX_ARCH(oldpage), PAGE_NOT_PRESENT);
+        if (KA2PA(aptl_1) == KA2PA(helper_ptl1))
+            SET_PTL1_FLAGS_ARCH(&ptl_0, PTL0_INDEX_ARCH(oldpage), PAGE_NOT_PRESENT);
+    }
+    if (PTL1_PRESENT(&ptl_0, page))
+        aptl_1 = PTL1_ADDR(&ptl_0, page);
+    else {
+        SETUP_PTL1(&ptl_0, page, helper_ptl1);
+        aptl_1 = helper_ptl1;
+    }
+    if (PTL2_PRESENT(aptl_1, page))
+        aptl_2 = PTL2_ADDR(aptl_1, page);
+    else {
+        SETUP_PTL2(aptl_1, page, helper_ptl2);
+        aptl_2 = helper_ptl2;
+    }
+    if (PTL3_PRESENT(aptl_2, page))
+        aptl_3 = PTL3_ADDR(aptl_2, page);
+    else {
+        SETUP_PTL3(aptl_2, page, helper_ptl3);
+        aptl_3 = helper_ptl3;
+    }
+    SETUP_FRAME(aptl_3, page, page);
+    oldpage = page;
+}
+void page_fault(int n, istate_t *istate)
+{
+    __address page;
+    pf_access_t access;
+    page = read_cr2();
+    if (istate->error_word & PFERR_CODE_RSVD)
+        panic("Reserved bit set in page table entry.\n");
+    if (istate->error_word & PFERR_CODE_RW)
+        access = PF_ACCESS_WRITE;
+    else if (istate->error_word & PFERR_CODE_ID)
+        access = PF_ACCESS_EXEC;
+    else
+        access = PF_ACCESS_READ;
+    if (as_page_fault(page, access, istate) == AS_PF_FAULT) {
+        fault_if_from_uspace(istate, "Page fault: %#x", page);
+        print_info_errcode(n, istate);
+        printf("Page fault address: %llx\n", page);
+        panic("page fault\n");
+    }
+}
+__address hw_map(__address physaddr, size_t size)
+{
+    if (last_frame + ALIGN_UP(size, PAGE_SIZE) > KA2PA(KERNEL_ADDRESS_SPACE_END_ARCH))
+        panic("Unable to map physical memory %p (%d bytes)", physaddr, size)
+    __address virtaddr = PA2KA(last_frame);
+    pfn_t i;
+    for (i = 0; i < ADDR2PFN(ALIGN_UP(size, PAGE_SIZE)); i++)
+        page_mapping_insert(AS_KERNEL, virtaddr + PFN2ADDR(i), physaddr + PFN2ADDR(i), PAGE_NOT_CACHEABLE);
+    last_frame = ALIGN_UP(last_frame + size, FRAME_SIZE);
+    return virtaddr;
+}
+ /** @}
+ */

/tags/0.2.0.2/kernel/arch/amd64/src/mm/as.c
0,0 → 1,0
link ../../../ia32/src/mm/as.c
Property changes:
Added: svn:special
+*
\ No newline at end of property

/tags/0.2.0.2/kernel/arch/amd64/src/mm/tlb.c
0,0 → 1,0
link ../../../ia32/src/mm/tlb.c
Property changes:
Added: svn:special
+*
\ No newline at end of property

/tags/0.2.0.2/kernel/arch/amd64/src/mm/frame.c
0,0 → 1,0
link ../../../ia32/src/mm/frame.c
Property changes:
Added: svn:special
+*
\ No newline at end of property

 /tags/0.2.0.2/kernel/arch/amd64/src/interrupt.c
 ,0 → 1,187
+/*
+ * Copyright (C) 2001-2004 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup amd64interrupt
+ * @{
+ */
+/** @file
+ */
+#include <arch/interrupt.h>
+#include <print.h>
+#include <debug.h>
+#include <panic.h>
+#include <arch/drivers/i8259.h>
+#include <func.h>
+#include <cpu.h>
+#include <arch/asm.h>
+#include <mm/tlb.h>
+#include <mm/as.h>
+#include <arch.h>
+#include <symtab.h>
+#include <arch/asm.h>
+#include <proc/scheduler.h>
+#include <proc/thread.h>
+#include <proc/task.h>
+#include <synch/spinlock.h>
+#include <arch/ddi/ddi.h>
+#include <interrupt.h>
+#include <ipc/irq.h>
+void print_info_errcode(int n, istate_t *istate)
+{
+    char *symbol;
+/*  __u64 *x = &istate->stack[0]; */
+    if (!(symbol=get_symtab_entry(istate->rip)))
+        symbol = "";
+    printf("-----EXCEPTION(%d) OCCURED----- ( %s )\n",n, __FUNCTION__);
+    printf("%%rip: %#llx (%s)\n",istate->rip, symbol);
+    printf("ERROR_WORD=%#llx\n", istate->error_word);
+    printf("%%rcs=%#llx, flags=%#llx, %%cr0=%#llx\n", istate->cs, istate->rflags, read_cr0());
+    printf("%%rax=%#llx, %%rcx=%#llx, %%rdx=%#llx\n", istate->rax, istate->rcx, istate->rdx);
+    printf("%%rsi=%#llx, %%rdi=%#llx, %%r8 =%#llx\n", istate->rsi, istate->rdi, istate->r8);
+    printf("%%r9 =%#llx, %%r10 =%#llx, %%r11=%#llx\n", istate->r9, istate->r10, istate->r11);
+#ifdef CONFIG_DEBUG_ALLREGS
+    printf("%%r12=%#llx, %%r13=%#llx, %%r14=%#llx\n", istate->r12, istate->r13, istate->r14);
+    printf("%%r15=%#llx, %%rbx=%#llx, %%rbp=%#llx\n", istate->r15, istate->rbx, &istate->rbp);
+#endif
+    printf("%%rsp=%#llx\n", &istate->stack[0]);
+}
+/*
+ * Interrupt and exception dispatching.
+ */
+void (* disable_irqs_function)(__u16 irqmask) = NULL;
+void (* enable_irqs_function)(__u16 irqmask) = NULL;
+void (* eoi_function)(void) = NULL;
+void null_interrupt(int n, istate_t *istate)
+{
+    fault_if_from_uspace(istate, "unserviced interrupt: %d", n);
+    print_info_errcode(n, istate);
+    panic("unserviced interrupt\n");
+}
+/** General Protection Fault. */
+void gp_fault(int n, istate_t *istate)
+{
+    if (TASK) {
+        count_t ver;
+        spinlock_lock(&TASK->lock);
+        ver = TASK->arch.iomapver;
+        spinlock_unlock(&TASK->lock);
+        if (CPU->arch.iomapver_copy != ver) {
+            /*
+             * This fault can be caused by an early access
+             * to I/O port because of an out-dated
+             * I/O Permission bitmap installed on CPU.
+             * Install the fresh copy and restart
+             * the instruction.
+             */
+            io_perm_bitmap_install();
+            return;
+        }
+        fault_if_from_uspace(istate, "general protection fault");
+    }
+    print_info_errcode(n, istate);
+    panic("general protection fault\n");
+}
+void ss_fault(int n, istate_t *istate)
+{
+    fault_if_from_uspace(istate, "stack fault");
+    print_info_errcode(n, istate);
+    panic("stack fault\n");
+}
+void nm_fault(int n, istate_t *istate)
+{
+#ifdef CONFIG_FPU_LAZY
+    scheduler_fpu_lazy_request();
+#else
+    fault_if_from_uspace(istate, "fpu fault");
+    panic("fpu fault");
+#endif
+}
+void tlb_shootdown_ipi(int n, istate_t *istate)
+{
+    trap_virtual_eoi();
+    tlb_shootdown_ipi_recv();
+}
+void trap_virtual_enable_irqs(__u16 irqmask)
+{
+    if (enable_irqs_function)
+        enable_irqs_function(irqmask);
+    else
+        panic("no enable_irqs_function\n");
+}
+void trap_virtual_disable_irqs(__u16 irqmask)
+{
+    if (disable_irqs_function)
+        disable_irqs_function(irqmask);
+    else
+        panic("no disable_irqs_function\n");
+}
+void trap_virtual_eoi(void)
+{
+    if (eoi_function)
+        eoi_function();
+    else
+        panic("no eoi_function\n");
+}
+static void ipc_int(int n, istate_t *istate)
+{
+    ipc_irq_send_notif(n-IVT_IRQBASE);
+    trap_virtual_eoi();
+}
+/* Reregister irq to be IPC-ready */
+void irq_ipc_bind_arch(__native irq)
+{
+    if (irq == IRQ_CLK)
+        return;
+    exc_register(IVT_IRQBASE+irq, "ipc_int", ipc_int);
+    trap_virtual_enable_irqs(1 << irq);
+}
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/amd64/src/cpu/cpu.c
 ,0 → 1,168
+/*
+ * Copyright (C) 2001-2004 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/** @addtogroup amd64
+ * @{
+ */
+/** @file
+ */
+#include <arch/cpu.h>
+#include <arch/cpuid.h>
+#include <arch/pm.h>
+#include <arch.h>
+#include <arch/types.h>
+#include <print.h>
+#include <typedefs.h>
+#include <fpu_context.h>
+/*
+ * Identification of CPUs.
+ * Contains only non-MP-Specification specific SMP code.
+ */
+#define AMD_CPUID_EBX   0x68747541
+#define AMD_CPUID_ECX   0x444d4163
+#define AMD_CPUID_EDX   0x69746e65
+#define INTEL_CPUID_EBX 0x756e6547
+#define INTEL_CPUID_ECX 0x6c65746e
+#define INTEL_CPUID_EDX 0x49656e69
+enum vendor {
+    VendorUnknown=0,
+    VendorAMD,
+    VendorIntel
+};
+static char *vendor_str[] = {
+    "Unknown Vendor",
+    "AuthenticAMD",
+    "GenuineIntel"
+};
+/** Setup flags on processor so that we can use the FPU
+ *
+ * cr0.osfxsr = 1 -> we do support fxstor/fxrestor
+ * cr0.em = 0 -> we do not emulate coprocessor
+ * cr0.mp = 1 -> we do want lazy context switch
+ */
+void cpu_setup_fpu(void)
+{
+    __asm__ volatile (
+        "movq %%cr0, %%rax;"
+        "btsq $1, %%rax;" /* cr0.mp */
+        "btrq $2, %%rax;"  /* cr0.em */
+        "movq %%rax, %%cr0;"
+        "movq %%cr4, %%rax;"
+        "bts $9, %%rax;" /* cr4.osfxsr */
+        "movq %%rax, %%cr4;"
+        :
+        :
+        :"%rax"
+        );
+}
+/** Set the TS flag to 1.
+ *
+ * If a thread accesses coprocessor, exception is run, which
+ * does a lazy fpu context switch.
+ *
+ */
+void fpu_disable(void)
+{
+    __asm__ volatile (
+        "mov %%cr0,%%rax;"
+        "bts $3,%%rax;"
+        "mov %%rax,%%cr0;"
+        :
+        :
+        :"%rax"
+        );
+}
+void fpu_enable(void)
+{
+    __asm__ volatile (
+        "mov %%cr0,%%rax;"
+        "btr $3,%%rax;"
+        "mov %%rax,%%cr0;"
+        :
+        :
+        :"%rax"
+        );
+}
+void cpu_arch_init(void)
+{
+    CPU->arch.tss = tss_p;
+    CPU->arch.tss->iomap_base = &CPU->arch.tss->iomap[0] - ((__u8 *) CPU->arch.tss);
+    CPU->fpu_owner = NULL;
+}
+void cpu_identify(void)
+{
+    cpu_info_t info;
+    CPU->arch.vendor = VendorUnknown;
+    if (has_cpuid()) {
+        cpuid(0, &info);
+        /*
+         * Check for AMD processor.
+         */
+        if (info.cpuid_ebx==AMD_CPUID_EBX && info.cpuid_ecx==AMD_CPUID_ECX && info.cpuid_edx==AMD_CPUID_EDX) {
+            CPU->arch.vendor = VendorAMD;
+        }
+        /*
+         * Check for Intel processor.
+         */
+        if (info.cpuid_ebx==INTEL_CPUID_EBX && info.cpuid_ecx==INTEL_CPUID_ECX && info.cpuid_edx==INTEL_CPUID_EDX) {
+            CPU->arch.vendor = VendorIntel;
+        }
+        cpuid(1, &info);
+        CPU->arch.family = (info.cpuid_eax>>8)&0xf;
+        CPU->arch.model = (info.cpuid_eax>>4)&0xf;
+        CPU->arch.stepping = (info.cpuid_eax>>0)&0xf;
+    }
+}
+void cpu_print_report(cpu_t* m)
+{
+    printf("cpu%d: (%s family=%d model=%d stepping=%d) %dMHz\n",
+        m->id, vendor_str[m->arch.vendor], m->arch.family, m->arch.model, m->arch.stepping,
+        m->frequency_mhz);
+}
+/** @}
+ */

 /tags/0.2.0.2/kernel/arch/amd64/src/amd64.c
 ,0 → 1,213
+/*
+ * Copyright (C) 2005 Ondrej Palkovsky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup amd64
+ * @{
+ */
+/** @file
+ */
+#include <arch.h>
+#include <arch/types.h>
+#include <config.h>
+#include <proc/thread.h>
+#include <arch/drivers/ega.h>
+#include <arch/drivers/vesa.h>
+#include <genarch/i8042/i8042.h>
+#include <arch/drivers/i8254.h>
+#include <arch/drivers/i8259.h>
+#include <arch/bios/bios.h>
+#include <arch/mm/memory_init.h>
+#include <arch/cpu.h>
+#include <print.h>
+#include <arch/cpuid.h>
+#include <genarch/acpi/acpi.h>
+#include <panic.h>
+#include <interrupt.h>
+#include <arch/syscall.h>
+#include <arch/debugger.h>
+#include <syscall/syscall.h>
+#include <console/console.h>
+/** Disable I/O on non-privileged levels
+ *
+ * Clean IOPL(12,13) and NT(14) flags in EFLAGS register
+ */
+static void clean_IOPL_NT_flags(void)
+{
+    asm
+    (
+        "pushfq;"
+        "pop %%rax;"
+        "and $~(0x7000),%%rax;"
+        "pushq %%rax;"
+        "popfq;"
+        :
+        :
+        :"%rax"
+    );
+}
+/** Disable alignment check
+ *
+ * Clean AM(18) flag in CR0 register
+ */
+static void clean_AM_flag(void)
+{
+    asm
+    (
+        "mov %%cr0,%%rax;"
+        "and $~(0x40000),%%rax;"
+        "mov %%rax,%%cr0;"
+        :
+        :
+        :"%rax"
+    );
+}
+void arch_pre_mm_init(void)
+{
+    struct cpu_info cpuid_s;
+    cpuid(AMD_CPUID_EXTENDED,&cpuid_s);
+    if (! (cpuid_s.cpuid_edx & (1<<AMD_EXT_NOEXECUTE)))
+        panic("Processor does not support No-execute pages.\n");
+    cpuid(INTEL_CPUID_STANDARD,&cpuid_s);
+    if (! (cpuid_s.cpuid_edx & (1<<INTEL_FXSAVE)))
+        panic("Processor does not support FXSAVE/FXRESTORE.\n");
+    if (! (cpuid_s.cpuid_edx & (1<<INTEL_SSE2)))
+        panic("Processor does not support SSE2 instructions.\n");
+    /* Enable No-execute pages */
+    set_efer_flag(AMD_NXE_FLAG);
+    /* Enable FPU */
+    cpu_setup_fpu();
+    /* Initialize segmentation */
+    pm_init();
+        /* Disable I/O on nonprivileged levels
+     * clear the NT(nested-thread) flag
+     */
+    clean_IOPL_NT_flags();
+    /* Disable alignment check */
+    clean_AM_flag();
+    if (config.cpu_active == 1) {
+        bios_init();
+        i8259_init();   /* PIC */
+        i8254_init();   /* hard clock */
+        #ifdef CONFIG_SMP
+        exc_register(VECTOR_TLB_SHOOTDOWN_IPI, "tlb_shootdown",
+                 tlb_shootdown_ipi);
+        #endif /* CONFIG_SMP */
+    }
+}
+void arch_post_mm_init(void)
+{
+    if (config.cpu_active == 1) {
+#ifdef CONFIG_FB
+        if (vesa_present())
+            vesa_init();
+        else
+#endif
+            ega_init(); /* video */
+        /* Enable debugger */
+        debugger_init();
+        /* Merge all memory zones to 1 big zone */
+        zone_merge_all();
+    }
+    /* Setup fast SYSCALL/SYSRET */
+    syscall_setup_cpu();
+}
+void arch_pre_smp_init(void)
+{
+    if (config.cpu_active == 1) {
+        memory_print_map();
+        #ifdef CONFIG_SMP
+        acpi_init();
+        #endif /* CONFIG_SMP */
+    }
+}
+void arch_post_smp_init(void)
+{
+    i8042_init();   /* keyboard controller */
+}
+void calibrate_delay_loop(void)
+{
+    i8254_calibrate_delay_loop();
+    i8254_normal_operation();
+}
+/** Set thread-local-storage pointer
+ *
+ * TLS pointer is set in FS register. Unfortunately the 64-bit
+ * part can be set only in CPL0 mode.
+ *
+ * The specs say, that on %fs:0 there is stored contents of %fs register,
+ * we need not to go to CPL0 to read it.
+ */
+__native sys_tls_set(__native addr)
+{
+    THREAD->arch.tls = addr;
+    write_msr(AMD_MSR_FS, addr);
+    return 0;
+}
+/** Acquire console back for kernel
+ *
+ */
+void arch_grab_console(void)
+{
+    i8042_grab();
+}
+/** Return console to userspace
+ *
+ */
+void arch_release_console(void)
+{
+    i8042_release();
+}
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/amd64/src/ddi/ddi.c
 ,0 → 1,167
+/*
+ * Copyright (C) 2006 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup amd64ddi
+ * @{
+ */
+/** @file
+ */
+#include <ddi/ddi.h>
+#include <arch/ddi/ddi.h>
+#include <proc/task.h>
+#include <arch/types.h>
+#include <typedefs.h>
+#include <adt/bitmap.h>
+#include <mm/slab.h>
+#include <arch/pm.h>
+#include <errno.h>
+#include <arch/cpu.h>
+#include <arch.h>
+#include <align.h>
+/** Enable I/O space range for task.
+ *
+ * Interrupts are disabled and task is locked.
+ *
+ * @param task Task.
+ * @param ioaddr Startign I/O space address.
+ * @param size Size of the enabled I/O range.
+ *
+ * @return 0 on success or an error code from errno.h.
+ */
+int ddi_iospace_enable_arch(task_t *task, __address ioaddr, size_t size)
+{
+    count_t bits;
+    bits = ioaddr + size;
+    if (bits > IO_PORTS)
+        return ENOENT;
+    if (task->arch.iomap.bits < bits) {
+        bitmap_t oldiomap;
+        __u8 *newmap;
+        /*
+         * The I/O permission bitmap is too small and needs to be grown.
+         */
+        newmap = (__u8 *) malloc(BITS2BYTES(bits), FRAME_ATOMIC);
+        if (!newmap)
+            return ENOMEM;
+        bitmap_initialize(&oldiomap, task->arch.iomap.map, task->arch.iomap.bits);
+        bitmap_initialize(&task->arch.iomap, newmap, bits);
+        /*
+         * Mark the new range inaccessible.
+         */
+        bitmap_set_range(&task->arch.iomap, oldiomap.bits, bits - oldiomap.bits);
+        /*
+         * In case there really existed smaller iomap,
+         * copy its contents and deallocate it.
+         */
+        if (oldiomap.bits) {
+            bitmap_copy(&task->arch.iomap, &oldiomap, oldiomap.bits);
+            free(oldiomap.map);
+        }
+    }
+    /*
+     * Enable the range and we are done.
+     */
+    bitmap_clear_range(&task->arch.iomap, (index_t) ioaddr, (count_t) size);
+    /*
+     * Increment I/O Permission bitmap generation counter.
+     */
+    task->arch.iomapver++;
+    return 0;
+}
+/** Install I/O Permission bitmap.
+ *
+ * Current task's I/O permission bitmap, if any, is installed
+ * in the current CPU's TSS.
+ *
+ * Interrupts must be disabled prior this call.
+ */
+void io_perm_bitmap_install(void)
+{
+    count_t bits;
+    ptr_16_64_t cpugdtr;
+    descriptor_t *gdt_p;
+    tss_descriptor_t *tss_desc;
+    count_t ver;
+    /* First, copy the I/O Permission Bitmap. */
+    spinlock_lock(&TASK->lock);
+    ver = TASK->arch.iomapver;
+    if ((bits = TASK->arch.iomap.bits)) {
+        bitmap_t iomap;
+        ASSERT(TASK->arch.iomap.map);
+        bitmap_initialize(&iomap, CPU->arch.tss->iomap, TSS_IOMAP_SIZE * 8);
+        bitmap_copy(&iomap, &TASK->arch.iomap, TASK->arch.iomap.bits);
+        /*
+         * It is safe to set the trailing eight bits because of the extra
+         * convenience byte in TSS_IOMAP_SIZE.
+         */
+        bitmap_set_range(&iomap, ALIGN_UP(TASK->arch.iomap.bits, 8), 8);
+    }
+    spinlock_unlock(&TASK->lock);
+    /*
+     * Second, adjust TSS segment limit.
+     * Take the extra ending byte will all bits set into account.
+     */
+    gdtr_store(&cpugdtr);
+    gdt_p = (descriptor_t *) cpugdtr.base;
+    gdt_tss_setlimit(&gdt_p[TSS_DES], TSS_BASIC_SIZE + BITS2BYTES(bits));
+    gdtr_load(&cpugdtr);
+    /*
+         * Before we load new TSS limit, the current TSS descriptor
+         * type must be changed to describe inactive TSS.
+         */
+    tss_desc = (tss_descriptor_t *) &gdt_p[TSS_DES];
+    tss_desc->type = AR_TSS;
+    tr_load(gdtselector(TSS_DES));
+    /*
+     * Update the generation count so that faults caused by
+     * early accesses can be serviced.
+     */
+    CPU->arch.iomapver_copy = ver;
+}
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/amd64/src/proc/scheduler.c
 ,0 → 1,85
+/*
+ * Copyright (C) 2005 Ondrej Palkovsky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup amd64proc
+ * @{
+ */
+/** @file
+ */
+#include <proc/scheduler.h>
+#include <cpu.h>
+#include <proc/task.h>
+#include <proc/thread.h>
+#include <arch.h>
+#include <arch/context.h>   /* SP_DELTA */
+#include <arch/asm.h>
+#include <arch/debugger.h>
+#include <print.h>
+#include <arch/pm.h>
+#include <arch/ddi/ddi.h>
+/** Perform amd64 specific tasks needed before the new task is run.
+ *
+ * Interrupts are disabled.
+ */
+void before_task_runs_arch(void)
+{
+    io_perm_bitmap_install();
+}
+/** Perform amd64 specific tasks needed before the new thread is scheduled. */
+void before_thread_runs_arch(void)
+{
+    CPU->arch.tss->rsp0 = (__address) &THREAD->kstack[THREAD_STACK_SIZE-SP_DELTA];
+    /* Syscall support - write address of thread stack pointer to
+     * hidden part of gs */
+    swapgs();
+    write_msr(AMD_MSR_GS, (__u64)&THREAD->kstack);
+    swapgs();
+    /* TLS support - set FS to thread local storage */
+    write_msr(AMD_MSR_FS, THREAD->arch.tls);
+#ifdef CONFIG_DEBUG_AS_WATCHPOINT
+    /* Set watchpoint on AS to ensure that nobody sets it to zero */
+    if (CPU->id < BKPOINTS_MAX)
+        breakpoint_add(&((the_t *) THREAD->kstack)->as,
+                   BKPOINT_WRITE | BKPOINT_CHECK_ZERO,
+                   CPU->id);
+#endif
+}
+void after_thread_ran_arch(void)
+{
+}
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/amd64/src/proc/task.c
 ,0 → 1,61
+/*
+ * Copyright (C) 2006 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup amd64proc
+ * @{
+ */
+/** @file
+ */
+#include <proc/task.h>
+#include <mm/slab.h>
+#include <arch/types.h>
+/** Perform amd64 specific task initialization.
+ *
+ * @param t Task to be initialized.
+ */
+void task_create_arch(task_t *t)
+{
+    t->arch.iomapver = 0;
+    bitmap_initialize(&t->arch.iomap, NULL, 0);
+}
+/** Perform amd64 specific task destruction.
+ *
+ * @param t Task to be initialized.
+ */
+void task_destroy_arch(task_t *t)
+{
+    if (t->arch.iomap.map)
+        free(t->arch.iomap.map);
+}
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/amd64/src/proc/thread.c
 ,0 → 1,48
+/*
+ * Copyright (C) 2006 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup amd64proc
+ * @{
+ */
+/** @file
+ */
+#include <proc/thread.h>
+/** Perform amd64 specific thread initialization.
+ *
+ * @param t Thread to be initialized.
+ */
+void thread_create_arch(thread_t *t)
+{
+    t->arch.tls = 0;
+}
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/amd64/src/debugger.c
 ,0 → 1,387
+/*
+ * Copyright (C) 2006 Ondrej Palkovsky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup amd64debug
+ * @{
+ */
+/** @file
+ */
+#include <arch/debugger.h>
+#include <console/kconsole.h>
+#include <console/cmd.h>
+#include <symtab.h>
+#include <print.h>
+#include <panic.h>
+#include <interrupt.h>
+#include <arch/asm.h>
+#include <arch/cpu.h>
+#include <debug.h>
+#include <func.h>
+#include <smp/ipi.h>
+typedef struct  {
+    __address address;      /**< Breakpoint address */
+    int flags;              /**< Flags regarding breakpoint */
+    int counter;            /**< How many times the exception occured */
+} bpinfo_t;
+static bpinfo_t breakpoints[BKPOINTS_MAX];
+SPINLOCK_INITIALIZE(bkpoint_lock);
+static int cmd_print_breakpoints(cmd_arg_t *argv);
+static cmd_info_t bkpts_info = {
+    .name = "bkpts",
+    .description = "Print breakpoint table.",
+    .func = cmd_print_breakpoints,
+    .argc = 0,
+};
+#ifndef CONFIG_DEBUG_AS_WATCHPOINT
+static int cmd_del_breakpoint(cmd_arg_t *argv);
+static cmd_arg_t del_argv = {
+    .type = ARG_TYPE_INT
+};
+static cmd_info_t delbkpt_info = {
+    .name = "delbkpt",
+    .description = "delbkpt <number> - Delete breakpoint.",
+    .func = cmd_del_breakpoint,
+    .argc = 1,
+    .argv = &del_argv
+};
+static int cmd_add_breakpoint(cmd_arg_t *argv);
+static cmd_arg_t add_argv = {
+    .type = ARG_TYPE_INT
+};
+static cmd_info_t addbkpt_info = {
+    .name = "addbkpt",
+    .description = "addbkpt <&symbol> - new breakpoint.",
+    .func = cmd_add_breakpoint,
+    .argc = 1,
+    .argv = &add_argv
+};
+static cmd_arg_t addw_argv = {
+    .type = ARG_TYPE_INT
+};
+static cmd_info_t addwatchp_info = {
+    .name = "addwatchp",
+    .description = "addbwatchp <&symbol> - new write watchpoint.",
+    .func = cmd_add_breakpoint,
+    .argc = 1,
+    .argv = &addw_argv
+};
+#endif
+/** Print table of active breakpoints */
+int cmd_print_breakpoints(cmd_arg_t *argv)
+{
+    int i;
+    char *symbol;
+    printf("Breakpoint table.\n");
+    for (i=0; i < BKPOINTS_MAX; i++)
+        if (breakpoints[i].address) {
+            symbol = get_symtab_entry(breakpoints[i].address);
+            printf("%d. %p in %s\n",i,
+                   breakpoints[i].address, symbol);
+            printf("     Count(%d) ", breakpoints[i].counter);
+            printf("\n");
+        }
+    return 1;
+}
+/* Setup DR register according to table */
+static void setup_dr(int curidx)
+{
+    __native dr7;
+    bpinfo_t *cur = &breakpoints[curidx];
+    int flags = breakpoints[curidx].flags;
+    /* Disable breakpoint in DR7 */
+    dr7 = read_dr7();
+    dr7 &= ~(0x2 << (curidx*2));
+    if (cur->address) { /* Setup DR register */
+        /* Set breakpoint to debug registers */
+        switch (curidx) {
+        case 0:
+            write_dr0(cur->address);
+            break;
+        case 1:
+            write_dr1(cur->address);
+            break;
+        case 2:
+            write_dr2(cur->address);
+            break;
+        case 3:
+            write_dr3(cur->address);
+            break;
+        }
+        /* Set type to requested breakpoint & length*/
+        dr7 &= ~ (0x3 << (16 + 4*curidx));
+        dr7 &= ~ (0x3 << (18 + 4*curidx));
+        if ((flags & BKPOINT_INSTR)) {
+            ;
+        } else {
+            if (sizeof(int) == 4)
+                dr7 |= ((__native) 0x3) << (18 + 4*curidx);
+            else /* 8 */
+                dr7 |= ((__native) 0x2) << (18 + 4*curidx);
+            if ((flags & BKPOINT_WRITE))
+                dr7 |= ((__native) 0x1) << (16 + 4*curidx);
+            else if ((flags & BKPOINT_READ_WRITE))
+                dr7 |= ((__native) 0x3) << (16 + 4*curidx);
+        }
+        /* Enable global breakpoint */
+        dr7 |= 0x2 << (curidx*2);
+        write_dr7(dr7);
+    }
+}
+/** Enable hardware breakpoint
+ *
+ *
+ * @param where Address of HW breakpoint
+ * @param flags Type of breakpoint (EXECUTE, WRITE)
+ * @return Debug slot on success, -1 - no available HW breakpoint
+ */
+int breakpoint_add(void * where, int flags, int curidx)
+{
+    ipl_t ipl;
+    int i;
+    bpinfo_t *cur;
+    ASSERT( flags & (BKPOINT_INSTR | BKPOINT_WRITE | BKPOINT_READ_WRITE));
+    ipl = interrupts_disable();
+    spinlock_lock(&bkpoint_lock);
+    if (curidx == -1) {
+        /* Find free space in slots */
+        for (i=0; i<BKPOINTS_MAX; i++)
+            if (!breakpoints[i].address) {
+                curidx = i;
+                break;
+            }
+        if (curidx == -1) {
+            /* Too many breakpoints */
+            spinlock_unlock(&bkpoint_lock);
+            interrupts_restore(ipl);
+            return -1;
+        }
+    }
+    cur = &breakpoints[curidx];
+    cur->address = (__address) where;
+    cur->flags = flags;
+    cur->counter = 0;
+    setup_dr(curidx);
+    spinlock_unlock(&bkpoint_lock);
+    interrupts_restore(ipl);
+    /* Send IPI */
+#ifdef CONFIG_SMP
+//  ipi_broadcast(VECTOR_DEBUG_IPI);
+#endif
+    return curidx;
+}
+#ifdef amd64
+# define getip(x)  ((x)->rip)
+#else
+# define getip(x)  ((x)->eip)
+#endif
+static void handle_exception(int slot, istate_t *istate)
+{
+    ASSERT(breakpoints[slot].address);
+    /* Handle zero checker */
+    if (! (breakpoints[slot].flags & BKPOINT_INSTR)) {
+        if ((breakpoints[slot].flags & BKPOINT_CHECK_ZERO)) {
+            if (*((__native *) breakpoints[slot].address) != 0)
+                return;
+            printf("**** Found ZERO on address %p ****\n",
+                   slot, breakpoints[slot].address);
+        } else {
+            printf("Data watchpoint - new data: %p\n",
+                   *((__native *) breakpoints[slot].address));
+        }
+    }
+    printf("Reached breakpoint %d:%p(%s)\n", slot, getip(istate),
+           get_symtab_entry(getip(istate)));
+    printf("***Type 'exit' to exit kconsole.\n");
+    atomic_set(&haltstate,1);
+    kconsole("debug");
+    atomic_set(&haltstate,0);
+}
+void breakpoint_del(int slot)
+{
+    bpinfo_t *cur;
+    ipl_t ipl;
+    ipl = interrupts_disable();
+    spinlock_lock(&bkpoint_lock);
+    cur = &breakpoints[slot];
+    if (!cur->address) {
+        spinlock_unlock(&bkpoint_lock);
+        interrupts_restore(ipl);
+        return;
+    }
+    cur->address = NULL;
+    setup_dr(slot);
+    spinlock_unlock(&bkpoint_lock);
+    interrupts_restore(ipl);
+#ifdef CONFIG_SMP
+//  ipi_broadcast(VECTOR_DEBUG_IPI);
+#endif
+}
+#ifndef CONFIG_DEBUG_AS_WATCHPOINT
+/** Remove breakpoint from table */
+int cmd_del_breakpoint(cmd_arg_t *argv)
+{
+    if (argv->intval < 0 || argv->intval > BKPOINTS_MAX) {
+        printf("Invalid breakpoint number.\n");
+        return 0;
+    }
+    breakpoint_del(argv->intval);
+    return 1;
+}
+/** Add new breakpoint to table */
+static int cmd_add_breakpoint(cmd_arg_t *argv)
+{
+    int flags;
+    int id;
+    if (argv == &add_argv) {
+        flags = BKPOINT_INSTR;
+    } else { /* addwatchp */
+        flags = BKPOINT_WRITE;
+    }
+    printf("Adding breakpoint on address: %p\n", argv->intval);
+    id = breakpoint_add((void *)argv->intval, flags, -1);
+    if (id < 0)
+        printf("Add breakpoint failed.\n");
+    else
+        printf("Added breakpoint %d.\n", id);
+    return 1;
+}
+#endif
+static void debug_exception(int n, istate_t *istate)
+{
+    __native dr6;
+    int i;
+    /* Set RF to restart the instruction  */
+#ifdef amd64
+    istate->rflags |= RFLAGS_RF;
+#else
+    istate->eflags |= EFLAGS_RF;
+#endif
+    dr6 = read_dr6();
+    for (i=0; i < BKPOINTS_MAX; i++) {
+        if (dr6 & (1 << i)) {
+            dr6 &= ~ (1 << i);
+            write_dr6(dr6);
+            handle_exception(i, istate);
+        }
+    }
+}
+#ifdef CONFIG_SMP
+static void debug_ipi(int n, istate_t *istate)
+{
+    int i;
+    spinlock_lock(&bkpoint_lock);
+    for (i=0; i < BKPOINTS_MAX; i++)
+        setup_dr(i);
+    spinlock_unlock(&bkpoint_lock);
+}
+#endif
+/** Initialize debugger */
+void debugger_init()
+{
+    int i;
+    for (i=0; i<BKPOINTS_MAX; i++)
+        breakpoints[i].address = NULL;
+    cmd_initialize(&bkpts_info);
+    if (!cmd_register(&bkpts_info))
+        panic("could not register command %s\n", bkpts_info.name);
+#ifndef CONFIG_DEBUG_AS_WATCHPOINT
+    cmd_initialize(&delbkpt_info);
+    if (!cmd_register(&delbkpt_info))
+        panic("could not register command %s\n", delbkpt_info.name);
+    cmd_initialize(&addbkpt_info);
+    if (!cmd_register(&addbkpt_info))
+        panic("could not register command %s\n", addbkpt_info.name);
+    cmd_initialize(&addwatchp_info);
+    if (!cmd_register(&addwatchp_info))
+        panic("could not register command %s\n", addwatchp_info.name);
+#endif
+    exc_register(VECTOR_DEBUG, "debugger",
+             debug_exception);
+#ifdef CONFIG_SMP
+    exc_register(VECTOR_DEBUG_IPI, "debugger_smp",
+             debug_ipi);
+#endif
+}
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/amd64/src/fpu_context.c
 ,0 → 1,68
+/*
+ * Copyright (C) 2005 Jakub Vana
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup amd64
+ * @{
+ */
+/** @file
+ *
+ */
+#include <fpu_context.h>
+#include <arch.h>
+#include <cpu.h>
+/** Save FPU (mmx, sse) context using fxsave instruction */
+void fpu_context_save(fpu_context_t *fctx)
+{
+    __asm__ volatile (
+        "fxsave %0"
+        : "=m"(*fctx)
+        );
+}
+/** Restore FPU (mmx,sse) context using fxrstor instruction */
+void fpu_context_restore(fpu_context_t *fctx)
+{
+    __asm__ volatile (
+        "fxrstor %0"
+        : "=m"(*fctx)
+        );
+}
+void fpu_init()
+{
+    /* TODO: Zero all SSE, MMX etc. registers */
+    __asm__ volatile (
+        "fninit;"
+    );
+}
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/amd64/src/syscall.c
 ,0 → 1,72
+/*
+ * Copyright (C) 2006 Ondrej Palkovsky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup amd64
+ * @{
+ */
+/** @file
+ */
+#include <syscall/syscall.h>
+#include <arch/syscall.h>
+#include <panic.h>
+#include <arch/cpu.h>
+#include <arch/pm.h>
+#include <arch/asm.h>
+#include <print.h>
+#include <arch/cpu.h>
+extern void syscall_entry(void);
+/** Enable & setup support for SYSCALL/SYSRET */
+void syscall_setup_cpu(void)
+{
+    /* Enable SYSCALL/SYSRET */
+    set_efer_flag(AMD_SCE_FLAG);
+    /* Setup syscall entry address */
+    /* This is _mess_ - the 64-bit CS is argument+16,
+     * the SS is argument+8. The order is:
+     * +0(KDATA_DES), +8(UDATA_DES), +16(UTEXT_DES)
+     */
+    write_msr(AMD_MSR_STAR,
+          ((__u64)(gdtselector(KDATA_DES) | PL_USER)<<48) \
+          | ((__u64)(gdtselector(KTEXT_DES) | PL_KERNEL)<<32));
+    write_msr(AMD_MSR_LSTAR, (__u64)syscall_entry);
+    /* Mask RFLAGS on syscall
+     * - disable interrupts, until we exchange the stack register
+     *   (mask the IE bit)
+     */
+    write_msr(AMD_MSR_SFMASK, 0x200);
+}
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/amd64/src/pm.c
 ,0 → 1,245
+/*
+ * Copyright (C) 2001-2004 Jakub Jermar
+ * Copyright (C) 2005-2006 Ondrej Palkovsky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup amd64
+ * @{
+ */
+/** @file
+ */
+#include <arch/pm.h>
+#include <arch/mm/page.h>
+#include <arch/types.h>
+#include <arch/interrupt.h>
+#include <arch/asm.h>
+#include <interrupt.h>
+#include <mm/as.h>
+#include <config.h>
+#include <memstr.h>
+#include <mm/slab.h>
+#include <debug.h>
+/*
+ * There is no segmentation in long mode so we set up flat mode. In this
+ * mode, we use, for each privilege level, two segments spanning the
+ * whole memory. One is for code and one is for data.
+ */
+descriptor_t gdt[GDT_ITEMS] = {
+    /* NULL descriptor */
+    { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 },
+    /* KTEXT descriptor */
+    { .limit_0_15  = 0xffff,
+      .base_0_15   = 0,
+      .base_16_23  = 0,
+      .access      = AR_PRESENT | AR_CODE | DPL_KERNEL | AR_READABLE ,
+      .limit_16_19 = 0xf,
+      .available   = 0,
+      .longmode    = 1,
+      .special     = 0,
+      .granularity = 1,
+      .base_24_31  = 0 },
+    /* KDATA descriptor */
+    { .limit_0_15  = 0xffff,
+      .base_0_15   = 0,
+      .base_16_23  = 0,
+      .access      = AR_PRESENT | AR_DATA | AR_WRITABLE | DPL_KERNEL,
+      .limit_16_19 = 0xf,
+      .available   = 0,
+      .longmode    = 0,
+      .special     = 0,
+      .granularity = 1,
+      .base_24_31  = 0 },
+    /* UDATA descriptor */
+    { .limit_0_15  = 0xffff,
+      .base_0_15   = 0,
+      .base_16_23  = 0,
+      .access      = AR_PRESENT | AR_DATA | AR_WRITABLE | DPL_USER,
+      .limit_16_19 = 0xf,
+      .available   = 0,
+      .longmode    = 0,
+      .special     = 1,
+      .granularity = 1,
+      .base_24_31  = 0 },
+    /* UTEXT descriptor */
+    { .limit_0_15  = 0xffff,
+      .base_0_15   = 0,
+      .base_16_23  = 0,
+      .access      = AR_PRESENT | AR_CODE | DPL_USER,
+      .limit_16_19 = 0xf,
+      .available   = 0,
+      .longmode    = 1,
+      .special     = 0,
+      .granularity = 1,
+      .base_24_31  = 0 },
+    /* KTEXT 32-bit protected, for protected mode before long mode */
+    { .limit_0_15  = 0xffff,
+      .base_0_15   = 0,
+      .base_16_23  = 0,
+      .access      = AR_PRESENT | AR_CODE | DPL_KERNEL | AR_READABLE,
+      .limit_16_19 = 0xf,
+      .available   = 0,
+      .longmode    = 0,
+      .special     = 1,
+      .granularity = 1,
+      .base_24_31  = 0 },
+    /* TSS descriptor - set up will be completed later,
+     * on AMD64 it is 64-bit - 2 items in table */
+    { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 },
+    { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 },
+    /* VESA Init descriptor */
+#ifdef CONFIG_FB
+    { 0xffff, 0, VESA_INIT_SEGMENT>>12, AR_PRESENT | AR_CODE | DPL_KERNEL, 0xf, 0, 0, 0, 0, 0 }
+#endif
+};
+idescriptor_t idt[IDT_ITEMS];
+ptr_16_64_t gdtr = {.limit = sizeof(gdt), .base= (__u64) gdt };
+ptr_16_64_t idtr = {.limit = sizeof(idt), .base= (__u64) idt };
+static tss_t tss;
+tss_t *tss_p = NULL;
+void gdt_tss_setbase(descriptor_t *d, __address base)
+{
+    tss_descriptor_t *td = (tss_descriptor_t *) d;
+    td->base_0_15 = base & 0xffff;
+    td->base_16_23 = ((base) >> 16) & 0xff;
+    td->base_24_31 = ((base) >> 24) & 0xff;
+    td->base_32_63 = ((base) >> 32);
+}
+void gdt_tss_setlimit(descriptor_t *d, __u32 limit)
+{
+    struct tss_descriptor *td = (tss_descriptor_t *) d;
+    td->limit_0_15 = limit & 0xffff;
+    td->limit_16_19 = (limit >> 16) & 0xf;
+}
+void idt_setoffset(idescriptor_t *d, __address offset)
+{
+    /*
+     * Offset is a linear address.
+     */
+    d->offset_0_15 = offset & 0xffff;
+    d->offset_16_31 = offset >> 16 & 0xffff;
+    d->offset_32_63 = offset >> 32;
+}
+void tss_initialize(tss_t *t)
+{
+    memsetb((__address) t, sizeof(tss_t), 0);
+}
+/*
+ * This function takes care of proper setup of IDT and IDTR.
+ */
+void idt_init(void)
+{
+    idescriptor_t *d;
+    int i;
+    for (i = 0; i < IDT_ITEMS; i++) {
+        d = &idt[i];
+        d->unused = 0;
+        d->selector = gdtselector(KTEXT_DES);
+        d->present = 1;
+        d->type = AR_INTERRUPT; /* masking interrupt */
+        idt_setoffset(d, ((__address) interrupt_handlers) + i*interrupt_handler_size);
+        exc_register(i, "undef", (iroutine)null_interrupt);
+    }
+    exc_register( 7, "nm_fault", nm_fault);
+    exc_register(12, "ss_fault", ss_fault);
+    exc_register(13, "gp_fault", gp_fault);
+    exc_register(14, "ident_mapper", ident_page_fault);
+}
+/** Initialize segmentation - code/data/idt tables
+ *
+ */
+void pm_init(void)
+{
+    descriptor_t *gdt_p = (struct descriptor *) gdtr.base;
+    tss_descriptor_t *tss_desc;
+    /*
+     * Each CPU has its private GDT and TSS.
+     * All CPUs share one IDT.
+     */
+    if (config.cpu_active == 1) {
+        idt_init();
+        /*
+         * NOTE: bootstrap CPU has statically allocated TSS, because
+         * the heap hasn't been initialized so far.
+         */
+        tss_p = &tss;
+    }
+    else {
+        /* We are going to use malloc, which may return
+         * non boot-mapped pointer, initialize the CR3 register
+         * ahead of page_init */
+        write_cr3((__address) AS_KERNEL->page_table);
+        tss_p = (struct tss *) malloc(sizeof(tss_t), FRAME_ATOMIC);
+        if (!tss_p)
+            panic("could not allocate TSS\n");
+    }
+    tss_initialize(tss_p);
+    tss_desc = (tss_descriptor_t *) (&gdt_p[TSS_DES]);
+    tss_desc->present = 1;
+    tss_desc->type = AR_TSS;
+    tss_desc->dpl = PL_KERNEL;
+    gdt_tss_setbase(&gdt_p[TSS_DES], (__address) tss_p);
+    gdt_tss_setlimit(&gdt_p[TSS_DES], TSS_BASIC_SIZE - 1);
+    gdtr_load(&gdtr);
+    idtr_load(&idtr);
+    /*
+     * As of this moment, the current CPU has its own GDT pointing
+     * to its own TSS. We just need to load the TR register.
+     */
+    tr_load(gdtselector(TSS_DES));
+}
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/amd64/src/userspace.c
 ,0 → 1,82
+/*
+ * Copyright (C) 2005 Ondrej Palkovsky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup amd64
+ * @{
+ */
+/** @file
+ */
+#include <userspace.h>
+#include <arch/pm.h>
+#include <arch/types.h>
+#include <arch.h>
+#include <proc/uarg.h>
+#include <mm/as.h>
+/** Enter userspace
+ *
+ * Change CPU protection level to 3, enter userspace.
+ *
+ */
+void userspace(uspace_arg_t *kernel_uarg)
+{
+    ipl_t ipl;
+    ipl = interrupts_disable();
+    /* Clear CF,PF,AF,ZF,SF,DF,OF */
+    ipl &= ~(0xcd4);
+    __asm__ volatile (""
+              "pushq %0\n"
+              "pushq %1\n"
+              "pushq %2\n"
+              "pushq %3\n"
+              "pushq %4\n"
+              "movq %5, %%rax\n"
+              "iretq\n"
+              : :
+              "i" (gdtselector(UDATA_DES) | PL_USER),
+              "r" (kernel_uarg->uspace_stack+THREAD_STACK_SIZE),
+              "r" (ipl),
+              "i" (gdtselector(UTEXT_DES) | PL_USER),
+              "r" (kernel_uarg->uspace_entry),
+              "r" (kernel_uarg->uspace_uarg)
+              : "rax"
+              );
+    /* Unreachable */
+    for(;;)
+        ;
+}
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/amd64/src/boot/boot.S
 ,0 → 1,515
+#
+# Copyright (C) 2005 Ondrej Palkovsky
+# Copyright (C) 2006 Martin Decky
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# - Redistributions of source code must retain the above copyright
+#   notice, this list of conditions and the following disclaimer.
+# - Redistributions in binary form must reproduce the above copyright
+#   notice, this list of conditions and the following disclaimer in the
+#   documentation and/or other materials provided with the distribution.
+# - The name of the author may not be used to endorse or promote products
+#   derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+#include <arch/boot/boot.h>
+#include <arch/boot/memmap.h>
+#include <arch/mm/page.h>
+#include <arch/mm/ptl.h>
+#include <arch/pm.h>
+#include <arch/cpu.h>
+#include <arch/cpuid.h>
+#define START_STACK (BOOT_OFFSET - BOOT_STACK_SIZE)
+.section K_TEXT_START, "ax"
+.code32
+.align 4
+.global multiboot_image_start
+multiboot_header:
+    .long MULTIBOOT_HEADER_MAGIC
+    .long MULTIBOOT_HEADER_FLAGS
+    .long -(MULTIBOOT_HEADER_MAGIC + MULTIBOOT_HEADER_FLAGS)    # checksum
+    .long multiboot_header
+    .long unmapped_ktext_start
+    .long 0
+    .long 0
+    .long multiboot_image_start
+multiboot_image_start:
+    movl $START_STACK, %esp         # initialize stack pointer
+    lgdt bootstrap_gdtr             # initialize Global Descriptor Table register
+    movw $gdtselector(KDATA_DES), %cx
+    movw %cx, %es
+    movw %cx, %ds                           # kernel data + stack
+    movw %cx, %ss
+    # Simics seems to remove hidden part of GS on entering user mode
+    #  when _visible_ part of GS does not point to user-mode segment
+    movw $gdtselector(UDATA_DES), %cx
+    movw %cx, %fs
+    movw %cx, %gs
+    jmpl $gdtselector(KTEXT32_DES), $multiboot_meeting_point
+    multiboot_meeting_point:
+    movl %eax, grub_eax                         # save parameters from GRUB
+    movl %ebx, grub_ebx
+#ifdef CONFIG_FB
+    mov $vesa_init, %esi;
+    mov $VESA_INIT_SEGMENT << 4, %edi
+    mov $e_vesa_init - vesa_init, %ecx
+    cld
+    rep movsb
+    mov $VESA_INIT_SEGMENT << 4, %edi
+    jmpl *%edi
+    vesa_meeting_point:
+    mov %esi, KA2PA(vesa_ph_addr)
+    mov %di, KA2PA(vesa_height)
+    shr $16, %edi
+    mov %di, KA2PA(vesa_width)
+    mov %bx, KA2PA(vesa_scanline)
+    shr $16, %ebx
+    mov %bx, KA2PA(vesa_bpp)
+#endif
+    # Protected 32-bit. We want to reuse the code-seg descriptor,
+    # the Default operand size must not be 1 when entering long mode
+    movl $0x80000000, %eax
+    cpuid
+    cmp $0x80000000, %eax                       # any function > 80000000h?
+    jbe long_mode_unsupported
+    movl $(AMD_CPUID_EXTENDED), %eax            # Extended function code 80000001
+    cpuid
+    bt $29, %edx                                # Test if long mode is supported.
+    jc long_mode_supported
+    long_mode_unsupported:
+        cli
+        hlt
+    long_mode_supported:
+    # Enable 64-bit page transaltion entries - CR4.PAE = 1.
+    # Paging is not enabled until after long mode is enabled
+    movl %cr4, %eax
+    btsl $5, %eax
+    movl %eax, %cr4
+    # Set up paging tables
+    leal ptl_0, %eax
+    movl %eax, %cr3
+    # Enable long mode
+    movl $EFER_MSR_NUM, %ecx    # EFER MSR number
+    rdmsr                       # Read EFER
+    btsl $AMD_LME_FLAG, %eax    # Set LME=1
+    wrmsr                       # Write EFER
+    # Enable paging to activate long mode (set CR0.PG=1)
+    movl %cr0, %eax
+    btsl $31, %eax
+    movl %eax, %cr0
+    # At this point we are in compatibility mode
+    jmpl $gdtselector(KTEXT_DES), $start64
+.code64
+start64:
+    movq $(PA2KA(START_STACK)), %rsp
+    movl grub_eax, %eax
+    movl grub_ebx, %ebx
+    cmpl $MULTIBOOT_LOADER_MAGIC, %eax              # compare GRUB signature
+    je valid_boot
+        xorl %ecx, %ecx                         # no memory size or map available
+        movl %ecx, e801memorysize
+        movl %ecx, e820counter
+        jmp invalid_boot
+    valid_boot:
+        movl (%ebx), %eax                       # ebx = physical address of struct multiboot_info
+        bt $0, %eax                             # mbi->flags[0] (mem_lower, mem_upper valid)
+        jc mem_valid
+            xorl %ecx, %ecx
+            jmp mem_invalid
+        mem_valid:
+        movl 4(%ebx), %ecx                      # mbi->mem_lower
+        addl 8(%ebx), %ecx                      # mbi->mem_upper
+        mem_invalid:
+        movl %ecx, e801memorysize
+        bt $3, %eax                             # mbi->flags[3] (mods_count, mods_addr valid)
+        jc mods_valid
+            xorq %rcx, %rcx
+            movq %rcx, init
+            jmp mods_end
+        mods_valid:
+        xorq %rcx, %rcx
+        movl 20(%ebx), %ecx                     # mbi->mods_count
+        movq %rcx, init
+        cmpl $0, %ecx
+        je mods_end
+        movl 24(%ebx), %esi                     # mbi->mods_addr
+        movq $init, %rdi
+        mods_loop:
+            xorq %rdx, %rdx
+            movl 0(%esi), %edx                  # mods->mod_start
+            movq $0xffff800000000000, %r10
+            addq %r10, %rdx
+            movq %rdx, 8(%rdi)
+            xorq %rdx, %rdx
+            movl 4(%esi), %edx
+            subl 0(%esi), %edx                  # mods->mod_end - mods->mod_start
+            movq %rdx, 16(%rdi)
+            addl $16, %esi
+            addq $16, %rdi
+            loop mods_loop
+        mods_end:
+        bt $6, %eax                             # mbi->flags[6] (mmap_length, mmap_addr valid)
+        jc mmap_valid
+            xorl %edx, %edx
+            jmp mmap_invalid
+        mmap_valid:
+        movl 44(%ebx), %ecx                     # mbi->mmap_length
+        movl 48(%ebx), %esi                     # mbi->mmap_addr
+        movq $e820table, %rdi
+        xorl %edx, %edx
+        mmap_loop:
+            cmpl $0, %ecx
+            jle mmap_end
+            movl 4(%esi), %eax                  # mmap->base_addr_low
+            movl %eax, (%rdi)
+            movl 8(%esi), %eax                  # mmap->base_addr_high
+            movl %eax, 4(%rdi)
+            movl 12(%esi), %eax                 # mmap->length_low
+            movl %eax, 8(%rdi)
+            movl 16(%esi), %eax                 # mmap->length_high
+            movl %eax, 12(%rdi)
+            movl 20(%esi), %eax                 # mmap->type
+            movl %eax, 16(%rdi)
+            movl (%esi), %eax                   # mmap->size
+            addl $0x4, %eax
+            addl %eax, %esi
+            subl %eax, %ecx
+            addq $MEMMAP_E820_RECORD_SIZE, %rdi
+            incl %edx
+            jmp mmap_loop
+        mmap_end:
+        mmap_invalid:
+        movl %edx, e820counter
+    invalid_boot:
+#ifdef CONFIG_SMP
+    # copy AP bootstrap routines below 1 MB
+    movq $BOOT_OFFSET, %rsi
+    movq $AP_BOOT_OFFSET, %rdi
+    movq $_hardcoded_unmapped_size, %rcx
+    cld
+    rep movsb
+#endif
+    call main_bsp   # never returns
+    cli
+    hlt
+#ifdef CONFIG_FB
+.code32
+vesa_init:
+    jmp $gdtselector(VESA_INIT_DES), $vesa_init_real - vesa_init
+.code16
+vesa_init_real:
+    mov %cr0, %eax
+    and $~1, %eax
+    mov %eax, %cr0
+    jmp $VESA_INIT_SEGMENT, $vesa_init_real2 - vesa_init
+vesa_init_real2:
+    mov $VESA_INIT_SEGMENT, %bx
+    mov %bx, %es
+    mov %bx, %fs
+    mov %bx, %gs
+    mov %bx, %ds
+    mov %bx, %ss
+    movl $0x0000fffc, %esp
+    movl $0x0000fffc, %ebp
+#define VESA_INFO_SIZE 1024
+#define VESA_MODE_LIST_PTR_OFFSET 14
+#define VESA_MODE_WIDTH_OFFSET 18
+#define VESA_MODE_HEIGHT_OFFSET 20
+#define VESA_MODE_BPP_OFFSET 25
+#define VESA_MODE_SCANLINE_OFFSET 16
+#define VESA_MODE_PHADDR_OFFSET 40
+#define VESA_END_OF_MODES 0xffff
+#define VESA_OK 0x4f
+#define VESA_GET_INFO 0x4f00
+#define VESA_GET_MODE_INFO 0x4f01
+#define VESA_SET_MODE 0x4f02
+#define CONFIG_VESA_BPP_a 255
+#if CONFIG_VESA_BPP == 24
+#undef CONFIG_VESA_BPP_a
+#define CONFIG_VESA_BPP_a 32
+#endif
+    mov $VESA_GET_INFO, %ax
+    mov $e_vesa_init - vesa_init, %di
+    push %di
+    int $0x10
+    pop %di
+    cmp $VESA_OK, %al
+    jnz 0f
+    mov 2 + VESA_MODE_LIST_PTR_OFFSET(%di), %si
+    mov %si, %gs
+    mov VESA_MODE_LIST_PTR_OFFSET(%di), %si
+    add $VESA_INFO_SIZE, %di
+:# Try next mode
+    mov %gs:(%si), %cx
+    cmp $VESA_END_OF_MODES, %cx
+    jz 0f
+    inc %si
+    inc %si
+    push %cx
+    push %di
+    push %si
+    mov $VESA_GET_MODE_INFO, %ax
+    int $0x10
+    pop %si
+    pop %di
+    pop %cx
+    cmp $VESA_OK, %al
+    jnz 0f
+    mov $CONFIG_VESA_WIDTH, %ax
+    cmp VESA_MODE_WIDTH_OFFSET(%di), %ax
+    jnz 1b
+    mov $CONFIG_VESA_HEIGHT, %ax
+    cmp VESA_MODE_HEIGHT_OFFSET(%di), %ax
+    jnz 1b
+    mov $CONFIG_VESA_BPP, %al
+    cmp VESA_MODE_BPP_OFFSET(%di), %al
+    jz 2f
+    mov $CONFIG_VESA_BPP_a, %al
+    cmp VESA_MODE_BPP_OFFSET(%di), %al
+    jnz 1b
+:
+    mov %cx, %bx
+    or $0xc000, %bx
+    push %di
+    mov $VESA_SET_MODE, %ax
+    int $0x10
+    pop %di
+    cmp $VESA_OK, %al
+    jnz 0f
+    mov VESA_MODE_PHADDR_OFFSET(%di), %esi
+    mov VESA_MODE_WIDTH_OFFSET(%di), %ax
+    shl $16, %eax
+    mov VESA_MODE_HEIGHT_OFFSET(%di), %ax
+    mov VESA_MODE_BPP_OFFSET(%di), %bl
+    xor %bh, %bh
+    shl $16, %ebx
+    mov VESA_MODE_SCANLINE_OFFSET(%di), %bx
+    mov %eax, %edi
+:
+    mov %cr0, %eax
+    or $1, %eax
+    mov %eax, %cr0
+    jmp 9f
+:
+    ljmpl $gdtselector(KTEXT32_DES), $(vesa_init_protect - vesa_init + VESA_INIT_SEGMENT << 4)
+:# No prefered mode found
+    mov $0x111, %cx
+    push %di
+    push %cx
+    mov $VESA_GET_MODE_INFO, %ax
+    int $0x10
+    pop %cx
+    pop %di
+    cmp $VESA_OK, %al
+    jnz 1f
+    jz 2b                       # Force relative jump
+:
+    mov $0x0003, %ax
+    int $0x10
+    mov $0xffffffff, %edi       # EGA text mode used, because of problems with VESA
+    xor %ax, %ax
+    jz 8b                       # Force relative jump
+.code32
+vesa_init_protect:
+    movw $gdtselector(KDATA_DES), %cx
+    movw %cx, %es
+    movw %cx, %ds                           # kernel data + stack
+    movw %cx, %ss
+    # Simics seems to remove hidden part of GS on entering user mode
+    #  when _visible_ part of GS does not point to user-mode segment
+    movw $gdtselector(UDATA_DES), %cx
+    movw %cx, %fs
+    movw %cx, %gs
+    jmpl $gdtselector(KTEXT32_DES), $vesa_meeting_point
+.align 4
+e_vesa_init:
+#endif
+.section K_DATA_START, "aw", @progbits
+.align 4096
+# Identical mapping of first 64MB and the same of -2GB -> 0
+.global ptl_2
+ptl_2:
+    .quad 0x0 | (PTL_WRITABLE | PTL_PRESENT | PTL_2MB_PAGE)
+    .quad 0x200000 | (PTL_WRITABLE | PTL_PRESENT | PTL_2MB_PAGE)
+    .quad 0x400000 | (PTL_WRITABLE | PTL_PRESENT | PTL_2MB_PAGE)
+    .quad 0x600000 | (PTL_WRITABLE | PTL_PRESENT | PTL_2MB_PAGE)
+    .quad 0x800000 | (PTL_WRITABLE | PTL_PRESENT | PTL_2MB_PAGE)
+    .quad 0xa00000 | (PTL_WRITABLE | PTL_PRESENT | PTL_2MB_PAGE)
+    .quad 0xc00000 | (PTL_WRITABLE | PTL_PRESENT | PTL_2MB_PAGE)
+    .quad 0xe00000 | (PTL_WRITABLE | PTL_PRESENT | PTL_2MB_PAGE)
+    .quad 0x1000000 | (PTL_WRITABLE | PTL_PRESENT | PTL_2MB_PAGE)
+    .quad 0x1200000 | (PTL_WRITABLE | PTL_PRESENT | PTL_2MB_PAGE)
+    .quad 0x1400000 | (PTL_WRITABLE | PTL_PRESENT | PTL_2MB_PAGE)
+    .quad 0x1600000 | (PTL_WRITABLE | PTL_PRESENT | PTL_2MB_PAGE)
+    .quad 0x1800000 | (PTL_WRITABLE | PTL_PRESENT | PTL_2MB_PAGE)
+    .quad 0x1a00000 | (PTL_WRITABLE | PTL_PRESENT | PTL_2MB_PAGE)
+    .quad 0x1c00000 | (PTL_WRITABLE | PTL_PRESENT | PTL_2MB_PAGE)
+    .quad 0x1e00000 | (PTL_WRITABLE | PTL_PRESENT | PTL_2MB_PAGE)
+    .quad 0x2000000 | (PTL_WRITABLE | PTL_PRESENT | PTL_2MB_PAGE)
+    .quad 0x2200000 | (PTL_WRITABLE | PTL_PRESENT | PTL_2MB_PAGE)
+    .quad 0x2400000 | (PTL_WRITABLE | PTL_PRESENT | PTL_2MB_PAGE)
+    .quad 0x2600000 | (PTL_WRITABLE | PTL_PRESENT | PTL_2MB_PAGE)
+    .quad 0x2800000 | (PTL_WRITABLE | PTL_PRESENT | PTL_2MB_PAGE)
+    .quad 0x2a00000 | (PTL_WRITABLE | PTL_PRESENT | PTL_2MB_PAGE)
+    .quad 0x2c00000 | (PTL_WRITABLE | PTL_PRESENT | PTL_2MB_PAGE)
+    .quad 0x2e00000 | (PTL_WRITABLE | PTL_PRESENT | PTL_2MB_PAGE)
+    .quad 0x3000000 | (PTL_WRITABLE | PTL_PRESENT | PTL_2MB_PAGE)
+    .quad 0x3200000 | (PTL_WRITABLE | PTL_PRESENT | PTL_2MB_PAGE)
+    .quad 0x3400000 | (PTL_WRITABLE | PTL_PRESENT | PTL_2MB_PAGE)
+    .quad 0x3600000 | (PTL_WRITABLE | PTL_PRESENT | PTL_2MB_PAGE)
+    .quad 0x3800000 | (PTL_WRITABLE | PTL_PRESENT | PTL_2MB_PAGE)
+    .quad 0x3a00000 | (PTL_WRITABLE | PTL_PRESENT | PTL_2MB_PAGE)
+    .quad 0x3c00000 | (PTL_WRITABLE | PTL_PRESENT | PTL_2MB_PAGE)
+    .quad 0x3e00000 | (PTL_WRITABLE | PTL_PRESENT | PTL_2MB_PAGE)
+.align 4096
+.global ptl_1
+ptl_1:
+    .quad ptl_2 + (PTL_WRITABLE | PTL_PRESENT)
+    .fill 509,8,0
+    .quad ptl_2 + (PTL_WRITABLE | PTL_PRESENT)
+    .fill 1,8,0
+.align 4096
+.global ptl_0
+ptl_0:
+    .quad ptl_1 + (PTL_WRITABLE | PTL_PRESENT)
+    .fill 255,8,0
+    .quad ptl_1 + (PTL_WRITABLE | PTL_PRESENT)
+    .fill 254,8,0
+    .quad ptl_1 + (PTL_WRITABLE | PTL_PRESENT)
+.global bootstrap_gdtr
+bootstrap_gdtr:
+    .word gdtselector(GDT_ITEMS)
+    .long KA2PA(gdt)
+grub_eax:
+    .long 0
+grub_ebx:
+    .long 0

 /tags/0.2.0.2/kernel/arch/amd64/src/asm_utils.S
 ,0 → 1,303
+#
+# Copyright (C) 2005 Ondrej Palkovsky
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# - Redistributions of source code must retain the above copyright
+#   notice, this list of conditions and the following disclaimer.
+# - Redistributions in binary form must reproduce the above copyright
+#   notice, this list of conditions and the following disclaimer in the
+#   documentation and/or other materials provided with the distribution.
+# - The name of the author may not be used to endorse or promote products
+#   derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+#define IREGISTER_SPACE 120
+#define IOFFSET_RAX 0x0
+#define IOFFSET_RBX 0x8
+#define IOFFSET_RCX 0x10
+#define IOFFSET_RDX 0x18
+#define IOFFSET_RSI 0x20
+#define IOFFSET_RDI 0x28
+#define IOFFSET_R8 0x30
+#define IOFFSET_R9 0x38
+#define IOFFSET_R10 0x40
+#define IOFFSET_R11 0x48
+#define IOFFSET_R12 0x50
+#define IOFFSET_R13 0x58
+#define IOFFSET_R14 0x60
+#define IOFFSET_R15 0x68
+#define IOFFSET_RBP 0x70
+#  Mask for interrupts 0 - 31 (bits 0 - 31) where 0 means that int has no error word
+# and 1 means interrupt with error word
+#define ERROR_WORD_INTERRUPT_LIST 0x00027D00
+#include <arch/pm.h>
+#include <arch/mm/page.h>
+.text
+.global interrupt_handlers
+.global syscall_entry
+.global panic_printf
+panic_printf:
+    movq $halt, (%rsp)
+    jmp printf
+.global cpuid
+.global has_cpuid
+.global rdtsc
+.global read_efer_flag
+.global set_efer_flag
+.global memcpy
+.global memcpy_from_uspace
+.global memcpy_to_uspace
+.global memcpy_from_uspace_failover_address
+.global memcpy_to_uspace_failover_address
+#define MEMCPY_DST  %rdi
+#define MEMCPY_SRC  %rsi
+#define MEMCPY_SIZE %rdx
+/**
+ * Copy memory from/to userspace.
+ *
+ * This is almost conventional memcpy().
+ * The difference is that there is a failover part
+ * to where control is returned from a page fault if
+ * the page fault occurs during copy_from_uspace()
+ * or copy_to_uspace().
+ *
+ * @param MEMCPY_DST    Destination address.
+ * @param MEMCPY_SRC    Source address.
+ * @param MEMCPY_SIZE   Number of bytes to copy.
+ *
+ * @retrun MEMCPY_SRC on success, 0 on failure.
+ */
+memcpy:
+memcpy_from_uspace:
+memcpy_to_uspace:
+    movq MEMCPY_SRC, %rax
+    movq MEMCPY_SIZE, %rcx
+    shrq $3, %rcx           /* size / 8 */
+    rep movsq           /* copy as much as possible word by word */
+    movq MEMCPY_SIZE, %rcx
+    andq $7, %rcx           /* size % 8 */
+    jz 0f
+    rep movsb           /* copy the rest byte by byte */
+:
+    ret             /* return MEMCPY_SRC, success */
+memcpy_from_uspace_failover_address:
+memcpy_to_uspace_failover_address:
+    xorq %rax, %rax         /* return 0, failure */
+    ret
+## Determine CPUID support
+#
+# Return 0 in EAX if CPUID is not support, 1 if supported.
+#
+has_cpuid:
+    pushfq          # store flags
+    popq %rax       # read flags
+    movq %rax,%rdx      # copy flags
+    btcl $21,%edx       # swap the ID bit
+    pushq %rdx
+    popfq           # propagate the change into flags
+    pushfq
+    popq %rdx       # read flags
+    andl $(1<<21),%eax  # interested only in ID bit
+    andl $(1<<21),%edx
+    xorl %edx,%eax      # 0 if not supported, 1 if supported
+    ret
+cpuid:
+    movq %rbx, %r10  # we have to preserve rbx across function calls
+    movl %edi,%eax  # load the command into %eax
+    cpuid
+    movl %eax,0(%rsi)
+    movl %ebx,4(%rsi)
+    movl %ecx,8(%rsi)
+    movl %edx,12(%rsi)
+    movq %r10, %rbx
+    ret
+rdtsc:
+    xorq %rax,%rax
+    rdtsc
+    ret
+set_efer_flag:
+    movq $0xc0000080, %rcx
+    rdmsr
+    btsl %edi, %eax
+    wrmsr
+    ret
+read_efer_flag:
+    movq $0xc0000080, %rcx
+    rdmsr
+    ret
+# Push all general purpose registers on stack except %rbp, %rsp
+.macro save_all_gpr
+    movq %rax, IOFFSET_RAX(%rsp)
+    movq %rcx, IOFFSET_RCX(%rsp)
+    movq %rdx, IOFFSET_RDX(%rsp)
+    movq %rsi, IOFFSET_RSI(%rsp)
+    movq %rdi, IOFFSET_RDI(%rsp)
+    movq %r8, IOFFSET_R8(%rsp)
+    movq %r9, IOFFSET_R9(%rsp)
+    movq %r10, IOFFSET_R10(%rsp)
+    movq %r11, IOFFSET_R11(%rsp)
+#ifdef CONFIG_DEBUG_ALLREGS
+    movq %rbx, IOFFSET_RBX(%rsp)
+    movq %rbp, IOFFSET_RBP(%rsp)
+    movq %r12, IOFFSET_R12(%rsp)
+    movq %r13, IOFFSET_R13(%rsp)
+    movq %r14, IOFFSET_R14(%rsp)
+    movq %r15, IOFFSET_R15(%rsp)
+#endif
+.endm
+.macro restore_all_gpr
+    movq IOFFSET_RAX(%rsp), %rax
+    movq IOFFSET_RCX(%rsp), %rcx
+    movq IOFFSET_RDX(%rsp), %rdx
+    movq IOFFSET_RSI(%rsp), %rsi
+    movq IOFFSET_RDI(%rsp), %rdi
+    movq IOFFSET_R8(%rsp), %r8
+    movq IOFFSET_R9(%rsp), %r9
+    movq IOFFSET_R10(%rsp), %r10
+    movq IOFFSET_R11(%rsp), %r11
+#ifdef CONFIG_DEBUG_ALLREGS
+    movq IOFFSET_RBX(%rsp), %rbx
+    movq IOFFSET_RBP(%rsp), %rbp
+    movq IOFFSET_R12(%rsp), %r12
+    movq IOFFSET_R13(%rsp), %r13
+    movq IOFFSET_R14(%rsp), %r14
+    movq IOFFSET_R15(%rsp), %r15
+#endif
+.endm
+#ifdef CONFIG_DEBUG_ALLREGS
+# define INTERRUPT_ALIGN 256
+#else
+# define INTERRUPT_ALIGN 128
+#endif
+## Declare interrupt handlers
+#
+# Declare interrupt handlers for n interrupt
+# vectors starting at vector i.
+#
+# The handlers call exc_dispatch().
+#
+.macro handler i n
+    /*
+     * Choose between version with error code and version without error code.
+     * Both versions have to be of the same size. amd64 assembly is, however,
+     * a little bit tricky. For instance, subq $0x80, %rsp and subq $0x78, %rsp
+     * can result in two instructions with different op-code lengths.
+     * Therefore we align the interrupt handlers.
+     */
+    .iflt \i-32
+        .if (1 << \i) & ERROR_WORD_INTERRUPT_LIST
+            /*
+             * Version with error word.
+             */
+            subq $IREGISTER_SPACE, %rsp
+        .else
+            /*
+             * Version without error word,
+             */
+            subq $(IREGISTER_SPACE+8), %rsp
+        .endif
+    .else
+        /*
+         * Version without error word,
+         */
+        subq $(IREGISTER_SPACE+8), %rsp
+    .endif
+    save_all_gpr
+    movq $(\i), %rdi    # %rdi - first parameter
+    movq %rsp, %rsi     # %rsi - pointer to istate
+    call exc_dispatch   # exc_dispatch(i, istate)
+    restore_all_gpr
+    # $8 = Skip error word
+    addq $(IREGISTER_SPACE+8), %rsp
+    iretq
+    .align INTERRUPT_ALIGN
+    .if (\n-\i)-1
+    handler "(\i+1)",\n
+    .endif
+.endm
+.align INTERRUPT_ALIGN
+interrupt_handlers:
+h_start:
+    handler 0 IDT_ITEMS
+h_end:
+syscall_entry:
+    # Switch to hidden gs
+    swapgs
+    # %gs:0 now points to pointer to stack page
+    mov %gs:0, %r10     # We have a ptr to stack page in r10
+    addq $PAGE_SIZE-16, %r10 # We need some space to store old %sp
+    movq %rsp, 0(%r10)  # Save old stack pointer to stack
+    movq %r10, %rsp     # Change to new stack
+    pushq %rcx          # Return address
+    pushq %r11          # Save flags
+    # Switch back to remain consistent
+    swapgs
+    sti
+    movq %r9, %rcx      # Exchange last parameter as a third
+    call syscall_handler
+    cli                 # We will be touching stack pointer
+    popq %r11
+    popq %rcx
+    movq 0(%rsp), %rsp
+    sysretq
+.data
+.global interrupt_handler_size
+interrupt_handler_size: .quad (h_end-h_start)/IDT_ITEMS

 /tags/0.2.0.2/kernel/arch/amd64/src/smp/ap.S
 ,0 → 1,115
+#
+# Copyright (C) 2001-2004 Jakub Jermar
+# Copyright (C) 2005-2006 Martin Decky
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# - Redistributions of source code must retain the above copyright
+#   notice, this list of conditions and the following disclaimer.
+# - Redistributions in binary form must reproduce the above copyright
+#   notice, this list of conditions and the following disclaimer in the
+#   documentation and/or other materials provided with the distribution.
+# - The name of the author may not be used to endorse or promote products
+#   derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+#
+# Init code for application processors.
+#
+#include <arch/boot/boot.h>
+#include <arch/boot/memmap.h>
+#include <arch/mm/page.h>
+#include <arch/pm.h>
+#include <arch/cpu.h>
+#include <arch/cpuid.h>
+.section K_TEXT_START, "ax"
+#ifdef CONFIG_SMP
+.global unmapped_ap_boot
+# This piece of code is real-mode and is meant to be alligned at 4K boundary.
+# The requirement for such an alignment comes from MP Specification's STARTUP IPI
+# requirements.
+.align 4096
+unmapped_ap_boot:
+.code16
+    cli
+    xorw %ax, %ax
+    movw %ax, %ds
+    lgdtl ap_gdtr       # initialize Global Descriptor Table register
+    movl %cr0, %eax
+    orl $1, %eax
+    movl %eax, %cr0             # switch to protected mode
+    jmpl $gdtselector(KTEXT32_DES), $jump_to_kernel - BOOT_OFFSET + AP_BOOT_OFFSET
+jump_to_kernel:
+.code32
+    movw $gdtselector(KDATA_DES), %ax
+    movw %ax, %ds
+    movw %ax, %es
+    movw %ax, %ss
+    movw $gdtselector(UDATA_DES), %ax
+    movw %ax, %gs
+    # Enable 64-bit page transaltion entries - CR4.PAE = 1.
+    # Paging is not enabled until after long mode is enabled
+    movl %cr4, %eax
+    btsl $5, %eax
+    movl %eax, %cr4
+    leal ptl_0, %eax
+    movl %eax, %cr3
+    # Enable long mode
+    movl $EFER_MSR_NUM, %ecx   # EFER MSR number
+    rdmsr                   # Read EFER
+    btsl $AMD_LME_FLAG, %eax            # Set LME=1
+    wrmsr                   # Write EFER
+    # Enable paging to activate long mode (set CR0.PG=1)
+    movl %cr0, %eax
+    btsl $31, %eax
+    movl %eax, %cr0
+    # At this point we are in compatibility mode
+    jmpl $gdtselector(KTEXT_DES), $start64 - BOOT_OFFSET + AP_BOOT_OFFSET
+.code64
+start64:
+    movq (ctx), %rsp
+    call main_ap - AP_BOOT_OFFSET + BOOT_OFFSET   # never returns
+#endif /* CONFIG_SMP */
+.section K_DATA_START, "aw", @progbits
+#ifdef CONFIG_SMP
+.global unmapped_ap_gdtr
+unmapped_ap_gdtr:
+    .word 0
+    .long 0
+#endif /* CONFIG_SMP */

/tags/0.2.0.2/kernel/arch/amd64/src/smp/mps.c
0,0 → 1,0
link ../../../ia32/src/smp/mps.c
Property changes:
Added: svn:special
+*
\ No newline at end of property

/tags/0.2.0.2/kernel/arch/amd64/src/smp/smp.c
0,0 → 1,0
link ../../../ia32/src/smp/smp.c
Property changes:
Added: svn:special
+*
\ No newline at end of property

/tags/0.2.0.2/kernel/arch/amd64/src/smp/ipi.c
0,0 → 1,0
link ../../../ia32/src/smp/ipi.c
Property changes:
Added: svn:special
+*
\ No newline at end of property

/tags/0.2.0.2/kernel/arch/amd64/src/smp/apic.c
0,0 → 1,0
link ../../../ia32/src/smp/apic.c
Property changes:
Added: svn:special
+*
\ No newline at end of property

/tags/0.2.0.2/kernel/arch/amd64/src/bios
0,0 → 1,0
link ../../ia32/src/bios
Property changes:
Added: svn:special
+*
\ No newline at end of property

/tags/0.2.0.2/kernel/arch/amd64/src/drivers
0,0 → 1,0
link ../../ia32/src/drivers
Property changes:
Added: svn:special
+*
\ No newline at end of property

 /tags/0.2.0.2/kernel/arch/amd64/src/context.S
 ,0 → 1,78
+#
+# Copyright (C) 2001-2004 Jakub Jermar
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# - Redistributions of source code must retain the above copyright
+#   notice, this list of conditions and the following disclaimer.
+# - Redistributions in binary form must reproduce the above copyright
+#   notice, this list of conditions and the following disclaimer in the
+#   documentation and/or other materials provided with the distribution.
+# - The name of the author may not be used to endorse or promote products
+#   derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+.text
+.global context_save_arch
+.global context_restore_arch
+#include <arch/context_offset.h>
+## Save current CPU context
+#
+# Save CPU context to context_t variable
+# pointed by the 1st argument. Returns 1 in EAX.
+#
+context_save_arch:
+    movq (%rsp), %rdx     # the caller's return %eip
+    # In %edi is passed 1st argument
+    movq %rdx, OFFSET_PC(%rdi)
+    movq %rsp, OFFSET_SP(%rdi)
+    movq %rbx, OFFSET_RBX(%rdi)
+    movq %rbp, OFFSET_RBP(%rdi)
+    movq %r12, OFFSET_R12(%rdi)
+    movq %r13, OFFSET_R13(%rdi)
+    movq %r14, OFFSET_R14(%rdi)
+    movq %r15, OFFSET_R15(%rdi)
+    xorq %rax,%rax      # context_save returns 1
+    incq %rax
+    ret
+## Restore current CPU context
+#
+# Restore CPU context from context_t variable
+# pointed by the 1st argument. Returns 0 in EAX.
+#
+context_restore_arch:
+    movq OFFSET_R15(%rdi), %r15
+    movq OFFSET_R14(%rdi), %r14
+    movq OFFSET_R13(%rdi), %r13
+    movq OFFSET_R12(%rdi), %r12
+    movq OFFSET_RBP(%rdi), %rbp
+    movq OFFSET_RBX(%rdi), %rbx
+    movq OFFSET_SP(%rdi), %rsp   # ctx->sp -> %rsp
+    movq OFFSET_PC(%rdi), %rdx
+    movq %rdx,(%rsp)
+    xorq %rax,%rax      # context_restore returns 0
+    ret

 /tags/0.2.0.2/kernel/arch/amd64/src/delay.S
 ,0 → 1,46
+#
+# Copyright (C) 2001-2004 Jakub Jermar
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# - Redistributions of source code must retain the above copyright
+#   notice, this list of conditions and the following disclaimer.
+# - Redistributions in binary form must reproduce the above copyright
+#   notice, this list of conditions and the following disclaimer in the
+#   documentation and/or other materials provided with the distribution.
+# - The name of the author may not be used to endorse or promote products
+#   derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+#
+# Micro second delay loop functions.
+#
+.text
+.global asm_delay_loop
+.global asm_fake_loop
+asm_delay_loop:
+:  dec %rdi
+    jnz 0b
+    ret
+asm_fake_loop:
+:  dec %rdi
+    jz 0b
+    ret

 /tags/0.2.0.2/kernel/arch/amd64/include/cpuid.h
 ,0 → 1,67
+/*
+ * Copyright (C) 2001-2004 Ondrej Palkovsky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/** @addtogroup amd64
+ * @{
+ */
+/** @file
+ */
+#ifndef __amd64_CPUID_H__
+#define __amd64_CPUID_H__
+#define AMD_CPUID_EXTENDED   0x80000001
+#define AMD_EXT_NOEXECUTE    20
+#define INTEL_CPUID_STANDARD 0x1
+#define INTEL_SSE2           26
+#define INTEL_FXSAVE         24
+#ifndef __ASM__
+#include <arch/types.h>
+struct cpu_info {
+    __u32 cpuid_eax;
+    __u32 cpuid_ebx;
+    __u32 cpuid_ecx;
+    __u32 cpuid_edx;
+} __attribute__ ((packed));
+extern int has_cpuid(void);
+extern void cpuid(__u32 cmd, cpu_info_t *info);
+extern __u64 rdtsc(void);
+#endif /* __ASM__ */
+#endif
+/** @}
+ */

 /tags/0.2.0.2/kernel/arch/amd64/include/cpu.h
 ,0 → 1,87
+/*
+ * Copyright (C) 2001-2004 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/** @addtogroup amd64
+ * @{
+ */
+/** @file
+ */
+#ifndef __amd64_CPU_H__
+#define __amd64_CPU_H__
+#define RFLAGS_IF       (1 << 9)
+#define RFLAGS_RF       (1 << 16)
+#define EFER_MSR_NUM    0xc0000080
+#define AMD_SCE_FLAG    0
+#define AMD_LME_FLAG    8
+#define AMD_LMA_FLAG    10
+#define AMD_FFXSR_FLAG  14
+#define AMD_NXE_FLAG    11
+/* MSR registers */
+#define AMD_MSR_STAR    0xc0000081
+#define AMD_MSR_LSTAR   0xc0000082
+#define AMD_MSR_SFMASK  0xc0000084
+#define AMD_MSR_FS      0xc0000100
+#define AMD_MSR_GS      0xc0000101
+#ifndef __ASM__
+#include <typedefs.h>
+#include <arch/pm.h>
+struct cpu_arch {
+    int vendor;
+    int family;
+    int model;
+    int stepping;
+    struct tss *tss;
+    count_t iomapver_copy;  /** Copy of TASK's I/O Permission bitmap generation count. */
+};
+struct star_msr {
+};
+struct lstar_msr {
+};
+extern void set_efer_flag(int flag);
+extern __u64 read_efer_flag(void);
+void cpu_setup_fpu(void);
+#endif /* __ASM__ */
+#endif
+/** @}
+ */

 /tags/0.2.0.2/kernel/arch/amd64/include/interrupt.h
 ,0 → 1,133
+/*
+ * Copyright (C) 2001-2004 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup amd64interrupt
+ * @{
+ */
+/** @file
+ */
+#ifndef __ia32_INTERRUPT_H__
+#define __ia32_INTERRUPT_H__
+#include <arch/types.h>
+#include <arch/pm.h>
+#define IVT_ITEMS       IDT_ITEMS
+#define EXC_COUNT   32
+#define IRQ_COUNT   16
+#define IVT_EXCBASE     0
+#define IVT_IRQBASE     (IVT_EXCBASE+EXC_COUNT)
+#define IVT_FREEBASE        (IVT_IRQBASE+IRQ_COUNT)
+#define IRQ_CLK     0
+#define IRQ_KBD     1
+#define IRQ_PIC1    2
+#define IRQ_PIC_SPUR    7
+/* this one must have four least significant bits set to ones */
+#define VECTOR_APIC_SPUR    (IVT_ITEMS-1)
+#if (((VECTOR_APIC_SPUR + 1)%16) || VECTOR_APIC_SPUR >= IVT_ITEMS)
+#error Wrong definition of VECTOR_APIC_SPUR
+#endif
+#define VECTOR_DEBUG            1
+#define VECTOR_PIC_SPUR     (IVT_IRQBASE+IRQ_PIC_SPUR)
+#define VECTOR_CLK      (IVT_IRQBASE+IRQ_CLK)
+#define VECTOR_KBD      (IVT_IRQBASE+IRQ_KBD)
+#define VECTOR_TLB_SHOOTDOWN_IPI    (IVT_FREEBASE+0)
+#define VECTOR_WAKEUP_IPI       (IVT_FREEBASE+1)
+#define VECTOR_DEBUG_IPI                (IVT_FREEBASE+2)
+/** This is passed to interrupt handlers */
+struct istate {
+    __u64 rax;
+    __u64 rbx;
+    __u64 rcx;
+    __u64 rdx;
+    __u64 rsi;
+    __u64 rdi;
+    __u64 r8;
+    __u64 r9;
+    __u64 r10;
+    __u64 r11;
+    __u64 r12;
+    __u64 r13;
+    __u64 r14;
+    __u64 r15;
+    __u64 rbp;
+    __u64 error_word;
+    __u64 rip;
+    __u64 cs;
+    __u64 rflags;
+    __u64 stack[]; /* Additional data on stack */
+};
+/** Return true if exception happened while in userspace */
+static inline int istate_from_uspace(istate_t *istate)
+{
+    return !(istate->rip & 0x8000000000000000);
+}
+static inline void istate_set_retaddr(istate_t *istate, __address retaddr)
+{
+    istate->rip = retaddr;
+}
+static inline __native istate_get_pc(istate_t *istate)
+{
+    return istate->rip;
+}
+extern void (* disable_irqs_function)(__u16 irqmask);
+extern void (* enable_irqs_function)(__u16 irqmask);
+extern void (* eoi_function)(void);
+extern void print_info_errcode(int n, istate_t *istate);
+extern void null_interrupt(int n, istate_t *istate);
+extern void gp_fault(int n, istate_t *istate);
+extern void nm_fault(int n, istate_t *istate);
+extern void ss_fault(int n, istate_t *istate);
+extern void page_fault(int n, istate_t *istate);
+extern void syscall(int n, istate_t *istate);
+extern void tlb_shootdown_ipi(int n, istate_t *istate);
+extern void trap_virtual_enable_irqs(__u16 irqmask);
+extern void trap_virtual_disable_irqs(__u16 irqmask);
+extern void trap_virtual_eoi(void);
+/* AMD64 - specific page handler */
+extern void ident_page_fault(int n, istate_t *istate);
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/amd64/include/context_offset.h
 ,0 → 1,14
+/* This file is automatically generated by gencontext.c. */
+#define OFFSET_SP  0x0
+#define OFFSET_PC  0x8
+#define OFFSET_RBX 0x10
+#define OFFSET_RBP 0x18
+#define OFFSET_R12 0x20
+#define OFFSET_R13 0x28
+#define OFFSET_R14 0x30
+#define OFFSET_R15 0x38
+#define OFFSET_IPL 0x40
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/amd64/include/byteorder.h
 ,0 → 1,46
+/*
+ * Copyright (C) 2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup amd64
+ * @{
+ */
+/** @file
+ */
+#ifndef __amd64_BYTEORDER_H__
+#define __amd64_BYTEORDER_H__
+/* AMD64 is little-endian */
+#define __native_le2host(n)     (n)
+#define __u64_le2host(n)        (n)
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/amd64/include/types.h
 ,0 → 1,65
+/*
+ * Copyright (C) 2001-2004 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup amd64
+ * @{
+ */
+/** @file
+ */
+#ifndef __amd64_TYPES_H__
+#define __amd64_TYPES_H__
+#define NULL 0
+typedef signed char __s8;
+typedef signed short __s16;
+typedef signed int __s32;
+typedef signed long long __s64;
+typedef unsigned char __u8;
+typedef unsigned short __u16;
+typedef unsigned int __u32;
+typedef unsigned long long __u64;
+typedef __u64 __address;
+typedef __u64 pfn_t;
+/* Flags of processor (return value of interrupts_disable()) */
+typedef __u64 ipl_t;
+typedef __u64 __native;
+typedef __s64 __snative;
+typedef struct page_specifier pte_t;
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/amd64/include/elf.h
 ,0 → 1,46
+/*
+ * Copyright (C) 2006 Sergey Bondari
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup amd64
+ * @{
+ */
+/** @file
+ */
+#ifndef __amd64_ELF_H__
+#define __amd64_ELF_H__
+#define ELF_MACHINE     EM_X86_64
+#define ELF_DATA_ENCODING   ELFDATA2LSB
+#define ELF_CLASS       ELFCLASS64
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/amd64/include/memstr.h
 ,0 → 1,146
+/*
+ * Copyright (C) 2005 Sergey Bondari
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup amd64
+ * @{
+ */
+/** @file
+ */
+#ifndef __amd64_MEMSTR_H__
+#define __amd64_MEMSTR_H__
+/** Copy memory
+ *
+ * Copy a given number of bytes (3rd argument)
+ * from the memory location defined by 2nd argument
+ * to the memory location defined by 1st argument.
+ * The memory areas cannot overlap.
+ *
+ * @param dst Destination
+ * @param src Source
+ * @param cnt Number of bytes
+ * @return Destination
+ */
+static inline void * memcpy(void * dst, const void * src, size_t cnt)
+{
+        __native d0, d1, d2;
+        __asm__ __volatile__(
+                "rep movsq\n\t"
+                "movq %4, %%rcx\n\t"
+                "andq $7, %%rcx\n\t"
+                "jz 1f\n\t"
+                "rep movsb\n\t"
+                "1:\n"
+                : "=&c" (d0), "=&D" (d1), "=&S" (d2)
+                : "0" ((__native)(cnt / 8)), "g" ((__native)cnt), "1" ((__native) dst), "2" ((__native) src)
+                : "memory");
+        return dst;
+}
+/** Compare memory regions for equality
+ *
+ * Compare a given number of bytes (3rd argument)
+ * at memory locations defined by 1st and 2nd argument
+ * for equality. If bytes are equal function returns 0.
+ *
+ * @param src Region 1
+ * @param dst Region 2
+ * @param cnt Number of bytes
+ * @return Zero if bytes are equal, non-zero otherwise
+ */
+static inline int memcmp(const void * src, const void * dst, size_t cnt)
+{
+    __native d0, d1, d2;
+    __native ret;
+    __asm__ (
+        "repe cmpsb\n\t"
+        "je 1f\n\t"
+        "movq %3, %0\n\t"
+        "addq $1, %0\n\t"
+        "1:\n"
+        : "=a" (ret), "=%S" (d0), "=&D" (d1), "=&c" (d2)
+        : "0" (0), "1" (src), "2" (dst), "3" ((__native)cnt)
+    );
+    return ret;
+}
+/** Fill memory with words
+ * Fill a given number of words (2nd argument)
+ * at memory defined by 1st argument with the
+ * word value defined by 3rd argument.
+ *
+ * @param dst Destination
+ * @param cnt Number of words
+ * @param x Value to fill
+ */
+static inline void memsetw(__address dst, size_t cnt, __u16 x)
+{
+    __native d0, d1;
+    __asm__ __volatile__ (
+        "rep stosw\n\t"
+        : "=&D" (d0), "=&c" (d1), "=a" (x)
+        : "0" (dst), "1" ((__native)cnt), "2" (x)
+        : "memory"
+    );
+}
+/** Fill memory with bytes
+ * Fill a given number of bytes (2nd argument)
+ * at memory defined by 1st argument with the
+ * word value defined by 3rd argument.
+ *
+ * @param dst Destination
+ * @param cnt Number of bytes
+ * @param x Value to fill
+ */
+static inline void memsetb(__address dst, size_t cnt, __u8 x)
+{
+    __native d0, d1;
+    __asm__ __volatile__ (
+        "rep stosb\n\t"
+        : "=&D" (d0), "=&c" (d1), "=a" (x)
+        : "0" (dst), "1" ((__native)cnt), "2" (x)
+        : "memory"
+    );
+}
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/amd64/include/arg.h
 ,0 → 1,44
+/*
+ * Copyright (C) 2005 Ondrej Palkovsky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup amd64
+ * @{
+ */
+/** @file
+ */
+#ifndef __amd64_ARG_H__
+#define __amd64_ARG_H__
+#include <stdarg.h>
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/amd64/include/ddi/ddi.h
 ,0 → 1,47
+/*
+ * Copyright (C) 2006 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup amd64ddi
+ * @{
+ */
+/**
+ * @file
+ * @brief   amd64 specific DDI declarations and macros.
+ */
+#ifndef __amd64_DDI_H__
+#define __amd64_DDI_H__
+extern void io_perm_bitmap_install(void);
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/amd64/include/syscall.h
 ,0 → 1,46
+/*
+ * Copyright (C) 2006 Ondrej Palkovsky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup amd64
+ * @{
+ */
+/** @file
+ */
+#ifndef __amd64_SYSCALL_H__
+#define __amd64_SYSCALL_H__
+#include <arch/types.h>
+extern void syscall_setup_cpu(void);
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/amd64/include/atomic.h
 ,0 → 1,130
+/*
+ * Copyright (C) 2001-2004 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup amd64
+ * @{
+ */
+/** @file
+ */
+#ifndef __amd64_ATOMIC_H__
+#define __amd64_ATOMIC_H__
+#include <arch/types.h>
+#include <arch/barrier.h>
+#include <preemption.h>
+#include <typedefs.h>
+static inline void atomic_inc(atomic_t *val) {
+#ifdef CONFIG_SMP
+    __asm__ volatile ("lock incq %0\n" : "=m" (val->count));
+#else
+    __asm__ volatile ("incq %0\n" : "=m" (val->count));
+#endif /* CONFIG_SMP */
+}
+static inline void atomic_dec(atomic_t *val) {
+#ifdef CONFIG_SMP
+    __asm__ volatile ("lock decq %0\n" : "=m" (val->count));
+#else
+    __asm__ volatile ("decq %0\n" : "=m" (val->count));
+#endif /* CONFIG_SMP */
+}
+static inline long atomic_postinc(atomic_t *val)
+{
+    long r = 1;
+    __asm__ volatile (
+        "lock xaddq %1, %0\n"
+        : "=m" (val->count), "+r" (r)
+    );
+    return r;
+}
+static inline long atomic_postdec(atomic_t *val)
+{
+    long r = -1;
+    __asm__ volatile (
+        "lock xaddq %1, %0\n"
+        : "=m" (val->count), "+r" (r)
+    );
+    return r;
+}
+#define atomic_preinc(val) (atomic_postinc(val)+1)
+#define atomic_predec(val) (atomic_postdec(val)-1)
+static inline __u64 test_and_set(atomic_t *val) {
+    __u64 v;
+    __asm__ volatile (
+        "movq $1, %0\n"
+        "xchgq %0, %1\n"
+        : "=r" (v),"=m" (val->count)
+    );
+    return v;
+}
+/** amd64 specific fast spinlock */
+static inline void atomic_lock_arch(atomic_t *val)
+{
+    __u64 tmp;
+    preemption_disable();
+    __asm__ volatile (
+        "0:;"
+#ifdef CONFIG_HT
+        "pause;"
+#endif
+        "mov %0, %1;"
+        "testq %1, %1;"
+        "jnz 0b;"       /* Lightweight looping on locked spinlock */
+        "incq %1;"      /* now use the atomic operation */
+        "xchgq %0, %1;"
+        "testq %1, %1;"
+        "jnz 0b;"
+                : "=m"(val->count),"=r"(tmp)
+        );
+    /*
+     * Prevent critical section code from bleeding out this way up.
+     */
+    CS_ENTER_BARRIER();
+}
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/amd64/include/pm.h
 ,0 → 1,199
+/*
+ * Copyright (C) 2001-2004 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup amd64
+ * @{
+ */
+/** @file
+ */
+#ifndef __amd64_PM_H__
+#define __amd64_PM_H__
+#ifndef __ASM__
+# include <arch/types.h>
+# include <typedefs.h>
+# include <arch/context.h>
+#endif
+#define IDT_ITEMS 64
+#define GDT_ITEMS 8
+#define NULL_DES    0
+/* Warning: Do not reorder next items, unless you look into syscall.c!!! */
+#define KTEXT_DES   1
+#define KDATA_DES   2
+#define UDATA_DES   3
+#define UTEXT_DES   4
+#define KTEXT32_DES     5
+/* EndOfWarning */
+#define TSS_DES     6
+#ifdef CONFIG_FB
+#define VESA_INIT_DES       8
+#define VESA_INIT_SEGMENT 0x8000
+#undef GDT_ITEMS
+#define GDT_ITEMS 9
+#endif /*CONFIG_FB*/
+#define gdtselector(des)    ((des)<<3)
+#define idtselector(des)        ((des)<<4)
+#define PL_KERNEL   0
+#define PL_USER     3
+#define AR_PRESENT  (1<<7)
+#define AR_DATA     (2<<3)
+#define AR_CODE     (3<<3)
+#define AR_WRITABLE (1<<1)
+#define AR_READABLE     (1<<1)
+#define AR_TSS      (0x9)
+#define AR_INTERRUPT    (0xe)
+#define AR_TRAP         (0xf)
+#define DPL_KERNEL  (PL_KERNEL<<5)
+#define DPL_USER    (PL_USER<<5)
+#define TSS_BASIC_SIZE  104
+#define TSS_IOMAP_SIZE  (16*1024+1) /* 16K for bitmap + 1 terminating byte for convenience */
+#define IO_PORTS    (64*1024)
+#ifndef __ASM__
+struct descriptor {
+    unsigned limit_0_15: 16;
+    unsigned base_0_15: 16;
+    unsigned base_16_23: 8;
+    unsigned access: 8;
+    unsigned limit_16_19: 4;
+    unsigned available: 1;
+    unsigned longmode: 1;
+    unsigned special: 1;
+    unsigned granularity : 1;
+    unsigned base_24_31: 8;
+} __attribute__ ((packed));
+typedef struct descriptor descriptor_t;
+struct tss_descriptor {
+    unsigned limit_0_15: 16;
+    unsigned base_0_15: 16;
+    unsigned base_16_23: 8;
+    unsigned type: 4;
+    unsigned : 1;
+    unsigned dpl : 2;
+    unsigned present : 1;
+    unsigned limit_16_19: 4;
+    unsigned available: 1;
+    unsigned : 2;
+    unsigned granularity : 1;
+    unsigned base_24_31: 8;
+    unsigned base_32_63 : 32;
+    unsigned  : 32;
+} __attribute__ ((packed));
+typedef struct tss_descriptor tss_descriptor_t;
+struct idescriptor {
+    unsigned offset_0_15: 16;
+    unsigned selector: 16;
+    unsigned ist:3;
+    unsigned unused: 5;
+    unsigned type: 5;
+    unsigned dpl: 2;
+    unsigned present : 1;
+    unsigned offset_16_31: 16;
+    unsigned offset_32_63: 32;
+    unsigned  : 32;
+} __attribute__ ((packed));
+typedef struct idescriptor idescriptor_t;
+struct ptr_16_64 {
+    __u16 limit;
+    __u64 base;
+} __attribute__ ((packed));
+typedef struct ptr_16_64 ptr_16_64_t;
+struct ptr_16_32 {
+    __u16 limit;
+    __u32 base;
+} __attribute__ ((packed));
+typedef struct ptr_16_32 ptr_16_32_t;
+struct tss {
+    __u32 reserve1;
+    __u64 rsp0;
+    __u64 rsp1;
+    __u64 rsp2;
+    __u64 reserve2;
+    __u64 ist1;
+    __u64 ist2;
+    __u64 ist3;
+    __u64 ist4;
+    __u64 ist5;
+    __u64 ist6;
+    __u64 ist7;
+    __u64 reserve3;
+    __u16 reserve4;
+    __u16 iomap_base;
+    __u8 iomap[TSS_IOMAP_SIZE];
+} __attribute__ ((packed));
+typedef struct tss tss_t;
+extern tss_t *tss_p;
+extern descriptor_t gdt[];
+extern idescriptor_t idt[];
+extern ptr_16_64_t gdtr;
+extern ptr_16_32_t bootstrap_gdtr;
+extern ptr_16_32_t protected_ap_gdtr;
+extern void pm_init(void);
+extern void gdt_tss_setbase(descriptor_t *d, __address base);
+extern void gdt_tss_setlimit(descriptor_t *d, __u32 limit);
+extern void idt_init(void);
+extern void idt_setoffset(idescriptor_t *d, __address offset);
+extern void tss_initialize(tss_t *t);
+#endif /* __ASM__ */
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/amd64/include/boot/boot.h
 ,0 → 1,51
+/*
+ * Copyright (C) 2005 Ondrej Palkovsky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup amd64
+ * @{
+ */
+/** @file
+ */
+#ifndef __amd64_BOOT_H__
+#define __amd64_BOOT_H__
+#define BOOT_OFFSET         0x108000
+#define AP_BOOT_OFFSET      0x8000
+#define BOOT_STACK_SIZE 0x400
+#define MULTIBOOT_HEADER_MAGIC  0x1BADB002
+#define MULTIBOOT_HEADER_FLAGS  0x00010003
+#define MULTIBOOT_LOADER_MAGIC  0x2BADB002
+#endif
+ /** @}
+ */

/tags/0.2.0.2/kernel/arch/amd64/include/boot/memmap.h
0,0 → 1,0
link ../../../ia32/include/boot/memmap.h
Property changes:
Added: svn:special
+*
\ No newline at end of property

 /tags/0.2.0.2/kernel/arch/amd64/include/arch.h
 ,0 → 1,42
+/*
+ * Copyright (C) 2005 Ondrej Palkovsky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup amd64
+ * @{
+ */
+/** @file
+ */
+#ifndef __amd64_ARCH_H__
+#define __amd64_ARCH_H__
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/amd64/include/proc/task.h
 ,0 → 1,51
+/*
+ * Copyright (C) 2006 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup amd64proc
+ * @{
+ */
+/** @file
+ */
+#ifndef __amd64_TASK_H__
+#define __amd64_TASK_H__
+#include <typedefs.h>
+#include <arch/types.h>
+#include <adt/bitmap.h>
+typedef struct {
+    count_t iomapver;   /**< I/O Permission bitmap Generation counter. */
+    bitmap_t iomap;     /**< I/O Permission bitmap. */
+} task_arch_t;
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/amd64/include/proc/thread.h
 ,0 → 1,48
+/*
+ * Copyright (C) 2005 Ondrej Palkovsky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup amd64proc
+ * @{
+ */
+/** @file
+ */
+#ifndef __amd64_THREAD_H__
+#define __amd64_THREAD_H__
+#include <arch/types.h>
+typedef struct {
+    __native tls;
+} thread_arch_t;
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/amd64/include/asm.h
 ,0 → 1,285
+/*
+ * Copyright (C) 2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup amd64
+ * @{
+ */
+/** @file
+ */
+#ifndef __amd64_ASM_H__
+#define __amd64_ASM_H__
+#include <arch/pm.h>
+#include <arch/types.h>
+#include <config.h>
+extern void asm_delay_loop(__u32 t);
+extern void asm_fake_loop(__u32 t);
+/** Return base address of current stack.
+ *
+ * Return the base address of the current stack.
+ * The stack is assumed to be STACK_SIZE bytes long.
+ * The stack must start on page boundary.
+ */
+static inline __address get_stack_base(void)
+{
+    __address v;
+    __asm__ volatile ("andq %%rsp, %0\n" : "=r" (v) : "0" (~((__u64)STACK_SIZE-1)));
+    return v;
+}
+static inline void cpu_sleep(void) { __asm__ volatile ("hlt\n"); };
+static inline void cpu_halt(void) { __asm__ volatile ("hlt\n"); };
+/** Byte from port
+ *
+ * Get byte from port
+ *
+ * @param port Port to read from
+ * @return Value read
+ */
+static inline __u8 inb(__u16 port) { __u8 val; __asm__ volatile ("inb %w1, %b0 \n" : "=a" (val) : "d" (port) ); return val; }
+/** Byte to port
+ *
+ * Output byte to port
+ *
+ * @param port Port to write to
+ * @param val Value to write
+ */
+static inline void outb(__u16 port, __u8 val) { __asm__ volatile ("outb %b0, %w1\n" : : "a" (val), "d" (port) ); }
+/** Swap Hidden part of GS register with visible one */
+static inline void swapgs(void) { __asm__ volatile("swapgs"); }
+/** Enable interrupts.
+ *
+ * Enable interrupts and return previous
+ * value of EFLAGS.
+ *
+ * @return Old interrupt priority level.
+ */
+static inline ipl_t interrupts_enable(void) {
+    ipl_t v;
+    __asm__ volatile (
+        "pushfq\n"
+        "popq %0\n"
+        "sti\n"
+        : "=r" (v)
+    );
+    return v;
+}
+/** Disable interrupts.
+ *
+ * Disable interrupts and return previous
+ * value of EFLAGS.
+ *
+ * @return Old interrupt priority level.
+ */
+static inline ipl_t interrupts_disable(void) {
+    ipl_t v;
+    __asm__ volatile (
+        "pushfq\n"
+        "popq %0\n"
+        "cli\n"
+        : "=r" (v)
+        );
+    return v;
+}
+/** Restore interrupt priority level.
+ *
+ * Restore EFLAGS.
+ *
+ * @param ipl Saved interrupt priority level.
+ */
+static inline void interrupts_restore(ipl_t ipl) {
+    __asm__ volatile (
+        "pushq %0\n"
+        "popfq\n"
+        : : "r" (ipl)
+        );
+}
+/** Return interrupt priority level.
+ *
+ * Return EFLAFS.
+ *
+ * @return Current interrupt priority level.
+ */
+static inline ipl_t interrupts_read(void) {
+    ipl_t v;
+    __asm__ volatile (
+        "pushfq\n"
+        "popq %0\n"
+        : "=r" (v)
+    );
+    return v;
+}
+/** Write to MSR */
+static inline void write_msr(__u32 msr, __u64 value)
+{
+    __asm__ volatile (
+        "wrmsr;" : : "c" (msr),
+        "a" ((__u32)(value)),
+        "d" ((__u32)(value >> 32))
+        );
+}
+static inline __native read_msr(__u32 msr)
+{
+    __u32 ax, dx;
+    __asm__ volatile (
+        "rdmsr;" : "=a"(ax), "=d"(dx) : "c" (msr)
+        );
+    return ((__u64)dx << 32) | ax;
+}
+/** Enable local APIC
+ *
+ * Enable local APIC in MSR.
+ */
+static inline void enable_l_apic_in_msr()
+{
+    __asm__ volatile (
+        "movl $0x1b, %%ecx\n"
+        "rdmsr\n"
+        "orl $(1<<11),%%eax\n"
+        "orl $(0xfee00000),%%eax\n"
+        "wrmsr\n"
+        :
+        :
+        :"%eax","%ecx","%edx"
+        );
+}
+static inline __address * get_ip()
+{
+    __address *ip;
+    __asm__ volatile (
+        "mov %%rip, %0"
+        : "=r" (ip)
+        );
+    return ip;
+}
+/** Invalidate TLB Entry.
+ *
+ * @param addr Address on a page whose TLB entry is to be invalidated.
+ */
+static inline void invlpg(__address addr)
+{
+    __asm__ volatile ("invlpg %0\n" :: "m" (*((__native *)addr)));
+}
+/** Load GDTR register from memory.
+ *
+ * @param gdtr_reg Address of memory from where to load GDTR.
+ */
+static inline void gdtr_load(struct ptr_16_64 *gdtr_reg)
+{
+    __asm__ volatile ("lgdtq %0\n" : : "m" (*gdtr_reg));
+}
+/** Store GDTR register to memory.
+ *
+ * @param gdtr_reg Address of memory to where to load GDTR.
+ */
+static inline void gdtr_store(struct ptr_16_64 *gdtr_reg)
+{
+    __asm__ volatile ("sgdtq %0\n" : : "m" (*gdtr_reg));
+}
+/** Load IDTR register from memory.
+ *
+ * @param idtr_reg Address of memory from where to load IDTR.
+ */
+static inline void idtr_load(struct ptr_16_64 *idtr_reg)
+{
+    __asm__ volatile ("lidtq %0\n" : : "m" (*idtr_reg));
+}
+/** Load TR from descriptor table.
+ *
+ * @param sel Selector specifying descriptor of TSS segment.
+ */
+static inline void tr_load(__u16 sel)
+{
+    __asm__ volatile ("ltr %0" : : "r" (sel));
+}
+#define GEN_READ_REG(reg) static inline __native read_ ##reg (void) \
+    { \
+    __native res; \
+    __asm__ volatile ("movq %%" #reg ", %0" : "=r" (res) ); \
+    return res; \
+    }
+#define GEN_WRITE_REG(reg) static inline void write_ ##reg (__native regn) \
+    { \
+    __asm__ volatile ("movq %0, %%" #reg : : "r" (regn)); \
+    }
+GEN_READ_REG(cr0);
+GEN_READ_REG(cr2);
+GEN_READ_REG(cr3);
+GEN_WRITE_REG(cr3);
+GEN_READ_REG(dr0);
+GEN_READ_REG(dr1);
+GEN_READ_REG(dr2);
+GEN_READ_REG(dr3);
+GEN_READ_REG(dr6);
+GEN_READ_REG(dr7);
+GEN_WRITE_REG(dr0);
+GEN_WRITE_REG(dr1);
+GEN_WRITE_REG(dr2);
+GEN_WRITE_REG(dr3);
+GEN_WRITE_REG(dr6);
+GEN_WRITE_REG(dr7);
+extern size_t interrupt_handler_size;
+extern void interrupt_handlers(void);
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/amd64/include/faddr.h
 ,0 → 1,46
+/*
+ * Copyright (C) 2005 Ondrej Palkovsky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup amd64
+ * @{
+ */
+/** @file
+ */
+#ifndef __amd64_FADDR_H__
+#define __amd64_FADDR_H__
+#include <arch/types.h>
+#define FADDR(fptr)     ((__address) (fptr))
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/amd64/include/mm/frame.h
 ,0 → 1,55
+/*
+ * Copyright (C) 2005 Ondrej Palkovsky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup amd64mm
+ * @{
+ */
+/** @file
+ */
+#ifndef __amd64_FRAME_H__
+#define __amd64_FRAME_H__
+#ifndef __ASM__
+#include <arch/types.h>
+#endif /* __ASM__ */
+#define FRAME_WIDTH     12  /* 4K */
+#define FRAME_SIZE      (1<<FRAME_WIDTH)
+#ifndef __ASM__
+extern __address last_frame;
+extern void frame_arch_init(void);
+#endif /* __ASM__ */
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/amd64/include/mm/page.h
 ,0 → 1,202
+/*
+ * Copyright (C) 2005 Ondrej Palkovsky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup amd64mm
+ * @{
+ */
+/** @file
+ */
+/** Paging on AMD64
+ *
+ * The space is divided in positive numbers - userspace and
+ * negative numbers - kernel space. The 'negative' space starting
+ * with 0xffff800000000000 and ending with 0xffffffff80000000
+ * (-2GB) is identically mapped physical memory. The area
+ * (0xffffffff80000000 ... 0xffffffffffffffff is again identically
+ * mapped first 2GB.
+ *
+ * ATTENTION - PA2KA(KA2PA(x)) != x if 'x' is in kernel
+ */
+#ifndef __amd64_PAGE_H__
+#define __amd64_PAGE_H__
+#include <arch/mm/frame.h>
+#define PAGE_WIDTH  FRAME_WIDTH
+#define PAGE_SIZE   FRAME_SIZE
+#ifdef KERNEL
+#ifndef __ASM__
+#  include <mm/page.h>
+#  include <arch/types.h>
+#endif
+#ifndef __ASM__
+static inline __address ka2pa(__address x)
+{
+    if (x > 0xffffffff80000000)
+        return x - 0xffffffff80000000;
+    else
+        return x - 0xffff800000000000;
+}
+# define KA2PA(x)      ka2pa((__address)x)
+# define PA2KA_CODE(x)      (((__address) (x)) + 0xffffffff80000000)
+# define PA2KA(x)      (((__address) (x)) + 0xffff800000000000)
+#else
+# define KA2PA(x)      ((x) - 0xffffffff80000000)
+# define PA2KA(x)      ((x) + 0xffffffff80000000)
+#endif
+#define PTL0_ENTRIES_ARCH   512
+#define PTL1_ENTRIES_ARCH   512
+#define PTL2_ENTRIES_ARCH   512
+#define PTL3_ENTRIES_ARCH   512
+#define PTL0_INDEX_ARCH(vaddr)  (((vaddr)>>39)&0x1ff)
+#define PTL1_INDEX_ARCH(vaddr)  (((vaddr)>>30)&0x1ff)
+#define PTL2_INDEX_ARCH(vaddr)  (((vaddr)>>21)&0x1ff)
+#define PTL3_INDEX_ARCH(vaddr)  (((vaddr)>>12)&0x1ff)
+#define GET_PTL1_ADDRESS_ARCH(ptl0, i)      ((pte_t *) ((((__u64) ((pte_t *)(ptl0))[(i)].addr_12_31)<<12) | (((__u64) ((pte_t *)(ptl0))[(i)].addr_32_51)<<32 )))
+#define GET_PTL2_ADDRESS_ARCH(ptl1, i)      ((pte_t *) ((((__u64) ((pte_t *)(ptl1))[(i)].addr_12_31)<<12) | (((__u64) ((pte_t *)(ptl1))[(i)].addr_32_51)<<32 )))
+#define GET_PTL3_ADDRESS_ARCH(ptl2, i)      ((pte_t *) ((((__u64) ((pte_t *)(ptl2))[(i)].addr_12_31)<<12) | (((__u64) ((pte_t *)(ptl2))[(i)].addr_32_51)<<32 )))
+#define GET_FRAME_ADDRESS_ARCH(ptl3, i)     ((__address *) ((((__u64) ((pte_t *)(ptl3))[(i)].addr_12_31)<<12) | (((__u64) ((pte_t *)(ptl3))[(i)].addr_32_51)<<32 )))
+#define SET_PTL0_ADDRESS_ARCH(ptl0)     (write_cr3((__address) (ptl0)))
+#define SET_PTL1_ADDRESS_ARCH(ptl0, i, a)   set_pt_addr((pte_t *)(ptl0), (index_t)(i), a)
+#define SET_PTL2_ADDRESS_ARCH(ptl1, i, a)       set_pt_addr((pte_t *)(ptl1), (index_t)(i), a)
+#define SET_PTL3_ADDRESS_ARCH(ptl2, i, a)       set_pt_addr((pte_t *)(ptl2), (index_t)(i), a)
+#define SET_FRAME_ADDRESS_ARCH(ptl3, i, a)  set_pt_addr((pte_t *)(ptl3), (index_t)(i), a)
+#define GET_PTL1_FLAGS_ARCH(ptl0, i)        get_pt_flags((pte_t *)(ptl0), (index_t)(i))
+#define GET_PTL2_FLAGS_ARCH(ptl1, i)        get_pt_flags((pte_t *)(ptl1), (index_t)(i))
+#define GET_PTL3_FLAGS_ARCH(ptl2, i)        get_pt_flags((pte_t *)(ptl2), (index_t)(i))
+#define GET_FRAME_FLAGS_ARCH(ptl3, i)       get_pt_flags((pte_t *)(ptl3), (index_t)(i))
+#define SET_PTL1_FLAGS_ARCH(ptl0, i, x)     set_pt_flags((pte_t *)(ptl0), (index_t)(i), (x))
+#define SET_PTL2_FLAGS_ARCH(ptl1, i, x)         set_pt_flags((pte_t *)(ptl1), (index_t)(i), (x))
+#define SET_PTL3_FLAGS_ARCH(ptl2, i, x)         set_pt_flags((pte_t *)(ptl2), (index_t)(i), (x))
+#define SET_FRAME_FLAGS_ARCH(ptl3, i, x)    set_pt_flags((pte_t *)(ptl3), (index_t)(i), (x))
+#define PTE_VALID_ARCH(p)           (*((__u64 *) (p)) != 0)
+#define PTE_PRESENT_ARCH(p)         ((p)->present != 0)
+#define PTE_GET_FRAME_ARCH(p)           ((((__address)(p)->addr_12_31)<<12) | ((__address)(p)->addr_32_51<<32))
+#define PTE_WRITABLE_ARCH(p)            ((p)->writeable != 0)
+#define PTE_EXECUTABLE_ARCH(p)          ((p)->no_execute == 0)
+#ifndef __ASM__
+/* Page fault error codes. */
+/** When bit on this position is 0, the page fault was caused by a not-present page. */
+#define PFERR_CODE_P            (1<<0)
+/** When bit on this position is 1, the page fault was caused by a write. */
+#define PFERR_CODE_RW           (1<<1)
+/** When bit on this position is 1, the page fault was caused in user mode. */
+#define PFERR_CODE_US           (1<<2)
+/** When bit on this position is 1, a reserved bit was set in page directory. */
+#define PFERR_CODE_RSVD         (1<<3)
+/** When bit on this position os 1, the page fault was caused during instruction fecth. */
+#define PFERR_CODE_ID       (1<<4)
+/** Page Table Entry. */
+struct page_specifier {
+    unsigned present : 1;
+    unsigned writeable : 1;
+    unsigned uaccessible : 1;
+    unsigned page_write_through : 1;
+    unsigned page_cache_disable : 1;
+    unsigned accessed : 1;
+    unsigned dirty : 1;
+    unsigned unused: 1;
+    unsigned global : 1;
+    unsigned soft_valid : 1;        /**< Valid content even if present bit is cleared. */
+    unsigned avl : 2;
+    unsigned addr_12_31 : 30;
+    unsigned addr_32_51 : 21;
+    unsigned no_execute : 1;
+} __attribute__ ((packed));
+static inline int get_pt_flags(pte_t *pt, index_t i)
+{
+    pte_t *p = &pt[i];
+    return (
+        (!p->page_cache_disable)<<PAGE_CACHEABLE_SHIFT |
+        (!p->present)<<PAGE_PRESENT_SHIFT |
+        p->uaccessible<<PAGE_USER_SHIFT |
+<<PAGE_READ_SHIFT |
+        p->writeable<<PAGE_WRITE_SHIFT |
+        (!p->no_execute)<<PAGE_EXEC_SHIFT |
+        p->global<<PAGE_GLOBAL_SHIFT
+    );
+}
+static inline void set_pt_addr(pte_t *pt, index_t i, __address a)
+{
+    pte_t *p = &pt[i];
+    p->addr_12_31 = (a >> 12) & 0xfffff;
+    p->addr_32_51 = a >> 32;
+}
+static inline void set_pt_flags(pte_t *pt, index_t i, int flags)
+{
+    pte_t *p = &pt[i];
+    p->page_cache_disable = !(flags & PAGE_CACHEABLE);
+    p->present = !(flags & PAGE_NOT_PRESENT);
+    p->uaccessible = (flags & PAGE_USER) != 0;
+    p->writeable = (flags & PAGE_WRITE) != 0;
+    p->no_execute = (flags & PAGE_EXEC) == 0;
+    p->global = (flags & PAGE_GLOBAL) != 0;
+    /*
+     * Ensure that there is at least one bit set even if the present bit is cleared.
+     */
+    p->soft_valid = 1;
+}
+extern void page_arch_init(void);
+#endif /* __ASM__ */
+#endif /* KERNEL */
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/amd64/include/mm/ptl.h
 ,0 → 1,53
+/*
+ * Copyright (C) 2005 Ondrej Palkovsky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup amd64mm
+ * @{
+ */
+/** @file
+ */
+#ifndef __amd64_PTL_H_
+#define __amd64_PTL_H_
+#define PTL_NO_EXEC       (1<<63)
+#define PTL_ACCESSED      (1<<5)
+#define PTL_CACHE_DISABLE (1<<4)
+#define PTL_CACHE_THROUGH (1<<3)
+#define PTL_USER          (1<<2)
+#define PTL_WRITABLE      (1<<1)
+#define PTL_PRESENT       1
+#define PTL_2MB_PAGE      (1<<7)
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/amd64/include/mm/tlb.h
 ,0 → 1,45
+/*
+ * Copyright (C) 2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup amd64mm
+ * @{
+ */
+/** @file
+ */
+#ifndef __amd64_TLB_H__
+#define __amd64_TLB_H__
+#define tlb_arch_init()
+#define tlb_print()
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/amd64/include/mm/as.h
 ,0 → 1,55
+/*
+ * Copyright (C) 2005 Ondrej Palkovsky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup amd64mm
+ * @{
+ */
+/** @file
+ */
+#ifndef __amd64_AS_H__
+#define __amd64_AS_H__
+#define KERNEL_ADDRESS_SPACE_SHADOWED_ARCH  0
+#define KERNEL_ADDRESS_SPACE_START_ARCH     (unsigned long) 0xffff800000000000
+#define KERNEL_ADDRESS_SPACE_END_ARCH       (unsigned long) 0xffffffffffffffff
+#define USER_ADDRESS_SPACE_START_ARCH       (unsigned long) 0x0000000000000000
+#define USER_ADDRESS_SPACE_END_ARCH     (unsigned long) 0x00007fffffffffff
+#define USTACK_ADDRESS_ARCH (USER_ADDRESS_SPACE_END_ARCH-(PAGE_SIZE-1))
+#define as_install_arch(as)
+extern void as_arch_init(void);
+#endif
+ /** @}
+ */

/tags/0.2.0.2/kernel/arch/amd64/include/mm/asid.h
0,0 → 1,0
link ../../../ia32/include/mm/asid.h
Property changes:
Added: svn:special
+*
\ No newline at end of property

/tags/0.2.0.2/kernel/arch/amd64/include/mm/memory_init.h
0,0 → 1,0
link ../../../ia32/include/mm/memory_init.h
Property changes:
Added: svn:special
+*
\ No newline at end of property

 /tags/0.2.0.2/kernel/arch/amd64/include/debugger.h
 ,0 → 1,58
+/*
+ * Copyright (C) 2006 Ondrej Palkovsky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup amd64debug
+ * @{
+ */
+/** @file
+ */
+#ifndef __amd64_DEBUGGER_H__
+#define __amd64_DEBUGGER_H__
+#include <arch/types.h>
+#define BKPOINTS_MAX 4
+/* Flags that are passed to breakpoint_add function */
+#define BKPOINT_INSTR        0x1
+#define BKPOINT_WRITE        0x2
+#define BKPOINT_READ_WRITE   0x4
+#define BKPOINT_CHECK_ZERO   0x8
+extern void debugger_init(void);
+extern int breakpoint_add(void * where, int flags, int curidx);
+extern void breakpoint_del(int slot);
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/amd64/include/context.h
 ,0 → 1,71
+/*
+ * Copyright (C) 2005 Ondrej Palkovsky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup amd64
+ * @{
+ */
+/** @file
+ */
+#ifndef __amd64_CONTEXT_H__
+#define __amd64_CONTEXT_H__
+#ifndef __amd64_TYPES_H__
+#  include <arch/types.h>
+#endif
+/* According to ABI the stack MUST be aligned on
+ * 16-byte boundary. If it is not, the va_arg calling will
+ * panic sooner or later
+ */
+#define SP_DELTA     16
+/* We include only registers that must be preserved
+ * during function call
+ */
+struct context {
+    __address sp;
+    __address pc;
+    __u64 rbx;
+    __u64 rbp;
+    __u64 r12;
+    __u64 r13;
+    __u64 r14;
+    __u64 r15;
+    ipl_t ipl;
+} __attribute__ ((packed));
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/amd64/include/drivers/vesa.h
 ,0 → 1,47
+/*
+ * Copyright (C) 2006-2006 Jakub Vana
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup amd64
+ * @{
+ */
+/** @file
+ */
+#ifndef __VESA_H__
+#define __VESA_H__
+int vesa_present(void);
+void vesa_init(void);
+#endif
+ /** @}
+ */

/tags/0.2.0.2/kernel/arch/amd64/include/drivers/i8254.h
0,0 → 1,0
link ../../../ia32/include/drivers/i8254.h
Property changes:
Added: svn:special
+*
\ No newline at end of property

/tags/0.2.0.2/kernel/arch/amd64/include/drivers/i8259.h
0,0 → 1,0
link ../../../ia32/include/drivers/i8259.h
Property changes:
Added: svn:special
+*
\ No newline at end of property

/tags/0.2.0.2/kernel/arch/amd64/include/drivers/ega.h
0,0 → 1,0
link ../../../ia32/include/drivers/ega.h
Property changes:
Added: svn:special
+*
\ No newline at end of property

/tags/0.2.0.2/kernel/arch/amd64/include/drivers/i8042.h
0,0 → 1,0
link ../../../ia32/include/drivers/i8042.h
Property changes:
Added: svn:special
+*
\ No newline at end of property

/tags/0.2.0.2/kernel/arch/amd64/include/debug.h
0,0 → 1,0
link ../../ia32/include/debug.h
Property changes:
Added: svn:special
+*
\ No newline at end of property

/tags/0.2.0.2/kernel/arch/amd64/include/fpu_context.h
0,0 → 1,0
link ../../ia32/include/fpu_context.h
Property changes:
Added: svn:special
+*
\ No newline at end of property

/tags/0.2.0.2/kernel/arch/amd64/include/bios
0,0 → 1,0
link ../../ia32/include/bios
Property changes:
Added: svn:special
+*
\ No newline at end of property

/tags/0.2.0.2/kernel/arch/amd64/include/smp
0,0 → 1,0
link ../../ia32/include/smp
Property changes:
Added: svn:special
+*
\ No newline at end of property

/tags/0.2.0.2/kernel/arch/amd64/include/barrier.h
0,0 → 1,0
link ../../ia32/include/barrier.h
Property changes:
Added: svn:special
+*
\ No newline at end of property

 /tags/0.2.0.2/kernel/arch/amd64/Makefile.inc
 ,0 → 1,121
+#
+# Copyright (C) 2005 Martin Decky
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# - Redistributions of source code must retain the above copyright
+#   notice, this list of conditions and the following disclaimer.
+# - Redistributions in binary form must reproduce the above copyright
+#   notice, this list of conditions and the following disclaimer in the
+#   documentation and/or other materials provided with the distribution.
+# - The name of the author may not be used to endorse or promote products
+#   derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+## Toolchain configuration
+#
+BFD_NAME = elf64-x86-64
+BFD_ARCH = i386:x86-64
+BFD = binary
+TARGET = amd64-linux-gnu
+TOOLCHAIN_DIR = /usr/local/amd64/bin
+## Make some default assumptions
+#
+ifndef CPU
+    CPU = opteron
+endif
+CFLAGS += -fno-unwind-tables -m64 -mcmodel=kernel -mno-red-zone
+DEFS += -D_CPU=${CPU} -D__64_BITS__
+## Accepted CPUs
+#
+ifeq ($(CPU),opteron)
+    CFLAGS += -march=opteron
+    DEFS += -DFENCES=p4
+endif
+## Own configuration directives
+#
+CONFIG_ACPI = y
+## Compile with hierarchical page tables support.
+#
+CONFIG_PAGE_PT = y
+DEFS += -DCONFIG_PAGE_PT
+## Compile with i8042 support.
+#
+CONFIG_I8042 = y
+## Accepted configuration directives
+#
+ifeq ($(CONFIG_SMP),y)
+    DEFS += -DCONFIG_SMP
+endif
+ifeq ($(CONFIG_HT),y)
+    DEFS += -DCONFIG_HT
+endif
+ifeq ($(CONFIG_SIMICS_FIX),y)
+    DEFS += -DCONFIG_SIMICS_FIX
+endif
+ARCH_SOURCES = \
+    arch/$(ARCH)/src/fpu_context.c \
+    arch/$(ARCH)/src/boot/boot.S \
+    arch/$(ARCH)/src/pm.c \
+    arch/$(ARCH)/src/context.S \
+    arch/$(ARCH)/src/ddi/ddi.c \
+    arch/$(ARCH)/src/drivers/ega.c \
+    arch/$(ARCH)/src/drivers/vesa.c \
+    arch/$(ARCH)/src/drivers/i8254.c \
+    arch/$(ARCH)/src/drivers/i8259.c \
+    arch/$(ARCH)/src/delay.S \
+    arch/$(ARCH)/src/amd64.c \
+    arch/$(ARCH)/src/bios/bios.c \
+    arch/$(ARCH)/src/interrupt.c \
+    arch/$(ARCH)/src/mm/as.c \
+    arch/$(ARCH)/src/mm/frame.c \
+    arch/$(ARCH)/src/mm/page.c \
+    arch/$(ARCH)/src/mm/tlb.c \
+    arch/$(ARCH)/src/asm_utils.S \
+    arch/$(ARCH)/src/mm/memory_init.c \
+    arch/$(ARCH)/src/cpu/cpu.c \
+    arch/$(ARCH)/src/proc/scheduler.c \
+    arch/$(ARCH)/src/proc/task.c \
+    arch/$(ARCH)/src/proc/thread.c \
+    arch/$(ARCH)/src/userspace.c \
+    arch/$(ARCH)/src/syscall.c \
+    arch/$(ARCH)/src/debugger.c
+ifeq ($(CONFIG_SMP),y)
+    ARCH_SOURCES += \
+        arch/$(ARCH)/src/smp/ap.S \
+        arch/$(ARCH)/src/smp/apic.c \
+        arch/$(ARCH)/src/smp/ipi.c \
+        arch/$(ARCH)/src/smp/mps.c \
+        arch/$(ARCH)/src/smp/smp.c
+endif

 /tags/0.2.0.2/kernel/arch/amd64/_link.ld.in
 ,0 → 1,64
+/** AMD64 linker script
+ *
+ * umapped section:
+ *  kernel text
+ *  kernel data
+ * mapped section:
+ *  kernel text
+ *  kernel data
+ */
+#define __ASM__
+#include <arch/boot/boot.h>
+#include <arch/mm/page.h>
+SECTIONS {
+    .unmapped BOOT_OFFSET: AT (0) {
+        unmapped_ktext_start = .;
+        *(K_TEXT_START);
+        unmapped_ktext_end = .;
+        unmapped_kdata_start = .;
+        *(K_DATA_START);
+        unmapped_kdata_end = .;
+    }
+    .mapped (PA2KA(BOOT_OFFSET)+SIZEOF(.unmapped)) : AT (SIZEOF(.unmapped)) {
+        ktext_start = .;
+        *(.text);
+        ktext_end = .;
+        kdata_start = .;
+        *(.data);       /* initialized data */
+        *(.rodata*);        /* string literals */
+        hardcoded_load_address = .;
+        QUAD(PA2KA(BOOT_OFFSET));
+        hardcoded_ktext_size = .;
+        QUAD(ktext_end - ktext_start + (unmapped_ktext_end - unmapped_ktext_start));
+        hardcoded_kdata_size = .;
+        QUAD(kdata_end - kdata_start + (unmapped_kdata_end - unmapped_kdata_start));
+        hardcoded_unmapped_ktext_size = .;
+        QUAD(unmapped_ktext_end - unmapped_ktext_start);
+        hardcoded_unmapped_kdata_size = .;
+        QUAD(unmapped_kdata_end - unmapped_kdata_start);
+        *(COMMON);      /* global variables */
+        *(.eh_frame);
+        symbol_table = .;
+        *(symtab.*);            /* Symbol table, must be LAST symbol!*/
+        *(.bss);        /* uninitialized static variables */
+        kdata_end = .;
+    }
+#ifdef CONFIG_SMP
+    _hardcoded_unmapped_size = (unmapped_ktext_end - unmapped_ktext_start) + (unmapped_kdata_end - unmapped_kdata_start);
+    ap_boot = unmapped_ap_boot - BOOT_OFFSET + AP_BOOT_OFFSET;
+    ap_gdtr = unmapped_ap_gdtr - BOOT_OFFSET + AP_BOOT_OFFSET;
+    protected_ap_gdtr = PA2KA(ap_gdtr);
+#endif /* CONFIG_SMP */
+}

 /tags/0.2.0.2/kernel/arch/ia32/src/interrupt.c
 ,0 → 1,210
+/*
+ * Copyright (C) 2001-2004 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/** @addtogroup ia32interrupt
+ * @{
+ */
+/** @file
+ */
+#include <arch/interrupt.h>
+#include <syscall/syscall.h>
+#include <print.h>
+#include <debug.h>
+#include <panic.h>
+#include <arch/drivers/i8259.h>
+#include <func.h>
+#include <cpu.h>
+#include <arch/asm.h>
+#include <mm/tlb.h>
+#include <mm/as.h>
+#include <arch.h>
+#include <symtab.h>
+#include <proc/thread.h>
+#include <proc/task.h>
+#include <synch/spinlock.h>
+#include <arch/ddi/ddi.h>
+#include <ipc/sysipc.h>
+#include <interrupt.h>
+/*
+ * Interrupt and exception dispatching.
+ */
+void (* disable_irqs_function)(__u16 irqmask) = NULL;
+void (* enable_irqs_function)(__u16 irqmask) = NULL;
+void (* eoi_function)(void) = NULL;
+void PRINT_INFO_ERRCODE(istate_t *istate)
+{
+    char *symbol = get_symtab_entry(istate->eip);
+    if (!symbol)
+        symbol = "";
+    if (CPU)
+        printf("----------------EXCEPTION OCCURED (cpu%d)----------------\n", CPU->id);
+    else
+        printf("----------------EXCEPTION OCCURED----------------\n");
+    printf("%%eip: %#x (%s)\n",istate->eip,symbol);
+    printf("ERROR_WORD=%#x\n", istate->error_word);
+    printf("%%cs=%#x,flags=%#x\n", istate->cs, istate->eflags);
+    printf("%%eax=%#x, %%ecx=%#x, %%edx=%#x, %%esp=%#x\n",  istate->eax,istate->ecx,istate->edx,&istate->stack[0]);
+#ifdef CONFIG_DEBUG_ALLREGS
+    printf("%%esi=%#x, %%edi=%#x, %%ebp=%#x, %%ebx=%#x\n",  istate->esi,istate->edi,istate->ebp,istate->ebx);
+#endif
+    printf("stack: %#x, %#x, %#x, %#x\n", istate->stack[0], istate->stack[1], istate->stack[2], istate->stack[3]);
+    printf("       %#x, %#x, %#x, %#x\n", istate->stack[4], istate->stack[5], istate->stack[6], istate->stack[7]);
+}
+void null_interrupt(int n, istate_t *istate)
+{
+    fault_if_from_uspace(istate, "unserviced interrupt: %d", n);
+    PRINT_INFO_ERRCODE(istate);
+    panic("unserviced interrupt: %d\n", n);
+}
+/** General Protection Fault. */
+void gp_fault(int n, istate_t *istate)
+{
+    if (TASK) {
+        count_t ver;
+        spinlock_lock(&TASK->lock);
+        ver = TASK->arch.iomapver;
+        spinlock_unlock(&TASK->lock);
+        if (CPU->arch.iomapver_copy != ver) {
+            /*
+             * This fault can be caused by an early access
+             * to I/O port because of an out-dated
+             * I/O Permission bitmap installed on CPU.
+             * Install the fresh copy and restart
+             * the instruction.
+             */
+            io_perm_bitmap_install();
+            return;
+        }
+        fault_if_from_uspace(istate, "general protection fault");
+    }
+    PRINT_INFO_ERRCODE(istate);
+    panic("general protection fault\n");
+}
+void ss_fault(int n, istate_t *istate)
+{
+    fault_if_from_uspace(istate, "stack fault");
+    PRINT_INFO_ERRCODE(istate);
+    panic("stack fault\n");
+}
+void simd_fp_exception(int n, istate_t *istate)
+{
+    __u32 mxcsr;
+    asm
+    (
+        "stmxcsr %0;\n"
+        :"=m"(mxcsr)
+    );
+    fault_if_from_uspace(istate, "SIMD FP exception(19), MXCSR: %#zx",
+                 (__native)mxcsr);
+    PRINT_INFO_ERRCODE(istate);
+    printf("MXCSR: %#zx\n",(__native)(mxcsr));
+    panic("SIMD FP exception(19)\n");
+}
+void nm_fault(int n, istate_t *istate)
+{
+#ifdef CONFIG_FPU_LAZY
+    scheduler_fpu_lazy_request();
+#else
+    fault_if_from_uspace(istate, "fpu fault");
+    panic("fpu fault");
+#endif
+}
+void syscall(int n, istate_t *istate)
+{
+    panic("Obsolete syscall handler.");
+}
+void tlb_shootdown_ipi(int n, istate_t *istate)
+{
+    trap_virtual_eoi();
+    tlb_shootdown_ipi_recv();
+}
+void trap_virtual_enable_irqs(__u16 irqmask)
+{
+    if (enable_irqs_function)
+        enable_irqs_function(irqmask);
+    else
+        panic("no enable_irqs_function\n");
+}
+void trap_virtual_disable_irqs(__u16 irqmask)
+{
+    if (disable_irqs_function)
+        disable_irqs_function(irqmask);
+    else
+        panic("no disable_irqs_function\n");
+}
+void trap_virtual_eoi(void)
+{
+    if (eoi_function)
+        eoi_function();
+    else
+        panic("no eoi_function\n");
+}
+static void ipc_int(int n, istate_t *istate)
+{
+    ipc_irq_send_notif(n-IVT_IRQBASE);
+    trap_virtual_eoi();
+}
+/* Reregister irq to be IPC-ready */
+void irq_ipc_bind_arch(__native irq)
+{
+    if (irq == IRQ_CLK)
+        return;
+    exc_register(IVT_IRQBASE+irq, "ipc_int", ipc_int);
+    trap_virtual_enable_irqs(1 << irq);
+}
+/** @}
+ */

 /tags/0.2.0.2/kernel/arch/ia32/src/cpu/cpu.c
 ,0 → 1,166
+/*
+ * Copyright (C) 2001-2004 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/** @addtogroup ia32
+ * @{
+ */
+/** @file
+ */
+#include <arch/cpu.h>
+#include <arch/cpuid.h>
+#include <arch/pm.h>
+#include <arch.h>
+#include <arch/types.h>
+#include <print.h>
+#include <typedefs.h>
+#include <fpu_context.h>
+#include <arch/smp/apic.h>
+/*
+ * Identification of CPUs.
+ * Contains only non-MP-Specification specific SMP code.
+ */
+#define AMD_CPUID_EBX   0x68747541
+#define AMD_CPUID_ECX   0x444d4163
+#define AMD_CPUID_EDX   0x69746e65
+#define INTEL_CPUID_EBX 0x756e6547
+#define INTEL_CPUID_ECX 0x6c65746e
+#define INTEL_CPUID_EDX 0x49656e69
+enum vendor {
+    VendorUnknown=0,
+    VendorAMD,
+    VendorIntel
+};
+static char *vendor_str[] = {
+    "Unknown Vendor",
+    "AuthenticAMD",
+    "GenuineIntel"
+};
+void fpu_disable(void)
+{
+    __asm__ volatile (
+        "mov %%cr0,%%eax;"
+        "or $8,%%eax;"
+        "mov %%eax,%%cr0;"
+        :
+        :
+        :"%eax"
+    );
+}
+void fpu_enable(void)
+{
+    __asm__ volatile (
+        "mov %%cr0,%%eax;"
+        "and $0xffFFffF7,%%eax;"
+        "mov %%eax,%%cr0;"
+        :
+        :
+        :"%eax"
+    );
+}
+void cpu_arch_init(void)
+{
+    cpuid_feature_info fi;
+    cpuid_extended_feature_info efi;
+    cpu_info_t info;
+    __u32 help = 0;
+    CPU->arch.tss = tss_p;
+    CPU->arch.tss->iomap_base = &CPU->arch.tss->iomap[0] - ((__u8 *) CPU->arch.tss);
+    CPU->fpu_owner = NULL;
+    cpuid(1, &info);
+    fi.word = info.cpuid_edx;
+    efi.word = info.cpuid_ecx;
+    if (fi.bits.fxsr)
+        fpu_fxsr();
+    else
+        fpu_fsr();
+    if (fi.bits.sse) {
+        asm volatile (
+            "mov %%cr4,%0\n"
+            "or %1,%0\n"
+            "mov %0,%%cr4\n"
+            : "+r" (help)
+            : "i" (CR4_OSFXSR_MASK|(1<<10))
+        );
+    }
+}
+void cpu_identify(void)
+{
+    cpu_info_t info;
+    CPU->arch.vendor = VendorUnknown;
+    if (has_cpuid()) {
+        cpuid(0, &info);
+        /*
+         * Check for AMD processor.
+         */
+        if (info.cpuid_ebx==AMD_CPUID_EBX && info.cpuid_ecx==AMD_CPUID_ECX && info.cpuid_edx==AMD_CPUID_EDX) {
+            CPU->arch.vendor = VendorAMD;
+        }
+        /*
+         * Check for Intel processor.
+         */
+        if (info.cpuid_ebx==INTEL_CPUID_EBX && info.cpuid_ecx==INTEL_CPUID_ECX && info.cpuid_edx==INTEL_CPUID_EDX) {
+            CPU->arch.vendor = VendorIntel;
+        }
+        cpuid(1, &info);
+        CPU->arch.family = (info.cpuid_eax>>8)&0xf;
+        CPU->arch.model = (info.cpuid_eax>>4)&0xf;
+        CPU->arch.stepping = (info.cpuid_eax>>0)&0xf;
+    }
+}
+void cpu_print_report(cpu_t* m)
+{
+    printf("cpu%d: (%s family=%d model=%d stepping=%d) %dMHz\n",
+        m->id, vendor_str[m->arch.vendor], m->arch.family, m->arch.model, m->arch.stepping,
+        m->frequency_mhz);
+}
+/** @}
+ */

 /tags/0.2.0.2/kernel/arch/ia32/src/ddi/ddi.c
 ,0 → 1,165
+/*
+ * Copyright (C) 2006 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/** @addtogroup ia32ddi
+ * @{
+ */
+/** @file
+ */
+#include <ddi/ddi.h>
+#include <arch/ddi/ddi.h>
+#include <proc/task.h>
+#include <arch/types.h>
+#include <typedefs.h>
+#include <adt/bitmap.h>
+#include <mm/slab.h>
+#include <arch/pm.h>
+#include <errno.h>
+#include <arch/cpu.h>
+#include <cpu.h>
+#include <arch.h>
+#include <align.h>
+/** Enable I/O space range for task.
+ *
+ * Interrupts are disabled and task is locked.
+ *
+ * @param task Task.
+ * @param ioaddr Startign I/O space address.
+ * @param size Size of the enabled I/O range.
+ *
+ * @return 0 on success or an error code from errno.h.
+ */
+int ddi_iospace_enable_arch(task_t *task, __address ioaddr, size_t size)
+{
+    count_t bits;
+    bits = ioaddr + size;
+    if (bits > IO_PORTS)
+        return ENOENT;
+    if (task->arch.iomap.bits < bits) {
+        bitmap_t oldiomap;
+        __u8 *newmap;
+        /*
+         * The I/O permission bitmap is too small and needs to be grown.
+         */
+        newmap = (__u8 *) malloc(BITS2BYTES(bits), FRAME_ATOMIC);
+        if (!newmap)
+            return ENOMEM;
+        bitmap_initialize(&oldiomap, task->arch.iomap.map, task->arch.iomap.bits);
+        bitmap_initialize(&task->arch.iomap, newmap, bits);
+        /*
+         * Mark the new range inaccessible.
+         */
+        bitmap_set_range(&task->arch.iomap, oldiomap.bits, bits - oldiomap.bits);
+        /*
+         * In case there really existed smaller iomap,
+         * copy its contents and deallocate it.
+         */
+        if (oldiomap.bits) {
+            bitmap_copy(&task->arch.iomap, &oldiomap, oldiomap.bits);
+            free(oldiomap.map);
+        }
+    }
+    /*
+     * Enable the range and we are done.
+     */
+    bitmap_clear_range(&task->arch.iomap, (index_t) ioaddr, (count_t) size);
+    /*
+     * Increment I/O Permission bitmap generation counter.
+     */
+    task->arch.iomapver++;
+    return 0;
+}
+/** Install I/O Permission bitmap.
+ *
+ * Current task's I/O permission bitmap, if any, is installed
+ * in the current CPU's TSS.
+ *
+ * Interrupts must be disabled prior this call.
+ */
+void io_perm_bitmap_install(void)
+{
+    count_t bits;
+    ptr_16_32_t cpugdtr;
+    descriptor_t *gdt_p;
+    count_t ver;
+    /* First, copy the I/O Permission Bitmap. */
+    spinlock_lock(&TASK->lock);
+    ver = TASK->arch.iomapver;
+    if ((bits = TASK->arch.iomap.bits)) {
+        bitmap_t iomap;
+        ASSERT(TASK->arch.iomap.map);
+        bitmap_initialize(&iomap, CPU->arch.tss->iomap, TSS_IOMAP_SIZE * 8);
+        bitmap_copy(&iomap, &TASK->arch.iomap, TASK->arch.iomap.bits);
+        /*
+         * It is safe to set the trailing eight bits because of the extra
+         * convenience byte in TSS_IOMAP_SIZE.
+         */
+        bitmap_set_range(&iomap, ALIGN_UP(TASK->arch.iomap.bits, 8), 8);
+    }
+    spinlock_unlock(&TASK->lock);
+    /*
+     * Second, adjust TSS segment limit.
+     * Take the extra ending byte with all bits set into account.
+     */
+    gdtr_store(&cpugdtr);
+    gdt_p = (descriptor_t *) cpugdtr.base;
+    gdt_setlimit(&gdt_p[TSS_DES], TSS_BASIC_SIZE + BITS2BYTES(bits));
+    gdtr_load(&cpugdtr);
+    /*
+     * Before we load new TSS limit, the current TSS descriptor
+     * type must be changed to describe inactive TSS.
+     */
+    gdt_p[TSS_DES].access = AR_PRESENT | AR_TSS | DPL_KERNEL;
+    tr_load(selector(TSS_DES));
+    /*
+     * Update the generation count so that faults caused by
+     * early accesses can be serviced.
+     */
+    CPU->arch.iomapver_copy = ver;
+}
+/** @}
+ */

 /tags/0.2.0.2/kernel/arch/ia32/src/smp/apic.c
 ,0 → 1,582
+/*
+ * Copyright (C) 2001-2004 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup ia32
+ * @{
+ */
+/** @file
+ */
+#include <arch/types.h>
+#include <arch/smp/apic.h>
+#include <arch/smp/ap.h>
+#include <arch/smp/mps.h>
+#include <arch/boot/boot.h>
+#include <mm/page.h>
+#include <time/delay.h>
+#include <interrupt.h>
+#include <arch/interrupt.h>
+#include <print.h>
+#include <arch/asm.h>
+#include <arch.h>
+#ifdef CONFIG_SMP
+/*
+ * Advanced Programmable Interrupt Controller for SMP systems.
+ * Tested on:
+ *  Bochs 2.0.2 - Bochs 2.2.6 with 2-8 CPUs
+ *  Simics 2.0.28 - Simics 2.2.19 2-15 CPUs
+ *  VMware Workstation 5.5 with 2 CPUs
+ *  QEMU 0.8.0 with 2-15 CPUs
+ *  ASUS P/I-P65UP5 + ASUS C-P55T2D REV. 1.41 with 2x 200Mhz Pentium CPUs
+ *  ASUS PCH-DL with 2x 3000Mhz Pentium 4 Xeon (HT) CPUs
+ *  MSI K7D Master-L with 2x 2100MHz Athlon MP CPUs
+ */
+/*
+ * These variables either stay configured as initilalized, or are changed by
+ * the MP configuration code.
+ *
+ * Pay special attention to the volatile keyword. Without it, gcc -O2 would
+ * optimize the code too much and accesses to l_apic and io_apic, that must
+ * always be 32-bit, would use byte oriented instructions.
+ */
+volatile __u32 *l_apic = (__u32 *) 0xfee00000;
+volatile __u32 *io_apic = (__u32 *) 0xfec00000;
+__u32 apic_id_mask = 0;
+static int apic_poll_errors(void);
+#ifdef LAPIC_VERBOSE
+static char *delmod_str[] = {
+    "Fixed",
+    "Lowest Priority",
+    "SMI",
+    "Reserved",
+    "NMI",
+    "INIT",
+    "STARTUP",
+    "ExtInt"
+};
+static char *destmod_str[] = {
+    "Physical",
+    "Logical"
+};
+static char *trigmod_str[] = {
+    "Edge",
+    "Level"
+};
+static char *mask_str[] = {
+    "Unmasked",
+    "Masked"
+};
+static char *delivs_str[] = {
+    "Idle",
+    "Send Pending"
+};
+static char *tm_mode_str[] = {
+    "One-shot",
+    "Periodic"
+};
+static char *intpol_str[] = {
+    "Polarity High",
+    "Polarity Low"
+};
+#endif /* LAPIC_VERBOSE */
+static void apic_spurious(int n, istate_t *istate);
+static void l_apic_timer_interrupt(int n, istate_t *istate);
+/** Initialize APIC on BSP. */
+void apic_init(void)
+{
+    io_apic_id_t idreg;
+    int i;
+    exc_register(VECTOR_APIC_SPUR, "apic_spurious", (iroutine) apic_spurious);
+    enable_irqs_function = io_apic_enable_irqs;
+    disable_irqs_function = io_apic_disable_irqs;
+    eoi_function = l_apic_eoi;
+    /*
+     * Configure interrupt routing.
+     * IRQ 0 remains masked as the time signal is generated by l_apic's themselves.
+     * Other interrupts will be forwarded to the lowest priority CPU.
+     */
+    io_apic_disable_irqs(0xffff);
+    exc_register(VECTOR_CLK, "l_apic_timer", (iroutine) l_apic_timer_interrupt);
+    for (i = 0; i < IRQ_COUNT; i++) {
+        int pin;
+        if ((pin = smp_irq_to_pin(i)) != -1) {
+            io_apic_change_ioredtbl(pin, DEST_ALL, IVT_IRQBASE+i, LOPRI);
+        }
+    }
+    /*
+     * Ensure that io_apic has unique ID.
+     */
+    idreg.value = io_apic_read(IOAPICID);
+    if ((1<<idreg.apic_id) & apic_id_mask) {    /* see if IO APIC ID is used already */
+        for (i = 0; i < APIC_ID_COUNT; i++) {
+            if (!((1<<i) & apic_id_mask)) {
+                idreg.apic_id = i;
+                io_apic_write(IOAPICID, idreg.value);
+                break;
+            }
+        }
+    }
+    /*
+     * Configure the BSP's lapic.
+     */
+    l_apic_init();
+    l_apic_debug();
+}
+/** APIC spurious interrupt handler.
+ *
+ * @param n Interrupt vector.
+ * @param istate Interrupted state.
+ */
+void apic_spurious(int n, istate_t *istate)
+{
+#ifdef CONFIG_DEBUG
+    printf("cpu%d: APIC spurious interrupt\n", CPU->id);
+#endif
+}
+/** Poll for APIC errors.
+ *
+ * Examine Error Status Register and report all errors found.
+ *
+ * @return 0 on error, 1 on success.
+ */
+int apic_poll_errors(void)
+{
+    esr_t esr;
+    esr.value = l_apic[ESR];
+    if (esr.send_checksum_error)
+        printf("Send Checksum Error\n");
+    if (esr.receive_checksum_error)
+        printf("Receive Checksum Error\n");
+    if (esr.send_accept_error)
+        printf("Send Accept Error\n");
+    if (esr.receive_accept_error)
+        printf("Receive Accept Error\n");
+    if (esr.send_illegal_vector)
+        printf("Send Illegal Vector\n");
+    if (esr.received_illegal_vector)
+        printf("Received Illegal Vector\n");
+    if (esr.illegal_register_address)
+        printf("Illegal Register Address\n");
+    return !esr.err_bitmap;
+}
+/** Send all CPUs excluding CPU IPI vector.
+ *
+ * @param vector Interrupt vector to be sent.
+ *
+ * @return 0 on failure, 1 on success.
+ */
+int l_apic_broadcast_custom_ipi(__u8 vector)
+{
+    icr_t icr;
+    icr.lo = l_apic[ICRlo];
+    icr.delmod = DELMOD_FIXED;
+    icr.destmod = DESTMOD_LOGIC;
+    icr.level = LEVEL_ASSERT;
+    icr.shorthand = SHORTHAND_ALL_EXCL;
+    icr.trigger_mode = TRIGMOD_LEVEL;
+    icr.vector = vector;
+    l_apic[ICRlo] = icr.lo;
+    icr.lo = l_apic[ICRlo];
+    if (icr.delivs == DELIVS_PENDING) {
+#ifdef CONFIG_DEBUG
+        printf("IPI is pending.\n");
+#endif
+    }
+    return apic_poll_errors();
+}
+/** Universal Start-up Algorithm for bringing up the AP processors.
+ *
+ * @param apicid APIC ID of the processor to be brought up.
+ *
+ * @return 0 on failure, 1 on success.
+ */
+int l_apic_send_init_ipi(__u8 apicid)
+{
+    icr_t icr;
+    int i;
+    /*
+     * Read the ICR register in and zero all non-reserved fields.
+     */
+    icr.lo = l_apic[ICRlo];
+    icr.hi = l_apic[ICRhi];
+    icr.delmod = DELMOD_INIT;
+    icr.destmod = DESTMOD_PHYS;
+    icr.level = LEVEL_ASSERT;
+    icr.trigger_mode = TRIGMOD_LEVEL;
+    icr.shorthand = SHORTHAND_NONE;
+    icr.vector = 0;
+    icr.dest = apicid;
+    l_apic[ICRhi] = icr.hi;
+    l_apic[ICRlo] = icr.lo;
+    /*
+     * According to MP Specification, 20us should be enough to
+     * deliver the IPI.
+     */
+    delay(20);
+    if (!apic_poll_errors())
+        return 0;
+    icr.lo = l_apic[ICRlo];
+    if (icr.delivs == DELIVS_PENDING) {
+#ifdef CONFIG_DEBUG
+        printf("IPI is pending.\n");
+#endif
+    }
+    icr.delmod = DELMOD_INIT;
+    icr.destmod = DESTMOD_PHYS;
+    icr.level = LEVEL_DEASSERT;
+    icr.shorthand = SHORTHAND_NONE;
+    icr.trigger_mode = TRIGMOD_LEVEL;
+    icr.vector = 0;
+    l_apic[ICRlo] = icr.lo;
+    /*
+     * Wait 10ms as MP Specification specifies.
+     */
+    delay(10000);
+    if (!is_82489DX_apic(l_apic[LAVR])) {
+        /*
+         * If this is not 82489DX-based l_apic we must send two STARTUP IPI's.
+         */
+        for (i = 0; i<2; i++) {
+            icr.lo = l_apic[ICRlo];
+            icr.vector = ((__address) ap_boot) / 4096; /* calculate the reset vector */
+            icr.delmod = DELMOD_STARTUP;
+            icr.destmod = DESTMOD_PHYS;
+            icr.level = LEVEL_ASSERT;
+            icr.shorthand = SHORTHAND_NONE;
+            icr.trigger_mode = TRIGMOD_LEVEL;
+            l_apic[ICRlo] = icr.lo;
+            delay(200);
+        }
+    }
+    return apic_poll_errors();
+}
+/** Initialize Local APIC. */
+void l_apic_init(void)
+{
+    lvt_error_t error;
+    lvt_lint_t lint;
+    tpr_t tpr;
+    svr_t svr;
+    icr_t icr;
+    tdcr_t tdcr;
+    lvt_tm_t tm;
+    ldr_t ldr;
+    dfr_t dfr;
+    __u32 t1, t2;
+    /* Initialize LVT Error register. */
+    error.value = l_apic[LVT_Err];
+    error.masked = true;
+    l_apic[LVT_Err] = error.value;
+    /* Initialize LVT LINT0 register. */
+    lint.value = l_apic[LVT_LINT0];
+    lint.masked = true;
+    l_apic[LVT_LINT0] = lint.value;
+    /* Initialize LVT LINT1 register. */
+    lint.value = l_apic[LVT_LINT1];
+    lint.masked = true;
+    l_apic[LVT_LINT1] = lint.value;
+    /* Task Priority Register initialization. */
+    tpr.value = l_apic[TPR];
+    tpr.pri_sc = 0;
+    tpr.pri = 0;
+    l_apic[TPR] = tpr.value;
+    /* Spurious-Interrupt Vector Register initialization. */
+    svr.value = l_apic[SVR];
+    svr.vector = VECTOR_APIC_SPUR;
+    svr.lapic_enabled = true;
+    svr.focus_checking = true;
+    l_apic[SVR] = svr.value;
+    if (CPU->arch.family >= 6)
+        enable_l_apic_in_msr();
+    /* Interrupt Command Register initialization. */
+    icr.lo = l_apic[ICRlo];
+    icr.delmod = DELMOD_INIT;
+    icr.destmod = DESTMOD_PHYS;
+    icr.level = LEVEL_DEASSERT;
+    icr.shorthand = SHORTHAND_ALL_INCL;
+    icr.trigger_mode = TRIGMOD_LEVEL;
+    l_apic[ICRlo] = icr.lo;
+    /* Timer Divide Configuration Register initialization. */
+    tdcr.value = l_apic[TDCR];
+    tdcr.div_value = DIVIDE_1;
+    l_apic[TDCR] = tdcr.value;
+    /* Program local timer. */
+    tm.value = l_apic[LVT_Tm];
+    tm.vector = VECTOR_CLK;
+    tm.mode = TIMER_PERIODIC;
+    tm.masked = false;
+    l_apic[LVT_Tm] = tm.value;
+    /*
+     * Measure and configure the timer to generate timer
+     * interrupt with period 1s/HZ seconds.
+     */
+    t1 = l_apic[CCRT];
+    l_apic[ICRT] = 0xffffffff;
+    while (l_apic[CCRT] == t1)
+        ;
+    t1 = l_apic[CCRT];
+    delay(1000000/HZ);
+    t2 = l_apic[CCRT];
+    l_apic[ICRT] = t1-t2;
+    /* Program Logical Destination Register. */
+    ldr.value = l_apic[LDR];
+    if (CPU->id < sizeof(CPU->id)*8)    /* size in bits */
+        ldr.id = (1<<CPU->id);
+    l_apic[LDR] = ldr.value;
+    /* Program Destination Format Register for Flat mode. */
+    dfr.value = l_apic[DFR];
+    dfr.model = MODEL_FLAT;
+    l_apic[DFR] = dfr.value;
+}
+/** Local APIC End of Interrupt. */
+void l_apic_eoi(void)
+{
+    l_apic[EOI] = 0;
+}
+/** Dump content of Local APIC registers. */
+void l_apic_debug(void)
+{
+#ifdef LAPIC_VERBOSE
+    lvt_tm_t tm;
+    lvt_lint_t lint;
+    lvt_error_t error;
+    printf("LVT on cpu%d, LAPIC ID: %d\n", CPU->id, l_apic_id());
+    tm.value = l_apic[LVT_Tm];
+    printf("LVT Tm: vector=%hhd, %s, %s, %s\n", tm.vector, delivs_str[tm.delivs], mask_str[tm.masked], tm_mode_str[tm.mode]);
+    lint.value = l_apic[LVT_LINT0];
+    printf("LVT LINT0: vector=%hhd, %s, %s, %s, irr=%d, %s, %s\n", tm.vector, delmod_str[lint.delmod], delivs_str[lint.delivs], intpol_str[lint.intpol], lint.irr, trigmod_str[lint.trigger_mode], mask_str[lint.masked]);
+    lint.value = l_apic[LVT_LINT1];
+    printf("LVT LINT1: vector=%hhd, %s, %s, %s, irr=%d, %s, %s\n", tm.vector, delmod_str[lint.delmod], delivs_str[lint.delivs], intpol_str[lint.intpol], lint.irr, trigmod_str[lint.trigger_mode], mask_str[lint.masked]);
+    error.value = l_apic[LVT_Err];
+    printf("LVT Err: vector=%hhd, %s, %s\n", error.vector, delivs_str[error.delivs], mask_str[error.masked]);
+#endif
+}
+/** Local APIC Timer Interrupt.
+ *
+ * @param n Interrupt vector number.
+ * @param istate Interrupted state.
+ */
+void l_apic_timer_interrupt(int n, istate_t *istate)
+{
+    l_apic_eoi();
+    clock();
+}
+/** Get Local APIC ID.
+ *
+ * @return Local APIC ID.
+ */
+__u8 l_apic_id(void)
+{
+    l_apic_id_t idreg;
+    idreg.value = l_apic[L_APIC_ID];
+    return idreg.apic_id;
+}
+/** Read from IO APIC register.
+ *
+ * @param address IO APIC register address.
+ *
+ * @return Content of the addressed IO APIC register.
+ */
+__u32 io_apic_read(__u8 address)
+{
+    io_regsel_t regsel;
+    regsel.value = io_apic[IOREGSEL];
+    regsel.reg_addr = address;
+    io_apic[IOREGSEL] = regsel.value;
+    return io_apic[IOWIN];
+}
+/** Write to IO APIC register.
+ *
+ * @param address IO APIC register address.
+ * @param x Content to be written to the addressed IO APIC register.
+ */
+void io_apic_write(__u8 address, __u32 x)
+{
+    io_regsel_t regsel;
+    regsel.value = io_apic[IOREGSEL];
+    regsel.reg_addr = address;
+    io_apic[IOREGSEL] = regsel.value;
+    io_apic[IOWIN] = x;
+}
+/** Change some attributes of one item in I/O Redirection Table.
+ *
+ * @param pin IO APIC pin number.
+ * @param dest Interrupt destination address.
+ * @param v Interrupt vector to trigger.
+ * @param flags Flags.
+ */
+void io_apic_change_ioredtbl(int pin, int dest, __u8 v, int flags)
+{
+    io_redirection_reg_t reg;
+    int dlvr = DELMOD_FIXED;
+    if (flags & LOPRI)
+        dlvr = DELMOD_LOWPRI;
+    reg.lo = io_apic_read(IOREDTBL + pin*2);
+    reg.hi = io_apic_read(IOREDTBL + pin*2 + 1);
+    reg.dest = dest;
+    reg.destmod = DESTMOD_LOGIC;
+    reg.trigger_mode = TRIGMOD_EDGE;
+    reg.intpol = POLARITY_HIGH;
+    reg.delmod = dlvr;
+    reg.intvec = v;
+    io_apic_write(IOREDTBL + pin*2, reg.lo);
+    io_apic_write(IOREDTBL + pin*2 + 1, reg.hi);
+}
+/** Mask IRQs in IO APIC.
+ *
+ * @param irqmask Bitmask of IRQs to be masked (0 = do not mask, 1 = mask).
+ */
+void io_apic_disable_irqs(__u16 irqmask)
+{
+    io_redirection_reg_t reg;
+    int i, pin;
+    for (i=0;i<16;i++) {
+        if (irqmask & (1<<i)) {
+            /*
+             * Mask the signal input in IO APIC if there is a
+             * mapping for the respective IRQ number.
+             */
+            pin = smp_irq_to_pin(i);
+            if (pin != -1) {
+                reg.lo = io_apic_read(IOREDTBL + pin*2);
+                reg.masked = true;
+                io_apic_write(IOREDTBL + pin*2, reg.lo);
+            }
+        }
+    }
+}
+/** Unmask IRQs in IO APIC.
+ *
+ * @param irqmask Bitmask of IRQs to be unmasked (0 = do not unmask, 1 = unmask).
+ */
+void io_apic_enable_irqs(__u16 irqmask)
+{
+    int i, pin;
+    io_redirection_reg_t reg;
+    for (i=0;i<16;i++) {
+        if (irqmask & (1<<i)) {
+            /*
+             * Unmask the signal input in IO APIC if there is a
+             * mapping for the respective IRQ number.
+             */
+            pin = smp_irq_to_pin(i);
+            if (pin != -1) {
+                reg.lo = io_apic_read(IOREDTBL + pin*2);
+                reg.masked = false;
+                io_apic_write(IOREDTBL + pin*2, reg.lo);
+            }
+        }
+    }
+}
+#endif /* CONFIG_SMP */
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/ia32/src/smp/mps.c
 ,0 → 1,435
+/*
+ * Copyright (C) 2001-2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup ia32
+ * @{
+ */
+/** @file
+ */
+#ifdef CONFIG_SMP
+#include <config.h>
+#include <print.h>
+#include <debug.h>
+#include <arch/smp/mps.h>
+#include <arch/smp/apic.h>
+#include <arch/smp/smp.h>
+#include <func.h>
+#include <arch/types.h>
+#include <typedefs.h>
+#include <cpu.h>
+#include <arch/asm.h>
+#include <arch/bios/bios.h>
+#include <mm/frame.h>
+/*
+ * MultiProcessor Specification detection code.
+ */
+#define FS_SIGNATURE    0x5f504d5f
+#define CT_SIGNATURE    0x504d4350
+int mps_fs_check(__u8 *base);
+int mps_ct_check(void);
+int configure_via_ct(void);
+int configure_via_default(__u8 n);
+int ct_processor_entry(struct __processor_entry *pr);
+void ct_bus_entry(struct __bus_entry *bus);
+void ct_io_apic_entry(struct __io_apic_entry *ioa);
+void ct_io_intr_entry(struct __io_intr_entry *iointr);
+void ct_l_intr_entry(struct __l_intr_entry *lintr);
+void ct_extended_entries(void);
+static struct mps_fs *fs;
+static struct mps_ct *ct;
+struct __processor_entry *processor_entries = NULL;
+struct __bus_entry *bus_entries = NULL;
+struct __io_apic_entry *io_apic_entries = NULL;
+struct __io_intr_entry *io_intr_entries = NULL;
+struct __l_intr_entry *l_intr_entries = NULL;
+int processor_entry_cnt = 0;
+int bus_entry_cnt = 0;
+int io_apic_entry_cnt = 0;
+int io_intr_entry_cnt = 0;
+int l_intr_entry_cnt = 0;
+waitq_t ap_completion_wq;
+/*
+ * Implementation of IA-32 SMP configuration interface.
+ */
+static count_t get_cpu_count(void);
+static bool is_cpu_enabled(index_t i);
+static bool is_bsp(index_t i);
+static __u8 get_cpu_apic_id(index_t i);
+static int mps_irq_to_pin(int irq);
+struct smp_config_operations mps_config_operations = {
+    .cpu_count = get_cpu_count,
+    .cpu_enabled = is_cpu_enabled,
+    .cpu_bootstrap = is_bsp,
+    .cpu_apic_id = get_cpu_apic_id,
+    .irq_to_pin = mps_irq_to_pin
+};
+count_t get_cpu_count(void)
+{
+    return processor_entry_cnt;
+}
+bool is_cpu_enabled(index_t i)
+{
+    ASSERT(i < processor_entry_cnt);
+    return processor_entries[i].cpu_flags & 0x1;
+}
+bool is_bsp(index_t i)
+{
+    ASSERT(i < processor_entry_cnt);
+    return processor_entries[i].cpu_flags & 0x2;
+}
+__u8 get_cpu_apic_id(index_t i)
+{
+    ASSERT(i < processor_entry_cnt);
+    return processor_entries[i].l_apic_id;
+}
+/*
+ * Used to check the integrity of the MP Floating Structure.
+ */
+int mps_fs_check(__u8 *base)
+{
+    int i;
+    __u8 sum;
+    for (i = 0, sum = 0; i < 16; i++)
+        sum += base[i];
+    return !sum;
+}
+/*
+ * Used to check the integrity of the MP Configuration Table.
+ */
+int mps_ct_check(void)
+{
+    __u8 *base = (__u8 *) ct;
+    __u8 *ext = base + ct->base_table_length;
+    __u8 sum;
+    int i;
+    /* count the checksum for the base table */
+    for (i=0,sum=0; i < ct->base_table_length; i++)
+        sum += base[i];
+    if (sum)
+        return 0;
+    /* count the checksum for the extended table */
+    for (i=0,sum=0; i < ct->ext_table_length; i++)
+        sum += ext[i];
+    return sum == ct->ext_table_checksum;
+}
+void mps_init(void)
+{
+    __u8 *addr[2] = { NULL, (__u8 *) PA2KA(0xf0000) };
+    int i, j, length[2] = { 1024, 64*1024 };
+    /*
+     * Find MP Floating Pointer Structure
+     * 1a. search first 1K of EBDA
+     * 1b. if EBDA is undefined, search last 1K of base memory
+     *  2. search 64K starting at 0xf0000
+     */
+    addr[0] = (__u8 *) PA2KA(ebda ? ebda : 639 * 1024);
+    for (i = 0; i < 2; i++) {
+        for (j = 0; j < length[i]; j += 16) {
+            if (*((__u32 *) &addr[i][j]) == FS_SIGNATURE && mps_fs_check(&addr[i][j])) {
+                fs = (struct mps_fs *) &addr[i][j];
+                goto fs_found;
+            }
+        }
+    }
+    return;
+fs_found:
+    printf("%p: MPS Floating Pointer Structure\n", fs);
+    if (fs->config_type == 0 && fs->configuration_table) {
+        if (fs->mpfib2 >> 7) {
+            printf("%s: PIC mode not supported\n", __FUNCTION__);
+            return;
+        }
+        ct = (struct mps_ct *)PA2KA((__address)fs->configuration_table);
+        config.cpu_count = configure_via_ct();
+    }
+    else
+        config.cpu_count = configure_via_default(fs->config_type);
+    return;
+}
+int configure_via_ct(void)
+{
+    __u8 *cur;
+    int i, cnt;
+    if (ct->signature != CT_SIGNATURE) {
+        printf("%s: bad ct->signature\n", __FUNCTION__);
+        return 1;
+    }
+    if (!mps_ct_check()) {
+        printf("%s: bad ct checksum\n", __FUNCTION__);
+        return 1;
+    }
+    if (ct->oem_table) {
+        printf("%s: ct->oem_table not supported\n", __FUNCTION__);
+        return 1;
+    }
+    l_apic = (__u32 *)(__address)ct->l_apic;
+    cnt = 0;
+    cur = &ct->base_table[0];
+    for (i=0; i < ct->entry_count; i++) {
+        switch (*cur) {
+            /* Processor entry */
+            case 0:
+                processor_entries = processor_entries ? processor_entries : (struct __processor_entry *) cur;
+                processor_entry_cnt++;
+                cnt += ct_processor_entry((struct __processor_entry *) cur);
+                cur += 20;
+                break;
+            /* Bus entry */
+            case 1:
+                bus_entries = bus_entries ? bus_entries : (struct __bus_entry *) cur;
+                bus_entry_cnt++;
+                ct_bus_entry((struct __bus_entry *) cur);
+                cur += 8;
+                break;
+            /* I/O Apic */
+            case 2:
+                io_apic_entries = io_apic_entries ? io_apic_entries : (struct __io_apic_entry *) cur;
+                io_apic_entry_cnt++;
+                ct_io_apic_entry((struct __io_apic_entry *) cur);
+                cur += 8;
+                break;
+            /* I/O Interrupt Assignment */
+            case 3:
+                io_intr_entries = io_intr_entries ? io_intr_entries : (struct __io_intr_entry *) cur;
+                io_intr_entry_cnt++;
+                ct_io_intr_entry((struct __io_intr_entry *) cur);
+                cur += 8;
+                break;
+            /* Local Interrupt Assignment */
+            case 4:
+                l_intr_entries = l_intr_entries ? l_intr_entries : (struct __l_intr_entry *) cur;
+                l_intr_entry_cnt++;
+                ct_l_intr_entry((struct __l_intr_entry *) cur);
+                cur += 8;
+                break;
+            default:
+                /*
+                 * Something is wrong. Fallback to UP mode.
+                 */
+                printf("%s: ct badness\n", __FUNCTION__);
+                return 1;
+        }
+    }
+    /*
+     * Process extended entries.
+     */
+    ct_extended_entries();
+    return cnt;
+}
+int configure_via_default(__u8 n)
+{
+    /*
+     * Not yet implemented.
+     */
+    printf("%s: not supported\n", __FUNCTION__);
+    return 1;
+}
+int ct_processor_entry(struct __processor_entry *pr)
+{
+    /*
+     * Ignore processors which are not marked enabled.
+     */
+    if ((pr->cpu_flags & (1<<0)) == 0)
+        return 0;
+    apic_id_mask |= (1<<pr->l_apic_id);
+    return 1;
+}
+void ct_bus_entry(struct __bus_entry *bus)
+{
+#ifdef MPSCT_VERBOSE
+    char buf[7];
+    memcpy((void *) buf, (void *) bus->bus_type, 6);
+    buf[6] = 0;
+    printf("bus%d: %s\n", bus->bus_id, buf);
+#endif
+}
+void ct_io_apic_entry(struct __io_apic_entry *ioa)
+{
+    static int io_apic_count = 0;
+    /* this ioapic is marked unusable */
+    if ((ioa->io_apic_flags & 1) == 0)
+        return;
+    if (io_apic_count++ > 0) {
+        /*
+         * Multiple IO APIC's are currently not supported.
+         */
+        return;
+    }
+    io_apic = (__u32 *)(__address)ioa->io_apic;
+}
+//#define MPSCT_VERBOSE
+void ct_io_intr_entry(struct __io_intr_entry *iointr)
+{
+#ifdef MPSCT_VERBOSE
+    switch (iointr->intr_type) {
+        case 0: printf("INT"); break;
+        case 1: printf("NMI"); break;
+        case 2: printf("SMI"); break;
+        case 3: printf("ExtINT"); break;
+    }
+    putchar(',');
+    switch (iointr->poel&3) {
+        case 0: printf("bus-like"); break;
+        case 1: printf("active high"); break;
+        case 2: printf("reserved"); break;
+        case 3: printf("active low"); break;
+    }
+    putchar(',');
+    switch ((iointr->poel>>2)&3) {
+        case 0: printf("bus-like"); break;
+        case 1: printf("edge-triggered"); break;
+        case 2: printf("reserved"); break;
+        case 3: printf("level-triggered"); break;
+    }
+    putchar(',');
+    printf("bus%d,irq%d", iointr->src_bus_id, iointr->src_bus_irq);
+    putchar(',');
+    printf("io_apic%d,pin%d", iointr->dst_io_apic_id, iointr->dst_io_apic_pin);
+    putchar('\n');
+#endif
+}
+void ct_l_intr_entry(struct __l_intr_entry *lintr)
+{
+#ifdef MPSCT_VERBOSE
+    switch (lintr->intr_type) {
+        case 0: printf("INT"); break;
+        case 1: printf("NMI"); break;
+        case 2: printf("SMI"); break;
+        case 3: printf("ExtINT"); break;
+    }
+    putchar(',');
+    switch (lintr->poel&3) {
+        case 0: printf("bus-like"); break;
+        case 1: printf("active high"); break;
+        case 2: printf("reserved"); break;
+        case 3: printf("active low"); break;
+    }
+    putchar(',');
+    switch ((lintr->poel>>2)&3) {
+        case 0: printf("bus-like"); break;
+        case 1: printf("edge-triggered"); break;
+        case 2: printf("reserved"); break;
+        case 3: printf("level-triggered"); break;
+    }
+    putchar(',');
+    printf("bus%d,irq%d", lintr->src_bus_id, lintr->src_bus_irq);
+    putchar(',');
+    printf("l_apic%d,pin%d", lintr->dst_l_apic_id, lintr->dst_l_apic_pin);
+    putchar('\n');
+#endif
+}
+void ct_extended_entries(void)
+{
+    __u8 *ext = (__u8 *) ct + ct->base_table_length;
+    __u8 *cur;
+    for (cur = ext; cur < ext + ct->ext_table_length; cur += cur[CT_EXT_ENTRY_LEN]) {
+        switch (cur[CT_EXT_ENTRY_TYPE]) {
+            default:
+                printf("%p: skipping MP Configuration Table extended entry type %d\n", cur, cur[CT_EXT_ENTRY_TYPE]);
+                break;
+        }
+    }
+}
+int mps_irq_to_pin(int irq)
+{
+    int i;
+    for(i=0;i<io_intr_entry_cnt;i++) {
+        if (io_intr_entries[i].src_bus_irq == irq && io_intr_entries[i].intr_type == 0)
+            return io_intr_entries[i].dst_io_apic_pin;
+    }
+    return -1;
+}
+#endif /* CONFIG_SMP */
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/ia32/src/smp/smp.c
 ,0 → 1,186
+/*
+ * Copyright (C) 2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup ia32
+ * @{
+ */
+/** @file
+ */
+#include <smp/smp.h>
+#include <arch/smp/smp.h>
+#include <arch/smp/mps.h>
+#include <arch/smp/ap.h>
+#include <arch/boot/boot.h>
+#include <genarch/acpi/acpi.h>
+#include <genarch/acpi/madt.h>
+#include <config.h>
+#include <synch/waitq.h>
+#include <synch/synch.h>
+#include <arch/pm.h>
+#include <func.h>
+#include <panic.h>
+#include <debug.h>
+#include <arch/asm.h>
+#include <mm/frame.h>
+#include <mm/page.h>
+#include <mm/slab.h>
+#include <mm/as.h>
+#include <print.h>
+#include <memstr.h>
+#include <arch/drivers/i8259.h>
+#ifdef CONFIG_SMP
+static struct smp_config_operations *ops = NULL;
+void smp_init(void)
+{
+    int status;
+    __address l_apic_address, io_apic_address;
+    if (acpi_madt) {
+        acpi_madt_parse();
+        ops = &madt_config_operations;
+    }
+    if (config.cpu_count == 1) {
+        mps_init();
+        ops = &mps_config_operations;
+    }
+    l_apic_address = PA2KA(PFN2ADDR(frame_alloc_rc(ONE_FRAME, FRAME_ATOMIC | FRAME_KA, &status)));
+    if (status != FRAME_OK)
+        panic("cannot allocate address for l_apic\n");
+    io_apic_address = PA2KA(PFN2ADDR(frame_alloc_rc(ONE_FRAME, FRAME_ATOMIC | FRAME_KA, &status)));
+    if (status != FRAME_OK)
+        panic("cannot allocate address for io_apic\n");
+    if (config.cpu_count > 1) {
+        page_mapping_insert(AS_KERNEL, l_apic_address, (__address) l_apic,
+                  PAGE_NOT_CACHEABLE);
+        page_mapping_insert(AS_KERNEL, io_apic_address, (__address) io_apic,
+                  PAGE_NOT_CACHEABLE);
+        l_apic = (__u32 *) l_apic_address;
+        io_apic = (__u32 *) io_apic_address;
+        }
+}
+/*
+ * Kernel thread for bringing up application processors. It becomes clear
+ * that we need an arrangement like this (AP's being initialized by a kernel
+ * thread), for a thread has its dedicated stack. (The stack used during the
+ * BSP initialization (prior the very first call to scheduler()) will be used
+ * as an initialization stack for each AP.)
+ */
+void kmp(void *arg)
+{
+    int i;
+    ASSERT(ops != NULL);
+    waitq_initialize(&ap_completion_wq);
+    /*
+     * We need to access data in frame 0.
+     * We boldly make use of kernel address space mapping.
+     */
+    /*
+     * Set the warm-reset vector to the real-mode address of 4K-aligned ap_boot()
+     */
+    *((__u16 *) (PA2KA(0x467+0))) =  ((__address) ap_boot) >> 4;    /* segment */
+    *((__u16 *) (PA2KA(0x467+2))) =  0;             /* offset */
+    /*
+     * Save 0xa to address 0xf of the CMOS RAM.
+     * BIOS will not do the POST after the INIT signal.
+     */
+    outb(0x70,0xf);
+    outb(0x71,0xa);
+    pic_disable_irqs(0xffff);
+    apic_init();
+    for (i = 0; i < ops->cpu_count(); i++) {
+        struct descriptor *gdt_new;
+        /*
+         * Skip processors marked unusable.
+         */
+        if (!ops->cpu_enabled(i))
+            continue;
+        /*
+         * The bootstrap processor is already up.
+         */
+        if (ops->cpu_bootstrap(i))
+            continue;
+        if (ops->cpu_apic_id(i) == l_apic_id()) {
+            printf("%s: bad processor entry #%d, will not send IPI to myself\n", __FUNCTION__, i);
+            continue;
+        }
+        /*
+         * Prepare new GDT for CPU in question.
+         */
+        if (!(gdt_new = (struct descriptor *) malloc(GDT_ITEMS*sizeof(struct descriptor), FRAME_ATOMIC)))
+            panic("couldn't allocate memory for GDT\n");
+        memcpy(gdt_new, gdt, GDT_ITEMS * sizeof(struct descriptor));
+        memsetb((__address)(&gdt_new[TSS_DES]), sizeof(struct descriptor), 0);
+        protected_ap_gdtr.limit = GDT_ITEMS * sizeof(struct descriptor);
+        protected_ap_gdtr.base = KA2PA((__address) gdt_new);
+        gdtr.base = (__address) gdt_new;
+        if (l_apic_send_init_ipi(ops->cpu_apic_id(i))) {
+            /*
+             * There may be just one AP being initialized at
+             * the time. After it comes completely up, it is
+             * supposed to wake us up.
+             */
+            if (waitq_sleep_timeout(&ap_completion_wq, 1000000, SYNCH_FLAGS_NONE) == ESYNCH_TIMEOUT)
+                printf("%s: waiting for cpu%d (APIC ID = %d) timed out\n", __FUNCTION__, config.cpu_active > i ? config.cpu_active : i, ops->cpu_apic_id(i));
+        } else
+            printf("INIT IPI for l_apic%d failed\n", ops->cpu_apic_id(i));
+    }
+}
+int smp_irq_to_pin(int irq)
+{
+    ASSERT(ops != NULL);
+    return ops->irq_to_pin(irq);
+}
+#endif /* CONFIG_SMP */
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/ia32/src/smp/ipi.c
 ,0 → 1,49
+/*
+ * Copyright (C) 2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup ia32
+ * @{
+ */
+/** @file
+ */
+#ifdef CONFIG_SMP
+#include <smp/ipi.h>
+#include <arch/smp/apic.h>
+void ipi_broadcast_arch(int ipi)
+{
+    (void) l_apic_broadcast_custom_ipi((__u8) ipi);
+}
+#endif /* CONFIG_SMP */
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/ia32/src/smp/ap.S
 ,0 → 1,95
+#
+# Copyright (C) 2001-2004 Jakub Jermar
+# Copyright (C) 2005-2006 Martin Decky
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# - Redistributions of source code must retain the above copyright
+#   notice, this list of conditions and the following disclaimer.
+# - Redistributions in binary form must reproduce the above copyright
+#   notice, this list of conditions and the following disclaimer in the
+#   documentation and/or other materials provided with the distribution.
+# - The name of the author may not be used to endorse or promote products
+#   derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+#
+# Init code for application processors.
+#
+#include <arch/boot/boot.h>
+#include <arch/boot/memmap.h>
+#include <arch/mm/page.h>
+#include <arch/pm.h>
+.section K_TEXT_START, "ax"
+#ifdef CONFIG_SMP
+.global unmapped_ap_boot
+KTEXT=8
+KDATA=16
+# This piece of code is real-mode and is meant to be alligned at 4K boundary.
+# The requirement for such an alignment comes from MP Specification's STARTUP IPI
+# requirements.
+.align 4096
+unmapped_ap_boot:
+.code16
+    cli
+    xorw %ax, %ax
+    movw %ax, %ds
+    lgdtl ap_gdtr       # initialize Global Descriptor Table register
+    movl %cr0, %eax
+    orl $1, %eax
+    movl %eax, %cr0             # switch to protected mode
+    jmpl $KTEXT, $jump_to_kernel - BOOT_OFFSET + AP_BOOT_OFFSET
+jump_to_kernel:
+.code32
+    movw $KDATA, %ax
+    movw %ax, %ds
+    movw %ax, %es
+    movw %ax, %ss
+    movl $KA2PA(ctx), %eax          # KA2PA((__address) &ctx)
+    movl (%eax), %esp
+    subl $0x80000000, %esp          # KA2PA(ctx.sp)
+    call map_kernel                 # map kernel and turn paging on
+    addl $0x80000000, %esp          # PA2KA(ctx.sp)
+    jmpl $KTEXT, $main_ap
+#endif /* CONFIG_SMP */
+.section K_DATA_START, "aw", @progbits
+#ifdef CONFIG_SMP
+.global unmapped_ap_gdtr
+unmapped_ap_gdtr:
+    .word 0
+    .long 0
+#endif /* CONFIG_SMP */

 /tags/0.2.0.2/kernel/arch/ia32/src/ia32.c
 ,0 → 1,160
+/*
+ * Copyright (C) 2001-2004 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup ia32
+ * @{
+ */
+/** @file
+ */
+#include <arch.h>
+#include <arch/types.h>
+#include <typedefs.h>
+#include <arch/pm.h>
+#include <arch/drivers/ega.h>
+#include <arch/drivers/vesa.h>
+#include <genarch/i8042/i8042.h>
+#include <arch/drivers/i8254.h>
+#include <arch/drivers/i8259.h>
+#include <arch/context.h>
+#include <config.h>
+#include <arch/interrupt.h>
+#include <arch/asm.h>
+#include <genarch/acpi/acpi.h>
+#include <arch/bios/bios.h>
+#include <arch/mm/memory_init.h>
+#include <interrupt.h>
+#include <arch/debugger.h>
+#include <proc/thread.h>
+#include <syscall/syscall.h>
+#include <console/console.h>
+void arch_pre_mm_init(void)
+{
+    pm_init();
+    if (config.cpu_active == 1) {
+        bios_init();
+        i8259_init();   /* PIC */
+        i8254_init();   /* hard clock */
+        exc_register(VECTOR_SYSCALL, "syscall", (iroutine) syscall);
+        #ifdef CONFIG_SMP
+        exc_register(VECTOR_TLB_SHOOTDOWN_IPI, "tlb_shootdown",
+                 (iroutine) tlb_shootdown_ipi);
+        #endif /* CONFIG_SMP */
+    }
+}
+void arch_post_mm_init(void)
+{
+    if (config.cpu_active == 1) {
+#ifdef CONFIG_FB
+        if (vesa_present())
+            vesa_init();
+        else
+#endif
+            ega_init(); /* video */
+        /* Enable debugger */
+        debugger_init();
+        /* Merge all memory zones to 1 big zone */
+        zone_merge_all();
+    }
+}
+void arch_pre_smp_init(void)
+{
+    if (config.cpu_active == 1) {
+        memory_print_map();
+        #ifdef CONFIG_SMP
+        acpi_init();
+        #endif /* CONFIG_SMP */
+    }
+}
+void arch_post_smp_init(void)
+{
+    i8042_init();   /* keyboard controller */
+}
+void calibrate_delay_loop(void)
+{
+    i8254_calibrate_delay_loop();
+    if (config.cpu_active == 1) {
+        /*
+         * This has to be done only on UP.
+         * On SMP, i8254 is not used for time keeping and its interrupt pin remains masked.
+         */
+        i8254_normal_operation();
+    }
+}
+/** Set thread-local-storage pointer
+ *
+ * TLS pointer is set in GS register. That means, the GS contains
+ * selector, and the descriptor->base is the correct address.
+ */
+__native sys_tls_set(__native addr)
+{
+    THREAD->arch.tls = addr;
+    set_tls_desc(addr);
+    return 0;
+}
+/** Acquire console back for kernel
+ *
+ */
+void arch_grab_console(void)
+{
+    i8042_grab();
+}
+/** Return console to userspace
+ *
+ */
+void arch_release_console(void)
+{
+    i8042_release();
+}
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/ia32/src/proc/scheduler.c
 ,0 → 1,82
+/*
+ * Copyright (C) 2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup ia32proc
+ * @{
+ */
+/** @file
+ */
+#include <proc/scheduler.h>
+#include <cpu.h>
+#include <proc/task.h>
+#include <proc/thread.h>
+#include <arch.h>
+#include <arch/context.h>   /* SP_DELTA */
+#include <arch/debugger.h>
+#include <arch/pm.h>
+#include <arch/asm.h>
+#include <arch/ddi/ddi.h>
+/** Perform ia32 specific tasks needed before the new task is run.
+ *
+ * Interrupts are disabled.
+ */
+void before_task_runs_arch(void)
+{
+    io_perm_bitmap_install();
+}
+/** Perform ia32 specific tasks needed before the new thread is scheduled.
+ *
+ * THREAD is locked and interrupts are disabled.
+ */
+void before_thread_runs_arch(void)
+{
+    CPU->arch.tss->esp0 = (__address) &THREAD->kstack[THREAD_STACK_SIZE-SP_DELTA];
+    CPU->arch.tss->ss0 = selector(KDATA_DES);
+    /* Set up TLS in GS register */
+    set_tls_desc(THREAD->arch.tls);
+#ifdef CONFIG_DEBUG_AS_WATCHPOINT
+    /* Set watchpoint on AS to ensure that nobody sets it to zero */
+    if (CPU->id < BKPOINTS_MAX)
+        breakpoint_add(&((the_t *) THREAD->kstack)->as,
+                   BKPOINT_WRITE | BKPOINT_CHECK_ZERO,
+                   CPU->id);
+#endif
+}
+void after_thread_ran_arch(void)
+{
+}
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/ia32/src/proc/task.c
 ,0 → 1,62
+/*
+ * Copyright (C) 2006 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup ia32proc
+ * @{
+ */
+/** @file
+ */
+#include <proc/task.h>
+#include <arch/types.h>
+#include <adt/bitmap.h>
+#include <mm/slab.h>
+/** Perform ia32 specific task initialization.
+ *
+ * @param t Task to be initialized.
+ */
+void task_create_arch(task_t *t)
+{
+    t->arch.iomapver = 0;
+    bitmap_initialize(&t->arch.iomap, NULL, 0);
+}
+/** Perform ia32 specific task destruction.
+ *
+ * @param t Task to be initialized.
+ */
+void task_destroy_arch(task_t *t)
+{
+    if (t->arch.iomap.map)
+        free(t->arch.iomap.map);
+}
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/ia32/src/proc/thread.c
 ,0 → 1,48
+/*
+ * Copyright (C) 2006 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup ia32proc
+ * @{
+ */
+/** @file
+ */
+#include <proc/thread.h>
+/** Perform ia32 specific thread initialization.
+ *
+ * @param t Thread to be initialized.
+ */
+void thread_create_arch(thread_t *t)
+{
+    t->arch.tls = 0;
+}
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/ia32/src/mm/page.c
 ,0 → 1,122
+/*
+ * Copyright (C) 2001-2004 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup ia32mm
+ * @{
+ */
+/** @file
+ */
+#include <arch/mm/page.h>
+#include <genarch/mm/page_pt.h>
+#include <arch/mm/frame.h>
+#include <mm/frame.h>
+#include <mm/page.h>
+#include <mm/as.h>
+#include <arch/types.h>
+#include <align.h>
+#include <config.h>
+#include <func.h>
+#include <arch/interrupt.h>
+#include <arch/asm.h>
+#include <debug.h>
+#include <memstr.h>
+#include <print.h>
+#include <interrupt.h>
+void page_arch_init(void)
+{
+    __address cur;
+    int flags;
+    if (config.cpu_active == 1) {
+        page_mapping_operations = &pt_mapping_operations;
+        /*
+         * PA2KA(identity) mapping for all frames until last_frame.
+         */
+        for (cur = 0; cur < last_frame; cur += FRAME_SIZE) {
+            flags = PAGE_CACHEABLE;
+            if ((PA2KA(cur) >= config.base) && (PA2KA(cur) < config.base + config.kernel_size))
+                flags |= PAGE_GLOBAL;
+            page_mapping_insert(AS_KERNEL, PA2KA(cur), cur, flags);
+        }
+        exc_register(14, "page_fault", (iroutine) page_fault);
+        write_cr3((__address) AS_KERNEL->page_table);
+    }
+    else {
+        write_cr3((__address) AS_KERNEL->page_table);
+    }
+    paging_on();
+}
+__address hw_map(__address physaddr, size_t size)
+{
+    if (last_frame + ALIGN_UP(size, PAGE_SIZE) > KA2PA(KERNEL_ADDRESS_SPACE_END_ARCH))
+        panic("Unable to map physical memory %p (%d bytes)", physaddr, size)
+    __address virtaddr = PA2KA(last_frame);
+    pfn_t i;
+    for (i = 0; i < ADDR2PFN(ALIGN_UP(size, PAGE_SIZE)); i++)
+        page_mapping_insert(AS_KERNEL, virtaddr + PFN2ADDR(i), physaddr + PFN2ADDR(i), PAGE_NOT_CACHEABLE);
+    last_frame = ALIGN_UP(last_frame + size, FRAME_SIZE);
+    return virtaddr;
+}
+void page_fault(int n, istate_t *istate)
+{
+        __address page;
+    pf_access_t access;
+        page = read_cr2();
+        if (istate->error_word & PFERR_CODE_RSVD)
+        panic("Reserved bit set in page directory.\n");
+    if (istate->error_word & PFERR_CODE_RW)
+        access = PF_ACCESS_WRITE;
+    else
+        access = PF_ACCESS_READ;
+        if (as_page_fault(page, access, istate) == AS_PF_FAULT) {
+        fault_if_from_uspace(istate, "Page fault: %#x", page);
+                PRINT_INFO_ERRCODE(istate);
+                printf("page fault address: %#x\n", page);
+                panic("page fault\n");
+        }
+}
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/ia32/src/mm/tlb.c
 ,0 → 1,72
+/*
+ * Copyright (C) 2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup ia32mm
+ * @{
+ */
+/** @file
+ * @ingroup ia32mm, amd64mm
+ */
+#include <mm/tlb.h>
+#include <arch/mm/asid.h>
+#include <arch/asm.h>
+#include <arch/types.h>
+/** Invalidate all entries in TLB. */
+void tlb_invalidate_all(void)
+{
+    write_cr3(read_cr3());
+}
+/** Invalidate all entries in TLB that belong to specified address space.
+ *
+ * @param asid This parameter is ignored as the architecture doesn't support it.
+ */
+void tlb_invalidate_asid(asid_t asid)
+{
+    tlb_invalidate_all();
+}
+/** Invalidate TLB entries for specified page range belonging to specified address space.
+ *
+ * @param asid This parameter is ignored as the architecture doesn't support it.
+ * @param page Address of the first page whose entry is to be invalidated.
+ * @param cnt Number of entries to invalidate.
+ */
+void tlb_invalidate_pages(asid_t asid, __address page, count_t cnt)
+{
+    int i;
+    for (i = 0; i < cnt; i++)
+        invlpg(page + i * PAGE_SIZE);
+}
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/ia32/src/mm/as.c
 ,0 → 1,47
+/*
+ * Copyright (C) 2006 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup ia32mm
+ * @{
+ */
+/** @file
+ * @ingroup ia32mm, amd64mm
+ */
+#include <arch/mm/as.h>
+#include <genarch/mm/as_pt.h>
+/** Architecture dependent address space init. */
+void as_arch_init(void)
+{
+    as_operations = &as_pt_operations;
+}
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/ia32/src/mm/frame.c
 ,0 → 1,148
+/*
+ * Copyright (C) 2001-2004 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup ia32mm
+ * @{
+ */
+/** @file
+ * @ingroup ia32mm, amd64mm
+ */
+#include <mm/frame.h>
+#include <arch/mm/frame.h>
+#include <mm/as.h>
+#include <config.h>
+#include <arch/boot/boot.h>
+#include <arch/boot/memmap.h>
+#include <panic.h>
+#include <debug.h>
+#include <align.h>
+#include <macros.h>
+#include <print.h>
+#include <console/cmd.h>
+#include <console/kconsole.h>
+size_t hardcoded_unmapped_ktext_size = 0;
+size_t hardcoded_unmapped_kdata_size = 0;
+__address last_frame = 0;
+static void init_e820_memory(pfn_t minconf)
+{
+    int i;
+    pfn_t start, conf;
+    size_t size;
+    for (i = 0; i < e820counter; i++) {
+        if (e820table[i].type == MEMMAP_MEMORY_AVAILABLE) {
+            start = ADDR2PFN(ALIGN_UP(e820table[i].base_address,
+                          FRAME_SIZE));
+            size = SIZE2FRAMES(ALIGN_DOWN(e820table[i].size,
+                           FRAME_SIZE));
+            if (minconf < start || minconf >= start+size)
+                conf = start;
+            else
+                conf = minconf;
+            zone_create(start, size, conf, 0);
+            if (last_frame < ALIGN_UP(e820table[i].base_address + e820table[i].size, FRAME_SIZE))
+                last_frame = ALIGN_UP(e820table[i].base_address + e820table[i].size, FRAME_SIZE);
+        }
+    }
+}
+static int cmd_e820mem(cmd_arg_t *argv);
+static cmd_info_t e820_info = {
+    .name = "e820list",
+    .description = "List e820 memory.",
+    .func = cmd_e820mem,
+    .argc = 0
+};
+static char *e820names[] = { "invalid", "available", "reserved",
+                 "acpi", "nvs", "unusable" };
+static int cmd_e820mem(cmd_arg_t *argv)
+{
+    int i;
+    char *name;
+    for (i = 0; i < e820counter; i++) {
+        if (e820table[i].type <= MEMMAP_MEMORY_UNUSABLE)
+            name = e820names[e820table[i].type];
+        else
+            name = "invalid";
+        printf("%.*p %#.16llXB %s\n",
+            sizeof(__native) * 2,
+               (__native) e820table[i].base_address,
+               (__u64) e820table[i].size,
+               name);
+    }
+    return 0;
+}
+void frame_arch_init(void)
+{
+    static pfn_t minconf;
+    if (config.cpu_active == 1) {
+        cmd_initialize(&e820_info);
+        cmd_register(&e820_info);
+        minconf = 1;
+#ifdef CONFIG_SMP
+        minconf = max(minconf,
+                  ADDR2PFN(AP_BOOT_OFFSET+hardcoded_unmapped_ktext_size + hardcoded_unmapped_kdata_size));
+#endif
+#ifdef CONFIG_SIMICS_FIX
+        minconf = max(minconf, ADDR2PFN(0x10000));
+#endif
+        init_e820_memory(minconf);
+        /* Reserve frame 0 (BIOS data) */
+        frame_mark_unavailable(0, 1);
+#ifdef CONFIG_SMP
+        /* Reserve AP real mode bootstrap memory */
+        frame_mark_unavailable(AP_BOOT_OFFSET >> FRAME_WIDTH,
+                       (hardcoded_unmapped_ktext_size + hardcoded_unmapped_kdata_size) >> FRAME_WIDTH);
+#ifdef CONFIG_SIMICS_FIX
+        /* Don't know why, but this addresses help */
+        frame_mark_unavailable(0xd000 >> FRAME_WIDTH,3);
+#endif
+#endif
+    }
+}
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/ia32/src/mm/memory_init.c
 ,0 → 1,81
+/*
+ * Copyright (C) 2005 Josef Cejka
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup ia32mm
+ * @{
+ */
+/** @file
+ */
+#include <arch/boot/memmap.h>
+#include <arch/mm/memory_init.h>
+#include <arch/mm/page.h>
+#include <print.h>
+__u8 e820counter = 0xff;
+struct e820memmap_ e820table[MEMMAP_E820_MAX_RECORDS];
+__u32 e801memorysize;
+size_t get_memory_size(void)
+{
+    return e801memorysize*1024;
+}
+void memory_print_map(void)
+{
+    __u8 i;
+    for (i=0;i<e820counter;i++) {
+        printf("E820 base: %#.16llx size: %#.16llx type: ", e820table[i].base_address, e820table[i].size);
+        switch (e820table[i].type) {
+            case MEMMAP_MEMORY_AVAILABLE:
+                printf("available memory\n");
+                break;
+            case MEMMAP_MEMORY_RESERVED:
+                printf("reserved memory\n");
+                break;
+            case MEMMAP_MEMORY_ACPI:
+                printf("ACPI table\n");
+                break;
+            case MEMMAP_MEMORY_NVS:
+                printf("NVS\n");
+                break;
+            case MEMMAP_MEMORY_UNUSABLE:
+                printf("unusable memory\n");
+                break;
+            default:
+                printf("undefined memory type\n");
+        }
+    }
+}
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/ia32/src/fpu_context.c
 ,0 → 1,126
+/*
+ * Copyright (C) 2005 Jakub Vana
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup ia32
+ * @{
+ */
+/** @file
+ *
+ */
+#include <fpu_context.h>
+#include <arch.h>
+#include <cpu.h>
+typedef void (*fpu_context_function)(fpu_context_t *fctx);
+static fpu_context_function fpu_save,fpu_restore;
+static void fpu_context_f_save(fpu_context_t *fctx)
+{
+    __asm__ volatile (
+        "fnsave %0"
+        : "=m"(*fctx)
+        );
+}
+static void fpu_context_f_restore(fpu_context_t *fctx)
+{
+    __asm__ volatile (
+        "frstor %0"
+        : "=m"(*fctx)
+        );
+}
+static void fpu_context_fx_save(fpu_context_t *fctx)
+{
+    __asm__ volatile (
+        "fxsave %0"
+        : "=m"(*fctx)
+        );
+}
+static void fpu_context_fx_restore(fpu_context_t *fctx)
+{
+    __asm__ volatile (
+        "fxrstor %0"
+        : "=m"(*fctx)
+        );
+}
+/*
+    Setup using fxsr instruction
+*/
+void fpu_fxsr(void)
+{
+    fpu_save=fpu_context_fx_save;
+    fpu_restore=fpu_context_fx_restore;
+}
+/*
+    Setup using not fxsr instruction
+*/
+void fpu_fsr(void)
+{
+    fpu_save=fpu_context_f_save;
+    fpu_restore=fpu_context_f_restore;
+}
+void fpu_context_save(fpu_context_t *fctx)
+{
+    fpu_save(fctx);
+}
+void fpu_context_restore(fpu_context_t *fctx)
+{
+    fpu_restore(fctx);
+}
+void fpu_init()
+{
+    __u32 help0=0,help1=0;
+    __asm__ volatile (
+        "fninit;\n"
+        "stmxcsr %0\n"
+        "mov %0,%1;\n"
+        "or %2,%1;\n"
+        "mov %1,%0;\n"
+        "ldmxcsr %0;\n"
+        :"+m"(help0),"+r"(help1)
+        :"i"(0x1f80)
+    );
+}
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/ia32/src/bios/bios.c
 ,0 → 1,48
+/*
+ * Copyright (C) 2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup ia32
+ * @{
+ */
+/** @file
+ */
+#include <arch/bios/bios.h>
+#include <arch/types.h>
+__address ebda = 0;
+void bios_init(void)
+{
+    /* Copy the EBDA address out from BIOS Data Area */
+    ebda = *((__u16 *) BIOS_EBDA_PTR) * 0x10;
+}
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/ia32/src/pm.c
 ,0 → 1,241
+/*
+ * Copyright (C) 2001-2004 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup ia32
+ * @{
+ */
+/** @file
+ */
+#include <arch/pm.h>
+#include <config.h>
+#include <arch/types.h>
+#include <typedefs.h>
+#include <arch/interrupt.h>
+#include <arch/asm.h>
+#include <arch/context.h>
+#include <panic.h>
+#include <arch/mm/page.h>
+#include <mm/slab.h>
+#include <memstr.h>
+#include <arch/boot/boot.h>
+#include <interrupt.h>
+/*
+ * Early ia32 configuration functions and data structures.
+ */
+/*
+ * We have no use for segmentation so we set up flat mode. In this
+ * mode, we use, for each privilege level, two segments spanning the
+ * whole memory. One is for code and one is for data.
+ *
+ * One is for GS register which holds pointer to the TLS thread
+ * structure in it's base.
+ */
+descriptor_t gdt[GDT_ITEMS] = {
+    /* NULL descriptor */
+    { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 },
+    /* KTEXT descriptor */
+    { 0xffff, 0, 0, AR_PRESENT | AR_CODE | DPL_KERNEL, 0xf, 0, 0, 1, 1, 0 },
+    /* KDATA descriptor */
+    { 0xffff, 0, 0, AR_PRESENT | AR_DATA | AR_WRITABLE | DPL_KERNEL, 0xf, 0, 0, 1, 1, 0 },
+    /* UTEXT descriptor */
+    { 0xffff, 0, 0, AR_PRESENT | AR_CODE | DPL_USER, 0xf, 0, 0, 1, 1, 0 },
+    /* UDATA descriptor */
+    { 0xffff, 0, 0, AR_PRESENT | AR_DATA | AR_WRITABLE | DPL_USER, 0xf, 0, 0, 1, 1, 0 },
+    /* TSS descriptor - set up will be completed later */
+    { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 },
+    /* TLS descriptor */
+    { 0xffff, 0, 0, AR_PRESENT | AR_DATA | AR_WRITABLE | DPL_USER, 0xf, 0, 0, 1, 1, 0 },
+    /* VESA Init descriptor */
+#ifdef CONFIG_FB
+    { 0xffff, 0, VESA_INIT_SEGMENT>>12, AR_PRESENT | AR_CODE | DPL_KERNEL, 0xf, 0, 0, 0, 0, 0 }
+#endif
+};
+static idescriptor_t idt[IDT_ITEMS];
+static tss_t tss;
+tss_t *tss_p = NULL;
+/* gdtr is changed by kmp before next CPU is initialized */
+ptr_16_32_t bootstrap_gdtr = { .limit = sizeof(gdt), .base = KA2PA((__address) gdt) };
+ptr_16_32_t gdtr = { .limit = sizeof(gdt), .base = (__address) gdt };
+void gdt_setbase(descriptor_t *d, __address base)
+{
+    d->base_0_15 = base & 0xffff;
+    d->base_16_23 = ((base) >> 16) & 0xff;
+    d->base_24_31 = ((base) >> 24) & 0xff;
+}
+void gdt_setlimit(descriptor_t *d, __u32 limit)
+{
+    d->limit_0_15 = limit & 0xffff;
+    d->limit_16_19 = (limit >> 16) & 0xf;
+}
+void idt_setoffset(idescriptor_t *d, __address offset)
+{
+    /*
+     * Offset is a linear address.
+     */
+    d->offset_0_15 = offset & 0xffff;
+    d->offset_16_31 = offset >> 16;
+}
+void tss_initialize(tss_t *t)
+{
+    memsetb((__address) t, sizeof(struct tss), 0);
+}
+/*
+ * This function takes care of proper setup of IDT and IDTR.
+ */
+void idt_init(void)
+{
+    idescriptor_t *d;
+    int i;
+    for (i = 0; i < IDT_ITEMS; i++) {
+        d = &idt[i];
+        d->unused = 0;
+        d->selector = selector(KTEXT_DES);
+        d->access = AR_PRESENT | AR_INTERRUPT;  /* masking interrupt */
+        if (i == VECTOR_SYSCALL) {
+            /*
+             * The syscall interrupt gate must be calleable from userland.
+             */
+            d->access |= DPL_USER;
+        }
+        idt_setoffset(d, ((__address) interrupt_handlers) + i*interrupt_handler_size);
+        exc_register(i, "undef", (iroutine) null_interrupt);
+    }
+    exc_register(13, "gp_fault", (iroutine) gp_fault);
+    exc_register( 7, "nm_fault", (iroutine) nm_fault);
+    exc_register(12, "ss_fault", (iroutine) ss_fault);
+    exc_register(19, "simd_fp", (iroutine) simd_fp_exception);
+}
+/* Clean IOPL(12,13) and NT(14) flags in EFLAGS register */
+static void clean_IOPL_NT_flags(void)
+{
+    __asm__ volatile (
+        "pushfl\n"
+        "pop %%eax\n"
+        "and $0xffff8fff, %%eax\n"
+        "push %%eax\n"
+        "popfl\n"
+        : : : "eax"
+    );
+}
+/* Clean AM(18) flag in CR0 register */
+static void clean_AM_flag(void)
+{
+    __asm__ volatile (
+        "mov %%cr0, %%eax\n"
+        "and $0xfffbffff, %%eax\n"
+        "mov %%eax, %%cr0\n"
+        : : : "eax"
+    );
+}
+void pm_init(void)
+{
+    descriptor_t *gdt_p = (descriptor_t *) gdtr.base;
+    ptr_16_32_t idtr;
+    /*
+     * Update addresses in GDT and IDT to their virtual counterparts.
+     */
+    idtr.limit = sizeof(idt);
+    idtr.base = (__address) idt;
+    gdtr_load(&gdtr);
+    idtr_load(&idtr);
+    /*
+     * Each CPU has its private GDT and TSS.
+     * All CPUs share one IDT.
+     */
+    if (config.cpu_active == 1) {
+        idt_init();
+        /*
+         * NOTE: bootstrap CPU has statically allocated TSS, because
+         * the heap hasn't been initialized so far.
+         */
+        tss_p = &tss;
+    }
+    else {
+        tss_p = (tss_t *) malloc(sizeof(tss_t), FRAME_ATOMIC);
+        if (!tss_p)
+            panic("could not allocate TSS\n");
+    }
+    tss_initialize(tss_p);
+    gdt_p[TSS_DES].access = AR_PRESENT | AR_TSS | DPL_KERNEL;
+    gdt_p[TSS_DES].special = 1;
+    gdt_p[TSS_DES].granularity = 0;
+    gdt_setbase(&gdt_p[TSS_DES], (__address) tss_p);
+    gdt_setlimit(&gdt_p[TSS_DES], TSS_BASIC_SIZE - 1);
+    /*
+     * As of this moment, the current CPU has its own GDT pointing
+     * to its own TSS. We just need to load the TR register.
+     */
+    tr_load(selector(TSS_DES));
+    clean_IOPL_NT_flags();    /* Disable I/O on nonprivileged levels and clear NT flag. */
+    clean_AM_flag();          /* Disable alignment check */
+}
+void set_tls_desc(__address tls)
+{
+    ptr_16_32_t cpugdtr;
+    descriptor_t *gdt_p;
+    gdtr_store(&cpugdtr);
+    gdt_p = (descriptor_t *) cpugdtr.base;
+    gdt_setbase(&gdt_p[TLS_DES], tls);
+    /* Reload gdt register to update GS in CPU */
+    gdtr_load(&cpugdtr);
+}
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/ia32/src/userspace.c
 ,0 → 1,88
+/*
+ * Copyright (C) 2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup ia32
+ * @{
+ */
+/** @file
+ */
+#include <userspace.h>
+#include <arch/pm.h>
+#include <arch/types.h>
+#include <arch.h>
+#include <proc/uarg.h>
+#include <mm/as.h>
+/** Enter userspace
+ *
+ * Change CPU protection level to 3, enter userspace.
+ *
+ */
+void userspace(uspace_arg_t *kernel_uarg)
+{
+    ipl_t ipl;
+    ipl = interrupts_disable();
+    __asm__ volatile (
+        /*
+         * Clear nested task flag.
+         */
+        "pushfl\n"
+        "pop %%eax\n"
+        "and $0xffffbfff, %%eax\n"
+        "push %%eax\n"
+        "popfl\n"
+        /* Set up GS register (TLS) */
+        "movl %6, %%gs\n"
+        "pushl %0\n"
+        "pushl %1\n"
+        "pushl %2\n"
+        "pushl %3\n"
+        "pushl %4\n"
+        "movl %5, %%eax\n"
+        "iret\n"
+        :
+        : "i" (selector(UDATA_DES) | PL_USER), "r" (kernel_uarg->uspace_stack+THREAD_STACK_SIZE),
+          "r" (ipl), "i" (selector(UTEXT_DES) | PL_USER), "r" (kernel_uarg->uspace_entry),
+        "r" (kernel_uarg->uspace_uarg),
+        "r" (selector(TLS_DES))
+        : "eax");
+    /* Unreachable */
+    for(;;)
+        ;
+}
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/ia32/src/drivers/vesa.c
 ,0 → 1,75
+/*
+ * Copyright (C) 2006 Jakub Vana
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup ia32
+ * @{
+ */
+/** @file
+ */
+#ifdef CONFIG_FB
+#include <genarch/fb/fb.h>
+#include <arch/drivers/vesa.h>
+#include <putchar.h>
+#include <mm/page.h>
+#include <mm/frame.h>
+#include <mm/as.h>
+#include <arch/mm/page.h>
+#include <synch/spinlock.h>
+#include <arch/asm.h>
+#include <arch/types.h>
+#include <typedefs.h>
+#include <memstr.h>
+#include <bitops.h>
+__u32 vesa_ph_addr;
+__u16 vesa_width;
+__u16 vesa_height;
+__u16 vesa_bpp;
+__u16 vesa_scanline;
+int vesa_present(void)
+{
+    if (vesa_width != 0xffff)
+        return true;
+    if (vesa_height != 0xffff)
+        return true;
+    return false;
+}
+void vesa_init(void)
+{
+    fb_init(vesa_ph_addr, vesa_width, vesa_height, vesa_bpp, vesa_scanline);
+}
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/ia32/src/drivers/i8259.c
 ,0 → 1,136
+/*
+ * Copyright (C) 2001-2004 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup ia32
+ * @{
+ */
+/** @file
+ */
+#include <arch/drivers/i8259.h>
+#include <cpu.h>
+#include <arch/types.h>
+#include <arch/asm.h>
+#include <arch.h>
+#include <print.h>
+#include <interrupt.h>
+/*
+ * This is the PIC driver.
+ * Programmable Interrupt Controller for UP systems.
+ */
+static void pic_spurious(int n, istate_t *istate);
+void i8259_init(void)
+{
+    /* ICW1: this is ICW1, ICW4 to follow */
+    outb(PIC_PIC0PORT1, PIC_ICW1 | PIC_NEEDICW4);
+    /* ICW2: IRQ 0 maps to INT IRQBASE */
+    outb(PIC_PIC0PORT2, IVT_IRQBASE);
+    /* ICW3: pic1 using IRQ IRQ_PIC1 */
+    outb(PIC_PIC0PORT2, 1 << IRQ_PIC1);
+    /* ICW4: i8086 mode */
+    outb(PIC_PIC0PORT2, 1);
+    /* ICW1: ICW1, ICW4 to follow */
+    outb(PIC_PIC1PORT1, PIC_ICW1 | PIC_NEEDICW4);
+    /* ICW2: IRQ 8 maps to INT (IVT_IRQBASE + 8) */
+    outb(PIC_PIC1PORT2, IVT_IRQBASE + 8);
+    /* ICW3: pic1 is known as IRQ_PIC1 */
+    outb(PIC_PIC1PORT2, IRQ_PIC1);
+    /* ICW4: i8086 mode */
+    outb(PIC_PIC1PORT2, 1);
+    /*
+     * Register interrupt handler for the PIC spurious interrupt.
+     */
+    exc_register(VECTOR_PIC_SPUR, "pic_spurious", (iroutine) pic_spurious);
+    /*
+     * Set the enable/disable IRQs handlers.
+     * Set the End-of-Interrupt handler.
+     */
+    enable_irqs_function = pic_enable_irqs;
+    disable_irqs_function = pic_disable_irqs;
+    eoi_function = pic_eoi;
+    pic_disable_irqs(0xffff);       /* disable all irq's */
+    pic_enable_irqs(1<<IRQ_PIC1);       /* but enable pic1 */
+}
+void pic_enable_irqs(__u16 irqmask)
+{
+    __u8 x;
+    if (irqmask & 0xff) {
+        x = inb(PIC_PIC0PORT2);
+        outb(PIC_PIC0PORT2, x & (~(irqmask & 0xff)));
+    }
+    if (irqmask >> 8) {
+        x = inb(PIC_PIC1PORT2);
+        outb(PIC_PIC1PORT2, x & (~(irqmask >> 8)));
+    }
+}
+void pic_disable_irqs(__u16 irqmask)
+{
+    __u8 x;
+    if (irqmask & 0xff) {
+        x = inb(PIC_PIC0PORT2);
+        outb(PIC_PIC0PORT2, x | (irqmask & 0xff));
+    }
+    if (irqmask >> 8) {
+        x = inb(PIC_PIC1PORT2);
+        outb(PIC_PIC1PORT2, x | (irqmask >> 8));
+    }
+}
+void pic_eoi(void)
+{
+    outb(0x20,0x20);
+    outb(0xa0,0x20);
+}
+void pic_spurious(int n, istate_t *istate)
+{
+#ifdef CONFIG_DEBUG
+    printf("cpu%d: PIC spurious interrupt\n", CPU->id);
+#endif
+}
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/ia32/src/drivers/i8254.c
 ,0 → 1,142
+/*
+ * Copyright (C) 2001-2004 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup ia32
+ * @{
+ */
+/** @file
+ */
+#include <arch/types.h>
+#include <time/clock.h>
+#include <time/delay.h>
+#include <arch/interrupt.h>
+#include <arch/drivers/i8259.h>
+#include <arch/drivers/i8254.h>
+#include <cpu.h>
+#include <config.h>
+#include <arch/pm.h>
+#include <arch/asm.h>
+#include <arch/cpuid.h>
+#include <arch.h>
+#include <time/delay.h>
+#include <interrupt.h>
+/*
+ * i8254 chip driver.
+ * Low level time functions.
+ */
+#define CLK_PORT1   0x40
+#define CLK_PORT4   0x43
+#define CLK_CONST   1193180
+#define MAGIC_NUMBER    1194
+static void i8254_interrupt(int n, istate_t *istate);
+void i8254_init(void)
+{
+    i8254_normal_operation();
+}
+void i8254_normal_operation(void)
+{
+    outb(CLK_PORT4, 0x36);
+    pic_disable_irqs(1<<IRQ_CLK);
+    outb(CLK_PORT1, (CLK_CONST/HZ) & 0xf);
+    outb(CLK_PORT1, (CLK_CONST/HZ) >> 8);
+    pic_enable_irqs(1<<IRQ_CLK);
+    exc_register(VECTOR_CLK, "i8254_clock", (iroutine) i8254_interrupt);
+}
+#define LOOPS 150000
+#define SHIFT 11
+void i8254_calibrate_delay_loop(void)
+{
+    __u64 clk1, clk2;
+    __u32 t1, t2, o1, o2;
+    __u8 not_ok;
+    /*
+     * One-shot timer. Count-down from 0xffff at 1193180Hz
+     * MAGIC_NUMBER is the magic value for 1ms.
+     */
+    outb(CLK_PORT4, 0x30);
+    outb(CLK_PORT1, 0xff);
+    outb(CLK_PORT1, 0xff);
+    do {
+        /* will read both status and count */
+        outb(CLK_PORT4, 0xc2);
+        not_ok = (inb(CLK_PORT1)>>6)&1;
+        t1 = inb(CLK_PORT1);
+        t1 |= inb(CLK_PORT1) << 8;
+    } while (not_ok);
+    asm_delay_loop(LOOPS);
+    outb(CLK_PORT4, 0xd2);
+    t2 = inb(CLK_PORT1);
+    t2 |= inb(CLK_PORT1) << 8;
+    /*
+     * We want to determine the overhead of the calibrating mechanism.
+     */
+    outb(CLK_PORT4, 0xd2);
+    o1 = inb(CLK_PORT1);
+    o1 |= inb(CLK_PORT1) << 8;
+    asm_fake_loop(LOOPS);
+    outb(CLK_PORT4, 0xd2);
+    o2 = inb(CLK_PORT1);
+    o2 |= inb(CLK_PORT1) << 8;
+    CPU->delay_loop_const = ((MAGIC_NUMBER*LOOPS)/1000) / ((t1-t2)-(o1-o2)) + (((MAGIC_NUMBER*LOOPS)/1000) % ((t1-t2)-(o1-o2)) ? 1 : 0);
+    clk1 = rdtsc();
+    delay(1<<SHIFT);
+    clk2 = rdtsc();
+    CPU->frequency_mhz = (clk2-clk1)>>SHIFT;
+    return;
+}
+void i8254_interrupt(int n, istate_t *istate)
+{
+    trap_virtual_eoi();
+    clock();
+}
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/ia32/src/drivers/ega.c
 ,0 → 1,149
+/*
+ * Copyright (C) 2001-2004 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup ia32
+ * @{
+ */
+/** @file
+ */
+#include <arch/drivers/ega.h>
+#include <putchar.h>
+#include <mm/page.h>
+#include <mm/as.h>
+#include <arch/mm/page.h>
+#include <synch/spinlock.h>
+#include <arch/types.h>
+#include <arch/asm.h>
+#include <memstr.h>
+#include <console/chardev.h>
+#include <console/console.h>
+#include <sysinfo/sysinfo.h>
+/*
+ * The EGA driver.
+ * Simple and short. Function for displaying characters and "scrolling".
+ */
+SPINLOCK_INITIALIZE(egalock);
+static __u32 ega_cursor;
+static __u8 *videoram;
+static void ega_putchar(chardev_t *d, const char ch);
+chardev_t ega_console;
+static chardev_operations_t ega_ops = {
+    .write = ega_putchar
+};
+void ega_move_cursor(void);
+void ega_init(void)
+{
+    __u8 hi, lo;
+    videoram = (__u8 *) hw_map(VIDEORAM, SCREEN * 2);
+    outb(0x3d4, 0xe);
+    hi = inb(0x3d5);
+    outb(0x3d4, 0xf);
+    lo = inb(0x3d5);
+    ega_cursor = (hi << 8) | lo;
+    chardev_initialize("ega_out", &ega_console, &ega_ops);
+    stdout = &ega_console;
+    sysinfo_set_item_val("fb", NULL, true);
+    sysinfo_set_item_val("fb.kind", NULL, 2);
+    sysinfo_set_item_val("fb.width", NULL, ROW);
+    sysinfo_set_item_val("fb.height", NULL, ROWS);
+    sysinfo_set_item_val("fb.address.physical", NULL, VIDEORAM);
+#ifndef CONFIG_FB
+    putchar('\n');
+#endif
+}
+static void ega_display_char(char ch)
+{
+    videoram[ega_cursor * 2] = ch;
+}
+/*
+ * This function takes care of scrolling.
+ */
+static void ega_check_cursor(void)
+{
+    if (ega_cursor < SCREEN)
+        return;
+    memcpy((void *) videoram, (void *) (videoram + ROW * 2), (SCREEN - ROW) * 2);
+    memsetw((__address) (videoram + (SCREEN - ROW) * 2), ROW, 0x0720);
+    ega_cursor = ega_cursor - ROW;
+}
+void ega_putchar(chardev_t *d, const char ch)
+{
+    ipl_t ipl;
+    ipl = interrupts_disable();
+    spinlock_lock(&egalock);
+    switch (ch) {
+        case '\n':
+            ega_cursor = (ega_cursor + ROW) - ega_cursor % ROW;
+            break;
+        case '\t':
+            ega_cursor = (ega_cursor + 8) - ega_cursor % 8;
+            break;
+        case '\b':
+            if (ega_cursor % ROW)
+                ega_cursor--;
+            break;
+        default:
+            ega_display_char(ch);
+            ega_cursor++;
+            break;
+    }
+    ega_check_cursor();
+    ega_move_cursor();
+    spinlock_unlock(&egalock);
+    interrupts_restore(ipl);
+}
+void ega_move_cursor(void)
+{
+    outb(0x3d4, 0xe);
+    outb(0x3d5, (ega_cursor >> 8) & 0xff);
+    outb(0x3d4, 0xf);
+    outb(0x3d5, ega_cursor & 0xff);
+}
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/ia32/src/boot/boot.S
 ,0 → 1,431
+#
+# Copyright (C) 2001-2004 Jakub Jermar
+# Copyright (C) 2005-2006 Martin Decky
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# - Redistributions of source code must retain the above copyright
+#   notice, this list of conditions and the following disclaimer.
+# - Redistributions in binary form must reproduce the above copyright
+#   notice, this list of conditions and the following disclaimer in the
+#   documentation and/or other materials provided with the distribution.
+# - The name of the author may not be used to endorse or promote products
+#   derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+#include <arch/boot/boot.h>
+#include <arch/boot/memmap.h>
+#include <arch/mm/page.h>
+#include <arch/pm.h>
+#define START_STACK (BOOT_OFFSET - BOOT_STACK_SIZE)
+.section K_TEXT_START, "ax"
+KTEXT=8
+KDATA=16
+.code32
+.align 4
+.global multiboot_image_start
+multiboot_header:
+    .long MULTIBOOT_HEADER_MAGIC
+    .long MULTIBOOT_HEADER_FLAGS
+    .long -(MULTIBOOT_HEADER_MAGIC + MULTIBOOT_HEADER_FLAGS)    # checksum
+    .long multiboot_header
+    .long unmapped_ktext_start
+    .long 0
+    .long 0
+    .long multiboot_image_start
+multiboot_image_start:
+    movl $START_STACK, %esp         # initialize stack pointer
+    lgdt KA2PA(bootstrap_gdtr)      # initialize Global Descriptor Table register
+    movw $KDATA, %cx
+    movw %cx, %es
+    movw %cx, %fs
+    movw %cx, %gs
+    movw %cx, %ds                   # kernel data + stack
+    movw %cx, %ss
+    jmpl $KTEXT, $multiboot_meeting_point
+    multiboot_meeting_point:
+    pushl %ebx                          # save parameters from GRUB
+    pushl %eax
+#ifdef CONFIG_FB
+    mov $vesa_init, %esi
+    mov $VESA_INIT_SEGMENT << 4, %edi
+    mov $e_vesa_init - vesa_init, %ecx
+    cld
+    rep movsb
+    mov $VESA_INIT_SEGMENT << 4, %edi
+    jmpl %edi
+    vesa_meeting_point:
+    mov %esi, KA2PA(vesa_ph_addr)
+    mov %di, KA2PA(vesa_height)
+    shr $16, %edi
+    mov %di, KA2PA(vesa_width)
+    mov %bx, KA2PA(vesa_scanline)
+    shr $16, %ebx
+    mov %bx, KA2PA(vesa_bpp)
+#endif
+    call map_kernel                         # map kernel and turn paging on
+    popl %eax
+    popl %ebx
+    cmpl $MULTIBOOT_LOADER_MAGIC, %eax              # compare GRUB signature
+    je valid_boot
+        xorl %ecx, %ecx                         # no memory size or map available
+        movl %ecx, e801memorysize
+        movl %ecx, e820counter
+        jmp invalid_boot
+    valid_boot:
+        movl (%ebx), %eax                       # ebx = physical address of struct multiboot_info
+        bt $0, %eax                             # mbi->flags[0] (mem_lower, mem_upper valid)
+        jc mem_valid
+            xorl %ecx, %ecx
+            jmp mem_invalid
+        mem_valid:
+        movl 4(%ebx), %ecx                      # mbi->mem_lower
+        addl 8(%ebx), %ecx                      # mbi->mem_upper
+        mem_invalid:
+        movl %ecx, e801memorysize
+        bt $3, %eax                             # mbi->flags[3] (mods_count, mods_addr valid)
+        jc mods_valid
+            xorl %ecx, %ecx
+            movl %ecx, init
+            jmp mods_end
+        mods_valid:
+        movl 20(%ebx), %ecx                     # mbi->mods_count
+        movl %ecx, init
+        cmpl $0, %ecx
+        je mods_end
+        movl 24(%ebx), %esi                     # mbi->mods_addr
+        movl $init, %edi
+        mods_loop:
+            movl 0(%esi), %edx                  # mods->mod_start
+            addl $0x80000000, %edx
+            movl %edx, 4(%edi)
+            movl 4(%esi), %edx
+            subl 0(%esi), %edx                  # mods->mod_end - mods->mod_start
+            movl %edx, 8(%edi)
+            addl $16, %esi
+            addl $8 , %edi
+            loop mods_loop
+        mods_end:
+        bt $6, %eax                             # mbi->flags[6] (mmap_length, mmap_addr valid)
+        jc mmap_valid
+            xorl %edx, %edx
+            jmp mmap_invalid
+        mmap_valid:
+        movl 44(%ebx), %ecx                     # mbi->mmap_length
+        movl 48(%ebx), %esi                     # mbi->mmap_addr
+        movl $e820table, %edi
+        xorl %edx, %edx
+        mmap_loop:
+            cmpl $0, %ecx
+            jle mmap_end
+            movl 4(%esi), %eax                  # mmap->base_addr_low
+            movl %eax, (%edi)
+            movl 8(%esi), %eax                  # mmap->base_addr_high
+            movl %eax, 4(%edi)
+            movl 12(%esi), %eax                 # mmap->length_low
+            movl %eax, 8(%edi)
+            movl 16(%esi), %eax                 # mmap->length_high
+            movl %eax, 12(%edi)
+            movl 20(%esi), %eax                 # mmap->type
+            movl %eax, 16(%edi)
+            movl (%esi), %eax                   # mmap->size
+            addl $0x4, %eax
+            addl %eax, %esi
+            subl %eax, %ecx
+            addl $MEMMAP_E820_RECORD_SIZE, %edi
+            incl %edx
+            jmp mmap_loop
+        mmap_end:
+        mmap_invalid:
+        movl %edx, e820counter
+    invalid_boot:
+#ifdef CONFIG_SMP
+    # copy AP bootstrap routines below 1 MB
+    movl $BOOT_OFFSET, %esi
+    movl $AP_BOOT_OFFSET, %edi
+    movl $_hardcoded_unmapped_size, %ecx
+    cld
+    rep movsb
+#endif
+    call main_bsp                               # never returns
+    cli
+    hlt
+.global map_kernel
+map_kernel:
+    #
+    # Here we setup mapping for both the unmapped and mapped sections of the kernel.
+    # For simplicity, we map the entire 4G space.
+    #
+    movl %cr4, %ecx
+    orl $(1<<4), %ecx
+    movl %ecx, %cr4                         # turn PSE on
+    movl $(page_directory+0), %esi
+    movl $(page_directory+2048), %edi
+    xorl %ecx, %ecx
+    xorl %ebx, %ebx
+:
+    movl $((1<<7)|(1<<0)), %eax
+    orl %ebx, %eax
+    movl %eax, (%esi,%ecx,4)                    # mapping 0x00000000+%ecx*4M => 0x00000000+%ecx*4M
+    movl %eax, (%edi,%ecx,4)                    # mapping 0x80000000+%ecx*4M => 0x00000000+%ecx*4M
+    addl $(4*1024*1024), %ebx
+    incl %ecx
+    cmpl $512, %ecx
+    jl 0b
+    movl %esi, %cr3
+    # turn paging on
+    movl %cr0, %ebx
+    orl $(1<<31), %ebx
+    movl %ebx, %cr0
+    ret
+#ifdef CONFIG_FB
+vesa_init:
+    jmp $selector(VESA_INIT_DES), $vesa_init_real - vesa_init
+.code16
+vesa_init_real:
+    mov %cr0, %eax
+    and $~1, %eax
+    mov %eax, %cr0
+    jmp $VESA_INIT_SEGMENT, $vesa_init_real2 - vesa_init
+vesa_init_real2:
+    mov $VESA_INIT_SEGMENT, %bx
+    mov %bx, %es
+    mov %bx, %fs
+    mov %bx, %gs
+    mov %bx, %ds
+    mov %bx, %ss
+    movl %esp, %eax
+    movl $0x0000fffc, %esp
+    movl $0x0000fffc, %ebp
+    pushl %eax
+#define VESA_INFO_SIZE 1024
+#define VESA_MODE_LIST_PTR_OFFSET 14
+#define VESA_MODE_WIDTH_OFFSET 18
+#define VESA_MODE_HEIGHT_OFFSET 20
+#define VESA_MODE_BPP_OFFSET 25
+#define VESA_MODE_SCANLINE_OFFSET 16
+#define VESA_MODE_PHADDR_OFFSET 40
+#define VESA_END_OF_MODES 0xffff
+#define VESA_OK 0x4f
+#define VESA_GET_INFO 0x4f00
+#define VESA_GET_MODE_INFO 0x4f01
+#define VESA_SET_MODE 0x4f02
+#define CONFIG_VESA_BPP_a 255
+#if CONFIG_VESA_BPP == 24
+#undef CONFIG_VESA_BPP_a
+#define CONFIG_VESA_BPP_a 32
+#endif
+    mov $VESA_GET_INFO, %ax
+    mov $e_vesa_init - vesa_init, %di
+    push %di
+    int $0x10
+    pop %di
+    cmp $VESA_OK, %al
+    jnz 0f
+    mov 2 + VESA_MODE_LIST_PTR_OFFSET(%di), %si
+    mov %si, %gs
+    mov VESA_MODE_LIST_PTR_OFFSET(%di), %si
+    add $VESA_INFO_SIZE, %di
+:# Try next mode
+    mov %gs:(%si), %cx
+    cmp $VESA_END_OF_MODES, %cx
+    jz 0f
+    inc %si
+    inc %si
+    push %cx
+    push %di
+    push %si
+    mov $VESA_GET_MODE_INFO, %ax
+    int $0x10
+    pop %si
+    pop %di
+    pop %cx
+    cmp $VESA_OK, %al
+    jnz 0f
+    mov $CONFIG_VESA_WIDTH, %ax
+    cmp VESA_MODE_WIDTH_OFFSET(%di), %ax
+    jnz 1b
+    mov $CONFIG_VESA_HEIGHT,%ax
+    cmp VESA_MODE_HEIGHT_OFFSET(%di), %ax
+    jnz 1b
+    mov $CONFIG_VESA_BPP, %al
+    cmp VESA_MODE_BPP_OFFSET(%di), %al
+    jz 2f
+    mov $CONFIG_VESA_BPP_a, %al
+    cmp VESA_MODE_BPP_OFFSET(%di), %al
+    jnz 1b
+:
+    mov %cx, %bx
+    or $0xc000, %bx
+    push %di
+    mov $VESA_SET_MODE, %ax
+    int $0x10
+    pop %di
+    cmp $VESA_OK, %al
+    jnz 0f
+    mov VESA_MODE_PHADDR_OFFSET(%di), %esi
+    mov VESA_MODE_WIDTH_OFFSET(%di), %ax
+    shl $16, %eax
+    mov VESA_MODE_HEIGHT_OFFSET(%di), %ax
+    mov VESA_MODE_BPP_OFFSET(%di), %bl
+    xor %bh, %bh
+    shl $16, %ebx
+    mov VESA_MODE_SCANLINE_OFFSET(%di), %bx
+    mov %eax, %edi
+:
+    mov %cr0, %eax
+    or $1, %eax
+    mov %eax, %cr0
+    jmp 9f
+:
+    ljmpl $KTEXT, $(vesa_init_protect - vesa_init + VESA_INIT_SEGMENT << 4)
+:# No prefered mode found
+    mov $0x111, %cx
+    push %di
+    push %cx
+    mov $VESA_GET_MODE_INFO, %ax
+    int $0x10
+    pop %cx
+    pop %di
+    cmp $VESA_OK, %al
+    jnz 1f
+    jz 2b                       # Force relative jump
+:
+    mov $0x0003, %ax
+    int $0x10
+    mov $0xffffffff, %edi       # EGA text mode used, because of problems with VESA
+    xor %ax, %ax
+    jz 8b                       # Force relative jump
+.code32
+vesa_init_protect:
+    popl %esp
+    movw $KDATA, %cx
+    movw %cx, %es
+    movw %cx, %fs
+    movw %cx, %gs
+    movw %cx, %ds                   # kernel data + stack
+    movw %cx, %ss
+    jmpl $KTEXT, $vesa_meeting_point
+.align 4
+e_vesa_init:
+#endif
+.section K_DATA_START, "aw", @progbits
+.align 4096
+page_directory:
+    .space 4096, 0

 /tags/0.2.0.2/kernel/arch/ia32/src/asm.S
 ,0 → 1,276
+#
+# Copyright (C) 2001-2004 Jakub Jermar
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# - Redistributions of source code must retain the above copyright
+#   notice, this list of conditions and the following disclaimer.
+# - Redistributions in binary form must reproduce the above copyright
+#   notice, this list of conditions and the following disclaimer in the
+#   documentation and/or other materials provided with the distribution.
+# - The name of the author may not be used to endorse or promote products
+#   derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+## very low and hardware-level functions
+# Mask for interrupts 0 - 31 (bits 0 - 31) where 0 means that int has no error word
+# and 1 means interrupt with error word
+#define ERROR_WORD_INTERRUPT_LIST 0x00027D00
+.text
+.global paging_on
+.global enable_l_apic_in_msr
+.global interrupt_handlers
+.global memcpy
+.global memcpy_from_uspace
+.global memcpy_from_uspace_failover_address
+.global memcpy_to_uspace
+.global memcpy_to_uspace_failover_address
+#define MEMCPY_DST  4
+#define MEMCPY_SRC  8
+#define MEMCPY_SIZE 12
+/** Copy memory to/from userspace.
+ *
+ * This is almost conventional memcpy().
+ * The difference is that there is a failover part
+ * to where control is returned from a page fault
+ * if the page fault occurs during copy_from_uspace()
+ * or copy_to_uspace().
+ *
+ * @param MEMCPY_DST(%esp)  Destination address.
+ * @param MEMCPY_SRC(%esp)  Source address.
+ * @param MEMCPY_SIZE(%esp) Size.
+ *
+ * @return MEMCPY_SRC(%esp) on success and 0 on failure.
+ */
+memcpy:
+memcpy_from_uspace:
+memcpy_to_uspace:
+    movl %edi, %edx             /* save %edi */
+    movl %esi, %eax             /* save %esi */
+    movl MEMCPY_SIZE(%esp), %ecx
+    shrl $2, %ecx               /* size / 4 */
+    movl MEMCPY_DST(%esp), %edi
+    movl MEMCPY_SRC(%esp), %esi
+    rep movsl               /* copy as much as possible word by word */
+    movl MEMCPY_SIZE(%esp), %ecx
+    andl $3, %ecx               /* size % 4 */
+    jz 0f
+    rep movsb               /* copy the rest byte by byte */
+:
+    movl %edx, %edi
+    movl %eax, %esi
+    movl MEMCPY_SRC(%esp), %eax     /* MEMCPY_SRC(%esp), success */
+    ret
+/*
+ * We got here from as_page_fault() after the memory operations
+ * above had caused a page fault.
+ */
+memcpy_from_uspace_failover_address:
+memcpy_to_uspace_failover_address:
+    movl %edx, %edi
+    movl %eax, %esi
+    xorl %eax, %eax             /* return 0, failure */
+    ret
+## Turn paging on
+#
+# Enable paging and write-back caching in CR0.
+#
+paging_on:
+    movl %cr0,%edx
+    orl $(1<<31),%edx       # paging on
+    andl $~((1<<30)|(1<<29)),%edx   # clear Cache Disable and not Write Though
+    movl %edx,%cr0
+    jmp 0f
+:
+    ret
+## Enable local APIC
+#
+# Enable local APIC in MSR.
+#
+enable_l_apic_in_msr:
+    push %eax
+    movl $0x1b, %ecx
+    rdmsr
+    orl $(1<<11),%eax
+    orl $(0xfee00000),%eax
+    wrmsr
+    pop %eax
+    ret
+# Clear nested flag
+# overwrites %ecx
+.macro CLEAR_NT_FLAG
+    pushfl
+    pop %ecx
+    and $0xffffbfff,%ecx
+    push %ecx
+    popfl
+.endm
+## Declare interrupt handlers
+#
+# Declare interrupt handlers for n interrupt
+# vectors starting at vector i.
+#
+# The handlers setup data segment registers
+# and call exc_dispatch().
+#
+#define INTERRUPT_ALIGN 64
+.macro handler i n
+.ifeq \i-0x30     # Syscall handler
+    push %ds
+    push %es
+    push %fs
+    push %gs
+    # Push arguments on stack
+    push %edi
+    push %esi
+    push %edx
+    push %ecx
+    push %eax
+    # we must fill the data segment registers
+    movw $16,%ax
+    movw %ax,%ds
+    movw %ax,%es
+    sti
+    call syscall_handler   # syscall_handler(ax,cx,dx,si,di)
+    cli
+    addl $20, %esp         # clean-up of parameters
+    pop %gs
+    pop %fs
+    pop %es
+    pop %ds
+    CLEAR_NT_FLAG
+    iret
+.else
+    /*
+     * This macro distinguishes between two versions of ia32 exceptions.
+     * One version has error word and the other does not have it.
+     * The latter version fakes the error word on the stack so that the
+     * handlers and istate_t can be the same for both types.
+     */
+    .iflt \i-32
+        .if (1 << \i) & ERROR_WORD_INTERRUPT_LIST
+            /*
+             * With error word, do nothing
+             */
+                .else
+                        /*
+                         * Version without error word,
+                         */
+            subl $4, %esp
+                .endif
+        .else
+                /*
+                 * Version without error word,
+                 */
+        subl $4, %esp
+    .endif
+    push %ds
+    push %es
+    push %fs
+    push %gs
+#ifdef CONFIG_DEBUG_ALLREGS
+    push %ebx
+    push %ebp
+    push %edi
+    push %esi
+#else
+    sub $16, %esp
+#endif
+    push %edx
+    push %ecx
+    push %eax
+    # we must fill the data segment registers
+    movw $16,%ax
+    movw %ax,%ds
+    movw %ax,%es
+    pushl %esp          # *istate
+    pushl $(\i)         # intnum
+    call exc_dispatch   # excdispatch(intnum, *istate)
+    addl $8,%esp        # Clear arguments from stack
+    CLEAR_NT_FLAG # Modifies %ecx
+    pop %eax
+    pop %ecx
+    pop %edx
+#ifdef CONFIG_DEBUG_ALLREGS
+    pop %esi
+    pop %edi
+    pop %ebp
+    pop %ebx
+#else
+    add $16, %esp
+#endif
+    pop %gs
+    pop %fs
+    pop %es
+    pop %ds
+    addl $4,%esp    # Skip error word, no matter whether real or fake.
+    iret
+.endif
+    .align INTERRUPT_ALIGN
+    .if (\n-\i)-1
+    handler "(\i+1)",\n
+    .endif
+.endm
+# keep in sync with pm.h !!!
+IDT_ITEMS=64
+.align INTERRUPT_ALIGN
+interrupt_handlers:
+h_start:
+    handler 0 IDT_ITEMS
+h_end:
+.data
+.global interrupt_handler_size
+interrupt_handler_size: .long (h_end-h_start)/IDT_ITEMS

/tags/0.2.0.2/kernel/arch/ia32/src/debugger.c
0,0 → 1,0
link ../../amd64/src/debugger.c
Property changes:
Added: svn:special
+*
\ No newline at end of property

 /tags/0.2.0.2/kernel/arch/ia32/src/atomic.S
 ,0 → 1,60
+#
+# Copyright (C) 2001-2004 Jakub Jermar
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# - Redistributions of source code must retain the above copyright
+#   notice, this list of conditions and the following disclaimer.
+# - Redistributions in binary form must reproduce the above copyright
+#   notice, this list of conditions and the following disclaimer in the
+#   documentation and/or other materials provided with the distribution.
+# - The name of the author may not be used to endorse or promote products
+#   derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+.text
+#ifdef CONFIG_SMP
+.global spinlock_arch
+#
+# This is a bus-and-hyperthreading-friendly implementation of spinlock
+#
+spinlock_arch:
+    pushl %eax
+    pushl %ebx
+    movl 12(%esp),%ebx
+:
+    #ifdef CONFIG_HT
+    pause           # Pentium 4's with HT love this instruction
+    #endif
+    movl (%ebx),%eax
+    testl %eax,%eax
+    jnz 0b          # lightweight looping while it is locked
+    incl %eax
+    xchgl %eax,(%ebx)   # now use the atomic operation
+    testl %eax,%eax
+    jnz 0b
+    popl %ebx
+    popl %eax
+    ret
+#endif

 /tags/0.2.0.2/kernel/arch/ia32/src/context.s
 ,0 → 1,72
+#
+# Copyright (C) 2001-2004 Jakub Jermar
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# - Redistributions of source code must retain the above copyright
+#   notice, this list of conditions and the following disclaimer.
+# - Redistributions in binary form must reproduce the above copyright
+#   notice, this list of conditions and the following disclaimer in the
+#   documentation and/or other materials provided with the distribution.
+# - The name of the author may not be used to endorse or promote products
+#   derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+.text
+.global context_save_arch
+.global context_restore_arch
+## Save current CPU context
+#
+# Save CPU context to the context_t variable
+# pointed by the 1st argument. Returns 1 in EAX.
+#
+context_save_arch:
+    movl 0(%esp),%eax   # the caller's return %eip
+    movl 4(%esp),%edx   # address of the kernel_context variable to save context to
+    movl %esp,0(%edx)   # %esp -> ctx->sp
+    movl %eax,4(%edx)   # %eip -> ctx->pc
+    movl %ebx,8(%edx)   # %ebx -> ctx->ebx
+    movl %esi,12(%edx)  # %esi -> ctx->esi
+    movl %edi,16(%edx)  # %edi -> ctx->edi
+    movl %ebp,20(%edx)  # %ebp -> ctx->ebp
+    xorl %eax,%eax      # context_save returns 1
+    incl %eax
+    ret
+## Restore saved CPU context
+#
+# Restore CPU context from context_t variable
+# pointed by the 1st argument. Returns 0 in EAX.
+#
+context_restore_arch:
+    movl 4(%esp),%eax   # address of the kernel_context variable to restore context from
+    movl 0(%eax),%esp   # ctx->sp -> %esp
+    movl 4(%eax),%edx   # ctx->pc -> %edx
+    movl 8(%eax),%ebx   # ctx->ebx -> %ebx
+    movl 12(%eax),%esi  # ctx->esi -> %esi
+    movl 16(%eax),%edi  # ctx->edi -> %edi
+    movl 20(%eax),%ebp  # ctx->ebp -> %ebp
+    movl %edx,0(%esp)   # ctx->pc -> saver's return %eip
+    xorl %eax,%eax      # context_restore returns 0
+    ret

 /tags/0.2.0.2/kernel/arch/ia32/src/delay.s
 ,0 → 1,50
+#
+# Copyright (C) 2001-2004 Jakub Jermar
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# - Redistributions of source code must retain the above copyright
+#   notice, this list of conditions and the following disclaimer.
+# - Redistributions in binary form must reproduce the above copyright
+#   notice, this list of conditions and the following disclaimer in the
+#   documentation and/or other materials provided with the distribution.
+# - The name of the author may not be used to endorse or promote products
+#   derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+#
+# Micro second delay loop functions.
+#
+.text
+.global asm_delay_loop
+.global asm_fake_loop
+asm_delay_loop:
+    movl 4(%esp),%ecx   # move argument to %ecx
+:  lahf
+    dec %ecx
+    jnz 0b
+    ret
+asm_fake_loop:
+    movl 4(%esp),%ecx   # move argument to %ecx
+:  lahf
+    dec %ecx
+    jz 0b
+    ret

 /tags/0.2.0.2/kernel/arch/ia32/src/debug/panic.s
 ,0 → 1,34
+#
+# Copyright (C) 2001-2004 Jakub Jermar
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# - Redistributions of source code must retain the above copyright
+#   notice, this list of conditions and the following disclaimer.
+# - Redistributions in binary form must reproduce the above copyright
+#   notice, this list of conditions and the following disclaimer in the
+#   documentation and/or other materials provided with the distribution.
+# - The name of the author may not be used to endorse or promote products
+#   derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+.text
+.global panic_printf
+panic_printf:
+    movl $halt,(%esp)   # fake stack to make printf return to halt
+    jmp printf

 /tags/0.2.0.2/kernel/arch/ia32/include/cpuid.h
 ,0 → 1,120
+/*
+ * Copyright (C) 2001-2004 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/** @addtogroup ia32
+ * @{
+ */
+/** @file
+ */
+#ifndef __ia32_CPUID_H__
+#define __ia32_CPUID_H__
+#include <arch/types.h>
+struct cpu_info {
+    __u32 cpuid_eax;
+    __u32 cpuid_ebx;
+    __u32 cpuid_ecx;
+    __u32 cpuid_edx;
+} __attribute__ ((packed));
+struct __cpuid_extended_feature_info {
+    unsigned sse3 :  1;
+    unsigned      : 31;
+} __attribute__ ((packed));
+typedef union cpuid_extended_feature_info
+{
+    struct __cpuid_extended_feature_info bits;
+    __u32                                word;
+}cpuid_extended_feature_info;
+struct __cpuid_feature_info {
+    unsigned            : 23;
+    unsigned mmx  :  1;
+    unsigned fxsr :  1;
+    unsigned sse  :  1;
+    unsigned sse2 :  1;
+    unsigned      :  5;
+} __attribute__ ((packed));
+typedef union cpuid_feature_info
+{
+    struct __cpuid_feature_info bits;
+    __u32                word       ;
+}cpuid_feature_info;
+static inline __u32 has_cpuid(void)
+{
+    __u32 val, ret;
+    __asm__ volatile (
+        "pushf\n"               /* read flags */
+        "popl %0\n"
+        "movl %0, %1\n"
+        "btcl $21, %1\n"        /* swap the ID bit */
+        "pushl %1\n"            /* propagate the change into flags */
+        "popf\n"
+        "pushf\n"
+        "popl %1\n"
+        "andl $(1 << 21), %0\n" /* interrested only in ID bit */
+        "andl $(1 << 21), %1\n"
+        "xorl %1, %0\n"
+        : "=r" (ret), "=r" (val)
+    );
+    return ret;
+}
+static inline void cpuid(__u32 cmd, struct cpu_info *info)
+{
+    __asm__ volatile (
+        "movl %4, %%eax\n"
+        "cpuid\n"
+        "movl %%eax, %0\n"
+        "movl %%ebx, %1\n"
+        "movl %%ecx, %2\n"
+        "movl %%edx, %3\n"
+        : "=m" (info->cpuid_eax), "=m" (info->cpuid_ebx), "=m" (info->cpuid_ecx), "=m" (info->cpuid_edx)
+        : "m" (cmd)
+        : "eax", "ebx", "ecx", "edx"
+    );
+}
+#endif
+/** @}
+ */

 /tags/0.2.0.2/kernel/arch/ia32/include/ddi/ddi.h
 ,0 → 1,46
+/*
+ * Copyright (C) 2006 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/** @addtogroup ia32ddi
+ * @{
+ */
+/**
+ * @file
+ * @brief   ia32 specific DDI declarations and macros.
+ */
+#ifndef __ia32_DDI_H__
+#define __ia32_DDI_H__
+extern void io_perm_bitmap_install(void);
+#endif
+/** @}
+ */

 /tags/0.2.0.2/kernel/arch/ia32/include/cpu.h
 ,0 → 1,61
+/*
+ * Copyright (C) 2001-2004 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/** @addtogroup ia32
+ * @{
+ */
+/** @file
+ */
+#ifndef __ia32_CPU_H__
+#define __ia32_CPU_H__
+#include <typedefs.h>
+#include <arch/pm.h>
+#include <arch/asm.h>
+#define EFLAGS_IF       (1 << 9)
+#define EFLAGS_RF       (1 << 16)
+struct cpu_arch {
+    int vendor;
+    int family;
+    int model;
+    int stepping;
+    struct tss *tss;
+    count_t iomapver_copy;  /** Copy of TASK's I/O Permission bitmap generation count. */
+};
+#define CR4_OSFXSR_MASK (1<<9)
+#endif
+/** @}
+ */

 /tags/0.2.0.2/kernel/arch/ia32/include/interrupt.h
 ,0 → 1,129
+/*
+ * Copyright (C) 2001-2004 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/** @addtogroup ia32interrupt
+ * @{
+ */
+/** @file
+ */
+#ifndef __ia32_INTERRUPT_H__
+#define __ia32_INTERRUPT_H__
+#include <arch/types.h>
+#include <arch/pm.h>
+#define IVT_ITEMS       IDT_ITEMS
+#define EXC_COUNT   32
+#define IRQ_COUNT   16
+#define IVT_EXCBASE     0
+#define IVT_IRQBASE     (IVT_EXCBASE+EXC_COUNT)
+#define IVT_FREEBASE        (IVT_IRQBASE+IRQ_COUNT)
+#define IRQ_CLK     0
+#define IRQ_KBD     1
+#define IRQ_PIC1    2
+#define IRQ_PIC_SPUR    7
+/* this one must have four least significant bits set to ones */
+#define VECTOR_APIC_SPUR    (IVT_ITEMS-1)
+#if (((VECTOR_APIC_SPUR + 1)%16) || VECTOR_APIC_SPUR >= IVT_ITEMS)
+#error Wrong definition of VECTOR_APIC_SPUR
+#endif
+#define VECTOR_DEBUG            1
+#define VECTOR_PIC_SPUR     (IVT_IRQBASE+IRQ_PIC_SPUR)
+#define VECTOR_CLK      (IVT_IRQBASE+IRQ_CLK)
+#define VECTOR_KBD      (IVT_IRQBASE+IRQ_KBD)
+#define VECTOR_SYSCALL          (IVT_FREEBASE+0)
+#define VECTOR_TLB_SHOOTDOWN_IPI    (IVT_FREEBASE+1)
+#define VECTOR_DEBUG_IPI                (IVT_FREEBASE+2)
+struct istate {
+    __u32 eax;
+    __u32 ecx;
+    __u32 edx;
+    __u32 esi;
+    __u32 edi;
+    __u32 ebp;
+    __u32 ebx;
+    __u32 gs;
+    __u32 fs;
+    __u32 es;
+    __u32 ds;
+    __u32 error_word;
+    __u32 eip;
+    __u32 cs;
+    __u32 eflags;
+    __u32 stack[];
+};
+/** Return true if exception happened while in userspace */
+static inline int istate_from_uspace(istate_t *istate)
+{
+    return !(istate->eip & 0x80000000);
+}
+static inline void istate_set_retaddr(istate_t *istate, __address retaddr)
+{
+    istate->eip = retaddr;
+}
+static inline __native istate_get_pc(istate_t *istate)
+{
+    return istate->eip;
+}
+extern void (* disable_irqs_function)(__u16 irqmask);
+extern void (* enable_irqs_function)(__u16 irqmask);
+extern void (* eoi_function)(void);
+extern void PRINT_INFO_ERRCODE(istate_t *istate);
+extern void null_interrupt(int n, istate_t *istate);
+extern void gp_fault(int n, istate_t *istate);
+extern void nm_fault(int n, istate_t *istate);
+extern void ss_fault(int n, istate_t *istate);
+extern void simd_fp_exception(int n, istate_t *istate);
+extern void syscall(int n, istate_t *istate);
+extern void tlb_shootdown_ipi(int n, istate_t *istate);
+extern void trap_virtual_enable_irqs(__u16 irqmask);
+extern void trap_virtual_disable_irqs(__u16 irqmask);
+extern void trap_virtual_eoi(void);
+#endif
+/** @}
+ */

 /tags/0.2.0.2/kernel/arch/ia32/include/fpu_context.h
 ,0 → 1,56
+/*
+ * Copyright (C) 2005 Jakub Vana
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup ia32
+ * @{
+ */
+/** @file
+ */
+#ifndef __ia32_FPU_CONTEXT_H__
+#define __ia32_FPU_CONTEXT_H__
+#include <arch/types.h>
+#define ARCH_HAS_FPU
+#define FPU_CONTEXT_ALIGN 16
+void fpu_fxsr(void);
+void fpu_fsr(void);
+struct fpu_context {
+    __u8 fpu[512];      /* FXSAVE & FXRSTOR storage area */
+};
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/ia32/include/byteorder.h
 ,0 → 1,46
+/*
+ * Copyright (C) 2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup ia32
+ * @{
+ */
+/** @file
+ */
+#ifndef __ia32_BYTEORDER_H__
+#define __ia32_BYTEORDER_H__
+/* IA-32 is little-endian */
+#define __native_le2host(n)     (n)
+#define __u64_le2host(n)        (n)
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/ia32/include/types.h
 ,0 → 1,64
+/*
+ * Copyright (C) 2001-2004 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup ia32
+ * @{
+ */
+/** @file
+ */
+#ifndef __TYPES_H__
+#define __TYPES_H__
+#define NULL 0
+typedef signed char __s8;
+typedef signed short __s16;
+typedef signed long __s32;
+typedef signed long long __s64;
+typedef unsigned char __u8;
+typedef unsigned short __u16;
+typedef unsigned long __u32;
+typedef unsigned long long __u64;
+typedef __u32 __address;
+typedef __u32 pfn_t;
+typedef __u32 ipl_t;
+typedef __u32 __native;
+typedef __s32 __snative;
+typedef struct page_specifier pte_t;
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/ia32/include/elf.h
 ,0 → 1,46
+/*
+ * Copyright (C) 2006 Sergey Bondari
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup ia32
+ * @{
+ */
+/** @file
+ */
+#ifndef __ia32_ELF_H__
+#define __ia32_ELF_H__
+#define ELF_MACHINE     EM_386
+#define ELF_DATA_ENCODING   ELFDATA2LSB
+#define ELF_CLASS       ELFCLASS32
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/ia32/include/bios/bios.h
 ,0 → 1,50
+/*
+ * Copyright (C) 2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup ia32
+ * @{
+ */
+/** @file
+ */
+#ifndef __BIOS_H__
+#define __BIOS_H__
+#include <arch/types.h>
+#define BIOS_EBDA_PTR   0x40e
+extern __address ebda;
+extern void bios_init(void);
+#endif /* __BIOS_H__ */
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/ia32/include/memstr.h
 ,0 → 1,152
+/*
+ * Copyright (C) 2005 Sergey Bondari
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup ia32
+ * @{
+ */
+/** @file
+ */
+#ifndef __ia32_MEMSTR_H__
+#define __ia32_MEMSTR_H__
+/** Copy memory
+ *
+ * Copy a given number of bytes (3rd argument)
+ * from the memory location defined by 2nd argument
+ * to the memory location defined by 1st argument.
+ * The memory areas cannot overlap.
+ *
+ * @param dst Destination
+ * @param src Source
+ * @param cnt Number of bytes
+ * @return Destination
+ */
+static inline void * memcpy(void * dst, const void * src, size_t cnt)
+{
+        __native d0, d1, d2;
+        __asm__ __volatile__(
+                /* copy all full dwords */
+                "rep movsl\n\t"
+                /* load count again */
+                "movl %4, %%ecx\n\t"
+                /* ecx = ecx mod 4 */
+                "andl $3, %%ecx\n\t"
+                /* are there last <=3 bytes? */
+                "jz 1f\n\t"
+                /* copy last <=3 bytes */
+                "rep movsb\n\t"
+                /* exit from asm block */
+                "1:\n"
+                : "=&c" (d0), "=&D" (d1), "=&S" (d2)
+                : "0" ((__native) (cnt / 4)), "g" ((__native) cnt), "1" ((__native) dst), "2" ((__native) src)
+                : "memory");
+        return dst;
+}
+/** Compare memory regions for equality
+ *
+ * Compare a given number of bytes (3rd argument)
+ * at memory locations defined by 1st and 2nd argument
+ * for equality. If bytes are equal function returns 0.
+ *
+ * @param src Region 1
+ * @param dst Region 2
+ * @param cnt Number of bytes
+ * @return Zero if bytes are equal, non-zero otherwise
+ */
+static inline int memcmp(const void * src, const void * dst, size_t cnt)
+{
+    __u32 d0, d1, d2;
+    int ret;
+    __asm__ (
+        "repe cmpsb\n\t"
+        "je 1f\n\t"
+        "movl %3, %0\n\t"
+        "addl $1, %0\n\t"
+        "1:\n"
+        : "=a" (ret), "=%S" (d0), "=&D" (d1), "=&c" (d2)
+        : "0" (0), "1" ((__native) src), "2" ((__native) dst), "3" ((__native) cnt)
+    );
+    return ret;
+}
+/** Fill memory with words
+ * Fill a given number of words (2nd argument)
+ * at memory defined by 1st argument with the
+ * word value defined by 3rd argument.
+ *
+ * @param dst Destination
+ * @param cnt Number of words
+ * @param x Value to fill
+ */
+static inline void memsetw(__address dst, size_t cnt, __u16 x)
+{
+    __u32 d0, d1;
+    __asm__ __volatile__ (
+        "rep stosw\n\t"
+        : "=&D" (d0), "=&c" (d1), "=a" (x)
+        : "0" (dst), "1" (cnt), "2" (x)
+        : "memory"
+    );
+}
+/** Fill memory with bytes
+ * Fill a given number of bytes (2nd argument)
+ * at memory defined by 1st argument with the
+ * word value defined by 3rd argument.
+ *
+ * @param dst Destination
+ * @param cnt Number of bytes
+ * @param x Value to fill
+ */
+static inline void memsetb(__address dst, size_t cnt, __u8 x)
+{
+    __u32 d0, d1;
+    __asm__ __volatile__ (
+        "rep stosb\n\t"
+        : "=&D" (d0), "=&c" (d1), "=a" (x)
+        : "0" (dst), "1" (cnt), "2" (x)
+        : "memory"
+    );
+}
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/ia32/include/arg.h
 ,0 → 1,44
+/*
+ * Copyright (C) 2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup ia32
+ * @{
+ */
+/** @file
+ */
+#ifndef __ia32_ARG_H__
+#define __ia32_ARG_H__
+#include <stackarg.h>
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/ia32/include/smp/apic.h
 ,0 → 1,371
+/*
+ * Copyright (C) 2001-2004 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup ia32
+ * @{
+ */
+/** @file
+ */
+#ifndef __APIC_H__
+#define __APIC_H__
+#include <arch/types.h>
+#include <cpu.h>
+#define FIXED       (0<<0)
+#define LOPRI       (1<<0)
+#define APIC_ID_COUNT   16
+/* local APIC macros */
+#define IPI_INIT    0
+#define IPI_STARTUP 0
+/** Delivery modes. */
+#define DELMOD_FIXED    0x0
+#define DELMOD_LOWPRI   0x1
+#define DELMOD_SMI  0x2
+/* 0x3 reserved */
+#define DELMOD_NMI  0x4
+#define DELMOD_INIT 0x5
+#define DELMOD_STARTUP  0x6
+#define DELMOD_EXTINT   0x7
+/** Destination modes. */
+#define DESTMOD_PHYS    0x0
+#define DESTMOD_LOGIC   0x1
+/** Trigger Modes. */
+#define TRIGMOD_EDGE    0x0
+#define TRIGMOD_LEVEL   0x1
+/** Levels. */
+#define LEVEL_DEASSERT  0x0
+#define LEVEL_ASSERT    0x1
+/** Destination Shorthands. */
+#define SHORTHAND_NONE      0x0
+#define SHORTHAND_SELF      0x1
+#define SHORTHAND_ALL_INCL  0x2
+#define SHORTHAND_ALL_EXCL  0x3
+/** Interrupt Input Pin Polarities. */
+#define POLARITY_HIGH   0x0
+#define POLARITY_LOW    0x1
+/** Divide Values. (Bit 2 is always 0) */
+#define DIVIDE_2    0x0
+#define DIVIDE_4    0x1
+#define DIVIDE_8    0x2
+#define DIVIDE_16   0x3
+#define DIVIDE_32   0x8
+#define DIVIDE_64   0x9
+#define DIVIDE_128  0xa
+#define DIVIDE_1    0xb
+/** Timer Modes. */
+#define TIMER_ONESHOT   0x0
+#define TIMER_PERIODIC  0x1
+/** Delivery status. */
+#define DELIVS_IDLE 0x0
+#define DELIVS_PENDING  0x1
+/** Destination masks. */
+#define DEST_ALL    0xff
+/** Dest format models. */
+#define MODEL_FLAT  0xf
+#define MODEL_CLUSTER   0x0
+/** Interrupt Command Register. */
+#define ICRlo       (0x300/sizeof(__u32))
+#define ICRhi       (0x310/sizeof(__u32))
+struct icr {
+    union {
+        __u32 lo;
+        struct {
+            __u8 vector;            /**< Interrupt Vector. */
+            unsigned delmod : 3;        /**< Delivery Mode. */
+            unsigned destmod : 1;       /**< Destination Mode. */
+            unsigned delivs : 1;        /**< Delivery status (RO). */
+            unsigned : 1;           /**< Reserved. */
+            unsigned level : 1;     /**< Level. */
+            unsigned trigger_mode : 1;  /**< Trigger Mode. */
+            unsigned : 2;           /**< Reserved. */
+            unsigned shorthand : 2;     /**< Destination Shorthand. */
+            unsigned : 12;          /**< Reserved. */
+        } __attribute__ ((packed));
+    };
+    union {
+        __u32 hi;
+        struct {
+            unsigned : 24;          /**< Reserved. */
+            __u8 dest;          /**< Destination field. */
+        } __attribute__ ((packed));
+    };
+} __attribute__ ((packed));
+typedef struct icr icr_t;
+/* End Of Interrupt. */
+#define EOI     (0x0b0/sizeof(__u32))
+/** Error Status Register. */
+#define ESR     (0x280/sizeof(__u32))
+union esr {
+    __u32 value;
+    __u8 err_bitmap;
+    struct {
+        unsigned send_checksum_error : 1;
+        unsigned receive_checksum_error : 1;
+        unsigned send_accept_error : 1;
+        unsigned receive_accept_error : 1;
+        unsigned : 1;
+        unsigned send_illegal_vector : 1;
+        unsigned received_illegal_vector : 1;
+        unsigned illegal_register_address : 1;
+        unsigned : 24;
+    } __attribute__ ((packed));
+};
+typedef union esr esr_t;
+/* Task Priority Register */
+#define TPR     (0x080/sizeof(__u32))
+union tpr {
+    __u32 value;
+    struct {
+        unsigned pri_sc : 4;        /**< Task Priority Sub-Class. */
+        unsigned pri : 4;       /**< Task Priority. */
+    } __attribute__ ((packed));
+};
+typedef union tpr tpr_t;
+/** Spurious-Interrupt Vector Register. */
+#define SVR     (0x0f0/sizeof(__u32))
+union svr {
+    __u32 value;
+    struct {
+        __u8 vector;            /**< Spurious Vector. */
+        unsigned lapic_enabled : 1; /**< APIC Software Enable/Disable. */
+        unsigned focus_checking : 1;    /**< Focus Processor Checking. */
+        unsigned : 22;          /**< Reserved. */
+    } __attribute__ ((packed));
+};
+typedef union svr svr_t;
+/** Time Divide Configuration Register. */
+#define TDCR        (0x3e0/sizeof(__u32))
+union tdcr {
+    __u32 value;
+    struct {
+        unsigned div_value : 4;     /**< Divide Value, bit 2 is always 0. */
+        unsigned : 28;          /**< Reserved. */
+    } __attribute__ ((packed));
+};
+typedef union tdcr tdcr_t;
+/* Initial Count Register for Timer */
+#define ICRT        (0x380/sizeof(__u32))
+/* Current Count Register for Timer */
+#define CCRT        (0x390/sizeof(__u32))
+/** LVT Timer register. */
+#define LVT_Tm      (0x320/sizeof(__u32))
+union lvt_tm {
+    __u32 value;
+    struct {
+        __u8 vector;        /**< Local Timer Interrupt vector. */
+        unsigned : 4;       /**< Reserved. */
+        unsigned delivs : 1;    /**< Delivery status (RO). */
+        unsigned : 3;       /**< Reserved. */
+        unsigned masked : 1;    /**< Interrupt Mask. */
+        unsigned mode : 1;  /**< Timer Mode. */
+        unsigned : 14;      /**< Reserved. */
+    } __attribute__ ((packed));
+};
+typedef union lvt_tm lvt_tm_t;
+/** LVT LINT registers. */
+#define LVT_LINT0   (0x350/sizeof(__u32))
+#define LVT_LINT1   (0x360/sizeof(__u32))
+union lvt_lint {
+    __u32 value;
+    struct {
+        __u8 vector;            /**< LINT Interrupt vector. */
+        unsigned delmod : 3;        /**< Delivery Mode. */
+        unsigned : 1;           /**< Reserved. */
+        unsigned delivs : 1;        /**< Delivery status (RO). */
+        unsigned intpol : 1;        /**< Interrupt Input Pin Polarity. */
+        unsigned irr : 1;       /**< Remote IRR (RO). */
+        unsigned trigger_mode : 1;  /**< Trigger Mode. */
+        unsigned masked : 1;        /**< Interrupt Mask. */
+        unsigned : 15;          /**< Reserved. */
+    } __attribute__ ((packed));
+};
+typedef union lvt_lint lvt_lint_t;
+/** LVT Error register. */
+#define LVT_Err     (0x370/sizeof(__u32))
+union lvt_error {
+    __u32 value;
+    struct {
+        __u8 vector;        /**< Local Timer Interrupt vector. */
+        unsigned : 4;       /**< Reserved. */
+        unsigned delivs : 1;    /**< Delivery status (RO). */
+        unsigned : 3;       /**< Reserved. */
+        unsigned masked : 1;    /**< Interrupt Mask. */
+        unsigned : 15;      /**< Reserved. */
+    } __attribute__ ((packed));
+};
+typedef union lvt_error lvt_error_t;
+/** Local APIC ID Register. */
+#define L_APIC_ID   (0x020/sizeof(__u32))
+union l_apic_id {
+    __u32 value;
+    struct {
+        unsigned : 24;      /**< Reserved. */
+        __u8 apic_id;       /**< Local APIC ID. */
+    } __attribute__ ((packed));
+};
+typedef union l_apic_id l_apic_id_t;
+/** Local APIC Version Register */
+#define LAVR        (0x030/sizeof(__u32))
+#define LAVR_Mask   0xff
+#define is_local_apic(x)    (((x)&LAVR_Mask&0xf0)==0x1)
+#define is_82489DX_apic(x)  ((((x)&LAVR_Mask&0xf0)==0x0))
+#define is_local_xapic(x)   (((x)&LAVR_Mask)==0x14)
+/** Logical Destination Register. */
+#define  LDR        (0x0d0/sizeof(__u32))
+union ldr {
+    __u32 value;
+    struct {
+        unsigned : 24;      /**< Reserved. */
+        __u8 id;        /**< Logical APIC ID. */
+    } __attribute__ ((packed));
+};
+typedef union ldr ldr_t;
+/** Destination Format Register. */
+#define DFR     (0x0e0/sizeof(__u32))
+union dfr {
+    __u32 value;
+    struct {
+        unsigned : 28;      /**< Reserved, all ones. */
+        unsigned model : 4; /**< Model. */
+    } __attribute__ ((packed));
+};
+typedef union dfr dfr_t;
+/* IO APIC */
+#define IOREGSEL    (0x00/sizeof(__u32))
+#define IOWIN       (0x10/sizeof(__u32))
+#define IOAPICID    0x00
+#define IOAPICVER   0x01
+#define IOAPICARB   0x02
+#define IOREDTBL    0x10
+/** I/O Register Select Register. */
+union io_regsel {
+    __u32 value;
+    struct {
+        __u8 reg_addr;      /**< APIC Register Address. */
+        unsigned : 24;      /**< Reserved. */
+    } __attribute__ ((packed));
+};
+typedef union io_regsel io_regsel_t;
+/** I/O Redirection Register. */
+struct io_redirection_reg {
+    union {
+        __u32 lo;
+        struct {
+            __u8 intvec;            /**< Interrupt Vector. */
+            unsigned delmod : 3;        /**< Delivery Mode. */
+            unsigned destmod : 1;       /**< Destination mode. */
+            unsigned delivs : 1;        /**< Delivery status (RO). */
+            unsigned intpol : 1;        /**< Interrupt Input Pin Polarity. */
+            unsigned irr : 1;       /**< Remote IRR (RO). */
+            unsigned trigger_mode : 1;  /**< Trigger Mode. */
+            unsigned masked : 1;        /**< Interrupt Mask. */
+            unsigned : 15;          /**< Reserved. */
+        } __attribute__ ((packed));
+    };
+    union {
+        __u32 hi;
+        struct {
+            unsigned : 24;          /**< Reserved. */
+            __u8 dest : 8;          /**< Destination Field. */
+        } __attribute__ ((packed));
+    };
+} __attribute__ ((packed));
+typedef struct io_redirection_reg io_redirection_reg_t;
+/** IO APIC Identification Register. */
+union io_apic_id {
+    __u32 value;
+    struct {
+        unsigned : 24;      /**< Reserved. */
+        unsigned apic_id : 4;   /**< IO APIC ID. */
+        unsigned : 4;       /**< Reserved. */
+    } __attribute__ ((packed));
+};
+typedef union io_apic_id io_apic_id_t;
+extern volatile __u32 *l_apic;
+extern volatile __u32 *io_apic;
+extern __u32 apic_id_mask;
+extern void apic_init(void);
+extern void l_apic_init(void);
+extern void l_apic_eoi(void);
+extern int l_apic_broadcast_custom_ipi(__u8 vector);
+extern int l_apic_send_init_ipi(__u8 apicid);
+extern void l_apic_debug(void);
+extern __u8 l_apic_id(void);
+extern __u32 io_apic_read(__u8 address);
+extern void io_apic_write(__u8 address , __u32 x);
+extern void io_apic_change_ioredtbl(int pin, int dest, __u8 v, int flags);
+extern void io_apic_disable_irqs(__u16 irqmask);
+extern void io_apic_enable_irqs(__u16 irqmask);
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/ia32/include/smp/mps.h
 ,0 → 1,135
+/*
+ * Copyright (C) 2001-2004 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup ia32
+ * @{
+ */
+/** @file
+ */
+#ifndef __MPS_H__
+#define __MPS_H__
+#include <arch/types.h>
+#include <typedefs.h>
+#include <synch/waitq.h>
+#include <config.h>
+#include <arch/smp/smp.h>
+#define CT_EXT_ENTRY_TYPE       0
+#define CT_EXT_ENTRY_LEN        1
+struct mps_fs {
+    __u32 signature;
+    __u32 configuration_table;
+    __u8 length;
+    __u8 revision;
+    __u8 checksum;
+    __u8 config_type;
+    __u8 mpfib2;
+    __u8 mpfib3;
+    __u8 mpfib4;
+    __u8 mpfib5;
+} __attribute__ ((packed));
+struct mps_ct {
+    __u32 signature;
+    __u16 base_table_length;
+    __u8 revision;
+    __u8 checksum;
+    __u8 oem_id[8];
+    __u8 product_id[12];
+    __u32 oem_table;
+    __u16 oem_table_size;
+    __u16 entry_count;
+    __u32 l_apic;
+    __u16 ext_table_length;
+    __u8 ext_table_checksum;
+    __u8 xxx;
+    __u8 base_table[0];
+} __attribute__ ((packed));
+struct __processor_entry {
+    __u8 type;
+    __u8 l_apic_id;
+    __u8 l_apic_version;
+    __u8 cpu_flags;
+    __u8 cpu_signature[4];
+    __u32 feature_flags;
+    __u32 xxx[2];
+} __attribute__ ((packed));
+struct __bus_entry {
+    __u8 type;
+    __u8 bus_id;
+    __u8 bus_type[6];
+} __attribute__ ((packed));
+struct __io_apic_entry {
+    __u8 type;
+    __u8 io_apic_id;
+    __u8 io_apic_version;
+    __u8 io_apic_flags;
+    __u32 io_apic;
+} __attribute__ ((packed));
+struct __io_intr_entry {
+    __u8 type;
+    __u8 intr_type;
+    __u8 poel;
+    __u8 xxx;
+    __u8 src_bus_id;
+    __u8 src_bus_irq;
+    __u8 dst_io_apic_id;
+    __u8 dst_io_apic_pin;
+} __attribute__ ((packed));
+struct __l_intr_entry {
+    __u8 type;
+    __u8 intr_type;
+    __u8 poel;
+    __u8 xxx;
+    __u8 src_bus_id;
+    __u8 src_bus_irq;
+    __u8 dst_l_apic_id;
+    __u8 dst_l_apic_pin;
+} __attribute__ ((packed));
+extern waitq_t ap_completion_wq;
+extern struct smp_config_operations mps_config_operations;
+extern void mps_init(void);
+extern void kmp(void *arg);
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/ia32/include/smp/smp.h
 ,0 → 1,56
+/*
+ * Copyright (C) 2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup ia32
+ * @{
+ */
+/** @file
+ */
+#ifndef __ia32_SMP_H__
+#define __ia32_SMP_H__
+#include <arch/types.h>
+#include <typedefs.h>
+/** SMP config opertaions interface. */
+struct smp_config_operations {
+    count_t (* cpu_count)(void);        /**< Return number of detected processors. */
+    bool (* cpu_enabled)(index_t i);    /**< Check whether the processor of index i is enabled. */
+    bool (*cpu_bootstrap)(index_t i);   /**< Check whether the processor of index i is BSP. */
+    __u8 (*cpu_apic_id)(index_t i);     /**< Return APIC ID of the processor of index i. */
+    int (*irq_to_pin)(int irq);     /**< Return mapping between irq and APIC pin. */
+};
+extern int smp_irq_to_pin(int irq);
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/ia32/include/smp/ap.h
 ,0 → 1,44
+/*
+ * Copyright (C) 2001-2004 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup ia32
+ * @{
+ */
+/** @file
+ */
+#ifndef __AP_H__
+#define __AP_H__
+extern void ap_boot(void);
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/ia32/include/atomic.h
 ,0 → 1,129
+/*
+ * Copyright (C) 2001-2004 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup ia32
+ * @{
+ */
+/** @file
+ */
+#ifndef __ia32_ATOMIC_H__
+#define __ia32_ATOMIC_H__
+#include <arch/types.h>
+#include <arch/barrier.h>
+#include <preemption.h>
+#include <typedefs.h>
+static inline void atomic_inc(atomic_t *val) {
+#ifdef CONFIG_SMP
+    __asm__ volatile ("lock incl %0\n" : "=m" (val->count));
+#else
+    __asm__ volatile ("incl %0\n" : "=m" (val->count));
+#endif /* CONFIG_SMP */
+}
+static inline void atomic_dec(atomic_t *val) {
+#ifdef CONFIG_SMP
+    __asm__ volatile ("lock decl %0\n" : "=m" (val->count));
+#else
+    __asm__ volatile ("decl %0\n" : "=m" (val->count));
+#endif /* CONFIG_SMP */
+}
+static inline long atomic_postinc(atomic_t *val)
+{
+    long r = 1;
+    __asm__ volatile (
+        "lock xaddl %1, %0\n"
+        : "=m" (val->count), "+r" (r)
+    );
+    return r;
+}
+static inline long atomic_postdec(atomic_t *val)
+{
+    long r = -1;
+    __asm__ volatile (
+        "lock xaddl %1, %0\n"
+        : "=m" (val->count), "+r"(r)
+    );
+    return r;
+}
+#define atomic_preinc(val) (atomic_postinc(val)+1)
+#define atomic_predec(val) (atomic_postdec(val)-1)
+static inline __u32 test_and_set(atomic_t *val) {
+    __u32 v;
+    __asm__ volatile (
+        "movl $1, %0\n"
+        "xchgl %0, %1\n"
+        : "=r" (v),"=m" (val->count)
+    );
+    return v;
+}
+/** ia32 specific fast spinlock */
+static inline void atomic_lock_arch(atomic_t *val)
+{
+    __u32 tmp;
+    preemption_disable();
+    __asm__ volatile (
+        "0:;"
+#ifdef CONFIG_HT
+        "pause;" /* Pentium 4's HT love this instruction */
+#endif
+        "mov %0, %1;"
+        "testl %1, %1;"
+        "jnz 0b;"       /* Lightweight looping on locked spinlock */
+        "incl %1;"      /* now use the atomic operation */
+        "xchgl %0, %1;"
+        "testl %1, %1;"
+        "jnz 0b;"
+                : "=m"(val->count),"=r"(tmp)
+        );
+    /*
+     * Prevent critical section code from bleeding out this way up.
+     */
+    CS_ENTER_BARRIER();
+}
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/ia32/include/pm.h
 ,0 → 1,183
+/*
+ * Copyright (C) 2001-2004 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup ia32
+ * @{
+ */
+/** @file
+ */
+#ifndef __PM_H__
+#define __PM_H__
+#define IDT_ITEMS 64
+#define GDT_ITEMS 7
+#define VESA_INIT_SEGMENT 0x8000
+#define NULL_DES    0
+#define KTEXT_DES   1
+#define KDATA_DES   2
+#define UTEXT_DES   3
+#define UDATA_DES   4
+#define TSS_DES     5
+#define TLS_DES         6 /* Pointer to Thread-Local-Storage data */
+#ifdef CONFIG_FB
+#define VESA_INIT_SEGMENT 0x8000
+#define VESA_INIT_DES 7
+#undef GDT_ITEMS
+#define GDT_ITEMS 8
+#endif /* CONFIG_FB */
+#define selector(des)   ((des)<<3)
+#define PL_KERNEL   0
+#define PL_USER     3
+#define AR_PRESENT  (1<<7)
+#define AR_DATA     (2<<3)
+#define AR_CODE     (3<<3)
+#define AR_WRITABLE (1<<1)
+#define AR_INTERRUPT    (0xe)
+#define AR_TSS      (0x9)
+#define DPL_KERNEL  (PL_KERNEL<<5)
+#define DPL_USER    (PL_USER<<5)
+#define TSS_BASIC_SIZE  104
+#define TSS_IOMAP_SIZE  (16*1024+1) /* 16K for bitmap + 1 terminating byte for convenience */
+#define IO_PORTS    (64*1024)
+#ifndef __ASM__
+#include <arch/types.h>
+#include <typedefs.h>
+#include <arch/context.h>
+struct ptr_16_32 {
+    __u16 limit;
+    __u32 base;
+} __attribute__ ((packed));
+typedef struct ptr_16_32 ptr_16_32_t;
+struct descriptor {
+    unsigned limit_0_15: 16;
+    unsigned base_0_15: 16;
+    unsigned base_16_23: 8;
+    unsigned access: 8;
+    unsigned limit_16_19: 4;
+    unsigned available: 1;
+    unsigned unused: 1;
+    unsigned special: 1;
+    unsigned granularity : 1;
+    unsigned base_24_31: 8;
+} __attribute__ ((packed));
+typedef struct descriptor  descriptor_t;
+struct idescriptor {
+    unsigned offset_0_15: 16;
+    unsigned selector: 16;
+    unsigned unused: 8;
+    unsigned access: 8;
+    unsigned offset_16_31: 16;
+} __attribute__ ((packed));
+typedef struct idescriptor idescriptor_t;
+struct tss {
+    __u16 link;
+    unsigned : 16;
+    __u32 esp0;
+    __u16 ss0;
+    unsigned : 16;
+    __u32 esp1;
+    __u16 ss1;
+    unsigned : 16;
+    __u32 esp2;
+    __u16 ss2;
+    unsigned : 16;
+    __u32 cr3;
+    __u32 eip;
+    __u32 eflags;
+    __u32 eax;
+    __u32 ecx;
+    __u32 edx;
+    __u32 ebx;
+    __u32 esp;
+    __u32 ebp;
+    __u32 esi;
+    __u32 edi;
+    __u16 es;
+    unsigned : 16;
+    __u16 cs;
+    unsigned : 16;
+    __u16 ss;
+    unsigned : 16;
+    __u16 ds;
+    unsigned : 16;
+    __u16 fs;
+    unsigned : 16;
+    __u16 gs;
+    unsigned : 16;
+    __u16 ldtr;
+    unsigned : 16;
+    unsigned : 16;
+    __u16 iomap_base;
+    __u8 iomap[TSS_IOMAP_SIZE];
+} __attribute__ ((packed));
+typedef struct tss tss_t;
+extern ptr_16_32_t gdtr;
+extern ptr_16_32_t bootstrap_gdtr;
+extern ptr_16_32_t protected_ap_gdtr;
+extern struct tss *tss_p;
+extern descriptor_t gdt[];
+extern void pm_init(void);
+extern void gdt_setbase(descriptor_t *d, __address base);
+extern void gdt_setlimit(descriptor_t *d, __u32 limit);
+extern void idt_init(void);
+extern void idt_setoffset(idescriptor_t *d, __address offset);
+extern void tss_initialize(tss_t *t);
+extern void set_tls_desc(__address tls);
+#endif /* __ASM__ */
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/ia32/include/boot/memmap.h
 ,0 → 1,78
+/*
+ * Copyright (C) 2005 Josef Cejka
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup ia32
+ * @{
+ */
+/** @file
+ */
+#ifndef __ia32_MEMMAP_H__
+#define __ia32_MEMMAP_H__
+/* E820h memory range types - other values*/
+    /* Free memory */
+#define MEMMAP_MEMORY_AVAILABLE 1
+    /* Not available for OS */
+#define MEMMAP_MEMORY_RESERVED  2
+    /* OS may use it after reading ACPI table */
+#define MEMMAP_MEMORY_ACPI  3
+    /* Unusable, required to be saved and restored across an NVS sleep */
+#define MEMMAP_MEMORY_NVS   4
+    /* Corrupted memory */
+#define MEMMAP_MEMORY_UNUSABLE  5
+     /* size of one entry */
+#define MEMMAP_E820_RECORD_SIZE 20
+    /* maximum entries */
+#define MEMMAP_E820_MAX_RECORDS 32
+#ifndef __ASM__
+#include <arch/types.h>
+struct e820memmap_ {
+    __u64 base_address;
+    __u64 size;
+    __u32 type;
+} __attribute__ ((packed));
+extern struct e820memmap_ e820table[MEMMAP_E820_MAX_RECORDS];
+extern __u8 e820counter;
+extern __u32 e801memorysize; /**< Size of available memory in KB. */
+#endif
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/ia32/include/boot/boot.h
 ,0 → 1,51
+/*
+ * Copyright (C) 2005 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup ia32
+ * @{
+ */
+/** @file
+ */
+#ifndef __ia32_BOOT_H__
+#define __ia32_BOOT_H__
+#define BOOT_OFFSET     0x108000
+#define AP_BOOT_OFFSET      0x8000
+#define BOOT_STACK_SIZE 0x400
+#define MULTIBOOT_HEADER_MAGIC  0x1BADB002
+#define MULTIBOOT_HEADER_FLAGS  0x00010003
+#define MULTIBOOT_LOADER_MAGIC  0x2BADB002
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/ia32/include/arch.h
 ,0 → 1,42
+/*
+ * Copyright (C) 2005 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup ia32
+ * @{
+ */
+/** @file
+ */
+#ifndef __ia32_ARCH_H__
+#define __ia32_ARCH_H__
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/ia32/include/proc/task.h
 ,0 → 1,51
+/*
+ * Copyright (C) 2006 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup ia32proc
+ * @{
+ */
+/** @file
+ */
+#ifndef __ia32_TASK_H__
+#define __ia32_TASK_H__
+#include <typedefs.h>
+#include <arch/types.h>
+#include <adt/bitmap.h>
+typedef struct {
+    count_t iomapver;   /**< I/O Permission bitmap Generation counter. */
+    bitmap_t iomap;     /**< I/O Permission bitmap. */
+} task_arch_t;
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/ia32/include/proc/thread.h
 ,0 → 1,48
+/*
+ * Copyright (C) 2001-2004 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup ia32proc
+ * @{
+ */
+/** @file
+ */
+#ifndef __ia32_THREAD_H__
+#define __ia32_THREAD_H__
+#include <arch/types.h>
+typedef struct {
+    __native tls;
+} thread_arch_t;
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/ia32/include/asm.h
 ,0 → 1,301
+/*
+ * Copyright (C) 2001-2004 Jakub Jermar
+ * Copyright (C) 2005 Sergey Bondari
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup ia32
+ * @{
+ */
+/** @file
+ */
+#ifndef __ia32_ASM_H__
+#define __ia32_ASM_H__
+#include <arch/pm.h>
+#include <arch/types.h>
+#include <config.h>
+extern __u32 interrupt_handler_size;
+extern void paging_on(void);
+extern void interrupt_handlers(void);
+extern void enable_l_apic_in_msr(void);
+extern void asm_delay_loop(__u32 t);
+extern void asm_fake_loop(__u32 t);
+/** Halt CPU
+ *
+ * Halt the current CPU until interrupt event.
+ */
+static inline void cpu_halt(void) { __asm__("hlt\n"); };
+static inline void cpu_sleep(void) { __asm__("hlt\n"); };
+#define GEN_READ_REG(reg) static inline __native read_ ##reg (void) \
+    { \
+    __native res; \
+    __asm__ volatile ("movl %%" #reg ", %0" : "=r" (res) ); \
+    return res; \
+    }
+#define GEN_WRITE_REG(reg) static inline void write_ ##reg (__native regn) \
+    { \
+    __asm__ volatile ("movl %0, %%" #reg : : "r" (regn)); \
+    }
+GEN_READ_REG(cr0);
+GEN_READ_REG(cr2);
+GEN_READ_REG(cr3);
+GEN_WRITE_REG(cr3);
+GEN_READ_REG(dr0);
+GEN_READ_REG(dr1);
+GEN_READ_REG(dr2);
+GEN_READ_REG(dr3);
+GEN_READ_REG(dr6);
+GEN_READ_REG(dr7);
+GEN_WRITE_REG(dr0);
+GEN_WRITE_REG(dr1);
+GEN_WRITE_REG(dr2);
+GEN_WRITE_REG(dr3);
+GEN_WRITE_REG(dr6);
+GEN_WRITE_REG(dr7);
+/** Byte to port
+ *
+ * Output byte to port
+ *
+ * @param port Port to write to
+ * @param val Value to write
+ */
+static inline void outb(__u16 port, __u8 val) { __asm__ volatile ("outb %b0, %w1\n" : : "a" (val), "d" (port) ); }
+/** Word to port
+ *
+ * Output word to port
+ *
+ * @param port Port to write to
+ * @param val Value to write
+ */
+static inline void outw(__u16 port, __u16 val) { __asm__ volatile ("outw %w0, %w1\n" : : "a" (val), "d" (port) ); }
+/** Double word to port
+ *
+ * Output double word to port
+ *
+ * @param port Port to write to
+ * @param val Value to write
+ */
+static inline void outl(__u16 port, __u32 val) { __asm__ volatile ("outl %l0, %w1\n" : : "a" (val), "d" (port) ); }
+/** Byte from port
+ *
+ * Get byte from port
+ *
+ * @param port Port to read from
+ * @return Value read
+ */
+static inline __u8 inb(__u16 port) { __u8 val; __asm__ volatile ("inb %w1, %b0 \n" : "=a" (val) : "d" (port) ); return val; }
+/** Word from port
+ *
+ * Get word from port
+ *
+ * @param port Port to read from
+ * @return Value read
+ */
+static inline __u16 inw(__u16 port) { __u16 val; __asm__ volatile ("inw %w1, %w0 \n" : "=a" (val) : "d" (port) ); return val; }
+/** Double word from port
+ *
+ * Get double word from port
+ *
+ * @param port Port to read from
+ * @return Value read
+ */
+static inline __u32 inl(__u16 port) { __u32 val; __asm__ volatile ("inl %w1, %l0 \n" : "=a" (val) : "d" (port) ); return val; }
+/** Enable interrupts.
+ *
+ * Enable interrupts and return previous
+ * value of EFLAGS.
+ *
+ * @return Old interrupt priority level.
+ */
+static inline ipl_t interrupts_enable(void)
+{
+    ipl_t v;
+    __asm__ volatile (
+        "pushf\n\t"
+        "popl %0\n\t"
+        "sti\n"
+        : "=r" (v)
+    );
+    return v;
+}
+/** Disable interrupts.
+ *
+ * Disable interrupts and return previous
+ * value of EFLAGS.
+ *
+ * @return Old interrupt priority level.
+ */
+static inline ipl_t interrupts_disable(void)
+{
+    ipl_t v;
+    __asm__ volatile (
+        "pushf\n\t"
+        "popl %0\n\t"
+        "cli\n"
+        : "=r" (v)
+    );
+    return v;
+}
+/** Restore interrupt priority level.
+ *
+ * Restore EFLAGS.
+ *
+ * @param ipl Saved interrupt priority level.
+ */
+static inline void interrupts_restore(ipl_t ipl)
+{
+    __asm__ volatile (
+        "pushl %0\n\t"
+        "popf\n"
+        : : "r" (ipl)
+    );
+}
+/** Return interrupt priority level.
+ *
+ * @return EFLAFS.
+ */
+static inline ipl_t interrupts_read(void)
+{
+    ipl_t v;
+    __asm__ volatile (
+        "pushf\n\t"
+        "popl %0\n"
+        : "=r" (v)
+    );
+    return v;
+}
+/** Return base address of current stack
+ *
+ * Return the base address of the current stack.
+ * The stack is assumed to be STACK_SIZE bytes long.
+ * The stack must start on page boundary.
+ */
+static inline __address get_stack_base(void)
+{
+    __address v;
+    __asm__ volatile ("andl %%esp, %0\n" : "=r" (v) : "0" (~(STACK_SIZE-1)));
+    return v;
+}
+static inline __u64 rdtsc(void)
+{
+    __u64 v;
+    __asm__ volatile("rdtsc\n" : "=A" (v));
+    return v;
+}
+/** Return current IP address */
+static inline __address * get_ip()
+{
+    __address *ip;
+    __asm__ volatile (
+        "mov %%eip, %0"
+        : "=r" (ip)
+        );
+    return ip;
+}
+/** Invalidate TLB Entry.
+ *
+ * @param addr Address on a page whose TLB entry is to be invalidated.
+ */
+static inline void invlpg(__address addr)
+{
+    __asm__ volatile ("invlpg %0\n" :: "m" (*(__native *)addr));
+}
+/** Load GDTR register from memory.
+ *
+ * @param gdtr_reg Address of memory from where to load GDTR.
+ */
+static inline void gdtr_load(ptr_16_32_t *gdtr_reg)
+{
+    __asm__ volatile ("lgdtl %0\n" : : "m" (*gdtr_reg));
+}
+/** Store GDTR register to memory.
+ *
+ * @param gdtr_reg Address of memory to where to load GDTR.
+ */
+static inline void gdtr_store(ptr_16_32_t *gdtr_reg)
+{
+    __asm__ volatile ("sgdtl %0\n" : : "m" (*gdtr_reg));
+}
+/** Load IDTR register from memory.
+ *
+ * @param idtr_reg Address of memory from where to load IDTR.
+ */
+static inline void idtr_load(ptr_16_32_t *idtr_reg)
+{
+    __asm__ volatile ("lidtl %0\n" : : "m" (*idtr_reg));
+}
+/** Load TR from descriptor table.
+ *
+ * @param sel Selector specifying descriptor of TSS segment.
+ */
+static inline void tr_load(__u16 sel)
+{
+    __asm__ volatile ("ltr %0" : : "r" (sel));
+}
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/ia32/include/faddr.h
 ,0 → 1,46
+/*
+ * Copyright (C) 2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup ia32
+ * @{
+ */
+/** @file
+ */
+#ifndef __ia32_FADDR_H__
+#define __ia32_FADDR_H__
+#include <arch/types.h>
+#define FADDR(fptr)     ((__address) (fptr))
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/ia32/include/mm/frame.h
 ,0 → 1,58
+/*
+ * Copyright (C) 2001-2004 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup ia32mm
+ * @{
+ */
+/** @file
+ */
+#ifndef __ia32_FRAME_H__
+#define __ia32_FRAME_H__
+#define FRAME_WIDTH 12  /* 4K */
+#define FRAME_SIZE  (1<<FRAME_WIDTH)
+#ifdef KERNEL
+#ifndef __ASM__
+#include <arch/types.h>
+extern __address last_frame;
+extern void frame_arch_init(void);
+#endif /* __ASM__ */
+#endif /* KERNEL */
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/ia32/include/mm/memory_init.h
 ,0 → 1,49
+/*
+ * Copyright (C) 2005 Josef Cejka
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup ia32mm
+ * @{
+ */
+/** @file
+ * @ingroup ia32mm, am64mm
+ */
+#ifndef __ia32_MEMORY_INIT_H__
+#define __ia32_MEMORY_INIT_H__
+#include <typedefs.h>
+size_t get_memory_size(void);
+void memory_print_map(void);
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/ia32/include/mm/page.h
 ,0 → 1,173
+/*
+ * Copyright (C) 2001-2004 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup ia32mm
+ * @{
+ */
+/** @file
+ */
+#ifndef __ia32_PAGE_H__
+#define __ia32_PAGE_H__
+#include <arch/mm/frame.h>
+#define PAGE_WIDTH  FRAME_WIDTH
+#define PAGE_SIZE   FRAME_SIZE
+#ifdef KERNEL
+#ifndef __ASM__
+#   define KA2PA(x) (((__address) (x)) - 0x80000000)
+#   define PA2KA(x) (((__address) (x)) + 0x80000000)
+#else
+#   define KA2PA(x) ((x) - 0x80000000)
+#   define PA2KA(x) ((x) + 0x80000000)
+#endif
+/*
+ * Implementation of generic 4-level page table interface.
+ * IA-32 has 2-level page tables, so PTL1 and PTL2 are left out.
+ */
+#define PTL0_ENTRIES_ARCH   1024
+#define PTL1_ENTRIES_ARCH   0
+#define PTL2_ENTRIES_ARCH   0
+#define PTL3_ENTRIES_ARCH   1024
+#define PTL0_INDEX_ARCH(vaddr)  (((vaddr)>>22)&0x3ff)
+#define PTL1_INDEX_ARCH(vaddr)  0
+#define PTL2_INDEX_ARCH(vaddr)  0
+#define PTL3_INDEX_ARCH(vaddr)  (((vaddr)>>12)&0x3ff)
+#define GET_PTL1_ADDRESS_ARCH(ptl0, i)      ((pte_t *)((((pte_t *)(ptl0))[(i)].frame_address)<<12))
+#define GET_PTL2_ADDRESS_ARCH(ptl1, i)      (ptl1)
+#define GET_PTL3_ADDRESS_ARCH(ptl2, i)      (ptl2)
+#define GET_FRAME_ADDRESS_ARCH(ptl3, i)     ((__address)((((pte_t *)(ptl3))[(i)].frame_address)<<12))
+#define SET_PTL0_ADDRESS_ARCH(ptl0)     (write_cr3((__address) (ptl0)))
+#define SET_PTL1_ADDRESS_ARCH(ptl0, i, a)   (((pte_t *)(ptl0))[(i)].frame_address = (a)>>12)
+#define SET_PTL2_ADDRESS_ARCH(ptl1, i, a)
+#define SET_PTL3_ADDRESS_ARCH(ptl2, i, a)
+#define SET_FRAME_ADDRESS_ARCH(ptl3, i, a)  (((pte_t *)(ptl3))[(i)].frame_address = (a)>>12)
+#define GET_PTL1_FLAGS_ARCH(ptl0, i)        get_pt_flags((pte_t *)(ptl0), (index_t)(i))
+#define GET_PTL2_FLAGS_ARCH(ptl1, i)        PAGE_PRESENT
+#define GET_PTL3_FLAGS_ARCH(ptl2, i)        PAGE_PRESENT
+#define GET_FRAME_FLAGS_ARCH(ptl3, i)       get_pt_flags((pte_t *)(ptl3), (index_t)(i))
+#define SET_PTL1_FLAGS_ARCH(ptl0, i, x)     set_pt_flags((pte_t *)(ptl0), (index_t)(i), (x))
+#define SET_PTL2_FLAGS_ARCH(ptl1, i, x)
+#define SET_PTL3_FLAGS_ARCH(ptl2, i, x)
+#define SET_FRAME_FLAGS_ARCH(ptl3, i, x)    set_pt_flags((pte_t *)(ptl3), (index_t)(i), (x))
+#define PTE_VALID_ARCH(p)           (*((__u32 *) (p)) != 0)
+#define PTE_PRESENT_ARCH(p)         ((p)->present != 0)
+#define PTE_GET_FRAME_ARCH(p)           ((p)->frame_address<<FRAME_WIDTH)
+#define PTE_WRITABLE_ARCH(p)            ((p)->writeable != 0)
+#define PTE_EXECUTABLE_ARCH(p)          1
+#ifndef __ASM__
+#include <mm/page.h>
+#include <arch/types.h>
+#include <arch/mm/frame.h>
+#include <typedefs.h>
+/* Page fault error codes. */
+/** When bit on this position is 0, the page fault was caused by a not-present page. */
+#define PFERR_CODE_P        (1<<0)
+/** When bit on this position is 1, the page fault was caused by a write. */
+#define PFERR_CODE_RW       (1<<1)
+/** When bit on this position is 1, the page fault was caused in user mode. */
+#define PFERR_CODE_US       (1<<2)
+/** When bit on this position is 1, a reserved bit was set in page directory. */
+#define PFERR_CODE_RSVD     (1<<3)
+/** Page Table Entry. */
+struct page_specifier {
+    unsigned present : 1;
+    unsigned writeable : 1;
+    unsigned uaccessible : 1;
+    unsigned page_write_through : 1;
+    unsigned page_cache_disable : 1;
+    unsigned accessed : 1;
+    unsigned dirty : 1;
+    unsigned pat : 1;
+    unsigned global : 1;
+    unsigned soft_valid : 1;    /**< Valid content even if the present bit is not set. */
+    unsigned avl : 2;
+    unsigned frame_address : 20;
+} __attribute__ ((packed));
+static inline int get_pt_flags(pte_t *pt, index_t i)
+{
+    pte_t *p = &pt[i];
+    return (
+        (!p->page_cache_disable)<<PAGE_CACHEABLE_SHIFT |
+        (!p->present)<<PAGE_PRESENT_SHIFT |
+        p->uaccessible<<PAGE_USER_SHIFT |
+<<PAGE_READ_SHIFT |
+        p->writeable<<PAGE_WRITE_SHIFT |
+<<PAGE_EXEC_SHIFT |
+        p->global<<PAGE_GLOBAL_SHIFT
+    );
+}
+static inline void set_pt_flags(pte_t *pt, index_t i, int flags)
+{
+    pte_t *p = &pt[i];
+    p->page_cache_disable = !(flags & PAGE_CACHEABLE);
+    p->present = !(flags & PAGE_NOT_PRESENT);
+    p->uaccessible = (flags & PAGE_USER) != 0;
+    p->writeable = (flags & PAGE_WRITE) != 0;
+    p->global = (flags & PAGE_GLOBAL) != 0;
+    /*
+     * Ensure that there is at least one bit set even if the present bit is cleared.
+     */
+    p->soft_valid = true;
+}
+extern void page_arch_init(void);
+extern void page_fault(int n, istate_t *istate);
+#endif /* __ASM__ */
+#endif /* KERNEL */
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/ia32/include/mm/asid.h
 ,0 → 1,56
+/*
+ * Copyright (C) 2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup ia32mm
+ * @{
+ */
+/** @file
+ * @ingroup ia32mm, amd64mm
+ */
+/*
+ * ia32 has no hardware support for address space identifiers.
+ * This file is provided to do nop-implementation of mm/asid.h
+ * interface.
+ */
+#ifndef __ia32_ASID_H__
+#define __ia32_ASID_H__
+typedef int asid_t;
+#define ASID_MAX_ARCH       3
+#define asid_get()      (ASID_START+1)
+#define asid_put(asid)
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/ia32/include/mm/tlb.h
 ,0 → 1,45
+/*
+ * Copyright (C) 2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup ia32mm
+ * @{
+ */
+/** @file
+ */
+#ifndef __ia32_TLB_H__
+#define __ia32_TLB_H__
+#define tlb_arch_init()
+#define tlb_print()
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/ia32/include/mm/as.h
 ,0 → 1,55
+/*
+ * Copyright (C) 2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup ia32mm
+ * @{
+ */
+/** @file
+ */
+#ifndef __ia32_AS_H__
+#define __ia32_AS_H__
+#define KERNEL_ADDRESS_SPACE_SHADOWED_ARCH  0
+#define KERNEL_ADDRESS_SPACE_START_ARCH     ((unsigned long) 0x80000000)
+#define KERNEL_ADDRESS_SPACE_END_ARCH       ((unsigned long) 0xffffffff)
+#define USER_ADDRESS_SPACE_START_ARCH       ((unsigned long) 0x00000000)
+#define USER_ADDRESS_SPACE_END_ARCH     ((unsigned long) 0x7fffffff)
+#define USTACK_ADDRESS_ARCH (USER_ADDRESS_SPACE_END_ARCH-(PAGE_SIZE-1))
+#define as_install_arch(as)
+extern void as_arch_init(void);
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/ia32/include/context.h
 ,0 → 1,68
+/*
+ * Copyright (C) 2001-2004 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup ia32
+ * @{
+ */
+/** @file
+ */
+#ifndef __ia32_CONTEXT_H__
+#define __ia32_CONTEXT_H__
+#include <arch/types.h>
+#define STACK_ITEM_SIZE 4
+/*
+ * Both context_save() and context_restore() eat two doublewords from the stack.
+ * First for pop of the saved register, second during ret instruction.
+ *
+ * One item is put onto stack to support get_stack_base().
+ */
+#define SP_DELTA    (8+STACK_ITEM_SIZE)
+/*
+ * Only save registers that must be preserved across
+ * function calls.
+ */
+struct context {
+    __address sp;
+    __address pc;
+    __u32 ebx;
+    __u32 esi;
+    __u32 edi;
+    __u32 ebp;
+    ipl_t ipl;
+} __attribute__ ((packed));
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/ia32/include/debug.h
 ,0 → 1,46
+/*
+ * Copyright (C) 2005 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup amd64debug
+ * @{
+ */
+/** @file
+ */
+#ifndef __ia32_DEBUG_H__
+#define __ia32_DEBUG_H__
+#include <arch/asm.h>
+#define HERE get_ip()
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/ia32/include/barrier.h
 ,0 → 1,91
+/*
+ * Copyright (C) 2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup ia32
+ * @{
+ */
+/** @file
+ */
+#ifndef __ia32_BARRIER_H__
+#define __ia32_BARRIER_H__
+/*
+ * NOTE:
+ * No barriers for critical section (i.e. spinlock) on IA-32 are needed:
+ * - spinlock_lock() and spinlock_trylock() use serializing XCHG instruction
+ * - writes cannot pass reads on IA-32 => spinlock_unlock() needs no barriers
+ */
+/*
+ * Provisions are made to prevent compiler from reordering instructions itself.
+ */
+#define CS_ENTER_BARRIER()  __asm__ volatile ("" ::: "memory")
+#define CS_LEAVE_BARRIER()  __asm__ volatile ("" ::: "memory")
+static inline void cpuid_serialization(void)
+{
+    __asm__ volatile (
+        "xorl %%eax, %%eax\n"
+        "cpuid\n"
+        ::: "eax", "ebx", "ecx", "edx", "memory"
+    );
+}
+#ifdef CONFIG_FENCES_P4
+#   define memory_barrier()     __asm__ volatile ("mfence\n" ::: "memory")
+#   define read_barrier()       __asm__ volatile ("lfence\n" ::: "memory")
+#   ifdef CONFIG_WEAK_MEMORY
+#       define write_barrier()  __asm__ volatile ("sfence\n" ::: "memory")
+#   else
+#       define write_barrier()  __asm__ volatile( "" ::: "memory");
+#   endif
+#elif CONFIG_FENCES_P3
+#   define memory_barrier()     cpuid_serialization()
+#   define read_barrier()       cpuid_serialization()
+#   ifdef CONFIG_WEAK_MEMORY
+#       define write_barrier()  __asm__ volatile ("sfence\n" ::: "memory")
+#   else
+#       define write_barrier()  __asm__ volatile( "" ::: "memory");
+#   endif
+#else
+#   define memory_barrier()     cpuid_serialization()
+#   define read_barrier()       cpuid_serialization()
+#   ifdef CONFIG_WEAK_MEMORY
+#       define write_barrier()  cpuid_serialization()
+#   else
+#       define write_barrier()  __asm__ volatile( "" ::: "memory");
+#   endif
+#endif
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/ia32/include/drivers/i8254.h
 ,0 → 1,48
+/*
+ * Copyright (C) 2001-2004 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup ia32
+ * @{
+ */
+/** @file
+ */
+#ifndef __I8254_H__
+#define __I8254_H__
+#include <arch/types.h>
+extern void i8254_init(void);
+extern void i8254_calibrate_delay_loop(void);
+extern void i8254_normal_operation(void);
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/ia32/include/drivers/ega.h
 ,0 → 1,49
+/*
+ * Copyright (C) 2001-2004 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup ia32
+ * @{
+ */
+/** @file
+ */
+#ifndef __EGA_H__
+#define __EGA_H__
+#define VIDEORAM    0xb8000
+#define ROW     80
+#define ROWS        25
+#define SCREEN      (ROW * ROWS)
+extern void ega_init(void);
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/ia32/include/drivers/vesa.h
 ,0 → 1,45
+/*
+ * Copyright (C) 2006 Jakub Vana
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup ia32
+ * @{
+ */
+/** @file
+ */
+#ifndef __VESA_H__
+#define __VESA_H__
+extern int vesa_present(void);
+extern void vesa_init(void);
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/ia32/include/drivers/i8259.h
 ,0 → 1,58
+/*
+ * Copyright (C) 2001-2004 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup ia32
+ * @{
+ */
+/** @file
+ */
+#ifndef __I8259_H__
+#define __I8259_H__
+#include <arch/types.h>
+#include <arch/interrupt.h>
+#define PIC_PIC0PORT1   0x20
+#define PIC_PIC0PORT2   0x21
+#define PIC_PIC1PORT1   0xa0
+#define PIC_PIC1PORT2   0xa1
+#define PIC_NEEDICW4    (1<<0)
+#define PIC_ICW1    (1<<4)
+extern void i8259_init(void);
+extern void pic_enable_irqs(__u16 irqmask);
+extern void pic_disable_irqs(__u16 irqmask);
+extern void pic_eoi(void);
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/kernel/arch/ia32/include/drivers/i8042.h
 ,0 → 1,72
+/*
+ * Copyright (C) 2006 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup ia32
+ * @{
+ */
+/** @file
+ */
+/**
+ * This file implements ia32 specific access to i8042 registers.
+ */
+#ifndef __ia32_I8042_H__
+#define __ia32_I8042_H__
+#include <arch/asm.h>
+#include <arch/types.h>
+#define i8042_DATA      0x60
+#define i8042_STATUS        0x64
+static inline void i8042_data_write(__u8 data)
+{
+    outb(i8042_DATA, data);
+}
+static inline __u8 i8042_data_read(void)
+{
+    return inb(i8042_DATA);
+}
+static inline __u8 i8042_status_read(void)
+{
+    return inb(i8042_STATUS);
+}
+static inline void i8042_command_write(__u8 command)
+{
+    outb(i8042_STATUS, command);
+}
+#endif
+ /** @}
+ */

/tags/0.2.0.2/kernel/arch/ia32/include/debugger.h
0,0 → 1,0
link ../../amd64/include/debugger.h
Property changes:
Added: svn:special
+*
\ No newline at end of property

 /tags/0.2.0.2/kernel/arch/ia32/Makefile.inc
 ,0 → 1,142
+#
+# Copyright (C) 2005 Martin Decky
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# - Redistributions of source code must retain the above copyright
+#   notice, this list of conditions and the following disclaimer.
+# - Redistributions in binary form must reproduce the above copyright
+#   notice, this list of conditions and the following disclaimer in the
+#   documentation and/or other materials provided with the distribution.
+# - The name of the author may not be used to endorse or promote products
+#   derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+## Toolchain configuration
+#
+BFD_NAME = elf32-i386
+BFD_ARCH = i386
+BFD = binary
+TARGET = i686-pc-linux-gnu
+TOOLCHAIN_DIR = /usr/local/i686/bin
+## Make some default assumptions
+#
+ifndef IA32_CPU
+    IA32_CPU = pentium4
+endif
+DEFS += -D_CPU=${IA32_CPU} -D__32_BITS__
+## Accepted CPUs
+#
+ifeq ($(IA32_CPU),athlon-xp)
+    CFLAGS += -march=athlon-xp -mmmx -msse -m3dnow
+    DEFS += -DCONFIG_FENCES_P3
+    CONFIG_SMP = n
+    CONFIG_HT = n
+endif
+ifeq ($(IA32_CPU),athlon-mp)
+    CFLAGS += -march=athlon-mp -mmmx -msse -m3dnow
+    DEFS += -DCONFIG_FENCES_P3
+    CONFIG_HT = n
+endif
+ifeq ($(IA32_CPU),pentium3)
+    CFLAGS += -march=pentium3 -mmmx -msse
+    DEFS += -DCONFIG_FENCES_P3
+    CONFIG_HT = n
+endif
+ifeq ($(IA32_CPU),prescott)
+    CFLAGS += -march=pentium4 -mfpmath=sse -mmmx -msse -msse2 -msse3
+    DEFS += -DCONFIG_FENCES_P4
+endif
+ifeq ($(IA32_CPU),pentium4)
+    CFLAGS += -march=pentium4 -mfpmath=sse -mmmx -msse -msse2
+    DEFS += -DCONFIG_FENCES_P4
+endif
+## Own configuration directives
+#
+CONFIG_ACPI = y
+## Compile with hierarchical page tables support.
+#
+CONFIG_PAGE_PT = y
+DEFS += -DCONFIG_PAGE_PT
+## Compile with i8042 controller support
+#
+CONFIG_I8042 = y
+## Accepted configuration directives
+#
+ifeq ($(CONFIG_SMP),y)
+    DEFS += -DCONFIG_SMP
+endif
+ifeq ($(CONFIG_HT),y)
+    DEFS += -DCONFIG_HT
+endif
+ifeq ($(CONFIG_SIMICS_FIX),y)
+    DEFS += -DCONFIG_SIMICS_FIX
+endif
+## Compile with support for software integer division.
+#
+CONFIG_SOFTINT = y
+ARCH_SOURCES = \
+    arch/$(ARCH)/src/context.s \
+    arch/$(ARCH)/src/debug/panic.s \
+    arch/$(ARCH)/src/delay.s \
+    arch/$(ARCH)/src/asm.S \
+    arch/$(ARCH)/src/proc/scheduler.c \
+    arch/$(ARCH)/src/proc/task.c \
+    arch/$(ARCH)/src/proc/thread.c \
+    arch/$(ARCH)/src/bios/bios.c \
+    arch/$(ARCH)/src/smp/ap.S \
+    arch/$(ARCH)/src/smp/apic.c \
+    arch/$(ARCH)/src/smp/mps.c \
+    arch/$(ARCH)/src/smp/smp.c \
+    arch/$(ARCH)/src/atomic.S \
+    arch/$(ARCH)/src/smp/ipi.c \
+    arch/$(ARCH)/src/ia32.c \
+    arch/$(ARCH)/src/interrupt.c \
+    arch/$(ARCH)/src/pm.c \
+    arch/$(ARCH)/src/userspace.c \
+    arch/$(ARCH)/src/cpu/cpu.c \
+    arch/$(ARCH)/src/mm/as.c \
+    arch/$(ARCH)/src/mm/frame.c \
+    arch/$(ARCH)/src/mm/memory_init.c \
+    arch/$(ARCH)/src/mm/page.c \
+    arch/$(ARCH)/src/mm/tlb.c \
+    arch/$(ARCH)/src/ddi/ddi.c \
+    arch/$(ARCH)/src/drivers/i8254.c \
+    arch/$(ARCH)/src/drivers/i8259.c \
+    arch/$(ARCH)/src/drivers/ega.c \
+    arch/$(ARCH)/src/drivers/vesa.c \
+    arch/$(ARCH)/src/boot/boot.S \
+    arch/$(ARCH)/src/fpu_context.c \
+    arch/$(ARCH)/src/debugger.c

 /tags/0.2.0.2/kernel/arch/ia32/_link.ld.in
 ,0 → 1,65
+/** IA-32 linker script
+ *
+ * umapped section:
+ *  kernel text
+ *  kernel data
+ * mapped section:
+ *  kernel text
+ *  kernel data
+ */
+#define __ASM__
+#include <arch/boot/boot.h>
+#include <arch/mm/page.h>
+SECTIONS {
+    .unmapped BOOT_OFFSET: AT (0) {
+        unmapped_ktext_start = .;
+        *(K_TEXT_START);
+        unmapped_ktext_end = .;
+        unmapped_kdata_start = .;
+        *(K_DATA_START);
+        unmapped_kdata_end = .;
+    }
+    .mapped (PA2KA(BOOT_OFFSET)+SIZEOF(.unmapped)): AT (SIZEOF(.unmapped)) {
+        ktext_start = .;
+        *(.text);
+        ktext_end = .;
+        kdata_start = .;
+        *(.data);           /* initialized data */
+        *(.rodata*);            /* string literals */
+        *(COMMON);          /* global variables */
+        hardcoded_load_address = .;
+        LONG(PA2KA(BOOT_OFFSET));
+        hardcoded_ktext_size = .;
+        LONG((ktext_end - ktext_start) + (unmapped_ktext_end - unmapped_ktext_start));
+        hardcoded_kdata_size = .;
+        LONG((kdata_end - kdata_start) + (unmapped_kdata_end - unmapped_kdata_start));
+        hardcoded_unmapped_ktext_size = .;
+        LONG(unmapped_ktext_end - unmapped_ktext_start);
+        hardcoded_unmapped_kdata_size = .;
+        LONG(unmapped_kdata_end - unmapped_kdata_start);
+        symbol_table = .;
+        *(symtab.*);                /* Symbol table, must be LAST symbol! */
+        *(.bss);            /* uninitialized static variables */
+        kdata_end = .;
+    }
+    /DISCARD/ : {
+        *(.note.GNU-stack);
+        *(.comment);
+    }
+#ifdef CONFIG_SMP
+    _hardcoded_unmapped_size = (unmapped_ktext_end - unmapped_ktext_start) + (unmapped_kdata_end - unmapped_kdata_start);
+    ap_boot = unmapped_ap_boot - BOOT_OFFSET + AP_BOOT_OFFSET;
+    ap_gdtr = unmapped_ap_gdtr - BOOT_OFFSET + AP_BOOT_OFFSET;
+    protected_ap_gdtr = PA2KA(ap_gdtr);
+#endif /* CONFIG_SMP */
+}

/tags/0.2.0.2/uspace/trunk/tools/config.py
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 /tags/0.2.0.2/uspace/ns/ns.c
 ,0 → 1,259
+/*
+ * Copyright (C) 2006 Ondrej Palkovsky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/** @addtogroup ns
+ * @{
+ */
+/**
+ * @file    ns.c
+ * @brief   Naming service for HelenOS IPC.
+ */
+#include <ipc/ipc.h>
+#include <ipc/ns.h>
+#include <ipc/services.h>
+#include <stdio.h>
+#include <unistd.h>
+#include <stdlib.h>
+#include <errno.h>
+#include <assert.h>
+#include <libadt/list.h>
+#include <libadt/hash_table.h>
+#include <sysinfo.h>
+#include <ddi.h>
+#include <as.h>
+#define NAME    "NS"
+#define NS_HASH_TABLE_CHAINS    20
+static int register_service(ipcarg_t service, ipcarg_t phone, ipc_call_t *call);
+static int connect_to_service(ipcarg_t service, ipc_call_t *call, ipc_callid_t callid);
+/* Static functions implementing NS hash table operations. */
+static hash_index_t ns_hash(unsigned long *key);
+static int ns_compare(unsigned long *key, hash_count_t keys, link_t *item);
+static void ns_remove(link_t *item);
+/** Operations for NS hash table. */
+static hash_table_operations_t ns_hash_table_ops = {
+    .hash = ns_hash,
+    .compare = ns_compare,
+    .remove_callback = ns_remove
+};
+/** NS hash table structure. */
+static hash_table_t ns_hash_table;
+/** NS hash table item. */
+typedef struct {
+    link_t link;
+    ipcarg_t service;       /**< Number of the service. */
+    ipcarg_t phone;         /**< Phone registered with the service. */
+    ipcarg_t in_phone_hash;     /**< Incoming phone hash. */
+} hashed_service_t;
+static void *clockaddr = NULL;
+static void *klogaddr = NULL;
+static void get_as(ipc_callid_t callid, ipc_call_t *call, char *name, void **addr)
+{
+    void *ph_addr;
+    if (!*addr) {
+        ph_addr = (void *)sysinfo_value(name);
+        if (!ph_addr) {
+            ipc_answer_fast(callid, ENOENT, 0, 0);
+            return;
+        }
+        *addr = as_get_mappable_page(PAGE_SIZE);
+        map_physmem(ph_addr, *addr, 1, AS_AREA_READ | AS_AREA_CACHEABLE);
+    }
+    ipc_answer_fast(callid, 0, (ipcarg_t)*addr, AS_AREA_READ);
+}
+int main(int argc, char **argv)
+{
+    ipc_call_t call;
+    ipc_callid_t callid;
+    ipcarg_t retval;
+    if (!hash_table_create(&ns_hash_table, NS_HASH_TABLE_CHAINS, 3, &ns_hash_table_ops)) {
+        return ENOMEM;
+    }
+    while (1) {
+        callid = ipc_wait_for_call(&call);
+        switch (IPC_GET_METHOD(call)) {
+        case IPC_M_AS_AREA_RECV:
+            switch (IPC_GET_ARG3(call)) {
+            case SERVICE_MEM_REALTIME:
+                get_as(callid, &call, "clock.faddr", &clockaddr);
+                break;
+            case SERVICE_MEM_KLOG:
+                get_as(callid, &call, "klog.faddr", &klogaddr);
+                break;
+            default:
+                ipc_answer_fast(callid, ENOENT, 0, 0);
+            }
+            continue;
+        case IPC_M_PHONE_HUNGUP:
+            retval = 0;
+            break;
+        case IPC_M_CONNECT_TO_ME:
+            /*
+             * Server requests service registration.
+             */
+            retval = register_service(IPC_GET_ARG1(call), IPC_GET_ARG3(call), &call);
+            break;
+        case IPC_M_CONNECT_ME_TO:
+            /*
+             * Client requests to be connected to a service.
+             */
+            retval = connect_to_service(IPC_GET_ARG1(call), &call, callid);
+            break;
+        default:
+            retval = ENOENT;
+            break;
+        }
+        if (! (callid & IPC_CALLID_NOTIFICATION)) {
+            ipc_answer_fast(callid, retval, 0, 0);
+        }
+    }
+}
+/** Register service.
+ *
+ * @param service Service to be registered.
+ * @param phone phone Phone to be used for connections to the service.
+ * @param call Pointer to call structure.
+ *
+ * @return Zero on success or a value from @ref errno.h.
+ */
+int register_service(ipcarg_t service, ipcarg_t phone, ipc_call_t *call)
+{
+    unsigned long keys[3] = { service, call->in_phone_hash, 0 };
+    hashed_service_t *hs;
+    if (hash_table_find(&ns_hash_table, keys)) {
+        return EEXISTS;
+    }
+    hs = (hashed_service_t *) malloc(sizeof(hashed_service_t));
+    if (!hs) {
+        return ENOMEM;
+    }
+    link_initialize(&hs->link);
+    hs->service = service;
+    hs->phone = phone;
+    hs->in_phone_hash = call->in_phone_hash;
+    hash_table_insert(&ns_hash_table, keys, &hs->link);
+    return 0;
+}
+/** Connect client to service.
+ *
+ * @param service Service to be connected to.
+ * @param call Pointer to call structure.
+ * @param callid Call ID of the request.
+ *
+ * @return Zero on success or a value from @ref errno.h.
+ */
+int connect_to_service(ipcarg_t service, ipc_call_t *call, ipc_callid_t callid)
+{
+    unsigned long keys[3] = { service, 0, 0 };
+    link_t *hlp;
+    hashed_service_t *hs;
+    hlp = hash_table_find(&ns_hash_table, keys);
+    if (!hlp) {
+        return ENOENT;
+    }
+    hs = hash_table_get_instance(hlp, hashed_service_t, link);
+    return ipc_forward_fast(callid, hs->phone, 0, 0);
+}
+/** Compute hash index into NS hash table.
+ *
+ * @param key Pointer keys. However, only the first key (i.e. service number)
+ *        is used to compute the hash index.
+ * @return Hash index corresponding to key[0].
+ */
+hash_index_t ns_hash(unsigned long *key)
+{
+    assert(key);
+    return *key % NS_HASH_TABLE_CHAINS;
+}
+/** Compare a key with hashed item.
+ *
+ * This compare function always ignores the third key.
+ * It exists only to make it possible to remove records
+ * originating from connection with key[1] in_phone_hash
+ * value. Note that this is close to being classified
+ * as a nasty hack.
+ *
+ * @param key Array of keys.
+ * @param keys Must be lesser or equal to 3.
+ * @param item Pointer to a hash table item.
+ * @return Non-zero if the key matches the item, zero otherwise.
+ */
+int ns_compare(unsigned long key[], hash_count_t keys, link_t *item)
+{
+    hashed_service_t *hs;
+    assert(key);
+    assert(keys <= 3);
+    assert(item);
+    hs = hash_table_get_instance(item, hashed_service_t, link);
+    if (keys == 2)
+        return key[1] == hs->in_phone_hash;
+    else
+        return key[0] == hs->service;
+}
+/** Perform actions after removal of item from the hash table.
+ *
+ * @param item Item that was removed from the hash table.
+ */
+void ns_remove(link_t *item)
+{
+    assert(item);
+    free(hash_table_get_instance(item, hashed_service_t, link));
+}
+/**
+ * @}
+ */

 /tags/0.2.0.2/uspace/ns/Makefile
 ,0 → 1,72
+#
+# Copyright (C) 2005 Martin Decky
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# - Redistributions of source code must retain the above copyright
+#   notice, this list of conditions and the following disclaimer.
+# - Redistributions in binary form must reproduce the above copyright
+#   notice, this list of conditions and the following disclaimer in the
+#   documentation and/or other materials provided with the distribution.
+# - The name of the author may not be used to endorse or promote products
+#   derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+## Setup toolchain
+#
+LIBC_PREFIX = ../libc
+SOFTINT_PREFIX = ../softint
+include $(LIBC_PREFIX)/Makefile.toolchain
+LIBS = $(LIBC_PREFIX)/libc.a
+## Sources
+#
+OUTPUT = ns
+SOURCES = \
+    ns.c
+OBJECTS := $(addsuffix .o,$(basename $(SOURCES)))
+.PHONY: all clean depend disasm
+all: $(OUTPUT) disasm
+-include Makefile.depend
+clean:
+    -rm -f $(OUTPUT) $(OUTPUT).map $(OUTPUT).disasm Makefile.depend
+depend:
+    $(CC) $(DEFS) $(CFLAGS) -M $(SOURCES) > Makefile.depend
+$(OUTPUT): $(OBJECTS) $(LIBS)
+    $(LD) -T $(LIBC_PREFIX)/arch/$(ARCH)/_link.ld -e __entry_driver $(OBJECTS) $(LIBS) $(LFLAGS) -o $@ -Map $(OUTPUT).map
+disasm:
+    $(OBJDUMP) -d $(OUTPUT) >$(OUTPUT).disasm
+%.o: %.S
+    $(CC) $(DEFS) $(AFLAGS) $(CFLAGS) -D__ASM__ -c $< -o $@
+%.o: %.s
+    $(AS) $(AFLAGS) $< -o $@
+%.o: %.c
+    $(CC) $(DEFS) $(CFLAGS) -c $< -o $@

 /tags/0.2.0.2/uspace/uspace.config
 ,0 → 1,33
+## General configuration directives
+# Architecture
+@ "amd64" AMD64/Intel EM64T
+@ "ia32" Intel IA-32
+@ "ia64" Intel IA-64
+@ "mips32" MIPS 32-bit Little Endian
+@ "mips32eb" MIPS 32-bit Big Endian
+@ "ppc32" PowerPC 32-bit
+@ "ppc64" PowerPC 64-bit
+! ARCH (choice)
+# IA32 Compiler
+@ "cross" Cross-compiler
+@ "native" Native
+! [ARCH=ia32] IA32_COMPILER (choice)
+% [ARCH=ia32] SAVEAS IA32_COMPILER COMPILER
+# PPC32 Compiler
+@ "cross" Cross-compiler
+@ "native" Native
+! [ARCH=ppc32] PPC32_COMPILER (choice)
+% [ARCH=ppc32] SAVEAS PPC32_COMPILER COMPILER
+# PPC64 Compiler
+@ "cross" Cross-compiler
+@ "native" Native
+! [ARCH=ppc64] PPC64_COMPILER (choice)
+% [ARCH=ppc64] SAVEAS PPC64_COMPILER COMPILER
+# MIPS FPU support
+! [ARCH=mips32|ARCH=mips32eb] CONFIG_MIPS_FPU (n/y)

 /tags/0.2.0.2/uspace/softint/generic/division.c
 ,0 → 1,197
+/*
+ * Copyright (C) 2006 Josef Cejka
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/** @addtogroup softint
+ * @{
+ */
+/**
+ * @file
+ * SW implementation of 32 and 64 bit division and modulo.
+ */
+#include <division.h>
+#define ABSVAL(x) ( (x) > 0 ? (x) : -(x))
+#define SGN(x) ( (x) >= 0 ? 1 : 0 )
+static unsigned int divandmod32(unsigned int a, unsigned int b, unsigned int *remainder)
+{
+    unsigned int result;
+    int steps = sizeof(unsigned int) * 8;
+    *remainder = 0;
+    result = 0;
+    if (b == 0) {
+        /* FIXME: division by zero */
+        return 0;
+    }
+    if ( a < b) {
+        *remainder = a;
+        return 0;
+    }
+    for ( ; steps > 0; steps--) {
+        /* shift one bit to remainder */
+        *remainder = ( (*remainder) << 1) | (( a >> 31) & 0x1);
+        result <<= 1;
+        if (*remainder >= b) {
+                *remainder -= b;
+                result |= 0x1;
+        }
+        a <<= 1;
+    }
+    return result;
+}
+static unsigned long long divandmod64(unsigned long long a, unsigned long long b, unsigned long long *remainder)
+{
+    unsigned long long result;
+    int steps = sizeof(unsigned long long) * 8;
+    *remainder = 0;
+    result = 0;
+    if (b == 0) {
+        /* FIXME: division by zero */
+        return 0;
+    }
+    if ( a < b) {
+        *remainder = a;
+        return 0;
+    }
+    for ( ; steps > 0; steps--) {
+        /* shift one bit to remainder */
+        *remainder = ( (*remainder) << 1) | ((a >> 63) & 0x1);
+        result <<= 1;
+        if (*remainder >= b) {
+                *remainder -= b;
+                result |= 0x1;
+        }
+        a <<= 1;
+    }
+    return result;
+}
+/* 32bit integer division */
+int __divsi3(int a, int b)
+{
+    unsigned int rem;
+    int result;
+    result = (int)divandmod32(ABSVAL(a), ABSVAL(b), &rem);
+    if ( SGN(a) == SGN(b)) return result;
+    return -result;
+}
+/* 64bit integer division */
+long long __divdi3(long long a, long long b)
+{
+    unsigned long long rem;
+    long long result;
+    result = (long long)divandmod64(ABSVAL(a), ABSVAL(b), &rem);
+    if ( SGN(a) == SGN(b)) return result;
+    return -result;
+}
+/* 32bit unsigned integer division */
+unsigned int __udivsi3(unsigned int a, unsigned int b)
+{
+    unsigned int rem;
+    return divandmod32(a, b, &rem);
+}
+/* 64bit unsigned integer division */
+unsigned long long __udivdi3(unsigned long long a, unsigned long long b)
+{
+    unsigned long long  rem;
+    return divandmod64(a, b, &rem);
+}
+/* 32bit remainder of the signed division */
+int __modsi3(int a, int b)
+{
+    unsigned int rem;
+    divandmod32(a, b, &rem);
+    /* if divident is negative, remainder must be too */
+    if (!(SGN(a))) {
+        return -((int)rem);
+    }
+    return (int)rem;
+}
+/* 64bit remainder of the signed division */
+long long __moddi3(long long a,long  long b)
+{
+    unsigned long long rem;
+    divandmod64(a, b, &rem);
+    /* if divident is negative, remainder must be too */
+    if (!(SGN(a))) {
+        return -((long long)rem);
+    }
+    return (long long)rem;
+}
+/* 32bit remainder of the unsigned division */
+unsigned int __umodsi3(unsigned int a, unsigned int b)
+{
+    unsigned int rem;
+    divandmod32(a, b, &rem);
+    return rem;
+}
+/* 64bit remainder of the unsigned division */
+unsigned long long __umoddi3(unsigned long long a, unsigned long long b)
+{
+    unsigned long long rem;
+    divandmod64(a, b, &rem);
+    return rem;
+}
+unsigned long long __udivmoddi3(unsigned long long a, unsigned long long b, unsigned long long *c)
+{
+    return divandmod64(a, b, c);
+}
+/** @}
+ */

 /tags/0.2.0.2/uspace/softint/Makefile
 ,0 → 1,73
+#
+# Copyright (C) 2005 Martin Decky
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# - Redistributions of source code must retain the above copyright
+#   notice, this list of conditions and the following disclaimer.
+# - Redistributions in binary form must reproduce the above copyright
+#   notice, this list of conditions and the following disclaimer in the
+#   documentation and/or other materials provided with the distribution.
+# - The name of the author may not be used to endorse or promote products
+#   derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+## Common compiler flags
+#
+LIBC_PREFIX = ../libc
+## Setup toolchain
+#
+include $(LIBC_PREFIX)/Makefile.toolchain
+CFLAGS += -Iinclude
+## Sources
+#
+ARCH_SOURCES =
+GENERIC_SOURCES = \
+    generic/division.c
+GENERIC_OBJECTS := $(addsuffix .o,$(basename $(GENERIC_SOURCES)))
+.PHONY: all clean depend
+all: libsoftint.a
+-include Makefile.depend
+clean:
+    -rm -f libsoftint.a Makefile.depend
+    find generic/ -name '*.o' -follow -exec rm \{\} \;
+depend:
+    -makedepend $(DEFS) $(CFLAGS) -f - $(GENERIC_SOURCES) > Makefile.depend 2> /dev/null
+libsoftint.a: depend $(ARCH_OBJECTS) $(GENERIC_OBJECTS)
+    $(AR) rc libsoftint.a $(ARCH_OBJECTS) $(GENERIC_OBJECTS)
+%.o: %.S
+    $(CC) $(DEFS) $(AFLAGS) $(CFLAGS) -D__ASM__ -c $< -o $@
+%.o: %.s
+    $(AS) $(AFLAGS) $< -o $@
+%.o: %.c
+    $(CC) $(DEFS) $(CFLAGS) -c $< -o $@

 /tags/0.2.0.2/uspace/softint/include/division.h
 ,0 → 1,70
+/*
+ * Copyright (C) 2006 Josef Cejka
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/** @addtogroup softint
+ * @{
+ */
+/**
+ * @file
+ */
+#ifndef __SOFTINT_DIVISION_H__
+#define __SOFTINT_DIVISION_H__
+/* 32bit integer division */
+int __divsi3(int a, int b);
+/* 64bit integer division */
+long long __divdi3(long long a, long long b);
+/* 32bit unsigned integer division */
+unsigned int __udivsi3(unsigned int a, unsigned int b);
+/* 64bit unsigned integer division */
+unsigned long long __udivdi3(unsigned long long a, unsigned long long b);
+/* 32bit remainder of the signed division */
+int __modsi3(int a, int b);
+/* 64bit remainder of the signed division */
+long long __moddi3(long long a, long long b);
+/* 32bit remainder of the unsigned division */
+unsigned int __umodsi3(unsigned int a, unsigned int b);
+/* 64bit remainder of the unsigned division */
+unsigned long long __umoddi3(unsigned long long a, unsigned long long b);
+unsigned long long __udivmoddi3(unsigned long long a, unsigned long long b, unsigned long long *c);
+#endif
+/** @}
+ */

 /tags/0.2.0.2/uspace/fb/fb.c
 ,0 → 1,1245
+/*
+ * Copyright (C) 2006 Jakub Vana
+ * Copyright (C) 2006 Ondrej Palkovsky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/**
+ * @defgroup fb Graphical framebuffer
+ * @brief   HelenOS graphical framebuffer.
+ * @ingroup fbs
+ * @{
+ */
+/** @file
+ */
+#include <stdlib.h>
+#include <unistd.h>
+#include <string.h>
+#include <ddi.h>
+#include <sysinfo.h>
+#include <align.h>
+#include <as.h>
+#include <ipc/fb.h>
+#include <ipc/ipc.h>
+#include <ipc/ns.h>
+#include <ipc/services.h>
+#include <kernel/errno.h>
+#include <async.h>
+#include "font-8x16.h"
+#include "fb.h"
+#include "main.h"
+#include "../console/screenbuffer.h"
+#include "ppm.h"
+#include "pointer.xbm"
+#include "pointer_mask.xbm"
+#define DEFAULT_BGCOLOR                0xf0f0f0
+#define DEFAULT_FGCOLOR                0x0
+/***************************************************************/
+/* Pixel specific fuctions */
+typedef void (*conv2scr_fn_t)(void *, int);
+typedef int (*conv2rgb_fn_t)(void *);
+struct {
+    __u8 *fbaddress ;
+    unsigned int xres ;
+    unsigned int yres ;
+    unsigned int scanline ;
+    unsigned int pixelbytes ;
+    conv2scr_fn_t rgb2scr;
+    conv2rgb_fn_t scr2rgb;
+} screen;
+typedef struct {
+    int initialized;
+    unsigned int x, y;
+    unsigned int width, height;
+    /* Text support in window */
+    unsigned int rows, cols;
+    /* Style for text printing */
+    style_t style;
+    /* Auto-cursor position */
+    int cursor_active, cur_col, cur_row;
+    int cursor_shown;
+    /* Double buffering */
+    __u8 *dbdata;
+    unsigned int dboffset;
+    unsigned int paused;
+} viewport_t;
+#define MAX_ANIM_LEN    8
+#define MAX_ANIMATIONS  4
+typedef struct {
+    int initialized;
+    int enabled;
+    unsigned int vp;
+    unsigned int pos;
+    unsigned int animlen;
+    unsigned int pixmaps[MAX_ANIM_LEN];
+} animation_t;
+static animation_t animations[MAX_ANIMATIONS];
+static int anims_enabled;
+/** Maximum number of saved pixmaps
+ * Pixmap is a saved rectangle
+ */
+#define MAX_PIXMAPS        256
+typedef struct {
+    unsigned int width;
+    unsigned int height;
+    __u8 *data;
+} pixmap_t;
+static pixmap_t pixmaps[MAX_PIXMAPS];
+/* Viewport is a rectangular area on the screen */
+#define MAX_VIEWPORTS 128
+static viewport_t viewports[128];
+/* Allow only 1 connection */
+static int client_connected = 0;
+#define RED(x, bits)    ((x >> (16 + 8 - bits)) & ((1 << bits) - 1))
+#define GREEN(x, bits)  ((x >> (8 + 8 - bits)) & ((1 << bits) - 1))
+#define BLUE(x, bits)   ((x >> (8 - bits)) & ((1 << bits) - 1))
+#define COL_WIDTH   8
+#define ROW_BYTES   (screen.scanline * FONT_SCANLINES)
+#define POINTPOS(x, y)  ((y) * screen.scanline + (x) * screen.pixelbytes)
+/* Conversion routines between different color representations */
+static void rgb_4byte(void *dst, int rgb)
+{
+    *(int *)dst = rgb;
+}
+static int byte4_rgb(void *src)
+{
+    return (*(int *)src) & 0xffffff;
+}
+static void rgb_3byte(void *dst, int rgb)
+{
+    __u8 *scr = dst;
+#if (defined(BIG_ENDIAN) || defined(FB_BIG_ENDIAN))
+    scr[0] = RED(rgb, 8);
+    scr[1] = GREEN(rgb, 8);
+    scr[2] = BLUE(rgb, 8);
+#else
+    scr[2] = RED(rgb, 8);
+    scr[1] = GREEN(rgb, 8);
+    scr[0] = BLUE(rgb, 8);
+#endif
+}
+static int byte3_rgb(void *src)
+{
+    __u8 *scr = src;
+#if (defined(BIG_ENDIAN) || defined(FB_BIG_ENDIAN))
+    return scr[0] << 16 | scr[1] << 8 | scr[2];
+#else
+    return scr[2] << 16 | scr[1] << 8 | scr[0];
+#endif
+}
+/**  16-bit depth (5:6:5) */
+static void rgb_2byte(void *dst, int rgb)
+{
+    /* 5-bit, 6-bits, 5-bits */
+    *((__u16 *)(dst)) = RED(rgb, 5) << 11 | GREEN(rgb, 6) << 5 | BLUE(rgb, 5);
+}
+/** 16-bit depth (5:6:5) */
+static int byte2_rgb(void *src)
+{
+    int color = *(__u16 *)(src);
+    return (((color >> 11) & 0x1f) << (16 + 3)) | (((color >> 5) & 0x3f) << (8 + 2)) | ((color & 0x1f) << 3);
+}
+/** Put pixel - 8-bit depth (3:2:3) */
+static void rgb_1byte(void *dst, int rgb)
+{
+    *(__u8 *)dst = RED(rgb, 3) << 5 | GREEN(rgb, 2) << 3 | BLUE(rgb, 3);
+}
+/** Return pixel color - 8-bit depth (3:2:3) */
+static int byte1_rgb(void *src)
+{
+    int color = *(__u8 *)src;
+    return (((color >> 5) & 0x7) << (16 + 5)) | (((color >> 3) & 0x3) << (8 + 6)) | ((color & 0x7) << 5);
+}
+/** Put pixel into viewport
+ *
+ * @param vport Viewport identification
+ * @param x X coord relative to viewport
+ * @param y Y coord relative to viewport
+ * @param color RGB color
+ */
+static void putpixel(viewport_t *vport, unsigned int x, unsigned int y, int color)
+{
+    int dx = vport->x + x;
+    int dy = vport->y + y;
+    if (! (vport->paused && vport->dbdata))
+        (*screen.rgb2scr)(&screen.fbaddress[POINTPOS(dx,dy)],color);
+    if (vport->dbdata) {
+        int dline = (y + vport->dboffset) % vport->height;
+        int doffset = screen.pixelbytes * (dline * vport->width + x);
+        (*screen.rgb2scr)(&vport->dbdata[doffset],color);
+    }
+}
+/** Get pixel from viewport */
+static int getpixel(viewport_t *vport, unsigned int x, unsigned int y)
+{
+    int dx = vport->x + x;
+    int dy = vport->y + y;
+    return (*screen.scr2rgb)(&screen.fbaddress[POINTPOS(dx,dy)]);
+}
+static inline void putpixel_mem(char *mem, unsigned int x, unsigned int y,
+                int color)
+{
+    (*screen.rgb2scr)(&mem[POINTPOS(x,y)],color);
+}
+static void draw_rectangle(viewport_t *vport, unsigned int sx, unsigned int sy,
+               unsigned int width, unsigned int height,
+               int color)
+{
+    unsigned int x, y;
+    static void *tmpline;
+    if (!tmpline)
+        tmpline = malloc(screen.scanline*screen.pixelbytes);
+    /* Clear first line */
+    for (x = 0; x < width; x++)
+        putpixel_mem(tmpline, x, 0, color);
+    if (!vport->paused) {
+        /* Recompute to screen coords */
+        sx += vport->x;
+        sy += vport->y;
+        /* Copy the rest */
+        for (y = sy;y < sy+height; y++)
+            memcpy(&screen.fbaddress[POINTPOS(sx,y)], tmpline,
+                   screen.pixelbytes * width);
+    }
+    if (vport->dbdata) {
+        for (y=sy;y < sy+height; y++) {
+            int rline = (y + vport->dboffset) % vport->height;
+            int rpos = (rline * vport->width + sx) * screen.pixelbytes;
+            memcpy(&vport->dbdata[rpos], tmpline, screen.pixelbytes * width);
+        }
+    }
+}
+/** Fill viewport with background color */
+static void clear_port(viewport_t *vport)
+{
+    draw_rectangle(vport, 0, 0, vport->width, vport->height, vport->style.bg_color);
+}
+/** Scroll unbuffered viewport up/down
+ *
+ * @param vport Viewport to scroll
+ * @param lines Positive number - scroll up, negative - scroll down
+ */
+static void scroll_port_nodb(viewport_t *vport, int lines)
+{
+    int y;
+    if (lines > 0) {
+        for (y=vport->y; y < vport->y+vport->height - lines; y++)
+            memcpy(&screen.fbaddress[POINTPOS(vport->x,y)],
+                   &screen.fbaddress[POINTPOS(vport->x,y + lines)],
+                   screen.pixelbytes * vport->width);
+        draw_rectangle(vport, 0, vport->height - lines,
+                   vport->width, lines, vport->style.bg_color);
+    } else if (lines < 0) {
+        lines = -lines;
+        for (y=vport->y + vport->height-1; y >= vport->y + lines; y--)
+            memcpy(&screen.fbaddress[POINTPOS(vport->x,y)],
+                   &screen.fbaddress[POINTPOS(vport->x,y - lines)],
+                   screen.pixelbytes * vport->width);
+        draw_rectangle(vport, 0, 0, vport->width, lines, vport->style.bg_color);
+    }
+}
+/** Refresh given viewport from double buffer */
+static void refresh_viewport_db(viewport_t *vport)
+{
+    unsigned int y, srcy, srcoff, dsty, dstx;
+    for (y = 0; y < vport->height; y++) {
+        srcy = (y + vport->dboffset) % vport->height;
+        srcoff = (vport->width * srcy) * screen.pixelbytes;
+        dstx = vport->x;
+        dsty = vport->y + y;
+        memcpy(&screen.fbaddress[POINTPOS(dstx,dsty)],
+               &vport->dbdata[srcoff],
+               vport->width*screen.pixelbytes);
+    }
+}
+/** Scroll viewport that has double buffering enabled */
+static void scroll_port_db(viewport_t *vport, int lines)
+{
+    ++vport->paused;
+    if (lines > 0) {
+        draw_rectangle(vport, 0, 0, vport->width, lines,
+                   vport->style.bg_color);
+        vport->dboffset += lines;
+        vport->dboffset %= vport->height;
+    } else if (lines < 0) {
+        lines = -lines;
+        draw_rectangle(vport, 0, vport->height-lines,
+                   vport->width, lines,
+                   vport->style.bg_color);
+        if (vport->dboffset < lines)
+            vport->dboffset += vport->height;
+        vport->dboffset -= lines;
+    }
+    --vport->paused;
+    refresh_viewport_db(vport);
+}
+/** Scrolls viewport given number of lines */
+static void scroll_port(viewport_t *vport, int lines)
+{
+    if (vport->dbdata)
+        scroll_port_db(vport, lines);
+    else
+        scroll_port_nodb(vport, lines);
+}
+static void invert_pixel(viewport_t *vport, unsigned int x, unsigned int y)
+{
+    putpixel(vport, x, y, ~getpixel(vport, x, y));
+}
+/***************************************************************/
+/* Character-console functions */
+/** Draw character at given position
+ *
+ * @param vport Viewport where the character is printed
+ * @param sx Coordinates of top-left of the character
+ * @param sy Coordinates of top-left of the character
+ * @param style Color of the character
+ * @param transparent If false, print background color
+ */
+static void draw_glyph(viewport_t *vport,__u8 glyph, unsigned int sx, unsigned int sy,
+               style_t style, int transparent)
+{
+    int i;
+    unsigned int y;
+    unsigned int glline;
+    for (y = 0; y < FONT_SCANLINES; y++) {
+        glline = fb_font[glyph * FONT_SCANLINES + y];
+        for (i = 0; i < 8; i++) {
+            if (glline & (1 << (7 - i)))
+                putpixel(vport, sx + i, sy + y, style.fg_color);
+            else if (!transparent)
+                putpixel(vport, sx + i, sy + y, style.bg_color);
+        }
+    }
+}
+/** Invert character at given position */
+static void invert_char(viewport_t *vport,unsigned int row, unsigned int col)
+{
+    unsigned int x;
+    unsigned int y;
+    for (x = 0; x < COL_WIDTH; x++)
+        for (y = 0; y < FONT_SCANLINES; y++)
+            invert_pixel(vport, col * COL_WIDTH + x, row * FONT_SCANLINES + y);
+}
+/***************************************************************/
+/* Stdout specific functions */
+/** Create new viewport
+ *
+ * @return New viewport number
+ */
+static int viewport_create(unsigned int x, unsigned int y,unsigned int width,
+               unsigned int height)
+{
+    int i;
+    for (i=0; i < MAX_VIEWPORTS; i++) {
+        if (!viewports[i].initialized)
+            break;
+    }
+    if (i == MAX_VIEWPORTS)
+        return ELIMIT;
+    viewports[i].x = x;
+    viewports[i].y = y;
+    viewports[i].width = width;
+    viewports[i].height = height;
+    viewports[i].rows = height / FONT_SCANLINES;
+    viewports[i].cols = width / COL_WIDTH;
+    viewports[i].style.bg_color = DEFAULT_BGCOLOR;
+    viewports[i].style.fg_color = DEFAULT_FGCOLOR;
+    viewports[i].cur_col = 0;
+    viewports[i].cur_row = 0;
+    viewports[i].cursor_active = 0;
+    viewports[i].initialized = 1;
+    return i;
+}
+/** Initialize framebuffer as a chardev output device
+ *
+ * @param addr Address of theframebuffer
+ * @param xres Screen width in pixels
+ * @param yres Screen height in pixels
+ * @param bpp  Bits per pixel (8, 16, 24, 32)
+ * @param scan Bytes per one scanline
+ *
+ */
+static void screen_init(void *addr, unsigned int xres, unsigned int yres, unsigned int bpp, unsigned int scan)
+{
+    switch (bpp) {
+        case 8:
+            screen.rgb2scr = rgb_1byte;
+            screen.scr2rgb = byte1_rgb;
+            screen.pixelbytes = 1;
+            break;
+        case 16:
+            screen.rgb2scr = rgb_2byte;
+            screen.scr2rgb = byte2_rgb;
+            screen.pixelbytes = 2;
+            break;
+        case 24:
+            screen.rgb2scr = rgb_3byte;
+            screen.scr2rgb = byte3_rgb;
+            screen.pixelbytes = 3;
+            break;
+        case 32:
+            screen.rgb2scr = rgb_4byte;
+            screen.scr2rgb = byte4_rgb;
+            screen.pixelbytes = 4;
+            break;
+    }
+    screen.fbaddress = (unsigned char *) addr;
+    screen.xres = xres;
+    screen.yres = yres;
+    screen.scanline = scan;
+    /* Create first viewport */
+    viewport_create(0,0,xres,yres);
+}
+/** Hide cursor if it is shown */
+static void cursor_hide(viewport_t *vport)
+{
+    if (vport->cursor_active && vport->cursor_shown) {
+        invert_char(vport, vport->cur_row, vport->cur_col);
+        vport->cursor_shown = 0;
+    }
+}
+/** Show cursor if cursor showing is enabled */
+static void cursor_print(viewport_t *vport)
+{
+    /* Do not check for cursor_shown */
+    if (vport->cursor_active) {
+        invert_char(vport, vport->cur_row, vport->cur_col);
+        vport->cursor_shown = 1;
+    }
+}
+/** Invert cursor, if it is enabled */
+static void cursor_blink(viewport_t *vport)
+{
+    if (vport->cursor_shown)
+        cursor_hide(vport);
+    else
+        cursor_print(vport);
+}
+/** Draw character at given position relative to viewport
+ *
+ * @param vport Viewport identification
+ * @param c Character to print
+ * @param row Screen position relative to viewport
+ * @param col Screen position relative to viewport
+ * @param transparent If false, print background color with character
+ */
+static void draw_char(viewport_t *vport, char c, unsigned int row, unsigned int col,
+              style_t style, int transparent)
+{
+    /* Optimize - do not hide cursor if we are going to overwrite it */
+    if (vport->cursor_active && vport->cursor_shown &&
+        (vport->cur_col != col || vport->cur_row != row))
+        invert_char(vport, vport->cur_row, vport->cur_col);
+    draw_glyph(vport, c, col * COL_WIDTH, row * FONT_SCANLINES, style, transparent);
+    vport->cur_col = col;
+    vport->cur_row = row;
+    vport->cur_col++;
+    if (vport->cur_col>= vport->cols) {
+        vport->cur_col = 0;
+        vport->cur_row++;
+        if (vport->cur_row >= vport->rows)
+            vport->cur_row--;
+    }
+    cursor_print(vport);
+}
+/** Draw text data to viewport
+ *
+ * @param vport Viewport id
+ * @param data Text data fitting exactly into viewport
+ */
+static void draw_text_data(viewport_t *vport, keyfield_t *data)
+{
+    int i;
+    int col,row;
+    clear_port(vport);
+    for (i=0; i < vport->cols * vport->rows; i++) {
+        if (data[i].character == ' ' && style_same(data[i].style,vport->style))
+            continue;
+        col = i % vport->cols;
+        row = i / vport->cols;
+        draw_glyph(vport, data[i].character, col * COL_WIDTH, row * FONT_SCANLINES,
+               data[i].style, style_same(data[i].style,vport->style));
+    }
+    cursor_print(vport);
+}
+/** Return first free pixmap */
+static int find_free_pixmap(void)
+{
+    int i;
+    for (i=0;i < MAX_PIXMAPS;i++)
+        if (!pixmaps[i].data)
+            return i;
+    return -1;
+}
+static void putpixel_pixmap(int pm, unsigned int x, unsigned int y, int color)
+{
+    pixmap_t *pmap = &pixmaps[pm];
+    int pos = (y * pmap->width + x) * screen.pixelbytes;
+    (*screen.rgb2scr)(&pmap->data[pos],color);
+}
+/** Create a new pixmap and return appropriate ID */
+static int shm2pixmap(unsigned char *shm, size_t size)
+{
+    int pm;
+    pixmap_t *pmap;
+    pm = find_free_pixmap();
+    if (pm == -1)
+        return ELIMIT;
+    pmap = &pixmaps[pm];
+    if (ppm_get_data(shm, size, &pmap->width, &pmap->height))
+        return EINVAL;
+    pmap->data = malloc(pmap->width * pmap->height * screen.pixelbytes);
+    if (!pmap->data)
+        return ENOMEM;
+    ppm_draw(shm, size, 0, 0, pmap->width, pmap->height,
+         (putpixel_cb_t)putpixel_pixmap, (void *)pm);
+    return pm;
+}
+/** Handle shared memory communication calls
+ *
+ * Protocol for drawing pixmaps:
+ * - FB_PREPARE_SHM(client shm identification)
+ * - IPC_M_SEND_AS_AREA
+ * - FB_DRAW_PPM(startx,starty)
+ * - FB_DROP_SHM
+ *
+ * Protocol for text drawing
+ * - IPC_M_SEND_AS_AREA
+ * - FB_DRAW_TEXT_DATA
+ *
+ * @param callid Callid of the current call
+ * @param call Current call data
+ * @param vp Active viewport
+ * @return 0 if the call was not handled byt this function, 1 otherwise
+ *
+ * note: this function is not threads safe, you would have
+ * to redefine static variables with __thread
+ */
+static int shm_handle(ipc_callid_t callid, ipc_call_t *call, int vp)
+{
+    static keyfield_t *interbuffer = NULL;
+    static size_t intersize = 0;
+    static unsigned char *shm = NULL;
+    static ipcarg_t shm_id = 0;
+    static size_t shm_size;
+    int handled = 1;
+    int retval = 0;
+    viewport_t *vport = &viewports[vp];
+    unsigned int x,y;
+    switch (IPC_GET_METHOD(*call)) {
+    case IPC_M_AS_AREA_SEND:
+        /* We accept one area for data interchange */
+        if (IPC_GET_ARG1(*call) == shm_id) {
+            void *dest = as_get_mappable_page(IPC_GET_ARG2(*call));
+            shm_size = IPC_GET_ARG2(*call);
+            if (!ipc_answer_fast(callid, 0, (sysarg_t)dest, 0))
+                shm = dest;
+            else
+                shm_id = 0;
+            if (shm[0] != 'P')
+                while (1)
+                    ;
+            return 1;
+        } else {
+            intersize = IPC_GET_ARG2(*call);
+            receive_comm_area(callid,call,(void *)&interbuffer);
+        }
+        return 1;
+    case FB_PREPARE_SHM:
+        if (shm_id)
+            retval = EBUSY;
+        else
+            shm_id = IPC_GET_ARG1(*call);
+        break;
+    case FB_DROP_SHM:
+        if (shm) {
+            as_area_destroy(shm);
+            shm = NULL;
+        }
+        shm_id = 0;
+        break;
+    case FB_SHM2PIXMAP:
+        if (!shm) {
+            retval = EINVAL;
+            break;
+        }
+        retval = shm2pixmap(shm, shm_size);
+        break;
+    case FB_DRAW_PPM:
+        if (!shm) {
+            retval = EINVAL;
+            break;
+        }
+        x = IPC_GET_ARG1(*call);
+        y = IPC_GET_ARG2(*call);
+        if (x > vport->width || y > vport->height) {
+            retval = EINVAL;
+            break;
+        }
+        ppm_draw(shm, shm_size, IPC_GET_ARG1(*call), IPC_GET_ARG2(*call),
+             vport->width - x, vport->height - y, (putpixel_cb_t)putpixel, vport);
+        break;
+    case FB_DRAW_TEXT_DATA:
+        if (!interbuffer) {
+            retval = EINVAL;
+            break;
+        }
+        if (intersize < vport->cols*vport->rows*sizeof(*interbuffer)) {
+            retval = EINVAL;
+            break;
+        }
+        draw_text_data(vport, interbuffer);
+        break;
+    default:
+        handled = 0;
+    }
+    if (handled)
+        ipc_answer_fast(callid, retval, 0, 0);
+    return handled;
+}
+static void copy_vp_to_pixmap(viewport_t *vport, pixmap_t *pmap)
+{
+    int y;
+    int rowsize;
+    int tmp;
+    int width = vport->width;
+    int height = vport->height;
+    if (width + vport->x > screen.xres)
+        width = screen.xres - vport->x;
+    if (height + vport->y  > screen.yres)
+        height = screen.yres - vport->y;
+    rowsize = width * screen.pixelbytes;
+    for (y=0;y < height; y++) {
+        tmp = (vport->y + y) * screen.scanline + vport->x * screen.pixelbytes;
+        memcpy(pmap->data + rowsize*y, screen.fbaddress + tmp, rowsize);
+    }
+}
+/** Save viewport to pixmap */
+static int save_vp_to_pixmap(viewport_t *vport)
+{
+    int pm;
+    pixmap_t *pmap;
+    pm = find_free_pixmap();
+    if (pm == -1)
+        return ELIMIT;
+    pmap = &pixmaps[pm];
+    pmap->data = malloc(screen.pixelbytes * vport->width * vport->height);
+    if (!pmap->data)
+        return ENOMEM;
+    pmap->width = vport->width;
+    pmap->height = vport->height;
+    copy_vp_to_pixmap(vport, pmap);
+    return pm;
+}
+/** Draw pixmap on screen
+ *
+ * @param vp Viewport to draw on
+ * @param pm Pixmap identifier
+ */
+static int draw_pixmap(int vp, int pm)
+{
+    pixmap_t *pmap = &pixmaps[pm];
+    viewport_t *vport = &viewports[vp];
+    int y;
+    int tmp, srcrowsize;
+    int realwidth, realheight, realrowsize;
+    int width = vport->width;
+    int height = vport->height;
+    if (width + vport->x > screen.xres)
+        width = screen.xres - vport->x;
+    if (height + vport->y > screen.yres)
+        height = screen.yres - vport->y;
+    if (!pmap->data)
+        return EINVAL;
+    realwidth = pmap->width <= width ? pmap->width : width;
+    realheight = pmap->height <= height ? pmap->height : height;
+    srcrowsize = vport->width * screen.pixelbytes;
+    realrowsize = realwidth * screen.pixelbytes;
+    for (y=0; y < realheight; y++) {
+        tmp = (vport->y + y) * screen.scanline + vport->x * screen.pixelbytes;
+        memcpy(screen.fbaddress + tmp, pmap->data + y * srcrowsize, realrowsize);
+    }
+    return 0;
+}
+/** Tick animation one step forward */
+static void anims_tick(void)
+{
+    int i;
+    static int counts = 0;
+    /* Limit redrawing */
+    counts = (counts+1) % 8;
+    if (counts)
+        return;
+    for (i=0; i < MAX_ANIMATIONS; i++) {
+        if (!animations[i].animlen || !animations[i].initialized || !animations[i].enabled)
+            continue;
+        draw_pixmap(animations[i].vp, animations[i].pixmaps[animations[i].pos]);
+        animations[i].pos = (animations[i].pos+1) % animations[i].animlen;
+    }
+}
+static int pointer_x, pointer_y;
+static int pointer_shown, pointer_enabled;
+static int pointer_vport = -1;
+static int pointer_pixmap = -1;
+static void mouse_show(void)
+{
+    int i,j;
+    int visibility;
+    int color;
+    int bytepos;
+    if (pointer_shown || !pointer_enabled)
+        return;
+    /* Save image under the cursor */
+    if (pointer_vport == -1) {
+        pointer_vport = viewport_create(pointer_x, pointer_y, pointer_width, pointer_height);
+        if (pointer_vport < 0)
+            return;
+    } else {
+        viewports[pointer_vport].x = pointer_x;
+        viewports[pointer_vport].y = pointer_y;
+    }
+    if (pointer_pixmap == -1)
+        pointer_pixmap = save_vp_to_pixmap(&viewports[pointer_vport]);
+    else
+        copy_vp_to_pixmap(&viewports[pointer_vport], &pixmaps[pointer_pixmap]);
+    /* Draw cursor */
+    for (i=0; i < pointer_height; i++)
+        for (j=0;j < pointer_width; j++) {
+            bytepos = i*((pointer_width-1)/8+1) + j/8;
+            visibility = pointer_mask_bits[bytepos] & (1 << (j % 8));
+            if (visibility) {
+                color = pointer_bits[bytepos] & (1 << (j % 8)) ? 0 : 0xffffff;
+                if (pointer_x+j < screen.xres && pointer_y+i < screen.yres)
+                    putpixel(&viewports[0], pointer_x+j, pointer_y+i, color);
+            }
+        }
+    pointer_shown = 1;
+}
+static void mouse_hide(void)
+{
+    /* Restore image under the cursor */
+    if (pointer_shown) {
+        draw_pixmap(pointer_vport, pointer_pixmap);
+        pointer_shown = 0;
+    }
+}
+static void mouse_move(unsigned int x, unsigned int y)
+{
+    mouse_hide();
+    pointer_x = x;
+    pointer_y = y;
+    mouse_show();
+}
+static int anim_handle(ipc_callid_t callid, ipc_call_t *call, int vp)
+{
+    int handled = 1;
+    int retval = 0;
+    int i,nvp;
+    int newval;
+    switch (IPC_GET_METHOD(*call)) {
+    case FB_ANIM_CREATE:
+        nvp = IPC_GET_ARG1(*call);
+        if (nvp == -1)
+            nvp = vp;
+        if (nvp >= MAX_VIEWPORTS || nvp < 0 || !viewports[nvp].initialized) {
+            retval = EINVAL;
+            break;
+        }
+        for (i=0; i < MAX_ANIMATIONS; i++) {
+            if (! animations[i].initialized)
+                break;
+        }
+        if (i == MAX_ANIMATIONS) {
+            retval = ELIMIT;
+            break;
+        }
+        animations[i].initialized = 1;
+        animations[i].animlen = 0;
+        animations[i].pos = 0;
+        animations[i].enabled = 0;
+        animations[i].vp = nvp;
+        retval = i;
+        break;
+    case FB_ANIM_DROP:
+        i = IPC_GET_ARG1(*call);
+        if (i >= MAX_ANIMATIONS || i < 0) {
+            retval = EINVAL;
+            break;
+        }
+        animations[i].initialized = 0;
+        break;
+    case FB_ANIM_ADDPIXMAP:
+        i = IPC_GET_ARG1(*call);
+        if (i >= MAX_ANIMATIONS || i < 0 || !animations[i].initialized) {
+            retval = EINVAL;
+            break;
+        }
+        if (animations[i].animlen == MAX_ANIM_LEN) {
+            retval = ELIMIT;
+            break;
+        }
+        newval = IPC_GET_ARG2(*call);
+        if (newval < 0 || newval > MAX_PIXMAPS || !pixmaps[newval].data) {
+            retval = EINVAL;
+            break;
+        }
+        animations[i].pixmaps[animations[i].animlen++] = newval;
+        break;
+    case FB_ANIM_CHGVP:
+        i = IPC_GET_ARG1(*call);
+        if (i >= MAX_ANIMATIONS || i < 0) {
+            retval = EINVAL;
+            break;
+        }
+        nvp = IPC_GET_ARG2(*call);
+        if (nvp == -1)
+            nvp = vp;
+        if (nvp >= MAX_VIEWPORTS || nvp < 0 || !viewports[nvp].initialized) {
+            retval = EINVAL;
+            break;
+        }
+        animations[i].vp = nvp;
+        break;
+    case FB_ANIM_START:
+    case FB_ANIM_STOP:
+        i = IPC_GET_ARG1(*call);
+        if (i >= MAX_ANIMATIONS || i < 0) {
+            retval = EINVAL;
+            break;
+        }
+        newval = (IPC_GET_METHOD(*call) == FB_ANIM_START);
+        if (newval ^ animations[i].enabled) {
+            animations[i].enabled = newval;
+            anims_enabled += newval ? 1 : -1;
+        }
+        break;
+    default:
+        handled = 0;
+    }
+    if (handled)
+        ipc_answer_fast(callid, retval, 0, 0);
+    return handled;
+}
+/** Handler for messages concerning pixmap handling */
+static int pixmap_handle(ipc_callid_t callid, ipc_call_t *call, int vp)
+{
+    int handled = 1;
+    int retval = 0;
+    int i,nvp;
+    switch (IPC_GET_METHOD(*call)) {
+    case FB_VP_DRAW_PIXMAP:
+        nvp = IPC_GET_ARG1(*call);
+        if (nvp == -1)
+            nvp = vp;
+        if (nvp < 0 || nvp >= MAX_VIEWPORTS || !viewports[nvp].initialized) {
+            retval = EINVAL;
+            break;
+        }
+        i = IPC_GET_ARG2(*call);
+        retval = draw_pixmap(nvp, i);
+        break;
+    case FB_VP2PIXMAP:
+        nvp = IPC_GET_ARG1(*call);
+        if (nvp == -1)
+            nvp = vp;
+        if (nvp < 0 || nvp >= MAX_VIEWPORTS || !viewports[nvp].initialized)
+            retval = EINVAL;
+        else
+            retval = save_vp_to_pixmap(&viewports[nvp]);
+        break;
+    case FB_DROP_PIXMAP:
+        i = IPC_GET_ARG1(*call);
+        if (i >= MAX_PIXMAPS) {
+            retval = EINVAL;
+            break;
+        }
+        if (pixmaps[i].data) {
+            free(pixmaps[i].data);
+            pixmaps[i].data = NULL;
+        }
+        break;
+    default:
+        handled = 0;
+    }
+    if (handled)
+        ipc_answer_fast(callid, retval, 0, 0);
+    return handled;
+}
+/** Function for handling connections to FB
+ *
+ */
+static void fb_client_connection(ipc_callid_t iid, ipc_call_t *icall)
+{
+    ipc_callid_t callid;
+    ipc_call_t call;
+    int retval;
+    int i;
+    unsigned int row,col;
+    char c;
+    int vp = 0;
+    viewport_t *vport = &viewports[0];
+    if (client_connected) {
+        ipc_answer_fast(iid, ELIMIT, 0,0);
+        return;
+    }
+    client_connected = 1;
+    ipc_answer_fast(iid, 0, 0, 0); /* Accept connection */
+    while (1) {
+        if (vport->cursor_active || anims_enabled)
+            callid = async_get_call_timeout(&call,250000);
+        else
+            callid = async_get_call(&call);
+        mouse_hide();
+        if (!callid) {
+            cursor_blink(vport);
+            anims_tick();
+            mouse_show();
+            continue;
+        }
+        if (shm_handle(callid, &call, vp))
+            continue;
+        if (pixmap_handle(callid, &call, vp))
+            continue;
+        if (anim_handle(callid, &call, vp))
+            continue;
+        switch (IPC_GET_METHOD(call)) {
+        case IPC_M_PHONE_HUNGUP:
+            client_connected = 0;
+            /* cleanup other viewports */
+            for (i=1; i < MAX_VIEWPORTS; i++)
+                vport->initialized = 0;
+            return; /* Exit thread */
+        case FB_PUTCHAR:
+        case FB_TRANS_PUTCHAR:
+            c = IPC_GET_ARG1(call);
+            row = IPC_GET_ARG2(call);
+            col = IPC_GET_ARG3(call);
+            if (row >= vport->rows || col >= vport->cols) {
+                retval = EINVAL;
+                break;
+            }
+            ipc_answer_fast(callid,0,0,0);
+            draw_char(vport, c, row, col, vport->style, IPC_GET_METHOD(call) == FB_TRANS_PUTCHAR);
+            continue; /* msg already answered */
+        case FB_CLEAR:
+            clear_port(vport);
+            cursor_print(vport);
+            retval = 0;
+            break;
+        case FB_CURSOR_GOTO:
+            row = IPC_GET_ARG1(call);
+            col = IPC_GET_ARG2(call);
+            if (row >= vport->rows || col >= vport->cols) {
+                retval = EINVAL;
+                break;
+            }
+            retval = 0;
+            cursor_hide(vport);
+            vport->cur_col = col;
+            vport->cur_row = row;
+            cursor_print(vport);
+            break;
+        case FB_CURSOR_VISIBILITY:
+            cursor_hide(vport);
+            vport->cursor_active = IPC_GET_ARG1(call);
+            cursor_print(vport);
+            retval = 0;
+            break;
+        case FB_GET_CSIZE:
+            ipc_answer_fast(callid, 0, vport->rows, vport->cols);
+            continue;
+        case FB_SCROLL:
+            i = IPC_GET_ARG1(call);
+            if (i > vport->rows || i < (- (int)vport->rows)) {
+                retval = EINVAL;
+                break;
+            }
+            cursor_hide(vport);
+            scroll_port(vport, i*FONT_SCANLINES);
+            cursor_print(vport);
+            retval = 0;
+            break;
+        case FB_VIEWPORT_DB:
+            /* Enable double buffering */
+            i = IPC_GET_ARG1(call);
+            if (i == -1)
+                i = vp;
+            if (i < 0 || i >= MAX_VIEWPORTS) {
+                retval = EINVAL;
+                break;
+            }
+            if (! viewports[i].initialized ) {
+                retval = EADDRNOTAVAIL;
+                break;
+            }
+            viewports[i].dboffset = 0;
+            if (IPC_GET_ARG2(call) == 1 && !viewports[i].dbdata)
+                viewports[i].dbdata = malloc(screen.pixelbytes*viewports[i].width * viewports[i].height);
+            else if (IPC_GET_ARG2(call) == 0 && viewports[i].dbdata) {
+                free(viewports[i].dbdata);
+                viewports[i].dbdata = NULL;
+            }
+            retval = 0;
+            break;
+        case FB_VIEWPORT_SWITCH:
+            i = IPC_GET_ARG1(call);
+            if (i < 0 || i >= MAX_VIEWPORTS) {
+                retval = EINVAL;
+                break;
+            }
+            if (! viewports[i].initialized ) {
+                retval = EADDRNOTAVAIL;
+                break;
+            }
+            cursor_hide(vport);
+            vp = i;
+            vport = &viewports[vp];
+            cursor_print(vport);
+            retval = 0;
+            break;
+        case FB_VIEWPORT_CREATE:
+            retval = viewport_create(IPC_GET_ARG1(call) >> 16,
+                         IPC_GET_ARG1(call) & 0xffff,
+                         IPC_GET_ARG2(call) >> 16,
+                         IPC_GET_ARG2(call) & 0xffff);
+            break;
+        case FB_VIEWPORT_DELETE:
+            i = IPC_GET_ARG1(call);
+            if (i < 0 || i >= MAX_VIEWPORTS) {
+                retval = EINVAL;
+                break;
+            }
+            if (! viewports[i].initialized ) {
+                retval = EADDRNOTAVAIL;
+                break;
+            }
+            viewports[i].initialized = 0;
+            if (viewports[i].dbdata) {
+                free(viewports[i].dbdata);
+                viewports[i].dbdata = NULL;
+            }
+            retval = 0;
+            break;
+        case FB_SET_STYLE:
+            vport->style.fg_color = IPC_GET_ARG1(call);
+            vport->style.bg_color = IPC_GET_ARG2(call);
+            retval = 0;
+            break;
+        case FB_GET_RESOLUTION:
+            ipc_answer_fast(callid, 0, screen.xres,screen.yres);
+            continue;
+        case FB_POINTER_MOVE:
+            pointer_enabled = 1;
+            mouse_move(IPC_GET_ARG1(call), IPC_GET_ARG2(call));
+            retval = 0;
+            break;
+        default:
+            retval = ENOENT;
+        }
+        ipc_answer_fast(callid,retval,0,0);
+    }
+}
+/** Initialization of framebuffer */
+int fb_init(void)
+{
+    void *fb_ph_addr;
+    unsigned int fb_width;
+    unsigned int fb_height;
+    unsigned int fb_bpp;
+    unsigned int fb_scanline;
+    void *fb_addr;
+    size_t asz;
+    async_set_client_connection(fb_client_connection);
+    fb_ph_addr=(void *)sysinfo_value("fb.address.physical");
+    fb_width=sysinfo_value("fb.width");
+    fb_height=sysinfo_value("fb.height");
+    fb_bpp=sysinfo_value("fb.bpp");
+    fb_scanline=sysinfo_value("fb.scanline");
+    asz = fb_scanline*fb_height;
+    fb_addr = as_get_mappable_page(asz);
+    map_physmem(fb_ph_addr, fb_addr, ALIGN_UP(asz,PAGE_SIZE) >>PAGE_WIDTH,
+            AS_AREA_READ | AS_AREA_WRITE | AS_AREA_CACHEABLE);
+    screen_init(fb_addr, fb_width, fb_height, fb_bpp, fb_scanline);
+    return 0;
+}
+/**
+ * @}
+ */

 /tags/0.2.0.2/uspace/fb/ppm.h
 ,0 → 1,40
+/*
+ * Copyright (C) 2006 Ondrej Palkovsky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#ifndef _PPM_H_
+#define _PPM_H_
+#include "fb.h"
+int ppm_draw(unsigned char *data, size_t datasz, unsigned int sx,
+         unsigned int sy,
+         unsigned int maxwidth, unsigned int maxheight,
+         putpixel_cb_t fnc,void *);
+int ppm_get_data(unsigned char *data, size_t dtsz, unsigned int *width, unsigned int *height);
+#endif

 /tags/0.2.0.2/uspace/fb/ega.c
 ,0 → 1,327
+/*
+ * Copyright (C) 2006 Ondrej Palkovsky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/** @defgroup egafb EGA framebuffer
+ * @brief   HelenOS EGA framebuffer.
+ * @ingroup fbs
+ * @{
+ */
+/** @file
+ */
+#include <stdlib.h>
+#include <unistd.h>
+#include <align.h>
+#include <async.h>
+#include <ipc/ipc.h>
+#include <errno.h>
+#include <stdio.h>
+#include <ddi.h>
+#include <sysinfo.h>
+#include <as.h>
+#include <ipc/fb.h>
+#include <ipc/ipc.h>
+#include <ipc/ns.h>
+#include <ipc/services.h>
+#include <libarch/ddi.h>
+#include "ega.h"
+#include "../console/screenbuffer.h"
+#include "main.h"
+#define MAX_SAVED_SCREENS 256
+typedef struct saved_screen {
+    short *data;
+} saved_screen;
+saved_screen saved_screens[MAX_SAVED_SCREENS];
+#define EGA_IO_ADDRESS 0x3d4
+#define EGA_IO_SIZE 2
+#define NORMAL_COLOR       0x0f
+#define INVERTED_COLOR     0xf0
+#define EGA_STYLE(fg,bg) ((fg) > (bg) ? NORMAL_COLOR : INVERTED_COLOR)
+/* Allow only 1 connection */
+static int client_connected = 0;
+static unsigned int scr_width;
+static unsigned int scr_height;
+static char *scr_addr;
+static unsigned int style = NORMAL_COLOR;
+static void clrscr(void)
+{
+    int i;
+    for (i=0; i < scr_width*scr_height; i++) {
+        scr_addr[i*2] = ' ';
+        scr_addr[i*2+1] = style;
+    }
+}
+static void cursor_goto(unsigned int row, unsigned int col)
+{
+    int ega_cursor;
+    ega_cursor=col+scr_width*row;
+    outb(EGA_IO_ADDRESS    , 0xe);
+    outb(EGA_IO_ADDRESS + 1, (ega_cursor >>8) & 0xff);
+    outb(EGA_IO_ADDRESS    , 0xf);
+    outb(EGA_IO_ADDRESS + 1, ega_cursor & 0xff);
+}
+static void cursor_disable(void)
+{
+    uint8_t stat;
+    outb(EGA_IO_ADDRESS , 0xa);
+    stat=inb(EGA_IO_ADDRESS + 1);
+    outb(EGA_IO_ADDRESS , 0xa);
+    outb(EGA_IO_ADDRESS +1 ,stat | (1<<5) );
+}
+static void cursor_enable(void)
+{
+    uint8_t stat;
+    outb(EGA_IO_ADDRESS , 0xa);
+    stat=inb(EGA_IO_ADDRESS + 1);
+    outb(EGA_IO_ADDRESS , 0xa);
+    outb(EGA_IO_ADDRESS +1 ,stat & (~(1<<5)) );
+}
+static void scroll(int rows)
+{
+    int i;
+    if (rows > 0) {
+        memcpy (scr_addr,((char *)scr_addr) + rows * scr_width * 2, scr_width * scr_height * 2 - rows * scr_width * 2);
+        for (i = 0; i < rows * scr_width ; i ++)
+            (((short *)scr_addr) + scr_width * scr_height - rows * scr_width) [i] = ((style << 8) + ' ');
+    } else if (rows < 0) {
+        memcpy (((char *)scr_addr) - rows * scr_width * 2 ,scr_addr ,scr_width * scr_height * 2 + rows * scr_width * 2);
+        for (i = 0; i < - rows * scr_width ; i++)
+            ((short *)scr_addr) [i] = ((style << 8 ) + ' ');
+    }
+}
+static void printchar(char c, unsigned int row, unsigned int col)
+{
+    scr_addr[(row*scr_width + col)*2] = c;
+    scr_addr[(row*scr_width + col)*2+1] = style;
+    cursor_goto(row,col+1);
+}
+static void draw_text_data(keyfield_t *data)
+{
+    int i;
+    for (i=0; i < scr_width*scr_height; i++) {
+        scr_addr[i*2] = data[i].character;
+        scr_addr[i*2+1] = EGA_STYLE(data[i].style.fg_color, data[i].style.bg_color);
+    }
+}
+static int save_screen(void)
+{
+    int i;
+    for (i=0; ( i < MAX_SAVED_SCREENS ) && (saved_screens[i].data); i++)
+        ;
+    if (i == MAX_SAVED_SCREENS)
+        return EINVAL;
+    if (!(saved_screens[i].data=malloc( 2 * scr_width*scr_height )))
+        return ENOMEM;
+    memcpy(saved_screens[i].data, scr_addr, 2 * scr_width * scr_height);
+    return i;
+}
+static int print_screen(int i)
+{
+    if (saved_screens[i].data)
+        memcpy(scr_addr, saved_screens[i].data, 2 * scr_width * scr_height);
+    else return EINVAL;
+    return i;
+}
+static void ega_client_connection(ipc_callid_t iid, ipc_call_t *icall)
+{
+    int retval;
+    ipc_callid_t callid;
+    ipc_call_t call;
+    char c;
+    unsigned int row, col;
+    int bgcolor,fgcolor;
+    keyfield_t *interbuf = NULL;
+    size_t intersize = 0;
+    int i;
+    if (client_connected) {
+        ipc_answer_fast(iid, ELIMIT, 0,0);
+        return;
+    }
+    client_connected = 1;
+    ipc_answer_fast(iid, 0, 0, 0); /* Accept connection */
+    while (1) {
+        callid = async_get_call(&call);
+        switch (IPC_GET_METHOD(call)) {
+        case IPC_M_PHONE_HUNGUP:
+            client_connected = 0;
+            ipc_answer_fast(callid,0,0,0);
+            return; /* Exit thread */
+        case IPC_M_AS_AREA_SEND:
+            /* We accept one area for data interchange */
+            intersize = IPC_GET_ARG2(call);
+            if (intersize >= scr_width*scr_height*sizeof(*interbuf)) {
+                receive_comm_area(callid,&call,(void *)&interbuf);
+                continue;
+            }
+            retval = EINVAL;
+            break;
+        case FB_DRAW_TEXT_DATA:
+            if (!interbuf) {
+                retval = EINVAL;
+                break;
+            }
+            draw_text_data(interbuf);
+            retval = 0;
+            break;
+        case FB_GET_CSIZE:
+            ipc_answer_fast(callid, 0, scr_height, scr_width);
+            continue;
+        case FB_CLEAR:
+            clrscr();
+            retval = 0;
+            break;
+        case FB_PUTCHAR:
+            c = IPC_GET_ARG1(call);
+            row = IPC_GET_ARG2(call);
+            col = IPC_GET_ARG3(call);
+            if (col >= scr_width || row >= scr_height) {
+                retval = EINVAL;
+                break;
+            }
+            printchar(c,row,col);
+            retval = 0;
+            break;
+        case FB_CURSOR_GOTO:
+            row = IPC_GET_ARG1(call);
+            col = IPC_GET_ARG2(call);
+            if (row >= scr_height || col >= scr_width) {
+                retval = EINVAL;
+                break;
+            }
+            cursor_goto(row,col);
+            retval = 0;
+            break;
+        case FB_SCROLL:
+            i = IPC_GET_ARG1(call);
+            if (i > scr_height || i < (- (int)scr_height)) {
+                retval = EINVAL;
+                break;
+            }
+            scroll(i);
+            retval = 0;
+            break;
+        case FB_CURSOR_VISIBILITY:
+            if(IPC_GET_ARG1(call))
+                cursor_enable();
+            else
+                cursor_disable();
+            retval = 0;
+            break;
+        case FB_SET_STYLE:
+            fgcolor = IPC_GET_ARG1(call);
+            bgcolor = IPC_GET_ARG2(call);
+            style = EGA_STYLE(fgcolor, bgcolor);
+            retval = 0;
+            break;
+        case FB_VP_DRAW_PIXMAP:
+            i = IPC_GET_ARG2(call);
+            retval = print_screen(i);
+            break;
+        case FB_VP2PIXMAP:
+            retval = save_screen();
+            break;
+        case FB_DROP_PIXMAP:
+            i = IPC_GET_ARG1(call);
+            if (i >= MAX_SAVED_SCREENS) {
+                retval = EINVAL;
+                break;
+            }
+            if (saved_screens[i].data) {
+                free(saved_screens[i].data);
+                saved_screens[i].data = NULL;
+            }
+            retval = 0;
+            break;
+        default:
+            retval = ENOENT;
+        }
+        ipc_answer_fast(callid,retval,0,0);
+    }
+}
+int ega_init(void)
+{
+    void *ega_ph_addr;
+    size_t sz;
+    ega_ph_addr=(void *)sysinfo_value("fb.address.physical");
+    scr_width=sysinfo_value("fb.width");
+    scr_height=sysinfo_value("fb.height");
+    iospace_enable(task_get_id(),(void *)EGA_IO_ADDRESS,2);
+    sz = scr_width*scr_height*2;
+    scr_addr = as_get_mappable_page(sz);
+    map_physmem(ega_ph_addr, scr_addr, ALIGN_UP(sz,PAGE_SIZE)>>PAGE_WIDTH,
+            AS_AREA_READ | AS_AREA_WRITE);
+    async_set_client_connection(ega_client_connection);
+    return 0;
+}
+/**
+ * @}
+ */

 /tags/0.2.0.2/uspace/fb/ppm.c
 ,0 → 1,128
+/*
+ * Copyright (C) 2006 Ondrej Palkovsky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#include <types.h>
+#include <errno.h>
+#include "ppm.h"
+static void skip_whitespace(unsigned char **data)
+{
+retry:
+    while (**data == ' ' || **data == '\t' || **data == '\n' || **data == '\r')
+        (*data)++;
+    if (**data == '#') {
+        while (1) {
+            if (**data == '\n' || **data == '\r')
+                break;
+            (*data)++;
+        }
+        goto retry;
+    }
+}
+static void read_num(unsigned char **data, unsigned int *num)
+{
+    *num = 0;
+    while (**data >= '0' && **data <= '9') {
+        *num *= 10;
+        *num += **data - '0';
+        (*data)++;
+    }
+}
+int ppm_get_data(unsigned char *data, size_t dtsz, unsigned int *width, unsigned int *height)
+{
+    /* Read magic */
+    if (data[0] != 'P' || data[1] != '6')
+        return EINVAL;
+    data+=2;
+    skip_whitespace(&data);
+    read_num(&data, width);
+    skip_whitespace(&data);
+    read_num(&data,height);
+    return 0;
+}
+/** Draw PPM pixmap
+ *
+ * @param data Pointer to PPM data
+ * @param datasz Maximum data size
+ * @param sx Coordinate of upper left corner
+ * @param sy Coordinate of upper left corner
+ * @param maxwidth Maximum allowed width for picture
+ * @param maxheight Maximum allowed height for picture
+ * @param putpixel Putpixel function used to print bitmap
+ */
+int ppm_draw(unsigned char *data, size_t datasz, unsigned int sx,
+         unsigned int sy,
+         unsigned int maxwidth, unsigned int maxheight,
+         putpixel_cb_t putpixel, void *vport)
+{
+    unsigned int width, height;
+    unsigned int maxcolor;
+    int i;
+    unsigned int color;
+    unsigned int coef;
+    /* Read magic */
+    if (data[0] != 'P' || data[1] != '6')
+        return EINVAL;
+    data+=2;
+    skip_whitespace(&data);
+    read_num(&data, &width);
+    skip_whitespace(&data);
+    read_num(&data,&height);
+    skip_whitespace(&data);
+    read_num(&data,&maxcolor);
+    data++;
+    if (maxcolor == 0 || maxcolor > 255 || width*height > datasz) {
+        return EINVAL;
+    }
+    coef = 255/maxcolor;
+    if (coef*maxcolor > 255)
+        coef -= 1;
+    for (i=0; i < width*height; i++) {
+        /* Crop picture if we don't fit into region */
+        if (i % width > maxwidth || i/width > maxheight) {
+            data += 3;
+            continue;
+        }
+        color = ((data[0]*coef) << 16) + ((data[1]*coef) << 8) + data[2]*coef;
+        (*putpixel)(vport, sx+(i % width), sy+(i / width), color);
+        data += 3;
+    }
+    return 0;
+}

 /tags/0.2.0.2/uspace/fb/sysio.c
 ,0 → 1,198
+/*
+ * Copyright (C) 2006 Ondrej Palkovsky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/** @defgroup sysio SysIO
+ * @brief   HelenOS framebuffer emulation via kernel.
+ * @ingroup fbs
+ * @{
+ */
+/** @file
+ */
+#include <async.h>
+#include <ipc/fb.h>
+#include <ipc/ipc.h>
+#include <libc.h>
+#include <errno.h>
+#include <string.h>
+#include <libc.h>
+#include <stdio.h>
+#include "sysio.h"
+#define WIDTH 80
+#define HEIGHT 25
+/* Allow only 1 connection */
+static int client_connected = 0;
+static void sysput(char c)
+{
+    __SYSCALL3(SYS_IO, 1, (sysarg_t)&c, (sysarg_t) 1);
+}
+static void sysputs(char *s)
+{
+    while (*s) {
+        sysput(*(s++));
+    }
+//  __SYSCALL3(SYS_IO, 1, (sysarg_t)s, strlen(s));
+}
+/** Send clearscreen sequence to console */
+static void clrscr(void)
+{
+    sysputs("\033[2J");
+}
+/** Send ansi sequence to console to change cursor position */
+static void curs_goto(unsigned int row, unsigned int col)
+{
+    char control[20];
+    if (row > 200 || col > 200)
+        return;
+    snprintf(control, 20, "\033[%d;%df",row+1, col+1);
+    sysputs(control);
+}
+static void set_style(int mode)
+{
+    char control[20];
+    snprintf(control, 20, "\033[%dm", mode);
+    sysputs(control);
+}
+static void scroll(int i)
+{
+    if (i > 0) {
+        curs_goto(HEIGHT-1, 0);
+        while (i--)
+            sysputs("\033D");
+    } else if (i < 0) {
+        curs_goto(0,0);
+        while (i++)
+            sysputs("\033M");
+    }
+}
+/** ANSI terminal emulation main thread */
+static void sysio_client_connection(ipc_callid_t iid, ipc_call_t *icall)
+{
+    int retval;
+    ipc_callid_t callid;
+    ipc_call_t call;
+    char c;
+    int lastcol=0;
+    int lastrow=0;
+    int newcol,newrow;
+    int fgcolor,bgcolor;
+    int i;
+    if (client_connected) {
+        ipc_answer_fast(iid, ELIMIT, 0,0);
+        return;
+    }
+    client_connected = 1;
+    ipc_answer_fast(iid, 0, 0, 0); /* Accept connection */
+    while (1) {
+        callid = async_get_call(&call);
+        switch (IPC_GET_METHOD(call)) {
+            case IPC_M_PHONE_HUNGUP:
+                client_connected = 0;
+                ipc_answer_fast(callid, 0, 0, 0);
+                return; /* Exit thread */
+            case FB_PUTCHAR:
+                c = IPC_GET_ARG1(call);
+                newrow = IPC_GET_ARG2(call);
+                newcol = IPC_GET_ARG3(call);
+                if ((lastcol != newcol) || (lastrow != newrow))
+                    curs_goto(newrow, newcol);
+                lastcol = newcol + 1;
+                lastrow = newrow;
+                sysput(c);
+                retval = 0;
+                break;
+            case FB_CURSOR_GOTO:
+                newrow = IPC_GET_ARG1(call);
+                newcol = IPC_GET_ARG2(call);
+                curs_goto(newrow, newcol);
+                lastrow = newrow;
+                lastcol = newcol;
+                retval = 0;
+                break;
+            case FB_GET_CSIZE:
+                ipc_answer_fast(callid, 0, HEIGHT, WIDTH);
+                continue;
+            case FB_CLEAR:
+                clrscr();
+                retval = 0;
+                break;
+            case FB_SET_STYLE:
+                fgcolor = IPC_GET_ARG1(call);
+                bgcolor = IPC_GET_ARG2(call);
+                if (fgcolor < bgcolor)
+                    set_style(0);
+                else
+                    set_style(7);
+                retval = 0;
+                break;
+            case FB_SCROLL:
+                i = IPC_GET_ARG1(call);
+                if ((i > HEIGHT) || (i < -HEIGHT)) {
+                    retval = EINVAL;
+                    break;
+                }
+                scroll(i);
+                curs_goto(lastrow, lastcol);
+                retval = 0;
+                break;
+            default:
+                retval = ENOENT;
+        }
+        ipc_answer_fast(callid, retval, 0, 0);
+    }
+}
+/** ANSI terminal emulation initialization */
+void sysio_init(void)
+{
+    async_set_client_connection(sysio_client_connection);
+    clrscr();
+    curs_goto(0,0);
+    /* Set scrolling region to 0-25 lines */
+    sysputs("\033[0;25r");
+}
+/**
+ * @}
+ */

/tags/0.2.0.2/uspace/fb/pointer_mask.xbm
0,0 → 1,6
#define pointer_mask_width 11
#define pointer_mask_height 18
static unsigned char pointer_mask_bits[] = {
0x01, 0x00, 0x03, 0x00, 0x07, 0x00, 0x0f, 0x00, 0x1f, 0x00, 0x3f, 0x00,
0x7f, 0x00, 0xff, 0x00, 0xff, 0x01, 0xff, 0x03, 0xff, 0x07, 0xff, 0x03,
0xff, 0x00, 0xff, 0x00, 0xf7, 0x01, 0xe3, 0x01, 0xe1, 0x01, 0xc0, 0x00 };

/tags/0.2.0.2/uspace/fb/pointer.xbm
0,0 → 1,6
#define pointer_width 11
#define pointer_height 18
static unsigned char pointer_bits[] = {
0x01, 0x00, 0x03, 0x00, 0x05, 0x00, 0x09, 0x00, 0x11, 0x00, 0x21, 0x00,
0x41, 0x00, 0x81, 0x00, 0x01, 0x01, 0x01, 0x02, 0x01, 0x04, 0x01, 0x03,
0x81, 0x00, 0x89, 0x00, 0x15, 0x01, 0x23, 0x01, 0x21, 0x01, 0xc0, 0x00 };

 /tags/0.2.0.2/uspace/fb/fb.h
 ,0 → 1,47
+/*
+ * Copyright (C) 2006 Ondrej Palkovsky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/** @addtogroup fb
+ * @ingroup fbs
+ * @{
+ */
+/** @file
+ */
+#ifndef _FB_H_
+#define _FB_H_
+typedef void (* putpixel_cb_t)(void *,unsigned int, unsigned int, int);
+int fb_init(void);
+#endif
+/** @}
+ */

 /tags/0.2.0.2/uspace/fb/ega.h
 ,0 → 1,46
+/*
+ * Copyright (C) 2006 Ondrej Palkovsky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/** @addtogroup egafb
+ * @brief   HelenOS EGA framebuffer.
+ * @ingroup fbs
+ * @{
+ */
+/** @file
+ */
+#ifndef _EGA_H_
+#define _EGA_H_
+int ega_init(void);
+#endif
+/** @}
+ */

 /tags/0.2.0.2/uspace/fb/sysio.h
 ,0 → 1,46
+/*
+ * Copyright (C) 2006 Ondrej Palkovsky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/** @addtogroup sysio
+ * @brief   HelenOS framebuffer emulation via kernel.
+ * @ingroup fbs
+ * @{
+ */
+/** @file
+ */
+#ifndef _SYSIO_H_
+#define _SYSIO_H_
+void sysio_init(void);
+#endif
+/** @}
+ */

 /tags/0.2.0.2/uspace/fb/main.c
 ,0 → 1,81
+/*
+ * Copyright (C) 2006 Ondrej Palkovsky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#include <ipc/ipc.h>
+#include <ipc/services.h>
+#include <sysinfo.h>
+#include <async.h>
+#include <as.h>
+#include <align.h>
+#include <errno.h>
+#include "fb.h"
+#include "sysio.h"
+#include "ega.h"
+#include "main.h"
+void receive_comm_area(ipc_callid_t callid, ipc_call_t *call, void **area)
+{
+    void *dest;
+    dest = as_get_mappable_page(IPC_GET_ARG2(*call));
+    if (ipc_answer_fast(callid, 0, (sysarg_t)dest, 0) == 0) {
+        if (*area)
+            as_area_destroy(*area);
+        *area = dest;
+    }
+}
+int main(int argc, char *argv[])
+{
+    ipcarg_t phonead;
+    int initialized = 0;
+#ifdef FB_ENABLED
+    if (sysinfo_value("fb.kind") == 1) {
+        if (fb_init() == 0)
+            initialized = 1;
+    }
+#endif
+#ifdef EGA_ENABLED
+    if (! initialized && sysinfo_value("fb.kind") == 2) {
+        if (ega_init() == 0)
+            initialized = 1;
+    }
+#endif
+    if (!initialized)
+        sysio_init();
+    if (ipc_connect_to_me(PHONE_NS, SERVICE_VIDEO, 0, &phonead) != 0)
+        return -1;
+    async_manager();
+    /* Never reached */
+    return 0;
+}

 /tags/0.2.0.2/uspace/fb/Makefile
 ,0 → 1,97
+#
+# Copyright (C) 2005 Martin Decky
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# - Redistributions of source code must retain the above copyright
+#   notice, this list of conditions and the following disclaimer.
+# - Redistributions in binary form must reproduce the above copyright
+#   notice, this list of conditions and the following disclaimer in the
+#   documentation and/or other materials provided with the distribution.
+# - The name of the author may not be used to endorse or promote products
+#   derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+## Setup toolchain
+#
+LIBC_PREFIX = ../libc
+SOFTINT_PREFIX = ../softint
+include $(LIBC_PREFIX)/Makefile.toolchain
+CFLAGS += -I../libipc/include
+LIBS =  $(LIBC_PREFIX)/libc.a
+## Sources
+#
+OUTPUT = fb
+SOURCES = \
+    main.c \
+    sysio.c \
+    ppm.c
+ifneq ($(ARCH), ia64)
+    SOURCES += fb.c \
+        font-8x16.c
+    CFLAGS += -DFB_ENABLED
+endif
+ifeq ($(ARCH), ia32)
+    SOURCES += ega.c
+    CFLAGS += -DEGA_ENABLED
+endif
+ifeq ($(ARCH), amd64)
+    SOURCES += ega.c
+    CFLAGS += -DEGA_ENABLED
+endif
+ifeq ($(ARCH), mips32)
+    CFLAGS += -DFB_BIG_ENDIAN
+endif
+CFLAGS += -D$(ARCH)
+OBJECTS := $(addsuffix .o,$(basename $(SOURCES)))
+.PHONY: all clean depend disasm
+all: $(OUTPUT) disasm
+-include Makefile.depend
+clean:
+    -rm -f $(OUTPUT) $(OUTPUT).map $(OUTPUT).disasm Makefile.depend
+depend:
+    $(CC) $(DEFS) $(CFLAGS) -M $(SOURCES) > Makefile.depend
+$(OUTPUT): $(OBJECTS) $(LIBS)
+    $(LD) -T $(LIBC_PREFIX)/arch/$(ARCH)/_link.ld -e __entry_driver $(OBJECTS) $(LIBS) $(LFLAGS) -o $@ -Map $(OUTPUT).map
+disasm:
+    $(OBJDUMP) -d $(OUTPUT) >$(OUTPUT).disasm
+%.o: %.S
+    $(CC) $(DEFS) $(AFLAGS) $(CFLAGS) -D__ASM__ -c $< -o $@
+%.o: %.s
+    $(AS) $(AFLAGS) $< -o $@
+%.o: %.c
+    $(CC) $(DEFS) $(CFLAGS) -c $< -o $@

 /tags/0.2.0.2/uspace/fb/main.h
 ,0 → 1,34
+/*
+ * Copyright (C) 2006 Ondrej Palkovsky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#ifndef __MAIN_H_
+#define __MAIN_H_
+void receive_comm_area(ipc_callid_t callid, ipc_call_t *call, void **area);
+#endif

 /tags/0.2.0.2/uspace/fb/font-8x16.h
 ,0 → 1,37
+/*
+ * Copyright (C) 2005 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#ifndef __FONT_8X16_H__
+#define __FONT_8X16_H__
+#define FONT_GLIPHS     256
+#define FONT_SCANLINES  16
+extern unsigned char fb_font[FONT_GLIPHS * FONT_SCANLINES];
+#endif

 /tags/0.2.0.2/uspace/fb/font-8x16.c
 ,0 → 1,4641
+/*
+ * Copyright (C) 2005 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#include "font-8x16.h"
+unsigned char fb_font[FONT_GLIPHS * FONT_SCANLINES] = {
+    /* 0 0x00 '^@' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 1 0x01 '^A' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x7e, /* 01111110 */
+x81, /* 10000001 */
+xa5, /* 10100101 */
+x81, /* 10000001 */
+x81, /* 10000001 */
+xbd, /* 10111101 */
+x99, /* 10011001 */
+x81, /* 10000001 */
+x81, /* 10000001 */
+x7e, /* 01111110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 2 0x02 '^B' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x7e, /* 01111110 */
+xff, /* 11111111 */
+xdb, /* 11011011 */
+xff, /* 11111111 */
+xff, /* 11111111 */
+xc3, /* 11000011 */
+xe7, /* 11100111 */
+xff, /* 11111111 */
+xff, /* 11111111 */
+x7e, /* 01111110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 3 0x03 '^C' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x6c, /* 01101100 */
+xfe, /* 11111110 */
+xfe, /* 11111110 */
+xfe, /* 11111110 */
+xfe, /* 11111110 */
+x7c, /* 01111100 */
+x38, /* 00111000 */
+x10, /* 00010000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 4 0x04 '^D' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x10, /* 00010000 */
+x38, /* 00111000 */
+x7c, /* 01111100 */
+xfe, /* 11111110 */
+x7c, /* 01111100 */
+x38, /* 00111000 */
+x10, /* 00010000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 5 0x05 '^E' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x18, /* 00011000 */
+x3c, /* 00111100 */
+x3c, /* 00111100 */
+xe7, /* 11100111 */
+xe7, /* 11100111 */
+xe7, /* 11100111 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x3c, /* 00111100 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 6 0x06 '^F' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x18, /* 00011000 */
+x3c, /* 00111100 */
+x7e, /* 01111110 */
+xff, /* 11111111 */
+xff, /* 11111111 */
+x7e, /* 01111110 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x3c, /* 00111100 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 7 0x07 '^G' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x18, /* 00011000 */
+x3c, /* 00111100 */
+x3c, /* 00111100 */
+x18, /* 00011000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 8 0x08 '^H' */
+xff, /* 11111111 */
+xff, /* 11111111 */
+xff, /* 11111111 */
+xff, /* 11111111 */
+xff, /* 11111111 */
+xff, /* 11111111 */
+xe7, /* 11100111 */
+xc3, /* 11000011 */
+xc3, /* 11000011 */
+xe7, /* 11100111 */
+xff, /* 11111111 */
+xff, /* 11111111 */
+xff, /* 11111111 */
+xff, /* 11111111 */
+xff, /* 11111111 */
+xff, /* 11111111 */
+    /* 9 0x09 '^I' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x3c, /* 00111100 */
+x66, /* 01100110 */
+x42, /* 01000010 */
+x42, /* 01000010 */
+x66, /* 01100110 */
+x3c, /* 00111100 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 10 0x0a '^J' */
+xff, /* 11111111 */
+xff, /* 11111111 */
+xff, /* 11111111 */
+xff, /* 11111111 */
+xff, /* 11111111 */
+xc3, /* 11000011 */
+x99, /* 10011001 */
+xbd, /* 10111101 */
+xbd, /* 10111101 */
+x99, /* 10011001 */
+xc3, /* 11000011 */
+xff, /* 11111111 */
+xff, /* 11111111 */
+xff, /* 11111111 */
+xff, /* 11111111 */
+xff, /* 11111111 */
+    /* 11 0x0b '^K' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x1e, /* 00011110 */
+x0e, /* 00001110 */
+x1a, /* 00011010 */
+x32, /* 00110010 */
+x78, /* 01111000 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+x78, /* 01111000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 12 0x0c '^L' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x3c, /* 00111100 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+x3c, /* 00111100 */
+x18, /* 00011000 */
+x7e, /* 01111110 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 13 0x0d '^M' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x3f, /* 00111111 */
+x33, /* 00110011 */
+x3f, /* 00111111 */
+x30, /* 00110000 */
+x30, /* 00110000 */
+x30, /* 00110000 */
+x30, /* 00110000 */
+x70, /* 01110000 */
+xf0, /* 11110000 */
+xe0, /* 11100000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 14 0x0e '^N' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x7f, /* 01111111 */
+x63, /* 01100011 */
+x7f, /* 01111111 */
+x63, /* 01100011 */
+x63, /* 01100011 */
+x63, /* 01100011 */
+x63, /* 01100011 */
+x67, /* 01100111 */
+xe7, /* 11100111 */
+xe6, /* 11100110 */
+xc0, /* 11000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 15 0x0f '^O' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+xdb, /* 11011011 */
+x3c, /* 00111100 */
+xe7, /* 11100111 */
+x3c, /* 00111100 */
+xdb, /* 11011011 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 16 0x10 '^P' */
+x00, /* 00000000 */
+x80, /* 10000000 */
+xc0, /* 11000000 */
+xe0, /* 11100000 */
+xf0, /* 11110000 */
+xf8, /* 11111000 */
+xfe, /* 11111110 */
+xf8, /* 11111000 */
+xf0, /* 11110000 */
+xe0, /* 11100000 */
+xc0, /* 11000000 */
+x80, /* 10000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 17 0x11 '^Q' */
+x00, /* 00000000 */
+x02, /* 00000010 */
+x06, /* 00000110 */
+x0e, /* 00001110 */
+x1e, /* 00011110 */
+x3e, /* 00111110 */
+xfe, /* 11111110 */
+x3e, /* 00111110 */
+x1e, /* 00011110 */
+x0e, /* 00001110 */
+x06, /* 00000110 */
+x02, /* 00000010 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 18 0x12 '^R' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x18, /* 00011000 */
+x3c, /* 00111100 */
+x7e, /* 01111110 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x7e, /* 01111110 */
+x3c, /* 00111100 */
+x18, /* 00011000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 19 0x13 '^S' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+x00, /* 00000000 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 20 0x14 '^T' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x7f, /* 01111111 */
+xdb, /* 11011011 */
+xdb, /* 11011011 */
+xdb, /* 11011011 */
+x7b, /* 01111011 */
+x1b, /* 00011011 */
+x1b, /* 00011011 */
+x1b, /* 00011011 */
+x1b, /* 00011011 */
+x1b, /* 00011011 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 21 0x15 '^U' */
+x00, /* 00000000 */
+x7c, /* 01111100 */
+xc6, /* 11000110 */
+x60, /* 01100000 */
+x38, /* 00111000 */
+x6c, /* 01101100 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+x6c, /* 01101100 */
+x38, /* 00111000 */
+x0c, /* 00001100 */
+xc6, /* 11000110 */
+x7c, /* 01111100 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 22 0x16 '^V' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xfe, /* 11111110 */
+xfe, /* 11111110 */
+xfe, /* 11111110 */
+xfe, /* 11111110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 23 0x17 '^W' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x18, /* 00011000 */
+x3c, /* 00111100 */
+x7e, /* 01111110 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x7e, /* 01111110 */
+x3c, /* 00111100 */
+x18, /* 00011000 */
+x7e, /* 01111110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 24 0x18 '^X' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x18, /* 00011000 */
+x3c, /* 00111100 */
+x7e, /* 01111110 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 25 0x19 '^Y' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x7e, /* 01111110 */
+x3c, /* 00111100 */
+x18, /* 00011000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 26 0x1a '^Z' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x18, /* 00011000 */
+x0c, /* 00001100 */
+xfe, /* 11111110 */
+x0c, /* 00001100 */
+x18, /* 00011000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 27 0x1b '^[' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x30, /* 00110000 */
+x60, /* 01100000 */
+xfe, /* 11111110 */
+x60, /* 01100000 */
+x30, /* 00110000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 28 0x1c '^\' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xc0, /* 11000000 */
+xc0, /* 11000000 */
+xc0, /* 11000000 */
+xfe, /* 11111110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 29 0x1d '^]' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x28, /* 00101000 */
+x6c, /* 01101100 */
+xfe, /* 11111110 */
+x6c, /* 01101100 */
+x28, /* 00101000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 30 0x1e '^^' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x10, /* 00010000 */
+x38, /* 00111000 */
+x38, /* 00111000 */
+x7c, /* 01111100 */
+x7c, /* 01111100 */
+xfe, /* 11111110 */
+xfe, /* 11111110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 31 0x1f '^_' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xfe, /* 11111110 */
+xfe, /* 11111110 */
+x7c, /* 01111100 */
+x7c, /* 01111100 */
+x38, /* 00111000 */
+x38, /* 00111000 */
+x10, /* 00010000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 32 0x20 ' ' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 33 0x21 '!' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x18, /* 00011000 */
+x3c, /* 00111100 */
+x3c, /* 00111100 */
+x3c, /* 00111100 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x00, /* 00000000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 34 0x22 '"' */
+x00, /* 00000000 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+x24, /* 00100100 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 35 0x23 '#' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x6c, /* 01101100 */
+x6c, /* 01101100 */
+xfe, /* 11111110 */
+x6c, /* 01101100 */
+x6c, /* 01101100 */
+x6c, /* 01101100 */
+xfe, /* 11111110 */
+x6c, /* 01101100 */
+x6c, /* 01101100 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 36 0x24 '$' */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x7c, /* 01111100 */
+xc6, /* 11000110 */
+xc2, /* 11000010 */
+xc0, /* 11000000 */
+x7c, /* 01111100 */
+x06, /* 00000110 */
+x06, /* 00000110 */
+x86, /* 10000110 */
+xc6, /* 11000110 */
+x7c, /* 01111100 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 37 0x25 '%' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xc2, /* 11000010 */
+xc6, /* 11000110 */
+x0c, /* 00001100 */
+x18, /* 00011000 */
+x30, /* 00110000 */
+x60, /* 01100000 */
+xc6, /* 11000110 */
+x86, /* 10000110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 38 0x26 '&' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x38, /* 00111000 */
+x6c, /* 01101100 */
+x6c, /* 01101100 */
+x38, /* 00111000 */
+x76, /* 01110110 */
+xdc, /* 11011100 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+x76, /* 01110110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 39 0x27 ''' */
+x00, /* 00000000 */
+x30, /* 00110000 */
+x30, /* 00110000 */
+x30, /* 00110000 */
+x60, /* 01100000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 40 0x28 '(' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x0c, /* 00001100 */
+x18, /* 00011000 */
+x30, /* 00110000 */
+x30, /* 00110000 */
+x30, /* 00110000 */
+x30, /* 00110000 */
+x30, /* 00110000 */
+x30, /* 00110000 */
+x18, /* 00011000 */
+x0c, /* 00001100 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 41 0x29 ')' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x30, /* 00110000 */
+x18, /* 00011000 */
+x0c, /* 00001100 */
+x0c, /* 00001100 */
+x0c, /* 00001100 */
+x0c, /* 00001100 */
+x0c, /* 00001100 */
+x0c, /* 00001100 */
+x18, /* 00011000 */
+x30, /* 00110000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 42 0x2a '*' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x66, /* 01100110 */
+x3c, /* 00111100 */
+xff, /* 11111111 */
+x3c, /* 00111100 */
+x66, /* 01100110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 43 0x2b '+' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x7e, /* 01111110 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 44 0x2c ',' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x30, /* 00110000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 45 0x2d '-' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xfe, /* 11111110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 46 0x2e '.' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 47 0x2f '/' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x02, /* 00000010 */
+x06, /* 00000110 */
+x0c, /* 00001100 */
+x18, /* 00011000 */
+x30, /* 00110000 */
+x60, /* 01100000 */
+xc0, /* 11000000 */
+x80, /* 10000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 48 0x30 '0' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x38, /* 00111000 */
+x6c, /* 01101100 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xd6, /* 11010110 */
+xd6, /* 11010110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+x6c, /* 01101100 */
+x38, /* 00111000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 49 0x31 '1' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x18, /* 00011000 */
+x38, /* 00111000 */
+x78, /* 01111000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x7e, /* 01111110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 50 0x32 '2' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x7c, /* 01111100 */
+xc6, /* 11000110 */
+x06, /* 00000110 */
+x0c, /* 00001100 */
+x18, /* 00011000 */
+x30, /* 00110000 */
+x60, /* 01100000 */
+xc0, /* 11000000 */
+xc6, /* 11000110 */
+xfe, /* 11111110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 51 0x33 '3' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x7c, /* 01111100 */
+xc6, /* 11000110 */
+x06, /* 00000110 */
+x06, /* 00000110 */
+x3c, /* 00111100 */
+x06, /* 00000110 */
+x06, /* 00000110 */
+x06, /* 00000110 */
+xc6, /* 11000110 */
+x7c, /* 01111100 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 52 0x34 '4' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x0c, /* 00001100 */
+x1c, /* 00011100 */
+x3c, /* 00111100 */
+x6c, /* 01101100 */
+xcc, /* 11001100 */
+xfe, /* 11111110 */
+x0c, /* 00001100 */
+x0c, /* 00001100 */
+x0c, /* 00001100 */
+x1e, /* 00011110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 53 0x35 '5' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xfe, /* 11111110 */
+xc0, /* 11000000 */
+xc0, /* 11000000 */
+xc0, /* 11000000 */
+xfc, /* 11111100 */
+x06, /* 00000110 */
+x06, /* 00000110 */
+x06, /* 00000110 */
+xc6, /* 11000110 */
+x7c, /* 01111100 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 54 0x36 '6' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x38, /* 00111000 */
+x60, /* 01100000 */
+xc0, /* 11000000 */
+xc0, /* 11000000 */
+xfc, /* 11111100 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+x7c, /* 01111100 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 55 0x37 '7' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xfe, /* 11111110 */
+xc6, /* 11000110 */
+x06, /* 00000110 */
+x06, /* 00000110 */
+x0c, /* 00001100 */
+x18, /* 00011000 */
+x30, /* 00110000 */
+x30, /* 00110000 */
+x30, /* 00110000 */
+x30, /* 00110000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 56 0x38 '8' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x7c, /* 01111100 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+x7c, /* 01111100 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+x7c, /* 01111100 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 57 0x39 '9' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x7c, /* 01111100 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+x7e, /* 01111110 */
+x06, /* 00000110 */
+x06, /* 00000110 */
+x06, /* 00000110 */
+x0c, /* 00001100 */
+x78, /* 01111000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 58 0x3a ':' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 59 0x3b ';' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x30, /* 00110000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 60 0x3c '<' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x06, /* 00000110 */
+x0c, /* 00001100 */
+x18, /* 00011000 */
+x30, /* 00110000 */
+x60, /* 01100000 */
+x30, /* 00110000 */
+x18, /* 00011000 */
+x0c, /* 00001100 */
+x06, /* 00000110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 61 0x3d '=' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x7e, /* 01111110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x7e, /* 01111110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 62 0x3e '>' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x60, /* 01100000 */
+x30, /* 00110000 */
+x18, /* 00011000 */
+x0c, /* 00001100 */
+x06, /* 00000110 */
+x0c, /* 00001100 */
+x18, /* 00011000 */
+x30, /* 00110000 */
+x60, /* 01100000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 63 0x3f '?' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x7c, /* 01111100 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+x0c, /* 00001100 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x00, /* 00000000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 64 0x40 '@' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x7c, /* 01111100 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xde, /* 11011110 */
+xde, /* 11011110 */
+xde, /* 11011110 */
+xdc, /* 11011100 */
+xc0, /* 11000000 */
+x7c, /* 01111100 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 65 0x41 'A' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x10, /* 00010000 */
+x38, /* 00111000 */
+x6c, /* 01101100 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xfe, /* 11111110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 66 0x42 'B' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xfc, /* 11111100 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+x7c, /* 01111100 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+xfc, /* 11111100 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 67 0x43 'C' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x3c, /* 00111100 */
+x66, /* 01100110 */
+xc2, /* 11000010 */
+xc0, /* 11000000 */
+xc0, /* 11000000 */
+xc0, /* 11000000 */
+xc0, /* 11000000 */
+xc2, /* 11000010 */
+x66, /* 01100110 */
+x3c, /* 00111100 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 68 0x44 'D' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xf8, /* 11111000 */
+x6c, /* 01101100 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+x6c, /* 01101100 */
+xf8, /* 11111000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 69 0x45 'E' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xfe, /* 11111110 */
+x66, /* 01100110 */
+x62, /* 01100010 */
+x68, /* 01101000 */
+x78, /* 01111000 */
+x68, /* 01101000 */
+x60, /* 01100000 */
+x62, /* 01100010 */
+x66, /* 01100110 */
+xfe, /* 11111110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 70 0x46 'F' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xfe, /* 11111110 */
+x66, /* 01100110 */
+x62, /* 01100010 */
+x68, /* 01101000 */
+x78, /* 01111000 */
+x68, /* 01101000 */
+x60, /* 01100000 */
+x60, /* 01100000 */
+x60, /* 01100000 */
+xf0, /* 11110000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 71 0x47 'G' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x3c, /* 00111100 */
+x66, /* 01100110 */
+xc2, /* 11000010 */
+xc0, /* 11000000 */
+xc0, /* 11000000 */
+xde, /* 11011110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+x66, /* 01100110 */
+x3a, /* 00111010 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 72 0x48 'H' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xfe, /* 11111110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 73 0x49 'I' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x3c, /* 00111100 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x3c, /* 00111100 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 74 0x4a 'J' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x1e, /* 00011110 */
+x0c, /* 00001100 */
+x0c, /* 00001100 */
+x0c, /* 00001100 */
+x0c, /* 00001100 */
+x0c, /* 00001100 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+x78, /* 01111000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 75 0x4b 'K' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xe6, /* 11100110 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+x6c, /* 01101100 */
+x78, /* 01111000 */
+x78, /* 01111000 */
+x6c, /* 01101100 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+xe6, /* 11100110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 76 0x4c 'L' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xf0, /* 11110000 */
+x60, /* 01100000 */
+x60, /* 01100000 */
+x60, /* 01100000 */
+x60, /* 01100000 */
+x60, /* 01100000 */
+x60, /* 01100000 */
+x62, /* 01100010 */
+x66, /* 01100110 */
+xfe, /* 11111110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 77 0x4d 'M' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xc6, /* 11000110 */
+xee, /* 11101110 */
+xfe, /* 11111110 */
+xfe, /* 11111110 */
+xd6, /* 11010110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 78 0x4e 'N' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xc6, /* 11000110 */
+xe6, /* 11100110 */
+xf6, /* 11110110 */
+xfe, /* 11111110 */
+xde, /* 11011110 */
+xce, /* 11001110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 79 0x4f 'O' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x7c, /* 01111100 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+x7c, /* 01111100 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 80 0x50 'P' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xfc, /* 11111100 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+x7c, /* 01111100 */
+x60, /* 01100000 */
+x60, /* 01100000 */
+x60, /* 01100000 */
+x60, /* 01100000 */
+xf0, /* 11110000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 81 0x51 'Q' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x7c, /* 01111100 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xd6, /* 11010110 */
+xde, /* 11011110 */
+x7c, /* 01111100 */
+x0c, /* 00001100 */
+x0e, /* 00001110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 82 0x52 'R' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xfc, /* 11111100 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+x7c, /* 01111100 */
+x6c, /* 01101100 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+xe6, /* 11100110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 83 0x53 'S' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x7c, /* 01111100 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+x60, /* 01100000 */
+x38, /* 00111000 */
+x0c, /* 00001100 */
+x06, /* 00000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+x7c, /* 01111100 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 84 0x54 'T' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x7e, /* 01111110 */
+x7e, /* 01111110 */
+x5a, /* 01011010 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x3c, /* 00111100 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 85 0x55 'U' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+x7c, /* 01111100 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 86 0x56 'V' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+x6c, /* 01101100 */
+x38, /* 00111000 */
+x10, /* 00010000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 87 0x57 'W' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xd6, /* 11010110 */
+xd6, /* 11010110 */
+xd6, /* 11010110 */
+xfe, /* 11111110 */
+xee, /* 11101110 */
+x6c, /* 01101100 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 88 0x58 'X' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+x6c, /* 01101100 */
+x7c, /* 01111100 */
+x38, /* 00111000 */
+x38, /* 00111000 */
+x7c, /* 01111100 */
+x6c, /* 01101100 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 89 0x59 'Y' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+x3c, /* 00111100 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x3c, /* 00111100 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 90 0x5a 'Z' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xfe, /* 11111110 */
+xc6, /* 11000110 */
+x86, /* 10000110 */
+x0c, /* 00001100 */
+x18, /* 00011000 */
+x30, /* 00110000 */
+x60, /* 01100000 */
+xc2, /* 11000010 */
+xc6, /* 11000110 */
+xfe, /* 11111110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 91 0x5b '[' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x3c, /* 00111100 */
+x30, /* 00110000 */
+x30, /* 00110000 */
+x30, /* 00110000 */
+x30, /* 00110000 */
+x30, /* 00110000 */
+x30, /* 00110000 */
+x30, /* 00110000 */
+x30, /* 00110000 */
+x3c, /* 00111100 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 92 0x5c '\' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x80, /* 10000000 */
+xc0, /* 11000000 */
+xe0, /* 11100000 */
+x70, /* 01110000 */
+x38, /* 00111000 */
+x1c, /* 00011100 */
+x0e, /* 00001110 */
+x06, /* 00000110 */
+x02, /* 00000010 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 93 0x5d ']' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x3c, /* 00111100 */
+x0c, /* 00001100 */
+x0c, /* 00001100 */
+x0c, /* 00001100 */
+x0c, /* 00001100 */
+x0c, /* 00001100 */
+x0c, /* 00001100 */
+x0c, /* 00001100 */
+x0c, /* 00001100 */
+x3c, /* 00111100 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 94 0x5e '^' */
+x10, /* 00010000 */
+x38, /* 00111000 */
+x6c, /* 01101100 */
+xc6, /* 11000110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 95 0x5f '_' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xff, /* 11111111 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 96 0x60 '`' */
+x00, /* 00000000 */
+x30, /* 00110000 */
+x18, /* 00011000 */
+x0c, /* 00001100 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 97 0x61 'a' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x78, /* 01111000 */
+x0c, /* 00001100 */
+x7c, /* 01111100 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+x76, /* 01110110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 98 0x62 'b' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xe0, /* 11100000 */
+x60, /* 01100000 */
+x60, /* 01100000 */
+x78, /* 01111000 */
+x6c, /* 01101100 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+x7c, /* 01111100 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 99 0x63 'c' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x7c, /* 01111100 */
+xc6, /* 11000110 */
+xc0, /* 11000000 */
+xc0, /* 11000000 */
+xc0, /* 11000000 */
+xc6, /* 11000110 */
+x7c, /* 01111100 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 100 0x64 'd' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x1c, /* 00011100 */
+x0c, /* 00001100 */
+x0c, /* 00001100 */
+x3c, /* 00111100 */
+x6c, /* 01101100 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+x76, /* 01110110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 101 0x65 'e' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x7c, /* 01111100 */
+xc6, /* 11000110 */
+xfe, /* 11111110 */
+xc0, /* 11000000 */
+xc0, /* 11000000 */
+xc6, /* 11000110 */
+x7c, /* 01111100 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 102 0x66 'f' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x1c, /* 00011100 */
+x36, /* 00110110 */
+x32, /* 00110010 */
+x30, /* 00110000 */
+x78, /* 01111000 */
+x30, /* 00110000 */
+x30, /* 00110000 */
+x30, /* 00110000 */
+x30, /* 00110000 */
+x78, /* 01111000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 103 0x67 'g' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x76, /* 01110110 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+x7c, /* 01111100 */
+x0c, /* 00001100 */
+xcc, /* 11001100 */
+x78, /* 01111000 */
+x00, /* 00000000 */
+    /* 104 0x68 'h' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xe0, /* 11100000 */
+x60, /* 01100000 */
+x60, /* 01100000 */
+x6c, /* 01101100 */
+x76, /* 01110110 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+xe6, /* 11100110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 105 0x69 'i' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x00, /* 00000000 */
+x38, /* 00111000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x3c, /* 00111100 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 106 0x6a 'j' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x06, /* 00000110 */
+x06, /* 00000110 */
+x00, /* 00000000 */
+x0e, /* 00001110 */
+x06, /* 00000110 */
+x06, /* 00000110 */
+x06, /* 00000110 */
+x06, /* 00000110 */
+x06, /* 00000110 */
+x06, /* 00000110 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+x3c, /* 00111100 */
+x00, /* 00000000 */
+    /* 107 0x6b 'k' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xe0, /* 11100000 */
+x60, /* 01100000 */
+x60, /* 01100000 */
+x66, /* 01100110 */
+x6c, /* 01101100 */
+x78, /* 01111000 */
+x78, /* 01111000 */
+x6c, /* 01101100 */
+x66, /* 01100110 */
+xe6, /* 11100110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 108 0x6c 'l' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x38, /* 00111000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x3c, /* 00111100 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 109 0x6d 'm' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xec, /* 11101100 */
+xfe, /* 11111110 */
+xd6, /* 11010110 */
+xd6, /* 11010110 */
+xd6, /* 11010110 */
+xd6, /* 11010110 */
+xc6, /* 11000110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 110 0x6e 'n' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xdc, /* 11011100 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 111 0x6f 'o' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x7c, /* 01111100 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+x7c, /* 01111100 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 112 0x70 'p' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xdc, /* 11011100 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+x7c, /* 01111100 */
+x60, /* 01100000 */
+x60, /* 01100000 */
+xf0, /* 11110000 */
+x00, /* 00000000 */
+    /* 113 0x71 'q' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x76, /* 01110110 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+x7c, /* 01111100 */
+x0c, /* 00001100 */
+x0c, /* 00001100 */
+x1e, /* 00011110 */
+x00, /* 00000000 */
+    /* 114 0x72 'r' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xdc, /* 11011100 */
+x76, /* 01110110 */
+x66, /* 01100110 */
+x60, /* 01100000 */
+x60, /* 01100000 */
+x60, /* 01100000 */
+xf0, /* 11110000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 115 0x73 's' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x7c, /* 01111100 */
+xc6, /* 11000110 */
+x60, /* 01100000 */
+x38, /* 00111000 */
+x0c, /* 00001100 */
+xc6, /* 11000110 */
+x7c, /* 01111100 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 116 0x74 't' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x10, /* 00010000 */
+x30, /* 00110000 */
+x30, /* 00110000 */
+xfc, /* 11111100 */
+x30, /* 00110000 */
+x30, /* 00110000 */
+x30, /* 00110000 */
+x30, /* 00110000 */
+x36, /* 00110110 */
+x1c, /* 00011100 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 117 0x75 'u' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+x76, /* 01110110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 118 0x76 'v' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+x6c, /* 01101100 */
+x38, /* 00111000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 119 0x77 'w' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xd6, /* 11010110 */
+xd6, /* 11010110 */
+xd6, /* 11010110 */
+xfe, /* 11111110 */
+x6c, /* 01101100 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 120 0x78 'x' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xc6, /* 11000110 */
+x6c, /* 01101100 */
+x38, /* 00111000 */
+x38, /* 00111000 */
+x38, /* 00111000 */
+x6c, /* 01101100 */
+xc6, /* 11000110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 121 0x79 'y' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+x7e, /* 01111110 */
+x06, /* 00000110 */
+x0c, /* 00001100 */
+xf8, /* 11111000 */
+x00, /* 00000000 */
+    /* 122 0x7a 'z' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xfe, /* 11111110 */
+xcc, /* 11001100 */
+x18, /* 00011000 */
+x30, /* 00110000 */
+x60, /* 01100000 */
+xc6, /* 11000110 */
+xfe, /* 11111110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 123 0x7b '{' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x0e, /* 00001110 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x70, /* 01110000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x0e, /* 00001110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 124 0x7c '|' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 125 0x7d '}' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x70, /* 01110000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x0e, /* 00001110 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x70, /* 01110000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 126 0x7e '~' */
+x00, /* 00000000 */
+x76, /* 01110110 */
+xdc, /* 11011100 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 127 0x7f '' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x10, /* 00010000 */
+x38, /* 00111000 */
+x6c, /* 01101100 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xfe, /* 11111110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 128 0x80 '€' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x3c, /* 00111100 */
+x66, /* 01100110 */
+xc2, /* 11000010 */
+xc0, /* 11000000 */
+xc0, /* 11000000 */
+xc0, /* 11000000 */
+xc0, /* 11000000 */
+xc2, /* 11000010 */
+x66, /* 01100110 */
+x3c, /* 00111100 */
+x18, /* 00011000 */
+x70, /* 01110000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 129 0x81 '' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xcc, /* 11001100 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+x76, /* 01110110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 130 0x82 '‚' */
+x00, /* 00000000 */
+x0c, /* 00001100 */
+x18, /* 00011000 */
+x30, /* 00110000 */
+x00, /* 00000000 */
+x7c, /* 01111100 */
+xc6, /* 11000110 */
+xfe, /* 11111110 */
+xc0, /* 11000000 */
+xc0, /* 11000000 */
+xc6, /* 11000110 */
+x7c, /* 01111100 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 131 0x83 'ƒ' */
+x00, /* 00000000 */
+x10, /* 00010000 */
+x38, /* 00111000 */
+x6c, /* 01101100 */
+x00, /* 00000000 */
+x78, /* 01111000 */
+x0c, /* 00001100 */
+x7c, /* 01111100 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+x76, /* 01110110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 132 0x84 '„' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xcc, /* 11001100 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x78, /* 01111000 */
+x0c, /* 00001100 */
+x7c, /* 01111100 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+x76, /* 01110110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 133 0x85 '…' */
+x00, /* 00000000 */
+x60, /* 01100000 */
+x30, /* 00110000 */
+x18, /* 00011000 */
+x00, /* 00000000 */
+x78, /* 01111000 */
+x0c, /* 00001100 */
+x7c, /* 01111100 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+x76, /* 01110110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 134 0x86 '†' */
+x00, /* 00000000 */
+x38, /* 00111000 */
+x6c, /* 01101100 */
+x38, /* 00111000 */
+x00, /* 00000000 */
+x78, /* 01111000 */
+x0c, /* 00001100 */
+x7c, /* 01111100 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+x76, /* 01110110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 135 0x87 '‡' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x7c, /* 01111100 */
+xc6, /* 11000110 */
+xc0, /* 11000000 */
+xc0, /* 11000000 */
+xc0, /* 11000000 */
+xc6, /* 11000110 */
+x7c, /* 01111100 */
+x18, /* 00011000 */
+x70, /* 01110000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 136 0x88 'ˆ' */
+x00, /* 00000000 */
+x10, /* 00010000 */
+x38, /* 00111000 */
+x6c, /* 01101100 */
+x00, /* 00000000 */
+x7c, /* 01111100 */
+xc6, /* 11000110 */
+xfe, /* 11111110 */
+xc0, /* 11000000 */
+xc0, /* 11000000 */
+xc6, /* 11000110 */
+x7c, /* 01111100 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 137 0x89 '‰' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xc6, /* 11000110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x7c, /* 01111100 */
+xc6, /* 11000110 */
+xfe, /* 11111110 */
+xc0, /* 11000000 */
+xc0, /* 11000000 */
+xc6, /* 11000110 */
+x7c, /* 01111100 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 138 0x8a 'Š' */
+x00, /* 00000000 */
+x60, /* 01100000 */
+x30, /* 00110000 */
+x18, /* 00011000 */
+x00, /* 00000000 */
+x7c, /* 01111100 */
+xc6, /* 11000110 */
+xfe, /* 11111110 */
+xc0, /* 11000000 */
+xc0, /* 11000000 */
+xc6, /* 11000110 */
+x7c, /* 01111100 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 139 0x8b '‹' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x66, /* 01100110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x38, /* 00111000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x3c, /* 00111100 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 140 0x8c 'Œ' */
+x00, /* 00000000 */
+x18, /* 00011000 */
+x3c, /* 00111100 */
+x66, /* 01100110 */
+x00, /* 00000000 */
+x38, /* 00111000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x3c, /* 00111100 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 141 0x8d '' */
+x00, /* 00000000 */
+x60, /* 01100000 */
+x30, /* 00110000 */
+x18, /* 00011000 */
+x00, /* 00000000 */
+x38, /* 00111000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x3c, /* 00111100 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 142 0x8e 'Ž' */
+x00, /* 00000000 */
+xc6, /* 11000110 */
+x00, /* 00000000 */
+x10, /* 00010000 */
+x38, /* 00111000 */
+x6c, /* 01101100 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xfe, /* 11111110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 143 0x8f '' */
+x38, /* 00111000 */
+x6c, /* 01101100 */
+x38, /* 00111000 */
+x10, /* 00010000 */
+x38, /* 00111000 */
+x6c, /* 01101100 */
+xc6, /* 11000110 */
+xfe, /* 11111110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 144 0x90 '' */
+x0c, /* 00001100 */
+x18, /* 00011000 */
+x00, /* 00000000 */
+xfe, /* 11111110 */
+x66, /* 01100110 */
+x62, /* 01100010 */
+x68, /* 01101000 */
+x78, /* 01111000 */
+x68, /* 01101000 */
+x62, /* 01100010 */
+x66, /* 01100110 */
+xfe, /* 11111110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 145 0x91 '‘' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xec, /* 11101100 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x7e, /* 01111110 */
+xd8, /* 11011000 */
+xd8, /* 11011000 */
+x6e, /* 01101110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 146 0x92 '’' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x3e, /* 00111110 */
+x6c, /* 01101100 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+xfe, /* 11111110 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+xce, /* 11001110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 147 0x93 '“' */
+x00, /* 00000000 */
+x10, /* 00010000 */
+x38, /* 00111000 */
+x6c, /* 01101100 */
+x00, /* 00000000 */
+x7c, /* 01111100 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+x7c, /* 01111100 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 148 0x94 '”' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xc6, /* 11000110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x7c, /* 01111100 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+x7c, /* 01111100 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 149 0x95 '•' */
+x00, /* 00000000 */
+x60, /* 01100000 */
+x30, /* 00110000 */
+x18, /* 00011000 */
+x00, /* 00000000 */
+x7c, /* 01111100 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+x7c, /* 01111100 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 150 0x96 '–' */
+x00, /* 00000000 */
+x30, /* 00110000 */
+x78, /* 01111000 */
+xcc, /* 11001100 */
+x00, /* 00000000 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+x76, /* 01110110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 151 0x97 '—' */
+x00, /* 00000000 */
+x60, /* 01100000 */
+x30, /* 00110000 */
+x18, /* 00011000 */
+x00, /* 00000000 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+x76, /* 01110110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 152 0x98 '˜' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xc6, /* 11000110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+x7e, /* 01111110 */
+x06, /* 00000110 */
+x0c, /* 00001100 */
+x78, /* 01111000 */
+x00, /* 00000000 */
+    /* 153 0x99 '™' */
+x00, /* 00000000 */
+xc6, /* 11000110 */
+x00, /* 00000000 */
+x7c, /* 01111100 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+x7c, /* 01111100 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 154 0x9a 'š' */
+x00, /* 00000000 */
+xc6, /* 11000110 */
+x00, /* 00000000 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+x7c, /* 01111100 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 155 0x9b '›' */
+x00, /* 00000000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x7c, /* 01111100 */
+xc6, /* 11000110 */
+xc0, /* 11000000 */
+xc0, /* 11000000 */
+xc0, /* 11000000 */
+xc6, /* 11000110 */
+x7c, /* 01111100 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 156 0x9c 'œ' */
+x00, /* 00000000 */
+x38, /* 00111000 */
+x6c, /* 01101100 */
+x64, /* 01100100 */
+x60, /* 01100000 */
+xf0, /* 11110000 */
+x60, /* 01100000 */
+x60, /* 01100000 */
+x60, /* 01100000 */
+x60, /* 01100000 */
+xe6, /* 11100110 */
+xfc, /* 11111100 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 157 0x9d '' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+x3c, /* 00111100 */
+x18, /* 00011000 */
+x7e, /* 01111110 */
+x18, /* 00011000 */
+x7e, /* 01111110 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 158 0x9e 'ž' */
+x00, /* 00000000 */
+xf8, /* 11111000 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+xf8, /* 11111000 */
+xc4, /* 11000100 */
+xcc, /* 11001100 */
+xde, /* 11011110 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+xc6, /* 11000110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 159 0x9f 'Ÿ' */
+x00, /* 00000000 */
+x0e, /* 00001110 */
+x1b, /* 00011011 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x7e, /* 01111110 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+xd8, /* 11011000 */
+x70, /* 01110000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 160 0xa0 ' ' */
+x00, /* 00000000 */
+x18, /* 00011000 */
+x30, /* 00110000 */
+x60, /* 01100000 */
+x00, /* 00000000 */
+x78, /* 01111000 */
+x0c, /* 00001100 */
+x7c, /* 01111100 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+x76, /* 01110110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 161 0xa1 '¡' */
+x00, /* 00000000 */
+x0c, /* 00001100 */
+x18, /* 00011000 */
+x30, /* 00110000 */
+x00, /* 00000000 */
+x38, /* 00111000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x3c, /* 00111100 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 162 0xa2 '¢' */
+x00, /* 00000000 */
+x18, /* 00011000 */
+x30, /* 00110000 */
+x60, /* 01100000 */
+x00, /* 00000000 */
+x7c, /* 01111100 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+x7c, /* 01111100 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 163 0xa3 '£' */
+x00, /* 00000000 */
+x18, /* 00011000 */
+x30, /* 00110000 */
+x60, /* 01100000 */
+x00, /* 00000000 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+x76, /* 01110110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 164 0xa4 '¤' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x76, /* 01110110 */
+xdc, /* 11011100 */
+x00, /* 00000000 */
+xdc, /* 11011100 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 165 0xa5 '¥' */
+x76, /* 01110110 */
+xdc, /* 11011100 */
+x00, /* 00000000 */
+xc6, /* 11000110 */
+xe6, /* 11100110 */
+xf6, /* 11110110 */
+xfe, /* 11111110 */
+xde, /* 11011110 */
+xce, /* 11001110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 166 0xa6 '¦' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x3c, /* 00111100 */
+x6c, /* 01101100 */
+x6c, /* 01101100 */
+x3e, /* 00111110 */
+x00, /* 00000000 */
+x7e, /* 01111110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 167 0xa7 '§' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x38, /* 00111000 */
+x6c, /* 01101100 */
+x6c, /* 01101100 */
+x38, /* 00111000 */
+x00, /* 00000000 */
+x7c, /* 01111100 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 168 0xa8 '¨' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x30, /* 00110000 */
+x30, /* 00110000 */
+x00, /* 00000000 */
+x30, /* 00110000 */
+x30, /* 00110000 */
+x60, /* 01100000 */
+xc0, /* 11000000 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+x7c, /* 01111100 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 169 0xa9 '©' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xfe, /* 11111110 */
+xc0, /* 11000000 */
+xc0, /* 11000000 */
+xc0, /* 11000000 */
+xc0, /* 11000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 170 0xaa 'ª' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xfe, /* 11111110 */
+x06, /* 00000110 */
+x06, /* 00000110 */
+x06, /* 00000110 */
+x06, /* 00000110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 171 0xab '«' */
+x00, /* 00000000 */
+x60, /* 01100000 */
+xe0, /* 11100000 */
+x62, /* 01100010 */
+x66, /* 01100110 */
+x6c, /* 01101100 */
+x18, /* 00011000 */
+x30, /* 00110000 */
+x60, /* 01100000 */
+xdc, /* 11011100 */
+x86, /* 10000110 */
+x0c, /* 00001100 */
+x18, /* 00011000 */
+x3e, /* 00111110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 172 0xac '¬' */
+x00, /* 00000000 */
+x60, /* 01100000 */
+xe0, /* 11100000 */
+x62, /* 01100010 */
+x66, /* 01100110 */
+x6c, /* 01101100 */
+x18, /* 00011000 */
+x30, /* 00110000 */
+x66, /* 01100110 */
+xce, /* 11001110 */
+x9a, /* 10011010 */
+x3f, /* 00111111 */
+x06, /* 00000110 */
+x06, /* 00000110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 173 0xad '' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x00, /* 00000000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x3c, /* 00111100 */
+x3c, /* 00111100 */
+x3c, /* 00111100 */
+x18, /* 00011000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 174 0xae '®' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x36, /* 00110110 */
+x6c, /* 01101100 */
+xd8, /* 11011000 */
+x6c, /* 01101100 */
+x36, /* 00110110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 175 0xaf '¯' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xd8, /* 11011000 */
+x6c, /* 01101100 */
+x36, /* 00110110 */
+x6c, /* 01101100 */
+xd8, /* 11011000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 176 0xb0 '°' */
+x11, /* 00010001 */
+x44, /* 01000100 */
+x11, /* 00010001 */
+x44, /* 01000100 */
+x11, /* 00010001 */
+x44, /* 01000100 */
+x11, /* 00010001 */
+x44, /* 01000100 */
+x11, /* 00010001 */
+x44, /* 01000100 */
+x11, /* 00010001 */
+x44, /* 01000100 */
+x11, /* 00010001 */
+x44, /* 01000100 */
+x11, /* 00010001 */
+x44, /* 01000100 */
+    /* 177 0xb1 '±' */
+x55, /* 01010101 */
+xaa, /* 10101010 */
+x55, /* 01010101 */
+xaa, /* 10101010 */
+x55, /* 01010101 */
+xaa, /* 10101010 */
+x55, /* 01010101 */
+xaa, /* 10101010 */
+x55, /* 01010101 */
+xaa, /* 10101010 */
+x55, /* 01010101 */
+xaa, /* 10101010 */
+x55, /* 01010101 */
+xaa, /* 10101010 */
+x55, /* 01010101 */
+xaa, /* 10101010 */
+    /* 178 0xb2 '²' */
+xdd, /* 11011101 */
+x77, /* 01110111 */
+xdd, /* 11011101 */
+x77, /* 01110111 */
+xdd, /* 11011101 */
+x77, /* 01110111 */
+xdd, /* 11011101 */
+x77, /* 01110111 */
+xdd, /* 11011101 */
+x77, /* 01110111 */
+xdd, /* 11011101 */
+x77, /* 01110111 */
+xdd, /* 11011101 */
+x77, /* 01110111 */
+xdd, /* 11011101 */
+x77, /* 01110111 */
+    /* 179 0xb3 '³' */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+    /* 180 0xb4 '´' */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+xf8, /* 11111000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+    /* 181 0xb5 'µ' */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+xf8, /* 11111000 */
+x18, /* 00011000 */
+xf8, /* 11111000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+    /* 182 0xb6 '¶' */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+xf6, /* 11110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+    /* 183 0xb7 '·' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xfe, /* 11111110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+    /* 184 0xb8 '¸' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xf8, /* 11111000 */
+x18, /* 00011000 */
+xf8, /* 11111000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+    /* 185 0xb9 '¹' */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+xf6, /* 11110110 */
+x06, /* 00000110 */
+xf6, /* 11110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+    /* 186 0xba 'º' */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+    /* 187 0xbb '»' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xfe, /* 11111110 */
+x06, /* 00000110 */
+xf6, /* 11110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+    /* 188 0xbc '¼' */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+xf6, /* 11110110 */
+x06, /* 00000110 */
+xfe, /* 11111110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 189 0xbd '½' */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+xfe, /* 11111110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 190 0xbe '¾' */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+xf8, /* 11111000 */
+x18, /* 00011000 */
+xf8, /* 11111000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 191 0xbf '¿' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xf8, /* 11111000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+    /* 192 0xc0 'À' */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x1f, /* 00011111 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 193 0xc1 'Á' */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+xff, /* 11111111 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 194 0xc2 'Â' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xff, /* 11111111 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+    /* 195 0xc3 'Ã' */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x1f, /* 00011111 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+    /* 196 0xc4 'Ä' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xff, /* 11111111 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 197 0xc5 'Å' */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+xff, /* 11111111 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+    /* 198 0xc6 'Æ' */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x1f, /* 00011111 */
+x18, /* 00011000 */
+x1f, /* 00011111 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+    /* 199 0xc7 'Ç' */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x37, /* 00110111 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+    /* 200 0xc8 'È' */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x37, /* 00110111 */
+x30, /* 00110000 */
+x3f, /* 00111111 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 201 0xc9 'É' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x3f, /* 00111111 */
+x30, /* 00110000 */
+x37, /* 00110111 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+    /* 202 0xca 'Ê' */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+xf7, /* 11110111 */
+x00, /* 00000000 */
+xff, /* 11111111 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 203 0xcb 'Ë' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xff, /* 11111111 */
+x00, /* 00000000 */
+xf7, /* 11110111 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+    /* 204 0xcc 'Ì' */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x37, /* 00110111 */
+x30, /* 00110000 */
+x37, /* 00110111 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+    /* 205 0xcd 'Í' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xff, /* 11111111 */
+x00, /* 00000000 */
+xff, /* 11111111 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 206 0xce 'Î' */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+xf7, /* 11110111 */
+x00, /* 00000000 */
+xf7, /* 11110111 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+    /* 207 0xcf 'Ï' */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+xff, /* 11111111 */
+x00, /* 00000000 */
+xff, /* 11111111 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 208 0xd0 'Ð' */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+xff, /* 11111111 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 209 0xd1 'Ñ' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xff, /* 11111111 */
+x00, /* 00000000 */
+xff, /* 11111111 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+    /* 210 0xd2 'Ò' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xff, /* 11111111 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+    /* 211 0xd3 'Ó' */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x3f, /* 00111111 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 212 0xd4 'Ô' */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x1f, /* 00011111 */
+x18, /* 00011000 */
+x1f, /* 00011111 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 213 0xd5 'Õ' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x1f, /* 00011111 */
+x18, /* 00011000 */
+x1f, /* 00011111 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+    /* 214 0xd6 'Ö' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x3f, /* 00111111 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+    /* 215 0xd7 '×' */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+xff, /* 11111111 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+    /* 216 0xd8 'Ø' */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+xff, /* 11111111 */
+x18, /* 00011000 */
+xff, /* 11111111 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+    /* 217 0xd9 'Ù' */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+xf8, /* 11111000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 218 0xda 'Ú' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x1f, /* 00011111 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+    /* 219 0xdb 'Û' */
+xff, /* 11111111 */
+xff, /* 11111111 */
+xff, /* 11111111 */
+xff, /* 11111111 */
+xff, /* 11111111 */
+xff, /* 11111111 */
+xff, /* 11111111 */
+xff, /* 11111111 */
+xff, /* 11111111 */
+xff, /* 11111111 */
+xff, /* 11111111 */
+xff, /* 11111111 */
+xff, /* 11111111 */
+xff, /* 11111111 */
+xff, /* 11111111 */
+xff, /* 11111111 */
+    /* 220 0xdc 'Ü' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xff, /* 11111111 */
+xff, /* 11111111 */
+xff, /* 11111111 */
+xff, /* 11111111 */
+xff, /* 11111111 */
+xff, /* 11111111 */
+xff, /* 11111111 */
+xff, /* 11111111 */
+xff, /* 11111111 */
+    /* 221 0xdd 'Ý' */
+xf0, /* 11110000 */
+xf0, /* 11110000 */
+xf0, /* 11110000 */
+xf0, /* 11110000 */
+xf0, /* 11110000 */
+xf0, /* 11110000 */
+xf0, /* 11110000 */
+xf0, /* 11110000 */
+xf0, /* 11110000 */
+xf0, /* 11110000 */
+xf0, /* 11110000 */
+xf0, /* 11110000 */
+xf0, /* 11110000 */
+xf0, /* 11110000 */
+xf0, /* 11110000 */
+xf0, /* 11110000 */
+    /* 222 0xde 'Þ' */
+x0f, /* 00001111 */
+x0f, /* 00001111 */
+x0f, /* 00001111 */
+x0f, /* 00001111 */
+x0f, /* 00001111 */
+x0f, /* 00001111 */
+x0f, /* 00001111 */
+x0f, /* 00001111 */
+x0f, /* 00001111 */
+x0f, /* 00001111 */
+x0f, /* 00001111 */
+x0f, /* 00001111 */
+x0f, /* 00001111 */
+x0f, /* 00001111 */
+x0f, /* 00001111 */
+x0f, /* 00001111 */
+    /* 223 0xdf 'ß' */
+xff, /* 11111111 */
+xff, /* 11111111 */
+xff, /* 11111111 */
+xff, /* 11111111 */
+xff, /* 11111111 */
+xff, /* 11111111 */
+xff, /* 11111111 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 224 0xe0 'à' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x76, /* 01110110 */
+xdc, /* 11011100 */
+xd8, /* 11011000 */
+xd8, /* 11011000 */
+xd8, /* 11011000 */
+xdc, /* 11011100 */
+x76, /* 01110110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 225 0xe1 'á' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x78, /* 01111000 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+xd8, /* 11011000 */
+xcc, /* 11001100 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xcc, /* 11001100 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 226 0xe2 'â' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xfe, /* 11111110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc0, /* 11000000 */
+xc0, /* 11000000 */
+xc0, /* 11000000 */
+xc0, /* 11000000 */
+xc0, /* 11000000 */
+xc0, /* 11000000 */
+xc0, /* 11000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 227 0xe3 'ã' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xfe, /* 11111110 */
+x6c, /* 01101100 */
+x6c, /* 01101100 */
+x6c, /* 01101100 */
+x6c, /* 01101100 */
+x6c, /* 01101100 */
+x6c, /* 01101100 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 228 0xe4 'ä' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xfe, /* 11111110 */
+xc6, /* 11000110 */
+x60, /* 01100000 */
+x30, /* 00110000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x30, /* 00110000 */
+x60, /* 01100000 */
+xc6, /* 11000110 */
+xfe, /* 11111110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 229 0xe5 'å' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x7e, /* 01111110 */
+xd8, /* 11011000 */
+xd8, /* 11011000 */
+xd8, /* 11011000 */
+xd8, /* 11011000 */
+xd8, /* 11011000 */
+x70, /* 01110000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 230 0xe6 'æ' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+x7c, /* 01111100 */
+x60, /* 01100000 */
+x60, /* 01100000 */
+xc0, /* 11000000 */
+x00, /* 00000000 */
+    /* 231 0xe7 'ç' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x76, /* 01110110 */
+xdc, /* 11011100 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 232 0xe8 'è' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x7e, /* 01111110 */
+x18, /* 00011000 */
+x3c, /* 00111100 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+x3c, /* 00111100 */
+x18, /* 00011000 */
+x7e, /* 01111110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 233 0xe9 'é' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x38, /* 00111000 */
+x6c, /* 01101100 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xfe, /* 11111110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+x6c, /* 01101100 */
+x38, /* 00111000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 234 0xea 'ê' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x38, /* 00111000 */
+x6c, /* 01101100 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+x6c, /* 01101100 */
+x6c, /* 01101100 */
+x6c, /* 01101100 */
+x6c, /* 01101100 */
+xee, /* 11101110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 235 0xeb 'ë' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x1e, /* 00011110 */
+x30, /* 00110000 */
+x18, /* 00011000 */
+x0c, /* 00001100 */
+x3e, /* 00111110 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+x3c, /* 00111100 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 236 0xec 'ì' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x7e, /* 01111110 */
+xdb, /* 11011011 */
+xdb, /* 11011011 */
+xdb, /* 11011011 */
+x7e, /* 01111110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 237 0xed 'í' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x03, /* 00000011 */
+x06, /* 00000110 */
+x7e, /* 01111110 */
+xdb, /* 11011011 */
+xdb, /* 11011011 */
+xf3, /* 11110011 */
+x7e, /* 01111110 */
+x60, /* 01100000 */
+xc0, /* 11000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 238 0xee 'î' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x1c, /* 00011100 */
+x30, /* 00110000 */
+x60, /* 01100000 */
+x60, /* 01100000 */
+x7c, /* 01111100 */
+x60, /* 01100000 */
+x60, /* 01100000 */
+x60, /* 01100000 */
+x30, /* 00110000 */
+x1c, /* 00011100 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 239 0xef 'ï' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x7c, /* 01111100 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 240 0xf0 'ð' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xfe, /* 11111110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xfe, /* 11111110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xfe, /* 11111110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 241 0xf1 'ñ' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x7e, /* 01111110 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x7e, /* 01111110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 242 0xf2 'ò' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x30, /* 00110000 */
+x18, /* 00011000 */
+x0c, /* 00001100 */
+x06, /* 00000110 */
+x0c, /* 00001100 */
+x18, /* 00011000 */
+x30, /* 00110000 */
+x00, /* 00000000 */
+x7e, /* 01111110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 243 0xf3 'ó' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x0c, /* 00001100 */
+x18, /* 00011000 */
+x30, /* 00110000 */
+x60, /* 01100000 */
+x30, /* 00110000 */
+x18, /* 00011000 */
+x0c, /* 00001100 */
+x00, /* 00000000 */
+x7e, /* 01111110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 244 0xf4 'ô' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x0e, /* 00001110 */
+x1b, /* 00011011 */
+x1b, /* 00011011 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+    /* 245 0xf5 'õ' */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+xd8, /* 11011000 */
+xd8, /* 11011000 */
+xd8, /* 11011000 */
+x70, /* 01110000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 246 0xf6 'ö' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x18, /* 00011000 */
+x00, /* 00000000 */
+x7e, /* 01111110 */
+x00, /* 00000000 */
+x18, /* 00011000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 247 0xf7 '÷' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x76, /* 01110110 */
+xdc, /* 11011100 */
+x00, /* 00000000 */
+x76, /* 01110110 */
+xdc, /* 11011100 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 248 0xf8 'ø' */
+x00, /* 00000000 */
+x38, /* 00111000 */
+x6c, /* 01101100 */
+x6c, /* 01101100 */
+x38, /* 00111000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 249 0xf9 'ù' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 250 0xfa 'ú' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x18, /* 00011000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 251 0xfb 'û' */
+x00, /* 00000000 */
+x0f, /* 00001111 */
+x0c, /* 00001100 */
+x0c, /* 00001100 */
+x0c, /* 00001100 */
+x0c, /* 00001100 */
+x0c, /* 00001100 */
+xec, /* 11101100 */
+x6c, /* 01101100 */
+x6c, /* 01101100 */
+x3c, /* 00111100 */
+x1c, /* 00011100 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 252 0xfc 'ü' */
+x00, /* 00000000 */
+x6c, /* 01101100 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 253 0xfd 'ý' */
+x00, /* 00000000 */
+x3c, /* 00111100 */
+x66, /* 01100110 */
+x0c, /* 00001100 */
+x18, /* 00011000 */
+x32, /* 00110010 */
+x7e, /* 01111110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 254 0xfe 'þ' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x7e, /* 01111110 */
+x7e, /* 01111110 */
+x7e, /* 01111110 */
+x7e, /* 01111110 */
+x7e, /* 01111110 */
+x7e, /* 01111110 */
+x7e, /* 01111110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 255 0xff 'ÿ' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+};

 /tags/0.2.0.2/uspace/klog/klog.c
 ,0 → 1,88
+/*
+ * Copyright (C) 2006 Ondrej Palkovsky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/** @addtogroup klog KLog
+ * @brief   HelenOS KLog
+ * @{
+ */
+/**
+ * @file
+ */
+#include <stdio.h>
+#include <ipc/ipc.h>
+#include <async.h>
+#include <ipc/services.h>
+#include <as.h>
+#include <kernel/ipc/irq.h>
+/* Pointer to klog area */
+static char *klog;
+static void interrupt_received(ipc_callid_t callid, ipc_call_t *call)
+{
+    int i;
+    async_serialize_start();
+    for (i=0; klog[i + IPC_GET_ARG1(*call)] && i < IPC_GET_ARG2(*call); i++)
+        putchar(klog[i + IPC_GET_ARG1(*call)]);
+    putchar('\n');
+    async_serialize_end();
+}
+int main(int argc, char *argv[])
+{
+    int res;
+    void *mapping;
+    printf("Kernel console output.\n");
+    mapping = as_get_mappable_page(PAGE_SIZE);
+    res = ipc_call_sync_3(PHONE_NS, IPC_M_AS_AREA_RECV,
+                  (sysarg_t)mapping, PAGE_SIZE, SERVICE_MEM_KLOG,
+                  NULL,NULL,NULL);
+    if (res) {
+        printf("Failed to initialize klog memarea\n");
+        _exit(1);
+    }
+    klog = mapping;
+    if (ipc_register_irq(IPC_IRQ_KLOG, NULL)) {
+        printf("Error registering for klog service.\n");
+        return 0;
+    }
+    async_set_interrupt_received(interrupt_received);
+    async_manager();
+    return 0;
+}
+/** @}
+ */

 /tags/0.2.0.2/uspace/klog/Makefile
 ,0 → 1,73
+#
+# Copyright (C) 2005 Martin Decky
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# - Redistributions of source code must retain the above copyright
+#   notice, this list of conditions and the following disclaimer.
+# - Redistributions in binary form must reproduce the above copyright
+#   notice, this list of conditions and the following disclaimer in the
+#   documentation and/or other materials provided with the distribution.
+# - The name of the author may not be used to endorse or promote products
+#   derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+## Setup toolchain
+#
+LIBC_PREFIX = ../libc
+SOFTINT_PREFIX = ../softint
+include $(LIBC_PREFIX)/Makefile.toolchain
+LIBS = $(LIBC_PREFIX)/libc.a
+## Sources
+#
+OUTPUT = klog
+SOURCES = \
+    klog.c
+OBJECTS := $(addsuffix .o,$(basename $(SOURCES)))
+.PHONY: all clean depend disasm
+all: $(OUTPUT) disasm
+-include Makefile.depend
+clean:
+    -rm -f $(OUTPUT) $(OUTPUT).map $(OUTPUT).disasm Makefile.depend
+depend:
+    $(CC) $(DEFS) $(CFLAGS) -M $(SOURCES) > Makefile.depend
+$(OUTPUT): $(OBJECTS) $(LIBS)
+    $(LD) -T $(LIBC_PREFIX)/arch/$(ARCH)/_link.ld $(OBJECTS) $(LIBS) $(LFLAGS) -o $@ -Map $(OUTPUT).map
+disasm:
+    $(OBJDUMP) -d $(OUTPUT) >$(OUTPUT).disasm
+%.o: %.S
+    $(CC) $(DEFS) $(AFLAGS) $(CFLAGS) -D__ASM__ -c $< -o $@
+%.o: %.s
+    $(AS) $(AFLAGS) $< -o $@
+%.o: %.c
+    $(CC) $(DEFS) $(CFLAGS) -c $< -o $@

 /tags/0.2.0.2/uspace/tools/config.py
 ,0 → 1,494
+#!/usr/bin/env python
+"""
+User space configuration script
+"""
+import sys
+import os
+import re
+import commands
+INPUT = 'uspace.config'
+OUTPUT = 'Makefile.config'
+TMPOUTPUT = 'Makefile.config.tmp'
+class DefaultDialog:
+    "Wrapper dialog that tries to return default values"
+    def __init__(self, dlg):
+        self.dlg = dlg
+    def set_title(self,text):
+        self.dlg.set_title(text)
+    def yesno(self, text, default=None):
+        if default is not None:
+            return default
+        return self.dlg.yesno(text, default)
+    def noyes(self, text, default=None):
+        if default is not None:
+            return default
+        return self.dlg.noyes(text, default)
+    def choice(self, text, choices, defopt=None):
+        if defopt is not None:
+            return choices[defopt][0]
+        return self.dlg.choice(text, choices, defopt)
+class NoDialog:
+    def __init__(self):
+        self.printed = None
+        self.title = 'HelenOS Configuration'
+    def print_title(self):
+        if not self.printed:
+            sys.stdout.write("\n*** %s ***\n" % self.title)
+            self.printed = True
+    def set_title(self, text):
+        self.title = text
+        self.printed = False
+    def noyes(self, text, default=None):
+        if not default:
+            default = 'n'
+        return self.yesno(text, default)
+    def yesno(self, text, default=None):
+        self.print_title()
+        if default != 'n':
+            default = 'y'
+        while 1:
+            sys.stdout.write("%s (y/n)[%s]: " % (text,default))
+            inp = sys.stdin.readline()
+            if not inp:
+                raise EOFError
+            inp = inp.strip().lower()
+            if not inp:
+                return default
+            if inp == 'y':
+                return 'y'
+            elif inp == 'n':
+                return 'n'
+    def _print_choice(self, text, choices, defopt):
+        sys.stdout.write('%s:\n' % text)
+        for i,(text,descr) in enumerate(choices):
+            sys.stdout.write('\t%2d. %s\n' % (i, descr))
+        if defopt is not None:
+            sys.stdout.write('Enter choice number[%d]: ' % defopt)
+        else:
+            sys.stdout.write('Enter choice number: ')
+    def menu(self, text, choices, button, defopt=None):
+        self.title = 'Main menu'
+        menu = []
+        for key, descr in choices:
+            txt = key + (45-len(key))*' ' + ': ' + descr
+            menu.append((key, txt))
+        return self.choice(text, [button] + menu)
+    def choice(self, text, choices, defopt=None):
+        self.print_title()
+        while 1:
+            self._print_choice(text, choices, defopt)
+            inp = sys.stdin.readline()
+            if not inp:
+                raise EOFError
+            if not inp.strip():
+                if defopt is not None:
+                    return choices[defopt][0]
+                continue
+            try:
+                number = int(inp.strip())
+            except ValueError:
+                continue
+            if number < 0 or number >= len(choices):
+                continue
+            return choices[number][0]
+def eof_checker(fnc):
+    def wrapper(self, *args, **kw):
+        try:
+            return fnc(self, *args, **kw)
+        except EOFError:
+            return getattr(self.bckdialog,fnc.func_name)(*args, **kw)
+    return wrapper
+class Dialog(NoDialog):
+    def __init__(self):
+        NoDialog.__init__(self)
+        self.dlgcmd = os.environ.get('DIALOG','dialog')
+        self.title = ''
+        self.backtitle = 'HelenOS Kernel Configuration'
+        if os.system('%s --print-maxsize >/dev/null 2>&1' % self.dlgcmd) != 0:
+            raise NotImplementedError
+        self.bckdialog = NoDialog()
+    def set_title(self,text):
+        self.title = text
+        self.bckdialog.set_title(text)
+    def calldlg(self,*args,**kw):
+        "Wrapper for calling 'dialog' program"
+        indesc, outdesc = os.pipe()
+        pid = os.fork()
+        if not pid:
+            os.close(2)
+            os.dup(outdesc)
+            os.close(indesc)
+            dlgargs = [self.dlgcmd,'--title',self.title,
+                       '--backtitle', self.backtitle]
+            for key,val in kw.items():
+                dlgargs.append('--'+key)
+                dlgargs.append(val)
+            dlgargs += args
+            os.execlp(self.dlgcmd,*dlgargs)
+        os.close(outdesc)
+        try:
+            errout = os.fdopen(indesc,'r')
+            data = errout.read()
+            errout.close()
+            pid,status = os.wait()
+        except:
+            os.system('reset') # Reset terminal
+            raise
+        if not os.WIFEXITED(status):
+            os.system('reset') # Reset terminal
+            raise EOFError
+        status = os.WEXITSTATUS(status)
+        if status == 255:
+            raise EOFError
+        return status,data
+    def yesno(self, text, default=None):
+        if text[-1] not in ('?',':'):
+            text = text + ':'
+        width = '50'
+        height = '5'
+        if len(text) < 48:
+            text = ' '*int(((48-len(text))/2)) + text
+        else:
+            width = '0'
+            height = '0'
+        if default == 'n':
+            res,data = self.calldlg('--defaultno','--yesno',text,height,width)
+        else:
+            res,data = self.calldlg('--yesno',text,height,width)
+        if res == 0:
+            return 'y'
+        return 'n'
+    yesno = eof_checker(yesno)
+    def menu(self, text, choices, button, defopt=None):
+        self.title = 'Main menu'
+        text = text + ':'
+        width = '70'
+        height = str(8 + len(choices))
+        args = []
+        for key,val in choices:
+            args.append(key)
+            args.append(val)
+        kw = {}
+        if defopt:
+            kw['default-item'] = choices[defopt][0]
+        res,data = self.calldlg('--ok-label','Change',
+                                '--extra-label',button[1],
+                                '--extra-button',
+                                '--menu',text,height,width,
+                                str(len(choices)),*args,**kw)
+        if res == 3:
+            return button[0]
+        if res == 1: # Cancel
+            sys.exit(1)
+        elif res:
+            print data
+            raise EOFError
+        return data
+    menu = eof_checker(menu)
+    def choice(self, text, choices, defopt=None):
+        text = text + ':'
+        width = '50'
+        height = str(8 + len(choices))
+        args = []
+        for key,val in choices:
+            args.append(key)
+            args.append(val)
+        kw = {}
+        if defopt:
+            kw['default-item'] = choices[defopt][0]
+        res,data = self.calldlg('--nocancel','--menu',text,height,width,
+                                str(len(choices)),*args, **kw)
+        if res:
+            print data
+            raise EOFError
+        return data
+    choice = eof_checker(choice)
+def read_defaults(fname,defaults):
+    "Read saved values from last configuration run"
+    f = file(fname,'r')
+    for line in f:
+        res = re.match(r'^(?:#!# )?([^#]\w*)\s*=\s*(.*?)\s*$', line)
+        if res:
+            defaults[res.group(1)] = res.group(2)
+    f.close()
+def check_condition(text, defaults, asked_names):
+    seen_vars = [ x[0] for x in asked_names ]
+    ctype = 'cnf'
+    if ')|' in text or '|(' in text:
+        ctype = 'dnf'
+    if ctype == 'cnf':
+        conds = text.split('&')
+    else:
+        conds = text.split('|')
+    for cond in conds:
+        if cond.startswith('(') and cond.endswith(')'):
+            cond = cond[1:-1]
+        inside = check_inside(cond, defaults, ctype, seen_vars)
+        if ctype == 'cnf' and not inside:
+            return False
+        if ctype == 'dnf' and inside:
+            return True
+    if ctype == 'cnf':
+        return True
+    return False
+def check_inside(text, defaults, ctype, seen_vars):
+    """
+    Check that the condition specified on input line is True
+    only CNF is supported
+    """
+    if ctype == 'cnf':
+        conds = text.split('|')
+    else:
+        conds = text.split('&')
+    for cond in conds:
+        res = re.match(r'^(.*?)(!?=)(.*)$', cond)
+        if not res:
+            raise RuntimeError("Invalid condition: %s" % cond)
+        condname = res.group(1)
+        oper = res.group(2)
+        condval = res.group(3)
+        if condname not in seen_vars:
+            varval = ''
+##             raise RuntimeError("Variable %s not defined before being asked." %\
+##                                condname)
+        elif not defaults.has_key(condname):
+            raise RuntimeError("Condition var %s does not exist: %s" % \
+                               (condname,text))
+        else:
+            varval = defaults[condname]
+        if ctype == 'cnf':
+            if oper == '=' and  condval == varval:
+                return True
+            if oper == '!=' and condval != varval:
+                return True
+        else:
+            if oper== '=' and condval != varval:
+                return False
+            if oper== '!=' and condval == varval:
+                return False
+    if ctype=='cnf':
+        return False
+    return True
+def parse_config(input, output, dlg, defaults={}, askonly=None):
+    "Parse configuration file and create Makefile.config on the fly"
+    def ask_the_question(dialog):
+        "Ask question based on the type of variables to ask"
+        # This is quite a hack, this thingy is written just to
+        # have access to local variables..
+        if vartype == 'y/n':
+            return dialog.yesno(comment, default)
+        elif vartype == 'n/y':
+            return dialog.noyes(comment, default)
+        elif vartype == 'choice':
+            defopt = None
+            if default is not None:
+                for i,(key,val) in enumerate(choices):
+                    if key == default:
+                        defopt = i
+                        break
+            return dialog.choice(comment, choices, defopt)
+        else:
+            raise RuntimeError("Bad method: %s" % vartype)
+    f = file(input, 'r')
+    outf = file(output, 'w')
+    outf.write('#########################################\n')
+    outf.write('## AUTO-GENERATED FILE, DO NOT EDIT!!! ##\n')
+    outf.write('#########################################\n\n')
+    asked_names = []
+    comment = ''
+    default = None
+    choices = []
+    for line in f:
+        if line.startswith('%'):
+            res = re.match(r'^%\s*(?:\[(.*?)\])?\s*(.*)$', line)
+            if not res:
+                raise RuntimeError('Invalid command: %s' % line)
+            if res.group(1):
+                if not check_condition(res.group(1), defaults,
+                                       asked_names):
+                    continue
+            args = res.group(2).strip().split(' ')
+            cmd = args[0].lower()
+            args = args[1:]
+            if cmd == 'saveas':
+                outf.write('%s = %s\n' % (args[1],defaults[args[0]]))
+            elif cmd == 'shellcmd':
+                varname = args[0]
+                args = args[1:]
+                for i,arg in enumerate(args):
+                    if arg.startswith('$'):
+                        args[i] = defaults[arg[1:]]
+                data,status = commands.getstatusoutput(' '.join(args))
+                if status:
+                    raise RuntimeError('Error running: %s' % ' '.join(args))
+                outf.write('%s = %s\n' % (varname,data.strip()))
+            continue
+        if line.startswith('!'):
+            # Ask a question
+            res = re.search(r'!\s*(?:\[(.*?)\])?\s*([^\s]+)\s*\((.*)\)\s*$', line)
+            if not res:
+                raise RuntimeError("Weird line: %s" % line)
+            varname = res.group(2)
+            vartype = res.group(3)
+            default = defaults.get(varname,None)
+            if res.group(1):
+                if not check_condition(res.group(1), defaults,
+                                       asked_names):
+                    if default is not None:
+                        outf.write('#!# %s = %s\n' % (varname, default))
+                    # Clear cumulated values
+                    comment = ''
+                    default = None
+                    choices = []
+                    continue
+            asked_names.append((varname,comment))
+            if default is None or not askonly or askonly == varname:
+                default = ask_the_question(dlg)
+            else:
+                default = ask_the_question(DefaultDialog(dlg))
+            outf.write('%s = %s\n' % (varname, default))
+            # Remeber the selected value
+            defaults[varname] = default
+            # Clear cumulated values
+            comment = ''
+            default = None
+            choices = []
+            continue
+        if line.startswith('@'):
+            # Add new line into the 'choice array'
+            res = re.match(r'@\s*(?:\[(.*?)\])?\s*"(.*?)"\s*(.*)$', line)
+            if not res:
+                raise RuntimeError("Bad line: %s" % line)
+            if res.group(1):
+                if not check_condition(res.group(1),defaults,
+                                       asked_names):
+                    continue
+            choices.append((res.group(2), res.group(3)))
+            continue
+        # All other things print to output file
+        outf.write(line)
+        if re.match(r'^#[^#]', line):
+            # Last comment before question will be displayed to the user
+            comment = line[1:].strip()
+        elif line.startswith('## '):
+            # Set title of the dialog window
+            dlg.set_title(line[2:].strip())
+    outf.write('\n')
+    outf.write('REVISION = %s\n' % commands.getoutput('svnversion . 2> /dev/null'))
+    outf.write('TIMESTAMP = %s\n' % commands.getoutput('date "+%Y-%m-%d %H:%M:%S"'))
+    outf.close()
+    f.close()
+    return asked_names
+def main():
+    defaults = {}
+    try:
+        dlg = Dialog()
+    except NotImplementedError:
+        dlg = NoDialog()
+    if len(sys.argv) >= 2 and sys.argv[1]=='default':
+        defmode = True
+    else:
+        defmode = False
+    # Default run will update the configuration file
+    # with newest options
+    if os.path.exists(OUTPUT):
+        read_defaults(OUTPUT, defaults)
+    # Get ARCH from command line if specified
+    if len(sys.argv) >= 3:
+        defaults['ARCH'] = sys.argv[2]
+    # Dry run only with defaults
+    varnames = parse_config(INPUT, TMPOUTPUT, DefaultDialog(dlg), defaults)
+    # If not in default mode, present selection of all possibilities
+    if not defmode:
+        defopt = 0
+        while 1:
+            # varnames contains variable names that were in the
+            # last question set
+            choices = [ (x[1],defaults[x[0]]) for x in varnames ]
+            res = dlg.menu('Configuration',choices,('save','Save'),defopt)
+            if res == 'save':
+                parse_config(INPUT, TMPOUTPUT, DefaultDialog(dlg), defaults)
+                break
+            # transfer description back to varname
+            for i,(vname,descr) in enumerate(varnames):
+                if res == descr:
+                    defopt = i
+                    break
+            # Ask the user a simple question, produce output
+            # as if the user answered all the other questions
+            # with default answer
+            varnames = parse_config(INPUT, TMPOUTPUT, dlg, defaults,
+                                    askonly=varnames[i][0])
+    if os.path.exists(OUTPUT):
+        os.unlink(OUTPUT)
+    os.rename(TMPOUTPUT, OUTPUT)
+    if not defmode and dlg.yesno('Rebuild user space?') == 'y':
+        os.execlp('make','make','clean','build')
+if __name__ == '__main__':
+    main()
 Property changes:
 Added: svn:executable
 +*
 \ No newline at end of property

 /tags/0.2.0.2/uspace/kbd/generic/kbd.c
 ,0 → 1,145
+/*
+ * Copyright (C) 2006 Josef Cejka
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/**
+ * @addtogroup kbdgen generic
+ * @brief   HelenOS generic uspace keyboard handler.
+ * @ingroup  kbd
+ * @{
+ */
+/** @file
+ */
+#include <ipc/ipc.h>
+#include <ipc/services.h>
+#include <stdio.h>
+#include <unistd.h>
+#include <stdlib.h>
+#include <stdio.h>
+#include <ipc/ns.h>
+#include <errno.h>
+#include <arch/kbd.h>
+#include <kbd.h>
+#include <libadt/fifo.h>
+#include <key_buffer.h>
+#include <async.h>
+#include <keys.h>
+#define NAME "KBD"
+int cons_connected = 0;
+int phone2cons = -1;
+keybuffer_t keybuffer;
+static void irq_handler(ipc_callid_t iid, ipc_call_t *call)
+{
+    int chr;
+#ifdef MOUSE_ENABLED
+    if (mouse_arch_process(phone2cons, call))
+        return;
+#endif
+    kbd_arch_process(&keybuffer, call);
+    if (cons_connected && phone2cons != -1) {
+        /* recode to ASCII - one interrupt can produce more than one code so result is stored in fifo */
+        while (!keybuffer_empty(&keybuffer)) {
+            if (!keybuffer_pop(&keybuffer, (int *)&chr))
+                break;
+            async_msg(phone2cons, KBD_PUSHCHAR, chr);
+        }
+    }
+}
+static void console_connection(ipc_callid_t iid, ipc_call_t *icall)
+{
+    ipc_callid_t callid;
+    ipc_call_t call;
+    int retval;
+    if (cons_connected) {
+        ipc_answer_fast(iid, ELIMIT, 0, 0);
+        return;
+    }
+    cons_connected = 1;
+    ipc_answer_fast(iid, 0, 0, 0);
+    while (1) {
+        callid = async_get_call(&call);
+        switch (IPC_GET_METHOD(call)) {
+        case IPC_M_PHONE_HUNGUP:
+            cons_connected = 0;
+            ipc_hangup(phone2cons);
+            phone2cons = -1;
+            ipc_answer_fast(callid, 0,0,0);
+            return;
+        case IPC_M_CONNECT_TO_ME:
+            if (phone2cons != -1) {
+                retval = ELIMIT;
+                break;
+            }
+            phone2cons = IPC_GET_ARG3(call);
+            retval = 0;
+            break;
+        default:
+            retval = EINVAL;
+        }
+        ipc_answer_fast(callid, retval, 0, 0);
+    }
+}
+int main(int argc, char **argv)
+{
+    ipcarg_t phonead;
+    /* Initialize arch dependent parts */
+    if (kbd_arch_init())
+        return -1;
+    /* Initialize key buffer */
+    keybuffer_init(&keybuffer);
+    async_set_client_connection(console_connection);
+    async_set_interrupt_received(irq_handler);
+    /* Register service at nameserver */
+    if (ipc_connect_to_me(PHONE_NS, SERVICE_KEYBOARD, 0, &phonead) != 0)
+        return -1;
+    async_manager();
+    /* Never reached */
+    return 0;
+}
+/**
+ * @}
+ */

 /tags/0.2.0.2/uspace/kbd/generic/key_buffer.c
 ,0 → 1,114
+/*
+ * Copyright (C) 2006 Josef Cejka
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/** @addtogroup kbdgen
+ * @brief   HelenOS generic uspace keyboard handler.
+ * @ingroup  kbd
+ * @{
+ */
+/** @file
+ */
+#include <key_buffer.h>
+#include <futex.h>
+atomic_t keybuffer_futex = FUTEX_INITIALIZER;
+/** Clear key buffer.
+ */
+void keybuffer_free(keybuffer_t *keybuffer)
+{
+    futex_down(&keybuffer_futex);
+    keybuffer->head = 0;
+    keybuffer->tail = 0;
+    keybuffer->items = 0;
+    futex_up(&keybuffer_futex);
+}
+/** Key buffer initialization.
+ *
+ */
+void keybuffer_init(keybuffer_t *keybuffer)
+{
+    keybuffer_free(keybuffer);
+}
+/** Get free space in buffer.
+ * This function is useful for processing some scancodes that are translated
+ * to more than one character.
+ * @return empty buffer space
+ */
+int keybuffer_available(keybuffer_t *keybuffer)
+{
+    return KEYBUFFER_SIZE - keybuffer->items;
+}
+/**
+ * @return nonzero, if buffer is not empty.
+ */
+int keybuffer_empty(keybuffer_t *keybuffer)
+{
+    return (keybuffer->items == 0);
+}
+/** Push key to key buffer.
+ * If buffer is full, character is ignored.
+ * @param key code of stored key
+ */
+void keybuffer_push(keybuffer_t *keybuffer, int key)
+{
+    futex_down(&keybuffer_futex);
+    if (keybuffer->items < KEYBUFFER_SIZE) {
+        keybuffer->fifo[keybuffer->tail] = key;
+        keybuffer->tail = (keybuffer->tail + 1) % KEYBUFFER_SIZE;
+        keybuffer->items++;
+    }
+    futex_up(&keybuffer_futex);
+}
+/** Pop character from buffer.
+ * @param c pointer to space where to store character from buffer.
+ * @return zero on empty buffer, nonzero else
+ */
+int keybuffer_pop(keybuffer_t *keybuffer, int *c)
+{
+    futex_down(&keybuffer_futex);
+    if (keybuffer->items > 0) {
+        keybuffer->items--;
+        *c = (keybuffer->fifo[keybuffer->head]) ;
+        keybuffer->head = (keybuffer->head + 1) % KEYBUFFER_SIZE;
+        futex_up(&keybuffer_futex);
+        return 1;
+    }
+    futex_up(&keybuffer_futex);
+    return 0;
+}
+/**
+ * @}
+ */

 /tags/0.2.0.2/uspace/kbd/arch/ia64/src/kbd.c
 ,0 → 1,167
+/*
+ * Copyright (C) 2006 Josef Cejka
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/** @addtogroup kbdia64 ia64
+ * @brief   HelenOS ia64 arch dependent parts of uspace keyboard handler.
+ * @ingroup  kbd
+ * @{
+ */
+/** @file
+ */
+#include <arch/kbd.h>
+#include <ipc/ipc.h>
+#include <sysinfo.h>
+#include <kbd.h>
+#include <keys.h>
+#define KEY_F1 0x504f1b
+#define KEY_F2 0x514f1b
+#define KEY_F3 0x524f1b
+#define KEY_F4 0x534f1b
+#define KEY_F5 0x7e35315b1b
+#define KEY_F6 0x7e37315b1b
+#define KEY_F7 0x7e38315b1b
+#define KEY_F8 0x7e39315b1b
+#define KEY_F9 0x7e30325b1b
+#define KEY_F10 0x7e31325b1b
+#define KEY_F11 0x7e33325b1b
+#define KEY_F12 0x7e34325b1b
+#define FUNCTION_KEYS 0x100
+irq_cmd_t ski_cmds[1] = {
+    { CMD_IA64_GETCHAR, 0, 0, 2 }
+};
+irq_code_t ski_kbd = {
+,
+    ski_cmds
+};
+int kbd_arch_init(void)
+{
+    if (sysinfo_value("kbd")) {
+        ipc_register_irq(sysinfo_value("kbd.irq"), &ski_kbd);
+        return 0;
+    }
+    return 1;
+}
+/*
+* Please preserve this code (it can be used to determine scancodes)
+*
+int to_hex(int v)
+{
+    return "0123456789ABCDEF"[v];
+}
+*/
+int kbd_arch_process(keybuffer_t *keybuffer, ipc_call_t *call)
+{
+    static unsigned long long buf=0;
+    static int count=0;
+    static int esc_count=0;
+    int scan_code = IPC_GET_ARG2(*call);
+    /*
+     * Please preserve this code (it can be used to determine scancodes)
+     */
+    //keybuffer_push(keybuffer, to_hex((scan_code>>4)&0xf));
+    //keybuffer_push(keybuffer, to_hex(scan_code&0xf));
+    //keybuffer_push(keybuffer, ' ');
+    //keybuffer_push(keybuffer, ' ');
+    //*/
+    if (scan_code) {
+        buf |= (unsigned long long) scan_code<<(8*(count++));
+    } else {
+        if (buf == 0x1b) {
+            esc_count++;
+            if (esc_count == 3) {
+                __SYSCALL0(SYS_DEBUG_ENABLE_CONSOLE);
+            }
+        } else {
+            esc_count = 0;
+        }
+        if (!(buf & 0xff00)) {
+            keybuffer_push(keybuffer, buf);
+        } else {
+            switch (buf) {
+                case KEY_F1:
+                    keybuffer_push(keybuffer, FUNCTION_KEYS | 1);
+                    break;
+                case KEY_F2:
+                    keybuffer_push(keybuffer, FUNCTION_KEYS | 2);
+                    break;
+                case KEY_F3:
+                    keybuffer_push(keybuffer, FUNCTION_KEYS | 3);
+                    break;
+                case KEY_F4:
+                    keybuffer_push(keybuffer, FUNCTION_KEYS | 4);
+                    break;
+                case KEY_F5:
+                    keybuffer_push(keybuffer, FUNCTION_KEYS | 5);
+                    break;
+                case KEY_F6:
+                    keybuffer_push(keybuffer, FUNCTION_KEYS | 6);
+                    break;
+                case KEY_F7:
+                    keybuffer_push(keybuffer, FUNCTION_KEYS | 7);
+                    break;
+                case KEY_F8:
+                    keybuffer_push(keybuffer, FUNCTION_KEYS | 8);
+                    break;
+                case KEY_F9:
+                    keybuffer_push(keybuffer, FUNCTION_KEYS | 9);
+                    break;
+                case KEY_F10:
+                    keybuffer_push(keybuffer, FUNCTION_KEYS | 10);
+                    break;
+                case KEY_F11:
+                    keybuffer_push(keybuffer, FUNCTION_KEYS | 11);
+                    break;
+                case KEY_F12:
+                    keybuffer_push(keybuffer, FUNCTION_KEYS | 12);
+                    break;
+            }
+        }
+        buf = count = 0;
+    }
+    return  1;
+}
+/**
+ * @}
+ */

 /tags/0.2.0.2/uspace/kbd/arch/ia64/include/kbd.h
 ,0 → 1,49
+/*
+ * Copyright (C) 2006 Josef Cejka
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/** @addtogroup kbdia64 ia64
+ * @brief   HelenOS ia64 arch dependent parts of uspace keyboard handler.
+ * @ingroup  kbd
+ * @{
+ */
+/** @file
+ */
+#ifndef __ia64_KBD_H__
+#define __ia64_KBD_H__
+#include <key_buffer.h>
+int kbd_arch_init(void);
+#endif
+/**
+ * @}
+ */

 /tags/0.2.0.2/uspace/kbd/arch/ia32/src/kbd.c
 ,0 → 1,476
+/*
+ * Copyright (C) 2001-2004 Jakub Jermar
+ * Copyright (C) 2006 Josef Cejka
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/** @addtogroup kbdia32 ia32
+ * @brief   HelenOS ia32 / amd64 arch dependent parts of uspace keyboard handler.
+ * @ingroup  kbd
+ * @{
+ */
+/** @file
+ * @ingroup kbdamd64
+ */
+#include <arch/kbd.h>
+#include <ipc/ipc.h>
+#include <unistd.h>
+#include <kbd.h>
+#include <keys.h>
+/* Interesting bits for status register */
+#define i8042_OUTPUT_FULL  0x1
+#define i8042_INPUT_FULL   0x2
+#define i8042_MOUSE_DATA   0x20
+/* Command constants */
+#define i8042_CMD_KBD 0x60
+#define i8042_CMD_MOUSE  0xd4
+/* Keyboard cmd byte */
+#define i8042_KBD_IE        0x1
+#define i8042_MOUSE_IE      0x2
+#define i8042_KBD_DISABLE   0x10
+#define i8042_MOUSE_DISABLE 0x20
+#define i8042_KBD_TRANSLATE 0x40
+/* Mouse constants */
+#define MOUSE_OUT_INIT  0xf4
+#define MOUSE_ACK       0xfa
+#define SPECIAL     255
+#define KEY_RELEASE 0x80
+/**
+ * These codes read from i8042 data register are silently ignored.
+ */
+#define IGNORE_CODE 0x7f
+#define PRESSED_SHIFT       (1<<0)
+#define PRESSED_CAPSLOCK    (1<<1)
+#define LOCKED_CAPSLOCK     (1<<0)
+/** Scancodes. */
+#define SC_ESC      0x01
+#define SC_BACKSPACE    0x0e
+#define SC_LSHIFT   0x2a
+#define SC_RSHIFT   0x36
+#define SC_CAPSLOCK 0x3a
+#define SC_SPEC_ESCAPE  0xe0
+#define SC_LEFTARR      0x4b
+#define SC_RIGHTARR     0x4d
+#define SC_UPARR        0x48
+#define SC_DOWNARR      0x50
+#define SC_DELETE       0x53
+#define SC_HOME         0x47
+#define SC_END          0x4f
+#define FUNCTION_KEYS 0x100
+static volatile int keyflags;       /**< Tracking of multiple keypresses. */
+static volatile int lockflags;      /**< Tracking of multiple keys lockings. */
+/** Primary meaning of scancodes. */
+static int sc_primary_map[] = {
+    SPECIAL, /* 0x00 */
+    SPECIAL, /* 0x01 - Esc */
+    '1', '2', '3', '4', '5', '6', '7', '8', '9', '0', '-', '=',
+    '\b', /* 0x0e - Backspace */
+    '\t', 'q', 'w', 'e', 'r', 't', 'y', 'u', 'i', 'o', 'p', '[', ']', '\n',
+    SPECIAL, /* 0x1d - LCtrl */
+    'a', 's', 'd', 'f', 'g', 'h', 'j', 'k', 'l', ';', '\'',
+    '`',
+    SPECIAL, /* 0x2a - LShift */
+    '\\',
+    'z', 'x', 'c', 'v', 'b', 'n', 'm', ',', '.', '/',
+    SPECIAL, /* 0x36 - RShift */
+    '*',
+    SPECIAL, /* 0x38 - LAlt */
+    ' ',
+    SPECIAL, /* 0x3a - CapsLock */
+    (FUNCTION_KEYS | 1), /* 0x3b - F1 */
+    (FUNCTION_KEYS | 2), /* 0x3c - F2 */
+    (FUNCTION_KEYS | 3), /* 0x3d - F3 */
+    (FUNCTION_KEYS | 4), /* 0x3e - F4 */
+    (FUNCTION_KEYS | 5), /* 0x3f - F5 */
+    (FUNCTION_KEYS | 6), /* 0x40 - F6 */
+    (FUNCTION_KEYS | 7), /* 0x41 - F7 */
+    (FUNCTION_KEYS | 8), /* 0x42 - F8 */
+    (FUNCTION_KEYS | 9), /* 0x43 - F9 */
+    (FUNCTION_KEYS | 10), /* 0x44 - F10 */
+    SPECIAL, /* 0x45 - NumLock */
+    SPECIAL, /* 0x46 - ScrollLock */
+    '7', '8', '9', '-',
+    '4', '5', '6', '+',
+    '1', '2', '3',
+    '0', '.',
+    SPECIAL, /* 0x54 - Alt-SysRq */
+    SPECIAL, /* 0x55 - F11/F12/PF1/FN */
+    SPECIAL, /* 0x56 - unlabelled key next to LAlt */
+    (FUNCTION_KEYS | 11), /* 0x57 - F11 */
+    (FUNCTION_KEYS | 12), /* 0x58 - F12 */
+    SPECIAL, /* 0x59 */
+    SPECIAL, /* 0x5a */
+    SPECIAL, /* 0x5b */
+    SPECIAL, /* 0x5c */
+    SPECIAL, /* 0x5d */
+    SPECIAL, /* 0x5e */
+    SPECIAL, /* 0x5f */
+    SPECIAL, /* 0x60 */
+    SPECIAL, /* 0x61 */
+    SPECIAL, /* 0x62 */
+    SPECIAL, /* 0x63 */
+    SPECIAL, /* 0x64 */
+    SPECIAL, /* 0x65 */
+    SPECIAL, /* 0x66 */
+    SPECIAL, /* 0x67 */
+    SPECIAL, /* 0x68 */
+    SPECIAL, /* 0x69 */
+    SPECIAL, /* 0x6a */
+    SPECIAL, /* 0x6b */
+    SPECIAL, /* 0x6c */
+    SPECIAL, /* 0x6d */
+    SPECIAL, /* 0x6e */
+    SPECIAL, /* 0x6f */
+    SPECIAL, /* 0x70 */
+    SPECIAL, /* 0x71 */
+    SPECIAL, /* 0x72 */
+    SPECIAL, /* 0x73 */
+    SPECIAL, /* 0x74 */
+    SPECIAL, /* 0x75 */
+    SPECIAL, /* 0x76 */
+    SPECIAL, /* 0x77 */
+    SPECIAL, /* 0x78 */
+    SPECIAL, /* 0x79 */
+    SPECIAL, /* 0x7a */
+    SPECIAL, /* 0x7b */
+    SPECIAL, /* 0x7c */
+    SPECIAL, /* 0x7d */
+    SPECIAL, /* 0x7e */
+    SPECIAL, /* 0x7f */
+};
+/** Secondary meaning of scancodes. */
+static int sc_secondary_map[] = {
+    SPECIAL, /* 0x00 */
+x1b, /* 0x01 - Esc */
+    '!', '@', '#', '$', '%', '^', '&', '*', '(', ')', '_', '+',
+    SPECIAL, /* 0x0e - Backspace */
+    '\t', 'Q', 'W', 'E', 'R', 'T', 'Y', 'U', 'I', 'O', 'P', '{', '}', '\n',
+    SPECIAL, /* 0x1d - LCtrl */
+    'A', 'S', 'D', 'F', 'G', 'H', 'J', 'K', 'L', ':', '"',
+    '~',
+    SPECIAL, /* 0x2a - LShift */
+    '|',
+    'Z', 'X', 'C', 'V', 'B', 'N', 'M', '<', '>', '?',
+    SPECIAL, /* 0x36 - RShift */
+    '*',
+    SPECIAL, /* 0x38 - LAlt */
+    ' ',
+    SPECIAL, /* 0x3a - CapsLock */
+    SPECIAL, /* 0x3b - F1 */
+    SPECIAL, /* 0x3c - F2 */
+    SPECIAL, /* 0x3d - F3 */
+    SPECIAL, /* 0x3e - F4 */
+    SPECIAL, /* 0x3f - F5 */
+    SPECIAL, /* 0x40 - F6 */
+    SPECIAL, /* 0x41 - F7 */
+    SPECIAL, /* 0x42 - F8 */
+    SPECIAL, /* 0x43 - F9 */
+    SPECIAL, /* 0x44 - F10 */
+    SPECIAL, /* 0x45 - NumLock */
+    SPECIAL, /* 0x46 - ScrollLock */
+    '7', '8', '9', '-',
+    '4', '5', '6', '+',
+    '1', '2', '3',
+    '0', '.',
+    SPECIAL, /* 0x54 - Alt-SysRq */
+    SPECIAL, /* 0x55 - F11/F12/PF1/FN */
+    SPECIAL, /* 0x56 - unlabelled key next to LAlt */
+    SPECIAL, /* 0x57 - F11 */
+    SPECIAL, /* 0x58 - F12 */
+    SPECIAL, /* 0x59 */
+    SPECIAL, /* 0x5a */
+    SPECIAL, /* 0x5b */
+    SPECIAL, /* 0x5c */
+    SPECIAL, /* 0x5d */
+    SPECIAL, /* 0x5e */
+    SPECIAL, /* 0x5f */
+    SPECIAL, /* 0x60 */
+    SPECIAL, /* 0x61 */
+    SPECIAL, /* 0x62 */
+    SPECIAL, /* 0x63 */
+    SPECIAL, /* 0x64 */
+    SPECIAL, /* 0x65 */
+    SPECIAL, /* 0x66 */
+    SPECIAL, /* 0x67 */
+    SPECIAL, /* 0x68 */
+    SPECIAL, /* 0x69 */
+    SPECIAL, /* 0x6a */
+    SPECIAL, /* 0x6b */
+    SPECIAL, /* 0x6c */
+    SPECIAL, /* 0x6d */
+    SPECIAL, /* 0x6e */
+    SPECIAL, /* 0x6f */
+    SPECIAL, /* 0x70 */
+    SPECIAL, /* 0x71 */
+    SPECIAL, /* 0x72 */
+    SPECIAL, /* 0x73 */
+    SPECIAL, /* 0x74 */
+    SPECIAL, /* 0x75 */
+    SPECIAL, /* 0x76 */
+    SPECIAL, /* 0x77 */
+    SPECIAL, /* 0x78 */
+    SPECIAL, /* 0x79 */
+    SPECIAL, /* 0x7a */
+    SPECIAL, /* 0x7b */
+    SPECIAL, /* 0x7c */
+    SPECIAL, /* 0x7d */
+    SPECIAL, /* 0x7e */
+    SPECIAL, /* 0x7f */
+};
+irq_cmd_t i8042_cmds[2] = {
+    { CMD_PORT_READ_1, (void *)0x64, 0, 1 },
+    { CMD_PORT_READ_1, (void *)0x60, 0, 2 }
+};
+irq_code_t i8042_kbd = {
+,
+    i8042_cmds
+};
+static void key_released(keybuffer_t *keybuffer, unsigned char key)
+{
+    switch (key) {
+        case SC_LSHIFT:
+        case SC_RSHIFT:
+            keyflags &= ~PRESSED_SHIFT;
+            break;
+        case SC_CAPSLOCK:
+            keyflags &= ~PRESSED_CAPSLOCK;
+            if (lockflags & LOCKED_CAPSLOCK)
+                lockflags &= ~LOCKED_CAPSLOCK;
+                else
+                lockflags |= LOCKED_CAPSLOCK;
+            break;
+        default:
+            break;
+    }
+}
+static void key_pressed(keybuffer_t *keybuffer, unsigned char key)
+{
+    int *map = sc_primary_map;
+    int ascii = sc_primary_map[key];
+    int shift, capslock;
+    int letter = 0;
+    static int esc_count=0;
+    if ( key == SC_ESC ) {
+        esc_count++;
+        if ( esc_count == 3 ) {
+            __SYSCALL0(SYS_DEBUG_ENABLE_CONSOLE);
+        }
+    } else {
+        esc_count=0;
+    }
+    switch (key) {
+        case SC_LSHIFT:
+        case SC_RSHIFT:
+                keyflags |= PRESSED_SHIFT;
+            break;
+        case SC_CAPSLOCK:
+            keyflags |= PRESSED_CAPSLOCK;
+            break;
+        case SC_SPEC_ESCAPE:
+            break;
+    /*  case SC_LEFTARR:
+            if (keybuffer_available(keybuffer) >= 3) {
+                keybuffer_push(keybuffer, 0x1b);
+                keybuffer_push(keybuffer, 0x5b);
+                keybuffer_push(keybuffer, 0x44);
+            }
+            break;
+        case SC_RIGHTARR:
+            if (keybuffer_available(keybuffer) >= 3) {
+                keybuffer_push(keybuffer, 0x1b);
+                keybuffer_push(keybuffer, 0x5b);
+                keybuffer_push(keybuffer, 0x43);
+            }
+            break;
+        case SC_UPARR:
+            if (keybuffer_available(keybuffer) >= 3) {
+                keybuffer_push(keybuffer, 0x1b);
+                keybuffer_push(keybuffer, 0x5b);
+                keybuffer_push(keybuffer, 0x41);
+            }
+            break;
+        case SC_DOWNARR:
+            if (keybuffer_available(keybuffer) >= 3) {
+                keybuffer_push(keybuffer, 0x1b);
+                keybuffer_push(keybuffer, 0x5b);
+                keybuffer_push(keybuffer, 0x42);
+            }
+            break;
+        case SC_HOME:
+            if (keybuffer_available(keybuffer) >= 3) {
+                keybuffer_push(keybuffer, 0x1b);
+                keybuffer_push(keybuffer, 0x4f);
+                keybuffer_push(keybuffer, 0x48);
+            }
+            break;
+        case SC_END:
+            if (keybuffer_available(keybuffer) >= 3) {
+                keybuffer_push(keybuffer, 0x1b);
+                keybuffer_push(keybuffer, 0x4f);
+                keybuffer_push(keybuffer, 0x46);
+            }
+            break;
+        case SC_DELETE:
+            if (keybuffer_available(keybuffer) >= 4) {
+                keybuffer_push(keybuffer, 0x1b);
+                keybuffer_push(keybuffer, 0x5b);
+                keybuffer_push(keybuffer, 0x33);
+                keybuffer_push(keybuffer, 0x7e);
+            }
+            break;
+    */  default:
+                letter = ((ascii >= 'a') && (ascii <= 'z'));
+            capslock = (keyflags & PRESSED_CAPSLOCK) || (lockflags & LOCKED_CAPSLOCK);
+            shift = keyflags & PRESSED_SHIFT;
+            if (letter && capslock)
+                shift = !shift;
+            if (shift)
+                map = sc_secondary_map;
+            if (map[key] != SPECIAL)
+                keybuffer_push(keybuffer, map[key]);
+            break;
+    }
+}
+static void wait_ready(void) {
+    while (i8042_status_read() & i8042_INPUT_FULL)
+        ;
+}
+/** Register uspace irq handler
+ * @return
+ */
+int kbd_arch_init(void)
+{
+    int i;
+    int mouseenabled = 0;
+    iospace_enable(task_get_id(),(void *)i8042_DATA, 5);
+    /* Disable kbd, enable mouse */
+    i8042_command_write(i8042_CMD_KBD);
+    wait_ready();
+    i8042_command_write(i8042_CMD_KBD);
+    wait_ready();
+    i8042_data_write(i8042_KBD_DISABLE);
+    wait_ready();
+    /* Flush all current IO */
+    while (i8042_status_read() & i8042_OUTPUT_FULL)
+        i8042_data_read();
+    /* Initialize mouse */
+    i8042_command_write(i8042_CMD_MOUSE);
+    wait_ready();
+    i8042_data_write(MOUSE_OUT_INIT);
+    wait_ready();
+    int mouseanswer = 0;
+    for (i=0;i < 1000; i++) {
+        int status = i8042_status_read();
+        if (status & i8042_OUTPUT_FULL) {
+            int data = i8042_data_read();
+            if (status & i8042_MOUSE_DATA) {
+                mouseanswer = data;
+                break;
+            }
+        }
+        usleep(1000);
+    }
+    if (mouseanswer == MOUSE_ACK) {
+        /* enable mouse */
+        mouseenabled = 1;
+        ipc_register_irq(MOUSE_IRQ, &i8042_kbd);
+    }
+    /* Enable kbd */
+    ipc_register_irq(KBD_IRQ, &i8042_kbd);
+    /* Register for irq restart */
+    ipc_register_irq(IPC_IRQ_KBDRESTART, NULL);
+    int newcontrol = i8042_KBD_IE | i8042_KBD_TRANSLATE;
+    if (mouseenabled)
+        newcontrol |= i8042_MOUSE_IE;
+    i8042_command_write(i8042_CMD_KBD);
+    wait_ready();
+    i8042_data_write(newcontrol);
+    wait_ready();
+    return 0;
+}
+/** Process keyboard & mouse events */
+int kbd_arch_process(keybuffer_t *keybuffer, ipc_call_t *call)
+{
+    int status = IPC_GET_ARG1(*call);
+    if (IPC_GET_METHOD(*call) == IPC_IRQ_KBDRESTART) {
+        kbd_arch_init();
+        return 1;
+    }
+    if ((status & i8042_MOUSE_DATA))
+        return 0;
+    int scan_code = IPC_GET_ARG2(*call);
+    if (scan_code != IGNORE_CODE) {
+        if (scan_code & KEY_RELEASE)
+            key_released(keybuffer, scan_code ^ KEY_RELEASE);
+        else
+            key_pressed(keybuffer, scan_code);
+    }
+    return  1;
+}
+/**
+ * @}
+ */

 /tags/0.2.0.2/uspace/kbd/arch/ia32/src/mouse.c
 ,0 → 1,116
+/*
+ * Copyright (C) 2006 Ondrej Palkovsky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#include <ipc/ipc.h>
+#include <async.h>
+#include <kbd.h>
+#include <keys.h>
+#define i8042_MOUSE_DATA   0x20
+#define BUFSIZE 3
+typedef struct {
+    union {
+        unsigned char data[BUFSIZE];
+        struct {
+            unsigned leftbtn : 1;
+            unsigned rightbtn : 1;
+            unsigned middlebtn : 1;
+            unsigned isone : 1; /* Always one */
+            unsigned xsign : 1;
+            unsigned ysign : 1;
+            unsigned xovfl : 1;
+            unsigned yovfl : 1;
+            unsigned char x;
+            unsigned char y;
+        } val;
+    }u;
+}ps2packet_t;
+static ps2packet_t buf;
+static int bufpos = 0;
+static int leftbtn = 0;
+static int rightbtn = 0;
+static int middlebtn = 0;
+/** Convert 9-bit 2-complement signed number to integer */
+static int bit9toint(int sign, unsigned char data)
+{
+    int tmp;
+    if (!sign)
+        return data;
+    tmp = ((unsigned char)~data) + 1;
+    return -tmp;
+}
+/** Process mouse data
+ *
+ * @return True if mouse command was recognized and processed
+ */
+int mouse_arch_process(int phoneid, ipc_call_t *call)
+{
+    int status = IPC_GET_ARG1(*call);
+    int data = IPC_GET_ARG2(*call);
+    int x,y;
+    if (!(status & i8042_MOUSE_DATA))
+        return 0;
+    /* Check that we have not lost synchronization */
+    if (bufpos == 0 && !(data & 0x8))
+        return 1; /* Synchro lost, ignore byte */
+    buf.u.data[bufpos++] = data;
+    if (bufpos == BUFSIZE) {
+        bufpos = 0;
+        if (phoneid != -1) {
+            if (buf.u.val.leftbtn ^ leftbtn) {
+                leftbtn = buf.u.val.leftbtn;
+                async_msg(phoneid, KBD_MS_LEFT, leftbtn);
+            }
+            if (buf.u.val.rightbtn & rightbtn) {
+                rightbtn = buf.u.val.middlebtn;
+                async_msg(phoneid, KBD_MS_RIGHT, rightbtn);
+            }
+            if (buf.u.val.rightbtn & rightbtn) {
+                middlebtn = buf.u.val.middlebtn;
+                async_msg(phoneid, KBD_MS_MIDDLE, middlebtn);
+            }
+            x = bit9toint(buf.u.val.xsign, buf.u.val.x);
+            y = bit9toint(buf.u.val.ysign, buf.u.val.y);
+            if (x || y)
+                async_msg_2(phoneid, KBD_MS_MOVE, (ipcarg_t)x, (ipcarg_t)(-y));
+        }
+    }
+    return 1;
+}

 /tags/0.2.0.2/uspace/kbd/arch/ia32/include/kbd.h
 ,0 → 1,83
+/*
+ * Copyright (C) 2006 Josef Cejka
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/** @addtogroup kbdamd64 amd64
+ * @brief   HelenOS ia32 / amd64 arch dependent parts of uspace keyboard and mouse handler.
+ * @ingroup  kbd
+ * @{
+ */
+/** @file
+ * @ingroup kbdia32
+ */
+#ifndef __ia32_KBD_H__
+#define __ia32_KBD_H__
+#include <key_buffer.h>
+#include <ddi.h>
+#include <libarch/ddi.h>
+#define KBD_IRQ      1
+#define MOUSE_IRQ    12
+#define i8042_DATA      0x60
+#define i8042_STATUS    0X64
+typedef unsigned char u8;
+typedef short u16;
+static inline void i8042_data_write(u8 data)
+{
+    outb(i8042_DATA, data);
+}
+static inline u8 i8042_data_read(void)
+{
+    return inb(i8042_DATA);
+}
+static inline u8 i8042_status_read(void)
+{
+    return inb(i8042_STATUS);
+}
+static inline void i8042_command_write(u8 command)
+{
+    outb(i8042_STATUS, command);
+}
+int kbd_arch_init(void);
+#endif
+/**
+ * @}
+ */

 /tags/0.2.0.2/uspace/kbd/arch/mips32/src/kbd.c
 ,0 → 1,399
+/*
+ * Copyright (C) 2006 Josef Cejka
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/** @addtogroup kbdmips32 mips32
+ * @brief   HelenOS mips32 arch dependent parts of uspace keyboard handler.
+ * @ingroup  kbd
+ * @{
+ */
+/** @file
+ */
+#include <arch/kbd.h>
+#include <ipc/ipc.h>
+#include <sysinfo.h>
+#include <kbd.h>
+#include <keys.h>
+#define MSIM_KEY_F1 0x504f1bL
+#define MSIM_KEY_F2 0x514f1bL
+#define MSIM_KEY_F3 0x524f1bL
+#define MSIM_KEY_F4 0x534f1bL
+#define MSIM_KEY_F5 0x35315b1bL
+#define MSIM_KEY_F6 0x37315b1bL
+#define MSIM_KEY_F7 0x38315b1bL
+#define MSIM_KEY_F8 0x39315b1bL
+#define MSIM_KEY_F9 0x30325b1bL
+#define MSIM_KEY_F10 0x31325b1bL
+#define MSIM_KEY_F11 0x33325b1bL
+#define MSIM_KEY_F12 0x34325b1bL
+#define GXEMUL_KEY_F1 0x504f5b1bL
+#define GXEMUL_KEY_F2 0x514f5b1bL
+#define GXEMUL_KEY_F3 0x524f5b1bL
+#define GXEMUL_KEY_F4 0x534f5b1bL
+#define GXEMUL_KEY_F5 0x35315b1bL
+#define GXEMUL_KEY_F6 0x37315b1bL
+#define GXEMUL_KEY_F7 0x38315b1bL
+#define GXEMUL_KEY_F8 0x39315b1bL
+#define GXEMUL_KEY_F9 0x38325b1bL
+#define GXEMUL_KEY_F10 0x39325b1bL
+#define GXEMUL_KEY_F11 0x33325b1bL
+#define GXEMUL_KEY_F12 0x34325b1bL
+#define FUNCTION_KEYS 0x100
+irq_cmd_t msim_cmds[1] = {
+    { CMD_MEM_READ_1, (void *)0xB0000000, 0, 2 }
+};
+irq_code_t msim_kbd = {
+,
+    msim_cmds
+};
+static int msim,gxemul;
+static int fb_fb;
+int kbd_arch_init(void)
+{
+    fb_fb=sysinfo_value("fb.kind")==1;
+    ipc_register_irq(2, &msim_kbd);
+    return 0;
+}
+/*
+//*
+//* Please preserve this code (it can be used to determine scancodes)
+//*
+int to_hex(int v)
+{
+        return "0123456789ABCDEF"[v];
+}
+*/
+static int kbd_arch_process_no_fb(keybuffer_t *keybuffer, int scan_code)
+{
+    static unsigned long buf=0;
+    static int count=0;
+    /* Please preserve this code (it can be used to determine scancodes)
+    keybuffer_push(keybuffer, to_hex((scan_code>>4)&0xf));
+    keybuffer_push(keybuffer, to_hex(scan_code&0xf));
+    keybuffer_push(keybuffer, ' ');
+    keybuffer_push(keybuffer, ' ');
+    return 1;
+    */
+    if(scan_code==0x7e)
+    {
+        switch (buf){
+            case MSIM_KEY_F5:
+                keybuffer_push(keybuffer,FUNCTION_KEYS | 5 );
+                buf=count=0;
+                return 1;
+            case MSIM_KEY_F6:
+                keybuffer_push(keybuffer,FUNCTION_KEYS | 6 );
+                buf=count=0;
+                return 1;
+            case MSIM_KEY_F7:
+                keybuffer_push(keybuffer,FUNCTION_KEYS | 7 );
+                buf=count=0;
+                return 1;
+            case MSIM_KEY_F8:
+                keybuffer_push(keybuffer,FUNCTION_KEYS | 8 );
+                buf=count=0;
+                return 1;
+            case MSIM_KEY_F9:
+                keybuffer_push(keybuffer,FUNCTION_KEYS | 9 );
+                buf=count=0;
+                return 1;
+            case MSIM_KEY_F10:
+                keybuffer_push(keybuffer,FUNCTION_KEYS | 10 );
+                buf=count=0;
+                return 1;
+            case MSIM_KEY_F11:
+                keybuffer_push(keybuffer,FUNCTION_KEYS | 11 );
+                buf=count=0;
+                return 1;
+            case MSIM_KEY_F12:
+                keybuffer_push(keybuffer,FUNCTION_KEYS | 12 );
+                buf=count=0;
+                return 1;
+            default:
+                keybuffer_push(keybuffer, buf & 0xff );
+                keybuffer_push(keybuffer, (buf >> 8) &0xff );
+                keybuffer_push(keybuffer, (buf >> 16) &0xff );
+                keybuffer_push(keybuffer, (buf >> 24) &0xff );
+                keybuffer_push(keybuffer, scan_code );
+                buf=count=0;
+                return 1;
+        }
+    }
+    buf|=((unsigned long) scan_code)<<(8*(count++));
+    if((buf & 0xff)!= (MSIM_KEY_F1 & 0xff)) {
+        keybuffer_push(keybuffer,buf );
+        buf=count=0;
+        return 1;
+    }
+    if ( count <= 1 )
+        return 1;
+    if(    (buf & 0xffff) != (MSIM_KEY_F1 & 0xffff)
+        && (buf & 0xffff) != (MSIM_KEY_F5 & 0xffff) ) {
+        keybuffer_push(keybuffer, buf & 0xff );
+        keybuffer_push(keybuffer, (buf >> 8) &0xff );
+        buf=count=0;
+        return 1;
+    }
+    if ( count <= 2)
+        return 1;
+    switch (buf){
+        case MSIM_KEY_F1:
+            keybuffer_push(keybuffer,FUNCTION_KEYS | 1 );
+            buf=count=0;
+            return 1;
+        case MSIM_KEY_F2:
+            keybuffer_push(keybuffer,FUNCTION_KEYS | 2 );
+            buf=count=0;
+            return 1;
+        case MSIM_KEY_F3:
+            keybuffer_push(keybuffer,FUNCTION_KEYS | 3 );
+            buf=count=0;
+            return 1;
+        case MSIM_KEY_F4:
+            keybuffer_push(keybuffer,FUNCTION_KEYS | 4 );
+            buf=count=0;
+            return 1;
+    }
+    if(    (buf & 0xffffff) != (MSIM_KEY_F5 & 0xffffff)
+        && (buf & 0xffffff) != (MSIM_KEY_F9 & 0xffffff) ) {
+        keybuffer_push(keybuffer, buf & 0xff );
+        keybuffer_push(keybuffer, (buf >> 8) &0xff );
+        keybuffer_push(keybuffer, (buf >> 16) &0xff );
+        buf=count=0;
+        return 1;
+    }
+    if ( count <= 3 )
+        return 1;
+    switch (buf){
+        case MSIM_KEY_F5:
+        case MSIM_KEY_F6:
+        case MSIM_KEY_F7:
+        case MSIM_KEY_F8:
+        case MSIM_KEY_F9:
+        case MSIM_KEY_F10:
+        case MSIM_KEY_F11:
+        case MSIM_KEY_F12:
+            return 1;
+        default:
+            keybuffer_push(keybuffer, buf & 0xff );
+            keybuffer_push(keybuffer, (buf >> 8) &0xff );
+            keybuffer_push(keybuffer, (buf >> 16) &0xff );
+            keybuffer_push(keybuffer, (buf >> 24) &0xff );
+            buf=count=0;
+            return 1;
+        }
+    return 1;
+}
+static int kbd_arch_process_fb(keybuffer_t *keybuffer, int scan_code)
+{
+    static unsigned long buf=0;
+    static int count=0;
+    /* Please preserve this code (it can be used to determine scancodes)
+    keybuffer_push(keybuffer, to_hex((scan_code>>4)&0xf));
+    keybuffer_push(keybuffer, to_hex(scan_code&0xf));
+    keybuffer_push(keybuffer, ' ');
+    keybuffer_push(keybuffer, ' ');
+    return 1;
+    */
+    if ( scan_code == '\r' )
+        scan_code = '\n' ;
+    buf|=((unsigned long) scan_code)<<(8*(count++));
+    if((buf & 0xff)!= (GXEMUL_KEY_F1 & 0xff)) {
+        keybuffer_push(keybuffer,buf );
+        buf=count=0;
+        return 1;
+    }
+    if ( count <= 1 )
+        return 1;
+    if(    (buf & 0xffff) != (GXEMUL_KEY_F1 & 0xffff)  ) {
+        keybuffer_push(keybuffer, buf & 0xff );
+        keybuffer_push(keybuffer, (buf >> 8) &0xff );
+        buf=count=0;
+        return 1;
+    }
+    if ( count <= 2)
+        return 1;
+    if(    (buf & 0xffffff) != (GXEMUL_KEY_F1 & 0xffffff)
+        && (buf & 0xffffff) != (GXEMUL_KEY_F5 & 0xffffff)
+        && (buf & 0xffffff) != (GXEMUL_KEY_F9 & 0xffffff) ) {
+        keybuffer_push(keybuffer, buf & 0xff );
+        keybuffer_push(keybuffer, (buf >> 8) &0xff );
+        keybuffer_push(keybuffer, (buf >> 16) &0xff );
+        buf=count=0;
+        return 1;
+    }
+    if ( count <= 3 )
+        return 1;
+    switch (buf){
+        case GXEMUL_KEY_F1:
+            keybuffer_push(keybuffer,FUNCTION_KEYS | 1 );
+            buf=count=0;
+            return 1;
+        case GXEMUL_KEY_F2:
+            keybuffer_push(keybuffer,FUNCTION_KEYS | 2 );
+            buf=count=0;
+            return 1;
+        case GXEMUL_KEY_F3:
+            keybuffer_push(keybuffer,FUNCTION_KEYS | 3 );
+            buf=count=0;
+            return 1;
+        case GXEMUL_KEY_F4:
+            keybuffer_push(keybuffer,FUNCTION_KEYS | 4 );
+            buf=count=0;
+            return 1;
+        case GXEMUL_KEY_F5:
+            keybuffer_push(keybuffer,FUNCTION_KEYS | 5 );
+            buf=count=0;
+            return 1;
+        case GXEMUL_KEY_F6:
+            keybuffer_push(keybuffer,FUNCTION_KEYS | 6 );
+            buf=count=0;
+            return 1;
+        case GXEMUL_KEY_F7:
+            keybuffer_push(keybuffer,FUNCTION_KEYS | 7 );
+            buf=count=0;
+            return 1;
+        case GXEMUL_KEY_F8:
+            keybuffer_push(keybuffer,FUNCTION_KEYS | 8 );
+            buf=count=0;
+            return 1;
+        case GXEMUL_KEY_F9:
+            keybuffer_push(keybuffer,FUNCTION_KEYS | 9 );
+            buf=count=0;
+            return 1;
+        case GXEMUL_KEY_F10:
+            keybuffer_push(keybuffer,FUNCTION_KEYS | 10 );
+            buf=count=0;
+            return 1;
+        case GXEMUL_KEY_F11:
+            keybuffer_push(keybuffer,FUNCTION_KEYS | 11 );
+            buf=count=0;
+            return 1;
+        case GXEMUL_KEY_F12:
+            keybuffer_push(keybuffer,FUNCTION_KEYS | 12 );
+            buf=count=0;
+            return 1;
+        default:
+            keybuffer_push(keybuffer, buf & 0xff );
+            keybuffer_push(keybuffer, (buf >> 8) &0xff );
+            keybuffer_push(keybuffer, (buf >> 16) &0xff );
+            keybuffer_push(keybuffer, (buf >> 24) &0xff );
+            buf=count=0;
+            return 1;
+        }
+    return 1;
+}
+int kbd_arch_process(keybuffer_t *keybuffer, ipc_call_t *call)
+{
+    int scan_code = IPC_GET_ARG2(*call);
+    static int esc_count=0;
+    if ( scan_code == 0x1b ) {
+        esc_count++;
+        if ( esc_count == 3 ) {
+            __SYSCALL0(SYS_DEBUG_ENABLE_CONSOLE);
+        }
+    } else {
+        esc_count=0;
+    }
+    if(fb_fb) return kbd_arch_process_fb(keybuffer, scan_code);
+    return kbd_arch_process_no_fb(keybuffer, scan_code);
+    return 0;
+}
+/** @}
+*/

 /tags/0.2.0.2/uspace/kbd/arch/mips32/include/kbd.h
 ,0 → 1,48
+/*
+ * Copyright (C) 2006 Josef Cejka
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/** @addtogroup kbdmips32 mips32
+ * @brief   HelenOS mips32 arch dependent parts of uspace keyboard handler.
+ * @ingroup  kbd
+ * @{
+ */
+/** @file
+ */
+#ifndef __mips32_KBD_H__
+#define __mips32_KBD_H__
+#include <key_buffer.h>
+int kbd_arch_init(void);
+#endif
+/**
+ * @}
+ */

 /tags/0.2.0.2/uspace/kbd/arch/ppc32/include/kbd.h
 ,0 → 1,48
+/*
+ * Copyright (C) 2006 Josef Cejka
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/** @addtogroup kbdppc32 ppc32
+ * @brief   HelenOS ppc32 arch dependent parts of uspace keyboard handler.
+ * @ingroup  kbd
+ * @{
+ */
+/** @file
+ */
+#ifndef __ppc32_KBD_H__
+#define __ppc32_KBD_H__
+#include <key_buffer.h>
+int kbd_arch_init(void);
+#endif
+/** @}
+ */

 /tags/0.2.0.2/uspace/kbd/arch/ppc32/src/kbd.c
 ,0 → 1,210
+/*
+ * Copyright (C) 2006 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/** @addtogroup kbdppc32 ppc32
+ * @brief   HelenOS ppc32 arch dependent parts of uspace keyboard handler.
+ * @ingroup  kbd
+ * @{
+ */
+/** @file
+ */
+#include <arch/kbd.h>
+#include <ipc/ipc.h>
+#include <sysinfo.h>
+#include <kbd.h>
+#include <keys.h>
+irq_cmd_t cuda_cmds[1] = {
+    { CMD_PPC32_GETCHAR, 0, 0, 2 }
+};
+irq_code_t cuda_kbd = {
+,
+    cuda_cmds
+};
+#define SPECIAL     255
+#define FUNCTION_KEYS 0x100
+static int lchars[0x80] = {
+    'a',
+    's',
+    'd',
+    'f',
+    'h',
+    'g',
+    'z',
+    'x',
+    'c',
+    'v',
+    SPECIAL,
+    'b',
+    'q',
+    'w',
+    'e',
+    'r',
+    'y',
+    't',
+    '1',
+    '2',
+    '3',
+    '4',
+    '6',
+    '5',
+    '=',
+    '9',
+    '7',
+    '-',
+    '8',
+    '0',
+    ']',
+    'o',
+    'u',
+    '[',
+    'i',
+    'p',
+    '\n',                 /* Enter */
+    'l',
+    'j',
+    '\'',
+    'k',
+    ';',
+    '\\',
+    ',',
+    '/',
+    'n',
+    'm',
+    '.',
+    '\t',                 /* Tab */
+    ' ',
+    '`',
+    '\b',                 /* Backspace */
+    SPECIAL,
+    SPECIAL,              /* Escape */
+    SPECIAL,              /* Ctrl */
+    SPECIAL,              /* Alt */
+    SPECIAL,              /* Shift */
+    SPECIAL,              /* Caps-Lock */
+    SPECIAL,              /* RAlt */
+    SPECIAL,              /* Left */
+    SPECIAL,              /* Right */
+    SPECIAL,              /* Down */
+    SPECIAL,              /* Up */
+    SPECIAL,
+    SPECIAL,
+    '.',                  /* Keypad . */
+    SPECIAL,
+    '*',                  /* Keypad * */
+    SPECIAL,
+    '+',                  /* Keypad + */
+    SPECIAL,
+    SPECIAL,              /* NumLock */
+    SPECIAL,
+    SPECIAL,
+    SPECIAL,
+    '/',                  /* Keypad / */
+    '\n',                 /* Keypad Enter */
+    SPECIAL,
+    '-',                  /* Keypad - */
+    SPECIAL,
+    SPECIAL,
+    SPECIAL,
+    '0',                  /* Keypad 0 */
+    '1',                  /* Keypad 1 */
+    '2',                  /* Keypad 2 */
+    '3',                  /* Keypad 3 */
+    '4',                  /* Keypad 4 */
+    '5',                  /* Keypad 5 */
+    '6',                  /* Keypad 6 */
+    '7',                  /* Keypad 7 */
+    SPECIAL,
+    '8',                  /* Keypad 8 */
+    '9',                  /* Keypad 9 */
+    SPECIAL,
+    SPECIAL,
+    SPECIAL,
+    (FUNCTION_KEYS | 5),  /* F5 */
+    (FUNCTION_KEYS | 6),  /* F6 */
+    (FUNCTION_KEYS | 7),  /* F7 */
+    (FUNCTION_KEYS | 3),  /* F3 */
+    (FUNCTION_KEYS | 8),  /* F8 */
+    (FUNCTION_KEYS | 9),  /* F9 */
+    SPECIAL,
+    (FUNCTION_KEYS | 11), /* F11 */
+    SPECIAL,
+    (FUNCTION_KEYS | 13), /* F13 */
+    SPECIAL,
+    SPECIAL,              /* ScrollLock */
+    SPECIAL,
+    (FUNCTION_KEYS | 10), /* F10 */
+    SPECIAL,
+    (FUNCTION_KEYS | 12), /* F12 */
+    SPECIAL,
+    SPECIAL,              /* Pause */
+    SPECIAL,              /* Insert */
+    SPECIAL,              /* Home */
+    SPECIAL,              /* PageUp */
+    SPECIAL,              /* Delete */
+    (FUNCTION_KEYS | 4),  /* F4 */
+    SPECIAL,              /* End */
+    (FUNCTION_KEYS | 2),  /* F2 */
+    SPECIAL,              /* PageDown */
+    (FUNCTION_KEYS | 1)   /* F1 */
+};
+int kbd_arch_init(void)
+{
+    return ipc_register_irq(sysinfo_value("cuda.irq"), &cuda_kbd);
+}
+int kbd_arch_process(keybuffer_t *keybuffer, ipc_call_t *call)
+{
+    int param = IPC_GET_ARG2(*call);
+    if (param != -1) {
+        uint8_t scancode = (uint8_t) param;
+        if ((scancode & 0x80) != 0x80) {
+            int key = lchars[scancode & 0x7f];
+            if (key != SPECIAL)
+                keybuffer_push(keybuffer, key);
+        }
+    }
+    return 1;
+}
+/** @}
+ */

/tags/0.2.0.2/uspace/kbd/arch/amd64
0,0 → 1,0
link ia32
Property changes:
Added: svn:special
+*
\ No newline at end of property

/tags/0.2.0.2/uspace/kbd/arch/mips32eb
0,0 → 1,0
link mips32
Property changes:
Added: svn:special
+*
\ No newline at end of property

 /tags/0.2.0.2/uspace/kbd/include/keys.h
 ,0 → 1,62
+/*
+ * Copyright (C) 2006 Josef Cejka
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/**
+ * @addtogroup kbdgen
+ * @{
+ */
+ /**
+  * @file
+  */
+#ifndef _KBD_KEYS_H_
+#define _KBD_KEYS_H_
+#define KBD_PUSHCHAR    1024
+#define KBD_MS_LEFT     1025
+#define KBD_MS_RIGHT    1026
+#define KBD_MS_MIDDLE   1027
+#define KBD_MS_MOVE     1028
+#define KBD_KEY_F1  0x3b
+#define KBD_KEY_F2  0x3c
+#define KBD_KEY_F3  0x3d
+#define KBD_KEY_F4  0x3e
+#define KBD_KEY_F5  0x3f
+#define KBD_KEY_F6  0x40
+#define KBD_KEY_F7  0x41
+#define KBD_KEY_F8  0x42
+#define KBD_KEY_F9  0x43
+#define KBD_KEY_F10 0x44
+#define KBD_KEY_F11 0x45
+#define KBD_KEY_F12 0x46
+#endif
+/** @}
+*/

 /tags/0.2.0.2/uspace/kbd/include/kbd.h
 ,0 → 1,50
+/*
+ * Copyright (C) 2006 Josef Cejka
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/** @addtogroup kbdgen generic
+ * @brief   HelenOS generic uspace keyboard handler.
+ * @ingroup  kbd
+ * @{
+ */
+/** @file
+ */
+#ifndef __KBD_H__
+#define __KBD_H__
+#include <key_buffer.h>
+int kbd_arch_process(keybuffer_t *keybuffer, ipc_call_t *call);
+int mouse_arch_process(int phoneid, ipc_call_t *call);
+#endif
+/**
+ * @}
+ */

 /tags/0.2.0.2/uspace/kbd/include/key_buffer.h
 ,0 → 1,64
+/*
+ * Copyright (C) 2006 Josef Cejka
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/** @addtogroup kbdgen
+ * @brief   HelenOS generic uspace keyboard handler.
+ * @ingroup  kbd
+ * @{
+ */
+/** @file
+ */
+#ifndef __KEY_BUFFER_H__
+#define __KEY_BUFFER_H__
+#include <types.h>
+/** Size of buffer for pressed keys */
+#define KEYBUFFER_SIZE 128
+typedef struct {
+    int fifo[KEYBUFFER_SIZE];
+    unsigned long head;
+    unsigned long tail;
+    unsigned long items;
+} keybuffer_t;
+void keybuffer_free(keybuffer_t *keybuffer);
+void keybuffer_init(keybuffer_t *keybuffer);
+int keybuffer_available(keybuffer_t *keybuffer);
+int keybuffer_empty(keybuffer_t *keybuffer);
+void keybuffer_push(keybuffer_t *keybuffer, int key);
+int keybuffer_pop(keybuffer_t *keybuffer, int *c);
+#endif
+/**
+ * @}
+ */

 /tags/0.2.0.2/uspace/kbd/Makefile
 ,0 → 1,93
+#
+# Copyright (C) 2005 Martin Decky
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# - Redistributions of source code must retain the above copyright
+#   notice, this list of conditions and the following disclaimer.
+# - Redistributions in binary form must reproduce the above copyright
+#   notice, this list of conditions and the following disclaimer in the
+#   documentation and/or other materials provided with the distribution.
+# - The name of the author may not be used to endorse or promote products
+#   derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+## Setup toolchain
+#
+LIBC_PREFIX = ../libc
+SOFTINT_PREFIX = ../softint
+include $(LIBC_PREFIX)/Makefile.toolchain
+CFLAGS += -Iinclude -I../libadt/include
+LIBS = $(LIBC_PREFIX)/libc.a
+## Sources
+#
+OUTPUT = kbd
+GENERIC_SOURCES = \
+    generic/kbd.c \
+    generic/key_buffer.c
+ARCH_SOURCES = \
+    arch/$(ARCH)/src/kbd.c
+ifeq ($(ARCH), ia32)
+    ARCH_SOURCES += arch/$(ARCH)/src/mouse.c
+    CFLAGS += -DMOUSE_ENABLED
+endif
+ifeq ($(ARCH), amd64)
+    ARCH_SOURCES += arch/$(ARCH)/src/mouse.c
+    CFLAGS += -DMOUSE_ENABLED
+endif
+GENERIC_OBJECTS := $(addsuffix .o,$(basename $(GENERIC_SOURCES)))
+ARCH_OBJECTS := $(addsuffix .o,$(basename $(ARCH_SOURCES)))
+.PHONY: all clean depend disasm links
+all: links $(OUTPUT) disasm
+-include Makefile.depend
+links:
+    ln -sfn ../arch/$(ARCH)/include include/arch
+clean:
+    -rm -f $(OUTPUT) $(OUTPUT).map $(OUTPUT).disasm Makefile.depend include/arch
+depend:
+    $(CC) $(DEFS) $(CFLAGS) -M $(SOURCES) > Makefile.depend
+$(OUTPUT): $(ARCH_OBJECTS) $(GENERIC_OBJECTS) $(LIBS)
+    $(LD) -T $(LIBC_PREFIX)/arch/$(ARCH)/_link.ld -e __entry_driver $(GENERIC_OBJECTS) $(ARCH_OBJECTS) $(LIBS) $(LFLAGS) -o $@ -Map $(OUTPUT).map
+disasm:
+    $(OBJDUMP) -d $(OUTPUT) >$(OUTPUT).disasm
+%.o: %.S
+    $(CC) $(DEFS) $(AFLAGS) $(CFLAGS) -D__ASM__ -c $< -o $@
+%.o: %.s
+    $(AS) $(AFLAGS) $< -o $@
+%.o: %.c
+    $(CC) $(DEFS) $(CFLAGS) -c $< -o $@

 /tags/0.2.0.2/uspace/softfloat/generic/other.c
 ,0 → 1,37
+/*
+ * Copyright (C) 2005 Josef Cejka
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/** @addtogroup softfloat
+ * @{
+ */
+/** @file
+ */
+/** @}
+ */

 /tags/0.2.0.2/uspace/softfloat/generic/softfloat.c
 ,0 → 1,499
+/*
+ * Copyright (C) 2005 Josef Cejka
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/** @addtogroup softfloat generic
+ * @ingroup sfl
+ * @brief Architecture independent parts of FPU software emulation library.
+ * @{
+ */
+/** @file
+ */
+#include<softfloat.h>
+#include<sftypes.h>
+#include<add.h>
+#include<sub.h>
+#include<mul.h>
+#include<div.h>
+#include<conversion.h>
+#include<comparison.h>
+#include<other.h>
+#include<functions.h>
+/* Arithmetic functions */
+float __addsf3(float a, float b)
+{
+    float32 fa, fb;
+    fa.f = a;
+    fb.f = b;
+    if (fa.parts.sign != fb.parts.sign) {
+        if (fa.parts.sign) {
+            fa.parts.sign = 0;
+            return subFloat32(fb, fa).f;
+        };
+        fb.parts.sign = 0;
+        return subFloat32(fa, fb).f;
+    }
+    return addFloat32(fa, fb).f;
+}
+double __adddf3(double a, double b)
+{
+    float64 da, db;
+    da.d = a;
+    db.d = b;
+    if (da.parts.sign != db.parts.sign) {
+        if (da.parts.sign) {
+            da.parts.sign = 0;
+            return subFloat64(db, da).d;
+        };
+        db.parts.sign = 0;
+        return subFloat64(da, db).d;
+    }
+    return addFloat64(da, db).d;
+}
+float __subsf3(float a, float b)
+{
+    float32 fa, fb;
+    fa.f = a;
+    fb.f = b;
+    if (fa.parts.sign != fb.parts.sign) {
+        fb.parts.sign = !fb.parts.sign;
+        return addFloat32(fa, fb).f;
+    }
+    return subFloat32(fa, fb).f;
+}
+double __subdf3(double a, double b)
+{
+    float64 da, db;
+    da.d = a;
+    db.d = b;
+    if (da.parts.sign != db.parts.sign) {
+        db.parts.sign = !db.parts.sign;
+        return addFloat64(da, db).d;
+    }
+    return subFloat64(da, db).d;
+}
+float __mulsf3(float a, float b)
+{
+    float32 fa, fb;
+    fa.f = a;
+    fb.f = b;
+    return  mulFloat32(fa, fb).f;
+}
+double __muldf3(double a, double b)
+{
+    float64 da, db;
+    da.d = a;
+    db.d = b;
+    return  mulFloat64(da, db).d;
+}
+float __divsf3(float a, float b)
+{
+    float32 fa, fb;
+    fa.f = a;
+    fb.f = b;
+    return  divFloat32(fa, fb).f;
+}
+double __divdf3(double a, double b)
+{
+    float64 da, db;
+    da.d = a;
+    db.d = b;
+    return  divFloat64(da, db).d;
+}
+float __negsf2(float a)
+{
+    float32 fa;
+    fa.f = a;
+    fa.parts.sign = !fa.parts.sign;
+    return fa.f;
+}
+double __negdf2(double a)
+{
+    float64 fa;
+    fa.d = a;
+    fa.parts.sign = !fa.parts.sign;
+    return fa.d;
+}
+/* Conversion functions */
+double __extendsfdf2(float a)
+{
+    float32 fa;
+    fa.f = a;
+    return convertFloat32ToFloat64(fa).d;
+}
+float __truncdfsf2(double a)
+{
+    float64 da;
+    da.d = a;
+    return convertFloat64ToFloat32(da).f;
+}
+int __fixsfsi(float a)
+{
+    float32 fa;
+    fa.f = a;
+    return float32_to_int(fa);
+}
+int __fixdfsi(double a)
+{
+    float64 da;
+    da.d = a;
+    return float64_to_int(da);
+}
+long __fixsfdi(float a)
+{
+    float32 fa;
+    fa.f = a;
+    return float32_to_long(fa);
+}
+long __fixdfdi(double a)
+{
+    float64 da;
+    da.d = a;
+    return float64_to_long(da);
+}
+long long __fixsfti(float a)
+{
+    float32 fa;
+    fa.f = a;
+    return float32_to_longlong(fa);
+}
+long long __fixdfti(double a)
+{
+    float64 da;
+    da.d = a;
+    return float64_to_longlong(da);
+}
+unsigned int __fixunssfsi(float a)
+{
+    float32 fa;
+    fa.f = a;
+    return float32_to_uint(fa);
+}
+unsigned int __fixunsdfsi(double a)
+{
+    float64 da;
+    da.d = a;
+    return float64_to_uint(da);
+}
+unsigned long __fixunssfdi(float a)
+{
+    float32 fa;
+    fa.f = a;
+    return float32_to_ulong(fa);
+}
+unsigned long __fixunsdfdi(double a)
+{
+    float64 da;
+    da.d = a;
+    return float64_to_ulong(da);
+}
+unsigned long long __fixunssfti(float a)
+{
+    float32 fa;
+    fa.f = a;
+    return float32_to_ulonglong(fa);
+}
+unsigned long long __fixunsdfti(double a)
+{
+    float64 da;
+    da.d = a;
+    return float64_to_ulonglong(da);
+}
+float __floatsisf(int i)
+{
+    float32 fa;
+    fa = int_to_float32(i);
+    return fa.f;
+}
+double __floatsidf(int i)
+{
+    float64 da;
+    da = int_to_float64(i);
+    return da.d;
+}
+float __floatdisf(long i)
+{
+    float32 fa;
+    fa = long_to_float32(i);
+    return fa.f;
+}
+double __floatdidf(long i)
+{
+    float64 da;
+    da = long_to_float64(i);
+    return da.d;
+}
+float __floattisf(long long i)
+{
+    float32 fa;
+    fa = longlong_to_float32(i);
+    return fa.f;
+}
+double __floattidf(long long i)
+{
+    float64 da;
+    da = longlong_to_float64(i);
+    return da.d;
+}
+float __floatunsisf(unsigned int i)
+{
+    float32 fa;
+    fa = uint_to_float32(i);
+    return fa.f;
+}
+double __floatunsidf(unsigned int i)
+{
+    float64 da;
+    da = uint_to_float64(i);
+    return da.d;
+}
+float __floatundisf(unsigned long i)
+{
+    float32 fa;
+    fa = ulong_to_float32(i);
+    return fa.f;
+}
+double __floatundidf(unsigned long i)
+{
+    float64 da;
+    da = ulong_to_float64(i);
+    return da.d;
+}
+float __floatuntisf(unsigned long long i)
+{
+    float32 fa;
+    fa = ulonglong_to_float32(i);
+    return fa.f;
+}
+double __floatuntidf(unsigned long long i)
+{
+    float64 da;
+    da = ulonglong_to_float64(i);
+    return da.d;
+}
+/* Comparison functions */
+/* Comparison functions */
+/* a<b .. -1
+ * a=b ..  0
+ * a>b ..  1
+ * */
+int __cmpsf2(float a, float b)
+{
+    float32 fa, fb;
+    fa.f = a;
+    fb.f = b;
+    if ( (isFloat32NaN(fa)) || (isFloat32NaN(fb)) ) {
+        return 1; /* no special constant for unordered - maybe signaled? */
+    };
+    if (isFloat32eq(fa, fb)) {
+        return 0;
+    };
+    if (isFloat32lt(fa, fb)) {
+        return -1;
+        };
+    return 1;
+}
+int __unordsf2(float a, float b)
+{
+    float32 fa, fb;
+    fa.f = a;
+    fb.f = b;
+    return ( (isFloat32NaN(fa)) || (isFloat32NaN(fb)) );
+}
+/**
+ * @return zero, if neither argument is a NaN and are equal
+ * */
+int __eqsf2(float a, float b)
+{
+    float32 fa, fb;
+    fa.f = a;
+    fb.f = b;
+    if ( (isFloat32NaN(fa)) || (isFloat32NaN(fb)) ) {
+        /* TODO: sigNaNs*/
+        return 1;
+        };
+    return isFloat32eq(fa, fb) - 1;
+}
+/* strange behavior, but it was in gcc documentation */
+int __nesf2(float a, float b)
+{
+    return __eqsf2(a, b);
+}
+/* return value >= 0 if a>=b and neither is NaN */
+int __gesf2(float a, float b)
+{
+    float32 fa, fb;
+    fa.f = a;
+    fb.f = b;
+    if ( (isFloat32NaN(fa)) || (isFloat32NaN(fb)) ) {
+        /* TODO: sigNaNs*/
+        return -1;
+        };
+    if (isFloat32eq(fa, fb)) {
+        return 0;
+    };
+    if (isFloat32gt(fa, fb)) {
+        return 1;
+        };
+    return -1;
+}
+/** Return negative value, if a<b and neither is NaN*/
+int __ltsf2(float a, float b)
+{
+    float32 fa, fb;
+    fa.f = a;
+    fb.f = b;
+    if ( (isFloat32NaN(fa)) || (isFloat32NaN(fb)) ) {
+        /* TODO: sigNaNs*/
+        return 1;
+        };
+    if (isFloat32lt(fa, fb)) {
+        return -1;
+        };
+    return 0;
+}
+/* return value <= 0 if a<=b and neither is NaN */
+int __lesf2(float a, float b)
+{
+    float32 fa, fb;
+    fa.f = a;
+    fb.f = b;
+    if ( (isFloat32NaN(fa)) || (isFloat32NaN(fb)) ) {
+        /* TODO: sigNaNs*/
+        return 1;
+        };
+    if (isFloat32eq(fa, fb)) {
+        return 0;
+    };
+    if (isFloat32lt(fa, fb)) {
+        return -1;
+        };
+    return 1;
+}
+/** Return positive value, if a>b and neither is NaN*/
+int __gtsf2(float a, float b)
+{
+    float32 fa, fb;
+    fa.f = a;
+    fb.f = b;
+    if ( (isFloat32NaN(fa)) || (isFloat32NaN(fb)) ) {
+        /* TODO: sigNaNs*/
+        return -1;
+        };
+    if (isFloat32gt(fa, fb)) {
+        return 1;
+        };
+    return 0;
+}
+/* Other functions */
+float __powisf2(float a, int b)
+{
+/* TODO: */
+    float32 fa;
+    fa.binary = FLOAT32_NAN;
+    return fa.f;
+}
+/** @}
+ */

 /tags/0.2.0.2/uspace/softfloat/generic/div.c
 ,0 → 1,364
+/*
+ * Copyright (C) 2005 Josef Cejka
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/** @addtogroup softfloat
+ * @{
+ */
+/** @file
+ */
+#include<sftypes.h>
+#include<add.h>
+#include<div.h>
+#include<comparison.h>
+#include<mul.h>
+#include<common.h>
+float32 divFloat32(float32 a, float32 b)
+{
+    float32 result;
+    int32_t aexp, bexp, cexp;
+    uint64_t afrac, bfrac, cfrac;
+    result.parts.sign = a.parts.sign ^ b.parts.sign;
+    if (isFloat32NaN(a)) {
+        if (isFloat32SigNaN(a)) {
+            /*FIXME: SigNaN*/
+        }
+        /*NaN*/
+        return a;
+    }
+    if (isFloat32NaN(b)) {
+        if (isFloat32SigNaN(b)) {
+            /*FIXME: SigNaN*/
+        }
+        /*NaN*/
+        return b;
+    }
+    if (isFloat32Infinity(a)) {
+        if (isFloat32Infinity(b)) {
+            /*FIXME: inf / inf */
+            result.binary = FLOAT32_NAN;
+            return result;
+        }
+        /* inf / num */
+        result.parts.exp = a.parts.exp;
+        result.parts.fraction = a.parts.fraction;
+        return result;
+    }
+    if (isFloat32Infinity(b)) {
+        if (isFloat32Zero(a)) {
+            /* FIXME 0 / inf */
+            result.parts.exp = 0;
+            result.parts.fraction = 0;
+            return result;
+        }
+        /* FIXME: num / inf*/
+        result.parts.exp = 0;
+        result.parts.fraction = 0;
+        return result;
+    }
+    if (isFloat32Zero(b)) {
+        if (isFloat32Zero(a)) {
+            /*FIXME: 0 / 0*/
+            result.binary = FLOAT32_NAN;
+            return result;
+        }
+        /* FIXME: division by zero */
+        result.parts.exp = 0;
+        result.parts.fraction = 0;
+        return result;
+    }
+    afrac = a.parts.fraction;
+    aexp = a.parts.exp;
+    bfrac = b.parts.fraction;
+    bexp = b.parts.exp;
+    /* denormalized numbers */
+    if (aexp == 0) {
+        if (afrac == 0) {
+        result.parts.exp = 0;
+        result.parts.fraction = 0;
+        return result;
+        }
+        /* normalize it*/
+        afrac <<= 1;
+            /* afrac is nonzero => it must stop */
+        while (! (afrac & FLOAT32_HIDDEN_BIT_MASK) ) {
+            afrac <<= 1;
+            aexp--;
+        }
+    }
+    if (bexp == 0) {
+        bfrac <<= 1;
+            /* bfrac is nonzero => it must stop */
+        while (! (bfrac & FLOAT32_HIDDEN_BIT_MASK) ) {
+            bfrac <<= 1;
+            bexp--;
+        }
+    }
+    afrac = (afrac | FLOAT32_HIDDEN_BIT_MASK ) << (32 - FLOAT32_FRACTION_SIZE - 1 );
+    bfrac = (bfrac | FLOAT32_HIDDEN_BIT_MASK ) << (32 - FLOAT32_FRACTION_SIZE );
+    if ( bfrac <= (afrac << 1) ) {
+        afrac >>= 1;
+        aexp++;
+    }
+    cexp = aexp - bexp + FLOAT32_BIAS - 2;
+    cfrac = (afrac << 32) / bfrac;
+    if ((  cfrac & 0x3F ) == 0) {
+        cfrac |= ( bfrac * cfrac != afrac << 32 );
+    }
+    /* pack and round */
+    /* find first nonzero digit and shift result and detect possibly underflow */
+    while ((cexp > 0) && (cfrac) && (!(cfrac & (FLOAT32_HIDDEN_BIT_MASK << 7 )))) {
+        cexp--;
+        cfrac <<= 1;
+            /* TODO: fix underflow */
+    };
+    cfrac += (0x1 << 6); /* FIXME: 7 is not sure*/
+    if (cfrac & (FLOAT32_HIDDEN_BIT_MASK << 7)) {
+        ++cexp;
+        cfrac >>= 1;
+        }
+    /* check overflow */
+    if (cexp >= FLOAT32_MAX_EXPONENT ) {
+        /* FIXME: overflow, return infinity */
+        result.parts.exp = FLOAT32_MAX_EXPONENT;
+        result.parts.fraction = 0;
+        return result;
+    }
+    if (cexp < 0) {
+        /* FIXME: underflow */
+        result.parts.exp = 0;
+        if ((cexp + FLOAT32_FRACTION_SIZE) < 0) {
+            result.parts.fraction = 0;
+            return result;
+        }
+        cfrac >>= 1;
+        while (cexp < 0) {
+            cexp ++;
+            cfrac >>= 1;
+        }
+    } else {
+        result.parts.exp = (uint32_t)cexp;
+    }
+    result.parts.fraction = ((cfrac >> 6) & (~FLOAT32_HIDDEN_BIT_MASK));
+    return result;
+}
+float64 divFloat64(float64 a, float64 b)
+{
+    float64 result;
+    int64_t aexp, bexp, cexp;
+    uint64_t afrac, bfrac, cfrac;
+    uint64_t remlo, remhi;
+    result.parts.sign = a.parts.sign ^ b.parts.sign;
+    if (isFloat64NaN(a)) {
+        if (isFloat64SigNaN(b)) {
+            /*FIXME: SigNaN*/
+            return b;
+        }
+        if (isFloat64SigNaN(a)) {
+            /*FIXME: SigNaN*/
+        }
+        /*NaN*/
+        return a;
+    }
+    if (isFloat64NaN(b)) {
+        if (isFloat64SigNaN(b)) {
+            /*FIXME: SigNaN*/
+        }
+        /*NaN*/
+        return b;
+    }
+    if (isFloat64Infinity(a)) {
+        if (isFloat64Infinity(b) || isFloat64Zero(b)) {
+            /*FIXME: inf / inf */
+            result.binary = FLOAT64_NAN;
+            return result;
+        }
+        /* inf / num */
+        result.parts.exp = a.parts.exp;
+        result.parts.fraction = a.parts.fraction;
+        return result;
+    }
+    if (isFloat64Infinity(b)) {
+        if (isFloat64Zero(a)) {
+            /* FIXME 0 / inf */
+            result.parts.exp = 0;
+            result.parts.fraction = 0;
+            return result;
+        }
+        /* FIXME: num / inf*/
+        result.parts.exp = 0;
+        result.parts.fraction = 0;
+        return result;
+    }
+    if (isFloat64Zero(b)) {
+        if (isFloat64Zero(a)) {
+            /*FIXME: 0 / 0*/
+            result.binary = FLOAT64_NAN;
+            return result;
+        }
+        /* FIXME: division by zero */
+        result.parts.exp = 0;
+        result.parts.fraction = 0;
+        return result;
+    }
+    afrac = a.parts.fraction;
+    aexp = a.parts.exp;
+    bfrac = b.parts.fraction;
+    bexp = b.parts.exp;
+    /* denormalized numbers */
+    if (aexp == 0) {
+        if (afrac == 0) {
+            result.parts.exp = 0;
+            result.parts.fraction = 0;
+            return result;
+        }
+        /* normalize it*/
+        aexp++;
+            /* afrac is nonzero => it must stop */
+        while (! (afrac & FLOAT64_HIDDEN_BIT_MASK) ) {
+            afrac <<= 1;
+            aexp--;
+        }
+    }
+    if (bexp == 0) {
+        bexp++;
+            /* bfrac is nonzero => it must stop */
+        while (! (bfrac & FLOAT64_HIDDEN_BIT_MASK) ) {
+            bfrac <<= 1;
+            bexp--;
+        }
+    }
+    afrac = (afrac | FLOAT64_HIDDEN_BIT_MASK ) << (64 - FLOAT64_FRACTION_SIZE - 2 );
+    bfrac = (bfrac | FLOAT64_HIDDEN_BIT_MASK ) << (64 - FLOAT64_FRACTION_SIZE - 1);
+    if ( bfrac <= (afrac << 1) ) {
+        afrac >>= 1;
+        aexp++;
+    }
+    cexp = aexp - bexp + FLOAT64_BIAS - 2;
+    cfrac = divFloat64estim(afrac, bfrac);
+    if ((  cfrac & 0x1FF ) <= 2) { /*FIXME:?? */
+        mul64integers( bfrac, cfrac, &remlo, &remhi);
+        /* (__u128)afrac << 64 - ( ((__u128)remhi<<64) + (__u128)remlo )*/
+        remhi = afrac - remhi - ( remlo > 0);
+        remlo = - remlo;
+        while ((int64_t) remhi < 0) {
+            cfrac--;
+            remlo += bfrac;
+            remhi += ( remlo < bfrac );
+        }
+        cfrac |= ( remlo != 0 );
+    }
+    /* round and shift */
+    result = finishFloat64(cexp, cfrac, result.parts.sign);
+    return result;
+}
+uint64_t divFloat64estim(uint64_t a, uint64_t b)
+{
+    uint64_t bhi;
+    uint64_t remhi, remlo;
+    uint64_t result;
+    if ( b <= a ) {
+        return 0xFFFFFFFFFFFFFFFFull;
+    }
+    bhi = b >> 32;
+    result = ((bhi << 32) <= a) ?( 0xFFFFFFFFull << 32) : ( a / bhi) << 32;
+    mul64integers(b, result, &remlo, &remhi);
+    remhi = a - remhi - (remlo > 0);
+    remlo = - remlo;
+    b <<= 32;
+    while ( (int64_t) remhi < 0 ) {
+            result -= 0x1ll << 32;
+            remlo += b;
+            remhi += bhi + ( remlo < b );
+        }
+    remhi = (remhi << 32) | (remlo >> 32);
+    if (( bhi << 32) <= remhi) {
+        result |= 0xFFFFFFFF;
+    } else {
+        result |= remhi / bhi;
+    }
+    return result;
+}
+/** @}
+ */

 /tags/0.2.0.2/uspace/softfloat/generic/conversion.c
 ,0 → 1,593
+/*
+ * Copyright (C) 2005 Josef Cejka
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/** @addtogroup softfloat
+ * @{
+ */
+/** @file
+ */
+#include "sftypes.h"
+#include "conversion.h"
+#include "comparison.h"
+#include "common.h"
+float64 convertFloat32ToFloat64(float32 a)
+{
+    float64 result;
+    uint64_t frac;
+    result.parts.sign = a.parts.sign;
+    result.parts.fraction = a.parts.fraction;
+    result.parts.fraction <<= (FLOAT64_FRACTION_SIZE - FLOAT32_FRACTION_SIZE );
+    if ((isFloat32Infinity(a))||(isFloat32NaN(a))) {
+        result.parts.exp = 0x7FF;
+        /* TODO; check if its correct for SigNaNs*/
+        return result;
+    };
+    result.parts.exp = a.parts.exp + ( (int)FLOAT64_BIAS - FLOAT32_BIAS );
+    if (a.parts.exp == 0) {
+        /* normalize denormalized numbers */
+        if (result.parts.fraction == 0ll) { /* fix zero */
+            result.parts.exp = 0ll;
+            return result;
+        }
+        frac = result.parts.fraction;
+        while (!(frac & (0x10000000000000ll))) {
+            frac <<= 1;
+            --result.parts.exp;
+        };
+        ++result.parts.exp;
+        result.parts.fraction = frac;
+    };
+    return result;
+}
+float32 convertFloat64ToFloat32(float64 a)
+{
+    float32 result;
+    int32_t exp;
+    uint64_t frac;
+    result.parts.sign = a.parts.sign;
+    if (isFloat64NaN(a)) {
+        result.parts.exp = 0xFF;
+        if (isFloat64SigNaN(a)) {
+            result.parts.fraction = 0x400000; /* set first bit of fraction nonzero */
+            return result;
+        }
+        result.parts.fraction = 0x1; /* fraction nonzero but its first bit is zero */
+        return result;
+    };
+    if (isFloat64Infinity(a)) {
+        result.parts.fraction = 0;
+        result.parts.exp = 0xFF;
+        return result;
+    };
+    exp = (int)a.parts.exp - FLOAT64_BIAS + FLOAT32_BIAS;
+    if (exp >= 0xFF) {
+        /*FIXME: overflow*/
+        result.parts.fraction = 0;
+        result.parts.exp = 0xFF;
+        return result;
+    } else if (exp <= 0 ) {
+        /* underflow or denormalized */
+        result.parts.exp = 0;
+        exp *= -1;
+        if (exp > FLOAT32_FRACTION_SIZE ) {
+            /* FIXME: underflow */
+            result.parts.fraction = 0;
+            return result;
+        };
+        /* denormalized */
+        frac = a.parts.fraction;
+        frac |= 0x10000000000000ll; /* denormalize and set hidden bit */
+        frac >>= (FLOAT64_FRACTION_SIZE - FLOAT32_FRACTION_SIZE + 1);
+        while (exp > 0) {
+            --exp;
+            frac >>= 1;
+        };
+        result.parts.fraction = frac;
+        return result;
+    };
+    result.parts.exp = exp;
+    result.parts.fraction = a.parts.fraction >> (FLOAT64_FRACTION_SIZE - FLOAT32_FRACTION_SIZE);
+    return result;
+}
+/** Helping procedure for converting float32 to uint32
+ * @param a floating point number in normalized form (no NaNs or Inf are checked )
+ * @return unsigned integer
+ */
+static uint32_t _float32_to_uint32_helper(float32 a)
+{
+    uint32_t frac;
+    if (a.parts.exp < FLOAT32_BIAS) {
+        /*TODO: rounding*/
+        return 0;
+    }
+    frac = a.parts.fraction;
+    frac |= FLOAT32_HIDDEN_BIT_MASK;
+    /* shift fraction to left so hidden bit will be the most significant bit */
+    frac <<= 32 - FLOAT32_FRACTION_SIZE - 1;
+    frac >>= 32 - (a.parts.exp - FLOAT32_BIAS) - 1;
+    if ((a.parts.sign == 1) && (frac != 0)) {
+        frac = ~frac;
+        ++frac;
+    }
+    return frac;
+}
+/* Convert float to unsigned int32
+ * FIXME: Im not sure what to return if overflow/underflow happens
+ *  - now its the biggest or the smallest int
+ */
+uint32_t float32_to_uint32(float32 a)
+{
+    if (isFloat32NaN(a)) {
+        return MAX_UINT32;
+    }
+    if (isFloat32Infinity(a) || (a.parts.exp >= (32 + FLOAT32_BIAS)))  {
+        if (a.parts.sign) {
+            return MIN_UINT32;
+        }
+        return MAX_UINT32;
+    }
+    return _float32_to_uint32_helper(a);
+}
+/* Convert float to signed int32
+ * FIXME: Im not sure what to return if overflow/underflow happens
+ *  - now its the biggest or the smallest int
+ */
+int32_t float32_to_int32(float32 a)
+{
+    if (isFloat32NaN(a)) {
+        return MAX_INT32;
+    }
+    if (isFloat32Infinity(a) || (a.parts.exp >= (32 + FLOAT32_BIAS)))  {
+        if (a.parts.sign) {
+            return MIN_INT32;
+        }
+        return MAX_INT32;
+    }
+    return _float32_to_uint32_helper(a);
+}
+/** Helping procedure for converting float64 to uint64
+ * @param a floating point number in normalized form (no NaNs or Inf are checked )
+ * @return unsigned integer
+ */
+static uint64_t _float64_to_uint64_helper(float64 a)
+{
+    uint64_t frac;
+    if (a.parts.exp < FLOAT64_BIAS) {
+        /*TODO: rounding*/
+        return 0;
+    }
+    frac = a.parts.fraction;
+    frac |= FLOAT64_HIDDEN_BIT_MASK;
+    /* shift fraction to left so hidden bit will be the most significant bit */
+    frac <<= 64 - FLOAT64_FRACTION_SIZE - 1;
+    frac >>= 64 - (a.parts.exp - FLOAT64_BIAS) - 1;
+    if ((a.parts.sign == 1) && (frac != 0)) {
+        frac = ~frac;
+        ++frac;
+    }
+    return frac;
+}
+/* Convert float to unsigned int64
+ * FIXME: Im not sure what to return if overflow/underflow happens
+ *  - now its the biggest or the smallest int
+ */
+uint64_t float64_to_uint64(float64 a)
+{
+    if (isFloat64NaN(a)) {
+        return MAX_UINT64;
+    }
+    if (isFloat64Infinity(a) || (a.parts.exp >= (64 + FLOAT64_BIAS)))  {
+        if (a.parts.sign) {
+            return MIN_UINT64;
+        }
+        return MAX_UINT64;
+    }
+    return _float64_to_uint64_helper(a);
+}
+/* Convert float to signed int64
+ * FIXME: Im not sure what to return if overflow/underflow happens
+ *  - now its the biggest or the smallest int
+ */
+int64_t float64_to_int64(float64 a)
+{
+    if (isFloat64NaN(a)) {
+        return MAX_INT64;
+    }
+    if (isFloat64Infinity(a) || (a.parts.exp >= (64 + FLOAT64_BIAS)))  {
+        if (a.parts.sign) {
+            return MIN_INT64;
+        }
+        return MAX_INT64;
+    }
+    return _float64_to_uint64_helper(a);
+}
+/** Helping procedure for converting float32 to uint64
+ * @param a floating point number in normalized form (no NaNs or Inf are checked )
+ * @return unsigned integer
+ */
+static uint64_t _float32_to_uint64_helper(float32 a)
+{
+    uint64_t frac;
+    if (a.parts.exp < FLOAT32_BIAS) {
+        /*TODO: rounding*/
+        return 0;
+    }
+    frac = a.parts.fraction;
+    frac |= FLOAT32_HIDDEN_BIT_MASK;
+    /* shift fraction to left so hidden bit will be the most significant bit */
+    frac <<= 64 - FLOAT32_FRACTION_SIZE - 1;
+    frac >>= 64 - (a.parts.exp - FLOAT32_BIAS) - 1;
+    if ((a.parts.sign == 1) && (frac != 0)) {
+        frac = ~frac;
+        ++frac;
+    }
+    return frac;
+}
+/* Convert float to unsigned int64
+ * FIXME: Im not sure what to return if overflow/underflow happens
+ *  - now its the biggest or the smallest int
+ */
+uint64_t float32_to_uint64(float32 a)
+{
+    if (isFloat32NaN(a)) {
+        return MAX_UINT64;
+    }
+    if (isFloat32Infinity(a) || (a.parts.exp >= (64 + FLOAT32_BIAS)))  {
+        if (a.parts.sign) {
+            return MIN_UINT64;
+        }
+        return MAX_UINT64;
+    }
+    return _float32_to_uint64_helper(a);
+}
+/* Convert float to signed int64
+ * FIXME: Im not sure what to return if overflow/underflow happens
+ *  - now its the biggest or the smallest int
+ */
+int64_t float32_to_int64(float32 a)
+{
+    if (isFloat32NaN(a)) {
+        return MAX_INT64;
+    }
+    if (isFloat32Infinity(a) || (a.parts.exp >= (64 + FLOAT32_BIAS)))  {
+        if (a.parts.sign) {
+            return (MIN_INT64);
+        }
+        return MAX_INT64;
+    }
+    return _float32_to_uint64_helper(a);
+}
+/* Convert float64 to unsigned int32
+ * FIXME: Im not sure what to return if overflow/underflow happens
+ *  - now its the biggest or the smallest int
+ */
+uint32_t float64_to_uint32(float64 a)
+{
+    if (isFloat64NaN(a)) {
+        return MAX_UINT32;
+    }
+    if (isFloat64Infinity(a) || (a.parts.exp >= (32 + FLOAT64_BIAS)))  {
+        if (a.parts.sign) {
+            return MIN_UINT32;
+        }
+        return MAX_UINT32;
+    }
+    return (uint32_t)_float64_to_uint64_helper(a);
+}
+/* Convert float64 to signed int32
+ * FIXME: Im not sure what to return if overflow/underflow happens
+ *  - now its the biggest or the smallest int
+ */
+int32_t float64_to_int32(float64 a)
+{
+    if (isFloat64NaN(a)) {
+        return MAX_INT32;
+    }
+    if (isFloat64Infinity(a) || (a.parts.exp >= (32 + FLOAT64_BIAS)))  {
+        if (a.parts.sign) {
+            return MIN_INT32;
+        }
+        return MAX_INT32;
+    }
+    return (int32_t)_float64_to_uint64_helper(a);
+}
+/** Convert unsigned integer to float32
+ *
+ *
+ */
+float32 uint32_to_float32(uint32_t i)
+{
+    int counter;
+    int32_t exp;
+    float32 result;
+    result.parts.sign = 0;
+    result.parts.fraction = 0;
+    counter = countZeroes32(i);
+    exp = FLOAT32_BIAS + 32 - counter - 1;
+    if (counter == 32) {
+        result.binary = 0;
+        return result;
+    }
+    if (counter > 0) {
+        i <<= counter - 1;
+    } else {
+        i >>= 1;
+    }
+    roundFloat32(&exp, &i);
+    result.parts.fraction = i >> 7;
+    result.parts.exp = exp;
+    return result;
+}
+float32 int32_to_float32(int32_t i)
+{
+    float32 result;
+    if (i < 0) {
+        result = uint32_to_float32((uint32_t)(-i));
+    } else {
+        result = uint32_to_float32((uint32_t)i);
+    }
+    result.parts.sign = i < 0;
+    return result;
+}
+float32 uint64_to_float32(uint64_t i)
+{
+    int counter;
+    int32_t exp;
+    uint32_t j;
+    float32 result;
+    result.parts.sign = 0;
+    result.parts.fraction = 0;
+    counter = countZeroes64(i);
+    exp = FLOAT32_BIAS + 64 - counter - 1;
+    if (counter == 64) {
+        result.binary = 0;
+        return result;
+    }
+    /* Shift all to the first 31 bits (31. will be hidden 1)*/
+    if (counter > 33) {
+        i <<= counter - 1 - 32;
+    } else {
+        i >>= 1 + 32 - counter;
+    }
+    j = (uint32_t)i;
+    roundFloat32(&exp, &j);
+    result.parts.fraction = j >> 7;
+    result.parts.exp = exp;
+    return result;
+}
+float32 int64_to_float32(int64_t i)
+{
+    float32 result;
+    if (i < 0) {
+        result = uint64_to_float32((uint64_t)(-i));
+    } else {
+        result = uint64_to_float32((uint64_t)i);
+    }
+    result.parts.sign = i < 0;
+    return result;
+}
+/** Convert unsigned integer to float64
+ *
+ *
+ */
+float64 uint32_to_float64(uint32_t i)
+{
+    int counter;
+    int32_t exp;
+    float64 result;
+    uint64_t frac;
+    result.parts.sign = 0;
+    result.parts.fraction = 0;
+    counter = countZeroes32(i);
+    exp = FLOAT64_BIAS + 32 - counter - 1;
+    if (counter == 32) {
+        result.binary = 0;
+        return result;
+    }
+    frac = i;
+    frac <<= counter + 32 - 1;
+    roundFloat64(&exp, &frac);
+    result.parts.fraction = frac >> 10;
+    result.parts.exp = exp;
+    return result;
+}
+float64 int32_to_float64(int32_t i)
+{
+    float64 result;
+    if (i < 0) {
+        result = uint32_to_float64((uint32_t)(-i));
+    } else {
+        result = uint32_to_float64((uint32_t)i);
+    }
+    result.parts.sign = i < 0;
+    return result;
+}
+float64 uint64_to_float64(uint64_t i)
+{
+    int counter;
+    int32_t exp;
+    float64 result;
+    result.parts.sign = 0;
+    result.parts.fraction = 0;
+    counter = countZeroes64(i);
+    exp = FLOAT64_BIAS + 64 - counter - 1;
+    if (counter == 64) {
+        result.binary = 0;
+        return result;
+    }
+    if (counter > 0) {
+        i <<= counter - 1;
+    } else {
+        i >>= 1;
+    }
+    roundFloat64(&exp, &i);
+    result.parts.fraction = i >> 10;
+    result.parts.exp = exp;
+    return result;
+}
+float64 int64_to_float64(int64_t i)
+{
+    float64 result;
+    if (i < 0) {
+        result = uint64_to_float64((uint64_t)(-i));
+    } else {
+        result = uint64_to_float64((uint64_t)i);
+    }
+    result.parts.sign = i < 0;
+    return result;
+}
+/** @}
+ */

 /tags/0.2.0.2/uspace/softfloat/generic/add.c
 ,0 → 1,259
+/*
+ * Copyright (C) 2005 Josef Cejka
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/** @addtogroup softfloat
+ * @{
+ */
+/** @file
+ */
+#include<sftypes.h>
+#include<add.h>
+#include<comparison.h>
+/** Add two Float32 numbers with same signs
+ */
+float32 addFloat32(float32 a, float32 b)
+{
+    int expdiff;
+    uint32_t exp1, exp2,frac1, frac2;
+    expdiff = a.parts.exp - b.parts.exp;
+    if (expdiff < 0) {
+        if (isFloat32NaN(b)) {
+            /* TODO: fix SigNaN */
+            if (isFloat32SigNaN(b)) {
+            };
+            return b;
+        };
+        if (b.parts.exp == FLOAT32_MAX_EXPONENT) {
+            return b;
+        }
+        frac1 = b.parts.fraction;
+        exp1 = b.parts.exp;
+        frac2 = a.parts.fraction;
+        exp2 = a.parts.exp;
+        expdiff *= -1;
+    } else {
+        if ((isFloat32NaN(a)) || (isFloat32NaN(b))) {
+            /* TODO: fix SigNaN */
+            if (isFloat32SigNaN(a) || isFloat32SigNaN(b)) {
+            };
+            return (isFloat32NaN(a)?a:b);
+        };
+        if (a.parts.exp == FLOAT32_MAX_EXPONENT) {
+            return a;
+        }
+        frac1 = a.parts.fraction;
+        exp1 = a.parts.exp;
+        frac2 = b.parts.fraction;
+        exp2 = b.parts.exp;
+    };
+    if (exp1 == 0) {
+        /* both are denormalized */
+        frac1 += frac2;
+        if (frac1 & FLOAT32_HIDDEN_BIT_MASK ) {
+            /* result is not denormalized */
+            a.parts.exp = 1;
+        };
+        a.parts.fraction = frac1;
+        return a;
+    };
+    frac1 |= FLOAT32_HIDDEN_BIT_MASK; /* add hidden bit */
+    if (exp2 == 0) {
+        /* second operand is denormalized */
+        --expdiff;
+    } else {
+        /* add hidden bit to second operand */
+        frac2 |= FLOAT32_HIDDEN_BIT_MASK;
+    };
+    /* create some space for rounding */
+    frac1 <<= 6;
+    frac2 <<= 6;
+    if (expdiff < (FLOAT32_FRACTION_SIZE + 2) ) {
+        frac2 >>= expdiff;
+        frac1 += frac2;
+    } else {
+        a.parts.exp = exp1;
+        a.parts.fraction = (frac1 >> 6) & (~(FLOAT32_HIDDEN_BIT_MASK));
+        return a;
+    }
+    if (frac1 & (FLOAT32_HIDDEN_BIT_MASK << 7) ) {
+        ++exp1;
+        frac1 >>= 1;
+    };
+    /* rounding - if first bit after fraction is set then round up */
+    frac1 += (0x1 << 5);
+    if (frac1 & (FLOAT32_HIDDEN_BIT_MASK << 7)) {
+        /* rounding overflow */
+        ++exp1;
+        frac1 >>= 1;
+    };
+    if ((exp1 == FLOAT32_MAX_EXPONENT ) || (exp2 > exp1)) {
+            /* overflow - set infinity as result */
+            a.parts.exp = FLOAT32_MAX_EXPONENT;
+            a.parts.fraction = 0;
+            return a;
+            }
+    a.parts.exp = exp1;
+    /*Clear hidden bit and shift */
+    a.parts.fraction = ((frac1 >> 6) & (~FLOAT32_HIDDEN_BIT_MASK)) ;
+    return a;
+}
+/** Add two Float64 numbers with same signs
+ */
+float64 addFloat64(float64 a, float64 b)
+{
+    int expdiff;
+    uint32_t exp1, exp2;
+    uint64_t frac1, frac2;
+    expdiff = ((int )a.parts.exp) - b.parts.exp;
+    if (expdiff < 0) {
+        if (isFloat64NaN(b)) {
+            /* TODO: fix SigNaN */
+            if (isFloat64SigNaN(b)) {
+            };
+            return b;
+        };
+        /* b is infinity and a not */
+        if (b.parts.exp == FLOAT64_MAX_EXPONENT ) {
+            return b;
+        }
+        frac1 = b.parts.fraction;
+        exp1 = b.parts.exp;
+        frac2 = a.parts.fraction;
+        exp2 = a.parts.exp;
+        expdiff *= -1;
+    } else {
+        if (isFloat64NaN(a)) {
+            /* TODO: fix SigNaN */
+            if (isFloat64SigNaN(a) || isFloat64SigNaN(b)) {
+            };
+            return a;
+        };
+        /* a is infinity and b not */
+        if (a.parts.exp == FLOAT64_MAX_EXPONENT ) {
+            return a;
+        }
+        frac1 = a.parts.fraction;
+        exp1 = a.parts.exp;
+        frac2 = b.parts.fraction;
+        exp2 = b.parts.exp;
+    };
+    if (exp1 == 0) {
+        /* both are denormalized */
+        frac1 += frac2;
+        if (frac1 & FLOAT64_HIDDEN_BIT_MASK) {
+            /* result is not denormalized */
+            a.parts.exp = 1;
+        };
+        a.parts.fraction = frac1;
+        return a;
+    };
+    /* add hidden bit - frac1 is sure not denormalized */
+    frac1 |= FLOAT64_HIDDEN_BIT_MASK;
+    /* second operand ... */
+    if (exp2 == 0) {
+        /* ... is denormalized */
+        --expdiff;
+    } else {
+        /* is not denormalized */
+        frac2 |= FLOAT64_HIDDEN_BIT_MASK;
+    };
+    /* create some space for rounding */
+    frac1 <<= 6;
+    frac2 <<= 6;
+    if (expdiff < (FLOAT64_FRACTION_SIZE + 2) ) {
+        frac2 >>= expdiff;
+        frac1 += frac2;
+    } else {
+        a.parts.exp = exp1;
+        a.parts.fraction = (frac1 >> 6) & (~(FLOAT64_HIDDEN_BIT_MASK));
+        return a;
+    }
+    if (frac1 & (FLOAT64_HIDDEN_BIT_MASK << 7) ) {
+        ++exp1;
+        frac1 >>= 1;
+    };
+    /* rounding - if first bit after fraction is set then round up */
+    frac1 += (0x1 << 5);
+    if (frac1 & (FLOAT64_HIDDEN_BIT_MASK << 7)) {
+        /* rounding overflow */
+        ++exp1;
+        frac1 >>= 1;
+    };
+    if ((exp1 == FLOAT64_MAX_EXPONENT ) || (exp2 > exp1)) {
+            /* overflow - set infinity as result */
+            a.parts.exp = FLOAT64_MAX_EXPONENT;
+            a.parts.fraction = 0;
+            return a;
+            }
+    a.parts.exp = exp1;
+    /*Clear hidden bit and shift */
+    a.parts.fraction = ( (frac1 >> 6 ) & (~FLOAT64_HIDDEN_BIT_MASK));
+    return a;
+}
+/** @}
+ */

 /tags/0.2.0.2/uspace/softfloat/generic/common.c
 ,0 → 1,215
+/*
+ * Copyright (C) 2005 Josef Cejka
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/** @addtogroup softfloat
+ * @{
+ */
+/** @file
+ */
+#include<sftypes.h>
+#include<common.h>
+/* Table for fast leading zeroes counting */
+char zeroTable[256] = {
+, 7, 7, 6, 6, 6, 6, 4, 4, 4, 4, 4, 4, 4, 4, \
+, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, \
+, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, \
+, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, \
+, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
+, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
+, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
+, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
+, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
+, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
+, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
+, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
+, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
+, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
+, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
+, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
+};
+/** Take fraction shifted by 10 bits to left, round it, normalize it and detect exceptions
+ * @param cexp exponent with bias
+ * @param cfrac fraction shifted 10 places left with added hidden bit
+ * @param sign
+ * @return valied float64
+ */
+float64 finishFloat64(int32_t cexp, uint64_t cfrac, char sign)
+{
+    float64 result;
+    result.parts.sign = sign;
+    /* find first nonzero digit and shift result and detect possibly underflow */
+    while ((cexp > 0) && (cfrac) && (!(cfrac & (FLOAT64_HIDDEN_BIT_MASK << (64 - FLOAT64_FRACTION_SIZE - 1 ) )))) {
+        cexp--;
+        cfrac <<= 1;
+            /* TODO: fix underflow */
+    };
+    if ((cexp < 0) || ( cexp == 0 && (!(cfrac & (FLOAT64_HIDDEN_BIT_MASK << (64 - FLOAT64_FRACTION_SIZE - 1)))))) {
+        /* FIXME: underflow */
+        result.parts.exp = 0;
+        if ((cexp + FLOAT64_FRACTION_SIZE + 1) < 0) { /* +1 is place for rounding */
+            result.parts.fraction = 0;
+            return result;
+        }
+        while (cexp < 0) {
+            cexp++;
+            cfrac >>= 1;
+        }
+        cfrac += (0x1 << (64 - FLOAT64_FRACTION_SIZE - 3));
+        if (!(cfrac & (FLOAT64_HIDDEN_BIT_MASK << (64 - FLOAT64_FRACTION_SIZE - 1)))) {
+            result.parts.fraction = ((cfrac >>(64 - FLOAT64_FRACTION_SIZE - 2) ) & (~FLOAT64_HIDDEN_BIT_MASK));
+            return result;
+        }
+    } else {
+        cfrac += (0x1 << (64 - FLOAT64_FRACTION_SIZE - 3));
+    }
+    ++cexp;
+    if (cfrac & (FLOAT64_HIDDEN_BIT_MASK << (64 - FLOAT64_FRACTION_SIZE - 1 ))) {
+        ++cexp;
+        cfrac >>= 1;
+    }
+    /* check overflow */
+    if (cexp >= FLOAT64_MAX_EXPONENT ) {
+        /* FIXME: overflow, return infinity */
+        result.parts.exp = FLOAT64_MAX_EXPONENT;
+        result.parts.fraction = 0;
+        return result;
+    }
+    result.parts.exp = (uint32_t)cexp;
+    result.parts.fraction = ((cfrac >>(64 - FLOAT64_FRACTION_SIZE - 2 ) ) & (~FLOAT64_HIDDEN_BIT_MASK));
+    return result;
+}
+/** Counts leading zeroes in 64bit unsigned integer
+ * @param i
+ */
+int countZeroes64(uint64_t i)
+{
+    int j;
+    for (j =0; j < 64; j += 8) {
+        if ( i & (0xFFll << (56 - j))) {
+            return (j + countZeroes8(i >> (56 - j)));
+        }
+    }
+    return 64;
+}
+/** Counts leading zeroes in 32bit unsigned integer
+ * @param i
+ */
+int countZeroes32(uint32_t i)
+{
+    int j;
+    for (j =0; j < 32; j += 8) {
+        if ( i & (0xFF << (24 - j))) {
+            return (j + countZeroes8(i >> (24 - j)));
+        }
+    }
+    return 32;
+}
+/** Counts leading zeroes in byte
+ * @param i
+ */
+int countZeroes8(uint8_t i)
+{
+    return zeroTable[i];
+}
+/** Round and normalize number expressed by exponent and fraction with first bit (equal to hidden bit) at 30. bit
+ * @param exp exponent
+ * @param fraction part with hidden bit shifted to 30. bit
+ */
+void roundFloat32(int32_t *exp, uint32_t *fraction)
+{
+    /* rounding - if first bit after fraction is set then round up */
+    (*fraction) += (0x1 << 6);
+    if ((*fraction) & (FLOAT32_HIDDEN_BIT_MASK << 8)) {
+        /* rounding overflow */
+        ++(*exp);
+        (*fraction) >>= 1;
+    };
+    if (((*exp) >= FLOAT32_MAX_EXPONENT ) || ((*exp) < 0)) {
+        /* overflow - set infinity as result */
+        (*exp) = FLOAT32_MAX_EXPONENT;
+        (*fraction) = 0;
+        return;
+    }
+    return;
+}
+/** Round and normalize number expressed by exponent and fraction with first bit (equal to hidden bit) at 62. bit
+ * @param exp exponent
+ * @param fraction part with hidden bit shifted to 62. bit
+ */
+void roundFloat64(int32_t *exp, uint64_t *fraction)
+{
+    /* rounding - if first bit after fraction is set then round up */
+    (*fraction) += (0x1 << 9);
+    if ((*fraction) & (FLOAT64_HIDDEN_BIT_MASK << 11)) {
+        /* rounding overflow */
+        ++(*exp);
+        (*fraction) >>= 1;
+    };
+    if (((*exp) >= FLOAT64_MAX_EXPONENT ) || ((*exp) < 0)) {
+        /* overflow - set infinity as result */
+        (*exp) = FLOAT64_MAX_EXPONENT;
+        (*fraction) = 0;
+        return;
+    }
+    return;
+}
+/** @}
+ */

 /tags/0.2.0.2/uspace/softfloat/generic/comparison.c
 ,0 → 1,129
+/*
+ * Copyright (C) 2005 Josef Cejka
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/** @addtogroup softfloat
+ * @{
+ */
+/** @file
+ */
+#include<sftypes.h>
+#include<comparison.h>
+inline int isFloat32NaN(float32 f)
+{   /* NaN : exp = 0xff and nonzero fraction */
+    return ((f.parts.exp==0xFF)&&(f.parts.fraction));
+}
+inline int isFloat64NaN(float64 d)
+{   /* NaN : exp = 0x7ff and nonzero fraction */
+    return ((d.parts.exp==0x7FF)&&(d.parts.fraction));
+}
+inline int isFloat32SigNaN(float32 f)
+{   /* SigNaN : exp = 0xff fraction = 0xxxxx..x (binary), where at least one x is nonzero */
+    return ((f.parts.exp==0xFF)&&(f.parts.fraction<0x400000)&&(f.parts.fraction));
+}
+inline int isFloat64SigNaN(float64 d)
+{   /* SigNaN : exp = 0x7ff fraction = 0xxxxx..x (binary), where at least one x is nonzero */
+    return ((d.parts.exp==0x7FF)&&(d.parts.fraction)&&(d.parts.fraction<0x8000000000000ll));
+}
+inline int isFloat32Infinity(float32 f)
+{
+    return ((f.parts.exp==0xFF)&&(f.parts.fraction==0x0));
+}
+inline int isFloat64Infinity(float64 d)
+{
+    return ((d.parts.exp==0x7FF)&&(d.parts.fraction==0x0));
+}
+inline int isFloat32Zero(float32 f)
+{
+    return (((f.binary) & 0x7FFFFFFF) == 0);
+}
+inline int isFloat64Zero(float64 d)
+{
+    return (((d.binary) & 0x7FFFFFFFFFFFFFFFll) == 0);
+}
+/**
+ * @return 1, if both floats are equal - but NaNs are not recognized
+ */
+inline int isFloat32eq(float32 a, float32 b)
+{
+    return ((a.binary==b.binary)||(((a.binary| b.binary)&0x7FFFFFFF)==0)); /* a equals to b or both are zeros (with any sign) */
+}
+/**
+ * @return 1, if a<b - but NaNs are not recognized
+ */
+inline int isFloat32lt(float32 a, float32 b)
+{
+    if (((a.binary| b.binary)&0x7FFFFFFF)==0) {
+        return 0; /* +- zeroes */
+    };
+    if ((a.parts.sign)&&(b.parts.sign)) {
+        /*if both are negative, smaller is that with greater binary value*/
+        return (a.binary>b.binary);
+        };
+    /* lets negate signs - now will be positive numbers allways bigger than negative (first bit will be set for unsigned integer comparison)*/
+    a.parts.sign=!a.parts.sign;
+    b.parts.sign=!b.parts.sign;
+    return (a.binary<b.binary);
+}
+/**
+ * @return 1, if a>b - but NaNs are not recognized
+ */
+inline int isFloat32gt(float32 a, float32 b)
+{
+    if (((a.binary| b.binary)&0x7FFFFFFF)==0) {
+        return 0; /* zeroes are equal with any sign */
+    };
+    if ((a.parts.sign)&&(b.parts.sign)) {
+        /*if both are negative, greater is that with smaller binary value*/
+        return (a.binary<b.binary);
+        };
+    /* lets negate signs - now will be positive numbers allways bigger than negative (first bit will be set for unsigned integer comparison)*/
+    a.parts.sign=!a.parts.sign;
+    b.parts.sign=!b.parts.sign;
+    return (a.binary>b.binary);
+}
+/** @}
+ */

 /tags/0.2.0.2/uspace/softfloat/generic/mul.c
 ,0 → 1,294
+/*
+ * Copyright (C) 2005 Josef Cejka
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/** @addtogroup softfloat
+ * @{
+ */
+/** @file
+ */
+#include<sftypes.h>
+#include<mul.h>
+#include<comparison.h>
+#include<common.h>
+/** Multiply two 32 bit float numbers
+ *
+ */
+float32 mulFloat32(float32 a, float32 b)
+{
+    float32 result;
+    uint64_t frac1, frac2;
+    int32_t exp;
+    result.parts.sign = a.parts.sign ^ b.parts.sign;
+    if (isFloat32NaN(a) || isFloat32NaN(b) ) {
+        /* TODO: fix SigNaNs */
+        if (isFloat32SigNaN(a)) {
+            result.parts.fraction = a.parts.fraction;
+            result.parts.exp = a.parts.exp;
+            return result;
+        };
+        if (isFloat32SigNaN(b)) { /* TODO: fix SigNaN */
+            result.parts.fraction = b.parts.fraction;
+            result.parts.exp = b.parts.exp;
+            return result;
+        };
+        /* set NaN as result */
+        result.binary = FLOAT32_NAN;
+        return result;
+    };
+    if (isFloat32Infinity(a)) {
+        if (isFloat32Zero(b)) {
+            /* FIXME: zero * infinity */
+            result.binary = FLOAT32_NAN;
+            return result;
+        }
+        result.parts.fraction = a.parts.fraction;
+        result.parts.exp = a.parts.exp;
+        return result;
+    }
+    if (isFloat32Infinity(b)) {
+        if (isFloat32Zero(a)) {
+            /* FIXME: zero * infinity */
+            result.binary = FLOAT32_NAN;
+            return result;
+        }
+        result.parts.fraction = b.parts.fraction;
+        result.parts.exp = b.parts.exp;
+        return result;
+    }
+    /* exp is signed so we can easy detect underflow */
+    exp = a.parts.exp + b.parts.exp;
+    exp -= FLOAT32_BIAS;
+    if (exp >= FLOAT32_MAX_EXPONENT) {
+        /* FIXME: overflow */
+        /* set infinity as result */
+        result.binary = FLOAT32_INF;
+        result.parts.sign = a.parts.sign ^ b.parts.sign;
+        return result;
+    };
+    if (exp < 0) {
+        /* FIXME: underflow */
+        /* return signed zero */
+        result.parts.fraction = 0x0;
+        result.parts.exp = 0x0;
+        return result;
+    };
+    frac1 = a.parts.fraction;
+    if (a.parts.exp > 0) {
+        frac1 |= FLOAT32_HIDDEN_BIT_MASK;
+    } else {
+        ++exp;
+    };
+    frac2 = b.parts.fraction;
+    if (b.parts.exp > 0) {
+        frac2 |= FLOAT32_HIDDEN_BIT_MASK;
+    } else {
+        ++exp;
+    };
+    frac1 <<= 1; /* one bit space for rounding */
+    frac1 = frac1 * frac2;
+/* round and return */
+    while ((exp < FLOAT32_MAX_EXPONENT) && (frac1 >= ( 1 << (FLOAT32_FRACTION_SIZE + 2)))) {
+        /* 23 bits of fraction + one more for hidden bit (all shifted 1 bit left)*/
+        ++exp;
+        frac1 >>= 1;
+    };
+    /* rounding */
+    /* ++frac1; FIXME: not works - without it is ok */
+    frac1 >>= 1; /* shift off rounding space */
+    if ((exp < FLOAT32_MAX_EXPONENT) && (frac1 >= (1 << (FLOAT32_FRACTION_SIZE + 1)))) {
+        ++exp;
+        frac1 >>= 1;
+    };
+    if (exp >= FLOAT32_MAX_EXPONENT ) {
+        /* TODO: fix overflow */
+        /* return infinity*/
+        result.parts.exp = FLOAT32_MAX_EXPONENT;
+        result.parts.fraction = 0x0;
+        return result;
+    }
+    exp -= FLOAT32_FRACTION_SIZE;
+    if (exp <= FLOAT32_FRACTION_SIZE) {
+        /* denormalized number */
+        frac1 >>= 1; /* denormalize */
+        while ((frac1 > 0) && (exp < 0)) {
+            frac1 >>= 1;
+            ++exp;
+        };
+        if (frac1 == 0) {
+            /* FIXME : underflow */
+        result.parts.exp = 0;
+        result.parts.fraction = 0;
+        return result;
+        };
+    };
+    result.parts.exp = exp;
+    result.parts.fraction = frac1 & ( (1 << FLOAT32_FRACTION_SIZE) - 1);
+    return result;
+}
+/** Multiply two 64 bit float numbers
+ *
+ */
+float64 mulFloat64(float64 a, float64 b)
+{
+    float64 result;
+    uint64_t frac1, frac2;
+    int32_t exp;
+    result.parts.sign = a.parts.sign ^ b.parts.sign;
+    if (isFloat64NaN(a) || isFloat64NaN(b) ) {
+        /* TODO: fix SigNaNs */
+        if (isFloat64SigNaN(a)) {
+            result.parts.fraction = a.parts.fraction;
+            result.parts.exp = a.parts.exp;
+            return result;
+        };
+        if (isFloat64SigNaN(b)) { /* TODO: fix SigNaN */
+            result.parts.fraction = b.parts.fraction;
+            result.parts.exp = b.parts.exp;
+            return result;
+        };
+        /* set NaN as result */
+        result.binary = FLOAT64_NAN;
+        return result;
+    };
+    if (isFloat64Infinity(a)) {
+        if (isFloat64Zero(b)) {
+            /* FIXME: zero * infinity */
+            result.binary = FLOAT64_NAN;
+            return result;
+        }
+        result.parts.fraction = a.parts.fraction;
+        result.parts.exp = a.parts.exp;
+        return result;
+    }
+    if (isFloat64Infinity(b)) {
+        if (isFloat64Zero(a)) {
+            /* FIXME: zero * infinity */
+            result.binary = FLOAT64_NAN;
+            return result;
+        }
+        result.parts.fraction = b.parts.fraction;
+        result.parts.exp = b.parts.exp;
+        return result;
+    }
+    /* exp is signed so we can easy detect underflow */
+    exp = a.parts.exp + b.parts.exp - FLOAT64_BIAS;
+    frac1 = a.parts.fraction;
+    if (a.parts.exp > 0) {
+        frac1 |= FLOAT64_HIDDEN_BIT_MASK;
+    } else {
+        ++exp;
+    };
+    frac2 = b.parts.fraction;
+    if (b.parts.exp > 0) {
+        frac2 |= FLOAT64_HIDDEN_BIT_MASK;
+    } else {
+        ++exp;
+    };
+    frac1 <<= (64 - FLOAT64_FRACTION_SIZE - 1);
+    frac2 <<= (64 - FLOAT64_FRACTION_SIZE - 2);
+    mul64integers(frac1, frac2, &frac1, &frac2);
+    frac2 |= (frac1 != 0);
+    if (frac2 & (0x1ll << 62)) {
+        frac2 <<= 1;
+        exp--;
+    }
+    result = finishFloat64(exp, frac2, result.parts.sign);
+    return result;
+}
+/** Multiply two 64 bit numbers and return result in two parts
+ * @param a first operand
+ * @param b second operand
+ * @param lo lower part from result
+ * @param hi higher part of result
+ */
+void mul64integers(uint64_t a,uint64_t b, uint64_t *lo, uint64_t *hi)
+{
+    uint64_t low, high, middle1, middle2;
+    uint32_t alow, blow;
+    alow = a & 0xFFFFFFFF;
+    blow = b & 0xFFFFFFFF;
+    a >>= 32;
+    b >>= 32;
+    low = ((uint64_t)alow) * blow;
+    middle1 = a * blow;
+    middle2 = alow * b;
+    high = a * b;
+    middle1 += middle2;
+    high += (((uint64_t)(middle1 < middle2)) << 32) + (middle1 >> 32);
+    middle1 <<= 32;
+    low += middle1;
+    high += (low < middle1);
+    *lo = low;
+    *hi = high;
+    return;
+}
+/** @}
+ */

 /tags/0.2.0.2/uspace/softfloat/generic/sub.c
 ,0 → 1,265
+/*
+ * Copyright (C) 2005 Josef Cejka
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup softfloat
+ * @{
+ */
+/** @file
+ */
+#include<sftypes.h>
+#include<sub.h>
+#include<comparison.h>
+/** Subtract two float32 numbers with same signs
+ */
+float32 subFloat32(float32 a, float32 b)
+{
+    int expdiff;
+    uint32_t exp1, exp2, frac1, frac2;
+    float32 result;
+    result.f = 0;
+    expdiff = a.parts.exp - b.parts.exp;
+    if ((expdiff < 0 ) || ((expdiff == 0) && (a.parts.fraction < b.parts.fraction))) {
+        if (isFloat32NaN(b)) {
+            /* TODO: fix SigNaN */
+            if (isFloat32SigNaN(b)) {
+            };
+            return b;
+        };
+        if (b.parts.exp == FLOAT32_MAX_EXPONENT) {
+            b.parts.sign = !b.parts.sign; /* num -(+-inf) = -+inf */
+            return b;
+        }
+        result.parts.sign = !a.parts.sign;
+        frac1 = b.parts.fraction;
+        exp1 = b.parts.exp;
+        frac2 = a.parts.fraction;
+        exp2 = a.parts.exp;
+        expdiff *= -1;
+    } else {
+        if (isFloat32NaN(a)) {
+            /* TODO: fix SigNaN */
+            if (isFloat32SigNaN(a) || isFloat32SigNaN(b)) {
+            };
+            return a;
+        };
+        if (a.parts.exp == FLOAT32_MAX_EXPONENT) {
+            if (b.parts.exp == FLOAT32_MAX_EXPONENT) {
+                /* inf - inf => nan */
+                /* TODO: fix exception */
+                result.binary = FLOAT32_NAN;
+                return result;
+            };
+            return a;
+        }
+        result.parts.sign = a.parts.sign;
+        frac1 = a.parts.fraction;
+        exp1 = a.parts.exp;
+        frac2 = b.parts.fraction;
+        exp2 = b.parts.exp;
+    };
+    if (exp1 == 0) {
+        /* both are denormalized */
+        result.parts.fraction = frac1-frac2;
+        if (result.parts.fraction > frac1) {
+            /* TODO: underflow exception */
+            return result;
+        };
+        result.parts.exp = 0;
+        return result;
+    };
+    /* add hidden bit */
+    frac1 |= FLOAT32_HIDDEN_BIT_MASK;
+    if (exp2 == 0) {
+        /* denormalized */
+        --expdiff;
+    } else {
+        /* normalized */
+        frac2 |= FLOAT32_HIDDEN_BIT_MASK;
+    };
+    /* create some space for rounding */
+    frac1 <<= 6;
+    frac2 <<= 6;
+    if (expdiff > FLOAT32_FRACTION_SIZE + 1) {
+         goto done;
+         };
+    frac1 = frac1 - (frac2 >> expdiff);
+done:
+    /* TODO: find first nonzero digit and shift result and detect possibly underflow */
+    while ((exp1 > 0) && (!(frac1 & (FLOAT32_HIDDEN_BIT_MASK << 6 )))) {
+        --exp1;
+        frac1 <<= 1;
+            /* TODO: fix underflow - frac1 == 0 does not necessary means underflow... */
+    };
+    /* rounding - if first bit after fraction is set then round up */
+    frac1 += 0x20;
+    if (frac1 & (FLOAT32_HIDDEN_BIT_MASK << 7)) {
+        ++exp1;
+        frac1 >>= 1;
+    };
+    /*Clear hidden bit and shift */
+    result.parts.fraction = ((frac1 >> 6) & (~FLOAT32_HIDDEN_BIT_MASK));
+    result.parts.exp = exp1;
+    return result;
+}
+/** Subtract two float64 numbers with same signs
+ */
+float64 subFloat64(float64 a, float64 b)
+{
+    int expdiff;
+    uint32_t exp1, exp2;
+    uint64_t frac1, frac2;
+    float64 result;
+    result.d = 0;
+    expdiff = a.parts.exp - b.parts.exp;
+    if ((expdiff < 0 ) || ((expdiff == 0) && (a.parts.fraction < b.parts.fraction))) {
+        if (isFloat64NaN(b)) {
+            /* TODO: fix SigNaN */
+            if (isFloat64SigNaN(b)) {
+            };
+            return b;
+        };
+        if (b.parts.exp == FLOAT64_MAX_EXPONENT) {
+            b.parts.sign = !b.parts.sign; /* num -(+-inf) = -+inf */
+            return b;
+        }
+        result.parts.sign = !a.parts.sign;
+        frac1 = b.parts.fraction;
+        exp1 = b.parts.exp;
+        frac2 = a.parts.fraction;
+        exp2 = a.parts.exp;
+        expdiff *= -1;
+    } else {
+        if (isFloat64NaN(a)) {
+            /* TODO: fix SigNaN */
+            if (isFloat64SigNaN(a) || isFloat64SigNaN(b)) {
+            };
+            return a;
+        };
+        if (a.parts.exp == FLOAT64_MAX_EXPONENT) {
+            if (b.parts.exp == FLOAT64_MAX_EXPONENT) {
+                /* inf - inf => nan */
+                /* TODO: fix exception */
+                result.binary = FLOAT64_NAN;
+                return result;
+            };
+            return a;
+        }
+        result.parts.sign = a.parts.sign;
+        frac1 = a.parts.fraction;
+        exp1 = a.parts.exp;
+        frac2 = b.parts.fraction;
+        exp2 = b.parts.exp;
+    };
+    if (exp1 == 0) {
+        /* both are denormalized */
+        result.parts.fraction = frac1 - frac2;
+        if (result.parts.fraction > frac1) {
+            /* TODO: underflow exception */
+            return result;
+        };
+        result.parts.exp = 0;
+        return result;
+    };
+    /* add hidden bit */
+    frac1 |= FLOAT64_HIDDEN_BIT_MASK;
+    if (exp2 == 0) {
+        /* denormalized */
+        --expdiff;
+    } else {
+        /* normalized */
+        frac2 |= FLOAT64_HIDDEN_BIT_MASK;
+    };
+    /* create some space for rounding */
+    frac1 <<= 6;
+    frac2 <<= 6;
+    if (expdiff > FLOAT64_FRACTION_SIZE + 1) {
+         goto done;
+         };
+    frac1 = frac1 - (frac2 >> expdiff);
+done:
+    /* TODO: find first nonzero digit and shift result and detect possibly underflow */
+    while ((exp1 > 0) && (!(frac1 & (FLOAT64_HIDDEN_BIT_MASK << 6 )))) {
+        --exp1;
+        frac1 <<= 1;
+            /* TODO: fix underflow - frac1 == 0 does not necessary means underflow... */
+    };
+    /* rounding - if first bit after fraction is set then round up */
+    frac1 += 0x20;
+    if (frac1 & (FLOAT64_HIDDEN_BIT_MASK << 7)) {
+        ++exp1;
+        frac1 >>= 1;
+    };
+    /*Clear hidden bit and shift */
+    result.parts.fraction = ((frac1 >> 6) & (~FLOAT64_HIDDEN_BIT_MASK));
+    result.parts.exp = exp1;
+    return result;
+}
+ /** @}
+ */

 /tags/0.2.0.2/uspace/softfloat/arch/amd64/include/functions.h
 ,0 → 1,77
+/*
+ * Copyright (C) 2006 Josef Cejka
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/** @addtogroup softfloatamd64 amd64
+ * @ingroup sfl
+ * @brief softfloat architecture dependent definitions
+ * @{
+ */
+/** @file
+ */
+#ifndef __SOFTFLOAT_FUNCTIONS_H__
+#define __SOFTFLOAT_FUNCTIONS_H__
+#define float32_to_int(X) float32_to_int32(X);
+#define float32_to_long(X) float32_to_int64(X);
+#define float32_to_longlong(X) float32_to_int64(X);
+#define float64_to_int(X) float64_to_int32(X);
+#define float64_to_long(X) float64_to_int64(X);
+#define float64_to_longlong(X) float64_to_int64(X);
+#define float32_to_uint(X) float32_to_uint32(X);
+#define float32_to_ulong(X) float32_to_uint64(X);
+#define float32_to_ulonglong(X) float32_to_uint64(X);
+#define float64_to_uint(X) float64_to_uint32(X);
+#define float64_to_ulong(X) float64_to_uint64(X);
+#define float64_to_ulonglong(X) float64_to_uint64(X);
+#define int_to_float32(X) int32_to_float32(X);
+#define long_to_float32(X) int64_to_float32(X);
+#define longlong_to_float32(X) int64_to_float32(X);
+#define int_to_float64(X) int32_to_float64(X);
+#define long_to_float64(X) int64_to_float64(X);
+#define longlong_to_float64(X) int64_to_float64(X);
+#define uint_to_float32(X) uint32_to_float32(X);
+#define ulong_to_float32(X) uint64_to_float32(X);
+#define ulonglong_to_float32(X) uint64_to_float32(X);
+#define uint_to_float64(X) uint32_to_float64(X);
+#define ulong_to_float64(X) uint64_to_float64(X);
+#define ulonglong_to_float64(X) uint64_to_float64(X);
+#endif
+/** @}
+ */

 /tags/0.2.0.2/uspace/softfloat/arch/ia32/include/functions.h
 ,0 → 1,75
+/*
+ * Copyright (C) 2006 Josef Cejka
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/** @addtogroup softfloatia32 ia32
+ * @ingroup sfl
+ * @brief softfloat architecture dependent definitions
+ * @{
+ */
+/** @file
+ */
+#ifndef __SOFTFLOAT_FUNCTIONS_H__
+#define __SOFTFLOAT_FUNCTIONS_H__
+#define float32_to_int(X) float32_to_int32(X);
+#define float32_to_long(X) float32_to_int32(X);
+#define float32_to_longlong(X) float32_to_int64(X);
+#define float64_to_int(X) float64_to_int32(X);
+#define float64_to_long(X) float64_to_int32(X);
+#define float64_to_longlong(X) float64_to_int64(X);
+#define float32_to_uint(X) float32_to_uint32(X);
+#define float32_to_ulong(X) float32_to_uint32(X);
+#define float32_to_ulonglong(X) float32_to_uint64(X);
+#define float64_to_uint(X) float64_to_uint32(X);
+#define float64_to_ulong(X) float64_to_uint32(X);
+#define float64_to_ulonglong(X) float64_to_uint64(X);
+#define int_to_float32(X) int32_to_float32(X);
+#define long_to_float32(X) int32_to_float32(X);
+#define longlong_to_float32(X) int64_to_float32(X);
+#define int_to_float64(X) int32_to_float64(X);
+#define long_to_float64(X) int32_to_float64(X);
+#define longlong_to_float64(X) int64_to_float64(X);
+#define uint_to_float32(X) uint32_to_float32(X);
+#define ulong_to_float32(X) uint32_to_float32(X);
+#define ulonglong_to_float32(X) uint64_to_float32(X);
+#define uint_to_float64(X) uint32_to_float64(X);
+#define ulong_to_float64(X) uint32_to_float64(X);
+#define ulonglong_to_float64(X) uint64_to_float64(X);
+#endif
+/** @}
+ */

 /tags/0.2.0.2/uspace/softfloat/arch/sparc64/include/functions.h
 ,0 → 1,77
+/*
+ * Copyright (C) 2006 Josef Cejka
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup softfloatsparc64 sparc64
+ * @ingroup sfl
+ * @brief softfloat architecture dependent definitions
+ * @{
+ */
+/** @file
+ */
+#ifndef __SOFTFLOAT_FUNCTIONS_H__
+#define __SOFTFLOAT_FUNCTIONS_H__
+#define float32_to_int(X) float32_to_int32(X);
+#define float32_to_long(X) float32_to_int64(X);
+#define float32_to_longlong(X) float32_to_int64(X);
+#define float64_to_int(X) float64_to_int32(X);
+#define float64_to_long(X) float64_to_int64(X);
+#define float64_to_longlong(X) float64_to_int64(X);
+#define float32_to_uint(X) float32_to_uint32(X);
+#define float32_to_ulong(X) float32_to_uint64(X);
+#define float32_to_ulonglong(X) float32_to_uint64(X);
+#define float64_to_uint(X) float64_to_uint32(X);
+#define float64_to_ulong(X) float64_to_uint64(X);
+#define float64_to_ulonglong(X) float64_to_uint64(X);
+#define int_to_float32(X) int32_to_float32(X);
+#define long_to_float32(X) int64_to_float32(X);
+#define longlong_to_float32(X) int64_to_float32(X);
+#define int_to_float64(X) int32_to_float64(X);
+#define long_to_float64(X) int64_to_float64(X);
+#define longlong_to_float64(X) int64_to_float64(X);
+#define uint_to_float32(X) uint32_to_float32(X);
+#define ulong_to_float32(X) uint64_to_float32(X);
+#define ulonglong_to_float32(X) uint64_to_float32(X);
+#define uint_to_float64(X) uint32_to_float64(X);
+#define ulong_to_float64(X) uint64_to_float64(X);
+#define ulonglong_to_float64(X) uint64_to_float64(X);
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/uspace/softfloat/arch/ia64/include/functions.h
 ,0 → 1,77
+/*
+ * Copyright (C) 2006 Josef Cejka
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup softfloatia64 ia64
+ * @ingroup sfl
+ * @brief softfloat architecture dependent definitions
+ * @{
+ */
+/** @file
+ */
+#ifndef __SOFTFLOAT_FUNCTIONS_H__
+#define __SOFTFLOAT_FUNCTIONS_H__
+#define float32_to_int(X) float32_to_int32(X);
+#define float32_to_long(X) float32_to_int64(X);
+#define float32_to_longlong(X) float32_to_int64(X);
+#define float64_to_int(X) float64_to_int32(X);
+#define float64_to_long(X) float64_to_int64(X);
+#define float64_to_longlong(X) float64_to_int64(X);
+#define float32_to_uint(X) float32_to_uint32(X);
+#define float32_to_ulong(X) float32_to_uint64(X);
+#define float32_to_ulonglong(X) float32_to_uint64(X);
+#define float64_to_uint(X) float64_to_uint32(X);
+#define float64_to_ulong(X) float64_to_uint64(X);
+#define float64_to_ulonglong(X) float64_to_uint64(X);
+#define int_to_float32(X) int32_to_float32(X);
+#define long_to_float32(X) int64_to_float32(X);
+#define longlong_to_float32(X) int64_to_float32(X);
+#define int_to_float64(X) int32_to_float64(X);
+#define long_to_float64(X) int64_to_float64(X);
+#define longlong_to_float64(X) int64_to_float64(X);
+#define uint_to_float32(X) uint32_to_float32(X);
+#define ulong_to_float32(X) uint64_to_float32(X);
+#define ulonglong_to_float32(X) uint64_to_float32(X);
+#define uint_to_float64(X) uint32_to_float64(X);
+#define ulong_to_float64(X) uint64_to_float64(X);
+#define ulonglong_to_float64(X) uint64_to_float64(X);
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/uspace/softfloat/arch/mips32eb/include/functions.h
 ,0 → 1,77
+/*
+ * Copyright (C) 2006 Josef Cejka
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup softfloatmipseb32 mipseb32
+ * @ingroup sfl
+ * @brief softfloat architecture dependent definitions
+ * * @{
+ */
+/** @file
+ */
+#ifndef __SOFTFLOAT_FUNCTIONS_H__
+#define __SOFTFLOAT_FUNCTIONS_H__
+#define float32_to_int(X) float32_to_int32(X);
+#define float32_to_long(X) float32_to_int32(X);
+#define float32_to_longlong(X) float32_to_int64(X);
+#define float64_to_int(X) float64_to_int32(X);
+#define float64_to_long(X) float64_to_int32(X);
+#define float64_to_longlong(X) float64_to_int64(X);
+#define float32_to_uint(X) float32_to_uint32(X);
+#define float32_to_ulong(X) float32_to_uint32(X);
+#define float32_to_ulonglong(X) float32_to_uint64(X);
+#define float64_to_uint(X) float64_to_uint32(X);
+#define float64_to_ulong(X) float64_to_uint32(X);
+#define float64_to_ulonglong(X) float64_to_uint64(X);
+#define int_to_float32(X) int32_to_float32(X);
+#define long_to_float32(X) int32_to_float32(X);
+#define longlong_to_float32(X) int64_to_float32(X);
+#define int_to_float64(X) int32_to_float64(X);
+#define long_to_float64(X) int32_to_float64(X);
+#define longlong_to_float64(X) int64_to_float64(X);
+#define uint_to_float32(X) uint32_to_float32(X);
+#define ulong_to_float32(X) uint32_to_float32(X);
+#define ulonglong_to_float32(X) uint64_to_float32(X);
+#define uint_to_float64(X) uint32_to_float64(X);
+#define ulong_to_float64(X) uint32_to_float64(X);
+#define ulonglong_to_float64(X) uint64_to_float64(X);
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/uspace/softfloat/arch/ppc32/include/functions.h
 ,0 → 1,77
+/*
+ * Copyright (C) 2006 Josef Cejka
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup softfloatppc32 ppc32
+ * @ingroup sfl
+ * @brief softfloat architecture dependent definitions
+ * @{
+ */
+/** @file
+ */
+#ifndef __SOFTFLOAT_FUNCTIONS_H__
+#define __SOFTFLOAT_FUNCTIONS_H__
+#define float32_to_int(X) float32_to_int32(X);
+#define float32_to_long(X) float32_to_int32(X);
+#define float32_to_longlong(X) float32_to_int64(X);
+#define float64_to_int(X) float64_to_int32(X);
+#define float64_to_long(X) float64_to_int32(X);
+#define float64_to_longlong(X) float64_to_int64(X);
+#define float32_to_uint(X) float32_to_uint32(X);
+#define float32_to_ulong(X) float32_to_uint32(X);
+#define float32_to_ulonglong(X) float32_to_uint64(X);
+#define float64_to_uint(X) float64_to_uint32(X);
+#define float64_to_ulong(X) float64_to_uint32(X);
+#define float64_to_ulonglong(X) float64_to_uint64(X);
+#define int_to_float32(X) int32_to_float32(X);
+#define long_to_float32(X) int32_to_float32(X);
+#define longlong_to_float32(X) int64_to_float32(X);
+#define int_to_float64(X) int32_to_float64(X);
+#define long_to_float64(X) int32_to_float64(X);
+#define longlong_to_float64(X) int64_to_float64(X);
+#define uint_to_float32(X) uint32_to_float32(X);
+#define ulong_to_float32(X) uint32_to_float32(X);
+#define ulonglong_to_float32(X) uint64_to_float32(X);
+#define uint_to_float64(X) uint32_to_float64(X);
+#define ulong_to_float64(X) uint32_to_float64(X);
+#define ulonglong_to_float64(X) uint64_to_float64(X);
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/uspace/softfloat/arch/ppc64/include/functions.h
 ,0 → 1,76
+/*
+ * Copyright (C) 2006 Josef Cejka
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup softfloatppc64 ppc64
+ * @ingroup sfl
+ * @brief softfloat architecture dependent definitions
+ * @{
+ */
+/** @file
+ */
+#ifndef __SOFTFLOAT_FUNCTIONS_H__
+#define __SOFTFLOAT_FUNCTIONS_H__
+#define float32_to_int(X) float32_to_int32(X);
+#define float32_to_long(X) float32_to_int64(X);
+#define float32_to_longlong(X) float32_to_int64(X);
+#define float64_to_int(X) float64_to_int32(X);
+#define float64_to_long(X) float64_to_int64(X);
+#define float64_to_longlong(X) float64_to_int64(X);
+#define float32_to_uint(X) float32_to_uint32(X);
+#define float32_to_ulong(X) float32_to_uint64(X);
+#define float32_to_ulonglong(X) float32_to_uint64(X);
+#define float64_to_uint(X) float64_to_uint32(X);
+#define float64_to_ulong(X) float64_to_uint64(X);
+#define float64_to_ulonglong(X) float64_to_uint64(X);
+#define int_to_float32(X) int32_to_float32(X);
+#define long_to_float32(X) int64_to_float32(X);
+#define longlong_to_float32(X) int64_to_float32(X);
+#define int_to_float64(X) int32_to_float64(X);
+#define long_to_float64(X) int64_to_float64(X);
+#define longlong_to_float64(X) int64_to_float64(X);
+#define uint_to_float32(X) uint32_to_float32(X);
+#define ulong_to_float32(X) uint64_to_float32(X);
+#define ulonglong_to_float32(X) uint64_to_float32(X);
+#define uint_to_float64(X) uint32_to_float64(X);
+#define ulong_to_float64(X) uint64_to_float64(X);
+#define ulonglong_to_float64(X) uint64_to_float64(X);
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/uspace/softfloat/arch/mips32/include/functions.h
 ,0 → 1,77
+/*
+ * Copyright (C) 2006 Josef Cejka
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup softfloatmips32 mips32
+ * @ingroup sfl
+ * @brief softfloat architecture dependent definitions
+ * @{
+ */
+/** @file
+ */
+#ifndef __SOFTFLOAT_FUNCTIONS_H__
+#define __SOFTFLOAT_FUNCTIONS_H__
+#define float32_to_int(X) float32_to_int32(X);
+#define float32_to_long(X) float32_to_int32(X);
+#define float32_to_longlong(X) float32_to_int64(X);
+#define float64_to_int(X) float64_to_int32(X);
+#define float64_to_long(X) float64_to_int32(X);
+#define float64_to_longlong(X) float64_to_int64(X);
+#define float32_to_uint(X) float32_to_uint32(X);
+#define float32_to_ulong(X) float32_to_uint32(X);
+#define float32_to_ulonglong(X) float32_to_uint64(X);
+#define float64_to_uint(X) float64_to_uint32(X);
+#define float64_to_ulong(X) float64_to_uint32(X);
+#define float64_to_ulonglong(X) float64_to_uint64(X);
+#define int_to_float32(X) int32_to_float32(X);
+#define long_to_float32(X) int32_to_float32(X);
+#define longlong_to_float32(X) int64_to_float32(X);
+#define int_to_float64(X) int32_to_float64(X);
+#define long_to_float64(X) int32_to_float64(X);
+#define longlong_to_float64(X) int64_to_float64(X);
+#define uint_to_float32(X) uint32_to_float32(X);
+#define ulong_to_float32(X) uint32_to_float32(X);
+#define ulonglong_to_float32(X) uint64_to_float32(X);
+#define uint_to_float64(X) uint32_to_float64(X);
+#define ulong_to_float64(X) uint32_to_float64(X);
+#define ulonglong_to_float64(X) uint64_to_float64(X);
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/uspace/softfloat/include/sub.h
 ,0 → 1,47
+/*
+ * Copyright (C) 2005 Josef Cejka
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup softfloat
+ * @{
+ */
+/** @file
+ */
+#ifndef __SUB_H__
+#define __SUB_H__
+float32 subFloat32(float32 a, float32 b);
+float64 subFloat64(float64 a, float64 b);
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/uspace/softfloat/include/comparison.h
 ,0 → 1,59
+/*
+ * Copyright (C) 2005 Josef Cejka
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup softfloat
+ * @{
+ */
+/** @file
+ */
+#ifndef __COMPARISON_H__
+#define __COMPARISON_H__
+inline int isFloat32NaN(float32 f);
+inline int isFloat32SigNaN(float32 f);
+inline int isFloat32Infinity(float32 f);
+inline int isFloat32Zero(float32 f);
+inline int isFloat64NaN(float64 d);
+inline int isFloat64SigNaN(float64 d);
+inline int isFloat64Infinity(float64 d);
+inline int isFloat64Zero(float64 d);
+inline int isFloat32eq(float32 a, float32 b);
+inline int isFloat32lt(float32 a, float32 b);
+inline int isFloat32gt(float32 a, float32 b);
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/uspace/softfloat/include/mul.h
 ,0 → 1,49
+/*
+ * Copyright (C) 2005 Josef Cejka
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup softfloat
+ * @{
+ */
+/** @file
+ */
+#ifndef __MUL_H__
+#define __MUL_H__
+float32 mulFloat32(float32 a, float32 b);
+float64 mulFloat64(float64 a, float64 b);
+void mul64integers(uint64_t a,uint64_t b, uint64_t *lo, uint64_t *hi);
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/uspace/softfloat/include/sftypes.h
 ,0 → 1,112
+/*
+ * Copyright (C) 2005 Josef Cejka
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup softfloat
+ * @{
+ */
+/** @file
+ */
+#ifndef __SFTYPES_H__
+#define __SFTYPES_H__
+#include <endian.h>
+#include <stdint.h>
+typedef union {
+    float f;
+    uint32_t binary;
+    struct  {
+        #if __BYTE_ORDER == __BIG_ENDIAN
+        uint32_t sign:1;
+        uint32_t exp:8;
+        uint32_t fraction:23;
+        #elif __BYTE_ORDER == __LITTLE_ENDIAN
+        uint32_t fraction:23;
+        uint32_t exp:8;
+        uint32_t sign:1;
+        #else
+            #error "Unknown endians."
+        #endif
+        } parts __attribute__ ((packed));
+    } float32;
+typedef union {
+    double d;
+    uint64_t binary;
+    struct  {
+        #if __BYTE_ORDER == __BIG_ENDIAN
+        uint64_t sign:1;
+        uint64_t exp:11;
+        uint64_t fraction:52;
+        #elif __BYTE_ORDER == __LITTLE_ENDIAN
+        uint64_t fraction:52;
+        uint64_t exp:11;
+        uint64_t sign:1;
+        #else
+            #error "Unknown endians."
+        #endif
+        } parts __attribute__ ((packed));
+    } float64;
+#define FLOAT32_MAX 0x7f800000
+#define FLOAT32_MIN 0xff800000
+#define FLOAT64_MAX
+#define FLOAT64_MIN
+/* For recognizing NaNs or infinity use isFloat32NaN and is Float32Inf, comparing with this constants is not sufficient */
+#define FLOAT32_NAN 0x7FC00001
+#define FLOAT32_SIGNAN 0x7F800001
+#define FLOAT32_INF 0x7F800000
+#define FLOAT64_NAN 0x7FF8000000000001ll
+#define FLOAT64_SIGNAN 0x7FF0000000000001ll
+#define FLOAT64_INF 0x7FF0000000000000ll
+#define FLOAT32_FRACTION_SIZE 23
+#define FLOAT64_FRACTION_SIZE 52
+#define FLOAT32_HIDDEN_BIT_MASK 0x800000
+#define FLOAT64_HIDDEN_BIT_MASK 0x10000000000000ll
+#define FLOAT32_MAX_EXPONENT 0xFF
+#define FLOAT64_MAX_EXPONENT 0x7FF
+#define FLOAT32_BIAS 0x7F
+#define FLOAT64_BIAS 0x3FF
+#define FLOAT80_BIAS 0x3FFF
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/uspace/softfloat/include/other.h
 ,0 → 1,43
+/*
+ * Copyright (C) 2005 Josef Cejka
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup softfloat
+ * @{
+ */
+/** @file
+ */
+#ifndef __OTHER_H__
+#define __OTHER_H__
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/uspace/softfloat/include/softfloat.h
 ,0 → 1,174
+/*
+ * Copyright (C) 2005 Josef Cejka
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup softfloat
+ * @{
+ */
+/** @file
+ */
+#ifndef __SOFTFLOAT_H__
+#define __SOFTFLOAT_H__
+float __addsf3(float a, float b);
+double __adddf3(double a, double b);
+long double __addtf3(long double a, long double b);
+long double __addxf3(long double a, long double b);
+float __subsf3(float a, float b);
+double __subdf3(double a, double b);
+long double __subtf3(long double a, long double b);
+long double __subxf3(long double a, long double b);
+float __mulsf3(float a, float b);
+double __muldf3(double a, double b);
+long double __multf3(long double a, long double b);
+long double __mulxf3(long double a, long double b);
+float __divsf3(float a, float b);
+double __divdf3(double a, double b);
+long double __divtf3(long double a, long double b);
+long double __divxf3(long double a, long double b);
+float __negsf2(float a);
+double __negdf2(double a);
+long double __negtf2(long double a);
+long double __negxf2(long double a);
+double __extendsfdf2(float a);
+long double __extendsftf2(float a);
+long double __extendsfxf2(float a);
+long double __extenddftf2(double a);
+long double __extenddfxf2(double a);
+double __truncxfdf2(long double a);
+double __trunctfdf2(long double a);
+float __truncxfsf2(long double a);
+float __trunctfsf2(long double a);
+float __truncdfsf2(double a);
+int __fixsfsi(float a);
+int __fixdfsi(double a);
+int __fixtfsi(long double a);
+int __fixxfsi(long double a);
+long __fixsfdi(float a);
+long __fixdfdi(double a);
+long __fixtfdi(long double a);
+long __fixxfdi(long double a);
+long long __fixsfti(float a);
+long long __fixdfti(double a);
+long long __fixtfti(long double a);
+long long __fixxfti(long double a);
+unsigned int __fixunssfsi(float a);
+unsigned int __fixunsdfsi(double a);
+unsigned int __fixunstfsi(long double a);
+unsigned int __fixunsxfsi(long double a);
+unsigned long __fixunssfdi(float a);
+unsigned long __fixunsdfdi(double a);
+unsigned long __fixunstfdi(long double a);
+unsigned long __fixunsxfdi(long double a);
+unsigned long long __fixunssfti(float a);
+unsigned long long __fixunsdfti(double a);
+unsigned long long __fixunstfti(long double a);
+unsigned long long __fixunsxfti(long double a);
+float __floatsisf(int i);
+double __floatsidf(int i);
+long double __floatsitf(int i);
+long double __floatsixf(int i);
+float __floatdisf(long i);
+double __floatdidf(long i);
+long double __floatditf(long i);
+long double __floatdixf(long i);
+float __floattisf(long long i);
+double __floattidf(long long i);
+long double __floattitf(long long i);
+long double __floattixf(long long i);
+float __floatunsisf(unsigned int i);
+double __floatunsidf(unsigned int i);
+long double __floatunsitf(unsigned int i);
+long double __floatunsixf(unsigned int i);
+float __floatundisf(unsigned long i);
+double __floatundidf(unsigned long i);
+long double __floatunditf(unsigned long i);
+long double __floatundixf(unsigned long i);
+float __floatuntisf(unsigned long long i);
+double __floatuntidf(unsigned long long i);
+long double __floatuntitf(unsigned long long i);
+long double __floatuntixf(unsigned long long i);
+int __cmpsf2(float a, float b);
+int __cmpdf2(double a, double b);
+int __cmptf2(long double a, long double b);
+int __unordsf2(float a, float b);
+int __unorddf2(double a, double b);
+int __unordtf2(long double a, long double b);
+int __eqsf2(float a, float b);
+int __eqdf2(double a, double b);
+int __eqtf2(long double a, long double b);
+int __nesf2(float a, float b);
+int __nedf2(double a, double b);
+int __netf2(long double a, long double b);
+int __gesf2(float a, float b);
+int __gedf2(double a, double b);
+int __getf2(long double a, long double b);
+int __ltsf2(float a, float b);
+int __ltdf2(double a, double b);
+int __lttf2(long double a, long double b);
+int __lesf2(float a, float b);
+int __ledf2(double a, double b);
+int __letf2(long double a, long double b);
+int __gtsf2(float a, float b);
+int __gtdf2(double a, double b);
+int __gttf2(long double a, long double b);
+/* Not implemented yet*/
+float __powisf2(float a, int b);
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/uspace/softfloat/include/div.h
 ,0 → 1,48
+/*
+ * Copyright (C) 2005 Josef Cejka
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup softfloat
+ * @{
+ */
+/** @file
+ */
+#ifndef __DIV_H__
+#define __DIV_H__
+float32 divFloat32(float32 a, float32 b);
+float64 divFloat64(float64 a, float64 b);
+uint64_t divFloat64estim(uint64_t a, uint64_t b);
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/uspace/softfloat/include/conversion.h
 ,0 → 1,71
+/*
+ * Copyright (C) 2005 Josef Cejka
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup softfloat
+ * @{
+ */
+/** @file
+ */
+#ifndef __CONVERSION_H__
+#define __CONVERSION_H__
+float64 convertFloat32ToFloat64(float32 a);
+float32 convertFloat64ToFloat32(float64 a);
+uint32_t float32_to_uint32(float32 a);
+int32_t float32_to_int32(float32 a);
+uint64_t float32_to_uint64(float32 a);
+int64_t float32_to_int64(float32 a);
+uint64_t float64_to_uint64(float64 a);
+int64_t float64_to_int64(float64 a);
+uint32_t float64_to_uint32(float64 a);
+int32_t float64_to_int32(float64 a);
+float32 uint32_to_float32(uint32_t i);
+float32 int32_to_float32(int32_t i);
+float32 uint64_to_float32(uint64_t i);
+float32 int64_to_float32(int64_t i);
+float64 uint32_to_float64(uint32_t i);
+float64 int32_to_float64(int32_t i);
+float64 uint64_to_float64(uint64_t i);
+float64 int64_to_float64(int64_t i);
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/uspace/softfloat/include/add.h
 ,0 → 1,47
+/*
+ * Copyright (C) 2005 Josef Cejka
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup softfloat
+ * @{
+ */
+/** @file
+ */
+#ifndef __ADD_H__
+#define __ADD_H__
+float32 addFloat32(float32 a, float32 b);
+float64 addFloat64(float64 a, float64 b);
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/uspace/softfloat/include/common.h
 ,0 → 1,53
+/*
+ * Copyright (C) 2005 Josef Cejka
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup softfloat
+ * @{
+ */
+/** @file
+ */
+#ifndef __COMMON_H__
+#define __COMMON_H__
+#include<sftypes.h>
+float64 finishFloat64(int32_t cexp, uint64_t cfrac, char sign);
+int countZeroes64(uint64_t i);
+int countZeroes32(uint32_t i);
+int countZeroes8(uint8_t i);
+void roundFloat32(int32_t *exp, uint32_t *fraction);
+void roundFloat64(int32_t *exp, uint64_t *fraction);
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/uspace/softfloat/Makefile
 ,0 → 1,81
+#
+# Copyright (C) 2005 Martin Decky
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# - Redistributions of source code must retain the above copyright
+#   notice, this list of conditions and the following disclaimer.
+# - Redistributions in binary form must reproduce the above copyright
+#   notice, this list of conditions and the following disclaimer in the
+#   documentation and/or other materials provided with the distribution.
+# - The name of the author may not be used to endorse or promote products
+#   derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+## Common compiler flags
+#
+LIBC_PREFIX = ../libc
+## Setup toolchain
+#
+include $(LIBC_PREFIX)/Makefile.toolchain
+CFLAGS +=-Iinclude -Iarch/$(ARCH)/include/
+## Sources
+#
+GENERIC_SOURCES =       \
+    generic/add.c       \
+    generic/common.c    \
+    generic/comparison.c    \
+    generic/conversion.c    \
+    generic/div.c       \
+    generic/mul.c       \
+    generic/other.c     \
+    generic/softfloat.c \
+    generic/sub.c
+ARCH_SOURCES =
+GENERIC_OBJECTS := $(addsuffix .o,$(basename $(GENERIC_SOURCES)))
+.PHONY: all clean depend
+all: libsoftfloat.a
+-include Makefile.depend
+clean:
+    -rm -f libsoftfloat.a Makefile.depend
+    find generic/ -name '*.o' -follow -exec rm \{\} \;
+depend:
+    -makedepend $(DEFS) $(CFLAGS) -f - $(GENERIC_SOURCES) > Makefile.depend 2> /dev/null
+libsoftfloat.a: depend $(ARCH_OBJECTS) $(GENERIC_OBJECTS)
+    $(AR) rc libsoftfloat.a $(ARCH_OBJECTS) $(GENERIC_OBJECTS)
+%.o: %.S
+    $(CC) $(DEFS) $(AFLAGS) $(CFLAGS) -D__ASM__ -c $< -o $@
+%.o: %.s
+    $(AS) $(AFLAGS) $< -o $@
+%.o: %.c
+    $(CC) $(DEFS) $(CFLAGS) -c $< -o $@

 /tags/0.2.0.2/uspace/console/gcons.c
 ,0 → 1,503
+/*
+ * Copyright (C) 2006 Ondrej Palkovsky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/** @addtogroup console
+ * @{
+ */
+/** @file
+ */
+#include <ipc/fb.h>
+#include <ipc/ipc.h>
+#include <async.h>
+#include <stdio.h>
+#include <sys/mman.h>
+#include <string.h>
+#include <align.h>
+#include "console.h"
+#include "gcons.h"
+#define CONSOLE_TOP      66
+#define CONSOLE_MARGIN   6
+#define STATUS_START    110
+#define STATUS_TOP      8
+#define STATUS_SPACE    4
+#define STATUS_WIDTH    48
+#define STATUS_HEIGHT   48
+#define MAIN_COLOR      0xffffff
+static int use_gcons = 0;
+static ipcarg_t xres,yres;
+enum butstate {
+    CONS_DISCONNECTED = 0,
+    CONS_SELECTED,
+    CONS_IDLE,
+    CONS_HAS_DATA,
+    CONS_KERNEL,
+    CONS_DISCONNECTED_SEL,
+    CONS_LAST
+};
+static int console_vp;
+static int cstatus_vp[CONSOLE_COUNT];
+static enum butstate console_state[CONSOLE_COUNT];
+static int fbphone;
+/** List of pixmaps identifying these icons */
+static int ic_pixmaps[CONS_LAST] = {-1,-1,-1,-1,-1,-1};
+static int animation = -1;
+static int active_console = 0;
+static void vp_switch(int vp)
+{
+    async_msg(fbphone,FB_VIEWPORT_SWITCH, vp);
+}
+/** Create view port */
+static int vp_create(unsigned int x, unsigned int y,
+             unsigned int width, unsigned int height)
+{
+    return async_req_2(fbphone, FB_VIEWPORT_CREATE,
+               (x << 16) | y, (width << 16) | height,
+               NULL, NULL);
+}
+static void clear(void)
+{
+    async_msg(fbphone, FB_CLEAR, 0);
+}
+static void set_style(int fgcolor, int bgcolor)
+{
+    async_msg_2(fbphone, FB_SET_STYLE, fgcolor, bgcolor);
+}
+/** Transparent putchar */
+static void tran_putch(char c, int row, int col)
+{
+    async_msg_3(fbphone, FB_TRANS_PUTCHAR, c, row, col);
+}
+/** Redraw the button showing state of a given console */
+static void redraw_state(int consnum)
+{
+    char data[5];
+    int i;
+    enum butstate state = console_state[consnum];
+    vp_switch(cstatus_vp[consnum]);
+    if (ic_pixmaps[state] != -1)
+        async_msg_2(fbphone, FB_VP_DRAW_PIXMAP, cstatus_vp[consnum], ic_pixmaps[state]);
+    if (state != CONS_DISCONNECTED && state != CONS_KERNEL && state != CONS_DISCONNECTED_SEL) {
+        snprintf(data, 5, "%d", consnum+1);
+        for (i=0;data[i];i++)
+            tran_putch(data[i], 1, 2+i);
+    }
+}
+/** Notification run on changing console (except kernel console) */
+void gcons_change_console(int consnum)
+{
+    int i;
+    if (!use_gcons)
+        return;
+    if (active_console == KERNEL_CONSOLE) {
+        for (i=0; i < CONSOLE_COUNT; i++)
+            redraw_state(i);
+        if (animation != -1)
+            async_msg(fbphone, FB_ANIM_START, animation);
+    } else {
+        if (console_state[active_console] == CONS_DISCONNECTED_SEL)
+            console_state[active_console] = CONS_DISCONNECTED;
+        else
+            console_state[active_console] = CONS_IDLE;
+        redraw_state(active_console);
+    }
+    active_console = consnum;
+    if (console_state[consnum] == CONS_DISCONNECTED) {
+        console_state[consnum] = CONS_DISCONNECTED_SEL;
+        redraw_state(consnum);
+    } else
+        console_state[consnum] = CONS_SELECTED;
+    redraw_state(consnum);
+    vp_switch(console_vp);
+}
+/** Notification function that gets called on new output to virtual console */
+void gcons_notify_char(int consnum)
+{
+    if (!use_gcons)
+        return;
+    if (consnum == active_console || console_state[consnum] == CONS_HAS_DATA)
+        return;
+    console_state[consnum] = CONS_HAS_DATA;
+    if (active_console == KERNEL_CONSOLE)
+        return;
+    redraw_state(consnum);
+    vp_switch(console_vp);
+}
+/** Notification function called on service disconnect from console */
+void gcons_notify_disconnect(int consnum)
+{
+    if (!use_gcons)
+        return;
+    if (active_console == consnum)
+        console_state[consnum] = CONS_DISCONNECTED_SEL;
+    else
+        console_state[consnum] = CONS_DISCONNECTED;
+    if (active_console == KERNEL_CONSOLE)
+        return;
+    redraw_state(consnum);
+    vp_switch(console_vp);
+}
+/** Notification function called on console connect */
+void gcons_notify_connect(int consnum)
+{
+    if (!use_gcons)
+        return;
+    if (active_console == consnum)
+        console_state[consnum] = CONS_SELECTED;
+    else
+        console_state[consnum] = CONS_IDLE;
+    if (active_console == KERNEL_CONSOLE)
+        return;
+    redraw_state(consnum);
+    vp_switch(console_vp);
+}
+/** Change to kernel console */
+void gcons_in_kernel(void)
+{
+    if (console_state[active_console] == CONS_DISCONNECTED_SEL)
+        console_state[active_console] = CONS_DISCONNECTED;
+    else
+        console_state[active_console] = CONS_IDLE;
+    redraw_state(active_console);
+    if (animation != -1)
+        async_msg(fbphone, FB_ANIM_STOP, animation);
+    active_console = KERNEL_CONSOLE; /* Set to kernel console */
+    vp_switch(0);
+}
+/** Return x, where left <= x <= right && |a-x|==min(|a-x|) is smallest */
+static inline int limit(int a,int left, int right)
+{
+    if (a < left)
+        a = left;
+    if (a >= right)
+        a = right - 1;
+    return a;
+}
+int mouse_x, mouse_y;
+int btn_pressed, btn_x, btn_y;
+/** Handle mouse move
+ *
+ * @param dx Delta X of mouse move
+ * @param dy Delta Y of mouse move
+ */
+void gcons_mouse_move(int dx, int dy)
+{
+    mouse_x = limit(mouse_x+dx, 0, xres);
+    mouse_y = limit(mouse_y+dy, 0, yres);
+    async_msg_2(fbphone, FB_POINTER_MOVE, mouse_x, mouse_y);
+}
+static int gcons_find_conbut(int x, int y)
+{
+    int status_start = STATUS_START + (xres-800) / 2;;
+    if (y < STATUS_TOP || y >= STATUS_TOP+STATUS_HEIGHT)
+        return -1;
+    if (x < status_start)
+        return -1;
+    if (x >= status_start + (STATUS_WIDTH+STATUS_SPACE)*CONSOLE_COUNT)
+        return -1;
+    if (((x - status_start) % (STATUS_WIDTH+STATUS_SPACE)) < STATUS_SPACE)
+        return -1;
+    return (x-status_start) / (STATUS_WIDTH+STATUS_SPACE);
+}
+/** Handle mouse click
+ *
+ * @param state New state (1-pressed, 0-depressed)
+ */
+int gcons_mouse_btn(int state)
+{
+    int conbut;
+    if (state) {
+        conbut = gcons_find_conbut(mouse_x, mouse_y);
+        if (conbut != -1) {
+            btn_pressed = 1;
+            btn_x = mouse_x;
+            btn_y = mouse_y;
+        }
+        return -1;
+    }
+    if (!state && !btn_pressed)
+        return -1;
+    btn_pressed = 0;
+    conbut = gcons_find_conbut(mouse_x, mouse_y);
+    if (conbut == gcons_find_conbut(btn_x, btn_y))
+        return conbut;
+    return -1;
+}
+/** Draw a PPM pixmap to framebuffer
+ *
+ * @param logo Pointer to PPM data
+ * @param size Size of PPM data
+ * @param x Coordinate of upper left corner
+ * @param y Coordinate of upper left corner
+ */
+static void draw_pixmap(char *logo, size_t size, int x, int y)
+{
+    char *shm;
+    int rc;
+    /* Create area */
+    shm = mmap(NULL, size, PROTO_READ | PROTO_WRITE, MAP_SHARED | MAP_ANONYMOUS, 0, 0);
+    if (shm == MAP_FAILED)
+        return;
+    memcpy(shm, logo, size);
+    /* Send area */
+    rc = async_req_2(fbphone, FB_PREPARE_SHM, (ipcarg_t)shm, 0, NULL, NULL);
+    if (rc)
+        goto exit;
+    rc = async_req_3(fbphone, IPC_M_AS_AREA_SEND, (ipcarg_t)shm, 0, PROTO_READ, NULL, NULL, NULL);
+    if (rc)
+        goto drop;
+    /* Draw logo */
+    async_msg_2(fbphone, FB_DRAW_PPM, x, y);
+drop:
+    /* Drop area */
+    async_msg(fbphone, FB_DROP_SHM, 0);
+exit:
+    /* Remove area */
+    munmap(shm, size);
+}
+extern char _binary_helenos_ppm_start[0];
+extern int _binary_helenos_ppm_size;
+extern char _binary_nameic_ppm_start[0];
+extern int _binary_nameic_ppm_size;
+/** Redraws console graphics  */
+static void gcons_redraw_console(void)
+{
+    int i;
+    if (!use_gcons)
+        return;
+    vp_switch(0);
+    set_style(MAIN_COLOR, MAIN_COLOR);
+    clear();
+    draw_pixmap(_binary_helenos_ppm_start, (size_t)&_binary_helenos_ppm_size, xres-66, 2);
+    draw_pixmap(_binary_nameic_ppm_start, (size_t)&_binary_nameic_ppm_size, 5, 17);
+    for (i=0;i < CONSOLE_COUNT; i++)
+        redraw_state(i);
+    vp_switch(console_vp);
+}
+/** Creates a pixmap on framebuffer
+ *
+ * @param data PPM data
+ * @param size PPM data size
+ * @return Pixmap identification
+ */
+static int make_pixmap(char *data, int size)
+{
+    char *shm;
+    int rc;
+    int pxid = -1;
+    /* Create area */
+    shm = mmap(NULL, size, PROTO_READ | PROTO_WRITE, MAP_SHARED | MAP_ANONYMOUS, 0, 0);
+    if (shm == MAP_FAILED)
+        return -1;
+    memcpy(shm, data, size);
+    /* Send area */
+    rc = async_req_2(fbphone, FB_PREPARE_SHM, (ipcarg_t)shm, 0, NULL, NULL);
+    if (rc)
+        goto exit;
+    rc = async_req_3(fbphone, IPC_M_AS_AREA_SEND, (ipcarg_t)shm, 0, PROTO_READ, NULL, NULL, NULL);
+    if (rc)
+        goto drop;
+    /* Obtain pixmap */
+    rc = async_req(fbphone, FB_SHM2PIXMAP, 0, NULL);
+    if (rc < 0)
+        goto drop;
+    pxid = rc;
+drop:
+    /* Drop area */
+    async_msg(fbphone, FB_DROP_SHM, 0);
+exit:
+    /* Remove area */
+    munmap(shm, size);
+    return pxid;
+}
+extern char _binary_anim_1_ppm_start[0];
+extern int _binary_anim_1_ppm_size;
+extern char _binary_anim_2_ppm_start[0];
+extern int _binary_anim_2_ppm_size;
+extern char _binary_anim_3_ppm_start[0];
+extern int _binary_anim_3_ppm_size;
+extern char _binary_anim_4_ppm_start[0];
+extern int _binary_anim_4_ppm_size;
+static void make_anim(void)
+{
+    int an;
+    int pm;
+    an = async_req(fbphone, FB_ANIM_CREATE, cstatus_vp[KERNEL_CONSOLE], NULL);
+    if (an < 0)
+        return;
+    pm = make_pixmap(_binary_anim_1_ppm_start, (int)&_binary_anim_1_ppm_size);
+    async_msg_2(fbphone, FB_ANIM_ADDPIXMAP, an, pm);
+    pm = make_pixmap(_binary_anim_2_ppm_start, (int)&_binary_anim_2_ppm_size);
+    async_msg_2(fbphone, FB_ANIM_ADDPIXMAP, an, pm);
+    pm = make_pixmap(_binary_anim_3_ppm_start, (int)&_binary_anim_3_ppm_size);
+    async_msg_2(fbphone, FB_ANIM_ADDPIXMAP, an, pm);
+    pm = make_pixmap(_binary_anim_4_ppm_start, (int)&_binary_anim_4_ppm_size);
+    async_msg_2(fbphone, FB_ANIM_ADDPIXMAP, an, pm);
+    async_msg(fbphone, FB_ANIM_START, an);
+    animation = an;
+}
+extern char _binary_cons_selected_ppm_start[0];
+extern int _binary_cons_selected_ppm_size;
+extern char _binary_cons_idle_ppm_start[0];
+extern int _binary_cons_idle_ppm_size;
+extern char _binary_cons_has_data_ppm_start[0];
+extern int _binary_cons_has_data_ppm_size;
+extern char _binary_cons_kernel_ppm_start[0];
+extern int _binary_cons_kernel_ppm_size;
+/** Initialize nice graphical console environment */
+void gcons_init(int phone)
+{
+    int rc;
+    int i;
+    int status_start = STATUS_START;
+    fbphone = phone;
+    rc = async_req_2(phone, FB_GET_RESOLUTION, 0, 0, &xres, &yres);
+    if (rc)
+        return;
+    if (xres < 800 || yres < 600)
+        return;
+    /* create console viewport */
+    /* Align width & height to character size */
+    console_vp = vp_create(CONSOLE_MARGIN, CONSOLE_TOP,
+                   ALIGN_DOWN(xres-2*CONSOLE_MARGIN, 8),
+                   ALIGN_DOWN(yres-(CONSOLE_TOP+CONSOLE_MARGIN),16));
+    if (console_vp < 0)
+        return;
+    /* Create status buttons */
+    status_start += (xres-800) / 2;
+    for (i=0; i < CONSOLE_COUNT; i++) {
+        cstatus_vp[i] = vp_create(status_start+CONSOLE_MARGIN+i*(STATUS_WIDTH+STATUS_SPACE),
+                      STATUS_TOP, STATUS_WIDTH, STATUS_HEIGHT);
+        if (cstatus_vp[i] < 0)
+            return;
+        vp_switch(cstatus_vp[i]);
+        set_style(0x202020, 0xffffff);
+    }
+    /* Initialize icons */
+    ic_pixmaps[CONS_SELECTED] = make_pixmap(_binary_cons_selected_ppm_start,
+                          (int)&_binary_cons_selected_ppm_size);
+    ic_pixmaps[CONS_IDLE] = make_pixmap(_binary_cons_idle_ppm_start,
+                          (int)&_binary_cons_idle_ppm_size);
+    ic_pixmaps[CONS_HAS_DATA] = make_pixmap(_binary_cons_has_data_ppm_start,
+                        (int)&_binary_cons_has_data_ppm_size);
+    ic_pixmaps[CONS_DISCONNECTED] = make_pixmap(_binary_cons_idle_ppm_start,
+                          (int)&_binary_cons_idle_ppm_size);
+    ic_pixmaps[CONS_KERNEL] = make_pixmap(_binary_cons_kernel_ppm_start,
+                          (int)&_binary_cons_kernel_ppm_size);
+    ic_pixmaps[CONS_DISCONNECTED_SEL] = ic_pixmaps[CONS_SELECTED];
+    make_anim();
+    use_gcons = 1;
+    console_state[0] = CONS_DISCONNECTED_SEL;
+    console_state[KERNEL_CONSOLE] = CONS_KERNEL;
+    gcons_redraw_console();
+}
+/** @}
+ */

 /tags/0.2.0.2/uspace/console/console.c
 ,0 → 1,533
+/*
+ * Copyright (C) 2006 Josef Cejka
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/** @addtogroup console
+ * @{
+ */
+/** @file
+ */
+/* TODO: remove */
+#include <stdio.h>
+#include <fb.h>
+#include <ipc/ipc.h>
+#include <keys.h>
+#include <ipc/fb.h>
+#include <ipc/services.h>
+#include <errno.h>
+#include <key_buffer.h>
+#include <console.h>
+#include <unistd.h>
+#include <async.h>
+#include <libadt/fifo.h>
+#include <screenbuffer.h>
+#include <sys/mman.h>
+#include "gcons.h"
+#define MAX_KEYREQUESTS_BUFFERED 32
+#define NAME "CONSOLE"
+/** Index of currently used virtual console.
+ */
+int active_console = 0;
+/** Information about framebuffer
+ */
+struct {
+    int phone;      /**< Framebuffer phone */
+    ipcarg_t rows;      /**< Framebuffer rows */
+    ipcarg_t cols;      /**< Framebuffer columns */
+} fb_info;
+typedef struct {
+    keybuffer_t keybuffer;      /**< Buffer for incoming keys. */
+    FIFO_CREATE_STATIC(keyrequests, ipc_callid_t , MAX_KEYREQUESTS_BUFFERED);   /**< Buffer for unsatisfied request for keys. */
+    int keyrequest_counter;     /**< Number of requests in buffer. */
+    int client_phone;       /**< Phone to connected client. */
+    int used;           /**< 1 if this virtual console is connected to some client.*/
+    screenbuffer_t screenbuffer;    /**< Screenbuffer for saving screen contents and related settings. */
+} connection_t;
+static connection_t connections[CONSOLE_COUNT]; /**< Array of data for virtual consoles */
+static keyfield_t *interbuffer = NULL;          /**< Pointer to memory shared with framebufer used for faster virt. console switching */
+static int kernel_pixmap = -1;      /**< Number of fb pixmap, where kernel console is stored */
+/** Find unused virtual console.
+ *
+ */
+static int find_free_connection(void)
+{
+    int i = 0;
+    for (i=0; i < CONSOLE_COUNT; i++) {
+        if (!connections[i].used)
+            return i;
+    }
+    return -1;
+}
+static void clrscr(void)
+{
+    async_msg(fb_info.phone, FB_CLEAR, 0);
+}
+static void curs_visibility(int v)
+{
+    async_msg(fb_info.phone, FB_CURSOR_VISIBILITY, v);
+}
+static void curs_goto(int row, int col)
+{
+    async_msg_2(fb_info.phone, FB_CURSOR_GOTO, row, col);
+}
+static void set_style(style_t *style)
+{
+    async_msg_2(fb_info.phone, FB_SET_STYLE, style->fg_color, style->bg_color);
+}
+static void set_style_col(int fgcolor, int bgcolor)
+{
+    async_msg_2(fb_info.phone, FB_SET_STYLE, fgcolor, bgcolor);
+}
+static void prtchr(char c, int row, int col)
+{
+    async_msg_3(fb_info.phone, FB_PUTCHAR, c, row, col);
+}
+/** Check key and process special keys.
+ *
+ * */
+static void write_char(int console, char key)
+{
+    screenbuffer_t *scr = &(connections[console].screenbuffer);
+    switch (key) {
+        case '\n':
+            scr->position_y += 1;
+            scr->position_x =  0;
+            break;
+        case '\r':
+            break;
+        case '\t':
+            scr->position_x += 8;
+            scr->position_x -= scr->position_x % 8;
+            break;
+        case '\b':
+            if (scr->position_x == 0)
+                break;
+            scr->position_x--;
+            if (console == active_console)
+                prtchr(' ', scr->position_y, scr->position_x);
+            screenbuffer_putchar(scr, ' ');
+            break;
+        default:
+            if (console == active_console)
+                prtchr(key, scr->position_y, scr->position_x);
+            screenbuffer_putchar(scr, key);
+            scr->position_x++;
+    }
+    scr->position_y += (scr->position_x >= scr->size_x);
+    if (scr->position_y >= scr->size_y) {
+        scr->position_y = scr->size_y - 1;
+        screenbuffer_clear_line(scr, scr->top_line);
+        scr->top_line = (scr->top_line+1) % scr->size_y;
+        if (console == active_console)
+            async_msg(fb_info.phone, FB_SCROLL, 1);
+    }
+    scr->position_x = scr->position_x % scr->size_x;
+    if (console == active_console)
+        curs_goto(scr->position_y, scr->position_x);
+}
+/** Save current screen to pixmap, draw old pixmap
+ *
+ * @param oldpixmap Old pixmap
+ * @return ID of pixmap of current screen
+ */
+static int switch_screens(int oldpixmap)
+{
+    int newpmap;
+    /* Save screen */
+    newpmap = async_req(fb_info.phone, FB_VP2PIXMAP, 0, NULL);
+    if (newpmap < 0)
+        return -1;
+    if (oldpixmap != -1) {
+        /* Show old screen */
+        async_msg_2(fb_info.phone, FB_VP_DRAW_PIXMAP, 0, oldpixmap);
+        /* Drop old pixmap */
+        async_msg(fb_info.phone, FB_DROP_PIXMAP, oldpixmap);
+    }
+    return newpmap;
+}
+/** Switch to new console */
+static void change_console(int newcons)
+{
+    connection_t *conn;
+    static int console_pixmap = -1;
+    int i, j, rc;
+    keyfield_t *field;
+    style_t *style;
+    if (newcons == active_console)
+        return;
+    if (newcons == KERNEL_CONSOLE) {
+        if (active_console == KERNEL_CONSOLE)
+            return;
+        active_console = KERNEL_CONSOLE;
+        curs_visibility(0);
+        async_serialize_start();
+        if (kernel_pixmap == -1) {
+            /* store/restore unsupported */
+            set_style_col(DEFAULT_FOREGROUND, DEFAULT_BACKGROUND);
+            clrscr();
+        } else {
+            gcons_in_kernel();
+            console_pixmap = switch_screens(kernel_pixmap);
+            kernel_pixmap = -1;
+        }
+        async_serialize_end();
+        __SYSCALL0(SYS_DEBUG_ENABLE_CONSOLE);
+        return;
+    }
+    async_serialize_start();
+    if (console_pixmap != -1) {
+        kernel_pixmap = switch_screens(console_pixmap);
+        console_pixmap = -1;
+    }
+    active_console = newcons;
+    gcons_change_console(newcons);
+    conn = &connections[active_console];
+    set_style(&conn->screenbuffer.style);
+    curs_visibility(0);
+    if (interbuffer) {
+        for (i = 0; i < conn->screenbuffer.size_x; i++)
+            for (j = 0; j < conn->screenbuffer.size_y; j++)
+                interbuffer[i + j*conn->screenbuffer.size_x] = *get_field_at(&(conn->screenbuffer),i, j);
+        /* This call can preempt, but we are already at the end */
+        rc = async_req_2(fb_info.phone, FB_DRAW_TEXT_DATA, 0, 0, NULL, NULL);
+    };
+    if ((!interbuffer) || (rc != 0)) {
+        set_style(&conn->screenbuffer.style);
+        clrscr();
+        style = &conn->screenbuffer.style;
+        for (j = 0; j < conn->screenbuffer.size_y; j++)
+            for (i = 0; i < conn->screenbuffer.size_x; i++) {
+                field = get_field_at(&(conn->screenbuffer),i, j);
+                if (!style_same(*style, field->style))
+                    set_style(&field->style);
+                style = &field->style;
+                if ((field->character == ' ') && (style_same(field->style, conn->screenbuffer.style)))
+                    continue;
+                prtchr(field->character, j, i);
+            }
+    }
+    curs_goto(conn->screenbuffer.position_y, conn->screenbuffer.position_x);
+    curs_visibility(conn->screenbuffer.is_cursor_visible);
+    async_serialize_end();
+}
+/** Handler for keyboard */
+static void keyboard_events(ipc_callid_t iid, ipc_call_t *icall)
+{
+    ipc_callid_t callid;
+    ipc_call_t call;
+    int retval;
+    int c;
+    connection_t *conn;
+    int newcon;
+    /* Ignore parameters, the connection is alread opened */
+    while (1) {
+        callid = async_get_call(&call);
+        switch (IPC_GET_METHOD(call)) {
+        case IPC_M_PHONE_HUNGUP:
+            /* TODO: Handle hangup */
+            return;
+        case KBD_MS_LEFT:
+            newcon = gcons_mouse_btn(IPC_GET_ARG1(call));
+            if (newcon != -1)
+                change_console(newcon);
+            retval = 0;
+            break;
+        case KBD_MS_MOVE:
+            gcons_mouse_move(IPC_GET_ARG1(call), IPC_GET_ARG2(call));
+            retval = 0;
+            break;
+        case KBD_PUSHCHAR:
+            /* got key from keyboard driver */
+            retval = 0;
+            c = IPC_GET_ARG1(call);
+            /* switch to another virtual console */
+            conn = &connections[active_console];
+//          if ((c >= KBD_KEY_F1) && (c < KBD_KEY_F1 + CONSOLE_COUNT)) {
+            if ((c >= 0x101) && (c < 0x101 + CONSOLE_COUNT)) {
+                if (c == 0x112)
+                    change_console(KERNEL_CONSOLE);
+                else
+                    change_console(c - 0x101);
+                break;
+            }
+            /* if client is awaiting key, send it */
+            if (conn->keyrequest_counter > 0) {
+                conn->keyrequest_counter--;
+                ipc_answer_fast(fifo_pop(conn->keyrequests), 0, c, 0);
+                break;
+            }
+            keybuffer_push(&conn->keybuffer, c);
+            retval = 0;
+            break;
+        default:
+            retval = ENOENT;
+        }
+        ipc_answer_fast(callid, retval, 0, 0);
+    }
+}
+/** Default thread for new connections */
+static void client_connection(ipc_callid_t iid, ipc_call_t *icall)
+{
+    ipc_callid_t callid;
+    ipc_call_t call;
+    int consnum;
+    ipcarg_t arg1, arg2;
+    connection_t *conn;
+    if ((consnum = find_free_connection()) == -1) {
+        ipc_answer_fast(iid,ELIMIT,0,0);
+        return;
+    }
+    conn = &connections[consnum];
+    conn->used = 1;
+    async_serialize_start();
+    gcons_notify_connect(consnum);
+    conn->client_phone = IPC_GET_ARG3(call);
+    screenbuffer_clear(&conn->screenbuffer);
+    /* Accept the connection */
+    ipc_answer_fast(iid,0,0,0);
+    while (1) {
+        async_serialize_end();
+        callid = async_get_call(&call);
+        async_serialize_start();
+        arg1 = arg2 = 0;
+        switch (IPC_GET_METHOD(call)) {
+        case IPC_M_PHONE_HUNGUP:
+            gcons_notify_disconnect(consnum);
+            /* Answer all pending requests */
+            while (conn->keyrequest_counter > 0) {
+                conn->keyrequest_counter--;
+                ipc_answer_fast(fifo_pop(conn->keyrequests), ENOENT, 0, 0);
+                break;
+            }
+            conn->used = 0;
+            return;
+        case CONSOLE_PUTCHAR:
+            write_char(consnum, IPC_GET_ARG1(call));
+            gcons_notify_char(consnum);
+            break;
+        case CONSOLE_CLEAR:
+            /* Send message to fb */
+            if (consnum == active_console) {
+                async_msg(fb_info.phone, FB_CLEAR, 0);
+            }
+            screenbuffer_clear(&conn->screenbuffer);
+            break;
+        case CONSOLE_GOTO:
+            screenbuffer_goto(&conn->screenbuffer, IPC_GET_ARG2(call), IPC_GET_ARG1(call));
+            if (consnum == active_console)
+                curs_goto(IPC_GET_ARG1(call),IPC_GET_ARG2(call));
+            break;
+        case CONSOLE_GETSIZE:
+            arg1 = fb_info.rows;
+            arg2 = fb_info.cols;
+            break;
+        case CONSOLE_FLUSH:
+            if (consnum == active_console)
+                async_req_2(fb_info.phone, FB_FLUSH, 0, 0, NULL, NULL);
+            break;
+        case CONSOLE_SET_STYLE:
+            arg1 = IPC_GET_ARG1(call);
+            arg2 = IPC_GET_ARG2(call);
+            screenbuffer_set_style(&conn->screenbuffer,arg1, arg2);
+            if (consnum == active_console)
+                set_style_col(arg1, arg2);
+            break;
+        case CONSOLE_CURSOR_VISIBILITY:
+            arg1 = IPC_GET_ARG1(call);
+            conn->screenbuffer.is_cursor_visible = arg1;
+            if (consnum == active_console)
+                curs_visibility(arg1);
+            break;
+        case CONSOLE_GETCHAR:
+            if (keybuffer_empty(&conn->keybuffer)) {
+                /* buffer is empty -> store request */
+                if (conn->keyrequest_counter < MAX_KEYREQUESTS_BUFFERED) {
+                    fifo_push(conn->keyrequests, callid);
+                    conn->keyrequest_counter++;
+                } else {
+                    /* no key available and too many requests => fail */
+                    ipc_answer_fast(callid, ELIMIT, 0, 0);
+                }
+                continue;
+            };
+            keybuffer_pop(&conn->keybuffer, (int *)&arg1);
+            break;
+        }
+        ipc_answer_fast(callid, 0, arg1, arg2);
+    }
+}
+int main(int argc, char *argv[])
+{
+    ipcarg_t phonehash;
+    int kbd_phone;
+    int i;
+    async_set_client_connection(client_connection);
+    /* Connect to keyboard driver */
+    while ((kbd_phone = ipc_connect_me_to(PHONE_NS, SERVICE_KEYBOARD, 0)) < 0) {
+        usleep(10000);
+    };
+    if (ipc_connect_to_me(kbd_phone, SERVICE_CONSOLE, 0, &phonehash) != 0) {
+        return -1;
+    };
+    async_new_connection(phonehash, 0, NULL, keyboard_events);
+    /* Connect to framebuffer driver */
+    while ((fb_info.phone = ipc_connect_me_to(PHONE_NS, SERVICE_VIDEO, 0)) < 0) {
+        usleep(10000);
+    }
+    /* Save old kernel screen */
+    kernel_pixmap = switch_screens(-1);
+    /* Initialize gcons */
+    gcons_init(fb_info.phone);
+    /* Synchronize, the gcons can have something in queue */
+    async_req(fb_info.phone, FB_FLUSH, 0, NULL);
+    /* Enable double buffering */
+    async_msg_2(fb_info.phone, FB_VIEWPORT_DB, (sysarg_t)-1, 1);
+    async_req_2(fb_info.phone, FB_GET_CSIZE, 0, 0, &(fb_info.rows), &(fb_info.cols));
+    set_style_col(DEFAULT_FOREGROUND, DEFAULT_BACKGROUND);
+    clrscr();
+    /* Init virtual consoles */
+    for (i = 0; i < CONSOLE_COUNT; i++) {
+        connections[i].used = 0;
+        keybuffer_init(&(connections[i].keybuffer));
+        connections[i].keyrequests.head = connections[i].keyrequests.tail = 0;
+        connections[i].keyrequests.items = MAX_KEYREQUESTS_BUFFERED;
+        connections[i].keyrequest_counter = 0;
+        if (screenbuffer_init(&(connections[i].screenbuffer), fb_info.cols, fb_info.rows ) == NULL) {
+            /*FIXME: handle error */
+            return -1;
+        }
+    }
+    connections[KERNEL_CONSOLE].used = 1;
+    if ((interbuffer = mmap(NULL, sizeof(keyfield_t) * fb_info.cols * fb_info.rows , PROTO_READ|PROTO_WRITE, MAP_ANONYMOUS|MAP_PRIVATE, 0 ,0 )) != NULL) {
+        if (async_req_3(fb_info.phone, IPC_M_AS_AREA_SEND, (ipcarg_t)interbuffer, 0, AS_AREA_READ, NULL, NULL, NULL) != 0) {
+            munmap(interbuffer, sizeof(keyfield_t) * fb_info.cols * fb_info.rows);
+            interbuffer = NULL;
+        }
+    }
+    curs_goto(0,0);
+    curs_visibility(connections[active_console].screenbuffer.is_cursor_visible);
+    /* Register at NS */
+    if (ipc_connect_to_me(PHONE_NS, SERVICE_CONSOLE, 0, &phonehash) != 0) {
+        return -1;
+    };
+    async_manager();
+    return 0;
+}
+/** @}
+ */

 /tags/0.2.0.2/uspace/console/gcons.h
 ,0 → 1,51
+/*
+ * Copyright (C) 2006 Ondrej Palkovsky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/** @addtogroup console
+ * @{
+ */
+/** @file
+ */
+#ifndef _GCONS_H_
+#define _GCONS_H_
+void gcons_init(int phone);
+void gcons_change_console(int consnum);
+void gcons_notify_char(int consnum);
+void gcons_in_kernel(void);
+void gcons_notify_connect(int consnum);
+void gcons_notify_disconnect(int consnum);
+void gcons_mouse_move(int dx, int dy);
+int gcons_mouse_btn(int state);
+#endif
+/** @}
+ */

 /tags/0.2.0.2/uspace/console/console.h
 ,0 → 1,56
+/*
+ * Copyright (C) 2006 Josef Cejka
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/** @addtogroup console
+ * @{
+ */
+/** @file
+ */
+#ifndef __CONSOLE_H__
+#define __CONSOLE_H__
+#define KERNEL_CONSOLE 11
+#define CONSOLE_COUNT 12
+#define CONSOLE_GETCHAR     1026
+#define CONSOLE_PUTCHAR     1027
+#define CONSOLE_CLEAR       1028
+#define CONSOLE_GOTO        1029
+#define CONSOLE_GETSIZE     1030
+#define CONSOLE_FLUSH       1031
+#define CONSOLE_SET_STYLE   1032
+#define CONSOLE_CURSOR_VISIBILITY   1033
+#endif
+/** @}
+ */

 /tags/0.2.0.2/uspace/console/screenbuffer.c
 ,0 → 1,145
+/*
+ * Copyright (C) 2006 Josef Cejka
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/** @addtogroup console
+ * @{
+ */
+/** @file
+ */
+#include <screenbuffer.h>
+#include <malloc.h>
+#include <unistd.h>
+/** Store one character to screenbuffer. Its position is determined by scr->position_x and scr->position_y.
+ * @param scr   screenbuffer
+ * @param c stored character
+ */
+void screenbuffer_putchar(screenbuffer_t *scr, char c)
+{
+    keyfield_t *field;
+    field = get_field_at(scr, scr->position_x, scr->position_y);
+    field->character = c;
+    field->style = scr->style;
+}
+/** Initilize screenbuffer. Allocate space for screen content in accordance to given size.
+ * @param scr       initialized screenbuffer
+ * @param size_x    width in characters
+ * @param size_y    height in characters
+ * @return pointer to screenbuffer (same as scr parameter) or NULL
+ */
+screenbuffer_t *screenbuffer_init(screenbuffer_t *scr, int size_x, int size_y)
+{
+    if ((scr->buffer = (keyfield_t *)malloc(sizeof(keyfield_t) * size_x * size_y)) == NULL) {
+        return NULL;
+    }
+    scr->size_x = size_x;
+    scr->size_y = size_y;
+    scr->style.fg_color = DEFAULT_FOREGROUND;
+    scr->style.bg_color = DEFAULT_BACKGROUND;
+    scr->is_cursor_visible = 1;
+    screenbuffer_clear(scr);
+    return scr;
+}
+/** Clear screenbuffer.
+ * @param scr screenbuffer
+ */
+void screenbuffer_clear(screenbuffer_t *scr)
+{
+    unsigned int i;
+    for (i = 0; i < (scr->size_x * scr->size_y); i++) {
+        scr->buffer[i].character = ' ';
+        scr->buffer[i].style = scr->style;
+    }
+    scr->top_line = 0;
+    scr->position_y = 0;
+    scr->position_x = 0;
+}
+/** Clear one buffer line.
+ * @param scr
+ * @param line One buffer line (not a screen line!)
+ */
+void screenbuffer_clear_line(screenbuffer_t *scr, unsigned int line)
+{
+    unsigned int i;
+    for (i = 0; i < scr->size_x; i++) {
+        scr->buffer[i + line*scr->size_x].character = ' ';
+        scr->buffer[i + line*scr->size_x].style = scr->style;
+    }
+}
+/** Copy content buffer from screenbuffer to given memory.
+ * @param scr   source screenbuffer
+ * @param dest  destination
+ */
+void screenbuffer_copy_buffer(screenbuffer_t *scr, keyfield_t *dest)
+{
+    unsigned int i;
+    for (i = 0; i < scr->size_x * scr->size_y; i++) {
+        dest[i] = scr->buffer[i];
+    }
+}
+/** Set new cursor position in screenbuffer.
+ * @param scr
+ * @param x
+ * @param y
+ */
+void screenbuffer_goto(screenbuffer_t *scr, unsigned int x, unsigned int y)
+{
+    scr->position_x = x % scr->size_x;
+    scr->position_y = y % scr->size_y;
+}
+/** Set new style.
+ * @param scr
+ * @param fg_color
+ * @param bg_color
+ */
+void screenbuffer_set_style(screenbuffer_t *scr, unsigned int fg_color, unsigned int bg_color)
+{
+    scr->style.fg_color = fg_color;
+    scr->style.bg_color = bg_color;
+}
+/** @}
+ */

 /tags/0.2.0.2/uspace/console/screenbuffer.h
 ,0 → 1,100
+/*
+ * Copyright (C) 2006 Josef Cejka
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/** @addtogroup console
+ * @{
+ */
+/** @file
+ */
+#ifndef __SCREENBUFFER_H__
+#define __SCREENBUFFER_H__
+#define DEFAULT_FOREGROUND 0x0  /**< default console foreground color */
+#define DEFAULT_BACKGROUND 0xf0f0f0 /**< default console background color */
+typedef struct {
+    unsigned int bg_color;      /**< background color */
+    unsigned int fg_color;      /**< foreground color */
+} style_t;
+/** One field on screen. It contain one character and its attributes. */
+typedef struct {
+    char character;         /**< Character itself */
+    style_t style;          /**< Character`s attributes */
+} keyfield_t;
+/** Structure for buffering state of one virtual console.
+ */
+typedef struct {
+    keyfield_t *buffer;         /**< Screen content - characters and its style. Used as cyclyc buffer. */
+    unsigned int size_x, size_y;        /**< Number of columns and rows */
+    unsigned int position_x, position_y;    /**< Coordinates of last printed character for determining cursor position */
+    style_t style;              /**< Current style */
+    unsigned int top_line;          /**< Points to buffer[][] line that will be printed at screen as the first line */
+    unsigned char is_cursor_visible;    /**< Cursor state - default is visible */
+} screenbuffer_t;
+/** Returns keyfield for position on screen. Screenbuffer->buffer is cyclic buffer so we must couted in index of the topmost line.
+ * @param scr   screenbuffer
+ * @param x position on screen
+ * @param y position on screen
+ * @return  keyfield structure with character and its attributes on x,y
+ */
+static inline keyfield_t *get_field_at(screenbuffer_t *scr, unsigned int x, unsigned int y)
+{
+    return scr->buffer + x + ((y + scr->top_line) % scr->size_y) * scr->size_x;
+}
+/** Compares two styles.
+ * @param s1 first style
+ * @param s2 second style
+ * @return nonzero on equality
+ */
+static inline int style_same(style_t s1, style_t s2)
+{
+    return s1.fg_color == s2.fg_color && s1.bg_color == s2.bg_color;
+}
+void screenbuffer_putchar(screenbuffer_t *scr, char c);
+screenbuffer_t *screenbuffer_init(screenbuffer_t *scr, int size_x, int size_y);
+void screenbuffer_clear(screenbuffer_t *scr);
+void screenbuffer_clear_line(screenbuffer_t *scr, unsigned int line);
+void screenbuffer_copy_buffer(screenbuffer_t *scr, keyfield_t *dest);
+void screenbuffer_goto(screenbuffer_t *scr, unsigned int x, unsigned int y);
+void screenbuffer_set_style(screenbuffer_t *scr, unsigned int fg_color, unsigned int bg_color);
+#endif
+/** @}
+ */

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 /tags/0.2.0.2/uspace/console/Makefile
 ,0 → 1,88
+#
+# Copyright (C) 2005 Martin Decky
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# - Redistributions of source code must retain the above copyright
+#   notice, this list of conditions and the following disclaimer.
+# - Redistributions in binary form must reproduce the above copyright
+#   notice, this list of conditions and the following disclaimer in the
+#   documentation and/or other materials provided with the distribution.
+# - The name of the author may not be used to endorse or promote products
+#   derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+## Setup toolchain
+#
+LIBC_PREFIX = ../libc
+SOFTINT_PREFIX = ../softint
+include $(LIBC_PREFIX)/Makefile.toolchain
+CFLAGS += -I. -I../kbd/include -I../fb
+LIBS = $(LIBC_PREFIX)/libc.a
+## Sources
+#
+OUTPUT = console
+GENERIC_SOURCES = \
+    console.c \
+    screenbuffer.c \
+    ../kbd/generic/key_buffer.c \
+    gcons.c
+IMAGES = helenos.ppm nameic.ppm cons_selected.ppm cons_idle.ppm \
+    cons_has_data.ppm cons_kernel.ppm anim_1.ppm anim_2.ppm anim_3.ppm \
+    anim_4.ppm
+ARCH_SOURCES =
+GENERIC_OBJECTS := $(addsuffix .o,$(basename $(GENERIC_SOURCES))) \
+            $(addsuffix .o,$(basename $(IMAGES)))
+ARCH_OBJECTS := $(addsuffix .o,$(basename $(ARCH_SOURCES)))
+.PHONY: all clean depend disasm
+all: $(OUTPUT) disasm
+-include Makefile.depend
+clean:
+    -rm -f $(OUTPUT) $(OUTPUT).map $(OUTPUT).disasm Makefile.depend
+depend:
+    $(CC) $(DEFS) $(CFLAGS) -M $(SOURCES) > Makefile.depend
+$(OUTPUT): $(ARCH_OBJECTS) $(GENERIC_OBJECTS) $(LIBS)
+    $(LD) -T $(LIBC_PREFIX)/arch/$(ARCH)/_link.ld -e __entry_driver $(GENERIC_OBJECTS) $(ARCH_OBJECTS) $(LIBS) $(LFLAGS) -o $@ -Map $(OUTPUT).map
+disasm:
+    $(OBJDUMP) -d $(OUTPUT) >$(OUTPUT).disasm
+%.o: %.S
+    $(CC) $(DEFS) $(AFLAGS) $(CFLAGS) -D__ASM__ -c $< -o $@
+%.o: %.s
+    $(AS) $(AFLAGS) $< -o $@
+%.o: %.c
+    $(CC) $(DEFS) $(CFLAGS) -c $< -o $@
+%.o: %.ppm
+    $(OBJCOPY) -I binary -O $(BFD_NAME) -B $(BFD_ARCH) $< $@

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 /tags/0.2.0.2/uspace/init/init.c
 ,0 → 1,63
+/*
+ * Copyright (C) 2005 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/** @addtogroup init Init
+ * @brief   Init process for testing purposes.
+ * @{
+ */
+/**
+ * @file
+ */
+#include "version.h"
+#include <stdio.h>
+static void test_console(void)
+{
+    int c;
+    while ((c = getchar()) != EOF)
+        putchar(c);
+}
+int main(int argc, char *argv[])
+{
+    version_print();
+    printf("Hello\nThis is Init\n");
+    test_console();
+    printf("\nBye.\n");
+    return 0;
+}
+/** @}
+ */

 /tags/0.2.0.2/uspace/init/version.c
 ,0 → 1,49
+/*
+ * Copyright (C) 2006 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/** @addtogroup init
+ * @{
+ */
+/**
+ * @file
+ */
+#include <unistd.h>
+#include <stdio.h>
+#include "version.h"
+/** Print version information. */
+void version_print(void)
+{
+    puts("HelenOS init");
+    puts("Copyright (C) 2006 HelenOS project");
+}
+/** @}
+ */

 /tags/0.2.0.2/uspace/init/init.h
 ,0 → 1,45
+/*
+ * Copyright (C) 2006 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/** @addtogroup init
+ * @{
+ */
+/**
+ * @file
+ */
+#ifndef __INIT_H__
+#define __INIT_H__
+#include "version.h"
+#endif
+/** @}
+ */

 /tags/0.2.0.2/uspace/init/version.h
 ,0 → 1,45
+/*
+ * Copyright (C) 2006 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/** @addtogroup init
+ * @{
+ */
+/**
+ * @file
+ */
+#ifndef __VERSION_H__
+#define __VERSION_H__
+extern void version_print(void);
+#endif
+/** @}
+ */

 /tags/0.2.0.2/uspace/init/Makefile
 ,0 → 1,75
+#
+# Copyright (C) 2005 Martin Decky
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# - Redistributions of source code must retain the above copyright
+#   notice, this list of conditions and the following disclaimer.
+# - Redistributions in binary form must reproduce the above copyright
+#   notice, this list of conditions and the following disclaimer in the
+#   documentation and/or other materials provided with the distribution.
+# - The name of the author may not be used to endorse or promote products
+#   derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+## Setup toolchain
+#
+LIBC_PREFIX = ../libc
+SOFTINT_PREFIX = ../softint
+include $(LIBC_PREFIX)/Makefile.toolchain
+CFLAGS += -I../kbd/include
+LIBS = $(LIBC_PREFIX)/libc.a
+## Sources
+#
+OUTPUT = init
+SOURCES = \
+    init.c \
+    version.c
+OBJECTS := $(addsuffix .o,$(basename $(SOURCES)))
+.PHONY: all clean depend disasm
+all: $(OUTPUT) disasm
+-include Makefile.depend
+clean:
+    -rm -f $(OUTPUT) $(OUTPUT).map $(OUTPUT).disasm Makefile.depend
+depend:
+    $(CC) $(DEFS) $(CFLAGS) -M $(SOURCES) > Makefile.depend
+$(OUTPUT): $(OBJECTS) $(LIBS)
+    $(LD) -T $(LIBC_PREFIX)/arch/$(ARCH)/_link.ld $(OBJECTS) $(LIBS) $(LFLAGS) -o $@ -Map $(OUTPUT).map
+disasm:
+    $(OBJDUMP) -d $(OUTPUT) >$(OUTPUT).disasm
+%.o: %.S
+    $(CC) $(DEFS) $(AFLAGS) $(CFLAGS) -D__ASM__ -c $< -o $@
+%.o: %.s
+    $(AS) $(AFLAGS) $< -o $@
+%.o: %.c
+    $(CC) $(DEFS) $(CFLAGS) -c $< -o $@

 /tags/0.2.0.2/uspace/doc/doxygroups.h
 ,0 → 1,56
+/* Definitions of modules and its relations for generating Doxygen documentation */
+/**
+ * @defgroup srvcs HelenOS Services
+ * @ingroup uspace
+ */
+    /**
+     * @defgroup ns Naming Service
+     * @ingroup srvcs
+     */
+    /**
+     * @defgroup kbd Keyboard Service
+     * @ingroup srvcs
+     */
+    /**
+     * @defgroup fbs Framebuffer Service
+     * @ingroup srvcs
+     */
+    /**
+     * @defgroup console Console Service
+     * @ingroup srvcs
+     */
+    /**
+     * @cond amd64
+     * @defgroup pci PCI Service
+     * @ingroup srvcs
+     * @endcond
+     */
+    /**
+     * @cond ia32
+     * @defgroup pci PCI Service
+     * @ingroup srvcs
+     * @endcond
+     */
+/**
+ * @defgroup emul Emulation Libraries
+ * @ingroup uspace
+ */
+    /**
+     * @defgroup sfl Softloat
+     * @ingroup emul
+     */
+    /**
+     * @defgroup softint Softint
+     * @ingroup emul
+     */

 /tags/0.2.0.2/uspace/libc/generic/ipc.c
 ,0 → 1,472
+/*
+ * Copyright (C) 2006 Ondrej Palkovsky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/** @addtogroup libc
+ * @{
+ * @}
+ */
+ /** @addtogroup libcipc IPC
+ * @brief HelenOS uspace IPC
+ * @{
+ * @ingroup libc
+ */
+/** @file
+ */
+#include <ipc/ipc.h>
+#include <libc.h>
+#include <malloc.h>
+#include <errno.h>
+#include <libadt/list.h>
+#include <stdio.h>
+#include <unistd.h>
+#include <futex.h>
+#include <kernel/synch/synch.h>
+#include <async.h>
+#include <psthread.h>
+/** Structure used for keeping track of sent async msgs
+ * and queing unsent msgs
+ *
+ */
+typedef struct {
+    link_t list;
+    ipc_async_callback_t callback;
+    void *private;
+    union {
+        ipc_callid_t callid;
+        struct {
+            ipc_call_t data;
+            int phoneid;
+        } msg;
+    }u;
+    pstid_t ptid;   /**< Thread waiting for sending this msg */
+} async_call_t;
+LIST_INITIALIZE(dispatched_calls);
+/* queued_calls is protcted by async_futex, because if the
+ * call cannot be sent into kernel, async framework is used
+ * automatically
+ */
+LIST_INITIALIZE(queued_calls); /**< List of async calls that were not accepted
+                *   by kernel */
+static atomic_t ipc_futex = FUTEX_INITIALIZER;
+int ipc_call_sync(int phoneid, ipcarg_t method, ipcarg_t arg1,
+          ipcarg_t *result)
+{
+    ipc_call_t resdata;
+    int callres;
+    callres = __SYSCALL4(SYS_IPC_CALL_SYNC_FAST, phoneid, method, arg1,
+                 (sysarg_t)&resdata);
+    if (callres)
+        return callres;
+    if (result)
+        *result = IPC_GET_ARG1(resdata);
+    return IPC_GET_RETVAL(resdata);
+}
+int ipc_call_sync_3(int phoneid, ipcarg_t method, ipcarg_t arg1,
+            ipcarg_t arg2, ipcarg_t arg3,
+            ipcarg_t *result1, ipcarg_t *result2, ipcarg_t *result3)
+{
+    ipc_call_t data;
+    int callres;
+    IPC_SET_METHOD(data, method);
+    IPC_SET_ARG1(data, arg1);
+    IPC_SET_ARG2(data, arg2);
+    IPC_SET_ARG3(data, arg3);
+    callres = __SYSCALL3(SYS_IPC_CALL_SYNC, phoneid, (sysarg_t)&data,
+                 (sysarg_t)&data);
+    if (callres)
+        return callres;
+    if (result1)
+        *result1 = IPC_GET_ARG1(data);
+    if (result2)
+        *result2 = IPC_GET_ARG2(data);
+    if (result3)
+        *result3 = IPC_GET_ARG3(data);
+    return IPC_GET_RETVAL(data);
+}
+/** Syscall to send asynchronous message */
+static  ipc_callid_t _ipc_call_async(int phoneid, ipc_call_t *data)
+{
+    return __SYSCALL2(SYS_IPC_CALL_ASYNC, phoneid, (sysarg_t)data);
+}
+/** Prolog to ipc_async_send functions */
+static inline async_call_t *ipc_prepare_async(void *private, ipc_async_callback_t callback)
+{
+    async_call_t *call;
+    call = malloc(sizeof(*call));
+    if (!call) {
+        if (callback)
+            callback(private, ENOMEM, NULL);
+        return NULL;
+    }
+    call->callback = callback;
+    call->private = private;
+    return call;
+}
+/** Epilogue of ipc_async_send functions */
+static inline void ipc_finish_async(ipc_callid_t callid, int phoneid,
+                    async_call_t *call, int can_preempt)
+{
+    if (!call) { /* Nothing to do regardless if failed or not */
+        futex_up(&ipc_futex);
+        return;
+    }
+    if (callid == IPC_CALLRET_FATAL) {
+        futex_up(&ipc_futex);
+        /* Call asynchronous handler with error code */
+        if (call->callback)
+            call->callback(call->private, ENOENT, NULL);
+        free(call);
+        return;
+    }
+    if (callid == IPC_CALLRET_TEMPORARY) {
+        futex_up(&ipc_futex);
+        call->u.msg.phoneid = phoneid;
+        futex_down(&async_futex);
+        list_append(&call->list, &queued_calls);
+        if (can_preempt) {
+            call->ptid = psthread_get_id();
+            psthread_schedule_next_adv(PS_TO_MANAGER);
+            /* Async futex unlocked by previous call */
+        } else {
+            call->ptid = 0;
+            futex_up(&async_futex);
+        }
+        return;
+    }
+    call->u.callid = callid;
+    /* Add call to list of dispatched calls */
+    list_append(&call->list, &dispatched_calls);
+    futex_up(&ipc_futex);
+}
+/** Send asynchronous message
+ *
+ * - if fatal error, call callback handler with proper error code
+ * - if message cannot be temporarily sent, add to queue
+ */
+void ipc_call_async_2(int phoneid, ipcarg_t method, ipcarg_t arg1,
+              ipcarg_t arg2, void *private,
+              ipc_async_callback_t callback, int can_preempt)
+{
+    async_call_t *call = NULL;
+    ipc_callid_t callid;
+    if (callback) {
+        call = ipc_prepare_async(private, callback);
+        if (!call)
+            return;
+    }
+    /* We need to make sure that we get callid before
+     * another thread accesses the queue again */
+    futex_down(&ipc_futex);
+    callid = __SYSCALL4(SYS_IPC_CALL_ASYNC_FAST, phoneid, method, arg1, arg2);
+    if (callid == IPC_CALLRET_TEMPORARY) {
+        if (!call) {
+            call = ipc_prepare_async(private, callback);
+            if (!call)
+                return;
+        }
+        IPC_SET_METHOD(call->u.msg.data, method);
+        IPC_SET_ARG1(call->u.msg.data, arg1);
+        IPC_SET_ARG2(call->u.msg.data, arg2);
+    }
+    ipc_finish_async(callid, phoneid, call, can_preempt);
+}
+/** Send asynchronous message
+ *
+ * - if fatal error, call callback handler with proper error code
+ * - if message cannot be temporarily sent, add to queue
+ */
+void ipc_call_async_3(int phoneid, ipcarg_t method, ipcarg_t arg1,
+              ipcarg_t arg2, ipcarg_t arg3, void *private,
+              ipc_async_callback_t callback, int can_preempt)
+{
+    async_call_t *call;
+    ipc_callid_t callid;
+    call = ipc_prepare_async(private, callback);
+    if (!call)
+        return;
+    IPC_SET_METHOD(call->u.msg.data, method);
+    IPC_SET_ARG1(call->u.msg.data, arg1);
+    IPC_SET_ARG2(call->u.msg.data, arg2);
+    IPC_SET_ARG3(call->u.msg.data, arg3);
+    /* We need to make sure that we get callid before
+     * another thread accesses the queue again */
+    futex_down(&ipc_futex);
+    callid = _ipc_call_async(phoneid, &call->u.msg.data);
+    ipc_finish_async(callid, phoneid, call, can_preempt);
+}
+/** Send a fast answer to a received call.
+ *
+ * The fast answer makes use of passing retval and first two arguments in registers.
+ * If you need to return more, use the ipc_answer() instead.
+ *
+ * @param callid ID of the call being answered.
+ * @param retval Return value.
+ * @param arg1 First return argument.
+ * @param arg2 Second return argument.
+ *
+ * @return Zero on success or a value from @ref errno.h on failure.
+ */
+ipcarg_t ipc_answer_fast(ipc_callid_t callid, ipcarg_t retval, ipcarg_t arg1,
+        ipcarg_t arg2)
+{
+    return __SYSCALL4(SYS_IPC_ANSWER_FAST, callid, retval, arg1, arg2);
+}
+/** Send a full answer to a received call.
+ *
+ * @param callid ID of the call being answered.
+ * @param call Call data. Must be already initialized by the responder.
+ *
+ * @return Zero on success or a value from @ref errno.h on failure.
+ */
+ipcarg_t ipc_answer(ipc_callid_t callid, ipc_call_t *call)
+{
+    return __SYSCALL2(SYS_IPC_ANSWER, callid, (sysarg_t) call);
+}
+/** Try to dispatch queed calls from async queue */
+static void try_dispatch_queued_calls(void)
+{
+    async_call_t *call;
+    ipc_callid_t callid;
+    /* TODO: integrate intelligently ipc_futex, so that it
+     * is locked during ipc_call_async, until it is added
+     * to dispatched_calls
+     */
+    futex_down(&async_futex);
+    while (!list_empty(&queued_calls)) {
+        call = list_get_instance(queued_calls.next, async_call_t,
+                     list);
+        callid = _ipc_call_async(call->u.msg.phoneid,
+                     &call->u.msg.data);
+        if (callid == IPC_CALLRET_TEMPORARY) {
+            break;
+        }
+        list_remove(&call->list);
+        futex_up(&async_futex);
+        if (call->ptid)
+            psthread_add_ready(call->ptid);
+        if (callid == IPC_CALLRET_FATAL) {
+            if (call->callback)
+                call->callback(call->private, ENOENT, NULL);
+            free(call);
+        } else {
+            call->u.callid = callid;
+            futex_down(&ipc_futex);
+            list_append(&call->list, &dispatched_calls);
+            futex_up(&ipc_futex);
+        }
+        futex_down(&async_futex);
+    }
+    futex_up(&async_futex);
+}
+/** Handle received answer
+ *
+ * TODO: Make it use hash table
+ *
+ * @param callid Callid (with first bit set) of the answered call
+ */
+static void handle_answer(ipc_callid_t callid, ipc_call_t *data)
+{
+    link_t *item;
+    async_call_t *call;
+    callid &= ~IPC_CALLID_ANSWERED;
+    futex_down(&ipc_futex);
+    for (item = dispatched_calls.next; item != &dispatched_calls;
+         item = item->next) {
+        call = list_get_instance(item, async_call_t, list);
+        if (call->u.callid == callid) {
+            list_remove(&call->list);
+            futex_up(&ipc_futex);
+            if (call->callback)
+                call->callback(call->private,
+                           IPC_GET_RETVAL(*data),
+                           data);
+            free(call);
+            return;
+        }
+    }
+    futex_up(&ipc_futex);
+    /* We may get here after async_msg, which doesn't register any callback */
+}
+/** One cycle of ipc wait for call call
+ *
+ * - dispatch ASYNC reoutines in the background
+ * @param call Space where the message is stored
+ * @param usec Timeout in microseconds
+ * @param flags Flags passed to SYS_IPC_WAIT (blocking, nonblocking)
+ * @return Callid of the answer.
+ */
+ipc_callid_t ipc_wait_cycle(ipc_call_t *call, uint32_t usec, int flags)
+{
+    ipc_callid_t callid;
+    callid = __SYSCALL3(SYS_IPC_WAIT, (sysarg_t) call, usec, flags);
+    /* Handle received answers */
+    if (callid & IPC_CALLID_ANSWERED) {
+        handle_answer(callid, call);
+        try_dispatch_queued_calls();
+    }
+    return callid;
+}
+/** Wait some time for an IPC call.
+ *
+ * - dispatch ASYNC reoutines in the background
+ *
+ * @param call Space where the message is stored
+ * @param usec Timeout in microseconds.
+ * @return Callid of the answer.
+ */
+ipc_callid_t ipc_wait_for_call_timeout(ipc_call_t *call, uint32_t usec)
+{
+    ipc_callid_t callid;
+    do {
+        callid = ipc_wait_cycle(call, usec, SYNCH_FLAGS_NONE);
+    } while (callid & IPC_CALLID_ANSWERED);
+    return callid;
+}
+/** Check if there is an IPC call waiting to be picked up.
+ *
+ * - dispatch ASYNC reoutines in the background
+ *
+ * @param call Space where the message is stored
+ * @return Callid of the answer.
+ */
+ipc_callid_t ipc_trywait_for_call(ipc_call_t *call)
+{
+    ipc_callid_t callid;
+    do {
+        callid = ipc_wait_cycle(call, SYNCH_NO_TIMEOUT, SYNCH_FLAGS_NON_BLOCKING);
+    } while (callid & IPC_CALLID_ANSWERED);
+    return callid;
+}
+/** Ask destination to do a callback connection
+ *
+ * @return 0 - OK, error code
+ */
+int ipc_connect_to_me(int phoneid, int arg1, int arg2, ipcarg_t *phone)
+{
+    return ipc_call_sync_3(phoneid, IPC_M_CONNECT_TO_ME, arg1,
+                   arg2, 0, 0, 0, phone);
+}
+/** Ask through phone for a new connection to some service
+ *
+ * @return new phoneid - OK, error code
+ */
+int ipc_connect_me_to(int phoneid, int arg1, int arg2)
+{
+    ipcarg_t newphid;
+    int res;
+    res =  ipc_call_sync_3(phoneid, IPC_M_CONNECT_ME_TO, arg1,
+                   arg2, 0, 0, 0, &newphid);
+    if (res)
+        return res;
+    return newphid;
+}
+/* Hang up specified phone */
+int ipc_hangup(int phoneid)
+{
+    return __SYSCALL1(SYS_IPC_HANGUP, phoneid);
+}
+int ipc_register_irq(int irq, irq_code_t *ucode)
+{
+    return __SYSCALL2(SYS_IPC_REGISTER_IRQ, irq, (sysarg_t) ucode);
+}
+int ipc_unregister_irq(int irq)
+{
+    return __SYSCALL1(SYS_IPC_UNREGISTER_IRQ, irq);
+}
+int ipc_forward_fast(ipc_callid_t callid, int phoneid, int method, ipcarg_t arg1)
+{
+    return __SYSCALL4(SYS_IPC_FORWARD_FAST, callid, phoneid, method, arg1);
+}
+ /** @}
+ */

 /tags/0.2.0.2/uspace/libc/generic/psthread.c
 ,0 → 1,310
+/*
+ * Copyright (C) 2006 Ondrej Palkovsky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/** @addtogroup libc
+ * @{
+ */
+/** @file
+ */
+#include <libadt/list.h>
+#include <psthread.h>
+#include <malloc.h>
+#include <unistd.h>
+#include <thread.h>
+#include <stdio.h>
+#include <kernel/arch/faddr.h>
+#include <futex.h>
+#include <assert.h>
+#include <async.h>
+#ifndef PSTHREAD_INITIAL_STACK_PAGES_NO
+#define PSTHREAD_INITIAL_STACK_PAGES_NO 1
+#endif
+static LIST_INITIALIZE(ready_list);
+static LIST_INITIALIZE(serialized_list);
+static LIST_INITIALIZE(manager_list);
+static void psthread_main(void);
+static atomic_t psthread_futex = FUTEX_INITIALIZER;
+/** Count of real threads that are in async_serialized mode */
+static int serialized_threads; /* Protected by async_futex */
+/** Thread-local count of serialization. If >0, we must not preempt */
+static __thread int serialization_count;
+/** Counter of threads residing in async_manager */
+static int threads_in_manager;
+/** Setup PSthread information into TCB structure */
+psthread_data_t * psthread_setup()
+{
+    psthread_data_t *pt;
+    tcb_t *tcb;
+    tcb = __make_tls();
+    if (!tcb)
+        return NULL;
+    pt = malloc(sizeof(*pt));
+    if (!pt) {
+        __free_tls(tcb);
+        return NULL;
+    }
+    tcb->pst_data = pt;
+    pt->tcb = tcb;
+    return pt;
+}
+void psthread_teardown(psthread_data_t *pt)
+{
+    __free_tls(pt->tcb);
+    free(pt);
+}
+/** Function that is called on entry to new uspace thread */
+void psthread_main(void)
+{
+    psthread_data_t *pt = __tcb_get()->pst_data;
+    pt->retval = pt->func(pt->arg);
+    pt->finished = 1;
+    if (pt->waiter)
+        list_append(&pt->waiter->link, &ready_list);
+    psthread_schedule_next_adv(PS_FROM_DEAD);
+}
+/** Schedule next userspace pseudo thread.
+ *
+ * If calling with PS_TO_MANAGER parameter, the async_futex should be
+ * held.
+ *
+ * @param ctype Type of switch.
+ * @return 0 if there is no ready pseudo thread, 1 otherwise.
+ */
+int psthread_schedule_next_adv(pschange_type ctype)
+{
+    psthread_data_t *srcpt, *dstpt;
+    int retval = 0;
+    futex_down(&psthread_futex);
+    if (ctype == PS_PREEMPT && list_empty(&ready_list))
+        goto ret_0;
+    if (ctype == PS_FROM_MANAGER) {
+        if (list_empty(&ready_list) && list_empty(&serialized_list))
+            goto ret_0;
+        /* Do not preempt if there is not sufficient count of thread managers */
+        if (list_empty(&serialized_list) && threads_in_manager <= serialized_threads) {
+            goto ret_0;
+        }
+    }
+    /* If we are going to manager and none exists, create it */
+    if (ctype == PS_TO_MANAGER || ctype == PS_FROM_DEAD) {
+        while (list_empty(&manager_list)) {
+            futex_up(&psthread_futex);
+            async_create_manager();
+            futex_down(&psthread_futex);
+        }
+    }
+    if (ctype != PS_FROM_DEAD) {
+        /* Save current state */
+        srcpt = __tcb_get()->pst_data;
+        if (!context_save(&srcpt->ctx)) {
+            if (serialization_count)
+                srcpt->flags &= ~PSTHREAD_SERIALIZED;
+            return 1; // futex_up already done here
+        }
+        /* Save myself to correct run list */
+        if (ctype == PS_PREEMPT)
+            list_append(&srcpt->link, &ready_list);
+        else if (ctype == PS_FROM_MANAGER) {
+            list_append(&srcpt->link, &manager_list);
+            threads_in_manager--;
+        } /* If ctype == PS_TO_MANAGER, don't save ourselves to any list, we should
+           * already be somewhere, or we will be lost */
+    } else
+        srcpt = NULL; /* Avoid GCC warning, if ctype == PS_FROM_DEAD, srcpt is not used */
+    /* Choose new thread to run */
+    if (ctype == PS_TO_MANAGER || ctype == PS_FROM_DEAD) {
+        dstpt = list_get_instance(manager_list.next,psthread_data_t, link);
+        if (serialization_count && ctype == PS_TO_MANAGER) {
+            serialized_threads++;
+            srcpt->flags |= PSTHREAD_SERIALIZED;
+        }
+        threads_in_manager++;
+    } else {
+        if (!list_empty(&serialized_list)) {
+            dstpt = list_get_instance(serialized_list.next, psthread_data_t, link);
+            serialized_threads--;
+        } else
+            dstpt = list_get_instance(ready_list.next, psthread_data_t, link);
+    }
+    list_remove(&dstpt->link);
+    futex_up(&psthread_futex);
+    context_restore(&dstpt->ctx);
+ret_0:
+    futex_up(&psthread_futex);
+    return retval;
+}
+/** Wait for uspace pseudo thread to finish.
+ *
+ * @param psthrid Pseudo thread to wait for.
+ *
+ * @return Value returned by the finished thread.
+ */
+int psthread_join(pstid_t psthrid)
+{
+    volatile psthread_data_t *pt;
+    volatile int retval;
+    /* Handle psthrid = Kernel address -> it is wait for call */
+    pt = (psthread_data_t *) psthrid;
+    /* TODO */
+    printf("join unsupported\n");
+    _exit(1);
+    retval = pt->retval;
+    free(pt->stack);
+    psthread_teardown((void *)pt);
+    return retval;
+}
+/**
+ * Create a userspace thread
+ *
+ * @param func Pseudo thread function.
+ * @param arg Argument to pass to func.
+ *
+ * @return 0 on failure, TLS of the new pseudo thread.
+ */
+pstid_t psthread_create(int (*func)(void *), void *arg)
+{
+    psthread_data_t *pt;
+    pt = psthread_setup();
+    if (!pt)
+        return 0;
+    pt->stack = (char *) malloc(PSTHREAD_INITIAL_STACK_PAGES_NO*getpagesize());
+    if (!pt->stack) {
+        psthread_teardown(pt);
+        return 0;
+    }
+    pt->arg= arg;
+    pt->func = func;
+    pt->finished = 0;
+    pt->waiter = NULL;
+    pt->flags = 0;
+    context_save(&pt->ctx);
+    context_set(&pt->ctx, FADDR(psthread_main), pt->stack, PSTHREAD_INITIAL_STACK_PAGES_NO*getpagesize(), pt->tcb);
+    return (pstid_t )pt;
+}
+/** Add a thread to ready list */
+void psthread_add_ready(pstid_t psthrid)
+{
+    psthread_data_t *pt;
+    pt = (psthread_data_t *) psthrid;
+    futex_down(&psthread_futex);
+    if ((pt->flags & PSTHREAD_SERIALIZED))
+        list_append(&pt->link, &serialized_list);
+    else
+        list_append(&pt->link, &ready_list);
+    futex_up(&psthread_futex);
+}
+/** Add a thread to manager list */
+void psthread_add_manager(pstid_t psthrid)
+{
+    psthread_data_t *pt;
+    pt = (psthread_data_t *) psthrid;
+    futex_down(&psthread_futex);
+    list_append(&pt->link, &manager_list);
+    futex_up(&psthread_futex);
+}
+/** Remove one manager from manager list */
+void psthread_remove_manager()
+{
+    futex_down(&psthread_futex);
+    if (list_empty(&manager_list)) {
+        futex_up(&psthread_futex);
+        return;
+    }
+    list_remove(manager_list.next);
+    futex_up(&psthread_futex);
+}
+/** Return thread id of current running thread */
+pstid_t psthread_get_id(void)
+{
+    return (pstid_t)__tcb_get()->pst_data;
+}
+/** Disable preemption
+ *
+ * If the thread wants to send several message in row and does not want
+ * to be preempted, it should start async_serialize_start() in the beginning
+ * of communication and async_serialize_end() in the end. If it is a
+ * true multithreaded application, it should protect the communication channel
+ * by a futex as well. Interrupt messages will can still be preempted.
+ */
+void psthread_inc_sercount(void)
+{
+    serialization_count++;
+}
+void psthread_dec_sercount(void)
+{
+    serialization_count--;
+}
+/** @}
+ */

 /tags/0.2.0.2/uspace/libc/generic/time.c
 ,0 → 1,119
+/*
+ * Copyright (C) 2006 Ondrej Palkovsky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/** @addtogroup libc
+ * @{
+ */
+/** @file
+ */
+#include <sys/time.h>
+#include <unistd.h>
+#include <ipc/ipc.h>
+#include <stdio.h>
+#include <arch/barrier.h>
+#include <unistd.h>
+#include <atomic.h>
+#include <futex.h>
+#include <ipc/services.h>
+#include <sysinfo.h>
+#include <as.h>
+#include <ddi.h>
+/* Pointers to public variables with time */
+struct {
+    volatile sysarg_t seconds1;
+    volatile sysarg_t useconds;
+    volatile sysarg_t seconds2;
+} *ktime = NULL;
+/** POSIX gettimeofday
+ *
+ * The time variables are memory mapped(RO) from kernel, which updates
+ * them periodically. As it is impossible to read 2 values atomically, we
+ * use a trick: First read a seconds, then read microseconds, then
+ * read seconds again. If a second elapsed in the meantime, set it to zero.
+ * This provides assurance, that at least the
+ * sequence of subsequent gettimeofday calls is ordered.
+ */
+int gettimeofday(struct timeval *tv, struct timezone *tz)
+{
+    void *mapping;
+    sysarg_t s1, s2;
+    sysarg_t rights;
+    int res;
+    if (!ktime) {
+        mapping = as_get_mappable_page(PAGE_SIZE);
+        /* Get the mapping of kernel clock */
+        res = ipc_call_sync_3(PHONE_NS, IPC_M_AS_AREA_RECV, (sysarg_t) mapping, PAGE_SIZE, SERVICE_MEM_REALTIME, NULL, &rights, NULL);
+        if (res) {
+            printf("Failed to initialize timeofday memarea\n");
+            _exit(1);
+        }
+        if (! (rights & AS_AREA_READ)) {
+            printf("Received bad rights on time area: %X\n",
+                   rights);
+            as_area_destroy(mapping);
+            _exit(1);
+        }
+        ktime = mapping;
+    }
+    if (tz) {
+        tz->tz_minuteswest = 0;
+        tz->tz_dsttime = DST_NONE;
+    }
+    s2 = ktime->seconds2;
+    read_barrier();
+    tv->tv_usec = ktime->useconds;
+    read_barrier();
+    s1 = ktime->seconds1;
+    if (s1 != s2) {
+        tv->tv_usec = 0;
+        tv->tv_sec = s1 > s2 ? s1 : s2;
+    } else
+        tv->tv_sec = s1;
+    return 0;
+}
+/** Wait unconditionally for specified microseconds */
+void usleep(unsigned long usec)
+{
+    atomic_t futex = FUTEX_INITIALIZER;
+    futex_initialize(&futex,0);
+    futex_down_timeout(&futex, usec, 0);
+}
+/** @}
+ */

 /tags/0.2.0.2/uspace/libc/generic/ddi.c
 ,0 → 1,92
+/*
+ * Copyright (C) 2006 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/** @addtogroup libc
+ * @{
+ */
+/** @file
+ */
+#include <ddi.h>
+#include <libc.h>
+#include <task.h>
+#include <kernel/ddi/ddi_arg.h>
+/** Map piece of physical memory to task.
+ *
+ * Caller of this function must have the CAP_MEM_MANAGER capability.
+ *
+ * @param pf Physical address of the starting frame.
+ * @param vp Virtual address of the sterting page.
+ * @param pages Number of pages to map.
+ * @param flags Flags for the new address space area.
+ *
+ * @return 0 on success, EPERM if the caller lacks the CAP_MEM_MANAGER capability,
+ *     ENOENT if there is no task with specified ID and ENOMEM if there
+ *     was some problem in creating address space area.
+ */
+int map_physmem(void *pf, void *vp, unsigned long pages, int flags)
+{
+    return __SYSCALL4(SYS_MAP_PHYSMEM, (sysarg_t) pf, (sysarg_t)vp, pages, flags);
+}
+/** Enable I/O space range to task.
+ *
+ * Caller of this function must have the IO_MEM_MANAGER capability.
+ *
+ * @param id Task ID.
+ * @param ioaddr Starting address of the I/O range.
+ * @param size Size of the range.
+ *
+ * @return 0 on success, EPERM if the caller lacks the CAP_IO_MANAGER capability,
+ *     ENOENT if there is no task with specified ID and ENOMEM if there
+ *     was some problem in allocating memory.
+ */
+int iospace_enable(task_id_t id, void *ioaddr, unsigned long size)
+{
+    ddi_ioarg_t arg;
+    arg.task_id = id;
+    arg.ioaddr = ioaddr;
+    arg.size = size;
+    return __SYSCALL1(SYS_IOSPACE_ENABLE, (sysarg_t) &arg);
+}
+/** Interrupt control
+ *
+ * @param enable 1 - enable interrupts, 0 - disable interrupts
+ */
+int preemption_control(int enable)
+{
+    return __SYSCALL1(SYS_PREEMPT_CONTROL, (sysarg_t) enable);
+}
+/** @}
+ */

 /tags/0.2.0.2/uspace/libc/generic/cap.c
 ,0 → 1,76
+/*
+ * Copyright (C) 2006 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/** @addtogroup libc
+ * @{
+ */
+/**
+ * @file    cap.c
+ * @brief   Functions to grant/revoke capabilities to/from a task.
+ */
+#include <cap.h>
+#include <task.h>
+#include <libc.h>
+#include <kernel/syscall/sysarg64.h>
+/** Grant capabilities to a task.
+ *
+ * @param id Destination task ID.
+ * @param caps Capabilities to grant.
+ *
+ * @return Zero on success or a value from @ref errno.h on failure.
+ */
+int cap_grant(task_id_t id, unsigned int caps)
+{
+    sysarg64_t arg;
+    arg.value = (unsigned long long) id;
+    return __SYSCALL2(SYS_CAP_GRANT, (sysarg_t) &arg, (sysarg_t) caps);
+}
+/** Revoke capabilities from a task.
+ *
+ * @param id Destination task ID.
+ * @param caps Capabilities to revoke.
+ *
+ * @return Zero on success or a value from @ref errno.h on failure.
+ */
+int cap_revoke(task_id_t id, unsigned int caps)
+{
+    sysarg64_t arg;
+    arg.value = (unsigned long long) id;
+    return __SYSCALL2(SYS_CAP_REVOKE, (sysarg_t) &arg, (sysarg_t) caps);
+}
+/** @}
+ */

 /tags/0.2.0.2/uspace/libc/generic/as.c
 ,0 → 1,157
+/*
+ * Copyright (C) 2006 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/** @addtogroup libc
+ * @{
+ */
+/** @file
+ */
+#include <as.h>
+#include <libc.h>
+#include <unistd.h>
+#include <align.h>
+/** Create address space area.
+ *
+ * @param address Virtual address where to place new address space area.
+ * @param size Size of the area.
+ * @param flags Flags describing type of the area.
+ *
+ * @return address on success, (void *) -1 otherwise.
+ */
+void *as_area_create(void *address, size_t size, int flags)
+{
+    return (void *) __SYSCALL3(SYS_AS_AREA_CREATE, (sysarg_t ) address, (sysarg_t) size, (sysarg_t) flags);
+}
+/** Resize address space area.
+ *
+ * @param address Virtual address pointing into already existing address space area.
+ * @param size New requested size of the area.
+ * @param flags Currently unused.
+ *
+ * @return Zero on success or a code from @ref errno.h on failure.
+ */
+int as_area_resize(void *address, size_t size, int flags)
+{
+    return __SYSCALL3(SYS_AS_AREA_RESIZE, (sysarg_t ) address, (sysarg_t) size, (sysarg_t) flags);
+}
+/** Destroy address space area.
+ *
+ * @param address Virtual address pointing into the address space area being destroyed.
+ *
+ * @return Zero on success or a code from @ref errno.h on failure.
+ */
+int as_area_destroy(void *address)
+{
+    return __SYSCALL1(SYS_AS_AREA_DESTROY, (sysarg_t ) address);
+}
+static size_t heapsize = 0;
+static size_t maxheapsize = (size_t) (-1);
+static void * last_allocated = 0;
+/* Start of heap linker symbol */
+extern char _heap;
+/** Sbrk emulation
+ *
+ * @param incr New area that should be allocated or negative,
+               if it should be shrinked
+ * @return Pointer to newly allocated area
+ */
+void *sbrk(ssize_t incr)
+{
+    int rc;
+    void *res;
+    /* Check for invalid values */
+    if (incr < 0 && -incr > heapsize)
+        return NULL;
+    /* Check for too large value */
+    if (incr > 0 && incr+heapsize < heapsize)
+        return NULL;
+    /* Check for too small values */
+    if (incr < 0 && incr+heapsize > heapsize)
+        return NULL;
+    /* Check for user limit */
+    if ((maxheapsize != (size_t) (-1)) && (heapsize + incr) > maxheapsize)
+        return NULL;
+    rc = as_area_resize(&_heap, heapsize + incr, 0);
+    if (rc != 0)
+        return NULL;
+    /* Compute start of new area */
+    res = (void *) &_heap + heapsize;
+    heapsize += incr;
+    return res;
+}
+/** Set maximum heap size and return pointer just after the heap */
+void *set_maxheapsize(size_t mhs)
+{
+    maxheapsize = mhs;
+    /* Return pointer to area not managed by sbrk */
+    return ((void *) &_heap + maxheapsize);
+}
+/** Return pointer to some unmapped area, where fits new as_area
+ *
+ * TODO: make some first_fit/... algorithm, we are now just incrementing
+ *       the pointer to last area
+ */
+void * as_get_mappable_page(size_t sz)
+{
+    void *res;
+    /* Set heapsize to some meaningful value */
+    if (maxheapsize == -1)
+        set_maxheapsize(ALIGN_UP(USER_ADDRESS_SPACE_SIZE_ARCH >> 1, PAGE_SIZE));
+    if (!last_allocated)
+        last_allocated = (void *) ALIGN_UP((void *) &_heap + maxheapsize, PAGE_SIZE);
+    sz = ALIGN_UP(sz, PAGE_SIZE);
+    res = last_allocated;
+    last_allocated += sz;
+    return res;
+}
+/** @}
+ */

 /tags/0.2.0.2/uspace/libc/generic/string.c
 ,0 → 1,319
+/*
+ * Copyright (C) 2005 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/** @addtogroup libc
+ * @{
+ */
+/** @file
+ */
+#include <string.h>
+#include <unistd.h>
+#include <ctype.h>
+#include <limits.h>
+#include <align.h>
+/* Dummy implementation of mem/ functions */
+void *memset(void *s, int c, size_t n)
+{
+    char *os = s;
+    while (n--)
+        *(os++) = c;
+    return s;
+}
+struct along {
+    unsigned long n;
+} __attribute__ ((packed));
+static void *unaligned_memcpy(void *dst, const void *src, size_t n)
+{
+    int i, j;
+    struct along *adst = dst;
+    const struct along *asrc = src;
+    for (i = 0; i < n / sizeof(unsigned long); i++)
+        adst[i].n = asrc[i].n;
+    for (j = 0; j < n % sizeof(unsigned long); j++)
+        ((unsigned char *) (((unsigned long *) dst) + i))[j] = ((unsigned char *) (((unsigned long *) src) + i))[j];
+    return (char *) src;
+}
+void *memcpy(void *dst, const void *src, size_t n)
+{
+    int i, j;
+    if (((long) dst & (sizeof(long) - 1)) || ((long) src & (sizeof(long) - 1)))
+        return unaligned_memcpy(dst, src, n);
+    for (i = 0; i < n / sizeof(unsigned long); i++)
+        ((unsigned long *) dst)[i] = ((unsigned long *) src)[i];
+    for (j = 0; j < n % sizeof(unsigned long); j++)
+        ((unsigned char *) (((unsigned long *) dst) + i))[j] = ((unsigned char *) (((unsigned long *) src) + i))[j];
+    return (char *) src;
+}
+void *memmove(void *dst, const void *src, size_t n)
+{
+    int i, j;
+    if (src > dst)
+        return memcpy(dst, src, n);
+    for (j = (n % sizeof(unsigned long)) - 1; j >= 0; j--)
+        ((unsigned char *) ((unsigned long *) dst))[j] = ((unsigned char *) ((unsigned long *) src))[j];
+    for (i = n / sizeof(unsigned long) - 1; i >=0 ; i--)
+        ((unsigned long *) dst)[i] = ((unsigned long *) src)[i];
+    return (char *) src;
+}
+/** Count the number of characters in the string, not including terminating 0.
+ * @param str string
+ * @return number of characters in string.
+ */
+size_t strlen(const char *str)
+{
+    size_t counter = 0;
+    while (str[counter] != 0)
+        counter++;
+    return counter;
+}
+int strcmp(const char *a, const char *b)
+{
+    int c = 0;
+    while (a[c] && b[c] && (!(a[c] - b[c])))
+        c++;
+    return (a[c] - b[c]);
+}
+/** Return pointer to the first occurence of character c in string
+ * @param str scanned string
+ * @param c searched character (taken as one byte)
+ * @return pointer to the matched character or NULL if it is not found in given string.
+ */
+char *strchr(const char *str, int c)
+{
+    while (*str != '\0') {
+        if (*str == (char) c)
+            return (char *) str;
+        str++;
+    }
+    return NULL;
+}
+/** Return pointer to the last occurence of character c in string
+ * @param str scanned string
+ * @param c searched character (taken as one byte)
+ * @return pointer to the matched character or NULL if it is not found in given string.
+ */
+char *strrchr(const char *str, int c)
+{
+    char *retval = NULL;
+    while (*str != '\0') {
+        if (*str == (char) c)
+            retval = (char *) str;
+        str++;
+    }
+    return (char *) retval;
+}
+/** Convert string to a number.
+ * Core of strtol and strtoul functions.
+ * @param nptr pointer to string
+ * @param endptr if not NULL, function stores here pointer to the first invalid character
+ * @param base zero or number between 2 and 36 inclusive
+ * @param sgn its set to 1 if minus found
+ * @return result of conversion.
+ */
+static unsigned long _strtoul(const char *nptr, char **endptr, int base, char *sgn)
+{
+    unsigned char c;
+    unsigned long result = 0;
+    unsigned long a, b;
+    const char *str = nptr;
+    const char *tmpptr;
+    while (isspace(*str))
+        str++;
+    if (*str == '-') {
+        *sgn = 1;
+        ++str;
+    } else if (*str == '+')
+        ++str;
+    if (base) {
+        if ((base == 1) || (base > 36)) {
+            /* FIXME: set errno to EINVAL */
+            return 0;
+        }
+        if ((base == 16) && (*str == '0') && ((str[1] == 'x') || (str[1] == 'X'))) {
+            str += 2;
+        }
+    } else {
+        base = 10;
+        if (*str == '0') {
+            base = 8;
+            if ((str[1] == 'X') || (str[1] == 'x'))  {
+                base = 16;
+                str += 2;
+            }
+        }
+    }
+    tmpptr = str;
+    while (*str) {
+        c = *str;
+        c = (c >= 'a' ? c - 'a' + 10 : (c >= 'A' ? c - 'A' + 10 : (c <= '9' ? c - '0' : 0xff)));
+        if (c > base) {
+            break;
+        }
+        a = (result & 0xff) * base + c;
+        b = (result >> 8) * base + (a >> 8);
+        if (b > (ULONG_MAX >> 8)) {
+            /* overflow */
+            /* FIXME: errno = ERANGE*/
+            return ULONG_MAX;
+        }
+        result = (b << 8) + (a & 0xff);
+        ++str;
+    }
+    if (str == tmpptr) {
+        /* no number was found => first invalid character is the first character of the string */
+        /* FIXME: set errno to EINVAL */
+        str = nptr;
+        result = 0;
+    }
+    if (endptr)
+        *endptr = (char *) str;
+    if (nptr == str) {
+        /*FIXME: errno = EINVAL*/
+        return 0;
+    }
+    return result;
+}
+/** Convert initial part of string to long int according to given base.
+ * The number may begin with an arbitrary number of whitespaces followed by optional sign (`+' or `-').
+ * If the base is 0 or 16, the prefix `0x' may be inserted and the number will be taken as hexadecimal one.
+ * If the base is 0 and the number begin with a zero, number will be taken as octal one (as with base 8).
+ * Otherwise the base 0 is taken as decimal.
+ * @param nptr pointer to string
+ * @param endptr if not NULL, function stores here pointer to the first invalid character
+ * @param base zero or number between 2 and 36 inclusive
+ * @return result of conversion.
+ */
+long int strtol(const char *nptr, char **endptr, int base)
+{
+    char sgn = 0;
+    unsigned long number = 0;
+    number = _strtoul(nptr, endptr, base, &sgn);
+    if (number > LONG_MAX) {
+        if ((sgn) && (number == (unsigned long) (LONG_MAX) + 1)) {
+            /* FIXME: set 0 to errno */
+            return number;
+        }
+        /* FIXME: set ERANGE to errno */
+        return (sgn ? LONG_MIN : LONG_MAX);
+    }
+    return (sgn ? -number : number);
+}
+/** Convert initial part of string to unsigned long according to given base.
+ * The number may begin with an arbitrary number of whitespaces followed by optional sign (`+' or `-').
+ * If the base is 0 or 16, the prefix `0x' may be inserted and the number will be taken as hexadecimal one.
+ * If the base is 0 and the number begin with a zero, number will be taken as octal one (as with base 8).
+ * Otherwise the base 0 is taken as decimal.
+ * @param nptr pointer to string
+ * @param endptr if not NULL, function stores here pointer to the first invalid character
+ * @param base zero or number between 2 and 36 inclusive
+ * @return result of conversion.
+ */
+unsigned long strtoul(const char *nptr, char **endptr, int base)
+{
+    char sgn = 0;
+    unsigned long number = 0;
+    number = _strtoul(nptr, endptr, base, &sgn);
+    return (sgn ? -number : number);
+}
+char *strcpy(char *dest, const char *src)
+{
+    char *orig = dest;
+    while ((*(dest++) = *(src++)));
+    return orig;
+}
+char *strncpy(char *dest, const char *src, size_t n)
+{
+    char *orig = dest;
+    while ((*(dest++) = *(src++)) && --n);
+    return orig;
+}
+/** @}
+ */

 /tags/0.2.0.2/uspace/libc/generic/libc.c
 ,0 → 1,82
+/*
+ * Copyright (C) 2005 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/** @addtogroup lc Libc
+ * @brief   HelenOS C library
+ * @{
+ * @}
+ */
+/** @addtogroup libc generic
+ * @ingroup lc
+ * @{
+ */
+/** @file
+ */
+#include <libc.h>
+#include <unistd.h>
+#include <thread.h>
+#include <malloc.h>
+#include <psthread.h>
+#include <io/stream.h>
+#include <ipc/ipc.h>
+#include <async.h>
+#include <as.h>
+extern char _heap;
+void _exit(int status)
+{
+    thread_exit(status);
+}
+void __main(void)
+{
+    psthread_data_t *pt;
+    (void) as_area_create(&_heap, 1, AS_AREA_WRITE | AS_AREA_READ);
+    _async_init();
+    pt = psthread_setup();
+    __tcb_set(pt->tcb);
+}
+void __io_init(void)
+{
+    open("stdin", 0);
+    open("stdout", 0);
+    open("stderr", 0);
+}
+void __exit(void)
+{
+    psthread_teardown(__tcb_get()->pst_data);
+    _exit(0);
+}
+/** @}
+ */

 /tags/0.2.0.2/uspace/libc/generic/async.c
 ,0 → 1,812
+/*
+ * Copyright (C) 2006 Ondrej Palkovsky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/** @addtogroup libc
+ * @{
+ */
+/** @file
+ */
+/**
+ * Asynchronous library
+ *
+ * The aim of this library is facilitating writing programs utilizing
+ * the asynchronous nature of Helenos IPC, yet using a normal way
+ * of programming.
+ *
+ * You should be able to write very simple multithreaded programs,
+ * the async framework will automatically take care of most synchronization
+ * problems.
+ *
+ * Default semantics:
+ * - send() - send asynchronously. If the kernel refuses to send more
+ *            messages, [ try to get responses from kernel, if nothing
+ *            found, might try synchronous ]
+ *
+ * Example of use:
+ *
+ * 1) Multithreaded client application
+ *  create_thread(thread1);
+ *  create_thread(thread2);
+ *  ...
+ *
+ *  thread1() {
+ *        conn = ipc_connect_me_to();
+ *        c1 = send(conn);
+ *        c2 = send(conn);
+ *        wait_for(c1);
+ *        wait_for(c2);
+ *  }
+ *
+ *
+ * 2) Multithreaded server application
+ * main() {
+ *      async_manager();
+ * }
+ *
+ *
+ * client_connection(icallid, *icall) {
+ *       if (want_refuse) {
+ *           ipc_answer_fast(icallid, ELIMIT, 0, 0);
+ *           return;
+ *       }
+ *       ipc_answer_fast(icallid, 0, 0, 0);
+ *
+ *       callid = async_get_call(&call);
+ *       handle(callid, call);
+ *       ipc_answer_fast(callid, 1,2,3);
+ *
+ *       callid = async_get_call(&call);
+ *       ....
+ * }
+ *
+ * TODO: Detaching/joining dead psthreads?
+ */
+#include <futex.h>
+#include <async.h>
+#include <psthread.h>
+#include <stdio.h>
+#include <libadt/hash_table.h>
+#include <libadt/list.h>
+#include <ipc/ipc.h>
+#include <assert.h>
+#include <errno.h>
+#include <time.h>
+#include <arch/barrier.h>
+atomic_t async_futex = FUTEX_INITIALIZER;
+static hash_table_t conn_hash_table;
+static LIST_INITIALIZE(timeout_list);
+typedef struct {
+    struct timeval expires;      /**< Expiration time for waiting thread */
+    int inlist;             /**< If true, this struct is in timeout list */
+    link_t link;
+    pstid_t ptid;                /**< Thread waiting for this message */
+    int active;                  /**< If this thread is currently active */
+    int timedout;                /**< If true, we timed out */
+} awaiter_t;
+typedef struct {
+    awaiter_t wdata;
+    int done;                    /**< If reply was received */
+    ipc_call_t *dataptr;         /**< Pointer where the answer data
+                      *   is stored */
+    ipcarg_t retval;
+} amsg_t;
+typedef struct {
+    link_t link;
+    ipc_callid_t callid;
+    ipc_call_t call;
+} msg_t;
+typedef struct {
+    awaiter_t wdata;
+    link_t link;             /**< Hash table link */
+    ipcarg_t in_phone_hash;  /**< Incoming phone hash. */
+    link_t msg_queue;        /**< Messages that should be delivered to this thread */
+    /* Structures for connection opening packet */
+    ipc_callid_t callid;
+    ipc_call_t call;
+    ipc_callid_t close_callid; /* Identification of closing packet */
+    void (*cthread)(ipc_callid_t,ipc_call_t *);
+} connection_t;
+/** Identifier of incoming connection handled by current thread */
+__thread connection_t *PS_connection;
+/** If true, it is forbidden to use async_req functions and
+ *  all preemption is disabled */
+__thread int in_interrupt_handler;
+static void default_client_connection(ipc_callid_t callid, ipc_call_t *call);
+static void default_interrupt_received(ipc_callid_t callid, ipc_call_t *call);
+static async_client_conn_t client_connection = default_client_connection;
+static async_client_conn_t interrupt_received = default_interrupt_received;
+/** Add microseconds to give timeval */
+static void tv_add(struct timeval *tv, suseconds_t usecs)
+{
+    tv->tv_sec += usecs / 1000000;
+    tv->tv_usec += usecs % 1000000;
+    if (tv->tv_usec > 1000000) {
+        tv->tv_sec++;
+        tv->tv_usec -= 1000000;
+    }
+}
+/** Subtract 2 timevals, return microseconds difference */
+static suseconds_t tv_sub(struct timeval *tv1, struct timeval *tv2)
+{
+    suseconds_t result;
+    result = tv1->tv_usec - tv2->tv_usec;
+    result += (tv1->tv_sec - tv2->tv_sec) * 1000000;
+    return result;
+}
+/** Compare timeval
+ *
+ * @return 1 if tv1 > tv2, otherwise 0
+ */
+static int tv_gt(struct timeval *tv1, struct timeval *tv2)
+{
+    if (tv1->tv_sec > tv2->tv_sec)
+        return 1;
+    if (tv1->tv_sec == tv2->tv_sec && tv1->tv_usec > tv2->tv_usec)
+        return 1;
+    return 0;
+}
+static int tv_gteq(struct timeval *tv1, struct timeval *tv2)
+{
+    if (tv1->tv_sec > tv2->tv_sec)
+        return 1;
+    if (tv1->tv_sec == tv2->tv_sec && tv1->tv_usec >= tv2->tv_usec)
+        return 1;
+    return 0;
+}
+/* Hash table functions */
+#define CONN_HASH_TABLE_CHAINS  32
+static hash_index_t conn_hash(unsigned long *key)
+{
+    assert(key);
+    return ((*key) >> 4) % CONN_HASH_TABLE_CHAINS;
+}
+static int conn_compare(unsigned long key[], hash_count_t keys, link_t *item)
+{
+    connection_t *hs;
+    hs = hash_table_get_instance(item, connection_t, link);
+    return key[0] == hs->in_phone_hash;
+}
+static void conn_remove(link_t *item)
+{
+    free(hash_table_get_instance(item, connection_t, link));
+}
+/** Operations for NS hash table. */
+static hash_table_operations_t conn_hash_table_ops = {
+    .hash = conn_hash,
+    .compare = conn_compare,
+    .remove_callback = conn_remove
+};
+/** Insert sort timeout msg into timeouts list
+ *
+ */
+static void insert_timeout(awaiter_t *wd)
+{
+    link_t *tmp;
+    awaiter_t *cur;
+    wd->timedout = 0;
+    wd->inlist = 1;
+    tmp = timeout_list.next;
+    while (tmp != &timeout_list) {
+        cur = list_get_instance(tmp, awaiter_t, link);
+        if (tv_gteq(&cur->expires, &wd->expires))
+            break;
+        tmp = tmp->next;
+    }
+    list_append(&wd->link, tmp);
+}
+/*************************************************/
+/** Try to route a call to an appropriate connection thread
+ *
+ */
+static int route_call(ipc_callid_t callid, ipc_call_t *call)
+{
+    connection_t *conn;
+    msg_t *msg;
+    link_t *hlp;
+    unsigned long key;
+    futex_down(&async_futex);
+    key = call->in_phone_hash;
+    hlp = hash_table_find(&conn_hash_table, &key);
+    if (!hlp) {
+        futex_up(&async_futex);
+        return 0;
+    }
+    conn = hash_table_get_instance(hlp, connection_t, link);
+    msg = malloc(sizeof(*msg));
+    msg->callid = callid;
+    msg->call = *call;
+    list_append(&msg->link, &conn->msg_queue);
+    if (IPC_GET_METHOD(*call) == IPC_M_PHONE_HUNGUP)
+        conn->close_callid = callid;
+    /* If the call is waiting for event, run it */
+    if (!conn->wdata.active) {
+        /* If in timeout list, remove it */
+        if (conn->wdata.inlist) {
+            conn->wdata.inlist = 0;
+            list_remove(&conn->wdata.link);
+        }
+        conn->wdata.active = 1;
+        psthread_add_ready(conn->wdata.ptid);
+    }
+    futex_up(&async_futex);
+    return 1;
+}
+/** Return new incoming message for current(thread-local) connection */
+ipc_callid_t async_get_call_timeout(ipc_call_t *call, suseconds_t usecs)
+{
+    msg_t *msg;
+    ipc_callid_t callid;
+    connection_t *conn;
+    assert(PS_connection);
+    /* GCC 4.1.0 coughs on PS_connection-> dereference,
+     * GCC 4.1.1 happilly puts the rdhwr instruction in delay slot.
+     *           I would never expect to find so many errors in
+     *           compiler *($&$(*&$
+     */
+    conn = PS_connection;
+    futex_down(&async_futex);
+    if (usecs) {
+        gettimeofday(&conn->wdata.expires, NULL);
+        tv_add(&conn->wdata.expires, usecs);
+    } else {
+        conn->wdata.inlist = 0;
+    }
+    /* If nothing in queue, wait until something appears */
+    while (list_empty(&conn->msg_queue)) {
+        if (usecs)
+            insert_timeout(&conn->wdata);
+        conn->wdata.active = 0;
+        psthread_schedule_next_adv(PS_TO_MANAGER);
+        /* Futex is up after getting back from async_manager
+         * get it again */
+        futex_down(&async_futex);
+        if (usecs && conn->wdata.timedout && \
+            list_empty(&conn->msg_queue)) {
+            /* If we timed out-> exit */
+            futex_up(&async_futex);
+            return 0;
+        }
+    }
+    msg = list_get_instance(conn->msg_queue.next, msg_t, link);
+    list_remove(&msg->link);
+    callid = msg->callid;
+    *call = msg->call;
+    free(msg);
+    futex_up(&async_futex);
+    return callid;
+}
+/** Thread function that gets created on new connection
+ *
+ * This function is defined as a weak symbol - to be redefined in
+ * user code.
+ */
+static void default_client_connection(ipc_callid_t callid, ipc_call_t *call)
+{
+    ipc_answer_fast(callid, ENOENT, 0, 0);
+}
+static void default_interrupt_received(ipc_callid_t callid, ipc_call_t *call)
+{
+}
+/** Wrapper for client connection thread
+ *
+ * When new connection arrives, thread with this function is created.
+ * It calls client_connection and does final cleanup.
+ *
+ * @param arg Connection structure pointer
+ */
+static int connection_thread(void  *arg)
+{
+    unsigned long key;
+    msg_t *msg;
+    int close_answered = 0;
+    /* Setup thread local connection pointer */
+    PS_connection = (connection_t *)arg;
+    PS_connection->cthread(PS_connection->callid, &PS_connection->call);
+    /* Remove myself from connection hash table */
+    futex_down(&async_futex);
+    key = PS_connection->in_phone_hash;
+    hash_table_remove(&conn_hash_table, &key, 1);
+    futex_up(&async_futex);
+    /* Answer all remaining messages with ehangup */
+    while (!list_empty(&PS_connection->msg_queue)) {
+        msg = list_get_instance(PS_connection->msg_queue.next, msg_t, link);
+        list_remove(&msg->link);
+        if (msg->callid == PS_connection->close_callid)
+            close_answered = 1;
+        ipc_answer_fast(msg->callid, EHANGUP, 0, 0);
+        free(msg);
+    }
+    if (PS_connection->close_callid)
+        ipc_answer_fast(PS_connection->close_callid, 0, 0, 0);
+    return 0;
+}
+/** Create new thread for a new connection
+ *
+ * Creates new thread for connection, fills in connection
+ * structures and inserts it into the hash table, so that
+ * later we can easily do routing of messages to particular
+ * threads.
+ *
+ * @param in_phone_hash Identification of the incoming connection
+ * @param callid Callid of the IPC_M_CONNECT_ME_TO packet
+ * @param call Call data of the opening packet
+ * @param cthread Thread function that should be called upon
+ *                opening the connection
+ * @return New thread id
+ */
+pstid_t async_new_connection(ipcarg_t in_phone_hash,ipc_callid_t callid, ipc_call_t *call, void (*cthread)(ipc_callid_t, ipc_call_t *))
+{
+    connection_t *conn;
+    unsigned long key;
+    conn = malloc(sizeof(*conn));
+    if (!conn) {
+        ipc_answer_fast(callid, ENOMEM, 0, 0);
+        return NULL;
+    }
+    conn->in_phone_hash = in_phone_hash;
+    list_initialize(&conn->msg_queue);
+    conn->callid = callid;
+    conn->close_callid = 0;
+    if (call)
+        conn->call = *call;
+    conn->wdata.active = 1; /* We will activate it asap */
+    conn->cthread = cthread;
+    conn->wdata.ptid = psthread_create(connection_thread, conn);
+    if (!conn->wdata.ptid) {
+        free(conn);
+        ipc_answer_fast(callid, ENOMEM, 0, 0);
+        return NULL;
+    }
+    /* Add connection to hash table */
+    key = conn->in_phone_hash;
+    futex_down(&async_futex);
+    hash_table_insert(&conn_hash_table, &key, &conn->link);
+    futex_up(&async_futex);
+    psthread_add_ready(conn->wdata.ptid);
+    return conn->wdata.ptid;
+}
+/** Handle call that was received */
+static void handle_call(ipc_callid_t callid, ipc_call_t *call)
+{
+    /* Unrouted call - do some default behaviour */
+    if ((callid & IPC_CALLID_NOTIFICATION)) {
+        in_interrupt_handler = 1;
+        (*interrupt_received)(callid,call);
+        in_interrupt_handler = 0;
+        return;
+    }
+    switch (IPC_GET_METHOD(*call)) {
+    case IPC_M_CONNECT_ME_TO:
+        /* Open new connection with thread etc. */
+        async_new_connection(IPC_GET_ARG3(*call), callid, call, client_connection);
+        return;
+    }
+    /* Try to route call through connection tables */
+    if (route_call(callid, call))
+        return;
+    /* Unknown call from unknown phone - hang it up */
+    ipc_answer_fast(callid, EHANGUP, 0, 0);
+}
+/** Fire all timeouts that expired
+ *
+ */
+static void handle_expired_timeouts(void)
+{
+    struct timeval tv;
+    awaiter_t *waiter;
+    link_t *cur;
+    gettimeofday(&tv,NULL);
+    futex_down(&async_futex);
+    cur = timeout_list.next;
+    while (cur != &timeout_list) {
+        waiter = list_get_instance(cur,awaiter_t,link);
+        if (tv_gt(&waiter->expires, &tv))
+            break;
+        cur = cur->next;
+        list_remove(&waiter->link);
+        waiter->inlist = 0;
+        waiter->timedout = 1;
+        /* Redundant condition? The thread should not
+         * be active when it gets here.
+         */
+        if (!waiter->active) {
+            waiter->active = 1;
+            psthread_add_ready(waiter->ptid);
+        }
+    }
+    futex_up(&async_futex);
+}
+/** Endless loop dispatching incoming calls and answers */
+static int async_manager_worker(void)
+{
+    ipc_call_t call;
+    ipc_callid_t callid;
+    int timeout;
+    awaiter_t *waiter;
+    struct timeval tv;
+    while (1) {
+        if (psthread_schedule_next_adv(PS_FROM_MANAGER)) {
+            futex_up(&async_futex);
+            /* async_futex is always held
+             * when entering manager thread
+             */
+            continue;
+        }
+        futex_down(&async_futex);
+        if (!list_empty(&timeout_list)) {
+            waiter = list_get_instance(timeout_list.next,awaiter_t,link);
+            gettimeofday(&tv,NULL);
+            if (tv_gteq(&tv, &waiter->expires)) {
+                futex_up(&async_futex);
+                handle_expired_timeouts();
+                continue;
+            } else
+                timeout = tv_sub(&waiter->expires, &tv);
+        } else
+            timeout = SYNCH_NO_TIMEOUT;
+        futex_up(&async_futex);
+        callid = ipc_wait_cycle(&call, timeout, SYNCH_FLAGS_NONE);
+        if (!callid) {
+            handle_expired_timeouts();
+            continue;
+        }
+        if (callid & IPC_CALLID_ANSWERED) {
+            continue;
+        }
+        handle_call(callid, &call);
+    }
+    return 0;
+}
+/** Function to start async_manager as a standalone thread
+ *
+ * When more kernel threads are used, one async manager should
+ * exist per thread. The particular implementation may change,
+ * currently one async_manager is started automatically per kernel
+ * thread except main thread.
+ */
+static int async_manager_thread(void *arg)
+{
+    futex_up(&async_futex);
+    /* async_futex is always locked when entering
+     * manager */
+    async_manager_worker();
+    return 0;
+}
+/** Add one manager to manager list */
+void async_create_manager(void)
+{
+    pstid_t ptid;
+    ptid = psthread_create(async_manager_thread, NULL);
+    psthread_add_manager(ptid);
+}
+/** Remove one manager from manager list */
+void async_destroy_manager(void)
+{
+    psthread_remove_manager();
+}
+/** Initialize internal structures needed for async manager */
+int _async_init(void)
+{
+    if (!hash_table_create(&conn_hash_table, CONN_HASH_TABLE_CHAINS, 1, &conn_hash_table_ops)) {
+        printf("%s: cannot create hash table\n", "async");
+        return ENOMEM;
+    }
+    return 0;
+}
+/** IPC handler for messages in async framework
+ *
+ * Notify thread that is waiting for this message, that it arrived
+ */
+static void reply_received(void *private, int retval,
+               ipc_call_t *data)
+{
+    amsg_t *msg = (amsg_t *) private;
+    msg->retval = retval;
+    futex_down(&async_futex);
+    /* Copy data after futex_down, just in case the
+     * call was detached
+     */
+    if (msg->dataptr)
+        *msg->dataptr = *data;
+    write_barrier();
+    /* Remove message from timeout list */
+    if (msg->wdata.inlist)
+        list_remove(&msg->wdata.link);
+    msg->done = 1;
+    if (! msg->wdata.active) {
+        msg->wdata.active = 1;
+        psthread_add_ready(msg->wdata.ptid);
+    }
+    futex_up(&async_futex);
+}
+/** Send message and return id of the sent message
+ *
+ * The return value can be used as input for async_wait() to wait
+ * for completion.
+ */
+aid_t async_send_2(int phoneid, ipcarg_t method, ipcarg_t arg1, ipcarg_t arg2,
+           ipc_call_t *dataptr)
+{
+    amsg_t *msg;
+    if (in_interrupt_handler) {
+        printf("Cannot send asynchronou request in interrupt handler.\n");
+        _exit(1);
+    }
+    msg = malloc(sizeof(*msg));
+    msg->done = 0;
+    msg->dataptr = dataptr;
+    msg->wdata.active = 1; /* We may sleep in next method, but it
+                * will use it's own mechanism */
+    ipc_call_async_2(phoneid,method,arg1,arg2,msg,reply_received,1);
+    return (aid_t) msg;
+}
+/** Send message and return id of the sent message
+ *
+ * The return value can be used as input for async_wait() to wait
+ * for completion.
+ */
+aid_t async_send_3(int phoneid, ipcarg_t method, ipcarg_t arg1, ipcarg_t arg2,
+           ipcarg_t arg3, ipc_call_t *dataptr)
+{
+    amsg_t *msg;
+    if (in_interrupt_handler) {
+        printf("Cannot send asynchronou request in interrupt handler.\n");
+        _exit(1);
+    }
+    msg = malloc(sizeof(*msg));
+    msg->done = 0;
+    msg->dataptr = dataptr;
+    msg->wdata.active = 1; /* We may sleep in next method, but it
+                * will use it's own mechanism */
+    ipc_call_async_3(phoneid,method,arg1,arg2,arg3, msg,reply_received,1);
+    return (aid_t) msg;
+}
+/** Wait for a message sent by async framework
+ *
+ * @param amsgid Message ID to wait for
+ * @param retval Pointer to variable where will be stored retval
+ *               of the answered message. If NULL, it is ignored.
+ *
+ */
+void async_wait_for(aid_t amsgid, ipcarg_t *retval)
+{
+    amsg_t *msg = (amsg_t *) amsgid;
+    futex_down(&async_futex);
+    if (msg->done) {
+        futex_up(&async_futex);
+        goto done;
+    }
+    msg->wdata.ptid = psthread_get_id();
+    msg->wdata.active = 0;
+    msg->wdata.inlist = 0;
+    /* Leave locked async_futex when entering this function */
+    psthread_schedule_next_adv(PS_TO_MANAGER);
+    /* futex is up automatically after psthread_schedule_next...*/
+done:
+    if (retval)
+        *retval = msg->retval;
+    free(msg);
+}
+/** Wait for a message sent by async framework with timeout
+ *
+ * @param amsgid Message ID to wait for
+ * @param retval Pointer to variable where will be stored retval
+ *               of the answered message. If NULL, it is ignored.
+ * @param timeout Timeout in usecs
+ * @return 0 on success, ETIMEOUT if timeout expired
+ *
+ */
+int async_wait_timeout(aid_t amsgid, ipcarg_t *retval, suseconds_t timeout)
+{
+    amsg_t *msg = (amsg_t *) amsgid;
+    /* TODO: Let it go through the event read at least once */
+    if (timeout < 0)
+        return ETIMEOUT;
+    futex_down(&async_futex);
+    if (msg->done) {
+        futex_up(&async_futex);
+        goto done;
+    }
+    gettimeofday(&msg->wdata.expires, NULL);
+    tv_add(&msg->wdata.expires, timeout);
+    msg->wdata.ptid = psthread_get_id();
+    msg->wdata.active = 0;
+    insert_timeout(&msg->wdata);
+    /* Leave locked async_futex when entering this function */
+    psthread_schedule_next_adv(PS_TO_MANAGER);
+    /* futex is up automatically after psthread_schedule_next...*/
+    if (!msg->done)
+        return ETIMEOUT;
+done:
+    if (retval)
+        *retval = msg->retval;
+    free(msg);
+    return 0;
+}
+/** Wait specified time, but in the meantime handle incoming events
+ *
+ * @param timeout Time in microseconds to wait
+ */
+void async_usleep(suseconds_t timeout)
+{
+    amsg_t *msg;
+    if (in_interrupt_handler) {
+        printf("Cannot call async_usleep in interrupt handler.\n");
+        _exit(1);
+    }
+    msg = malloc(sizeof(*msg));
+    if (!msg)
+        return;
+    msg->wdata.ptid = psthread_get_id();
+    msg->wdata.active = 0;
+    gettimeofday(&msg->wdata.expires, NULL);
+    tv_add(&msg->wdata.expires, timeout);
+    futex_down(&async_futex);
+    insert_timeout(&msg->wdata);
+    /* Leave locked async_futex when entering this function */
+    psthread_schedule_next_adv(PS_TO_MANAGER);
+    /* futex is up automatically after psthread_schedule_next...*/
+    free(msg);
+}
+/** Set function that is called, IPC_M_CONNECT_ME_TO is received
+ *
+ * @param conn Function that will form new psthread.
+ */
+void async_set_client_connection(async_client_conn_t conn)
+{
+    client_connection = conn;
+}
+void async_set_interrupt_received(async_client_conn_t conn)
+{
+    interrupt_received = conn;
+}
+/* Primitive functions for simple communication */
+void async_msg_3(int phoneid, ipcarg_t method, ipcarg_t arg1,
+         ipcarg_t arg2, ipcarg_t arg3)
+{
+    ipc_call_async_3(phoneid, method, arg1, arg2, arg3, NULL, NULL, !in_interrupt_handler);
+}
+void async_msg_2(int phoneid, ipcarg_t method, ipcarg_t arg1, ipcarg_t arg2)
+{
+    ipc_call_async_2(phoneid, method, arg1, arg2, NULL, NULL, !in_interrupt_handler);
+}
+/** @}
+ */

 /tags/0.2.0.2/uspace/libc/generic/io/stream.c
 ,0 → 1,195
+/*
+ * Copyright (C) 2006 Josef Cejka
+ * Copyright (C) 2006 Jakub Vana
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/** @addtogroup libc
+ * @{
+ */
+/** @file
+ */
+#include <io/io.h>
+#include <io/stream.h>
+#include <string.h>
+#include <malloc.h>
+#include <libc.h>
+#include <ipc/ipc.h>
+#include <ipc/ns.h>
+#include <ipc/fb.h>
+#include <ipc/services.h>
+#include <console.h>
+#include <unistd.h>
+#include <async.h>
+#define FDS 32
+typedef struct stream_t {
+    pwritefn_t w;
+    preadfn_t r;
+    void * param;
+    int phone;
+} stream_t;
+static int console_phone = -1;
+static stream_t streams[FDS];
+static ssize_t write_stderr(void *param, const void *buf, size_t count)
+{
+    return count;
+}
+static ssize_t read_stdin(void *param, void *buf, size_t count)
+{
+    ipcarg_t r0,r1;
+    size_t i = 0;
+    while (i < count) {
+        if (async_req_2(streams[0].phone, CONSOLE_GETCHAR, 0, 0, &r0, &r1) < 0) {
+            return -1;
+        }
+        ((char *) buf)[i++] = r0;
+    }
+    return i;
+}
+static ssize_t write_stdout(void *param, const void *buf, size_t count)
+{
+    int i;
+    for (i = 0; i < count; i++)
+        async_msg(streams[1].phone, CONSOLE_PUTCHAR, ((const char *) buf)[i]);
+    return count;
+}
+static stream_t open_stdin(void)
+{
+    stream_t stream;
+    if (console_phone < 0) {
+        while ((console_phone = ipc_connect_me_to(PHONE_NS, SERVICE_CONSOLE, 0)) < 0) {
+            usleep(10000);
+        }
+    }
+    stream.r = read_stdin;
+    stream.w = NULL;
+    stream.param = 0;
+    stream.phone = console_phone;
+    return stream;
+}
+static stream_t open_stdout(void)
+{
+    stream_t stream;
+    if (console_phone < 0) {
+        while ((console_phone = ipc_connect_me_to(PHONE_NS, SERVICE_CONSOLE, 0)) < 0) {
+            usleep(10000);
+        }
+    }
+    stream.r = NULL;
+    stream.w = write_stdout;
+    stream.phone = console_phone;
+    stream.param = 0;
+    return stream;
+}
+static ssize_t write_null(void *param, const void *buf, size_t count)
+{
+    return count;
+}
+fd_t open(const char *fname, int flags)
+{
+    int c = 0;
+    while (((streams[c].w) || (streams[c].r)) && (c < FDS))
+        c++;
+    if (c == FDS)
+        return EMFILE;
+    if (!strcmp(fname, "stdin")) {
+        streams[c] = open_stdin();
+        return c;
+    }
+    if (!strcmp(fname, "stdout")) {
+        streams[c] = open_stdout();
+        return c;
+    }
+    if (!strcmp(fname, "stderr")) {
+        streams[c].w = write_stderr;
+        return c;
+    }
+    if (!strcmp(fname, "null")) {
+        streams[c].w = write_null;
+        return c;
+    }
+    return -1;
+}
+ssize_t write(int fd, const void *buf, size_t count)
+{
+//  __SYSCALL3(SYS_IO, 1, (sysarg_t)buf, (sysarg_t) count);
+//  return count;
+    if (fd < FDS)
+        return streams[fd].w(streams[fd].param, buf, count);
+    return 0;
+}
+ssize_t read(int fd, void *buf, size_t count)
+{
+    if (fd < FDS)
+        return streams[fd].r(streams[fd].param, buf, count);
+    return 0;
+}
+int get_fd_phone(int fd)
+{
+    if (fd >= FDS || fd < 0)
+        return -1;
+    return streams[fd].phone;
+}
+/** @}
+ */

 /tags/0.2.0.2/uspace/libc/generic/io/printf.c
 ,0 → 1,64
+/*
+ * Copyright (C) 2006 Josef Cejka
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup libc
+ * @{
+ */
+/** @file
+ */
+#include <io/printf_core.h>
+#include <stdio.h>
+#include <stdio.h>
+/** Print formatted text.
+ * @param fmt   format string
+ * \see For more details about format string see printf_core.
+ */
+int printf(const char *fmt, ...)
+{
+    int ret;
+    va_list args;
+    va_start(args, fmt);
+    ret = vprintf(fmt, args);
+    va_end(args);
+    return ret;
+}
+ /** @}
+ */

 /tags/0.2.0.2/uspace/libc/generic/io/snprintf.c
 ,0 → 1,62
+/*
+ * Copyright (C) 2006 Josef Cejka
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup libc
+ * @{
+ */
+/** @file
+ */
+#include <stdarg.h>
+#include <stdio.h>
+#include <io/printf_core.h>
+/** Print formatted to the given buffer with limited size.
+ * @param str   buffer
+ * @param size  buffer size
+ * @param fmt   format string
+ * \see For more details about format string see printf_core.
+ */
+int snprintf(char *str, size_t size, const char *fmt, ...)
+{
+    int ret;
+    va_list args;
+    va_start(args, fmt);
+    ret = vsnprintf(str, size, fmt, args);
+    va_end(args);
+    return ret;
+}
+ /** @}
+ */

 /tags/0.2.0.2/uspace/libc/generic/io/sprintf.c
 ,0 → 1,61
+/*
+ * Copyright (C) 2006 Josef Cejka
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup libc
+ * @{
+ */
+/** @file
+ */
+#include <stdarg.h>
+#include <stdio.h>
+#include <io/printf_core.h>
+/** Print formatted to the given buffer.
+ * @param str   buffer
+ * @param fmt   format string
+ * \see For more details about format string see printf_core.
+ */
+int sprintf(char *str, const char *fmt, ...)
+{
+    int ret;
+    va_list args;
+    va_start(args, fmt);
+    ret = vsprintf(str, fmt, args);
+    va_end(args);
+    return ret;
+}
+ /** @}
+ */

 /tags/0.2.0.2/uspace/libc/generic/io/io.c
 ,0 → 1,118
+/*
+ * Copyright (C) 2005 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup libc
+ * @{
+ */
+/** @file
+ */
+#include <libc.h>
+#include <unistd.h>
+#include <stdio.h>
+#include <io/io.h>
+static char nl = '\n';
+int puts(const char * str)
+{
+    size_t count;
+    if (str == NULL) {
+        return putnchars("(NULL)",6 );
+    }
+    for (count = 0; str[count] != 0; count++);
+    if (write(1, (void * ) str, count) == count) {
+        if (write(1, &nl, 1) == 1)
+            return 0;
+    }
+    return EOF;
+}
+/** Put count chars from buffer to stdout without adding newline
+ * @param buf Buffer with size at least count bytes - NULL pointer NOT allowed!
+ * @param count
+ * @return 0 on succes, EOF on fail
+ */
+int putnchars(const char * buf, size_t count)
+{
+    if (write(1, (void * ) buf, count) == count) {
+            return 0;
+    }
+    return EOF;
+}
+/** Same as puts, but does not print newline at end
+ *
+ */
+int putstr(const char * str)
+{
+    size_t count;
+    if (str == NULL) {
+        return putnchars("(NULL)",6 );
+    }
+    for (count = 0; str[count] != 0; count++);
+    if (write(1, (void * ) str, count) == count) {
+            return 0;
+    }
+    return EOF;
+}
+int putchar(int c)
+{
+    unsigned char ch = c;
+    if (write(1, (void *)&ch , 1) == 1) {
+            return c;
+    }
+    return EOF;
+}
+int getchar(void)
+{
+    unsigned char c;
+    if (read(0, (void *)&c , 1) == 1) {
+            return c;
+    }
+    return EOF;
+}
+ /** @}
+ */

 /tags/0.2.0.2/uspace/libc/generic/io/vprintf.c
 ,0 → 1,65
+/*
+ * Copyright (C) 2006 Josef Cejka
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup libc
+ * @{
+ */
+/** @file
+ */
+#include <stdarg.h>
+#include <stdio.h>
+#include <unistd.h>
+#include <io/printf_core.h>
+int vprintf_write(const char *str, size_t count, void *unused);
+int vprintf_write(const char *str, size_t count, void *unused)
+{
+    return write(1, str, count);
+}
+/** Print formatted text.
+ * @param fmt   format string
+ * @param ap    format parameters
+ * \see For more details about format string see printf_core.
+ */
+int vprintf(const char *fmt, va_list ap)
+{
+    struct printf_spec ps = {(int(*)(void *, size_t, void *))vprintf_write, NULL};
+    return printf_core(fmt, &ps, ap);
+}
+ /** @}
+ */

 /tags/0.2.0.2/uspace/libc/generic/io/vsnprintf.c
 ,0 → 1,117
+/*
+ * Copyright (C) 2006 Josef Cejka
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup libc
+ * @{
+ */
+/** @file
+ */
+#include <stdarg.h>
+#include <stdio.h>
+#include <string.h>
+#include <io/printf_core.h>
+struct vsnprintf_data {
+    size_t size; /* total space for string */
+    size_t len; /* count of currently used characters */
+    char *string; /* destination string */
+};
+int vsnprintf_write(const char *str, size_t count, struct vsnprintf_data *data);
+/** Write string to given buffer.
+ * Write at most data->size characters including trailing zero. According to C99 has snprintf to return number
+ * of characters that would have been written if enough space had been available. Hence the return value is not
+ * number of really printed characters but size of input string. Number of really used characters
+ * is stored in data->len.
+ * @param str source string to print
+ * @param count size of source string
+ * @param data structure with destination string, counter of used space and total string size.
+ * @return number of characters to print (not characters really printed!)
+ */
+int vsnprintf_write(const char *str, size_t count, struct vsnprintf_data *data)
+{
+    size_t i;
+    i = data->size - data->len;
+    if (i == 0) {
+        return count;
+    }
+    if (i == 1) {
+        /* We have only one free byte left in buffer => write there trailing zero */
+        data->string[data->size - 1] = 0;
+        data->len = data->size;
+        return count;
+    }
+    if (i <= count) {
+        /* We have not enought space for whole string with the trailing zero => print only a part of string */
+            memcpy((void *)(data->string + data->len), (void *)str, i - 1);
+            data->string[data->size - 1] = 0;
+            data->len = data->size;
+            return count;
+    }
+    /* Buffer is big enought to print whole string */
+    memcpy((void *)(data->string + data->len), (void *)str, count);
+    data->len += count;
+    /* Put trailing zero at end, but not count it into data->len so it could be rewritten next time */
+    data->string[data->len] = 0;
+    return count;
+}
+/** Print formatted to the given buffer with limited size.
+ * @param str   buffer
+ * @param size  buffer size
+ * @param fmt   format string
+ * \see For more details about format string see printf_core.
+ */
+int vsnprintf(char *str, size_t size, const char *fmt, va_list ap)
+{
+    struct vsnprintf_data data = {size, 0, str};
+    struct printf_spec ps = {(int(*)(void *, size_t, void *))vsnprintf_write, &data};
+    /* Print 0 at end of string - fix the case that nothing will be printed */
+    if (size > 0)
+        str[0] = 0;
+    /* vsnprintf_write ensures that str will be terminated by zero. */
+    return printf_core(fmt, &ps, ap);
+}
+ /** @}
+ */

 /tags/0.2.0.2/uspace/libc/generic/io/printf_core.c
 ,0 → 1,696
+/*
+ * Copyright (C) 2001-2004 Jakub Jermar
+ * Copyright (C) 2006 Josef Cejka
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup libc
+ * @{
+ */
+/**
+ * @file
+ * @brief   Printing functions.
+ */
+#include <unistd.h>
+#include <stdio.h>
+#include <io/printf_core.h>
+#include <ctype.h>
+#include <string.h>
+/* For serialization */
+#include <async.h>
+#define __PRINTF_FLAG_PREFIX        0x00000001  /**< show prefixes 0x or 0*/
+#define __PRINTF_FLAG_SIGNED        0x00000002  /**< signed / unsigned number */
+#define __PRINTF_FLAG_ZEROPADDED    0x00000004  /**< print leading zeroes */
+#define __PRINTF_FLAG_LEFTALIGNED   0x00000010  /**< align to left */
+#define __PRINTF_FLAG_SHOWPLUS      0x00000020  /**< always show + sign */
+#define __PRINTF_FLAG_SPACESIGN     0x00000040  /**< print space instead of plus */
+#define __PRINTF_FLAG_BIGCHARS      0x00000080  /**< show big characters */
+#define __PRINTF_FLAG_NEGATIVE      0x00000100  /**< number has - sign */
+#define PRINT_NUMBER_BUFFER_SIZE    (64+5)      /**< Buffer big enought for 64 bit number
+                             * printed in base 2, sign, prefix and
+                             * 0 to terminate string.. (last one is only for better testing
+                             * end of buffer by zero-filling subroutine)
+                             */
+/** Enumeration of possible arguments types.
+ */
+typedef enum {
+    PrintfQualifierByte = 0,
+    PrintfQualifierShort,
+    PrintfQualifierInt,
+    PrintfQualifierLong,
+    PrintfQualifierLongLong,
+    PrintfQualifierSizeT,
+    PrintfQualifierPointer
+} qualifier_t;
+static char digits_small[] = "0123456789abcdef";    /**< Small hexadecimal characters */
+static char digits_big[] = "0123456789ABCDEF";      /**< Big hexadecimal characters */
+/** Print count chars from buffer without adding newline
+ * @param buf Buffer with size at least count bytes - NULL pointer NOT allowed!
+ * @param count
+ * @param ps output method and its data
+ * @return number of printed characters
+ */
+static int printf_putnchars(const char * buf, size_t count, struct printf_spec *ps)
+{
+    return ps->write((void *)buf, count, ps->data);
+}
+/** Print string without added newline
+ * @param str string to print
+ * @param ps write function specification and support data
+ * @return number of printed characters
+ */
+static int printf_putstr(const char * str, struct printf_spec *ps)
+{
+    size_t count;
+    if (str == NULL) {
+        return printf_putnchars("(NULL)", 6, ps);
+    }
+    for (count = 0; str[count] != 0; count++);
+    if (ps->write((void *) str, count, ps->data) == count) {
+        return 0;
+    }
+    return EOF;
+}
+/** Print one character to output
+ * @param c one character
+ * @param ps output method
+ * @return number of printed characters
+ */
+static int printf_putchar(int c, struct printf_spec *ps)
+{
+    unsigned char ch = c;
+    return ps->write((void *) &ch, 1, ps->data);
+}
+/** Print one formatted character
+ * @param c character to print
+ * @param width
+ * @param flags
+ * @return number of printed characters
+ */
+static int print_char(char c, int width, uint64_t flags, struct printf_spec *ps)
+{
+    int counter = 0;
+    if (!(flags & __PRINTF_FLAG_LEFTALIGNED)) {
+        while (--width > 0) {   /* one space is consumed by character itself hence predecrement */
+            if (printf_putchar(' ', ps) > 0)
+                ++counter;
+        }
+    }
+    if (printf_putchar(c, ps) > 0)
+        counter++;
+    while (--width > 0) { /* one space is consumed by character itself hence predecrement */
+        if (printf_putchar(' ', ps) > 0)
+            ++counter;
+    }
+    return ++counter;
+}
+/** Print one string
+ * @param s string
+ * @param width
+ * @param precision
+ * @param flags
+ * @return number of printed characters
+ */
+static int print_string(char *s, int width, int precision, uint64_t flags, struct printf_spec *ps)
+{
+    int counter = 0;
+    size_t size;
+    int retval;
+    if (s == NULL) {
+        return printf_putstr("(NULL)", ps);
+    }
+    size = strlen(s);
+    /* print leading spaces */
+    if (precision == 0)
+        precision = size;
+    width -= precision;
+    if (!(flags & __PRINTF_FLAG_LEFTALIGNED)) {
+        while (width-- > 0) {
+            if (printf_putchar(' ', ps) == 1)
+                counter++;
+        }
+    }
+    while (precision > size) {
+        precision--;
+        if (printf_putchar(' ', ps) == 1)
+            ++counter;
+    }
+    if ((retval = printf_putnchars(s, precision, ps)) < 0) {
+        return -counter;
+    }
+    counter += retval;
+    while (width-- > 0) {
+        if (printf_putchar(' ', ps) == 1)
+            ++counter;
+    }
+    return counter;
+}
+/** Print number in given base
+ *
+ * Print significant digits of a number in given
+ * base.
+ *
+ * @param num  Number to print.
+ * @param width
+ * @param precision
+ * @param base Base to print the number in (should
+ *             be in range 2 .. 16).
+ * @param flags output modifiers
+ * @return number of printed characters
+ *
+ */
+static int print_number(uint64_t num, int width, int precision, int base , uint64_t flags, struct printf_spec *ps)
+{
+    char *digits = digits_small;
+    char d[PRINT_NUMBER_BUFFER_SIZE];   /* this is good enough even for base == 2, prefix and sign */
+    char *ptr = &d[PRINT_NUMBER_BUFFER_SIZE - 1];
+    int size = 0; /* size of number with all prefixes and signs */
+    int number_size; /* size of plain number */
+    char sgn;
+    int retval;
+    int counter = 0;
+    if (flags & __PRINTF_FLAG_BIGCHARS)
+        digits = digits_big;
+    *ptr-- = 0; /* Put zero at end of string */
+    if (num == 0) {
+        *ptr-- = '0';
+        size++;
+    } else {
+        do {
+            *ptr-- = digits[num % base];
+            size++;
+        } while (num /= base);
+    }
+    number_size = size;
+    /* Collect sum of all prefixes/signs/... to calculate padding and leading zeroes */
+    if (flags & __PRINTF_FLAG_PREFIX) {
+        switch(base) {
+            case 2: /* Binary formating is not standard, but usefull */
+                size += 2;
+                break;
+            case 8:
+                size++;
+                break;
+            case 16:
+                size += 2;
+                break;
+        }
+    }
+    sgn = 0;
+    if (flags & __PRINTF_FLAG_SIGNED) {
+        if (flags & __PRINTF_FLAG_NEGATIVE) {
+            sgn = '-';
+            size++;
+        } else if (flags & __PRINTF_FLAG_SHOWPLUS) {
+                sgn = '+';
+                size++;
+            } else if (flags & __PRINTF_FLAG_SPACESIGN) {
+                    sgn = ' ';
+                    size++;
+                }
+    }
+    if (flags & __PRINTF_FLAG_LEFTALIGNED) {
+        flags &= ~__PRINTF_FLAG_ZEROPADDED;
+    }
+    /* if number is leftaligned or precision is specified then zeropadding is ignored */
+    if (flags & __PRINTF_FLAG_ZEROPADDED) {
+        if ((precision == 0) && (width > size)) {
+            precision = width - size + number_size;
+        }
+    }
+    /* print leading spaces */
+    if (number_size > precision) /* We must print whole number not only a part */
+        precision = number_size;
+    width -= precision + size - number_size;
+    if (!(flags & __PRINTF_FLAG_LEFTALIGNED)) {
+        while (width-- > 0) {
+            if (printf_putchar(' ', ps) == 1)
+                counter++;
+        }
+    }
+    /* print sign */
+    if (sgn) {
+        if (printf_putchar(sgn, ps) == 1)
+            counter++;
+    }
+    /* print prefix */
+    if (flags & __PRINTF_FLAG_PREFIX) {
+        switch(base) {
+            case 2: /* Binary formating is not standard, but usefull */
+                if (printf_putchar('0', ps) == 1)
+                    counter++;
+                if (flags & __PRINTF_FLAG_BIGCHARS) {
+                    if (printf_putchar('B', ps) == 1)
+                        counter++;
+                } else {
+                    if (printf_putchar('b', ps) == 1)
+                        counter++;
+                }
+                break;
+            case 8:
+                if (printf_putchar('o', ps) == 1)
+                    counter++;
+                break;
+            case 16:
+                if (printf_putchar('0', ps) == 1)
+                    counter++;
+                if (flags & __PRINTF_FLAG_BIGCHARS) {
+                    if (printf_putchar('X', ps) == 1)
+                        counter++;
+                } else {
+                    if (printf_putchar('x', ps) == 1)
+                        counter++;
+                }
+                break;
+        }
+    }
+    /* print leading zeroes */
+    precision -= number_size;
+    while (precision-- > 0) {
+        if (printf_putchar('0', ps) == 1)
+            counter++;
+    }
+    /* print number itself */
+    if ((retval = printf_putstr(++ptr, ps)) > 0) {
+        counter += retval;
+    }
+    /* print ending spaces */
+    while (width-- > 0) {
+        if (printf_putchar(' ', ps) == 1)
+            counter++;
+    }
+    return counter;
+}
+/** Print formatted string.
+ *
+ * Print string formatted according to the fmt parameter
+ * and variadic arguments. Each formatting directive
+ * must have the following form:
+ *
+ *  \% [ FLAGS ] [ WIDTH ] [ .PRECISION ] [ TYPE ] CONVERSION
+ *
+ * FLAGS:@n
+ *  - "#" Force to print prefix.
+ *  For conversion \%o the prefix is 0, for %x and \%X prefixes are 0x and 0X
+ *  and for conversion \%b the prefix is 0b.
+ *
+ *  - "-"   Align to left.
+ *
+ *  - "+"   Print positive sign just as negative.
+ *
+ *  - " "   If the printed number is positive and "+" flag is not set, print space in
+ *  place of sign.
+ *
+ *  - "0"    Print 0 as padding instead of spaces. Zeroes are placed between sign and the
+ *  rest of the number. This flag is ignored if "-" flag is specified.
+ *
+ * WIDTH:@n
+ *  - Specify minimal width of printed argument. If it is bigger, width is ignored.
+ * If width is specified with a "*" character instead of number, width is taken from
+ * parameter list. And integer parameter is expected before parameter for processed
+ * conversion specification. If this value is negative its absolute value is taken
+ * and the "-" flag is set.
+ *
+ * PRECISION:@n
+ *  - Value precision. For numbers it specifies minimum valid numbers.
+ * Smaller numbers are printed with leading zeroes. Bigger numbers are not affected.
+ * Strings with more than precision characters are cut off.
+ * Just as with width, an "*" can be used used instead of a number.
+ * An integer value is then expected in parameters. When both width and precision
+ * are specified using "*", the first parameter is used for width and the second one
+ * for precision.
+ *
+ * TYPE:@n
+ *  - "hh"  Signed or unsigned char.@n
+ *  - "h"   Signed or usigned short.@n
+ *  - ""    Signed or usigned int (default value).@n
+ *  - "l"   Signed or usigned long int.@n
+ *  - "ll"  Signed or usigned long long int.@n
+ *  - "z"   Type size_t.@n
+ *
+ *
+ * CONVERSION:@n
+ *  - % Print percentile character itself.
+ *
+ *  - c Print single character.
+ *
+ *  - s Print zero terminated string. If a NULL value is passed as value, "(NULL)" is printed instead.
+ *
+ *  - P, p  Print value of a pointer. Void * value is expected and it is printed in hexadecimal notation with prefix
+ *  (as with '\%#X' or '\%#x' for 32bit or '\%#X' or '\%#x' for 64bit long pointers).
+ *
+ *  - b Print value as unsigned binary number. Prefix is not printed by default. (Nonstandard extension.)
+ *
+ *  - o Print value as unsigned octal number. Prefix is not printed by default.
+ *
+ *  - d,i   Print signed decimal number. There is no difference between d and i conversion.
+ *
+ *  - u Print unsigned decimal number.
+ *
+ *  - X, x  Print hexadecimal number with upper- or lower-case. Prefix is not printed by default.
+ *
+ * All other characters from fmt except the formatting directives
+ * are printed in verbatim.
+ *
+ * @param fmt Formatting NULL terminated string.
+ * @return Number of printed characters or negative value on failure.
+ */
+int printf_core(const char *fmt, struct printf_spec *ps, va_list ap)
+{
+    int i = 0, j = 0; /* i is index of currently processed char from fmt, j is index to the first not printed nonformating character */
+    int end;
+    int counter; /* counter of printed characters */
+    int retval; /* used to store return values from called functions */
+    char c;
+    qualifier_t qualifier;  /* type of argument */
+    int base;   /* base in which will be parameter (numbers only) printed */
+    uint64_t number; /* argument value */
+    size_t  size; /* byte size of integer parameter */
+    int width, precision;
+    uint64_t flags;
+    /* Don't let other threads interfere */
+    async_serialize_start();
+    counter = 0;
+    while ((c = fmt[i])) {
+        /* control character */
+        if (c == '%' ) {
+            /* print common characters if any processed */
+            if (i > j) {
+                if ((retval = printf_putnchars(&fmt[j], (size_t)(i - j), ps)) < 0) { /* error */
+                    goto minus_out;
+                }
+                counter += retval;
+            }
+            j = i;
+            /* parse modifiers */
+            flags = 0;
+            end = 0;
+            do {
+                ++i;
+                switch (c = fmt[i]) {
+                    case '#': flags |= __PRINTF_FLAG_PREFIX; break;
+                    case '-': flags |= __PRINTF_FLAG_LEFTALIGNED; break;
+                    case '+': flags |= __PRINTF_FLAG_SHOWPLUS; break;
+                    case ' ': flags |= __PRINTF_FLAG_SPACESIGN; break;
+                    case '0': flags |= __PRINTF_FLAG_ZEROPADDED; break;
+                    default: end = 1;
+                };
+            } while (end == 0);
+            /* width & '*' operator */
+            width = 0;
+            if (isdigit(fmt[i])) {
+                while (isdigit(fmt[i])) {
+                    width *= 10;
+                    width += fmt[i++] - '0';
+                }
+            } else if (fmt[i] == '*') {
+                /* get width value from argument list*/
+                i++;
+                width = (int)va_arg(ap, int);
+                if (width < 0) {
+                    /* negative width means to set '-' flag */
+                    width *= -1;
+                    flags |= __PRINTF_FLAG_LEFTALIGNED;
+                }
+            }
+            /* precision and '*' operator */
+            precision = 0;
+            if (fmt[i] == '.') {
+                ++i;
+                if (isdigit(fmt[i])) {
+                    while (isdigit(fmt[i])) {
+                        precision *= 10;
+                        precision += fmt[i++] - '0';
+                    }
+                } else if (fmt[i] == '*') {
+                    /* get precision value from argument list*/
+                    i++;
+                    precision = (int)va_arg(ap, int);
+                    if (precision < 0) {
+                        /* negative precision means to ignore it */
+                        precision = 0;
+                    }
+                }
+            }
+            switch (fmt[i++]) {
+                /** TODO: unimplemented qualifiers:
+                 * t ptrdiff_t - ISO C 99
+                 */
+                case 'h':   /* char or short */
+                    qualifier = PrintfQualifierShort;
+                    if (fmt[i] == 'h') {
+                        i++;
+                        qualifier = PrintfQualifierByte;
+                    }
+                    break;
+                case 'l':   /* long or long long*/
+                    qualifier = PrintfQualifierLong;
+                    if (fmt[i] == 'l') {
+                        i++;
+                        qualifier = PrintfQualifierLongLong;
+                    }
+                    break;
+                case 'z':   /* size_t */
+                    qualifier = PrintfQualifierSizeT;
+                    break;
+                default:
+                    qualifier = PrintfQualifierInt; /* default type */
+                    --i;
+            }
+            base = 10;
+            switch (c = fmt[i]) {
+                /*
+                * String and character conversions.
+                */
+                case 's':
+                    if ((retval = print_string(va_arg(ap, char*), width, precision, flags, ps)) < 0) {
+                        goto minus_out;
+                    };
+                    counter += retval;
+                    j = i + 1;
+                    goto next_char;
+                case 'c':
+                    c = va_arg(ap, unsigned int);
+                    if ((retval = print_char(c, width, flags, ps)) < 0) {
+                        goto minus_out;
+                    };
+                    counter += retval;
+                    j = i + 1;
+                    goto next_char;
+                /*
+                 * Integer values
+                */
+                case 'P': /* pointer */
+                        flags |= __PRINTF_FLAG_BIGCHARS;
+                case 'p':
+                    flags |= __PRINTF_FLAG_PREFIX;
+                    base = 16;
+                    qualifier = PrintfQualifierPointer;
+                    break;
+                case 'b':
+                    base = 2;
+                    break;
+                case 'o':
+                    base = 8;
+                    break;
+                case 'd':
+                case 'i':
+                    flags |= __PRINTF_FLAG_SIGNED;
+                case 'u':
+                    break;
+                case 'X':
+                    flags |= __PRINTF_FLAG_BIGCHARS;
+                case 'x':
+                    base = 16;
+                    break;
+                /* percentile itself */
+                case '%':
+                    j = i;
+                    goto next_char;
+                /*
+                * Bad formatting.
+                */
+                default:
+                    /* Unknown format
+                     *  now, the j is index of '%' so we will
+                     * print whole bad format sequence
+                     */
+                    goto next_char;
+            }
+        /* Print integers */
+            /* print number */
+            switch (qualifier) {
+                case PrintfQualifierByte:
+                    size = sizeof(unsigned char);
+                    number = (uint64_t)va_arg(ap, unsigned int);
+                    break;
+                case PrintfQualifierShort:
+                    size = sizeof(unsigned short);
+                    number = (uint64_t)va_arg(ap, unsigned int);
+                    break;
+                case PrintfQualifierInt:
+                    size = sizeof(unsigned int);
+                    number = (uint64_t)va_arg(ap, unsigned int);
+                    break;
+                case PrintfQualifierLong:
+                    size = sizeof(unsigned long);
+                    number = (uint64_t)va_arg(ap, unsigned long);
+                    break;
+                case PrintfQualifierLongLong:
+                    size = sizeof(unsigned long long);
+                    number = (uint64_t)va_arg(ap, unsigned long long);
+                    break;
+                case PrintfQualifierPointer:
+                    size = sizeof(void *);
+                    number = (uint64_t)(unsigned long)va_arg(ap, void *);
+                    break;
+                case PrintfQualifierSizeT:
+                    size = sizeof(size_t);
+                    number = (uint64_t)va_arg(ap, size_t);
+                    break;
+                default: /* Unknown qualifier */
+                    goto minus_out;
+            }
+            if (flags & __PRINTF_FLAG_SIGNED) {
+                if (number & (0x1 << (size*8 - 1))) {
+                    flags |= __PRINTF_FLAG_NEGATIVE;
+                    if (size == sizeof(uint64_t)) {
+                        number = -((int64_t)number);
+                    } else {
+                        number = ~number;
+                        number &= (~((0xFFFFFFFFFFFFFFFFll) <<  (size * 8)));
+                        number++;
+                    }
+                }
+            }
+            if ((retval = print_number(number, width, precision, base, flags, ps)) < 0 ) {
+                goto minus_out;
+            };
+            counter += retval;
+            j = i + 1;
+        }
+next_char:
+        ++i;
+    }
+    if (i > j) {
+        if ((retval = printf_putnchars(&fmt[j], (size_t)(i - j), ps)) < 0) { /* error */
+            goto minus_out;
+        }
+        counter += retval;
+    }
+    async_serialize_end();
+    return counter;
+minus_out:
+    async_serialize_end();
+    return -counter;
+}
+ /** @}
+ */

 /tags/0.2.0.2/uspace/libc/generic/io/vsprintf.c
 ,0 → 1,55
+/*
+ * Copyright (C) 2006 Josef Cejka
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup libc
+ * @{
+ */
+/** @file
+ */
+#include <stdarg.h>
+#include <stdio.h>
+#include <io/printf_core.h>
+/** Print formatted to the given buffer.
+ * @param str   buffer
+ * @param fmt   format string
+ * @param ap    argument list
+ * \see For more details about format string see printf_core.
+ */
+int vsprintf(char *str, const char *fmt, va_list ap)
+{
+    return vsnprintf(str, (size_t)-1, fmt, ap);
+}
+ /** @}
+ */

 /tags/0.2.0.2/uspace/libc/generic/err.c
 ,0 → 1,47
+/*
+ * Copyright (C) 2006 Ondrej Palkovsky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/** @addtogroup libc
+ * @{
+ */
+/** @file
+ */
+#include <stdio.h>
+#include <stdlib.h>
+/* TODO
+void errx(int __status, __const char *__format, ...)
+{
+    _exit(0);
+}
+*/
+/** @}
+ */

 /tags/0.2.0.2/uspace/libc/generic/mmap.c
 ,0 → 1,59
+/*
+ * Copyright (C) 2006 Ondrej Palkovsky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/** @addtogroup libc
+ * @{
+ */
+/** @file
+ */
+#include <sys/mman.h>
+#include <as.h>
+#include <unistd.h>
+void *mmap(void  *start, size_t length, int prot, int flags, int fd, off_t offset)
+{
+    if (!start)
+        start = as_get_mappable_page(length);
+//  if (! ((flags & MAP_SHARED) ^ (flags & MAP_PRIVATE)))
+//      return MAP_FAILED;
+    if (! (flags & MAP_ANONYMOUS))
+        return MAP_FAILED;
+    return as_area_create(start, length, prot);
+}
+int munmap(void *start, size_t length)
+{
+    return as_area_destroy(start);
+}
+/** @}
+ */

 /tags/0.2.0.2/uspace/libc/generic/thread.c
 ,0 → 1,160
+/*
+ * Copyright (C) 2006 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup libc
+ * @{
+ */
+/** @file
+ */
+#include <thread.h>
+#include <libc.h>
+#include <stdlib.h>
+#include <arch/faddr.h>
+#include <kernel/proc/uarg.h>
+#include <psthread.h>
+#include <string.h>
+#include <async.h>
+#include <stdio.h>
+#ifndef THREAD_INITIAL_STACK_PAGES_NO
+#define THREAD_INITIAL_STACK_PAGES_NO 1
+#endif
+static LIST_INITIALIZE(thread_garbage);
+extern char _tdata_start;
+extern char _tdata_end;
+extern char _tbss_start;
+extern char _tbss_end;
+/** Create Thread Local storage area, return pointer to TCB(ThreadControlBlock)
+ *
+ * !! The code requires, that sections .tdata and .tbss are adjacent.
+ *    It may be changed in the future.
+ */
+tcb_t * __make_tls(void)
+{
+    void *data;
+    tcb_t *tcb;
+    size_t tls_size = &_tbss_end - &_tdata_start;
+    tcb = __alloc_tls(&data, tls_size);
+    memcpy(data, &_tdata_start, &_tdata_end - &_tdata_start);
+    memset(data + (&_tbss_start-&_tdata_start), 0, &_tbss_end-&_tbss_start);
+    return tcb;
+}
+void __free_tls(tcb_t *tcb)
+{
+    size_t tls_size = &_tbss_end - &_tdata_start;
+    __free_tls_arch(tcb, tls_size);
+}
+/** Main thread function.
+ *
+ * This function is called from __thread_entry() and is used
+ * to call the thread's implementing function and perform cleanup
+ * and exit when thread returns back. Do not call this function
+ * directly.
+ *
+ * @param uarg Pointer to userspace argument structure.
+ *
+ * TODO: Thread stack pages memory leak
+ */
+void __thread_main(uspace_arg_t *uarg)
+{
+    psthread_data_t *pt;
+    pt = psthread_setup();
+    __tcb_set(pt->tcb);
+    uarg->uspace_thread_function(uarg->uspace_thread_arg);
+    free(uarg->uspace_stack);
+    free(uarg);
+    /* If there is a manager, destroy it */
+    async_destroy_manager();
+    psthread_teardown(pt);
+    thread_exit(0);
+}
+/** Create userspace thread.
+ *
+ * This function creates new userspace thread and allocates userspace
+ * stack and userspace argument structure for it.
+ *
+ * @param function Function implementing the thread.
+ * @param arg Argument to be passed to thread.
+ * @param name Symbolic name of the thread.
+ *
+ * @return TID of the new thread on success or -1 on failure.
+ */
+int thread_create(void (* function)(void *), void *arg, char *name)
+{
+    char *stack;
+    uspace_arg_t *uarg;
+    stack = (char *) malloc(getpagesize()*THREAD_INITIAL_STACK_PAGES_NO);
+    if (!stack)
+        return -1;
+    uarg = (uspace_arg_t *) malloc(sizeof(uspace_arg_t));
+    if (!uarg) {
+        free(stack);
+        return -1;
+    }
+    uarg->uspace_entry = (void *) FADDR(__thread_entry);
+    uarg->uspace_stack = (void *) stack;
+    uarg->uspace_thread_function = function;
+    uarg->uspace_thread_arg = arg;
+    uarg->uspace_uarg = uarg;
+    return __SYSCALL2(SYS_THREAD_CREATE, (sysarg_t) uarg, (sysarg_t) name);
+}
+/** Terminate current thread.
+ *
+ * @param status Exit status. Currently not used.
+ */
+void thread_exit(int status)
+{
+    __SYSCALL1(SYS_THREAD_EXIT, (sysarg_t) status);
+}
+ /** @}
+ */

 /tags/0.2.0.2/uspace/libc/generic/libadt/hash_table.c
 ,0 → 1,182
+/*
+ * Copyright (C) 2006 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup libc
+ * @{
+ */
+/** @file
+ */
+/*
+ * This is an implementation of generic chained hash table.
+ */
+#include <libadt/hash_table.h>
+#include <libadt/list.h>
+#include <unistd.h>
+#include <malloc.h>
+#include <assert.h>
+#include <stdio.h>
+#include <string.h>
+/** Create chained hash table.
+ *
+ * @param h Hash table structure. Will be initialized by this call.
+ * @param m Number of slots in the hash table.
+ * @param max_keys Maximal number of keys needed to identify an item.
+ * @param op Hash table operations structure.
+ * @return true on success
+ */
+int hash_table_create(hash_table_t *h, hash_count_t m, hash_count_t max_keys, hash_table_operations_t *op)
+{
+    hash_count_t i;
+    assert(h);
+    assert(op && op->hash && op->compare);
+    assert(max_keys > 0);
+    h->entry = malloc(m * sizeof(link_t));
+    if (!h->entry) {
+        printf("cannot allocate memory for hash table\n");
+        return false;
+    }
+    memset((void *) h->entry, 0,  m * sizeof(link_t));
+    for (i = 0; i < m; i++)
+        list_initialize(&h->entry[i]);
+    h->entries = m;
+    h->max_keys = max_keys;
+    h->op = op;
+    return true;
+}
+/** Insert item into hash table.
+ *
+ * @param h Hash table.
+ * @param key Array of all keys necessary to compute hash index.
+ * @param item Item to be inserted into the hash table.
+ */
+void hash_table_insert(hash_table_t *h, unsigned long key[], link_t *item)
+{
+    hash_index_t chain;
+    assert(item);
+    assert(h && h->op && h->op->hash && h->op->compare);
+    chain = h->op->hash(key);
+    assert(chain < h->entries);
+    list_append(item, &h->entry[chain]);
+}
+/** Search hash table for an item matching keys.
+ *
+ * @param h Hash table.
+ * @param key Array of all keys needed to compute hash index.
+ *
+ * @return Matching item on success, NULL if there is no such item.
+ */
+link_t *hash_table_find(hash_table_t *h, unsigned long key[])
+{
+    link_t *cur;
+    hash_index_t chain;
+    assert(h && h->op && h->op->hash && h->op->compare);
+    chain = h->op->hash(key);
+    assert(chain < h->entries);
+    for (cur = h->entry[chain].next; cur != &h->entry[chain]; cur = cur->next) {
+        if (h->op->compare(key, h->max_keys, cur)) {
+            /*
+             * The entry is there.
+             */
+            return cur;
+        }
+    }
+    return NULL;
+}
+/** Remove all matching items from hash table.
+ *
+ * For each removed item, h->remove_callback() is called.
+ *
+ * @param h Hash table.
+ * @param key Array of keys that will be compared against items of the hash table.
+ * @param keys Number of keys in the 'key' array.
+ */
+void hash_table_remove(hash_table_t *h, unsigned long key[], hash_count_t keys)
+{
+    hash_index_t chain;
+    link_t *cur;
+    assert(h && h->op && h->op->hash && h->op->compare && h->op->remove_callback);
+    assert(keys <= h->max_keys);
+    if (keys == h->max_keys) {
+        /*
+         * All keys are known, hash_table_find() can be used to find the entry.
+         */
+        cur = hash_table_find(h, key);
+        if (cur) {
+            list_remove(cur);
+            h->op->remove_callback(cur);
+        }
+        return;
+    }
+    /*
+     * Fewer keys were passed.
+     * Any partially matching entries are to be removed.
+     */
+    for (chain = 0; chain < h->entries; chain++) {
+        for (cur = h->entry[chain].next; cur != &h->entry[chain]; cur = cur->next) {
+            if (h->op->compare(key, keys, cur)) {
+                link_t *hlp;
+                hlp = cur;
+                cur = cur->prev;
+                list_remove(hlp);
+                h->op->remove_callback(hlp);
+                continue;
+            }
+        }
+    }
+}
+ /** @}
+ */

 /tags/0.2.0.2/uspace/libc/generic/libadt/list.c
 ,0 → 1,92
+/*
+ * Copyright (C) 2004 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup libc
+ * @{
+ */
+/** @file
+ */
+#include <libadt/list.h>
+/** Check for membership
+ *
+ * Check whether link is contained in the list head.
+ * The membership is defined as pointer equivalence.
+ *
+ * @param link Item to look for.
+ * @param head List to look in.
+ *
+ * @return true if link is contained in head, false otherwise.
+ *
+ */
+int list_member(const link_t *link, const link_t *head)
+{
+    int found = false;
+    link_t *hlp = head->next;
+    while (hlp != head) {
+        if (hlp == link) {
+            found = true;
+            break;
+        }
+        hlp = hlp->next;
+    }
+    return found;
+}
+/** Concatenate two lists
+ *
+ * Concatenate lists head1 and head2, producing a single
+ * list head1 containing items from both (in head1, head2
+ * order) and empty list head2.
+ *
+ * @param head1 First list and concatenated output
+ * @param head2 Second list and empty output.
+ *
+ */
+void list_concat(link_t *head1, link_t *head2)
+{
+    if (list_empty(head2))
+        return;
+    head2->next->prev = head1->prev;
+    head2->prev->next = head1;
+    head1->prev->next = head2->next;
+    head1->prev = head2->prev;
+    list_initialize(head2);
+}
+ /** @}
+ */

 /tags/0.2.0.2/uspace/libc/generic/task.c
 ,0 → 1,51
+/*
+ * Copyright (C) 2006 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup libc
+ * @{
+ */
+/** @file
+ */
+#include <task.h>
+#include <libc.h>
+task_id_t task_get_id(void)
+{
+    task_id_t task_id;
+    (void) __SYSCALL1(SYS_TASK_GET_ID, (sysarg_t) &task_id);
+    return task_id;
+}
+ /** @}
+ */

 /tags/0.2.0.2/uspace/libc/generic/stdlib.c
 ,0 → 1,53
+/*
+ * Copyright (C) 2006 Ondrej Palkovsky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup libc
+ * @{
+ */
+/** @file
+ */
+#include <stdlib.h>
+static long glbl_seed = 1;
+long int random(void)
+{
+    return glbl_seed = ((1366*glbl_seed + 150889) % RAND_MAX);
+}
+void srandom(unsigned int seed)
+{
+    glbl_seed = seed;
+}
+ /** @}
+ */

 /tags/0.2.0.2/uspace/libc/generic/sysinfo.c
 ,0 → 1,49
+/*
+ * Copyright (C) 2006 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup libc
+ * @{
+ */
+/** @file
+ */
+#include <libc.h>
+#include <sysinfo.h>
+#include <string.h>
+sysarg_t sysinfo_value(char *name)
+{
+    return __SYSCALL2(SYS_SYSINFO_VALUE, (sysarg_t ) name, (sysarg_t) strlen(name) );
+}
+ /** @}
+ */

 /tags/0.2.0.2/uspace/libc/generic/futex.c
 ,0 → 1,180
+/*
+ * Copyright (C) 2006 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup libc
+ * @{
+ */
+/** @file
+ */
+#include <futex.h>
+#include <atomic.h>
+#include <libc.h>
+#include <stdio.h>
+#include <types.h>
+#include <kernel/synch/synch.h>
+/*
+ * Note about race conditions.
+ * Because of non-atomic nature of operations performed sequentially on the futex
+ * counter and the futex wait queue, there is a race condition:
+ *
+ * (wq->missed_wakeups == 1) && (futex->count = 1)
+ *
+ * Scenario 1 (wait queue timeout vs. futex_up()):
+ * 1. assume wq->missed_wakeups == 0 && futex->count == -1
+ *    (ie. thread A sleeping, thread B in the critical section)
+ * 2. A receives timeout and gets removed from the wait queue
+ * 3. B wants to leave the critical section and calls futex_up()
+ * 4. B thus changes futex->count from -1 to 0
+ * 5. B has to call SYS_FUTEX_WAKEUP syscall to wake up the sleeping thread
+ * 6. B finds the wait queue empty and changes wq->missed_wakeups from 0 to 1
+ * 7. A fixes futex->count (i.e. the number of waiting threads) by changing it from 0 to 1
+ *
+ * Scenario 2 (conditional down operation vs. futex_up)
+ * 1. assume wq->missed_wakeups == 0 && futex->count == 0
+ *    (i.e. thread A is in the critical section)
+ * 2. thread B performs futex_trydown() operation and changes futex->count from 0 to -1
+ *    B is now obliged to call SYS_FUTEX_SLEEP syscall
+ * 3. A wants to leave the critical section and does futex_up()
+ * 4. A thus changes futex->count from -1 to 0 and must call SYS_FUTEX_WAKEUP syscall
+ * 5. B finds the wait queue empty and immediatelly aborts the conditional sleep
+ * 6. No thread is queueing in the wait queue so wq->missed_wakeups changes from 0 to 1
+ * 6. B fixes futex->count (i.e. the number of waiting threads) by changing it from 0 to 1
+ *
+ * Both scenarios allow two threads to be in the critical section simultaneously.
+ * One without kernel intervention and the other through wq->missed_wakeups being 1.
+ *
+ * To mitigate this problem, futex_down_timeout() detects that the syscall didn't sleep
+ * in the wait queue, fixes the futex counter and RETRIES the whole operation again.
+ *
+ */
+/** Initialize futex counter.
+ *
+ * @param futex Futex.
+ * @param val Initialization value.
+ */
+void futex_initialize(atomic_t *futex, int val)
+{
+    atomic_set(futex, val);
+}
+int futex_down(atomic_t *futex)
+{
+    return futex_down_timeout(futex, SYNCH_NO_TIMEOUT, SYNCH_FLAGS_NONE);
+}
+int futex_trydown(atomic_t *futex)
+{
+    return futex_down_timeout(futex, SYNCH_NO_TIMEOUT, SYNCH_FLAGS_NON_BLOCKING);
+}
+/** Try to down the futex.
+ *
+ * @param futex Futex.
+ * @param usec Microseconds to wait. Zero value means sleep without timeout.
+ * @param flags Select mode of operation. See comment for waitq_sleep_timeout().
+ *
+ * @return ENOENT if there is no such virtual address. One of ESYNCH_OK_ATOMIC
+ *     and ESYNCH_OK_BLOCKED on success or ESYNCH_TIMEOUT if the lock was
+ *     not acquired because of a timeout or ESYNCH_WOULD_BLOCK if the
+ *     operation could not be carried out atomically (if requested so).
+ */
+int futex_down_timeout(atomic_t *futex, uint32_t usec, int flags)
+{
+    int rc;
+    while (atomic_predec(futex) < 0) {
+        rc = __SYSCALL3(SYS_FUTEX_SLEEP, (sysarg_t) &futex->count, (sysarg_t) usec, (sysarg_t) flags);
+        switch (rc) {
+        case ESYNCH_OK_ATOMIC:
+            /*
+             * Because of a race condition between timeout and futex_up()
+             * and between conditional futex_down_timeout() and futex_up(),
+             * we have to give up and try again in this special case.
+             */
+            atomic_inc(futex);
+            break;
+        case ESYNCH_TIMEOUT:
+            atomic_inc(futex);
+            return ESYNCH_TIMEOUT;
+            break;
+        case ESYNCH_WOULD_BLOCK:
+            /*
+             * The conditional down operation should be implemented this way.
+             * The userspace-only variant tends to accumulate missed wakeups
+             * in the kernel futex wait queue.
+             */
+            atomic_inc(futex);
+            return ESYNCH_WOULD_BLOCK;
+            break;
+        case ESYNCH_OK_BLOCKED:
+            /*
+             * Enter the critical section.
+             * The futex counter has already been incremented for us.
+             */
+            return ESYNCH_OK_BLOCKED;
+            break;
+        default:
+            return rc;
+        }
+    }
+    /*
+     * Enter the critical section.
+     */
+    return ESYNCH_OK_ATOMIC;
+}
+/** Up the futex.
+ *
+ * @param futex Futex.
+ *
+ * @return ENOENT if there is no such virtual address. Otherwise zero.
+ */
+int futex_up(atomic_t *futex)
+{
+    long val;
+    val = atomic_postinc(futex);
+    if (val < 0)
+        return __SYSCALL1(SYS_FUTEX_WAKEUP, (sysarg_t) &futex->count);
+    return 0;
+}
+ /** @}
+ */

 /tags/0.2.0.2/uspace/libc/Makefile.toolchain
 ,0 → 1,57
+#
+# Copyright (C) 2005 Martin Decky
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# - Redistributions of source code must retain the above copyright
+#   notice, this list of conditions and the following disclaimer.
+# - Redistributions in binary form must reproduce the above copyright
+#   notice, this list of conditions and the following disclaimer in the
+#   documentation and/or other materials provided with the distribution.
+# - The name of the author may not be used to endorse or promote products
+#   derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+DEFS = -DARCH=$(ARCH)
+CFLAGS = -fno-builtin -Wall -Werror-implicit-function-declaration -Wmissing-prototypes -O3 -nostdlib -nostdinc -I$(LIBC_PREFIX)/include
+LFLAGS = -M -N $(SOFTINT_PREFIX)/libsoftint.a
+AFLAGS =
+#-Werror
+## Setup platform configuration
+#
+include $(LIBC_PREFIX)/arch/$(ARCH)/Makefile.inc
+## Toolchain configuration
+#
+ifeq ($(COMPILER),native)
+    CC = gcc
+    AS = as
+    LD = ld
+    AR = ar
+    OBJCOPY = objcopy
+    OBJDUMP = objdump
+else
+    CC = $(TOOLCHAIN_DIR)/$(TARGET)-gcc
+    AS = $(TOOLCHAIN_DIR)/$(TARGET)-as
+    LD = $(TOOLCHAIN_DIR)/$(TARGET)-ld
+    AR = $(TOOLCHAIN_DIR)/$(TARGET)-ar
+    OBJCOPY = $(TOOLCHAIN_DIR)/$(TARGET)-objcopy
+    OBJDUMP = $(TOOLCHAIN_DIR)/$(TARGET)-objdump
+endif

 /tags/0.2.0.2/uspace/libc/include/err.h
 ,0 → 1,47
+/*
+ * Copyright (C) 2006 Ondrej Palkovsky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/** @addtogroup libc
+ * @{
+ */
+/** @file
+ */
+#ifndef _libc__ERR_H_
+#define _libc__ERR_H_
+#define errx(status, fmt, ...) { \
+    printf((fmt), ##__VA_ARGS__); \
+    _exit(status); \
+}
+#endif
+/** @}
+ */

 /tags/0.2.0.2/uspace/libc/include/libc.h
 ,0 → 1,56
+/*
+ * Copyright (C) 2005 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/** @addtogroup libc
+ * @{
+ */
+/** @file
+ */
+#ifndef __LIBC__LIBC_H__
+#define __LIBC__LIBC_H__
+#include <types.h>
+#include <kernel/syscall/syscall.h>
+#define __SYSCALL0(id) __syscall(0, 0, 0, 0, id)
+#define __SYSCALL1(id, p1) __syscall(p1, 0, 0, 0, id)
+#define __SYSCALL2(id, p1, p2) __syscall(p1, p2, 0, 0, id)
+#define __SYSCALL3(id, p1, p2, p3) __syscall(p1, p2, p3, 0, id)
+#define __SYSCALL4(id, p1, p2, p3, p4) __syscall(p1, p2, p3, p4, id)
+extern void __main(void);
+extern void __io_init(void);
+extern void __exit(void);
+extern sysarg_t __syscall(const sysarg_t p1, const sysarg_t p2, const sysarg_t p3, const sysarg_t p4, const syscall_t id);
+#endif
+/** @}
+ */

 /tags/0.2.0.2/uspace/libc/include/ipc/fb.h
 ,0 → 1,81
+/*
+ * Copyright (C) 2006 Ondrej Palkovsky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup libcipc
+ * @{
+ */
+/** @file
+ */
+#include <arch/types.h>
+#include <types.h>
+#ifndef __libc__FB_H__
+#define __libc__FB_H__
+#define FB_PUTCHAR           1025
+#define FB_CLEAR             1026
+#define FB_GET_CSIZE         1027
+#define FB_CURSOR_VISIBILITY 1028
+#define FB_CURSOR_GOTO       1029
+#define FB_SCROLL            1030
+#define FB_VIEWPORT_SWITCH   1031
+#define FB_VIEWPORT_CREATE   1032
+#define FB_VIEWPORT_DELETE   1033
+#define FB_SET_STYLE         1034
+#define FB_GET_RESOLUTION    1035
+#define FB_DRAW_TEXT_DATA    1036
+#define FB_FLUSH             1037
+#define FB_VIEWPORT_DB       1038
+#define FB_DRAW_PPM          1100
+#define FB_PREPARE_SHM       1101
+#define FB_DROP_SHM          1102
+#define FB_SHM2PIXMAP        1103
+#define FB_VP_DRAW_PIXMAP    1104
+#define FB_VP2PIXMAP         1105
+#define FB_DROP_PIXMAP       1106
+#define FB_TRANS_PUTCHAR     1107
+#define FB_ANIM_CREATE       1200
+#define FB_ANIM_DROP         1201
+#define FB_ANIM_ADDPIXMAP    1202
+#define FB_ANIM_CHGVP        1203
+#define FB_ANIM_START        1204
+#define FB_ANIM_STOP         1205
+#define FB_POINTER_MOVE      1300
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/uspace/libc/include/ipc/ipc.h
 ,0 → 1,96
+/*
+ * Copyright (C) 2006 Ondrej Palkovsky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup libcipc
+ * @{
+ */
+/** @file
+ */
+#ifndef __LIBIPC_IPC_H__
+#define __LIBIPC_IPC_H__
+#include <kernel/ipc/ipc.h>
+#include <kernel/ipc/irq.h>
+#include <libc.h>
+#include <types.h>
+#include <kernel/synch/synch.h>
+typedef sysarg_t ipcarg_t;
+typedef struct {
+    ipcarg_t args[IPC_CALL_LEN];
+    ipcarg_t in_phone_hash;
+} ipc_call_t ;
+typedef sysarg_t ipc_callid_t;
+typedef void (* ipc_async_callback_t)(void *private, int retval,
+                      ipc_call_t *data);
+#define ipc_call_sync_2(phoneid, method, arg1, arg2, res1, res2) ipc_call_sync_3((phoneid), (method), (arg1), (arg2), 0, (res1), (res2), 0)
+extern int ipc_call_sync_3(int phoneid, ipcarg_t method, ipcarg_t arg1,
+               ipcarg_t arg2, ipcarg_t arg3,
+               ipcarg_t *result1, ipcarg_t *result2,
+               ipcarg_t *result3);
+extern int ipc_call_sync(int phoneid, ipcarg_t method, ipcarg_t arg1,
+             ipcarg_t *result);
+extern ipc_callid_t ipc_wait_cycle(ipc_call_t *call, uint32_t usec, int flags);
+extern ipc_callid_t ipc_wait_for_call_timeout(ipc_call_t *data, uint32_t usec);
+static inline ipc_callid_t ipc_wait_for_call(ipc_call_t *data)
+{
+    return ipc_wait_for_call_timeout(data, SYNCH_NO_TIMEOUT);
+}
+extern ipc_callid_t ipc_trywait_for_call(ipc_call_t *data);
+extern ipcarg_t ipc_answer_fast(ipc_callid_t callid, ipcarg_t retval, ipcarg_t arg1,
+               ipcarg_t arg2);
+extern ipcarg_t ipc_answer(ipc_callid_t callid, ipc_call_t *call);
+#define ipc_call_async(phoneid,method,arg1,private, callback,can_preempt) (ipc_call_async_2(phoneid, method, arg1, 0, private, callback, can_preempt))
+extern void ipc_call_async_2(int phoneid, ipcarg_t method, ipcarg_t arg1,
+              ipcarg_t arg2, void *private,
+              ipc_async_callback_t callback, int can_preempt);
+extern void ipc_call_async_3(int phoneid, ipcarg_t method, ipcarg_t arg1,
+                 ipcarg_t arg2, ipcarg_t arg3, void *private,
+                 ipc_async_callback_t callback, int can_preempt);
+extern int ipc_connect_to_me(int phoneid, int arg1, int arg2, ipcarg_t *phone);
+extern int ipc_connect_me_to(int phoneid, int arg1, int arg2);
+extern int ipc_hangup(int phoneid);
+extern int ipc_register_irq(int irq, irq_code_t *code);
+extern int ipc_unregister_irq(int irq);
+extern int ipc_forward_fast(ipc_callid_t callid, int phoneid, int method, ipcarg_t arg1);
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/uspace/libc/include/ipc/ns.h
 ,0 → 1,44
+/*
+ * Copyright (C) 2006 Ondrej Palkovsky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup libcipc
+ * @{
+ */
+/** @file
+ */
+#ifndef __LIBIPC__NS_H__
+#define __LIBIPC__NS_H__
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/uspace/libc/include/ipc/services.h
 ,0 → 1,55
+/*
+ * Copyright (C) 2006 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup libcipc
+ * @{
+ */
+/**
+ * @file    services.h
+ * @brief   List of all known services and their codes.
+ */
+#ifndef __LIBIPC__SERVICES_H__
+#define __LIBIPC__SERVICES_H__
+#define SERVICE_PCI     1
+#define SERVICE_KEYBOARD    2
+#define SERVICE_VIDEO       3
+#define SERVICE_CONSOLE     4
+/* Memory area to be received from NS */
+#define SERVICE_MEM_REALTIME    1
+#define SERVICE_MEM_KLOG        2
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/uspace/libc/include/align.h
 ,0 → 1,59
+/*
+ * Copyright (C) 2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup libc
+ * @{
+ */
+/** @file
+ */
+#ifndef __ALIGN_H__
+#define __ALIGN_H__
+/** Align to the nearest lower address.
+ *
+ * @param s Address or size to be aligned.
+ * @param a Size of alignment, must be power of 2.
+ */
+#define ALIGN_DOWN(s, a)    ((s) & ~((a) - 1))
+/** Align to the nearest higher address.
+ *
+ * @param s Address or size to be aligned.
+ * @param a Size of alignment, must be power of 2.
+ */
+#define ALIGN_UP(s, a)      ((long)((s) + ((a) - 1)) & ~((long) (a) - 1))
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/uspace/libc/include/futex.h
 ,0 → 1,55
+/*
+ * Copyright (C) 2006 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup libc
+ * @{
+ */
+/** @file
+ */
+#ifndef __LIBC__FUTEX_H__
+#define __LIBC__FUTEX_H__
+#include <atomic.h>
+#include <types.h>
+#define FUTEX_INITIALIZER     {1}
+extern void futex_initialize(atomic_t *futex, int value);
+extern int futex_down(atomic_t *futex);
+extern int futex_trydown(atomic_t *futex);
+extern int futex_down_timeout(atomic_t *futex, uint32_t usec, int flags);
+extern int futex_up(atomic_t *futex);
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/uspace/libc/include/endian.h
 ,0 → 1,51
+/*
+ * Copyright (C) 2006 Josef Cejka
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup libc
+ * @{
+ */
+/** @file
+ */
+#ifndef __LIBC__ENDIAN_H__
+#define __LIBC__ENDIAN_H__
+#define __LITTLE_ENDIAN 1234
+#define __BIG_ENDIAN    4321
+#define __PDP_ENDIAN    3412
+#include <libarch/endian.h>
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/uspace/libc/include/ddi.h
 ,0 → 1,50
+/*
+ * Copyright (C) 2006 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup libc
+ * @{
+ */
+/** @file
+ */
+#ifndef __LIBC_DDI_H__
+#define __LIBC_DDI_H__
+#include <task.h>
+extern int map_physmem(void *pf, void *vp, unsigned long pages, int flags);
+extern int iospace_enable(task_id_t id, void *ioaddr, unsigned long size);
+extern int preemption_control(int enable);
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/uspace/libc/include/limits.h
 ,0 → 1,78
+/*
+ * Copyright (C) 2006 Josef Cejka
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup libc
+ * @{
+ */
+/** @file
+ */
+#ifndef __LIBC__LIMITS_H__
+#define __LIBC__LIMITS_H__
+#include <stdint.h>
+#include <libarch/limits.h>
+/* char */
+#define SCHAR_MIN MIN_INT8
+#define SCHAR_MAX MAX_INT8
+#define UCHAR_MIN MIN_UINT8
+#define UCHAR_MAX MAX_UINT8
+#ifdef __CHAR_UNSIGNED__
+# define CHAR_MIN UCHAR_MIN
+# define CHAR_MAX UCHAR_MAX
+#else
+# define CHAR_MIN SCHAR_MIN
+# define CHAR_MAX SCHAR_MAX
+#endif
+/* short int */
+#define SHRT_MIN MIN_INT16
+#define SHRT_MAX MAX_INT16
+#define USHRT_MIN MIN_UINT16
+#define USHRT_MAX MAX_UINT16
+#define INT_MIN MIN_INT32
+#define INT_MAX MAX_INT32
+#define UINT_MIN MIN_UINT32
+#define UINT_MAX MAX_UINT32
+#define LLONG_MIN MIN_INT64
+#define LLONG_MAX MAX_INT64
+#define ULLONG_MIN MIN_UINT64
+#define ULLONG_MAX MAX_UINT64
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/uspace/libc/include/as.h
 ,0 → 1,57
+/*
+ * Copyright (C) 2005 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup libc
+ * @{
+ */
+/** @file
+ */
+#ifndef __libc_AS_H__
+#define __libc_AS_H__
+#include <types.h>
+#include <task.h>
+#include <kernel/arch/mm/as.h>
+#include <kernel/mm/as.h>
+#define USER_ADDRESS_SPACE_SIZE_ARCH (USER_ADDRESS_SPACE_END_ARCH-USER_ADDRESS_SPACE_START_ARCH+1)
+extern void *as_area_create(void *address, size_t size, int flags);
+extern int as_area_resize(void *address, size_t size, int flags);
+extern int as_area_destroy(void *address);
+extern void *set_maxheapsize(size_t mhs);
+extern void * as_get_mappable_page(size_t sz);
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/uspace/libc/include/stdint.h
 ,0 → 1,68
+/*
+ * Copyright (C) 2006 Josef Cejka
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup libc
+ * @{
+ */
+/** @file
+ */
+#ifndef __LIBC__STDINT_H__
+#define __LIBC__STDINT_H__
+/* Definitions of types with fixed size*/
+#include <types.h>
+#define MAX_INT8 (0x7F)
+#define MIN_INT8 (0x80)
+#define MAX_UINT8 (0xFFu)
+#define MIN_UINT8 (0u)
+#define MAX_INT16 (0x7FFF)
+#define MIN_INT16 (0x8000)
+#define MAX_UINT16 (0xFFFFu)
+#define MIN_UINT16 (0u)
+#define MAX_INT32 (0x7FFFFFFF)
+#define MIN_INT32 (0x80000000)
+#define MAX_UINT32 (0xFFFFFFFFu)
+#define MIN_UINT32 (0u)
+#define MAX_INT64 (0x7FFFFFFFFFFFFFFFll)
+#define MIN_INT64 (0x8000000000000000ll)
+#define MAX_UINT64 (0xFFFFFFFFFFFFFFFFull)
+#define MIN_UINT64 (0ull)
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/uspace/libc/include/string.h
 ,0 → 1,66
+/*
+ * Copyright (C) 2005 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup libc
+ * @{
+ */
+/** @file
+ */
+#ifndef __LIBC__STRING_H__
+#define __LIBC__STRING_H__
+#include <types.h>
+#define bzero(ptr, len) memset((ptr), 0, (len))
+void * memset(void *s, int c, size_t n);
+void * memcpy(void *dest, const void *src, size_t n);
+void * memmove(void *dest, const void *src, size_t n);
+int strcmp(const char *, const char *);
+char *strcpy(char *dest, const char *src);
+char *strncpy(char *dest, const char *src, size_t n);
+size_t strlen(const char *str);
+char *strchr(const char *str, int c);
+char *strrchr(const char *str, int c);
+long int strtol(const char *nptr, char **endptr, int base);
+unsigned long strtoul(const char *nptr, char **endptr, int base);
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/uspace/libc/include/malloc.h
 ,0 → 1,537
+/*
+  Default header file for malloc-2.8.x, written by Doug Lea
+  and released to the public domain, as explained at
+  http://creativecommons.org/licenses/publicdomain.
+  last update: Mon Aug 15 08:55:52 2005  Doug Lea  (dl at gee)
+  This header is for ANSI C/C++ only.  You can set any of
+  the following #defines before including:
+  * If USE_DL_PREFIX is defined, it is assumed that malloc.c
+    was also compiled with this option, so all routines
+    have names starting with "dl".
+  * If HAVE_USR_INCLUDE_MALLOC_H is defined, it is assumed that this
+    file will be #included AFTER <malloc.h>. This is needed only if
+    your system defines a struct mallinfo that is incompatible with the
+    standard one declared here.  Otherwise, you can include this file
+    INSTEAD of your system system <malloc.h>.  At least on ANSI, all
+    declarations should be compatible with system versions
+  * If MSPACES is defined, declarations for mspace versions are included.
+*/
+#ifndef MALLOC_280_H
+#define MALLOC_280_H
+#ifdef __cplusplus
+extern "C" {
+#endif
+#include <stddef.h>   /* for size_t */
+#if !ONLY_MSPACES
+#ifndef USE_DL_PREFIX
+#define dlcalloc               calloc
+#define dlfree                 free
+#define dlmalloc               malloc
+#define dlmemalign             memalign
+#define dlrealloc              realloc
+#define dlvalloc               valloc
+#define dlpvalloc              pvalloc
+#define dlmallinfo             mallinfo
+#define dlmallopt              mallopt
+#define dlmalloc_trim          malloc_trim
+#define dlmalloc_stats         malloc_stats
+#define dlmalloc_usable_size   malloc_usable_size
+#define dlmalloc_footprint     malloc_footprint
+#define dlmalloc_max_footprint malloc_max_footprint
+#define dlindependent_calloc   independent_calloc
+#define dlindependent_comalloc independent_comalloc
+#endif /* USE_DL_PREFIX */
+/*
+  malloc(size_t n)
+  Returns a pointer to a newly allocated chunk of at least n bytes, or
+  null if no space is available, in which case errno is set to ENOMEM
+  on ANSI C systems.
+  If n is zero, malloc returns a minimum-sized chunk. (The minimum
+  size is 16 bytes on most 32bit systems, and 32 bytes on 64bit
+  systems.)  Note that size_t is an unsigned type, so calls with
+  arguments that would be negative if signed are interpreted as
+  requests for huge amounts of space, which will often fail. The
+  maximum supported value of n differs across systems, but is in all
+  cases less than the maximum representable value of a size_t.
+*/
+void* dlmalloc(size_t);
+/*
+  free(void* p)
+  Releases the chunk of memory pointed to by p, that had been previously
+  allocated using malloc or a related routine such as realloc.
+  It has no effect if p is null. If p was not malloced or already
+  freed, free(p) will by default cuase the current program to abort.
+*/
+void  dlfree(void*);
+/*
+  calloc(size_t n_elements, size_t element_size);
+  Returns a pointer to n_elements * element_size bytes, with all locations
+  set to zero.
+*/
+void* dlcalloc(size_t, size_t);
+/*
+  realloc(void* p, size_t n)
+  Returns a pointer to a chunk of size n that contains the same data
+  as does chunk p up to the minimum of (n, p's size) bytes, or null
+  if no space is available.
+  The returned pointer may or may not be the same as p. The algorithm
+  prefers extending p in most cases when possible, otherwise it
+  employs the equivalent of a malloc-copy-free sequence.
+  If p is null, realloc is equivalent to malloc.
+  If space is not available, realloc returns null, errno is set (if on
+  ANSI) and p is NOT freed.
+  if n is for fewer bytes than already held by p, the newly unused
+  space is lopped off and freed if possible.  realloc with a size
+  argument of zero (re)allocates a minimum-sized chunk.
+  The old unix realloc convention of allowing the last-free'd chunk
+  to be used as an argument to realloc is not supported.
+*/
+void* dlrealloc(void*, size_t);
+/*
+  memalign(size_t alignment, size_t n);
+  Returns a pointer to a newly allocated chunk of n bytes, aligned
+  in accord with the alignment argument.
+  The alignment argument should be a power of two. If the argument is
+  not a power of two, the nearest greater power is used.
+-byte alignment is guaranteed by normal malloc calls, so don't
+  bother calling memalign with an argument of 8 or less.
+  Overreliance on memalign is a sure way to fragment space.
+*/
+void* dlmemalign(size_t, size_t);
+/*
+  valloc(size_t n);
+  Equivalent to memalign(pagesize, n), where pagesize is the page
+  size of the system. If the pagesize is unknown, 4096 is used.
+*/
+void* dlvalloc(size_t);
+/*
+  mallopt(int parameter_number, int parameter_value)
+  Sets tunable parameters The format is to provide a
+  (parameter-number, parameter-value) pair.  mallopt then sets the
+  corresponding parameter to the argument value if it can (i.e., so
+  long as the value is meaningful), and returns 1 if successful else
+.  SVID/XPG/ANSI defines four standard param numbers for mallopt,
+  normally defined in malloc.h.  None of these are use in this malloc,
+  so setting them has no effect. But this malloc also supports other
+  options in mallopt:
+  Symbol            param #  default    allowed param values
+  M_TRIM_THRESHOLD     -1   2*1024*1024   any   (-1U disables trimming)
+  M_GRANULARITY        -2     page size   any power of 2 >= page size
+  M_MMAP_THRESHOLD     -3      256*1024   any   (or 0 if no MMAP support)
+*/
+int dlmallopt(int, int);
+#define M_TRIM_THRESHOLD     (-1)
+#define M_GRANULARITY        (-2)
+#define M_MMAP_THRESHOLD     (-3)
+/*
+  malloc_footprint();
+  Returns the number of bytes obtained from the system.  The total
+  number of bytes allocated by malloc, realloc etc., is less than this
+  value. Unlike mallinfo, this function returns only a precomputed
+  result, so can be called frequently to monitor memory consumption.
+  Even if locks are otherwise defined, this function does not use them,
+  so results might not be up to date.
+*/
+size_t dlmalloc_footprint(void);
+size_t dlmalloc_max_footprint(void);
+#if !NO_MALLINFO
+/*
+  mallinfo()
+  Returns (by copy) a struct containing various summary statistics:
+  arena:     current total non-mmapped bytes allocated from system
+  ordblks:   the number of free chunks
+  smblks:    always zero.
+  hblks:     current number of mmapped regions
+  hblkhd:    total bytes held in mmapped regions
+  usmblks:   the maximum total allocated space. This will be greater
+                than current total if trimming has occurred.
+  fsmblks:   always zero
+  uordblks:  current total allocated space (normal or mmapped)
+  fordblks:  total free space
+  keepcost:  the maximum number of bytes that could ideally be released
+               back to system via malloc_trim. ("ideally" means that
+               it ignores page restrictions etc.)
+  Because these fields are ints, but internal bookkeeping may
+  be kept as longs, the reported values may wrap around zero and
+  thus be inaccurate.
+*/
+#ifndef HAVE_USR_INCLUDE_MALLOC_H
+#ifndef _MALLOC_H
+#ifndef MALLINFO_FIELD_TYPE
+#define MALLINFO_FIELD_TYPE size_t
+#endif /* MALLINFO_FIELD_TYPE */
+struct mallinfo {
+  MALLINFO_FIELD_TYPE arena;    /* non-mmapped space allocated from system */
+  MALLINFO_FIELD_TYPE ordblks;  /* number of free chunks */
+  MALLINFO_FIELD_TYPE smblks;   /* always 0 */
+  MALLINFO_FIELD_TYPE hblks;    /* always 0 */
+  MALLINFO_FIELD_TYPE hblkhd;   /* space in mmapped regions */
+  MALLINFO_FIELD_TYPE usmblks;  /* maximum total allocated space */
+  MALLINFO_FIELD_TYPE fsmblks;  /* always 0 */
+  MALLINFO_FIELD_TYPE uordblks; /* total allocated space */
+  MALLINFO_FIELD_TYPE fordblks; /* total free space */
+  MALLINFO_FIELD_TYPE keepcost; /* releasable (via malloc_trim) space */
+};
+#endif  /* _MALLOC_H */
+#endif  /* HAVE_USR_INCLUDE_MALLOC_H */
+struct mallinfo dlmallinfo(void);
+#endif  /* NO_MALLINFO */
+/*
+  independent_calloc(size_t n_elements, size_t element_size, void* chunks[]);
+  independent_calloc is similar to calloc, but instead of returning a
+  single cleared space, it returns an array of pointers to n_elements
+  independent elements that can hold contents of size elem_size, each
+  of which starts out cleared, and can be independently freed,
+  realloc'ed etc. The elements are guaranteed to be adjacently
+  allocated (this is not guaranteed to occur with multiple callocs or
+  mallocs), which may also improve cache locality in some
+  applications.
+  The "chunks" argument is optional (i.e., may be null, which is
+  probably the most typical usage). If it is null, the returned array
+  is itself dynamically allocated and should also be freed when it is
+  no longer needed. Otherwise, the chunks array must be of at least
+  n_elements in length. It is filled in with the pointers to the
+  chunks.
+  In either case, independent_calloc returns this pointer array, or
+  null if the allocation failed.  If n_elements is zero and "chunks"
+  is null, it returns a chunk representing an array with zero elements
+  (which should be freed if not wanted).
+  Each element must be individually freed when it is no longer
+  needed. If you'd like to instead be able to free all at once, you
+  should instead use regular calloc and assign pointers into this
+  space to represent elements.  (In this case though, you cannot
+  independently free elements.)
+  independent_calloc simplifies and speeds up implementations of many
+  kinds of pools.  It may also be useful when constructing large data
+  structures that initially have a fixed number of fixed-sized nodes,
+  but the number is not known at compile time, and some of the nodes
+  may later need to be freed. For example:
+  struct Node { int item; struct Node* next; };
+  struct Node* build_list() {
+    struct Node** pool;
+    int n = read_number_of_nodes_needed();
+    if (n <= 0) return 0;
+    pool = (struct Node**)(independent_calloc(n, sizeof(struct Node), 0);
+    if (pool == 0) die();
+    // organize into a linked list...
+    struct Node* first = pool[0];
+    for (i = 0; i < n-1; ++i)
+      pool[i]->next = pool[i+1];
+    free(pool);     // Can now free the array (or not, if it is needed later)
+    return first;
+  }
+*/
+void** dlindependent_calloc(size_t, size_t, void**);
+/*
+  independent_comalloc(size_t n_elements, size_t sizes[], void* chunks[]);
+  independent_comalloc allocates, all at once, a set of n_elements
+  chunks with sizes indicated in the "sizes" array.    It returns
+  an array of pointers to these elements, each of which can be
+  independently freed, realloc'ed etc. The elements are guaranteed to
+  be adjacently allocated (this is not guaranteed to occur with
+  multiple callocs or mallocs), which may also improve cache locality
+  in some applications.
+  The "chunks" argument is optional (i.e., may be null). If it is null
+  the returned array is itself dynamically allocated and should also
+  be freed when it is no longer needed. Otherwise, the chunks array
+  must be of at least n_elements in length. It is filled in with the
+  pointers to the chunks.
+  In either case, independent_comalloc returns this pointer array, or
+  null if the allocation failed.  If n_elements is zero and chunks is
+  null, it returns a chunk representing an array with zero elements
+  (which should be freed if not wanted).
+  Each element must be individually freed when it is no longer
+  needed. If you'd like to instead be able to free all at once, you
+  should instead use a single regular malloc, and assign pointers at
+  particular offsets in the aggregate space. (In this case though, you
+  cannot independently free elements.)
+  independent_comallac differs from independent_calloc in that each
+  element may have a different size, and also that it does not
+  automatically clear elements.
+  independent_comalloc can be used to speed up allocation in cases
+  where several structs or objects must always be allocated at the
+  same time.  For example:
+  struct Head { ... }
+  struct Foot { ... }
+  void send_message(char* msg) {
+    int msglen = strlen(msg);
+    size_t sizes[3] = { sizeof(struct Head), msglen, sizeof(struct Foot) };
+    void* chunks[3];
+    if (independent_comalloc(3, sizes, chunks) == 0)
+      die();
+    struct Head* head = (struct Head*)(chunks[0]);
+    char*        body = (char*)(chunks[1]);
+    struct Foot* foot = (struct Foot*)(chunks[2]);
+    // ...
+  }
+  In general though, independent_comalloc is worth using only for
+  larger values of n_elements. For small values, you probably won't
+  detect enough difference from series of malloc calls to bother.
+  Overuse of independent_comalloc can increase overall memory usage,
+  since it cannot reuse existing noncontiguous small chunks that
+  might be available for some of the elements.
+*/
+void** dlindependent_comalloc(size_t, size_t*, void**);
+/*
+  pvalloc(size_t n);
+  Equivalent to valloc(minimum-page-that-holds(n)), that is,
+  round up n to nearest pagesize.
+ */
+void*  dlpvalloc(size_t);
+/*
+  malloc_trim(size_t pad);
+  If possible, gives memory back to the system (via negative arguments
+  to sbrk) if there is unused memory at the `high' end of the malloc
+  pool or in unused MMAP segments. You can call this after freeing
+  large blocks of memory to potentially reduce the system-level memory
+  requirements of a program. However, it cannot guarantee to reduce
+  memory. Under some allocation patterns, some large free blocks of
+  memory will be locked between two used chunks, so they cannot be
+  given back to the system.
+  The `pad' argument to malloc_trim represents the amount of free
+  trailing space to leave untrimmed. If this argument is zero, only
+  the minimum amount of memory to maintain internal data structures
+  will be left. Non-zero arguments can be supplied to maintain enough
+  trailing space to service future expected allocations without having
+  to re-obtain memory from the system.
+  Malloc_trim returns 1 if it actually released any memory, else 0.
+*/
+int  dlmalloc_trim(size_t);
+/*
+  malloc_usable_size(void* p);
+  Returns the number of bytes you can actually use in
+  an allocated chunk, which may be more than you requested (although
+  often not) due to alignment and minimum size constraints.
+  You can use this many bytes without worrying about
+  overwriting other allocated objects. This is not a particularly great
+  programming practice. malloc_usable_size can be more useful in
+  debugging and assertions, for example:
+  p = malloc(n);
+  assert(malloc_usable_size(p) >= 256);
+*/
+size_t dlmalloc_usable_size(void*);
+/*
+  malloc_stats();
+  Prints on stderr the amount of space obtained from the system (both
+  via sbrk and mmap), the maximum amount (which may be more than
+  current if malloc_trim and/or munmap got called), and the current
+  number of bytes allocated via malloc (or realloc, etc) but not yet
+  freed. Note that this is the number of bytes allocated, not the
+  number requested. It will be larger than the number requested
+  because of alignment and bookkeeping overhead. Because it includes
+  alignment wastage as being in use, this figure may be greater than
+  zero even when no user-level chunks are allocated.
+  The reported current and maximum system memory can be inaccurate if
+  a program makes other calls to system memory allocation functions
+  (normally sbrk) outside of malloc.
+  malloc_stats prints only the most commonly interesting statistics.
+  More information can be obtained by calling mallinfo.
+*/
+void  dlmalloc_stats(void);
+#endif /* !ONLY_MSPACES */
+#if MSPACES
+/*
+  mspace is an opaque type representing an independent
+  region of space that supports mspace_malloc, etc.
+*/
+typedef void* mspace;
+/*
+  create_mspace creates and returns a new independent space with the
+  given initial capacity, or, if 0, the default granularity size.  It
+  returns null if there is no system memory available to create the
+  space.  If argument locked is non-zero, the space uses a separate
+  lock to control access. The capacity of the space will grow
+  dynamically as needed to service mspace_malloc requests.  You can
+  control the sizes of incremental increases of this space by
+  compiling with a different DEFAULT_GRANULARITY or dynamically
+  setting with mallopt(M_GRANULARITY, value).
+*/
+mspace create_mspace(size_t capacity, int locked);
+/*
+  destroy_mspace destroys the given space, and attempts to return all
+  of its memory back to the system, returning the total number of
+  bytes freed. After destruction, the results of access to all memory
+  used by the space become undefined.
+*/
+size_t destroy_mspace(mspace msp);
+/*
+  create_mspace_with_base uses the memory supplied as the initial base
+  of a new mspace. Part (less than 128*sizeof(size_t) bytes) of this
+  space is used for bookkeeping, so the capacity must be at least this
+  large. (Otherwise 0 is returned.) When this initial space is
+  exhausted, additional memory will be obtained from the system.
+  Destroying this space will deallocate all additionally allocated
+  space (if possible) but not the initial base.
+*/
+mspace create_mspace_with_base(void* base, size_t capacity, int locked);
+/*
+  mspace_malloc behaves as malloc, but operates within
+  the given space.
+*/
+void* mspace_malloc(mspace msp, size_t bytes);
+/*
+  mspace_free behaves as free, but operates within
+  the given space.
+  If compiled with FOOTERS==1, mspace_free is not actually needed.
+  free may be called instead of mspace_free because freed chunks from
+  any space are handled by their originating spaces.
+*/
+void mspace_free(mspace msp, void* mem);
+/*
+  mspace_realloc behaves as realloc, but operates within
+  the given space.
+  If compiled with FOOTERS==1, mspace_realloc is not actually
+  needed.  realloc may be called instead of mspace_realloc because
+  realloced chunks from any space are handled by their originating
+  spaces.
+*/
+void* mspace_realloc(mspace msp, void* mem, size_t newsize);
+/*
+  mspace_calloc behaves as calloc, but operates within
+  the given space.
+*/
+void* mspace_calloc(mspace msp, size_t n_elements, size_t elem_size);
+/*
+  mspace_memalign behaves as memalign, but operates within
+  the given space.
+*/
+void* mspace_memalign(mspace msp, size_t alignment, size_t bytes);
+/*
+  mspace_independent_calloc behaves as independent_calloc, but
+  operates within the given space.
+*/
+void** mspace_independent_calloc(mspace msp, size_t n_elements,
+                                 size_t elem_size, void* chunks[]);
+/*
+  mspace_independent_comalloc behaves as independent_comalloc, but
+  operates within the given space.
+*/
+void** mspace_independent_comalloc(mspace msp, size_t n_elements,
+                                   size_t sizes[], void* chunks[]);
+/*
+  mspace_footprint() returns the number of bytes obtained from the
+  system for this space.
+*/
+size_t mspace_footprint(mspace msp);
+#if !NO_MALLINFO
+/*
+  mspace_mallinfo behaves as mallinfo, but reports properties of
+  the given space.
+*/
+struct mallinfo mspace_mallinfo(mspace msp);
+#endif /* NO_MALLINFO */
+/*
+  mspace_malloc_stats behaves as malloc_stats, but reports
+  properties of the given space.
+*/
+void mspace_malloc_stats(mspace msp);
+/*
+  mspace_trim behaves as malloc_trim, but
+  operates within the given space.
+*/
+int mspace_trim(mspace msp, size_t pad);
+/*
+  An alias for mallopt.
+*/
+int mspace_mallopt(int, int);
+#endif  /* MSPACES */
+#ifdef __cplusplus
+};  /* end of extern "C" */
+#endif
+#endif /* MALLOC_280_H */
+ /** @}
+ */

 /tags/0.2.0.2/uspace/libc/include/stddef.h
 ,0 → 1,47
+/*
+ * Copyright (C) 2006 Josef Cejka
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup libc
+ * @{
+ */
+/** @file
+ */
+#ifndef __LIBC__STDDEF_H__
+#define __LIBC__STDDEF_H__
+#include <types.h>
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/uspace/libc/include/psthread.h
 ,0 → 1,101
+/*
+ * Copyright (C) 2006 Ondrej Palkovsky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup libc
+ * @{
+ */
+/** @file
+ */
+#ifndef __LIBC__PSTHREAD_H__
+#define __LIBC__PSTHREAD_H__
+#include <libarch/psthread.h>
+#include <libadt/list.h>
+#include <libarch/thread.h>
+#ifndef context_set
+#define context_set(c, _pc, stack, size, ptls)          \
+    (c)->pc = (sysarg_t) (_pc);             \
+    (c)->sp = ((sysarg_t) (stack)) + (size) - SP_DELTA;     \
+        (c)->tls = (sysarg_t) (ptls);
+#endif /* context_set */
+#define PSTHREAD_SERIALIZED   1
+typedef enum {
+    PS_TO_MANAGER,
+    PS_FROM_MANAGER,
+    PS_PREEMPT,
+    PS_FROM_DEAD
+} pschange_type;
+typedef sysarg_t pstid_t;
+struct psthread_data {
+    link_t link;
+    context_t ctx;
+    void *stack;
+    void *arg;
+    int (*func)(void *);
+    tcb_t *tcb;
+    struct psthread_data *waiter;
+    int finished;
+    int retval;
+    int flags;
+};
+typedef struct psthread_data psthread_data_t;
+extern int context_save(context_t *c);
+extern void context_restore(context_t *c) __attribute__ ((noreturn));
+pstid_t psthread_create(int (*func)(void *), void *arg);
+int psthread_join(pstid_t psthrid);
+psthread_data_t * psthread_setup(void);
+void psthread_teardown(psthread_data_t *pt);
+int psthread_schedule_next_adv(pschange_type ctype);
+void psthread_add_ready(pstid_t ptid);
+void psthread_add_manager(pstid_t psthrid);
+void psthread_remove_manager(void);
+pstid_t psthread_get_id(void);
+void psthread_inc_sercount(void);
+void psthread_dec_sercount(void);
+static inline int psthread_schedule_next() {
+    return psthread_schedule_next_adv(PS_PREEMPT);
+}
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/uspace/libc/include/async.h
 ,0 → 1,137
+/*
+ * Copyright (C) 2006 Ondrej Palkovsky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup libc
+ * @{
+ */
+/** @file
+ */
+#ifndef _libc_ASYNC_H_
+#define _libc_ASYNC_H_
+#include <ipc/ipc.h>
+#include <psthread.h>
+#include <sys/time.h>
+#include <atomic.h>
+typedef ipc_callid_t aid_t;
+typedef void (*async_client_conn_t)(ipc_callid_t callid, ipc_call_t *call);
+static inline void async_manager(void)
+{
+    psthread_schedule_next_adv(PS_TO_MANAGER);
+}
+ipc_callid_t async_get_call_timeout(ipc_call_t *call, suseconds_t usecs);
+static inline ipc_callid_t async_get_call(ipc_call_t *data)
+{
+    return async_get_call_timeout(data, 0);
+}
+aid_t async_send_2(int phoneid, ipcarg_t method, ipcarg_t arg1, ipcarg_t arg2,
+           ipc_call_t *dataptr);
+aid_t async_send_3(int phoneid, ipcarg_t method, ipcarg_t arg1, ipcarg_t arg2,
+           ipcarg_t arg3, ipc_call_t *dataptr);
+void async_wait_for(aid_t amsgid, ipcarg_t *result);
+int async_wait_timeout(aid_t amsgid, ipcarg_t *retval, suseconds_t timeout);
+/** Pseudo-synchronous message sending
+ *
+ * Send message through IPC, wait in the event loop, until it is received
+ *
+ * @return Return code of message
+ */
+static inline ipcarg_t async_req_2(int phoneid, ipcarg_t method, ipcarg_t arg1, ipcarg_t arg2, ipcarg_t *r1, ipcarg_t *r2)
+{
+    ipc_call_t result;
+    ipcarg_t rc;
+    aid_t eid = async_send_2(phoneid, method, arg1, arg2, &result);
+    async_wait_for(eid, &rc);
+    if (r1)
+        *r1 = IPC_GET_ARG1(result);
+    if (r2)
+        *r2 = IPC_GET_ARG2(result);
+    return rc;
+}
+#define async_req(phoneid, method, arg1, r1) async_req_2(phoneid, method, arg1, 0, r1, 0)
+static inline ipcarg_t async_req_3(int phoneid, ipcarg_t method, ipcarg_t arg1,
+                   ipcarg_t arg2, ipcarg_t arg3, ipcarg_t *r1,
+                   ipcarg_t *r2, ipcarg_t *r3)
+{
+    ipc_call_t result;
+    ipcarg_t rc;
+    aid_t eid = async_send_3(phoneid, method, arg1, arg2, arg3, &result);
+    async_wait_for(eid, &rc);
+    if (r1)
+        *r1 = IPC_GET_ARG1(result);
+    if (r2)
+        *r2 = IPC_GET_ARG2(result);
+    if (r3)
+        *r3 = IPC_GET_ARG3(result);
+    return rc;
+}
+pstid_t async_new_connection(ipcarg_t in_phone_hash,ipc_callid_t callid,
+                 ipc_call_t *call,
+                 void (*cthread)(ipc_callid_t,ipc_call_t *));
+void async_usleep(suseconds_t timeout);
+void async_create_manager(void);
+void async_destroy_manager(void);
+void async_set_client_connection(async_client_conn_t conn);
+void async_set_interrupt_received(async_client_conn_t conn);
+int _async_init(void);
+/* Primitve functions for IPC communication */
+void async_msg_3(int phoneid, ipcarg_t method, ipcarg_t arg1, ipcarg_t arg2,
+         ipcarg_t arg3);
+void async_msg_2(int phoneid, ipcarg_t method, ipcarg_t arg1, ipcarg_t arg2);
+#define async_msg(ph,m,a1) async_msg_2(ph,m,a1,0)
+static inline void async_serialize_start(void)
+{
+    psthread_inc_sercount();
+}
+static inline void async_serialize_end(void)
+{
+    psthread_dec_sercount();
+}
+extern atomic_t async_futex;
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/uspace/libc/include/stdlib.h
 ,0 → 1,65
+/*
+ * Copyright (C) 2005 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup libc
+ * @{
+ */
+/** @file
+ */
+#ifndef __LIBC__STDLIB_H__
+#define __LIBC__STDLIB_H__
+#include <unistd.h>
+#include <malloc.h>
+#define abort() _exit(1)
+#define exit(status)    _exit((status))
+#define RAND_MAX 714025
+extern long int random(void);
+extern void srandom(unsigned int seed);
+static inline int rand(void)
+{
+    return random();
+}
+static inline void srand(unsigned int seed)
+{
+    srandom(seed);
+}
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/uspace/libc/include/stdio.h
 ,0 → 1,66
+/*
+ * Copyright (C) 2005 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup libc
+ * @{
+ */
+/** @file
+ */
+#ifndef __LIBC__STDIO_H__
+#define __LIBC__STDIO_H__
+#include <types.h>
+#include <stdarg.h>
+#define EOF (-1)
+#include <io/stream.h>
+extern int getchar(void);
+extern int puts(const char * str);
+extern int putchar(int c);
+extern int printf(const char *fmt, ...);
+extern int sprintf(char *str, const char *fmt, ...);
+extern int snprintf(char *str, size_t size, const char *fmt, ...);
+extern int vprintf(const char *fmt, va_list ap);
+extern int vsprintf(char *str, const char *fmt, va_list ap);
+extern int vsnprintf(char *str, size_t size, const char *fmt, va_list ap);
+#define fprintf(f, fmt, ...) printf(fmt, ##__VA_ARGS__)
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/uspace/libc/include/sysinfo.h
 ,0 → 1,52
+/*
+ * Copyright (C) 2006 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup libc
+ * @{
+ */
+/** @file
+ */
+#ifndef __LIBC_SYSINFO_H__
+#define __LIBC_SYSINFO_H__
+#include <libc.h>
+#include <sysinfo.h>
+#include <string.h>
+sysarg_t sysinfo_value(char *name);
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/uspace/libc/include/time.h
 ,0 → 1,44
+/*
+ * Copyright (C) 2006 Ondrej Palkovsky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup libc
+ * @{
+ */
+/** @file
+ */
+#ifndef __libc_TIME_H__
+#define __libc_TIME_H__
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/uspace/libc/include/assert.h
 ,0 → 1,62
+/*
+ * Copyright (C) 2005 Martin Decky
+ * Copyright (C) 2006 Josef Cejka
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup libc
+ * @{
+ */
+/** @file
+ */
+#ifndef __LIBC__ASSERT_H__
+#define __LIBC__ASSERT_H__
+/** Debugging assert macro
+ *
+ * If NDEBUG is not set, the assert() macro
+ * evaluates expr and if it is false prints
+ * error message and terminate program.
+ *
+ * @param expr Expression which is expected to be true.
+ *
+ */
+#include <stdlib.h>
+#ifndef NDEBUG
+#   define assert(expr) if (!(expr)) { printf("Assertion failed (%s) at file '%s', line %d.\n", #expr, __FILE__, __LINE__); abort();}
+#else
+#   define assert(expr)
+#endif
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/uspace/libc/include/task.h
 ,0 → 1,50
+/*
+ * Copyright (C) 2006 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup libc
+ * @{
+ */
+/** @file
+ */
+#ifndef __LIBC__TASK_H__
+#define __LIBC__TASK_H__
+#include <types.h>
+typedef uint64_t task_id_t;
+extern task_id_t task_get_id(void);
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/uspace/libc/include/cap.h
 ,0 → 1,49
+/*
+ * Copyright (C) 2006 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup libc
+ * @{
+ */
+/** @file
+ */
+#ifndef __CAP_H__
+#define __CAP_H__
+#include <task.h>
+extern int cap_grant(task_id_t id, unsigned int caps);
+extern int cap_revoke(task_id_t id, unsigned int caps);
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/uspace/libc/include/unistd.h
 ,0 → 1,56
+/*
+ * Copyright (C) 2005 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup libc
+ * @{
+ */
+/** @file
+ */
+#ifndef __LIBC__UNISTD_H__
+#define __LIBC__UNISTD_H__
+#include <types.h>
+#include <arch/mm/page.h>
+#define NULL 0
+#define getpagesize()     (PAGE_SIZE)
+extern ssize_t write(int fd, const void * buf, size_t count);
+extern ssize_t read(int fd, void * buf, size_t count);
+extern void _exit(int status);
+void *sbrk(ssize_t incr);
+void usleep(unsigned long usec);
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/uspace/libc/include/thread.h
 ,0 → 1,58
+/*
+ * Copyright (C) 2006 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup libc
+ * @{
+ */
+/** @file
+ */
+#ifndef __LIBC__THREAD_H__
+#define __LIBC__THREAD_H__
+#include <kernel/proc/uarg.h>
+#include <libarch/thread.h>
+#include <types.h>
+extern void __thread_entry(void);
+extern void __thread_main(uspace_arg_t *uarg);
+extern int thread_create(void (* function)(void *arg), void *arg, char *name);
+extern void thread_exit(int status);
+extern tcb_t * __make_tls(void);
+extern tcb_t * __alloc_tls(void **data, size_t size);
+extern void __free_tls(tcb_t *);
+extern void __free_tls_arch(tcb_t *, size_t size);
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/uspace/libc/include/libadt/hash_table.h
 ,0 → 1,92
+/*
+ * Copyright (C) 2006 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup libc
+ * @{
+ */
+/** @file
+ */
+#ifndef __HASH_TABLE_H__
+#define __HASH_TABLE_H__
+#include <libadt/list.h>
+#include <unistd.h>
+typedef unsigned long hash_count_t;
+typedef unsigned long hash_index_t;
+typedef struct hash_table hash_table_t;
+typedef struct hash_table_operations hash_table_operations_t;
+/** Hash table structure. */
+struct hash_table {
+    link_t *entry;
+    hash_count_t entries;
+    hash_count_t max_keys;
+    hash_table_operations_t *op;
+};
+/** Set of operations for hash table. */
+struct hash_table_operations {
+    /** Hash function.
+     *
+     * @param key Array of keys needed to compute hash index. All keys must be passed.
+     *
+     * @return Index into hash table.
+     */
+    hash_index_t (* hash)(unsigned long key[]);
+    /** Hash table item comparison function.
+     *
+     * @param key Array of keys that will be compared with item. It is not necessary to pass all keys.
+     *
+     * @return true if the keys match, false otherwise.
+     */
+    int (*compare)(unsigned long key[], hash_count_t keys, link_t *item);
+    /** Hash table item removal callback.
+     *
+     * @param item Item that was removed from the hash table.
+     */
+    void (*remove_callback)(link_t *item);
+};
+#define hash_table_get_instance(item, type, member) list_get_instance((item), type, member)
+extern int hash_table_create(hash_table_t *h, hash_count_t m, hash_count_t max_keys, hash_table_operations_t *op);
+extern void hash_table_insert(hash_table_t *h, unsigned long key[], link_t *item);
+extern link_t *hash_table_find(hash_table_t *h, unsigned long key[]);
+extern void hash_table_remove(hash_table_t *h, unsigned long key[], hash_count_t keys);
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/uspace/libc/include/libadt/list.h
 ,0 → 1,197
+/*
+ * Copyright (C) 2001-2004 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup libc
+ * @{
+ */
+/** @file
+ */
+#ifndef __LIST_H__
+#define __LIST_H__
+#include<unistd.h>
+#ifndef true
+# define true 1
+#endif
+#ifndef false
+# define false 0
+#endif
+typedef struct link link_t;
+/** Doubly linked list head and link type. */
+struct link {
+    link_t *prev;   /**< Pointer to the previous item in the list. */
+    link_t *next;   /**< Pointer to the next item in the list. */
+};
+/** Declare and initialize statically allocated list.
+ *
+ * @param name Name of the new statically allocated list.
+ */
+#define LIST_INITIALIZE(name)       link_t name = { .prev = &name, .next = &name }
+/** Initialize doubly-linked circular list link
+ *
+ * Initialize doubly-linked list link.
+ *
+ * @param link Pointer to link_t structure to be initialized.
+ */
+static inline void link_initialize(link_t *link)
+{
+    link->prev = NULL;
+    link->next = NULL;
+}
+/** Initialize doubly-linked circular list
+ *
+ * Initialize doubly-linked circular list.
+ *
+ * @param head Pointer to link_t structure representing head of the list.
+ */
+static inline void list_initialize(link_t *head)
+{
+    head->prev = head;
+    head->next = head;
+}
+/** Add item to the beginning of doubly-linked circular list
+ *
+ * Add item to the beginning of doubly-linked circular list.
+ *
+ * @param link Pointer to link_t structure to be added.
+ * @param head Pointer to link_t structure representing head of the list.
+ */
+static inline void list_prepend(link_t *link, link_t *head)
+{
+    link->next = head->next;
+    link->prev = head;
+    head->next->prev = link;
+    head->next = link;
+}
+/** Add item to the end of doubly-linked circular list
+ *
+ * Add item to the end of doubly-linked circular list.
+ *
+ * @param link Pointer to link_t structure to be added.
+ * @param head Pointer to link_t structure representing head of the list.
+ */
+static inline void list_append(link_t *link, link_t *head)
+{
+    link->prev = head->prev;
+    link->next = head;
+    head->prev->next = link;
+    head->prev = link;
+}
+/** Remove item from doubly-linked circular list
+ *
+ * Remove item from doubly-linked circular list.
+ *
+ * @param link Pointer to link_t structure to be removed from the list it is contained in.
+ */
+static inline void list_remove(link_t *link)
+{
+    link->next->prev = link->prev;
+    link->prev->next = link->next;
+    link_initialize(link);
+}
+/** Query emptiness of doubly-linked circular list
+ *
+ * Query emptiness of doubly-linked circular list.
+ *
+ * @param head Pointer to link_t structure representing head of the list.
+ */
+static inline int list_empty(link_t *head)
+{
+    return head->next == head ? true : false;
+}
+/** Split or concatenate headless doubly-linked circular list
+ *
+ * Split or concatenate headless doubly-linked circular list.
+ *
+ * Note that the algorithm works both directions:
+ * concatenates splitted lists and splits concatenated lists.
+ *
+ * @param part1 Pointer to link_t structure leading the first (half of the headless) list.
+ * @param part2 Pointer to link_t structure leading the second (half of the headless) list.
+ */
+static inline void headless_list_split_or_concat(link_t *part1, link_t *part2)
+{
+    link_t *hlp;
+    part1->prev->next = part2;
+    part2->prev->next = part1;
+    hlp = part1->prev;
+    part1->prev = part2->prev;
+    part2->prev = hlp;
+}
+/** Split headless doubly-linked circular list
+ *
+ * Split headless doubly-linked circular list.
+ *
+ * @param part1 Pointer to link_t structure leading the first half of the headless list.
+ * @param part2 Pointer to link_t structure leading the second half of the headless list.
+ */
+static inline void headless_list_split(link_t *part1, link_t *part2)
+{
+    headless_list_split_or_concat(part1, part2);
+}
+/** Concatenate two headless doubly-linked circular lists
+ *
+ * Concatenate two headless doubly-linked circular lists.
+ *
+ * @param part1 Pointer to link_t structure leading the first headless list.
+ * @param part2 Pointer to link_t structure leading the second headless list.
+ */
+static inline void headless_list_concat(link_t *part1, link_t *part2)
+{
+    headless_list_split_or_concat(part1, part2);
+}
+#define list_get_instance(link,type,member) (type *)(((char *)(link))-((char *)&(((type *)NULL)->member)))
+extern int list_member(const link_t *link, const link_t *head);
+extern void list_concat(link_t *head1, link_t *head2);
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/uspace/libc/include/libadt/fifo.h
 ,0 → 1,130
+/*
+ * Copyright (C) 2006 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup libc
+ * @{
+ */
+/** @file
+ */
+/*
+ * This implementation of FIFO stores values in an array
+ * (static or dynamic). As such, these FIFOs have upper bound
+ * on number of values they can store. Push and pop operations
+ * are done via accessing the array through head and tail indices.
+ * Because of better operation ordering in fifo_pop(), the access
+ * policy for these two indices is to 'increment (mod size of FIFO)
+ * and use'.
+ */
+#ifndef __FIFO_H__
+#define __FIFO_H__
+#include <malloc.h>
+typedef unsigned long fifo_count_t;
+typedef unsigned long fifo_index_t;
+#define FIFO_CREATE_STATIC(name, t, itms)       \
+    struct {                    \
+        t fifo[(itms)];             \
+        fifo_count_t items;         \
+        fifo_index_t head;          \
+        fifo_index_t tail;          \
+    } name
+/** Create and initialize static FIFO.
+ *
+ * FIFO is allocated statically.
+ * This macro is suitable for creating smaller FIFOs.
+ *
+ * @param name Name of FIFO.
+ * @param t Type of values stored in FIFO.
+ * @param itms Number of items that can be stored in FIFO.
+ */
+#define FIFO_INITIALIZE_STATIC(name, t, itms)       \
+    FIFO_CREATE_STATIC(name, t, itms) = {       \
+        .items = (itms),            \
+        .head = 0,              \
+        .tail = 0               \
+    }
+/** Create and prepare dynamic FIFO.
+ *
+ * FIFO is allocated dynamically.
+ * This macro is suitable for creating larger FIFOs.
+ *
+ * @param name Name of FIFO.
+ * @param t Type of values stored in FIFO.
+ * @param itms Number of items that can be stored in FIFO.
+ */
+#define FIFO_INITIALIZE_DYNAMIC(name, t, itms)      \
+    struct {                    \
+        t *fifo;                \
+        fifo_count_t items;         \
+        fifo_index_t head;          \
+        fifo_index_t tail;          \
+    } name = {                  \
+        .fifo = NULL,               \
+        .items = (itms),            \
+        .head = 0,              \
+        .tail = 0               \
+    }
+/** Pop value from head of FIFO.
+ *
+ * @param name FIFO name.
+ *
+ * @return Leading value in FIFO.
+ */
+#define fifo_pop(name) \
+    name.fifo[name.head = (name.head + 1) < name.items ? (name.head + 1) : 0]
+/** Push value to tail of FIFO.
+ *
+ * @param name FIFO name.
+ * @param value Value to be appended to FIFO.
+ *
+ */
+#define fifo_push(name, value) \
+    name.fifo[name.tail = (name.tail + 1) < name.items ? (name.tail + 1) : 0] = (value)
+/** Allocate memory for dynamic FIFO.
+ *
+ * @param name FIFO name.
+ */
+#define fifo_create(name) \
+    name.fifo = malloc(sizeof(*name.fifo) * name.items)
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/uspace/libc/include/atomic.h
 ,0 → 1,60
+/*
+ * Copyright (C) 2006 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup libc
+ * @{
+ */
+/** @file
+ */
+#ifndef __ATOMIC_H__
+#define __ATOMIC_H__
+typedef struct atomic {
+    volatile long count;
+} atomic_t;
+#include <libarch/atomic.h>
+static inline void atomic_set(atomic_t *val, long i)
+{
+        val->count = i;
+}
+static inline long atomic_get(atomic_t *val)
+{
+        return val->count;
+}
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/uspace/libc/include/io/printf_core.h
 ,0 → 1,58
+/*
+ * Copyright (C) 2006 Josef Cejka
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup libc
+ * @{
+ */
+/** @file
+ */
+#ifndef __LIBC__PRINTF_CORE_H__
+#define __LIBC__PRINTF_CORE_H__
+#include <libarch/types.h>
+#include <stdarg.h>
+/** Structure for specifying output methods for different printf clones. */
+struct printf_spec {
+    /* Output function, returns count of printed characters or EOF */
+    int (*write)(void *, size_t, void *);
+    /* Support data - output stream specification, its state, locks,... */
+    void *data;
+};
+int printf_core(const char *fmt, struct printf_spec *ps ,va_list ap);
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/uspace/libc/include/io/stream.h
 ,0 → 1,57
+/*
+ * Copyright (C) 2006 Jakub Vana
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup libc
+ * @{
+ */
+/** @file
+ */
+#ifndef __libc_STREAM_H_
+#define __libc_STREAM_H_
+#include <libarch/types.h>
+#define EMFILE -17
+typedef int fd_t;
+typedef ssize_t (*pwritefn_t)(void *, const void *, size_t);
+typedef ssize_t (*preadfn_t)(void *, void *, size_t);
+fd_t open(const char *fname, int flags);
+int get_fd_phone(int fd);
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/uspace/libc/include/io/io.h
 ,0 → 1,51
+/*
+ * Copyright (C) 2006 Josef Cejka
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup libc
+ * @{
+ */
+/** @file
+ */
+#ifndef __LIBC__IO_H__
+#define __LIBC__IO_H__
+#include <libarch/types.h>
+int putnchars(const char * buf, size_t count);
+int putstr(const char * str);
+int putchar(int c);
+int getchar(void);
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/uspace/libc/include/stdarg.h
 ,0 → 1,59
+/*
+ * Copyright (C) 2006 Josef Cejka
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup libc
+ * @{
+ */
+/** @file
+ */
+#ifndef __LIBC__STDARG_H__
+#define __LIBC__STDARG_H__
+#include <types.h>
+#include <libarch/stackarg.h>
+#ifndef __VARARGS_DEFINED
+# define __VARARGS_DEFINED
+typedef __builtin_va_list va_list;
+# define va_start(ap, last)         __builtin_va_start(ap, last)
+# define va_arg(ap, type)       __builtin_va_arg(ap, type)
+# define va_end(ap)         __builtin_va_end(ap)
+# endif
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/uspace/libc/include/ctype.h
 ,0 → 1,66
+/*
+ * Copyright (C) 2006 Josef Cejka
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup libc
+ * @{
+ */
+/** @file
+ */
+#ifndef __CTYPE_H__
+#define __CTYPE_H__
+static inline int isdigit(int c)
+{
+    return ((c >= '0' )&&( c <= '9'));
+}
+static inline int isspace(int c)
+{
+    switch(c) {
+        case ' ':
+        case '\n':
+        case '\t':
+        case '\f':
+        case '\r':
+        case '\v':
+            return 1;
+            break;
+        default:
+            return 0;
+    }
+}
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/uspace/libc/include/errno.h
 ,0 → 1,48
+/*
+ * Copyright (C) 2006 Ondrej Palkovsky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup libc
+ * @{
+ */
+/** @file
+ */
+#ifndef __LIBC__ERRNO_H__
+#define __LIBC__ERRNO_H__
+#include <kernel/errno.h>
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/uspace/libc/include/sys/time.h
 ,0 → 1,63
+/*
+ * Copyright (C) 2006 Ondrej Palkovsky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup libc
+ * @{
+ */
+/** @file
+ */
+#ifndef __libc_sys_TIME_H__
+#define __libc_sys_TIME_H__
+#include <types.h>
+#define DST_NONE 0
+typedef long time_t;
+typedef long suseconds_t;
+struct timeval {
+    time_t         tv_sec;        /* seconds */
+    suseconds_t    tv_usec;  /* microseconds */
+};
+struct timezone {
+    int  tz_minuteswest; /* minutes W of Greenwich */
+    int  tz_dsttime;     /* type of dst correction */
+};
+int gettimeofday(struct timeval *tv, struct timezone *tz);
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/uspace/libc/include/sys/types.h
 ,0 → 1,47
+/*
+ * Copyright (C) 2006 Josef Cejka
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup libc
+ * @{
+ */
+/** @file
+ */
+#ifndef __LIBC__SYS_TYPES_H__
+#define __LIBC__SYS_TYPES_H__
+#include <types.h>
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/uspace/libc/include/sys/mman.h
 ,0 → 1,61
+/*
+ * Copyright (C) 2006 Ondrej Palkovsky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup libc
+ * @{
+ */
+/** @file
+ */
+#ifndef __libc_MMAN_H_
+#define __libc_MMAN_H_
+#include <as.h>
+#define MAP_FAILED  ((void *) -1)
+#define MAP_SHARED       (1 << 0)
+#define MAP_PRIVATE      (1 << 1)
+#define MAP_FIXED        (1 << 2)
+#define MAP_ANONYMOUS    (1 << 3)
+#define PROTO_READ   AS_AREA_READ
+#define PROTO_WRITE  AS_AREA_WRITE
+#define PROTO_EXEC   AS_AREA_EXEC
+extern void  *mmap(void  *start, size_t length, int prot, int flags, int fd,
+           off_t offset);
+extern int munmap(void *start, size_t length);
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/uspace/libc/malloc/malloc.c
 ,0 → 1,4425
+/*
+  This is a version (aka dlmalloc) of malloc/free/realloc written by
+  Doug Lea and released to the public domain, as explained at
+  http://creativecommons.org/licenses/publicdomain.  Send questions,
+  comments, complaints, performance data, etc to dl@cs.oswego.edu
+* Version 2.8.3 Thu Sep 22 11:16:15 2005  Doug Lea  (dl at gee)
+   Note: There may be an updated version of this malloc obtainable at
+           ftp://gee.cs.oswego.edu/pub/misc/malloc.c
+         Check before installing!
+* Quickstart
+  This library is all in one file to simplify the most common usage:
+  ftp it, compile it (-O3), and link it into another program. All of
+  the compile-time options default to reasonable values for use on
+  most platforms.  You might later want to step through various
+  compile-time and dynamic tuning options.
+  For convenience, an include file for code using this malloc is at:
+     ftp://gee.cs.oswego.edu/pub/misc/malloc-2.8.3.h
+  You don't really need this .h file unless you call functions not
+  defined in your system include files.  The .h file contains only the
+  excerpts from this file needed for using this malloc on ANSI C/C++
+  systems, so long as you haven't changed compile-time options about
+  naming and tuning parameters.  If you do, then you can create your
+  own malloc.h that does include all settings by cutting at the point
+  indicated below. Note that you may already by default be using a C
+  library containing a malloc that is based on some version of this
+  malloc (for example in linux). You might still want to use the one
+  in this file to customize settings or to avoid overheads associated
+  with library versions.
+* Vital statistics:
+  Supported pointer/size_t representation:       4 or 8 bytes
+       size_t MUST be an unsigned type of the same width as
+       pointers. (If you are using an ancient system that declares
+       size_t as a signed type, or need it to be a different width
+       than pointers, you can use a previous release of this malloc
+       (e.g. 2.7.2) supporting these.)
+  Alignment:                                     8 bytes (default)
+       This suffices for nearly all current machines and C compilers.
+       However, you can define MALLOC_ALIGNMENT to be wider than this
+       if necessary (up to 128bytes), at the expense of using more space.
+  Minimum overhead per allocated chunk:   4 or  8 bytes (if 4byte sizes)
+or 16 bytes (if 8byte sizes)
+       Each malloced chunk has a hidden word of overhead holding size
+       and status information, and additional cross-check word
+       if FOOTERS is defined.
+  Minimum allocated size: 4-byte ptrs:  16 bytes    (including overhead)
+-byte ptrs:  32 bytes    (including overhead)
+       Even a request for zero bytes (i.e., malloc(0)) returns a
+       pointer to something of the minimum allocatable size.
+       The maximum overhead wastage (i.e., number of extra bytes
+       allocated than were requested in malloc) is less than or equal
+       to the minimum size, except for requests >= mmap_threshold that
+       are serviced via mmap(), where the worst case wastage is about
+bytes plus the remainder from a system page (the minimal
+       mmap unit); typically 4096 or 8192 bytes.
+  Security: static-safe; optionally more or less
+       The "security" of malloc refers to the ability of malicious
+       code to accentuate the effects of errors (for example, freeing
+       space that is not currently malloc'ed or overwriting past the
+       ends of chunks) in code that calls malloc.  This malloc
+       guarantees not to modify any memory locations below the base of
+       heap, i.e., static variables, even in the presence of usage
+       errors.  The routines additionally detect most improper frees
+       and reallocs.  All this holds as long as the static bookkeeping
+       for malloc itself is not corrupted by some other means.  This
+       is only one aspect of security -- these checks do not, and
+       cannot, detect all possible programming errors.
+       If FOOTERS is defined nonzero, then each allocated chunk
+       carries an additional check word to verify that it was malloced
+       from its space.  These check words are the same within each
+       execution of a program using malloc, but differ across
+       executions, so externally crafted fake chunks cannot be
+       freed. This improves security by rejecting frees/reallocs that
+       could corrupt heap memory, in addition to the checks preventing
+       writes to statics that are always on.  This may further improve
+       security at the expense of time and space overhead.  (Note that
+       FOOTERS may also be worth using with MSPACES.)
+       By default detected errors cause the program to abort (calling
+       "abort()"). You can override this to instead proceed past
+       errors by defining PROCEED_ON_ERROR.  In this case, a bad free
+       has no effect, and a malloc that encounters a bad address
+       caused by user overwrites will ignore the bad address by
+       dropping pointers and indices to all known memory. This may
+       be appropriate for programs that should continue if at all
+       possible in the face of programming errors, although they may
+       run out of memory because dropped memory is never reclaimed.
+       If you don't like either of these options, you can define
+       CORRUPTION_ERROR_ACTION and USAGE_ERROR_ACTION to do anything
+       else. And if if you are sure that your program using malloc has
+       no errors or vulnerabilities, you can define INSECURE to 1,
+       which might (or might not) provide a small performance improvement.
+  Thread-safety: NOT thread-safe unless USE_LOCKS defined
+       When USE_LOCKS is defined, each public call to malloc, free,
+       etc is surrounded with either a pthread mutex or a win32
+       spinlock (depending on WIN32). This is not especially fast, and
+       can be a major bottleneck.  It is designed only to provide
+       minimal protection in concurrent environments, and to provide a
+       basis for extensions.  If you are using malloc in a concurrent
+       program, consider instead using ptmalloc, which is derived from
+       a version of this malloc. (See http://www.malloc.de).
+  System requirements: Any combination of MORECORE and/or MMAP/MUNMAP
+       This malloc can use unix sbrk or any emulation (invoked using
+       the CALL_MORECORE macro) and/or mmap/munmap or any emulation
+       (invoked using CALL_MMAP/CALL_MUNMAP) to get and release system
+       memory.  On most unix systems, it tends to work best if both
+       MORECORE and MMAP are enabled.  On Win32, it uses emulations
+       based on VirtualAlloc. It also uses common C library functions
+       like memset.
+  Compliance: I believe it is compliant with the Single Unix Specification
+       (See http://www.unix.org). Also SVID/XPG, ANSI C, and probably
+       others as well.
+* Overview of algorithms
+  This is not the fastest, most space-conserving, most portable, or
+  most tunable malloc ever written. However it is among the fastest
+  while also being among the most space-conserving, portable and
+  tunable.  Consistent balance across these factors results in a good
+  general-purpose allocator for malloc-intensive programs.
+  In most ways, this malloc is a best-fit allocator. Generally, it
+  chooses the best-fitting existing chunk for a request, with ties
+  broken in approximately least-recently-used order. (This strategy
+  normally maintains low fragmentation.) However, for requests less
+  than 256bytes, it deviates from best-fit when there is not an
+  exactly fitting available chunk by preferring to use space adjacent
+  to that used for the previous small request, as well as by breaking
+  ties in approximately most-recently-used order. (These enhance
+  locality of series of small allocations.)  And for very large requests
+  (>= 256Kb by default), it relies on system memory mapping
+  facilities, if supported.  (This helps avoid carrying around and
+  possibly fragmenting memory used only for large chunks.)
+  All operations (except malloc_stats and mallinfo) have execution
+  times that are bounded by a constant factor of the number of bits in
+  a size_t, not counting any clearing in calloc or copying in realloc,
+  or actions surrounding MORECORE and MMAP that have times
+  proportional to the number of non-contiguous regions returned by
+  system allocation routines, which is often just 1.
+  The implementation is not very modular and seriously overuses
+  macros. Perhaps someday all C compilers will do as good a job
+  inlining modular code as can now be done by brute-force expansion,
+  but now, enough of them seem not to.
+  Some compilers issue a lot of warnings about code that is
+  dead/unreachable only on some platforms, and also about intentional
+  uses of negation on unsigned types. All known cases of each can be
+  ignored.
+  For a longer but out of date high-level description, see
+     http://gee.cs.oswego.edu/dl/html/malloc.html
+* MSPACES
+  If MSPACES is defined, then in addition to malloc, free, etc.,
+  this file also defines mspace_malloc, mspace_free, etc. These
+  are versions of malloc routines that take an "mspace" argument
+  obtained using create_mspace, to control all internal bookkeeping.
+  If ONLY_MSPACES is defined, only these versions are compiled.
+  So if you would like to use this allocator for only some allocations,
+  and your system malloc for others, you can compile with
+  ONLY_MSPACES and then do something like...
+    static mspace mymspace = create_mspace(0,0); // for example
+    #define mymalloc(bytes)  mspace_malloc(mymspace, bytes)
+  (Note: If you only need one instance of an mspace, you can instead
+  use "USE_DL_PREFIX" to relabel the global malloc.)
+  You can similarly create thread-local allocators by storing
+  mspaces as thread-locals. For example:
+    static __thread mspace tlms = 0;
+    void*  tlmalloc(size_t bytes) {
+      if (tlms == 0) tlms = create_mspace(0, 0);
+      return mspace_malloc(tlms, bytes);
+    }
+    void  tlfree(void* mem) { mspace_free(tlms, mem); }
+  Unless FOOTERS is defined, each mspace is completely independent.
+  You cannot allocate from one and free to another (although
+  conformance is only weakly checked, so usage errors are not always
+  caught). If FOOTERS is defined, then each chunk carries around a tag
+  indicating its originating mspace, and frees are directed to their
+  originating spaces.
+ -------------------------  Compile-time options ---------------------------
+Be careful in setting #define values for numerical constants of type
+size_t. On some systems, literal values are not automatically extended
+to size_t precision unless they are explicitly casted.
+WIN32                    default: defined if _WIN32 defined
+  Defining WIN32 sets up defaults for MS environment and compilers.
+  Otherwise defaults are for unix.
+MALLOC_ALIGNMENT         default: (size_t)8
+  Controls the minimum alignment for malloc'ed chunks.  It must be a
+  power of two and at least 8, even on machines for which smaller
+  alignments would suffice. It may be defined as larger than this
+  though. Note however that code and data structures are optimized for
+  the case of 8-byte alignment.
+MSPACES                  default: 0 (false)
+  If true, compile in support for independent allocation spaces.
+  This is only supported if HAVE_MMAP is true.
+ONLY_MSPACES             default: 0 (false)
+  If true, only compile in mspace versions, not regular versions.
+USE_LOCKS                default: 0 (false)
+  Causes each call to each public routine to be surrounded with
+  pthread or WIN32 mutex lock/unlock. (If set true, this can be
+  overridden on a per-mspace basis for mspace versions.)
+FOOTERS                  default: 0
+  If true, provide extra checking and dispatching by placing
+  information in the footers of allocated chunks. This adds
+  space and time overhead.
+INSECURE                 default: 0
+  If true, omit checks for usage errors and heap space overwrites.
+USE_DL_PREFIX            default: NOT defined
+  Causes compiler to prefix all public routines with the string 'dl'.
+  This can be useful when you only want to use this malloc in one part
+  of a program, using your regular system malloc elsewhere.
+ABORT                    default: defined as abort()
+  Defines how to abort on failed checks.  On most systems, a failed
+  check cannot die with an "assert" or even print an informative
+  message, because the underlying print routines in turn call malloc,
+  which will fail again.  Generally, the best policy is to simply call
+  abort(). It's not very useful to do more than this because many
+  errors due to overwriting will show up as address faults (null, odd
+  addresses etc) rather than malloc-triggered checks, so will also
+  abort.  Also, most compilers know that abort() does not return, so
+  can better optimize code conditionally calling it.
+PROCEED_ON_ERROR           default: defined as 0 (false)
+  Controls whether detected bad addresses cause them to bypassed
+  rather than aborting. If set, detected bad arguments to free and
+  realloc are ignored. And all bookkeeping information is zeroed out
+  upon a detected overwrite of freed heap space, thus losing the
+  ability to ever return it from malloc again, but enabling the
+  application to proceed. If PROCEED_ON_ERROR is defined, the
+  static variable malloc_corruption_error_count is compiled in
+  and can be examined to see if errors have occurred. This option
+  generates slower code than the default abort policy.
+DEBUG                    default: NOT defined
+  The DEBUG setting is mainly intended for people trying to modify
+  this code or diagnose problems when porting to new platforms.
+  However, it may also be able to better isolate user errors than just
+  using runtime checks.  The assertions in the check routines spell
+  out in more detail the assumptions and invariants underlying the
+  algorithms.  The checking is fairly extensive, and will slow down
+  execution noticeably. Calling malloc_stats or mallinfo with DEBUG
+  set will attempt to check every non-mmapped allocated and free chunk
+  in the course of computing the summaries.
+ABORT_ON_ASSERT_FAILURE   default: defined as 1 (true)
+  Debugging assertion failures can be nearly impossible if your
+  version of the assert macro causes malloc to be called, which will
+  lead to a cascade of further failures, blowing the runtime stack.
+  ABORT_ON_ASSERT_FAILURE cause assertions failures to call abort(),
+  which will usually make debugging easier.
+MALLOC_FAILURE_ACTION     default: sets errno to ENOMEM, or no-op on win32
+  The action to take before "return 0" when malloc fails to be able to
+  return memory because there is none available.
+HAVE_MORECORE             default: 1 (true) unless win32 or ONLY_MSPACES
+  True if this system supports sbrk or an emulation of it.
+MORECORE                  default: sbrk
+  The name of the sbrk-style system routine to call to obtain more
+  memory.  See below for guidance on writing custom MORECORE
+  functions. The type of the argument to sbrk/MORECORE varies across
+  systems.  It cannot be size_t, because it supports negative
+  arguments, so it is normally the signed type of the same width as
+  size_t (sometimes declared as "intptr_t").  It doesn't much matter
+  though. Internally, we only call it with arguments less than half
+  the max value of a size_t, which should work across all reasonable
+  possibilities, although sometimes generating compiler warnings.  See
+  near the end of this file for guidelines for creating a custom
+  version of MORECORE.
+MORECORE_CONTIGUOUS       default: 1 (true)
+  If true, take advantage of fact that consecutive calls to MORECORE
+  with positive arguments always return contiguous increasing
+  addresses.  This is true of unix sbrk. It does not hurt too much to
+  set it true anyway, since malloc copes with non-contiguities.
+  Setting it false when definitely non-contiguous saves time
+  and possibly wasted space it would take to discover this though.
+MORECORE_CANNOT_TRIM      default: NOT defined
+  True if MORECORE cannot release space back to the system when given
+  negative arguments. This is generally necessary only if you are
+  using a hand-crafted MORECORE function that cannot handle negative
+  arguments.
+HAVE_MMAP                 default: 1 (true)
+  True if this system supports mmap or an emulation of it.  If so, and
+  HAVE_MORECORE is not true, MMAP is used for all system
+  allocation. If set and HAVE_MORECORE is true as well, MMAP is
+  primarily used to directly allocate very large blocks. It is also
+  used as a backup strategy in cases where MORECORE fails to provide
+  space from system. Note: A single call to MUNMAP is assumed to be
+  able to unmap memory that may have be allocated using multiple calls
+  to MMAP, so long as they are adjacent.
+HAVE_MREMAP               default: 1 on linux, else 0
+  If true realloc() uses mremap() to re-allocate large blocks and
+  extend or shrink allocation spaces.
+MMAP_CLEARS               default: 1 on unix
+  True if mmap clears memory so calloc doesn't need to. This is true
+  for standard unix mmap using /dev/zero.
+USE_BUILTIN_FFS            default: 0 (i.e., not used)
+  Causes malloc to use the builtin ffs() function to compute indices.
+  Some compilers may recognize and intrinsify ffs to be faster than the
+  supplied C version. Also, the case of x86 using gcc is special-cased
+  to an asm instruction, so is already as fast as it can be, and so
+  this setting has no effect. (On most x86s, the asm version is only
+  slightly faster than the C version.)
+malloc_getpagesize         default: derive from system includes, or 4096.
+  The system page size. To the extent possible, this malloc manages
+  memory from the system in page-size units.  This may be (and
+  usually is) a function rather than a constant. This is ignored
+  if WIN32, where page size is determined using getSystemInfo during
+  initialization.
+USE_DEV_RANDOM             default: 0 (i.e., not used)
+  Causes malloc to use /dev/random to initialize secure magic seed for
+  stamping footers. Otherwise, the current time is used.
+NO_MALLINFO                default: 0
+  If defined, don't compile "mallinfo". This can be a simple way
+  of dealing with mismatches between system declarations and
+  those in this file.
+MALLINFO_FIELD_TYPE        default: size_t
+  The type of the fields in the mallinfo struct. This was originally
+  defined as "int" in SVID etc, but is more usefully defined as
+  size_t. The value is used only if  HAVE_USR_INCLUDE_MALLOC_H is not set
+REALLOC_ZERO_BYTES_FREES    default: not defined
+  This should be set if a call to realloc with zero bytes should
+  be the same as a call to free. Some people think it should. Otherwise,
+  since this malloc returns a unique pointer for malloc(0), so does
+  realloc(p, 0).
+LACKS_UNISTD_H, LACKS_FCNTL_H, LACKS_SYS_PARAM_H, LACKS_SYS_MMAN_H
+LACKS_STRINGS_H, LACKS_STRING_H, LACKS_SYS_TYPES_H,  LACKS_ERRNO_H
+LACKS_STDLIB_H                default: NOT defined unless on WIN32
+  Define these if your system does not have these header files.
+  You might need to manually insert some of the declarations they provide.
+DEFAULT_GRANULARITY        default: page size if MORECORE_CONTIGUOUS,
+                                system_info.dwAllocationGranularity in WIN32,
+                                otherwise 64K.
+      Also settable using mallopt(M_GRANULARITY, x)
+  The unit for allocating and deallocating memory from the system.  On
+  most systems with contiguous MORECORE, there is no reason to
+  make this more than a page. However, systems with MMAP tend to
+  either require or encourage larger granularities.  You can increase
+  this value to prevent system allocation functions to be called so
+  often, especially if they are slow.  The value must be at least one
+  page and must be a power of two.  Setting to 0 causes initialization
+  to either page size or win32 region size.  (Note: In previous
+  versions of malloc, the equivalent of this option was called
+  "TOP_PAD")
+DEFAULT_TRIM_THRESHOLD    default: 2MB
+      Also settable using mallopt(M_TRIM_THRESHOLD, x)
+  The maximum amount of unused top-most memory to keep before
+  releasing via malloc_trim in free().  Automatic trimming is mainly
+  useful in long-lived programs using contiguous MORECORE.  Because
+  trimming via sbrk can be slow on some systems, and can sometimes be
+  wasteful (in cases where programs immediately afterward allocate
+  more large chunks) the value should be high enough so that your
+  overall system performance would improve by releasing this much
+  memory.  As a rough guide, you might set to a value close to the
+  average size of a process (program) running on your system.
+  Releasing this much memory would allow such a process to run in
+  memory.  Generally, it is worth tuning trim thresholds when a
+  program undergoes phases where several large chunks are allocated
+  and released in ways that can reuse each other's storage, perhaps
+  mixed with phases where there are no such chunks at all. The trim
+  value must be greater than page size to have any useful effect.  To
+  disable trimming completely, you can set to MAX_SIZE_T. Note that the trick
+  some people use of mallocing a huge space and then freeing it at
+  program startup, in an attempt to reserve system memory, doesn't
+  have the intended effect under automatic trimming, since that memory
+  will immediately be returned to the system.
+DEFAULT_MMAP_THRESHOLD       default: 256K
+      Also settable using mallopt(M_MMAP_THRESHOLD, x)
+  The request size threshold for using MMAP to directly service a
+  request. Requests of at least this size that cannot be allocated
+  using already-existing space will be serviced via mmap.  (If enough
+  normal freed space already exists it is used instead.)  Using mmap
+  segregates relatively large chunks of memory so that they can be
+  individually obtained and released from the host system. A request
+  serviced through mmap is never reused by any other request (at least
+  not directly; the system may just so happen to remap successive
+  requests to the same locations).  Segregating space in this way has
+  the benefits that: Mmapped space can always be individually released
+  back to the system, which helps keep the system level memory demands
+  of a long-lived program low.  Also, mapped memory doesn't become
+  `locked' between other chunks, as can happen with normally allocated
+  chunks, which means that even trimming via malloc_trim would not
+  release them.  However, it has the disadvantage that the space
+  cannot be reclaimed, consolidated, and then used to service later
+  requests, as happens with normal chunks.  The advantages of mmap
+  nearly always outweigh disadvantages for "large" chunks, but the
+  value of "large" may vary across systems.  The default is an
+  empirically derived value that works well in most systems. You can
+  disable mmap by setting to MAX_SIZE_T.
+*/
+/** @addtogroup libcmalloc malloc
+  * @brief Malloc originally written by Doug Lea and ported to HelenOS.
+  * @ingroup libc
+ * @{
+ */
+/** @file
+ */
+#include <sys/types.h>  /* For size_t */
+/** Non-default helenos customizations */
+#define LACKS_FCNTL_H
+#define LACKS_SYS_MMAN_H
+#define LACKS_SYS_PARAM_H
+#undef HAVE_MMAP
+#define HAVE_MMAP 0
+#define LACKS_ERRNO_H
+/* Set errno? */
+#undef MALLOC_FAILURE_ACTION
+#define MALLOC_FAILURE_ACTION
+/* The maximum possible size_t value has all bits set */
+#define MAX_SIZE_T           (~(size_t)0)
+#define ONLY_MSPACES 0
+#define MSPACES 0
+#ifdef MALLOC_ALIGNMENT_16
+#define MALLOC_ALIGNMENT ((size_t)16U)
+#else
+#define MALLOC_ALIGNMENT ((size_t)8U)
+#endif
+#define FOOTERS 0
+#define ABORT  abort()
+#define ABORT_ON_ASSERT_FAILURE 1
+#define PROCEED_ON_ERROR 0
+#define USE_LOCKS 1
+#define INSECURE 0
+#define HAVE_MMAP 0
+#define MMAP_CLEARS 1
+#define HAVE_MORECORE 1
+#define MORECORE_CONTIGUOUS 1
+#define MORECORE sbrk
+#define DEFAULT_GRANULARITY (0)  /* 0 means to compute in init_mparams */
+#ifndef DEFAULT_TRIM_THRESHOLD
+#ifndef MORECORE_CANNOT_TRIM
+#define DEFAULT_TRIM_THRESHOLD ((size_t)2U * (size_t)1024U * (size_t)1024U)
+#else   /* MORECORE_CANNOT_TRIM */
+#define DEFAULT_TRIM_THRESHOLD MAX_SIZE_T
+#endif  /* MORECORE_CANNOT_TRIM */
+#endif  /* DEFAULT_TRIM_THRESHOLD */
+#ifndef DEFAULT_MMAP_THRESHOLD
+#if HAVE_MMAP
+#define DEFAULT_MMAP_THRESHOLD ((size_t)256U * (size_t)1024U)
+#else   /* HAVE_MMAP */
+#define DEFAULT_MMAP_THRESHOLD MAX_SIZE_T
+#endif  /* HAVE_MMAP */
+#endif  /* DEFAULT_MMAP_THRESHOLD */
+#ifndef USE_BUILTIN_FFS
+#define USE_BUILTIN_FFS 0
+#endif  /* USE_BUILTIN_FFS */
+#ifndef USE_DEV_RANDOM
+#define USE_DEV_RANDOM 0
+#endif  /* USE_DEV_RANDOM */
+#ifndef NO_MALLINFO
+#define NO_MALLINFO 0
+#endif  /* NO_MALLINFO */
+#ifndef MALLINFO_FIELD_TYPE
+#define MALLINFO_FIELD_TYPE size_t
+#endif  /* MALLINFO_FIELD_TYPE */
+/*
+  mallopt tuning options.  SVID/XPG defines four standard parameter
+  numbers for mallopt, normally defined in malloc.h.  None of these
+  are used in this malloc, so setting them has no effect. But this
+  malloc does support the following options.
+*/
+#define M_TRIM_THRESHOLD     (-1)
+#define M_GRANULARITY        (-2)
+#define M_MMAP_THRESHOLD     (-3)
+/*
+  ========================================================================
+  To make a fully customizable malloc.h header file, cut everything
+  above this line, put into file malloc.h, edit to suit, and #include it
+  on the next line, as well as in programs that use this malloc.
+  ========================================================================
+*/
+#include "malloc.h"
+/*------------------------------ internal #includes ---------------------- */
+#include <stdio.h>       /* for printing in malloc_stats */
+#include <string.h>
+#ifndef LACKS_ERRNO_H
+#include <errno.h>       /* for MALLOC_FAILURE_ACTION */
+#endif /* LACKS_ERRNO_H */
+#if FOOTERS
+#include <time.h>        /* for magic initialization */
+#endif /* FOOTERS */
+#ifndef LACKS_STDLIB_H
+#include <stdlib.h>      /* for abort() */
+#endif /* LACKS_STDLIB_H */
+#ifdef DEBUG
+#if ABORT_ON_ASSERT_FAILURE
+#define assert(x) {if(!(x)) {printf(#x);ABORT;}}
+#else /* ABORT_ON_ASSERT_FAILURE */
+#include <assert.h>
+#endif /* ABORT_ON_ASSERT_FAILURE */
+#else  /* DEBUG */
+#define assert(x)
+#endif /* DEBUG */
+#if USE_BUILTIN_FFS
+#ifndef LACKS_STRINGS_H
+#include <strings.h>     /* for ffs */
+#endif /* LACKS_STRINGS_H */
+#endif /* USE_BUILTIN_FFS */
+#if HAVE_MMAP
+#ifndef LACKS_SYS_MMAN_H
+#include <sys/mman.h>    /* for mmap */
+#endif /* LACKS_SYS_MMAN_H */
+#ifndef LACKS_FCNTL_H
+#include <fcntl.h>
+#endif /* LACKS_FCNTL_H */
+#endif /* HAVE_MMAP */
+#if HAVE_MORECORE
+#ifndef LACKS_UNISTD_H
+#include <unistd.h>     /* for sbrk */
+#else /* LACKS_UNISTD_H */
+#if !defined(__FreeBSD__) && !defined(__OpenBSD__) && !defined(__NetBSD__)
+extern void*     sbrk(ptrdiff_t);
+#endif /* FreeBSD etc */
+#endif /* LACKS_UNISTD_H */
+#endif /* HAVE_MMAP */
+#ifndef WIN32
+#ifndef malloc_getpagesize
+#  ifdef _SC_PAGESIZE         /* some SVR4 systems omit an underscore */
+#    ifndef _SC_PAGE_SIZE
+#      define _SC_PAGE_SIZE _SC_PAGESIZE
+#    endif
+#  endif
+#  ifdef _SC_PAGE_SIZE
+#    define malloc_getpagesize sysconf(_SC_PAGE_SIZE)
+#  else
+#    if defined(BSD) || defined(DGUX) || defined(HAVE_GETPAGESIZE)
+       extern size_t getpagesize();
+#      define malloc_getpagesize getpagesize()
+#    else
+#      ifdef WIN32 /* use supplied emulation of getpagesize */
+#        define malloc_getpagesize getpagesize()
+#      else
+#        ifndef LACKS_SYS_PARAM_H
+#          include <sys/param.h>
+#        endif
+#        ifdef EXEC_PAGESIZE
+#          define malloc_getpagesize EXEC_PAGESIZE
+#        else
+#          ifdef NBPG
+#            ifndef CLSIZE
+#              define malloc_getpagesize NBPG
+#            else
+#              define malloc_getpagesize (NBPG * CLSIZE)
+#            endif
+#          else
+#            ifdef NBPC
+#              define malloc_getpagesize NBPC
+#            else
+#              ifdef PAGESIZE
+#                define malloc_getpagesize PAGESIZE
+#              else /* just guess */
+#                define malloc_getpagesize ((size_t)4096U)
+#              endif
+#            endif
+#          endif
+#        endif
+#      endif
+#    endif
+#  endif
+#endif
+#endif
+/* ------------------- size_t and alignment properties -------------------- */
+/* The byte and bit size of a size_t */
+#define SIZE_T_SIZE         (sizeof(size_t))
+#define SIZE_T_BITSIZE      (sizeof(size_t) << 3)
+/* Some constants coerced to size_t */
+/* Annoying but necessary to avoid errors on some plaftorms */
+#define SIZE_T_ZERO         ((size_t)0)
+#define SIZE_T_ONE          ((size_t)1)
+#define SIZE_T_TWO          ((size_t)2)
+#define TWO_SIZE_T_SIZES    (SIZE_T_SIZE<<1)
+#define FOUR_SIZE_T_SIZES   (SIZE_T_SIZE<<2)
+#define SIX_SIZE_T_SIZES    (FOUR_SIZE_T_SIZES+TWO_SIZE_T_SIZES)
+#define HALF_MAX_SIZE_T     (MAX_SIZE_T / 2U)
+/* The bit mask value corresponding to MALLOC_ALIGNMENT */
+#define CHUNK_ALIGN_MASK    (MALLOC_ALIGNMENT - SIZE_T_ONE)
+/* True if address a has acceptable alignment */
+#define is_aligned(A)       (((size_t)((A)) & (CHUNK_ALIGN_MASK)) == 0)
+/* the number of bytes to offset an address to align it */
+#define align_offset(A)\
+ ((((size_t)(A) & CHUNK_ALIGN_MASK) == 0)? 0 :\
+  ((MALLOC_ALIGNMENT - ((size_t)(A) & CHUNK_ALIGN_MASK)) & CHUNK_ALIGN_MASK))
+/* -------------------------- MMAP preliminaries ------------------------- */
+/*
+   If HAVE_MORECORE or HAVE_MMAP are false, we just define calls and
+   checks to fail so compiler optimizer can delete code rather than
+   using so many "#if"s.
+*/
+/* MORECORE and MMAP must return MFAIL on failure */
+#define MFAIL                ((void*)(MAX_SIZE_T))
+#define CMFAIL               ((char*)(MFAIL)) /* defined for convenience */
+#if !HAVE_MMAP
+#define IS_MMAPPED_BIT       (SIZE_T_ZERO)
+#define USE_MMAP_BIT         (SIZE_T_ZERO)
+#define CALL_MMAP(s)         MFAIL
+#define CALL_MUNMAP(a, s)    (-1)
+#define DIRECT_MMAP(s)       MFAIL
+#else /* HAVE_MMAP */
+#define IS_MMAPPED_BIT       (SIZE_T_ONE)
+#define USE_MMAP_BIT         (SIZE_T_ONE)
+#ifndef WIN32
+#define CALL_MUNMAP(a, s)    munmap((a), (s))
+#define MMAP_PROT            (PROT_READ|PROT_WRITE)
+#if !defined(MAP_ANONYMOUS) && defined(MAP_ANON)
+#define MAP_ANONYMOUS        MAP_ANON
+#endif /* MAP_ANON */
+#ifdef MAP_ANONYMOUS
+#define MMAP_FLAGS           (MAP_PRIVATE|MAP_ANONYMOUS)
+#define CALL_MMAP(s)         mmap(0, (s), MMAP_PROT, MMAP_FLAGS, -1, 0)
+#else /* MAP_ANONYMOUS */
+/*
+   Nearly all versions of mmap support MAP_ANONYMOUS, so the following
+   is unlikely to be needed, but is supplied just in case.
+*/
+#define MMAP_FLAGS           (MAP_PRIVATE)
+static int dev_zero_fd = -1; /* Cached file descriptor for /dev/zero. */
+#define CALL_MMAP(s) ((dev_zero_fd < 0) ? \
+           (dev_zero_fd = open("/dev/zero", O_RDWR), \
+            mmap(0, (s), MMAP_PROT, MMAP_FLAGS, dev_zero_fd, 0)) : \
+            mmap(0, (s), MMAP_PROT, MMAP_FLAGS, dev_zero_fd, 0))
+#endif /* MAP_ANONYMOUS */
+#define DIRECT_MMAP(s)       CALL_MMAP(s)
+#else /* WIN32 */
+/* Win32 MMAP via VirtualAlloc */
+static void* win32mmap(size_t size) {
+  void* ptr = VirtualAlloc(0, size, MEM_RESERVE|MEM_COMMIT, PAGE_READWRITE);
+  return (ptr != 0)? ptr: MFAIL;
+}
+/* For direct MMAP, use MEM_TOP_DOWN to minimize interference */
+static void* win32direct_mmap(size_t size) {
+  void* ptr = VirtualAlloc(0, size, MEM_RESERVE|MEM_COMMIT|MEM_TOP_DOWN,
+                           PAGE_READWRITE);
+  return (ptr != 0)? ptr: MFAIL;
+}
+/* This function supports releasing coalesed segments */
+static int win32munmap(void* ptr, size_t size) {
+  MEMORY_BASIC_INFORMATION minfo;
+  char* cptr = ptr;
+  while (size) {
+    if (VirtualQuery(cptr, &minfo, sizeof(minfo)) == 0)
+      return -1;
+    if (minfo.BaseAddress != cptr || minfo.AllocationBase != cptr ||
+        minfo.State != MEM_COMMIT || minfo.RegionSize > size)
+      return -1;
+    if (VirtualFree(cptr, 0, MEM_RELEASE) == 0)
+      return -1;
+    cptr += minfo.RegionSize;
+    size -= minfo.RegionSize;
+  }
+  return 0;
+}
+#define CALL_MMAP(s)         win32mmap(s)
+#define CALL_MUNMAP(a, s)    win32munmap((a), (s))
+#define DIRECT_MMAP(s)       win32direct_mmap(s)
+#endif /* WIN32 */
+#endif /* HAVE_MMAP */
+#if HAVE_MMAP && HAVE_MREMAP
+#define CALL_MREMAP(addr, osz, nsz, mv) mremap((addr), (osz), (nsz), (mv))
+#else  /* HAVE_MMAP && HAVE_MREMAP */
+#define CALL_MREMAP(addr, osz, nsz, mv) MFAIL
+#endif /* HAVE_MMAP && HAVE_MREMAP */
+#if HAVE_MORECORE
+#define CALL_MORECORE(S)     MORECORE(S)
+#else  /* HAVE_MORECORE */
+#define CALL_MORECORE(S)     MFAIL
+#endif /* HAVE_MORECORE */
+/* mstate bit set if continguous morecore disabled or failed */
+#define USE_NONCONTIGUOUS_BIT (4U)
+/* segment bit set in create_mspace_with_base */
+#define EXTERN_BIT            (8U)
+/* --------------------------- Lock preliminaries ------------------------ */
+#if USE_LOCKS
+/*
+  When locks are defined, there are up to two global locks:
+  * If HAVE_MORECORE, morecore_mutex protects sequences of calls to
+    MORECORE.  In many cases sys_alloc requires two calls, that should
+    not be interleaved with calls by other threads.  This does not
+    protect against direct calls to MORECORE by other threads not
+    using this lock, so there is still code to cope the best we can on
+    interference.
+  * magic_init_mutex ensures that mparams.magic and other
+    unique mparams values are initialized only once.
+*/
+/* By default use posix locks */
+#include <futex.h>
+#define MLOCK_T atomic_t
+#define INITIAL_LOCK(l)      futex_initialize(l, 1)
+/* futex_down cannot fail, but can return different
+ * retvals for OK
+ */
+#define ACQUIRE_LOCK(l)      ({futex_down(l);0;})
+#define RELEASE_LOCK(l)      futex_up(l)
+#if HAVE_MORECORE
+static MLOCK_T morecore_mutex = FUTEX_INITIALIZER;
+#endif /* HAVE_MORECORE */
+static MLOCK_T magic_init_mutex = FUTEX_INITIALIZER;
+#define USE_LOCK_BIT               (2U)
+#else  /* USE_LOCKS */
+#define USE_LOCK_BIT               (0U)
+#define INITIAL_LOCK(l)
+#endif /* USE_LOCKS */
+#if USE_LOCKS && HAVE_MORECORE
+#define ACQUIRE_MORECORE_LOCK()    ACQUIRE_LOCK(&morecore_mutex);
+#define RELEASE_MORECORE_LOCK()    RELEASE_LOCK(&morecore_mutex);
+#else /* USE_LOCKS && HAVE_MORECORE */
+#define ACQUIRE_MORECORE_LOCK()
+#define RELEASE_MORECORE_LOCK()
+#endif /* USE_LOCKS && HAVE_MORECORE */
+#if USE_LOCKS
+#define ACQUIRE_MAGIC_INIT_LOCK()  ACQUIRE_LOCK(&magic_init_mutex);
+#define RELEASE_MAGIC_INIT_LOCK()  RELEASE_LOCK(&magic_init_mutex);
+#else  /* USE_LOCKS */
+#define ACQUIRE_MAGIC_INIT_LOCK()
+#define RELEASE_MAGIC_INIT_LOCK()
+#endif /* USE_LOCKS */
+/* -----------------------  Chunk representations ------------------------ */
+/*
+  (The following includes lightly edited explanations by Colin Plumb.)
+  The malloc_chunk declaration below is misleading (but accurate and
+  necessary).  It declares a "view" into memory allowing access to
+  necessary fields at known offsets from a given base.
+  Chunks of memory are maintained using a `boundary tag' method as
+  originally described by Knuth.  (See the paper by Paul Wilson
+  ftp://ftp.cs.utexas.edu/pub/garbage/allocsrv.ps for a survey of such
+  techniques.)  Sizes of free chunks are stored both in the front of
+  each chunk and at the end.  This makes consolidating fragmented
+  chunks into bigger chunks fast.  The head fields also hold bits
+  representing whether chunks are free or in use.
+  Here are some pictures to make it clearer.  They are "exploded" to
+  show that the state of a chunk can be thought of as extending from
+  the high 31 bits of the head field of its header through the
+  prev_foot and PINUSE_BIT bit of the following chunk header.
+  A chunk that's in use looks like:
+   chunk-> +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
+           | Size of previous chunk (if P = 1)                             |
+           +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
+         +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ |P|
+         | Size of this chunk                                         1| +-+
+   mem-> +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
+         |                                                               |
+         +-                                                             -+
+         |                                                               |
+         +-                                                             -+
+         |                                                               :
+         +-      size - sizeof(size_t) available payload bytes          -+
+         :                                                               |
+ chunk-> +-                                                             -+
+         |                                                               |
+         +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
+       +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ |1|
+       | Size of next chunk (may or may not be in use)               | +-+
+ mem-> +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
+    And if it's free, it looks like this:
+   chunk-> +-                                                             -+
+           | User payload (must be in use, or we would have merged!)       |
+           +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
+         +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ |P|
+         | Size of this chunk                                         0| +-+
+   mem-> +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
+         | Next pointer                                                  |
+         +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
+         | Prev pointer                                                  |
+         +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
+         |                                                               :
+         +-      size - sizeof(struct chunk) unused bytes               -+
+         :                                                               |
+ chunk-> +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
+         | Size of this chunk                                            |
+         +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
+       +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ |0|
+       | Size of next chunk (must be in use, or we would have merged)| +-+
+ mem-> +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
+       |                                                               :
+       +- User payload                                                -+
+       :                                                               |
+       +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
+                                                                     |0|
+                                                                     +-+
+  Note that since we always merge adjacent free chunks, the chunks
+  adjacent to a free chunk must be in use.
+  Given a pointer to a chunk (which can be derived trivially from the
+  payload pointer) we can, in O(1) time, find out whether the adjacent
+  chunks are free, and if so, unlink them from the lists that they
+  are on and merge them with the current chunk.
+  Chunks always begin on even word boundaries, so the mem portion
+  (which is returned to the user) is also on an even word boundary, and
+  thus at least double-word aligned.
+  The P (PINUSE_BIT) bit, stored in the unused low-order bit of the
+  chunk size (which is always a multiple of two words), is an in-use
+  bit for the *previous* chunk.  If that bit is *clear*, then the
+  word before the current chunk size contains the previous chunk
+  size, and can be used to find the front of the previous chunk.
+  The very first chunk allocated always has this bit set, preventing
+  access to non-existent (or non-owned) memory. If pinuse is set for
+  any given chunk, then you CANNOT determine the size of the
+  previous chunk, and might even get a memory addressing fault when
+  trying to do so.
+  The C (CINUSE_BIT) bit, stored in the unused second-lowest bit of
+  the chunk size redundantly records whether the current chunk is
+  inuse. This redundancy enables usage checks within free and realloc,
+  and reduces indirection when freeing and consolidating chunks.
+  Each freshly allocated chunk must have both cinuse and pinuse set.
+  That is, each allocated chunk borders either a previously allocated
+  and still in-use chunk, or the base of its memory arena. This is
+  ensured by making all allocations from the the `lowest' part of any
+  found chunk.  Further, no free chunk physically borders another one,
+  so each free chunk is known to be preceded and followed by either
+  inuse chunks or the ends of memory.
+  Note that the `foot' of the current chunk is actually represented
+  as the prev_foot of the NEXT chunk. This makes it easier to
+  deal with alignments etc but can be very confusing when trying
+  to extend or adapt this code.
+  The exceptions to all this are
+. The special chunk `top' is the top-most available chunk (i.e.,
+        the one bordering the end of available memory). It is treated
+        specially.  Top is never included in any bin, is used only if
+        no other chunk is available, and is released back to the
+        system if it is very large (see M_TRIM_THRESHOLD).  In effect,
+        the top chunk is treated as larger (and thus less well
+        fitting) than any other available chunk.  The top chunk
+        doesn't update its trailing size field since there is no next
+        contiguous chunk that would have to index off it. However,
+        space is still allocated for it (TOP_FOOT_SIZE) to enable
+        separation or merging when space is extended.
+. Chunks allocated via mmap, which have the lowest-order bit
+        (IS_MMAPPED_BIT) set in their prev_foot fields, and do not set
+        PINUSE_BIT in their head fields.  Because they are allocated
+        one-by-one, each must carry its own prev_foot field, which is
+        also used to hold the offset this chunk has within its mmapped
+        region, which is needed to preserve alignment. Each mmapped
+        chunk is trailed by the first two fields of a fake next-chunk
+        for sake of usage checks.
+*/
+struct malloc_chunk {
+  size_t               prev_foot;  /* Size of previous chunk (if free).  */
+  size_t               head;       /* Size and inuse bits. */
+  struct malloc_chunk* fd;         /* double links -- used only if free. */
+  struct malloc_chunk* bk;
+};
+typedef struct malloc_chunk  mchunk;
+typedef struct malloc_chunk* mchunkptr;
+typedef struct malloc_chunk* sbinptr;  /* The type of bins of chunks */
+typedef unsigned int bindex_t;         /* Described below */
+typedef unsigned int binmap_t;         /* Described below */
+typedef unsigned int flag_t;           /* The type of various bit flag sets */
+/* ------------------- Chunks sizes and alignments ----------------------- */
+#define MCHUNK_SIZE         (sizeof(mchunk))
+#if FOOTERS
+#define CHUNK_OVERHEAD      (TWO_SIZE_T_SIZES)
+#else /* FOOTERS */
+#define CHUNK_OVERHEAD      (SIZE_T_SIZE)
+#endif /* FOOTERS */
+/* MMapped chunks need a second word of overhead ... */
+#define MMAP_CHUNK_OVERHEAD (TWO_SIZE_T_SIZES)
+/* ... and additional padding for fake next-chunk at foot */
+#define MMAP_FOOT_PAD       (FOUR_SIZE_T_SIZES)
+/* The smallest size we can malloc is an aligned minimal chunk */
+#define MIN_CHUNK_SIZE\
+  ((MCHUNK_SIZE + CHUNK_ALIGN_MASK) & ~CHUNK_ALIGN_MASK)
+/* conversion from malloc headers to user pointers, and back */
+#define chunk2mem(p)        ((void*)((char*)(p)       + TWO_SIZE_T_SIZES))
+#define mem2chunk(mem)      ((mchunkptr)((char*)(mem) - TWO_SIZE_T_SIZES))
+/* chunk associated with aligned address A */
+#define align_as_chunk(A)   (mchunkptr)((A) + align_offset(chunk2mem(A)))
+/* Bounds on request (not chunk) sizes. */
+#define MAX_REQUEST         ((-MIN_CHUNK_SIZE) << 2)
+#define MIN_REQUEST         (MIN_CHUNK_SIZE - CHUNK_OVERHEAD - SIZE_T_ONE)
+/* pad request bytes into a usable size */
+#define pad_request(req) \
+   (((req) + CHUNK_OVERHEAD + CHUNK_ALIGN_MASK) & ~CHUNK_ALIGN_MASK)
+/* pad request, checking for minimum (but not maximum) */
+#define request2size(req) \
+  (((req) < MIN_REQUEST)? MIN_CHUNK_SIZE : pad_request(req))
+/* ------------------ Operations on head and foot fields ----------------- */
+/*
+  The head field of a chunk is or'ed with PINUSE_BIT when previous
+  adjacent chunk in use, and or'ed with CINUSE_BIT if this chunk is in
+  use. If the chunk was obtained with mmap, the prev_foot field has
+  IS_MMAPPED_BIT set, otherwise holding the offset of the base of the
+  mmapped region to the base of the chunk.
+*/
+#define PINUSE_BIT          (SIZE_T_ONE)
+#define CINUSE_BIT          (SIZE_T_TWO)
+#define INUSE_BITS          (PINUSE_BIT|CINUSE_BIT)
+/* Head value for fenceposts */
+#define FENCEPOST_HEAD      (INUSE_BITS|SIZE_T_SIZE)
+/* extraction of fields from head words */
+#define cinuse(p)           ((p)->head & CINUSE_BIT)
+#define pinuse(p)           ((p)->head & PINUSE_BIT)
+#define chunksize(p)        ((p)->head & ~(INUSE_BITS))
+#define clear_pinuse(p)     ((p)->head &= ~PINUSE_BIT)
+#define clear_cinuse(p)     ((p)->head &= ~CINUSE_BIT)
+/* Treat space at ptr +/- offset as a chunk */
+#define chunk_plus_offset(p, s)  ((mchunkptr)(((char*)(p)) + (s)))
+#define chunk_minus_offset(p, s) ((mchunkptr)(((char*)(p)) - (s)))
+/* Ptr to next or previous physical malloc_chunk. */
+#define next_chunk(p) ((mchunkptr)( ((char*)(p)) + ((p)->head & ~INUSE_BITS)))
+#define prev_chunk(p) ((mchunkptr)( ((char*)(p)) - ((p)->prev_foot) ))
+/* extract next chunk's pinuse bit */
+#define next_pinuse(p)  ((next_chunk(p)->head) & PINUSE_BIT)
+/* Get/set size at footer */
+#define get_foot(p, s)  (((mchunkptr)((char*)(p) + (s)))->prev_foot)
+#define set_foot(p, s)  (((mchunkptr)((char*)(p) + (s)))->prev_foot = (s))
+/* Set size, pinuse bit, and foot */
+#define set_size_and_pinuse_of_free_chunk(p, s)\
+  ((p)->head = (s|PINUSE_BIT), set_foot(p, s))
+/* Set size, pinuse bit, foot, and clear next pinuse */
+#define set_free_with_pinuse(p, s, n)\
+  (clear_pinuse(n), set_size_and_pinuse_of_free_chunk(p, s))
+#define is_mmapped(p)\
+  (!((p)->head & PINUSE_BIT) && ((p)->prev_foot & IS_MMAPPED_BIT))
+/* Get the internal overhead associated with chunk p */
+#define overhead_for(p)\
+ (is_mmapped(p)? MMAP_CHUNK_OVERHEAD : CHUNK_OVERHEAD)
+/* Return true if malloced space is not necessarily cleared */
+#if MMAP_CLEARS
+#define calloc_must_clear(p) (!is_mmapped(p))
+#else /* MMAP_CLEARS */
+#define calloc_must_clear(p) (1)
+#endif /* MMAP_CLEARS */
+/* ---------------------- Overlaid data structures ----------------------- */
+/*
+  When chunks are not in use, they are treated as nodes of either
+  lists or trees.
+  "Small"  chunks are stored in circular doubly-linked lists, and look
+  like this:
+    chunk-> +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
+            |             Size of previous chunk                            |
+            +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
+    `head:' |             Size of chunk, in bytes                         |P|
+      mem-> +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
+            |             Forward pointer to next chunk in list             |
+            +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
+            |             Back pointer to previous chunk in list            |
+            +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
+            |             Unused space (may be 0 bytes long)                .
+            .                                                               .
+            .                                                               |
+nextchunk-> +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
+    `foot:' |             Size of chunk, in bytes                           |
+            +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
+  Larger chunks are kept in a form of bitwise digital trees (aka
+  tries) keyed on chunksizes.  Because malloc_tree_chunks are only for
+  free chunks greater than 256 bytes, their size doesn't impose any
+  constraints on user chunk sizes.  Each node looks like:
+    chunk-> +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
+            |             Size of previous chunk                            |
+            +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
+    `head:' |             Size of chunk, in bytes                         |P|
+      mem-> +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
+            |             Forward pointer to next chunk of same size        |
+            +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
+            |             Back pointer to previous chunk of same size       |
+            +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
+            |             Pointer to left child (child[0])                  |
+            +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
+            |             Pointer to right child (child[1])                 |
+            +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
+            |             Pointer to parent                                 |
+            +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
+            |             bin index of this chunk                           |
+            +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
+            |             Unused space                                      .
+            .                                                               |
+nextchunk-> +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
+    `foot:' |             Size of chunk, in bytes                           |
+            +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
+  Each tree holding treenodes is a tree of unique chunk sizes.  Chunks
+  of the same size are arranged in a circularly-linked list, with only
+  the oldest chunk (the next to be used, in our FIFO ordering)
+  actually in the tree.  (Tree members are distinguished by a non-null
+  parent pointer.)  If a chunk with the same size an an existing node
+  is inserted, it is linked off the existing node using pointers that
+  work in the same way as fd/bk pointers of small chunks.
+  Each tree contains a power of 2 sized range of chunk sizes (the
+  smallest is 0x100 <= x < 0x180), which is is divided in half at each
+  tree level, with the chunks in the smaller half of the range (0x100
+  <= x < 0x140 for the top nose) in the left subtree and the larger
+  half (0x140 <= x < 0x180) in the right subtree.  This is, of course,
+  done by inspecting individual bits.
+  Using these rules, each node's left subtree contains all smaller
+  sizes than its right subtree.  However, the node at the root of each
+  subtree has no particular ordering relationship to either.  (The
+  dividing line between the subtree sizes is based on trie relation.)
+  If we remove the last chunk of a given size from the interior of the
+  tree, we need to replace it with a leaf node.  The tree ordering
+  rules permit a node to be replaced by any leaf below it.
+  The smallest chunk in a tree (a common operation in a best-fit
+  allocator) can be found by walking a path to the leftmost leaf in
+  the tree.  Unlike a usual binary tree, where we follow left child
+  pointers until we reach a null, here we follow the right child
+  pointer any time the left one is null, until we reach a leaf with
+  both child pointers null. The smallest chunk in the tree will be
+  somewhere along that path.
+  The worst case number of steps to add, find, or remove a node is
+  bounded by the number of bits differentiating chunks within
+  bins. Under current bin calculations, this ranges from 6 up to 21
+  (for 32 bit sizes) or up to 53 (for 64 bit sizes). The typical case
+  is of course much better.
+*/
+struct malloc_tree_chunk {
+  /* The first four fields must be compatible with malloc_chunk */
+  size_t                    prev_foot;
+  size_t                    head;
+  struct malloc_tree_chunk* fd;
+  struct malloc_tree_chunk* bk;
+  struct malloc_tree_chunk* child[2];
+  struct malloc_tree_chunk* parent;
+  bindex_t                  index;
+};
+typedef struct malloc_tree_chunk  tchunk;
+typedef struct malloc_tree_chunk* tchunkptr;
+typedef struct malloc_tree_chunk* tbinptr; /* The type of bins of trees */
+/* A little helper macro for trees */
+#define leftmost_child(t) ((t)->child[0] != 0? (t)->child[0] : (t)->child[1])
+/* ----------------------------- Segments -------------------------------- */
+/*
+  Each malloc space may include non-contiguous segments, held in a
+  list headed by an embedded malloc_segment record representing the
+  top-most space. Segments also include flags holding properties of
+  the space. Large chunks that are directly allocated by mmap are not
+  included in this list. They are instead independently created and
+  destroyed without otherwise keeping track of them.
+  Segment management mainly comes into play for spaces allocated by
+  MMAP.  Any call to MMAP might or might not return memory that is
+  adjacent to an existing segment.  MORECORE normally contiguously
+  extends the current space, so this space is almost always adjacent,
+  which is simpler and faster to deal with. (This is why MORECORE is
+  used preferentially to MMAP when both are available -- see
+  sys_alloc.)  When allocating using MMAP, we don't use any of the
+  hinting mechanisms (inconsistently) supported in various
+  implementations of unix mmap, or distinguish reserving from
+  committing memory. Instead, we just ask for space, and exploit
+  contiguity when we get it.  It is probably possible to do
+  better than this on some systems, but no general scheme seems
+  to be significantly better.
+  Management entails a simpler variant of the consolidation scheme
+  used for chunks to reduce fragmentation -- new adjacent memory is
+  normally prepended or appended to an existing segment. However,
+  there are limitations compared to chunk consolidation that mostly
+  reflect the fact that segment processing is relatively infrequent
+  (occurring only when getting memory from system) and that we
+  don't expect to have huge numbers of segments:
+  * Segments are not indexed, so traversal requires linear scans.  (It
+    would be possible to index these, but is not worth the extra
+    overhead and complexity for most programs on most platforms.)
+  * New segments are only appended to old ones when holding top-most
+    memory; if they cannot be prepended to others, they are held in
+    different segments.
+  Except for the top-most segment of an mstate, each segment record
+  is kept at the tail of its segment. Segments are added by pushing
+  segment records onto the list headed by &mstate.seg for the
+  containing mstate.
+  Segment flags control allocation/merge/deallocation policies:
+  * If EXTERN_BIT set, then we did not allocate this segment,
+    and so should not try to deallocate or merge with others.
+    (This currently holds only for the initial segment passed
+    into create_mspace_with_base.)
+  * If IS_MMAPPED_BIT set, the segment may be merged with
+    other surrounding mmapped segments and trimmed/de-allocated
+    using munmap.
+  * If neither bit is set, then the segment was obtained using
+    MORECORE so can be merged with surrounding MORECORE'd segments
+    and deallocated/trimmed using MORECORE with negative arguments.
+*/
+struct malloc_segment {
+  char*        base;             /* base address */
+  size_t       size;             /* allocated size */
+  struct malloc_segment* next;   /* ptr to next segment */
+  flag_t       sflags;           /* mmap and extern flag */
+};
+#define is_mmapped_segment(S)  ((S)->sflags & IS_MMAPPED_BIT)
+#define is_extern_segment(S)   ((S)->sflags & EXTERN_BIT)
+typedef struct malloc_segment  msegment;
+typedef struct malloc_segment* msegmentptr;
+/* ---------------------------- malloc_state ----------------------------- */
+/*
+   A malloc_state holds all of the bookkeeping for a space.
+   The main fields are:
+  Top
+    The topmost chunk of the currently active segment. Its size is
+    cached in topsize.  The actual size of topmost space is
+    topsize+TOP_FOOT_SIZE, which includes space reserved for adding
+    fenceposts and segment records if necessary when getting more
+    space from the system.  The size at which to autotrim top is
+    cached from mparams in trim_check, except that it is disabled if
+    an autotrim fails.
+  Designated victim (dv)
+    This is the preferred chunk for servicing small requests that
+    don't have exact fits.  It is normally the chunk split off most
+    recently to service another small request.  Its size is cached in
+    dvsize. The link fields of this chunk are not maintained since it
+    is not kept in a bin.
+  SmallBins
+    An array of bin headers for free chunks.  These bins hold chunks
+    with sizes less than MIN_LARGE_SIZE bytes. Each bin contains
+    chunks of all the same size, spaced 8 bytes apart.  To simplify
+    use in double-linked lists, each bin header acts as a malloc_chunk
+    pointing to the real first node, if it exists (else pointing to
+    itself).  This avoids special-casing for headers.  But to avoid
+    waste, we allocate only the fd/bk pointers of bins, and then use
+    repositioning tricks to treat these as the fields of a chunk.
+  TreeBins
+    Treebins are pointers to the roots of trees holding a range of
+    sizes. There are 2 equally spaced treebins for each power of two
+    from TREE_SHIFT to TREE_SHIFT+16. The last bin holds anything
+    larger.
+  Bin maps
+    There is one bit map for small bins ("smallmap") and one for
+    treebins ("treemap).  Each bin sets its bit when non-empty, and
+    clears the bit when empty.  Bit operations are then used to avoid
+    bin-by-bin searching -- nearly all "search" is done without ever
+    looking at bins that won't be selected.  The bit maps
+    conservatively use 32 bits per map word, even if on 64bit system.
+    For a good description of some of the bit-based techniques used
+    here, see Henry S. Warren Jr's book "Hacker's Delight" (and
+    supplement at http://hackersdelight.org/). Many of these are
+    intended to reduce the branchiness of paths through malloc etc, as
+    well as to reduce the number of memory locations read or written.
+  Segments
+    A list of segments headed by an embedded malloc_segment record
+    representing the initial space.
+  Address check support
+    The least_addr field is the least address ever obtained from
+    MORECORE or MMAP. Attempted frees and reallocs of any address less
+    than this are trapped (unless INSECURE is defined).
+  Magic tag
+    A cross-check field that should always hold same value as mparams.magic.
+  Flags
+    Bits recording whether to use MMAP, locks, or contiguous MORECORE
+  Statistics
+    Each space keeps track of current and maximum system memory
+    obtained via MORECORE or MMAP.
+  Locking
+    If USE_LOCKS is defined, the "mutex" lock is acquired and released
+    around every public call using this mspace.
+*/
+/* Bin types, widths and sizes */
+#define NSMALLBINS        (32U)
+#define NTREEBINS         (32U)
+#define SMALLBIN_SHIFT    (3U)
+#define SMALLBIN_WIDTH    (SIZE_T_ONE << SMALLBIN_SHIFT)
+#define TREEBIN_SHIFT     (8U)
+#define MIN_LARGE_SIZE    (SIZE_T_ONE << TREEBIN_SHIFT)
+#define MAX_SMALL_SIZE    (MIN_LARGE_SIZE - SIZE_T_ONE)
+#define MAX_SMALL_REQUEST (MAX_SMALL_SIZE - CHUNK_ALIGN_MASK - CHUNK_OVERHEAD)
+struct malloc_state {
+  binmap_t   smallmap;
+  binmap_t   treemap;
+  size_t     dvsize;
+  size_t     topsize;
+  char*      least_addr;
+  mchunkptr  dv;
+  mchunkptr  top;
+  size_t     trim_check;
+  size_t     magic;
+  mchunkptr  smallbins[(NSMALLBINS+1)*2];
+  tbinptr    treebins[NTREEBINS];
+  size_t     footprint;
+  size_t     max_footprint;
+  flag_t     mflags;
+#if USE_LOCKS
+  MLOCK_T    mutex;     /* locate lock among fields that rarely change */
+#endif /* USE_LOCKS */
+  msegment   seg;
+};
+typedef struct malloc_state*    mstate;
+/* ------------- Global malloc_state and malloc_params ------------------- */
+/*
+  malloc_params holds global properties, including those that can be
+  dynamically set using mallopt. There is a single instance, mparams,
+  initialized in init_mparams.
+*/
+struct malloc_params {
+  size_t magic;
+  size_t page_size;
+  size_t granularity;
+  size_t mmap_threshold;
+  size_t trim_threshold;
+  flag_t default_mflags;
+};
+static struct malloc_params mparams;
+/* The global malloc_state used for all non-"mspace" calls */
+static struct malloc_state _gm_;
+#define gm                 (&_gm_)
+#define is_global(M)       ((M) == &_gm_)
+#define is_initialized(M)  ((M)->top != 0)
+/* -------------------------- system alloc setup ------------------------- */
+/* Operations on mflags */
+#define use_lock(M)           ((M)->mflags &   USE_LOCK_BIT)
+#define enable_lock(M)        ((M)->mflags |=  USE_LOCK_BIT)
+#define disable_lock(M)       ((M)->mflags &= ~USE_LOCK_BIT)
+#define use_mmap(M)           ((M)->mflags &   USE_MMAP_BIT)
+#define enable_mmap(M)        ((M)->mflags |=  USE_MMAP_BIT)
+#define disable_mmap(M)       ((M)->mflags &= ~USE_MMAP_BIT)
+#define use_noncontiguous(M)  ((M)->mflags &   USE_NONCONTIGUOUS_BIT)
+#define disable_contiguous(M) ((M)->mflags |=  USE_NONCONTIGUOUS_BIT)
+#define set_lock(M,L)\
+ ((M)->mflags = (L)?\
+  ((M)->mflags | USE_LOCK_BIT) :\
+  ((M)->mflags & ~USE_LOCK_BIT))
+/* page-align a size */
+#define page_align(S)\
+ (((S) + (mparams.page_size)) & ~(mparams.page_size - SIZE_T_ONE))
+/* granularity-align a size */
+#define granularity_align(S)\
+  (((S) + (mparams.granularity)) & ~(mparams.granularity - SIZE_T_ONE))
+#define is_page_aligned(S)\
+   (((size_t)(S) & (mparams.page_size - SIZE_T_ONE)) == 0)
+#define is_granularity_aligned(S)\
+   (((size_t)(S) & (mparams.granularity - SIZE_T_ONE)) == 0)
+/*  True if segment S holds address A */
+#define segment_holds(S, A)\
+  ((char*)(A) >= S->base && (char*)(A) < S->base + S->size)
+/* Return segment holding given address */
+static msegmentptr segment_holding(mstate m, char* addr) {
+  msegmentptr sp = &m->seg;
+  for (;;) {
+    if (addr >= sp->base && addr < sp->base + sp->size)
+      return sp;
+    if ((sp = sp->next) == 0)
+      return 0;
+  }
+}
+/* Return true if segment contains a segment link */
+static int has_segment_link(mstate m, msegmentptr ss) {
+  msegmentptr sp = &m->seg;
+  for (;;) {
+    if ((char*)sp >= ss->base && (char*)sp < ss->base + ss->size)
+      return 1;
+    if ((sp = sp->next) == 0)
+      return 0;
+  }
+}
+#ifndef MORECORE_CANNOT_TRIM
+#define should_trim(M,s)  ((s) > (M)->trim_check)
+#else  /* MORECORE_CANNOT_TRIM */
+#define should_trim(M,s)  (0)
+#endif /* MORECORE_CANNOT_TRIM */
+/*
+  TOP_FOOT_SIZE is padding at the end of a segment, including space
+  that may be needed to place segment records and fenceposts when new
+  noncontiguous segments are added.
+*/
+#define TOP_FOOT_SIZE\
+  (align_offset(chunk2mem(0))+pad_request(sizeof(struct malloc_segment))+MIN_CHUNK_SIZE)
+/* -------------------------------  Hooks -------------------------------- */
+/*
+  PREACTION should be defined to return 0 on success, and nonzero on
+  failure. If you are not using locking, you can redefine these to do
+  anything you like.
+*/
+#if USE_LOCKS
+/* Ensure locks are initialized */
+#define GLOBALLY_INITIALIZE() (mparams.page_size == 0 && init_mparams())
+#define PREACTION(M)  ((GLOBALLY_INITIALIZE() || use_lock(M))? ACQUIRE_LOCK(&(M)->mutex) : 0)
+#define POSTACTION(M) { if (use_lock(M)) RELEASE_LOCK(&(M)->mutex); }
+#else /* USE_LOCKS */
+#ifndef PREACTION
+#define PREACTION(M) (0)
+#endif  /* PREACTION */
+#ifndef POSTACTION
+#define POSTACTION(M)
+#endif  /* POSTACTION */
+#endif /* USE_LOCKS */
+/*
+  CORRUPTION_ERROR_ACTION is triggered upon detected bad addresses.
+  USAGE_ERROR_ACTION is triggered on detected bad frees and
+  reallocs. The argument p is an address that might have triggered the
+  fault. It is ignored by the two predefined actions, but might be
+  useful in custom actions that try to help diagnose errors.
+*/
+#if PROCEED_ON_ERROR
+/* A count of the number of corruption errors causing resets */
+int malloc_corruption_error_count;
+/* default corruption action */
+static void reset_on_error(mstate m);
+#define CORRUPTION_ERROR_ACTION(m)  reset_on_error(m)
+#define USAGE_ERROR_ACTION(m, p)
+#else /* PROCEED_ON_ERROR */
+#ifndef CORRUPTION_ERROR_ACTION
+#define CORRUPTION_ERROR_ACTION(m) ABORT
+#endif /* CORRUPTION_ERROR_ACTION */
+#ifndef USAGE_ERROR_ACTION
+#define USAGE_ERROR_ACTION(m,p) ABORT
+#endif /* USAGE_ERROR_ACTION */
+#endif /* PROCEED_ON_ERROR */
+/* -------------------------- Debugging setup ---------------------------- */
+#if ! DEBUG
+#define check_free_chunk(M,P)
+#define check_inuse_chunk(M,P)
+#define check_malloced_chunk(M,P,N)
+#define check_mmapped_chunk(M,P)
+#define check_malloc_state(M)
+#define check_top_chunk(M,P)
+#else /* DEBUG */
+#define check_free_chunk(M,P)       do_check_free_chunk(M,P)
+#define check_inuse_chunk(M,P)      do_check_inuse_chunk(M,P)
+#define check_top_chunk(M,P)        do_check_top_chunk(M,P)
+#define check_malloced_chunk(M,P,N) do_check_malloced_chunk(M,P,N)
+#define check_mmapped_chunk(M,P)    do_check_mmapped_chunk(M,P)
+#define check_malloc_state(M)       do_check_malloc_state(M)
+static void   do_check_any_chunk(mstate m, mchunkptr p);
+static void   do_check_top_chunk(mstate m, mchunkptr p);
+static void   do_check_mmapped_chunk(mstate m, mchunkptr p);
+static void   do_check_inuse_chunk(mstate m, mchunkptr p);
+static void   do_check_free_chunk(mstate m, mchunkptr p);
+static void   do_check_malloced_chunk(mstate m, void* mem, size_t s);
+static void   do_check_tree(mstate m, tchunkptr t);
+static void   do_check_treebin(mstate m, bindex_t i);
+static void   do_check_smallbin(mstate m, bindex_t i);
+static void   do_check_malloc_state(mstate m);
+static int    bin_find(mstate m, mchunkptr x);
+static size_t traverse_and_check(mstate m);
+#endif /* DEBUG */
+/* ---------------------------- Indexing Bins ---------------------------- */
+#define is_small(s)         (((s) >> SMALLBIN_SHIFT) < NSMALLBINS)
+#define small_index(s)      ((s)  >> SMALLBIN_SHIFT)
+#define small_index2size(i) ((i)  << SMALLBIN_SHIFT)
+#define MIN_SMALL_INDEX     (small_index(MIN_CHUNK_SIZE))
+/* addressing by index. See above about smallbin repositioning */
+#define smallbin_at(M, i)   ((sbinptr)((char*)&((M)->smallbins[(i)<<1])))
+#define treebin_at(M,i)     (&((M)->treebins[i]))
+/* assign tree index for size S to variable I */
+#if defined(__GNUC__) && defined(i386)
+#define compute_tree_index(S, I)\
+{\
+  size_t X = S >> TREEBIN_SHIFT;\
+  if (X == 0)\
+    I = 0;\
+  else if (X > 0xFFFF)\
+    I = NTREEBINS-1;\
+  else {\
+    unsigned int K;\
+    __asm__("bsrl %1,%0\n\t" : "=r" (K) : "rm"  (X));\
+    I =  (bindex_t)((K << 1) + ((S >> (K + (TREEBIN_SHIFT-1)) & 1)));\
+  }\
+}
+#else /* GNUC */
+#define compute_tree_index(S, I)\
+{\
+  size_t X = S >> TREEBIN_SHIFT;\
+  if (X == 0)\
+    I = 0;\
+  else if (X > 0xFFFF)\
+    I = NTREEBINS-1;\
+  else {\
+    unsigned int Y = (unsigned int)X;\
+    unsigned int N = ((Y - 0x100) >> 16) & 8;\
+    unsigned int K = (((Y <<= N) - 0x1000) >> 16) & 4;\
+    N += K;\
+    N += K = (((Y <<= K) - 0x4000) >> 16) & 2;\
+    K = 14 - N + ((Y <<= K) >> 15);\
+    I = (K << 1) + ((S >> (K + (TREEBIN_SHIFT-1)) & 1));\
+  }\
+}
+#endif /* GNUC */
+/* Bit representing maximum resolved size in a treebin at i */
+#define bit_for_tree_index(i) \
+   (i == NTREEBINS-1)? (SIZE_T_BITSIZE-1) : (((i) >> 1) + TREEBIN_SHIFT - 2)
+/* Shift placing maximum resolved bit in a treebin at i as sign bit */
+#define leftshift_for_tree_index(i) \
+   ((i == NTREEBINS-1)? 0 : \
+    ((SIZE_T_BITSIZE-SIZE_T_ONE) - (((i) >> 1) + TREEBIN_SHIFT - 2)))
+/* The size of the smallest chunk held in bin with index i */
+#define minsize_for_tree_index(i) \
+   ((SIZE_T_ONE << (((i) >> 1) + TREEBIN_SHIFT)) |  \
+   (((size_t)((i) & SIZE_T_ONE)) << (((i) >> 1) + TREEBIN_SHIFT - 1)))
+/* ------------------------ Operations on bin maps ----------------------- */
+/* bit corresponding to given index */
+#define idx2bit(i)              ((binmap_t)(1) << (i))
+/* Mark/Clear bits with given index */
+#define mark_smallmap(M,i)      ((M)->smallmap |=  idx2bit(i))
+#define clear_smallmap(M,i)     ((M)->smallmap &= ~idx2bit(i))
+#define smallmap_is_marked(M,i) ((M)->smallmap &   idx2bit(i))
+#define mark_treemap(M,i)       ((M)->treemap  |=  idx2bit(i))
+#define clear_treemap(M,i)      ((M)->treemap  &= ~idx2bit(i))
+#define treemap_is_marked(M,i)  ((M)->treemap  &   idx2bit(i))
+/* index corresponding to given bit */
+#if defined(__GNUC__) && defined(i386)
+#define compute_bit2idx(X, I)\
+{\
+  unsigned int J;\
+  __asm__("bsfl %1,%0\n\t" : "=r" (J) : "rm" (X));\
+  I = (bindex_t)J;\
+}
+#else /* GNUC */
+#if  USE_BUILTIN_FFS
+#define compute_bit2idx(X, I) I = ffs(X)-1
+#else /* USE_BUILTIN_FFS */
+#define compute_bit2idx(X, I)\
+{\
+  unsigned int Y = X - 1;\
+  unsigned int K = Y >> (16-4) & 16;\
+  unsigned int N = K;        Y >>= K;\
+  N += K = Y >> (8-3) &  8;  Y >>= K;\
+  N += K = Y >> (4-2) &  4;  Y >>= K;\
+  N += K = Y >> (2-1) &  2;  Y >>= K;\
+  N += K = Y >> (1-0) &  1;  Y >>= K;\
+  I = (bindex_t)(N + Y);\
+}
+#endif /* USE_BUILTIN_FFS */
+#endif /* GNUC */
+/* isolate the least set bit of a bitmap */
+#define least_bit(x)         ((x) & -(x))
+/* mask with all bits to left of least bit of x on */
+#define left_bits(x)         ((x<<1) | -(x<<1))
+/* mask with all bits to left of or equal to least bit of x on */
+#define same_or_left_bits(x) ((x) | -(x))
+/* ----------------------- Runtime Check Support ------------------------- */
+/*
+  For security, the main invariant is that malloc/free/etc never
+  writes to a static address other than malloc_state, unless static
+  malloc_state itself has been corrupted, which cannot occur via
+  malloc (because of these checks). In essence this means that we
+  believe all pointers, sizes, maps etc held in malloc_state, but
+  check all of those linked or offsetted from other embedded data
+  structures.  These checks are interspersed with main code in a way
+  that tends to minimize their run-time cost.
+  When FOOTERS is defined, in addition to range checking, we also
+  verify footer fields of inuse chunks, which can be used guarantee
+  that the mstate controlling malloc/free is intact.  This is a
+  streamlined version of the approach described by William Robertson
+  et al in "Run-time Detection of Heap-based Overflows" LISA'03
+  http://www.usenix.org/events/lisa03/tech/robertson.html The footer
+  of an inuse chunk holds the xor of its mstate and a random seed,
+  that is checked upon calls to free() and realloc().  This is
+  (probablistically) unguessable from outside the program, but can be
+  computed by any code successfully malloc'ing any chunk, so does not
+  itself provide protection against code that has already broken
+  security through some other means.  Unlike Robertson et al, we
+  always dynamically check addresses of all offset chunks (previous,
+  next, etc). This turns out to be cheaper than relying on hashes.
+*/
+#if !INSECURE
+/* Check if address a is at least as high as any from MORECORE or MMAP */
+#define ok_address(M, a) ((char*)(a) >= (M)->least_addr)
+/* Check if address of next chunk n is higher than base chunk p */
+#define ok_next(p, n)    ((char*)(p) < (char*)(n))
+/* Check if p has its cinuse bit on */
+#define ok_cinuse(p)     cinuse(p)
+/* Check if p has its pinuse bit on */
+#define ok_pinuse(p)     pinuse(p)
+#else /* !INSECURE */
+#define ok_address(M, a) (1)
+#define ok_next(b, n)    (1)
+#define ok_cinuse(p)     (1)
+#define ok_pinuse(p)     (1)
+#endif /* !INSECURE */
+#if (FOOTERS && !INSECURE)
+/* Check if (alleged) mstate m has expected magic field */
+#define ok_magic(M)      ((M)->magic == mparams.magic)
+#else  /* (FOOTERS && !INSECURE) */
+#define ok_magic(M)      (1)
+#endif /* (FOOTERS && !INSECURE) */
+/* In gcc, use __builtin_expect to minimize impact of checks */
+#if !INSECURE
+#if defined(__GNUC__) && __GNUC__ >= 3
+#define RTCHECK(e)  __builtin_expect(e, 1)
+#else /* GNUC */
+#define RTCHECK(e)  (e)
+#endif /* GNUC */
+#else /* !INSECURE */
+#define RTCHECK(e)  (1)
+#endif /* !INSECURE */
+/* macros to set up inuse chunks with or without footers */
+#if !FOOTERS
+#define mark_inuse_foot(M,p,s)
+/* Set cinuse bit and pinuse bit of next chunk */
+#define set_inuse(M,p,s)\
+  ((p)->head = (((p)->head & PINUSE_BIT)|s|CINUSE_BIT),\
+  ((mchunkptr)(((char*)(p)) + (s)))->head |= PINUSE_BIT)
+/* Set cinuse and pinuse of this chunk and pinuse of next chunk */
+#define set_inuse_and_pinuse(M,p,s)\
+  ((p)->head = (s|PINUSE_BIT|CINUSE_BIT),\
+  ((mchunkptr)(((char*)(p)) + (s)))->head |= PINUSE_BIT)
+/* Set size, cinuse and pinuse bit of this chunk */
+#define set_size_and_pinuse_of_inuse_chunk(M, p, s)\
+  ((p)->head = (s|PINUSE_BIT|CINUSE_BIT))
+#else /* FOOTERS */
+/* Set foot of inuse chunk to be xor of mstate and seed */
+#define mark_inuse_foot(M,p,s)\
+  (((mchunkptr)((char*)(p) + (s)))->prev_foot = ((size_t)(M) ^ mparams.magic))
+#define get_mstate_for(p)\
+  ((mstate)(((mchunkptr)((char*)(p) +\
+    (chunksize(p))))->prev_foot ^ mparams.magic))
+#define set_inuse(M,p,s)\
+  ((p)->head = (((p)->head & PINUSE_BIT)|s|CINUSE_BIT),\
+  (((mchunkptr)(((char*)(p)) + (s)))->head |= PINUSE_BIT), \
+  mark_inuse_foot(M,p,s))
+#define set_inuse_and_pinuse(M,p,s)\
+  ((p)->head = (s|PINUSE_BIT|CINUSE_BIT),\
+  (((mchunkptr)(((char*)(p)) + (s)))->head |= PINUSE_BIT),\
+ mark_inuse_foot(M,p,s))
+#define set_size_and_pinuse_of_inuse_chunk(M, p, s)\
+  ((p)->head = (s|PINUSE_BIT|CINUSE_BIT),\
+  mark_inuse_foot(M, p, s))
+#endif /* !FOOTERS */
+/* ---------------------------- setting mparams -------------------------- */
+/* Initialize mparams */
+static int init_mparams(void) {
+  if (mparams.page_size == 0) {
+    size_t s;
+    mparams.mmap_threshold = DEFAULT_MMAP_THRESHOLD;
+    mparams.trim_threshold = DEFAULT_TRIM_THRESHOLD;
+#if MORECORE_CONTIGUOUS
+    mparams.default_mflags = USE_LOCK_BIT|USE_MMAP_BIT;
+#else  /* MORECORE_CONTIGUOUS */
+    mparams.default_mflags = USE_LOCK_BIT|USE_MMAP_BIT|USE_NONCONTIGUOUS_BIT;
+#endif /* MORECORE_CONTIGUOUS */
+#if (FOOTERS && !INSECURE)
+    {
+#if USE_DEV_RANDOM
+      int fd;
+      unsigned char buf[sizeof(size_t)];
+      /* Try to use /dev/urandom, else fall back on using time */
+      if ((fd = open("/dev/urandom", O_RDONLY)) >= 0 &&
+          read(fd, buf, sizeof(buf)) == sizeof(buf)) {
+        s = *((size_t *) buf);
+        close(fd);
+      }
+      else
+#endif /* USE_DEV_RANDOM */
+        s = (size_t)(time(0) ^ (size_t)0x55555555U);
+      s |= (size_t)8U;    /* ensure nonzero */
+      s &= ~(size_t)7U;   /* improve chances of fault for bad values */
+    }
+#else /* (FOOTERS && !INSECURE) */
+    s = (size_t)0x58585858U;
+#endif /* (FOOTERS && !INSECURE) */
+    ACQUIRE_MAGIC_INIT_LOCK();
+    if (mparams.magic == 0) {
+      mparams.magic = s;
+      /* Set up lock for main malloc area */
+      INITIAL_LOCK(&gm->mutex);
+      gm->mflags = mparams.default_mflags;
+    }
+    RELEASE_MAGIC_INIT_LOCK();
+#ifndef WIN32
+    mparams.page_size = malloc_getpagesize;
+    mparams.granularity = ((DEFAULT_GRANULARITY != 0)?
+                           DEFAULT_GRANULARITY : mparams.page_size);
+#else /* WIN32 */
+    {
+      SYSTEM_INFO system_info;
+      GetSystemInfo(&system_info);
+      mparams.page_size = system_info.dwPageSize;
+      mparams.granularity = system_info.dwAllocationGranularity;
+    }
+#endif /* WIN32 */
+    /* Sanity-check configuration:
+       size_t must be unsigned and as wide as pointer type.
+       ints must be at least 4 bytes.
+       alignment must be at least 8.
+       Alignment, min chunk size, and page size must all be powers of 2.
+    */
+    if ((sizeof(size_t) != sizeof(char*)) ||
+        (MAX_SIZE_T < MIN_CHUNK_SIZE)  ||
+        (sizeof(int) < 4)  ||
+        (MALLOC_ALIGNMENT < (size_t)8U) ||
+        ((MALLOC_ALIGNMENT    & (MALLOC_ALIGNMENT-SIZE_T_ONE))    != 0) ||
+        ((MCHUNK_SIZE         & (MCHUNK_SIZE-SIZE_T_ONE))         != 0) ||
+        ((mparams.granularity & (mparams.granularity-SIZE_T_ONE)) != 0) ||
+        ((mparams.page_size   & (mparams.page_size-SIZE_T_ONE))   != 0))
+      ABORT;
+  }
+  return 0;
+}
+/* support for mallopt */
+static int change_mparam(int param_number, int value) {
+  size_t val = (size_t)value;
+  init_mparams();
+  switch(param_number) {
+  case M_TRIM_THRESHOLD:
+    mparams.trim_threshold = val;
+    return 1;
+  case M_GRANULARITY:
+    if (val >= mparams.page_size && ((val & (val-1)) == 0)) {
+      mparams.granularity = val;
+      return 1;
+    }
+    else
+      return 0;
+  case M_MMAP_THRESHOLD:
+    mparams.mmap_threshold = val;
+    return 1;
+  default:
+    return 0;
+  }
+}
+#if DEBUG
+/* ------------------------- Debugging Support --------------------------- */
+/* Check properties of any chunk, whether free, inuse, mmapped etc  */
+static void do_check_any_chunk(mstate m, mchunkptr p) {
+  assert((is_aligned(chunk2mem(p))) || (p->head == FENCEPOST_HEAD));
+  assert(ok_address(m, p));
+}
+/* Check properties of top chunk */
+static void do_check_top_chunk(mstate m, mchunkptr p) {
+  msegmentptr sp = segment_holding(m, (char*)p);
+  size_t  sz = chunksize(p);
+  assert(sp != 0);
+  assert((is_aligned(chunk2mem(p))) || (p->head == FENCEPOST_HEAD));
+  assert(ok_address(m, p));
+  assert(sz == m->topsize);
+  assert(sz > 0);
+  assert(sz == ((sp->base + sp->size) - (char*)p) - TOP_FOOT_SIZE);
+  assert(pinuse(p));
+  assert(!next_pinuse(p));
+}
+/* Check properties of (inuse) mmapped chunks */
+static void do_check_mmapped_chunk(mstate m, mchunkptr p) {
+  size_t  sz = chunksize(p);
+  size_t len = (sz + (p->prev_foot & ~IS_MMAPPED_BIT) + MMAP_FOOT_PAD);
+  assert(is_mmapped(p));
+  assert(use_mmap(m));
+  assert((is_aligned(chunk2mem(p))) || (p->head == FENCEPOST_HEAD));
+  assert(ok_address(m, p));
+  assert(!is_small(sz));
+  assert((len & (mparams.page_size-SIZE_T_ONE)) == 0);
+  assert(chunk_plus_offset(p, sz)->head == FENCEPOST_HEAD);
+  assert(chunk_plus_offset(p, sz+SIZE_T_SIZE)->head == 0);
+}
+/* Check properties of inuse chunks */
+static void do_check_inuse_chunk(mstate m, mchunkptr p) {
+  do_check_any_chunk(m, p);
+  assert(cinuse(p));
+  assert(next_pinuse(p));
+  /* If not pinuse and not mmapped, previous chunk has OK offset */
+  assert(is_mmapped(p) || pinuse(p) || next_chunk(prev_chunk(p)) == p);
+  if (is_mmapped(p))
+    do_check_mmapped_chunk(m, p);
+}
+/* Check properties of free chunks */
+static void do_check_free_chunk(mstate m, mchunkptr p) {
+  size_t sz = p->head & ~(PINUSE_BIT|CINUSE_BIT);
+  mchunkptr next = chunk_plus_offset(p, sz);
+  do_check_any_chunk(m, p);
+  assert(!cinuse(p));
+  assert(!next_pinuse(p));
+  assert (!is_mmapped(p));
+  if (p != m->dv && p != m->top) {
+    if (sz >= MIN_CHUNK_SIZE) {
+      assert((sz & CHUNK_ALIGN_MASK) == 0);
+      assert(is_aligned(chunk2mem(p)));
+      assert(next->prev_foot == sz);
+      assert(pinuse(p));
+      assert (next == m->top || cinuse(next));
+      assert(p->fd->bk == p);
+      assert(p->bk->fd == p);
+    }
+    else  /* markers are always of size SIZE_T_SIZE */
+      assert(sz == SIZE_T_SIZE);
+  }
+}
+/* Check properties of malloced chunks at the point they are malloced */
+static void do_check_malloced_chunk(mstate m, void* mem, size_t s) {
+  if (mem != 0) {
+    mchunkptr p = mem2chunk(mem);
+    size_t sz = p->head & ~(PINUSE_BIT|CINUSE_BIT);
+    do_check_inuse_chunk(m, p);
+    assert((sz & CHUNK_ALIGN_MASK) == 0);
+    assert(sz >= MIN_CHUNK_SIZE);
+    assert(sz >= s);
+    /* unless mmapped, size is less than MIN_CHUNK_SIZE more than request */
+    assert(is_mmapped(p) || sz < (s + MIN_CHUNK_SIZE));
+  }
+}
+/* Check a tree and its subtrees.  */
+static void do_check_tree(mstate m, tchunkptr t) {
+  tchunkptr head = 0;
+  tchunkptr u = t;
+  bindex_t tindex = t->index;
+  size_t tsize = chunksize(t);
+  bindex_t idx;
+  compute_tree_index(tsize, idx);
+  assert(tindex == idx);
+  assert(tsize >= MIN_LARGE_SIZE);
+  assert(tsize >= minsize_for_tree_index(idx));
+  assert((idx == NTREEBINS-1) || (tsize < minsize_for_tree_index((idx+1))));
+  do { /* traverse through chain of same-sized nodes */
+    do_check_any_chunk(m, ((mchunkptr)u));
+    assert(u->index == tindex);
+    assert(chunksize(u) == tsize);
+    assert(!cinuse(u));
+    assert(!next_pinuse(u));
+    assert(u->fd->bk == u);
+    assert(u->bk->fd == u);
+    if (u->parent == 0) {
+      assert(u->child[0] == 0);
+      assert(u->child[1] == 0);
+    }
+    else {
+      assert(head == 0); /* only one node on chain has parent */
+      head = u;
+      assert(u->parent != u);
+      assert (u->parent->child[0] == u ||
+              u->parent->child[1] == u ||
+              *((tbinptr*)(u->parent)) == u);
+      if (u->child[0] != 0) {
+        assert(u->child[0]->parent == u);
+        assert(u->child[0] != u);
+        do_check_tree(m, u->child[0]);
+      }
+      if (u->child[1] != 0) {
+        assert(u->child[1]->parent == u);
+        assert(u->child[1] != u);
+        do_check_tree(m, u->child[1]);
+      }
+      if (u->child[0] != 0 && u->child[1] != 0) {
+        assert(chunksize(u->child[0]) < chunksize(u->child[1]));
+      }
+    }
+    u = u->fd;
+  } while (u != t);
+  assert(head != 0);
+}
+/*  Check all the chunks in a treebin.  */
+static void do_check_treebin(mstate m, bindex_t i) {
+  tbinptr* tb = treebin_at(m, i);
+  tchunkptr t = *tb;
+  int empty = (m->treemap & (1U << i)) == 0;
+  if (t == 0)
+    assert(empty);
+  if (!empty)
+    do_check_tree(m, t);
+}
+/*  Check all the chunks in a smallbin.  */
+static void do_check_smallbin(mstate m, bindex_t i) {
+  sbinptr b = smallbin_at(m, i);
+  mchunkptr p = b->bk;
+  unsigned int empty = (m->smallmap & (1U << i)) == 0;
+  if (p == b)
+    assert(empty);
+  if (!empty) {
+    for (; p != b; p = p->bk) {
+      size_t size = chunksize(p);
+      mchunkptr q;
+      /* each chunk claims to be free */
+      do_check_free_chunk(m, p);
+      /* chunk belongs in bin */
+      assert(small_index(size) == i);
+      assert(p->bk == b || chunksize(p->bk) == chunksize(p));
+      /* chunk is followed by an inuse chunk */
+      q = next_chunk(p);
+      if (q->head != FENCEPOST_HEAD)
+        do_check_inuse_chunk(m, q);
+    }
+  }
+}
+/* Find x in a bin. Used in other check functions. */
+static int bin_find(mstate m, mchunkptr x) {
+  size_t size = chunksize(x);
+  if (is_small(size)) {
+    bindex_t sidx = small_index(size);
+    sbinptr b = smallbin_at(m, sidx);
+    if (smallmap_is_marked(m, sidx)) {
+      mchunkptr p = b;
+      do {
+        if (p == x)
+          return 1;
+      } while ((p = p->fd) != b);
+    }
+  }
+  else {
+    bindex_t tidx;
+    compute_tree_index(size, tidx);
+    if (treemap_is_marked(m, tidx)) {
+      tchunkptr t = *treebin_at(m, tidx);
+      size_t sizebits = size << leftshift_for_tree_index(tidx);
+      while (t != 0 && chunksize(t) != size) {
+        t = t->child[(sizebits >> (SIZE_T_BITSIZE-SIZE_T_ONE)) & 1];
+        sizebits <<= 1;
+      }
+      if (t != 0) {
+        tchunkptr u = t;
+        do {
+          if (u == (tchunkptr)x)
+            return 1;
+        } while ((u = u->fd) != t);
+      }
+    }
+  }
+  return 0;
+}
+/* Traverse each chunk and check it; return total */
+static size_t traverse_and_check(mstate m) {
+  size_t sum = 0;
+  if (is_initialized(m)) {
+    msegmentptr s = &m->seg;
+    sum += m->topsize + TOP_FOOT_SIZE;
+    while (s != 0) {
+      mchunkptr q = align_as_chunk(s->base);
+      mchunkptr lastq = 0;
+      assert(pinuse(q));
+      while (segment_holds(s, q) &&
+             q != m->top && q->head != FENCEPOST_HEAD) {
+        sum += chunksize(q);
+        if (cinuse(q)) {
+          assert(!bin_find(m, q));
+          do_check_inuse_chunk(m, q);
+        }
+        else {
+          assert(q == m->dv || bin_find(m, q));
+          assert(lastq == 0 || cinuse(lastq)); /* Not 2 consecutive free */
+          do_check_free_chunk(m, q);
+        }
+        lastq = q;
+        q = next_chunk(q);
+      }
+      s = s->next;
+    }
+  }
+  return sum;
+}
+/* Check all properties of malloc_state. */
+static void do_check_malloc_state(mstate m) {
+  bindex_t i;
+  size_t total;
+  /* check bins */
+  for (i = 0; i < NSMALLBINS; ++i)
+    do_check_smallbin(m, i);
+  for (i = 0; i < NTREEBINS; ++i)
+    do_check_treebin(m, i);
+  if (m->dvsize != 0) { /* check dv chunk */
+    do_check_any_chunk(m, m->dv);
+    assert(m->dvsize == chunksize(m->dv));
+    assert(m->dvsize >= MIN_CHUNK_SIZE);
+    assert(bin_find(m, m->dv) == 0);
+  }
+  if (m->top != 0) {   /* check top chunk */
+    do_check_top_chunk(m, m->top);
+    assert(m->topsize == chunksize(m->top));
+    assert(m->topsize > 0);
+    assert(bin_find(m, m->top) == 0);
+  }
+  total = traverse_and_check(m);
+  assert(total <= m->footprint);
+  assert(m->footprint <= m->max_footprint);
+}
+#endif /* DEBUG */
+/* ----------------------------- statistics ------------------------------ */
+#if !NO_MALLINFO
+static struct mallinfo internal_mallinfo(mstate m) {
+  struct mallinfo nm = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 };
+  if (!PREACTION(m)) {
+    check_malloc_state(m);
+    if (is_initialized(m)) {
+      size_t nfree = SIZE_T_ONE; /* top always free */
+      size_t mfree = m->topsize + TOP_FOOT_SIZE;
+      size_t sum = mfree;
+      msegmentptr s = &m->seg;
+      while (s != 0) {
+        mchunkptr q = align_as_chunk(s->base);
+        while (segment_holds(s, q) &&
+               q != m->top && q->head != FENCEPOST_HEAD) {
+          size_t sz = chunksize(q);
+          sum += sz;
+          if (!cinuse(q)) {
+            mfree += sz;
+            ++nfree;
+          }
+          q = next_chunk(q);
+        }
+        s = s->next;
+      }
+      nm.arena    = sum;
+      nm.ordblks  = nfree;
+      nm.hblkhd   = m->footprint - sum;
+      nm.usmblks  = m->max_footprint;
+      nm.uordblks = m->footprint - mfree;
+      nm.fordblks = mfree;
+      nm.keepcost = m->topsize;
+    }
+    POSTACTION(m);
+  }
+  return nm;
+}
+#endif /* !NO_MALLINFO */
+static void internal_malloc_stats(mstate m) {
+  if (!PREACTION(m)) {
+    size_t maxfp = 0;
+    size_t fp = 0;
+    size_t used = 0;
+    check_malloc_state(m);
+    if (is_initialized(m)) {
+      msegmentptr s = &m->seg;
+      maxfp = m->max_footprint;
+      fp = m->footprint;
+      used = fp - (m->topsize + TOP_FOOT_SIZE);
+      while (s != 0) {
+        mchunkptr q = align_as_chunk(s->base);
+        while (segment_holds(s, q) &&
+               q != m->top && q->head != FENCEPOST_HEAD) {
+          if (!cinuse(q))
+            used -= chunksize(q);
+          q = next_chunk(q);
+        }
+        s = s->next;
+      }
+    }
+    fprintf(stderr, "max system bytes = %10lu\n", (unsigned long)(maxfp));
+    fprintf(stderr, "system bytes     = %10lu\n", (unsigned long)(fp));
+    fprintf(stderr, "in use bytes     = %10lu\n", (unsigned long)(used));
+    POSTACTION(m);
+  }
+}
+/* ----------------------- Operations on smallbins ----------------------- */
+/*
+  Various forms of linking and unlinking are defined as macros.  Even
+  the ones for trees, which are very long but have very short typical
+  paths.  This is ugly but reduces reliance on inlining support of
+  compilers.
+*/
+/* Link a free chunk into a smallbin  */
+#define insert_small_chunk(M, P, S) {\
+  bindex_t I  = small_index(S);\
+  mchunkptr B = smallbin_at(M, I);\
+  mchunkptr F = B;\
+  assert(S >= MIN_CHUNK_SIZE);\
+  if (!smallmap_is_marked(M, I))\
+    mark_smallmap(M, I);\
+  else if (RTCHECK(ok_address(M, B->fd)))\
+    F = B->fd;\
+  else {\
+    CORRUPTION_ERROR_ACTION(M);\
+  }\
+  B->fd = P;\
+  F->bk = P;\
+  P->fd = F;\
+  P->bk = B;\
+}
+/* Unlink a chunk from a smallbin  */
+#define unlink_small_chunk(M, P, S) {\
+  mchunkptr F = P->fd;\
+  mchunkptr B = P->bk;\
+  bindex_t I = small_index(S);\
+  assert(P != B);\
+  assert(P != F);\
+  assert(chunksize(P) == small_index2size(I));\
+  if (F == B)\
+    clear_smallmap(M, I);\
+  else if (RTCHECK((F == smallbin_at(M,I) || ok_address(M, F)) &&\
+                   (B == smallbin_at(M,I) || ok_address(M, B)))) {\
+    F->bk = B;\
+    B->fd = F;\
+  }\
+  else {\
+    CORRUPTION_ERROR_ACTION(M);\
+  }\
+}
+/* Unlink the first chunk from a smallbin */
+#define unlink_first_small_chunk(M, B, P, I) {\
+  mchunkptr F = P->fd;\
+  assert(P != B);\
+  assert(P != F);\
+  assert(chunksize(P) == small_index2size(I));\
+  if (B == F)\
+    clear_smallmap(M, I);\
+  else if (RTCHECK(ok_address(M, F))) {\
+    B->fd = F;\
+    F->bk = B;\
+  }\
+  else {\
+    CORRUPTION_ERROR_ACTION(M);\
+  }\
+}
+/* Replace dv node, binning the old one */
+/* Used only when dvsize known to be small */
+#define replace_dv(M, P, S) {\
+  size_t DVS = M->dvsize;\
+  if (DVS != 0) {\
+    mchunkptr DV = M->dv;\
+    assert(is_small(DVS));\
+    insert_small_chunk(M, DV, DVS);\
+  }\
+  M->dvsize = S;\
+  M->dv = P;\
+}
+/* ------------------------- Operations on trees ------------------------- */
+/* Insert chunk into tree */
+#define insert_large_chunk(M, X, S) {\
+  tbinptr* H;\
+  bindex_t I;\
+  compute_tree_index(S, I);\
+  H = treebin_at(M, I);\
+  X->index = I;\
+  X->child[0] = X->child[1] = 0;\
+  if (!treemap_is_marked(M, I)) {\
+    mark_treemap(M, I);\
+    *H = X;\
+    X->parent = (tchunkptr)H;\
+    X->fd = X->bk = X;\
+  }\
+  else {\
+    tchunkptr T = *H;\
+    size_t K = S << leftshift_for_tree_index(I);\
+    for (;;) {\
+      if (chunksize(T) != S) {\
+        tchunkptr* C = &(T->child[(K >> (SIZE_T_BITSIZE-SIZE_T_ONE)) & 1]);\
+        K <<= 1;\
+        if (*C != 0)\
+          T = *C;\
+        else if (RTCHECK(ok_address(M, C))) {\
+          *C = X;\
+          X->parent = T;\
+          X->fd = X->bk = X;\
+          break;\
+        }\
+        else {\
+          CORRUPTION_ERROR_ACTION(M);\
+          break;\
+        }\
+      }\
+      else {\
+        tchunkptr F = T->fd;\
+        if (RTCHECK(ok_address(M, T) && ok_address(M, F))) {\
+          T->fd = F->bk = X;\
+          X->fd = F;\
+          X->bk = T;\
+          X->parent = 0;\
+          break;\
+        }\
+        else {\
+          CORRUPTION_ERROR_ACTION(M);\
+          break;\
+        }\
+      }\
+    }\
+  }\
+}
+/*
+  Unlink steps:
+. If x is a chained node, unlink it from its same-sized fd/bk links
+     and choose its bk node as its replacement.
+. If x was the last node of its size, but not a leaf node, it must
+     be replaced with a leaf node (not merely one with an open left or
+     right), to make sure that lefts and rights of descendents
+     correspond properly to bit masks.  We use the rightmost descendent
+     of x.  We could use any other leaf, but this is easy to locate and
+     tends to counteract removal of leftmosts elsewhere, and so keeps
+     paths shorter than minimally guaranteed.  This doesn't loop much
+     because on average a node in a tree is near the bottom.
+. If x is the base of a chain (i.e., has parent links) relink
+     x's parent and children to x's replacement (or null if none).
+*/
+#define unlink_large_chunk(M, X) {\
+  tchunkptr XP = X->parent;\
+  tchunkptr R;\
+  if (X->bk != X) {\
+    tchunkptr F = X->fd;\
+    R = X->bk;\
+    if (RTCHECK(ok_address(M, F))) {\
+      F->bk = R;\
+      R->fd = F;\
+    }\
+    else {\
+      CORRUPTION_ERROR_ACTION(M);\
+    }\
+  }\
+  else {\
+    tchunkptr* RP;\
+    if (((R = *(RP = &(X->child[1]))) != 0) ||\
+        ((R = *(RP = &(X->child[0]))) != 0)) {\
+      tchunkptr* CP;\
+      while ((*(CP = &(R->child[1])) != 0) ||\
+             (*(CP = &(R->child[0])) != 0)) {\
+        R = *(RP = CP);\
+      }\
+      if (RTCHECK(ok_address(M, RP)))\
+        *RP = 0;\
+      else {\
+        CORRUPTION_ERROR_ACTION(M);\
+      }\
+    }\
+  }\
+  if (XP != 0) {\
+    tbinptr* H = treebin_at(M, X->index);\
+    if (X == *H) {\
+      if ((*H = R) == 0) \
+        clear_treemap(M, X->index);\
+    }\
+    else if (RTCHECK(ok_address(M, XP))) {\
+      if (XP->child[0] == X) \
+        XP->child[0] = R;\
+      else \
+        XP->child[1] = R;\
+    }\
+    else\
+      CORRUPTION_ERROR_ACTION(M);\
+    if (R != 0) {\
+      if (RTCHECK(ok_address(M, R))) {\
+        tchunkptr C0, C1;\
+        R->parent = XP;\
+        if ((C0 = X->child[0]) != 0) {\
+          if (RTCHECK(ok_address(M, C0))) {\
+            R->child[0] = C0;\
+            C0->parent = R;\
+          }\
+          else\
+            CORRUPTION_ERROR_ACTION(M);\
+        }\
+        if ((C1 = X->child[1]) != 0) {\
+          if (RTCHECK(ok_address(M, C1))) {\
+            R->child[1] = C1;\
+            C1->parent = R;\
+          }\
+          else\
+            CORRUPTION_ERROR_ACTION(M);\
+        }\
+      }\
+      else\
+        CORRUPTION_ERROR_ACTION(M);\
+    }\
+  }\
+}
+/* Relays to large vs small bin operations */
+#define insert_chunk(M, P, S)\
+  if (is_small(S)) insert_small_chunk(M, P, S)\
+  else { tchunkptr TP = (tchunkptr)(P); insert_large_chunk(M, TP, S); }
+#define unlink_chunk(M, P, S)\
+  if (is_small(S)) unlink_small_chunk(M, P, S)\
+  else { tchunkptr TP = (tchunkptr)(P); unlink_large_chunk(M, TP); }
+/* Relays to internal calls to malloc/free from realloc, memalign etc */
+#if ONLY_MSPACES
+#define internal_malloc(m, b) mspace_malloc(m, b)
+#define internal_free(m, mem) mspace_free(m,mem);
+#else /* ONLY_MSPACES */
+#if MSPACES
+#define internal_malloc(m, b)\
+   (m == gm)? dlmalloc(b) : mspace_malloc(m, b)
+#define internal_free(m, mem)\
+   if (m == gm) dlfree(mem); else mspace_free(m,mem);
+#else /* MSPACES */
+#define internal_malloc(m, b) dlmalloc(b)
+#define internal_free(m, mem) dlfree(mem)
+#endif /* MSPACES */
+#endif /* ONLY_MSPACES */
+/* -----------------------  Direct-mmapping chunks ----------------------- */
+/*
+  Directly mmapped chunks are set up with an offset to the start of
+  the mmapped region stored in the prev_foot field of the chunk. This
+  allows reconstruction of the required argument to MUNMAP when freed,
+  and also allows adjustment of the returned chunk to meet alignment
+  requirements (especially in memalign).  There is also enough space
+  allocated to hold a fake next chunk of size SIZE_T_SIZE to maintain
+  the PINUSE bit so frees can be checked.
+*/
+/* Malloc using mmap */
+static void* mmap_alloc(mstate m, size_t nb) {
+  size_t mmsize = granularity_align(nb + SIX_SIZE_T_SIZES + CHUNK_ALIGN_MASK);
+  if (mmsize > nb) {     /* Check for wrap around 0 */
+    char* mm = (char*)(DIRECT_MMAP(mmsize));
+    if (mm != CMFAIL) {
+      size_t offset = align_offset(chunk2mem(mm));
+      size_t psize = mmsize - offset - MMAP_FOOT_PAD;
+      mchunkptr p = (mchunkptr)(mm + offset);
+      p->prev_foot = offset | IS_MMAPPED_BIT;
+      (p)->head = (psize|CINUSE_BIT);
+      mark_inuse_foot(m, p, psize);
+      chunk_plus_offset(p, psize)->head = FENCEPOST_HEAD;
+      chunk_plus_offset(p, psize+SIZE_T_SIZE)->head = 0;
+      if (mm < m->least_addr)
+        m->least_addr = mm;
+      if ((m->footprint += mmsize) > m->max_footprint)
+        m->max_footprint = m->footprint;
+      assert(is_aligned(chunk2mem(p)));
+      check_mmapped_chunk(m, p);
+      return chunk2mem(p);
+    }
+  }
+  return 0;
+}
+/* Realloc using mmap */
+static mchunkptr mmap_resize(mstate m, mchunkptr oldp, size_t nb) {
+  size_t oldsize = chunksize(oldp);
+  if (is_small(nb)) /* Can't shrink mmap regions below small size */
+    return 0;
+  /* Keep old chunk if big enough but not too big */
+  if (oldsize >= nb + SIZE_T_SIZE &&
+      (oldsize - nb) <= (mparams.granularity << 1))
+    return oldp;
+  else {
+    size_t offset = oldp->prev_foot & ~IS_MMAPPED_BIT;
+    size_t oldmmsize = oldsize + offset + MMAP_FOOT_PAD;
+    size_t newmmsize = granularity_align(nb + SIX_SIZE_T_SIZES +
+                                         CHUNK_ALIGN_MASK);
+    char* cp = (char*)CALL_MREMAP((char*)oldp - offset,
+                                  oldmmsize, newmmsize, 1);
+    if (cp != CMFAIL) {
+      mchunkptr newp = (mchunkptr)(cp + offset);
+      size_t psize = newmmsize - offset - MMAP_FOOT_PAD;
+      newp->head = (psize|CINUSE_BIT);
+      mark_inuse_foot(m, newp, psize);
+      chunk_plus_offset(newp, psize)->head = FENCEPOST_HEAD;
+      chunk_plus_offset(newp, psize+SIZE_T_SIZE)->head = 0;
+      if (cp < m->least_addr)
+        m->least_addr = cp;
+      if ((m->footprint += newmmsize - oldmmsize) > m->max_footprint)
+        m->max_footprint = m->footprint;
+      check_mmapped_chunk(m, newp);
+      return newp;
+    }
+  }
+  return 0;
+}
+/* -------------------------- mspace management -------------------------- */
+/* Initialize top chunk and its size */
+static void init_top(mstate m, mchunkptr p, size_t psize) {
+  /* Ensure alignment */
+  size_t offset = align_offset(chunk2mem(p));
+  p = (mchunkptr)((char*)p + offset);
+  psize -= offset;
+  m->top = p;
+  m->topsize = psize;
+  p->head = psize | PINUSE_BIT;
+  /* set size of fake trailing chunk holding overhead space only once */
+  chunk_plus_offset(p, psize)->head = TOP_FOOT_SIZE;
+  m->trim_check = mparams.trim_threshold; /* reset on each update */
+}
+/* Initialize bins for a new mstate that is otherwise zeroed out */
+static void init_bins(mstate m) {
+  /* Establish circular links for smallbins */
+  bindex_t i;
+  for (i = 0; i < NSMALLBINS; ++i) {
+    sbinptr bin = smallbin_at(m,i);
+    bin->fd = bin->bk = bin;
+  }
+}
+#if PROCEED_ON_ERROR
+/* default corruption action */
+static void reset_on_error(mstate m) {
+  int i;
+  ++malloc_corruption_error_count;
+  /* Reinitialize fields to forget about all memory */
+  m->smallbins = m->treebins = 0;
+  m->dvsize = m->topsize = 0;
+  m->seg.base = 0;
+  m->seg.size = 0;
+  m->seg.next = 0;
+  m->top = m->dv = 0;
+  for (i = 0; i < NTREEBINS; ++i)
+    *treebin_at(m, i) = 0;
+  init_bins(m);
+}
+#endif /* PROCEED_ON_ERROR */
+/* Allocate chunk and prepend remainder with chunk in successor base. */
+static void* prepend_alloc(mstate m, char* newbase, char* oldbase,
+                           size_t nb) {
+  mchunkptr p = align_as_chunk(newbase);
+  mchunkptr oldfirst = align_as_chunk(oldbase);
+  size_t psize = (char*)oldfirst - (char*)p;
+  mchunkptr q = chunk_plus_offset(p, nb);
+  size_t qsize = psize - nb;
+  set_size_and_pinuse_of_inuse_chunk(m, p, nb);
+  assert((char*)oldfirst > (char*)q);
+  assert(pinuse(oldfirst));
+  assert(qsize >= MIN_CHUNK_SIZE);
+  /* consolidate remainder with first chunk of old base */
+  if (oldfirst == m->top) {
+    size_t tsize = m->topsize += qsize;
+    m->top = q;
+    q->head = tsize | PINUSE_BIT;
+    check_top_chunk(m, q);
+  }
+  else if (oldfirst == m->dv) {
+    size_t dsize = m->dvsize += qsize;
+    m->dv = q;
+    set_size_and_pinuse_of_free_chunk(q, dsize);
+  }
+  else {
+    if (!cinuse(oldfirst)) {
+      size_t nsize = chunksize(oldfirst);
+      unlink_chunk(m, oldfirst, nsize);
+      oldfirst = chunk_plus_offset(oldfirst, nsize);
+      qsize += nsize;
+    }
+    set_free_with_pinuse(q, qsize, oldfirst);
+    insert_chunk(m, q, qsize);
+    check_free_chunk(m, q);
+  }
+  check_malloced_chunk(m, chunk2mem(p), nb);
+  return chunk2mem(p);
+}
+/* Add a segment to hold a new noncontiguous region */
+static void add_segment(mstate m, char* tbase, size_t tsize, flag_t mmapped) {
+  /* Determine locations and sizes of segment, fenceposts, old top */
+  char* old_top = (char*)m->top;
+  msegmentptr oldsp = segment_holding(m, old_top);
+  char* old_end = oldsp->base + oldsp->size;
+  size_t ssize = pad_request(sizeof(struct malloc_segment));
+  char* rawsp = old_end - (ssize + FOUR_SIZE_T_SIZES + CHUNK_ALIGN_MASK);
+  size_t offset = align_offset(chunk2mem(rawsp));
+  char* asp = rawsp + offset;
+  char* csp = (asp < (old_top + MIN_CHUNK_SIZE))? old_top : asp;
+  mchunkptr sp = (mchunkptr)csp;
+  msegmentptr ss = (msegmentptr)(chunk2mem(sp));
+  mchunkptr tnext = chunk_plus_offset(sp, ssize);
+  mchunkptr p = tnext;
+  int nfences = 0;
+  /* reset top to new space */
+  init_top(m, (mchunkptr)tbase, tsize - TOP_FOOT_SIZE);
+  /* Set up segment record */
+  assert(is_aligned(ss));
+  set_size_and_pinuse_of_inuse_chunk(m, sp, ssize);
+  *ss = m->seg; /* Push current record */
+  m->seg.base = tbase;
+  m->seg.size = tsize;
+  m->seg.sflags = mmapped;
+  m->seg.next = ss;
+  /* Insert trailing fenceposts */
+  for (;;) {
+    mchunkptr nextp = chunk_plus_offset(p, SIZE_T_SIZE);
+    p->head = FENCEPOST_HEAD;
+    ++nfences;
+    if ((char*)(&(nextp->head)) < old_end)
+      p = nextp;
+    else
+      break;
+  }
+  assert(nfences >= 2);
+  /* Insert the rest of old top into a bin as an ordinary free chunk */
+  if (csp != old_top) {
+    mchunkptr q = (mchunkptr)old_top;
+    size_t psize = csp - old_top;
+    mchunkptr tn = chunk_plus_offset(q, psize);
+    set_free_with_pinuse(q, psize, tn);
+    insert_chunk(m, q, psize);
+  }
+  check_top_chunk(m, m->top);
+}
+/* -------------------------- System allocation -------------------------- */
+/* Get memory from system using MORECORE or MMAP */
+static void* sys_alloc(mstate m, size_t nb) {
+  char* tbase = CMFAIL;
+  size_t tsize = 0;
+  flag_t mmap_flag = 0;
+  init_mparams();
+  /* Directly map large chunks */
+  if (use_mmap(m) && nb >= mparams.mmap_threshold) {
+    void* mem = mmap_alloc(m, nb);
+    if (mem != 0)
+      return mem;
+  }
+  /*
+    Try getting memory in any of three ways (in most-preferred to
+    least-preferred order):
+. A call to MORECORE that can normally contiguously extend memory.
+       (disabled if not MORECORE_CONTIGUOUS or not HAVE_MORECORE or
+       or main space is mmapped or a previous contiguous call failed)
+. A call to MMAP new space (disabled if not HAVE_MMAP).
+       Note that under the default settings, if MORECORE is unable to
+       fulfill a request, and HAVE_MMAP is true, then mmap is
+       used as a noncontiguous system allocator. This is a useful backup
+       strategy for systems with holes in address spaces -- in this case
+       sbrk cannot contiguously expand the heap, but mmap may be able to
+       find space.
+. A call to MORECORE that cannot usually contiguously extend memory.
+       (disabled if not HAVE_MORECORE)
+  */
+  if (MORECORE_CONTIGUOUS && !use_noncontiguous(m)) {
+    char* br = CMFAIL;
+    msegmentptr ss = (m->top == 0)? 0 : segment_holding(m, (char*)m->top);
+    size_t asize = 0;
+    ACQUIRE_MORECORE_LOCK();
+    if (ss == 0) {  /* First time through or recovery */
+      char* base = (char*)CALL_MORECORE(0);
+      if (base != CMFAIL) {
+        asize = granularity_align(nb + TOP_FOOT_SIZE + SIZE_T_ONE);
+        /* Adjust to end on a page boundary */
+        if (!is_page_aligned(base))
+          asize += (page_align((size_t)base) - (size_t)base);
+        /* Can't call MORECORE if size is negative when treated as signed */
+        if (asize < HALF_MAX_SIZE_T &&
+            (br = (char*)(CALL_MORECORE(asize))) == base) {
+          tbase = base;
+          tsize = asize;
+        }
+      }
+    }
+    else {
+      /* Subtract out existing available top space from MORECORE request. */
+      asize = granularity_align(nb - m->topsize + TOP_FOOT_SIZE + SIZE_T_ONE);
+      /* Use mem here only if it did continuously extend old space */
+      if (asize < HALF_MAX_SIZE_T &&
+          (br = (char*)(CALL_MORECORE(asize))) == ss->base+ss->size) {
+        tbase = br;
+        tsize = asize;
+      }
+    }
+    if (tbase == CMFAIL) {    /* Cope with partial failure */
+      if (br != CMFAIL) {    /* Try to use/extend the space we did get */
+        if (asize < HALF_MAX_SIZE_T &&
+            asize < nb + TOP_FOOT_SIZE + SIZE_T_ONE) {
+          size_t esize = granularity_align(nb + TOP_FOOT_SIZE + SIZE_T_ONE - asize);
+          if (esize < HALF_MAX_SIZE_T) {
+            char* end = (char*)CALL_MORECORE(esize);
+            if (end != CMFAIL)
+              asize += esize;
+            else {            /* Can't use; try to release */
+              CALL_MORECORE(-asize);
+              br = CMFAIL;
+            }
+          }
+        }
+      }
+      if (br != CMFAIL) {    /* Use the space we did get */
+        tbase = br;
+        tsize = asize;
+      }
+      else
+        disable_contiguous(m); /* Don't try contiguous path in the future */
+    }
+    RELEASE_MORECORE_LOCK();
+  }
+  if (HAVE_MMAP && tbase == CMFAIL) {  /* Try MMAP */
+    size_t req = nb + TOP_FOOT_SIZE + SIZE_T_ONE;
+    size_t rsize = granularity_align(req);
+    if (rsize > nb) { /* Fail if wraps around zero */
+      char* mp = (char*)(CALL_MMAP(rsize));
+      if (mp != CMFAIL) {
+        tbase = mp;
+        tsize = rsize;
+        mmap_flag = IS_MMAPPED_BIT;
+      }
+    }
+  }
+  if (HAVE_MORECORE && tbase == CMFAIL) { /* Try noncontiguous MORECORE */
+    size_t asize = granularity_align(nb + TOP_FOOT_SIZE + SIZE_T_ONE);
+    if (asize < HALF_MAX_SIZE_T) {
+      char* br = CMFAIL;
+      char* end = CMFAIL;
+      ACQUIRE_MORECORE_LOCK();
+      br = (char*)(CALL_MORECORE(asize));
+      end = (char*)(CALL_MORECORE(0));
+      RELEASE_MORECORE_LOCK();
+      if (br != CMFAIL && end != CMFAIL && br < end) {
+        size_t ssize = end - br;
+        if (ssize > nb + TOP_FOOT_SIZE) {
+          tbase = br;
+          tsize = ssize;
+        }
+      }
+    }
+  }
+  if (tbase != CMFAIL) {
+    if ((m->footprint += tsize) > m->max_footprint)
+      m->max_footprint = m->footprint;
+    if (!is_initialized(m)) { /* first-time initialization */
+      m->seg.base = m->least_addr = tbase;
+      m->seg.size = tsize;
+      m->seg.sflags = mmap_flag;
+      m->magic = mparams.magic;
+      init_bins(m);
+      if (is_global(m))
+        init_top(m, (mchunkptr)tbase, tsize - TOP_FOOT_SIZE);
+      else {
+        /* Offset top by embedded malloc_state */
+        mchunkptr mn = next_chunk(mem2chunk(m));
+        init_top(m, mn, (size_t)((tbase + tsize) - (char*)mn) -TOP_FOOT_SIZE);
+      }
+    }
+    else {
+      /* Try to merge with an existing segment */
+      msegmentptr sp = &m->seg;
+      while (sp != 0 && tbase != sp->base + sp->size)
+        sp = sp->next;
+      if (sp != 0 &&
+          !is_extern_segment(sp) &&
+          (sp->sflags & IS_MMAPPED_BIT) == mmap_flag &&
+          segment_holds(sp, m->top)) { /* append */
+        sp->size += tsize;
+        init_top(m, m->top, m->topsize + tsize);
+      }
+      else {
+        if (tbase < m->least_addr)
+          m->least_addr = tbase;
+        sp = &m->seg;
+        while (sp != 0 && sp->base != tbase + tsize)
+          sp = sp->next;
+        if (sp != 0 &&
+            !is_extern_segment(sp) &&
+            (sp->sflags & IS_MMAPPED_BIT) == mmap_flag) {
+          char* oldbase = sp->base;
+          sp->base = tbase;
+          sp->size += tsize;
+          return prepend_alloc(m, tbase, oldbase, nb);
+        }
+        else
+          add_segment(m, tbase, tsize, mmap_flag);
+      }
+    }
+    if (nb < m->topsize) { /* Allocate from new or extended top space */
+      size_t rsize = m->topsize -= nb;
+      mchunkptr p = m->top;
+      mchunkptr r = m->top = chunk_plus_offset(p, nb);
+      r->head = rsize | PINUSE_BIT;
+      set_size_and_pinuse_of_inuse_chunk(m, p, nb);
+      check_top_chunk(m, m->top);
+      check_malloced_chunk(m, chunk2mem(p), nb);
+      return chunk2mem(p);
+    }
+  }
+  MALLOC_FAILURE_ACTION;
+  return 0;
+}
+/* -----------------------  system deallocation -------------------------- */
+/* Unmap and unlink any mmapped segments that don't contain used chunks */
+static size_t release_unused_segments(mstate m) {
+  size_t released = 0;
+  msegmentptr pred = &m->seg;
+  msegmentptr sp = pred->next;
+  while (sp != 0) {
+    char* base = sp->base;
+    size_t size = sp->size;
+    msegmentptr next = sp->next;
+    if (is_mmapped_segment(sp) && !is_extern_segment(sp)) {
+      mchunkptr p = align_as_chunk(base);
+      size_t psize = chunksize(p);
+      /* Can unmap if first chunk holds entire segment and not pinned */
+      if (!cinuse(p) && (char*)p + psize >= base + size - TOP_FOOT_SIZE) {
+        tchunkptr tp = (tchunkptr)p;
+        assert(segment_holds(sp, (char*)sp));
+        if (p == m->dv) {
+          m->dv = 0;
+          m->dvsize = 0;
+        }
+        else {
+          unlink_large_chunk(m, tp);
+        }
+        if (CALL_MUNMAP(base, size) == 0) {
+          released += size;
+          m->footprint -= size;
+          /* unlink obsoleted record */
+          sp = pred;
+          sp->next = next;
+        }
+        else { /* back out if cannot unmap */
+          insert_large_chunk(m, tp, psize);
+        }
+      }
+    }
+    pred = sp;
+    sp = next;
+  }
+  return released;
+}
+static int sys_trim(mstate m, size_t pad) {
+  size_t released = 0;
+  if (pad < MAX_REQUEST && is_initialized(m)) {
+    pad += TOP_FOOT_SIZE; /* ensure enough room for segment overhead */
+    if (m->topsize > pad) {
+      /* Shrink top space in granularity-size units, keeping at least one */
+      size_t unit = mparams.granularity;
+      size_t extra = ((m->topsize - pad + (unit - SIZE_T_ONE)) / unit -
+                      SIZE_T_ONE) * unit;
+      msegmentptr sp = segment_holding(m, (char*)m->top);
+      if (!is_extern_segment(sp)) {
+        if (is_mmapped_segment(sp)) {
+          if (HAVE_MMAP &&
+              sp->size >= extra &&
+              !has_segment_link(m, sp)) { /* can't shrink if pinned */
+            /* Prefer mremap, fall back to munmap */
+            if ((CALL_MREMAP(sp->base, sp->size, sp->size - extra, 0) != MFAIL) ||
+                (CALL_MUNMAP(sp->base + sp->size - extra, extra) == 0)) {
+              released = extra;
+            }
+          }
+        }
+        else if (HAVE_MORECORE) {
+          if (extra >= HALF_MAX_SIZE_T) /* Avoid wrapping negative */
+            extra = (HALF_MAX_SIZE_T) + SIZE_T_ONE - unit;
+          ACQUIRE_MORECORE_LOCK();
+          {
+            /* Make sure end of memory is where we last set it. */
+            char* old_br = (char*)(CALL_MORECORE(0));
+            if (old_br == sp->base + sp->size) {
+              char* rel_br = (char*)(CALL_MORECORE(-extra));
+              char* new_br = (char*)(CALL_MORECORE(0));
+              if (rel_br != CMFAIL && new_br < old_br)
+                released = old_br - new_br;
+            }
+          }
+          RELEASE_MORECORE_LOCK();
+        }
+      }
+      if (released != 0) {
+        sp->size -= released;
+        m->footprint -= released;
+        init_top(m, m->top, m->topsize - released);
+        check_top_chunk(m, m->top);
+      }
+    }
+    /* Unmap any unused mmapped segments */
+    if (HAVE_MMAP)
+      released += release_unused_segments(m);
+    /* On failure, disable autotrim to avoid repeated failed future calls */
+    if (released == 0)
+      m->trim_check = MAX_SIZE_T;
+  }
+  return (released != 0)? 1 : 0;
+}
+/* ---------------------------- malloc support --------------------------- */
+/* allocate a large request from the best fitting chunk in a treebin */
+static void* tmalloc_large(mstate m, size_t nb) {
+  tchunkptr v = 0;
+  size_t rsize = -nb; /* Unsigned negation */
+  tchunkptr t;
+  bindex_t idx;
+  compute_tree_index(nb, idx);
+  if ((t = *treebin_at(m, idx)) != 0) {
+    /* Traverse tree for this bin looking for node with size == nb */
+    size_t sizebits = nb << leftshift_for_tree_index(idx);
+    tchunkptr rst = 0;  /* The deepest untaken right subtree */
+    for (;;) {
+      tchunkptr rt;
+      size_t trem = chunksize(t) - nb;
+      if (trem < rsize) {
+        v = t;
+        if ((rsize = trem) == 0)
+          break;
+      }
+      rt = t->child[1];
+      t = t->child[(sizebits >> (SIZE_T_BITSIZE-SIZE_T_ONE)) & 1];
+      if (rt != 0 && rt != t)
+        rst = rt;
+      if (t == 0) {
+        t = rst; /* set t to least subtree holding sizes > nb */
+        break;
+      }
+      sizebits <<= 1;
+    }
+  }
+  if (t == 0 && v == 0) { /* set t to root of next non-empty treebin */
+    binmap_t leftbits = left_bits(idx2bit(idx)) & m->treemap;
+    if (leftbits != 0) {
+      bindex_t i;
+      binmap_t leastbit = least_bit(leftbits);
+      compute_bit2idx(leastbit, i);
+      t = *treebin_at(m, i);
+    }
+  }
+  while (t != 0) { /* find smallest of tree or subtree */
+    size_t trem = chunksize(t) - nb;
+    if (trem < rsize) {
+      rsize = trem;
+      v = t;
+    }
+    t = leftmost_child(t);
+  }
+  /*  If dv is a better fit, return 0 so malloc will use it */
+  if (v != 0 && rsize < (size_t)(m->dvsize - nb)) {
+    if (RTCHECK(ok_address(m, v))) { /* split */
+      mchunkptr r = chunk_plus_offset(v, nb);
+      assert(chunksize(v) == rsize + nb);
+      if (RTCHECK(ok_next(v, r))) {
+        unlink_large_chunk(m, v);
+        if (rsize < MIN_CHUNK_SIZE)
+          set_inuse_and_pinuse(m, v, (rsize + nb));
+        else {
+          set_size_and_pinuse_of_inuse_chunk(m, v, nb);
+          set_size_and_pinuse_of_free_chunk(r, rsize);
+          insert_chunk(m, r, rsize);
+        }
+        return chunk2mem(v);
+      }
+    }
+    CORRUPTION_ERROR_ACTION(m);
+  }
+  return 0;
+}
+/* allocate a small request from the best fitting chunk in a treebin */
+static void* tmalloc_small(mstate m, size_t nb) {
+  tchunkptr t, v;
+  size_t rsize;
+  bindex_t i;
+  binmap_t leastbit = least_bit(m->treemap);
+  compute_bit2idx(leastbit, i);
+  v = t = *treebin_at(m, i);
+  rsize = chunksize(t) - nb;
+  while ((t = leftmost_child(t)) != 0) {
+    size_t trem = chunksize(t) - nb;
+    if (trem < rsize) {
+      rsize = trem;
+      v = t;
+    }
+  }
+  if (RTCHECK(ok_address(m, v))) {
+    mchunkptr r = chunk_plus_offset(v, nb);
+    assert(chunksize(v) == rsize + nb);
+    if (RTCHECK(ok_next(v, r))) {
+      unlink_large_chunk(m, v);
+      if (rsize < MIN_CHUNK_SIZE)
+        set_inuse_and_pinuse(m, v, (rsize + nb));
+      else {
+        set_size_and_pinuse_of_inuse_chunk(m, v, nb);
+        set_size_and_pinuse_of_free_chunk(r, rsize);
+        replace_dv(m, r, rsize);
+      }
+      return chunk2mem(v);
+    }
+  }
+  CORRUPTION_ERROR_ACTION(m);
+  return 0;
+}
+/* --------------------------- realloc support --------------------------- */
+static void* internal_realloc(mstate m, void* oldmem, size_t bytes) {
+  if (bytes >= MAX_REQUEST) {
+    MALLOC_FAILURE_ACTION;
+    return 0;
+  }
+  if (!PREACTION(m)) {
+    mchunkptr oldp = mem2chunk(oldmem);
+    size_t oldsize = chunksize(oldp);
+    mchunkptr next = chunk_plus_offset(oldp, oldsize);
+    mchunkptr newp = 0;
+    void* extra = 0;
+    /* Try to either shrink or extend into top. Else malloc-copy-free */
+    if (RTCHECK(ok_address(m, oldp) && ok_cinuse(oldp) &&
+                ok_next(oldp, next) && ok_pinuse(next))) {
+      size_t nb = request2size(bytes);
+      if (is_mmapped(oldp))
+        newp = mmap_resize(m, oldp, nb);
+      else if (oldsize >= nb) { /* already big enough */
+        size_t rsize = oldsize - nb;
+        newp = oldp;
+        if (rsize >= MIN_CHUNK_SIZE) {
+          mchunkptr remainder = chunk_plus_offset(newp, nb);
+          set_inuse(m, newp, nb);
+          set_inuse(m, remainder, rsize);
+          extra = chunk2mem(remainder);
+        }
+      }
+      else if (next == m->top && oldsize + m->topsize > nb) {
+        /* Expand into top */
+        size_t newsize = oldsize + m->topsize;
+        size_t newtopsize = newsize - nb;
+        mchunkptr newtop = chunk_plus_offset(oldp, nb);
+        set_inuse(m, oldp, nb);
+        newtop->head = newtopsize |PINUSE_BIT;
+        m->top = newtop;
+        m->topsize = newtopsize;
+        newp = oldp;
+      }
+    }
+    else {
+      USAGE_ERROR_ACTION(m, oldmem);
+      POSTACTION(m);
+      return 0;
+    }
+    POSTACTION(m);
+    if (newp != 0) {
+      if (extra != 0) {
+        internal_free(m, extra);
+      }
+      check_inuse_chunk(m, newp);
+      return chunk2mem(newp);
+    }
+    else {
+      void* newmem = internal_malloc(m, bytes);
+      if (newmem != 0) {
+        size_t oc = oldsize - overhead_for(oldp);
+        memcpy(newmem, oldmem, (oc < bytes)? oc : bytes);
+        internal_free(m, oldmem);
+      }
+      return newmem;
+    }
+  }
+  return 0;
+}
+/* --------------------------- memalign support -------------------------- */
+static void* internal_memalign(mstate m, size_t alignment, size_t bytes) {
+  if (alignment <= MALLOC_ALIGNMENT)    /* Can just use malloc */
+    return internal_malloc(m, bytes);
+  if (alignment <  MIN_CHUNK_SIZE) /* must be at least a minimum chunk size */
+    alignment = MIN_CHUNK_SIZE;
+  if ((alignment & (alignment-SIZE_T_ONE)) != 0) {/* Ensure a power of 2 */
+    size_t a = MALLOC_ALIGNMENT << 1;
+    while (a < alignment) a <<= 1;
+    alignment = a;
+  }
+  if (bytes >= MAX_REQUEST - alignment) {
+    if (m != 0)  { /* Test isn't needed but avoids compiler warning */
+      MALLOC_FAILURE_ACTION;
+    }
+  }
+  else {
+    size_t nb = request2size(bytes);
+    size_t req = nb + alignment + MIN_CHUNK_SIZE - CHUNK_OVERHEAD;
+    char* mem = (char*)internal_malloc(m, req);
+    if (mem != 0) {
+      void* leader = 0;
+      void* trailer = 0;
+      mchunkptr p = mem2chunk(mem);
+      if (PREACTION(m)) return 0;
+      if ((((size_t)(mem)) % alignment) != 0) { /* misaligned */
+        /*
+          Find an aligned spot inside chunk.  Since we need to give
+          back leading space in a chunk of at least MIN_CHUNK_SIZE, if
+          the first calculation places us at a spot with less than
+          MIN_CHUNK_SIZE leader, we can move to the next aligned spot.
+          We've allocated enough total room so that this is always
+          possible.
+        */
+        char* br = (char*)mem2chunk((size_t)(((size_t)(mem +
+                                                       alignment -
+                                                       SIZE_T_ONE)) &
+                                             -alignment));
+        char* pos = ((size_t)(br - (char*)(p)) >= MIN_CHUNK_SIZE)?
+          br : br+alignment;
+        mchunkptr newp = (mchunkptr)pos;
+        size_t leadsize = pos - (char*)(p);
+        size_t newsize = chunksize(p) - leadsize;
+        if (is_mmapped(p)) { /* For mmapped chunks, just adjust offset */
+          newp->prev_foot = p->prev_foot + leadsize;
+          newp->head = (newsize|CINUSE_BIT);
+        }
+        else { /* Otherwise, give back leader, use the rest */
+          set_inuse(m, newp, newsize);
+          set_inuse(m, p, leadsize);
+          leader = chunk2mem(p);
+        }
+        p = newp;
+      }
+      /* Give back spare room at the end */
+      if (!is_mmapped(p)) {
+        size_t size = chunksize(p);
+        if (size > nb + MIN_CHUNK_SIZE) {
+          size_t remainder_size = size - nb;
+          mchunkptr remainder = chunk_plus_offset(p, nb);
+          set_inuse(m, p, nb);
+          set_inuse(m, remainder, remainder_size);
+          trailer = chunk2mem(remainder);
+        }
+      }
+      assert (chunksize(p) >= nb);
+      assert((((size_t)(chunk2mem(p))) % alignment) == 0);
+      check_inuse_chunk(m, p);
+      POSTACTION(m);
+      if (leader != 0) {
+        internal_free(m, leader);
+      }
+      if (trailer != 0) {
+        internal_free(m, trailer);
+      }
+      return chunk2mem(p);
+    }
+  }
+  return 0;
+}
+/* ------------------------ comalloc/coalloc support --------------------- */
+static void** ialloc(mstate m,
+                     size_t n_elements,
+                     size_t* sizes,
+                     int opts,
+                     void* chunks[]) {
+  /*
+    This provides common support for independent_X routines, handling
+    all of the combinations that can result.
+    The opts arg has:
+    bit 0 set if all elements are same size (using sizes[0])
+    bit 1 set if elements should be zeroed
+  */
+  size_t    element_size;   /* chunksize of each element, if all same */
+  size_t    contents_size;  /* total size of elements */
+  size_t    array_size;     /* request size of pointer array */
+  void*     mem;            /* malloced aggregate space */
+  mchunkptr p;              /* corresponding chunk */
+  size_t    remainder_size; /* remaining bytes while splitting */
+  void**    marray;         /* either "chunks" or malloced ptr array */
+  mchunkptr array_chunk;    /* chunk for malloced ptr array */
+  flag_t    was_enabled;    /* to disable mmap */
+  size_t    size;
+  size_t    i;
+  /* compute array length, if needed */
+  if (chunks != 0) {
+    if (n_elements == 0)
+      return chunks; /* nothing to do */
+    marray = chunks;
+    array_size = 0;
+  }
+  else {
+    /* if empty req, must still return chunk representing empty array */
+    if (n_elements == 0)
+      return (void**)internal_malloc(m, 0);
+    marray = 0;
+    array_size = request2size(n_elements * (sizeof(void*)));
+  }
+  /* compute total element size */
+  if (opts & 0x1) { /* all-same-size */
+    element_size = request2size(*sizes);
+    contents_size = n_elements * element_size;
+  }
+  else { /* add up all the sizes */
+    element_size = 0;
+    contents_size = 0;
+    for (i = 0; i != n_elements; ++i)
+      contents_size += request2size(sizes[i]);
+  }
+  size = contents_size + array_size;
+  /*
+     Allocate the aggregate chunk.  First disable direct-mmapping so
+     malloc won't use it, since we would not be able to later
+     free/realloc space internal to a segregated mmap region.
+  */
+  was_enabled = use_mmap(m);
+  disable_mmap(m);
+  mem = internal_malloc(m, size - CHUNK_OVERHEAD);
+  if (was_enabled)
+    enable_mmap(m);
+  if (mem == 0)
+    return 0;
+  if (PREACTION(m)) return 0;
+  p = mem2chunk(mem);
+  remainder_size = chunksize(p);
+  assert(!is_mmapped(p));
+  if (opts & 0x2) {       /* optionally clear the elements */
+    memset((size_t*)mem, 0, remainder_size - SIZE_T_SIZE - array_size);
+  }
+  /* If not provided, allocate the pointer array as final part of chunk */
+  if (marray == 0) {
+    size_t  array_chunk_size;
+    array_chunk = chunk_plus_offset(p, contents_size);
+    array_chunk_size = remainder_size - contents_size;
+    marray = (void**) (chunk2mem(array_chunk));
+    set_size_and_pinuse_of_inuse_chunk(m, array_chunk, array_chunk_size);
+    remainder_size = contents_size;
+  }
+  /* split out elements */
+  for (i = 0; ; ++i) {
+    marray[i] = chunk2mem(p);
+    if (i != n_elements-1) {
+      if (element_size != 0)
+        size = element_size;
+      else
+        size = request2size(sizes[i]);
+      remainder_size -= size;
+      set_size_and_pinuse_of_inuse_chunk(m, p, size);
+      p = chunk_plus_offset(p, size);
+    }
+    else { /* the final element absorbs any overallocation slop */
+      set_size_and_pinuse_of_inuse_chunk(m, p, remainder_size);
+      break;
+    }
+  }
+#if DEBUG
+  if (marray != chunks) {
+    /* final element must have exactly exhausted chunk */
+    if (element_size != 0) {
+      assert(remainder_size == element_size);
+    }
+    else {
+      assert(remainder_size == request2size(sizes[i]));
+    }
+    check_inuse_chunk(m, mem2chunk(marray));
+  }
+  for (i = 0; i != n_elements; ++i)
+    check_inuse_chunk(m, mem2chunk(marray[i]));
+#endif /* DEBUG */
+  POSTACTION(m);
+  return marray;
+}
+/* -------------------------- public routines ---------------------------- */
+#if !ONLY_MSPACES
+void* dlmalloc(size_t bytes) {
+  /*
+     Basic algorithm:
+     If a small request (< 256 bytes minus per-chunk overhead):
+. If one exists, use a remainderless chunk in associated smallbin.
+          (Remainderless means that there are too few excess bytes to
+          represent as a chunk.)
+. If it is big enough, use the dv chunk, which is normally the
+          chunk adjacent to the one used for the most recent small request.
+. If one exists, split the smallest available chunk in a bin,
+          saving remainder in dv.
+. If it is big enough, use the top chunk.
+. If available, get memory from system and use it
+     Otherwise, for a large request:
+. Find the smallest available binned chunk that fits, and use it
+          if it is better fitting than dv chunk, splitting if necessary.
+. If better fitting than any binned chunk, use the dv chunk.
+. If it is big enough, use the top chunk.
+. If request size >= mmap threshold, try to directly mmap this chunk.
+. If available, get memory from system and use it
+     The ugly goto's here ensure that postaction occurs along all paths.
+  */
+  if (!PREACTION(gm)) {
+    void* mem;
+    size_t nb;
+    if (bytes <= MAX_SMALL_REQUEST) {
+      bindex_t idx;
+      binmap_t smallbits;
+      nb = (bytes < MIN_REQUEST)? MIN_CHUNK_SIZE : pad_request(bytes);
+      idx = small_index(nb);
+      smallbits = gm->smallmap >> idx;
+      if ((smallbits & 0x3U) != 0) { /* Remainderless fit to a smallbin. */
+        mchunkptr b, p;
+        idx += ~smallbits & 1;       /* Uses next bin if idx empty */
+        b = smallbin_at(gm, idx);
+        p = b->fd;
+        assert(chunksize(p) == small_index2size(idx));
+        unlink_first_small_chunk(gm, b, p, idx);
+        set_inuse_and_pinuse(gm, p, small_index2size(idx));
+        mem = chunk2mem(p);
+        check_malloced_chunk(gm, mem, nb);
+        goto postaction;
+      }
+      else if (nb > gm->dvsize) {
+        if (smallbits != 0) { /* Use chunk in next nonempty smallbin */
+          mchunkptr b, p, r;
+          size_t rsize;
+          bindex_t i;
+          binmap_t leftbits = (smallbits << idx) & left_bits(idx2bit(idx));
+          binmap_t leastbit = least_bit(leftbits);
+          compute_bit2idx(leastbit, i);
+          b = smallbin_at(gm, i);
+          p = b->fd;
+          assert(chunksize(p) == small_index2size(i));
+          unlink_first_small_chunk(gm, b, p, i);
+          rsize = small_index2size(i) - nb;
+          /* Fit here cannot be remainderless if 4byte sizes */
+          if (SIZE_T_SIZE != 4 && rsize < MIN_CHUNK_SIZE)
+            set_inuse_and_pinuse(gm, p, small_index2size(i));
+          else {
+            set_size_and_pinuse_of_inuse_chunk(gm, p, nb);
+            r = chunk_plus_offset(p, nb);
+            set_size_and_pinuse_of_free_chunk(r, rsize);
+            replace_dv(gm, r, rsize);
+          }
+          mem = chunk2mem(p);
+          check_malloced_chunk(gm, mem, nb);
+          goto postaction;
+        }
+        else if (gm->treemap != 0 && (mem = tmalloc_small(gm, nb)) != 0) {
+          check_malloced_chunk(gm, mem, nb);
+          goto postaction;
+        }
+      }
+    }
+    else if (bytes >= MAX_REQUEST)
+      nb = MAX_SIZE_T; /* Too big to allocate. Force failure (in sys alloc) */
+    else {
+      nb = pad_request(bytes);
+      if (gm->treemap != 0 && (mem = tmalloc_large(gm, nb)) != 0) {
+        check_malloced_chunk(gm, mem, nb);
+        goto postaction;
+      }
+    }
+    if (nb <= gm->dvsize) {
+      size_t rsize = gm->dvsize - nb;
+      mchunkptr p = gm->dv;
+      if (rsize >= MIN_CHUNK_SIZE) { /* split dv */
+        mchunkptr r = gm->dv = chunk_plus_offset(p, nb);
+        gm->dvsize = rsize;
+        set_size_and_pinuse_of_free_chunk(r, rsize);
+        set_size_and_pinuse_of_inuse_chunk(gm, p, nb);
+      }
+      else { /* exhaust dv */
+        size_t dvs = gm->dvsize;
+        gm->dvsize = 0;
+        gm->dv = 0;
+        set_inuse_and_pinuse(gm, p, dvs);
+      }
+      mem = chunk2mem(p);
+      check_malloced_chunk(gm, mem, nb);
+      goto postaction;
+    }
+    else if (nb < gm->topsize) { /* Split top */
+      size_t rsize = gm->topsize -= nb;
+      mchunkptr p = gm->top;
+      mchunkptr r = gm->top = chunk_plus_offset(p, nb);
+      r->head = rsize | PINUSE_BIT;
+      set_size_and_pinuse_of_inuse_chunk(gm, p, nb);
+      mem = chunk2mem(p);
+      check_top_chunk(gm, gm->top);
+      check_malloced_chunk(gm, mem, nb);
+      goto postaction;
+    }
+    mem = sys_alloc(gm, nb);
+  postaction:
+    POSTACTION(gm);
+    return mem;
+  }
+  return 0;
+}
+void dlfree(void* mem) {
+  /*
+     Consolidate freed chunks with preceeding or succeeding bordering
+     free chunks, if they exist, and then place in a bin.  Intermixed
+     with special cases for top, dv, mmapped chunks, and usage errors.
+  */
+  if (mem != 0) {
+    mchunkptr p  = mem2chunk(mem);
+#if FOOTERS
+    mstate fm = get_mstate_for(p);
+    if (!ok_magic(fm)) {
+      USAGE_ERROR_ACTION(fm, p);
+      return;
+    }
+#else /* FOOTERS */
+#define fm gm
+#endif /* FOOTERS */
+    if (!PREACTION(fm)) {
+      check_inuse_chunk(fm, p);
+      if (RTCHECK(ok_address(fm, p) && ok_cinuse(p))) {
+        size_t psize = chunksize(p);
+        mchunkptr next = chunk_plus_offset(p, psize);
+        if (!pinuse(p)) {
+          size_t prevsize = p->prev_foot;
+          if ((prevsize & IS_MMAPPED_BIT) != 0) {
+            prevsize &= ~IS_MMAPPED_BIT;
+            psize += prevsize + MMAP_FOOT_PAD;
+            if (CALL_MUNMAP((char*)p - prevsize, psize) == 0)
+              fm->footprint -= psize;
+            goto postaction;
+          }
+          else {
+            mchunkptr prev = chunk_minus_offset(p, prevsize);
+            psize += prevsize;
+            p = prev;
+            if (RTCHECK(ok_address(fm, prev))) { /* consolidate backward */
+              if (p != fm->dv) {
+                unlink_chunk(fm, p, prevsize);
+              }
+              else if ((next->head & INUSE_BITS) == INUSE_BITS) {
+                fm->dvsize = psize;
+                set_free_with_pinuse(p, psize, next);
+                goto postaction;
+              }
+            }
+            else
+              goto erroraction;
+          }
+        }
+        if (RTCHECK(ok_next(p, next) && ok_pinuse(next))) {
+          if (!cinuse(next)) {  /* consolidate forward */
+            if (next == fm->top) {
+              size_t tsize = fm->topsize += psize;
+              fm->top = p;
+              p->head = tsize | PINUSE_BIT;
+              if (p == fm->dv) {
+                fm->dv = 0;
+                fm->dvsize = 0;
+              }
+              if (should_trim(fm, tsize))
+                sys_trim(fm, 0);
+              goto postaction;
+            }
+            else if (next == fm->dv) {
+              size_t dsize = fm->dvsize += psize;
+              fm->dv = p;
+              set_size_and_pinuse_of_free_chunk(p, dsize);
+              goto postaction;
+            }
+            else {
+              size_t nsize = chunksize(next);
+              psize += nsize;
+              unlink_chunk(fm, next, nsize);
+              set_size_and_pinuse_of_free_chunk(p, psize);
+              if (p == fm->dv) {
+                fm->dvsize = psize;
+                goto postaction;
+              }
+            }
+          }
+          else
+            set_free_with_pinuse(p, psize, next);
+          insert_chunk(fm, p, psize);
+          check_free_chunk(fm, p);
+          goto postaction;
+        }
+      }
+    erroraction:
+      USAGE_ERROR_ACTION(fm, p);
+    postaction:
+      POSTACTION(fm);
+    }
+  }
+#if !FOOTERS
+#undef fm
+#endif /* FOOTERS */
+}
+void* dlcalloc(size_t n_elements, size_t elem_size) {
+  void* mem;
+  size_t req = 0;
+  if (n_elements != 0) {
+    req = n_elements * elem_size;
+    if (((n_elements | elem_size) & ~(size_t)0xffff) &&
+        (req / n_elements != elem_size))
+      req = MAX_SIZE_T; /* force downstream failure on overflow */
+  }
+  mem = dlmalloc(req);
+  if (mem != 0 && calloc_must_clear(mem2chunk(mem)))
+    memset(mem, 0, req);
+  return mem;
+}
+void* dlrealloc(void* oldmem, size_t bytes) {
+  if (oldmem == 0)
+    return dlmalloc(bytes);
+#ifdef REALLOC_ZERO_BYTES_FREES
+  if (bytes == 0) {
+    dlfree(oldmem);
+    return 0;
+  }
+#endif /* REALLOC_ZERO_BYTES_FREES */
+  else {
+#if ! FOOTERS
+    mstate m = gm;
+#else /* FOOTERS */
+    mstate m = get_mstate_for(mem2chunk(oldmem));
+    if (!ok_magic(m)) {
+      USAGE_ERROR_ACTION(m, oldmem);
+      return 0;
+    }
+#endif /* FOOTERS */
+    return internal_realloc(m, oldmem, bytes);
+  }
+}
+void* dlmemalign(size_t alignment, size_t bytes) {
+  return internal_memalign(gm, alignment, bytes);
+}
+void** dlindependent_calloc(size_t n_elements, size_t elem_size,
+                                 void* chunks[]) {
+  size_t sz = elem_size; /* serves as 1-element array */
+  return ialloc(gm, n_elements, &sz, 3, chunks);
+}
+void** dlindependent_comalloc(size_t n_elements, size_t sizes[],
+                                   void* chunks[]) {
+  return ialloc(gm, n_elements, sizes, 0, chunks);
+}
+void* dlvalloc(size_t bytes) {
+  size_t pagesz;
+  init_mparams();
+  pagesz = mparams.page_size;
+  return dlmemalign(pagesz, bytes);
+}
+void* dlpvalloc(size_t bytes) {
+  size_t pagesz;
+  init_mparams();
+  pagesz = mparams.page_size;
+  return dlmemalign(pagesz, (bytes + pagesz - SIZE_T_ONE) & ~(pagesz - SIZE_T_ONE));
+}
+int dlmalloc_trim(size_t pad) {
+  int result = 0;
+  if (!PREACTION(gm)) {
+    result = sys_trim(gm, pad);
+    POSTACTION(gm);
+  }
+  return result;
+}
+size_t dlmalloc_footprint(void) {
+  return gm->footprint;
+}
+size_t dlmalloc_max_footprint(void) {
+  return gm->max_footprint;
+}
+#if !NO_MALLINFO
+struct mallinfo dlmallinfo(void) {
+  return internal_mallinfo(gm);
+}
+#endif /* NO_MALLINFO */
+void dlmalloc_stats() {
+  internal_malloc_stats(gm);
+}
+size_t dlmalloc_usable_size(void* mem) {
+  if (mem != 0) {
+    mchunkptr p = mem2chunk(mem);
+    if (cinuse(p))
+      return chunksize(p) - overhead_for(p);
+  }
+  return 0;
+}
+int dlmallopt(int param_number, int value) {
+  return change_mparam(param_number, value);
+}
+#endif /* !ONLY_MSPACES */
+/* ----------------------------- user mspaces ---------------------------- */
+#if MSPACES
+static mstate init_user_mstate(char* tbase, size_t tsize) {
+  size_t msize = pad_request(sizeof(struct malloc_state));
+  mchunkptr mn;
+  mchunkptr msp = align_as_chunk(tbase);
+  mstate m = (mstate)(chunk2mem(msp));
+  memset(m, 0, msize);
+  INITIAL_LOCK(&m->mutex);
+  msp->head = (msize|PINUSE_BIT|CINUSE_BIT);
+  m->seg.base = m->least_addr = tbase;
+  m->seg.size = m->footprint = m->max_footprint = tsize;
+  m->magic = mparams.magic;
+  m->mflags = mparams.default_mflags;
+  disable_contiguous(m);
+  init_bins(m);
+  mn = next_chunk(mem2chunk(m));
+  init_top(m, mn, (size_t)((tbase + tsize) - (char*)mn) - TOP_FOOT_SIZE);
+  check_top_chunk(m, m->top);
+  return m;
+}
+mspace create_mspace(size_t capacity, int locked) {
+  mstate m = 0;
+  size_t msize = pad_request(sizeof(struct malloc_state));
+  init_mparams(); /* Ensure pagesize etc initialized */
+  if (capacity < (size_t) -(msize + TOP_FOOT_SIZE + mparams.page_size)) {
+    size_t rs = ((capacity == 0)? mparams.granularity :
+                 (capacity + TOP_FOOT_SIZE + msize));
+    size_t tsize = granularity_align(rs);
+    char* tbase = (char*)(CALL_MMAP(tsize));
+    if (tbase != CMFAIL) {
+      m = init_user_mstate(tbase, tsize);
+      m->seg.sflags = IS_MMAPPED_BIT;
+      set_lock(m, locked);
+    }
+  }
+  return (mspace)m;
+}
+mspace create_mspace_with_base(void* base, size_t capacity, int locked) {
+  mstate m = 0;
+  size_t msize = pad_request(sizeof(struct malloc_state));
+  init_mparams(); /* Ensure pagesize etc initialized */
+  if (capacity > msize + TOP_FOOT_SIZE &&
+      capacity < (size_t) -(msize + TOP_FOOT_SIZE + mparams.page_size)) {
+    m = init_user_mstate((char*)base, capacity);
+    m->seg.sflags = EXTERN_BIT;
+    set_lock(m, locked);
+  }
+  return (mspace)m;
+}
+size_t destroy_mspace(mspace msp) {
+  size_t freed = 0;
+  mstate ms = (mstate)msp;
+  if (ok_magic(ms)) {
+    msegmentptr sp = &ms->seg;
+    while (sp != 0) {
+      char* base = sp->base;
+      size_t size = sp->size;
+      flag_t flag = sp->sflags;
+      sp = sp->next;
+      if ((flag & IS_MMAPPED_BIT) && !(flag & EXTERN_BIT) &&
+          CALL_MUNMAP(base, size) == 0)
+        freed += size;
+    }
+  }
+  else {
+    USAGE_ERROR_ACTION(ms,ms);
+  }
+  return freed;
+}
+/*
+  mspace versions of routines are near-clones of the global
+  versions. This is not so nice but better than the alternatives.
+*/
+void* mspace_malloc(mspace msp, size_t bytes) {
+  mstate ms = (mstate)msp;
+  if (!ok_magic(ms)) {
+    USAGE_ERROR_ACTION(ms,ms);
+    return 0;
+  }
+  if (!PREACTION(ms)) {
+    void* mem;
+    size_t nb;
+    if (bytes <= MAX_SMALL_REQUEST) {
+      bindex_t idx;
+      binmap_t smallbits;
+      nb = (bytes < MIN_REQUEST)? MIN_CHUNK_SIZE : pad_request(bytes);
+      idx = small_index(nb);
+      smallbits = ms->smallmap >> idx;
+      if ((smallbits & 0x3U) != 0) { /* Remainderless fit to a smallbin. */
+        mchunkptr b, p;
+        idx += ~smallbits & 1;       /* Uses next bin if idx empty */
+        b = smallbin_at(ms, idx);
+        p = b->fd;
+        assert(chunksize(p) == small_index2size(idx));
+        unlink_first_small_chunk(ms, b, p, idx);
+        set_inuse_and_pinuse(ms, p, small_index2size(idx));
+        mem = chunk2mem(p);
+        check_malloced_chunk(ms, mem, nb);
+        goto postaction;
+      }
+      else if (nb > ms->dvsize) {
+        if (smallbits != 0) { /* Use chunk in next nonempty smallbin */
+          mchunkptr b, p, r;
+          size_t rsize;
+          bindex_t i;
+          binmap_t leftbits = (smallbits << idx) & left_bits(idx2bit(idx));
+          binmap_t leastbit = least_bit(leftbits);
+          compute_bit2idx(leastbit, i);
+          b = smallbin_at(ms, i);
+          p = b->fd;
+          assert(chunksize(p) == small_index2size(i));
+          unlink_first_small_chunk(ms, b, p, i);
+          rsize = small_index2size(i) - nb;
+          /* Fit here cannot be remainderless if 4byte sizes */
+          if (SIZE_T_SIZE != 4 && rsize < MIN_CHUNK_SIZE)
+            set_inuse_and_pinuse(ms, p, small_index2size(i));
+          else {
+            set_size_and_pinuse_of_inuse_chunk(ms, p, nb);
+            r = chunk_plus_offset(p, nb);
+            set_size_and_pinuse_of_free_chunk(r, rsize);
+            replace_dv(ms, r, rsize);
+          }
+          mem = chunk2mem(p);
+          check_malloced_chunk(ms, mem, nb);
+          goto postaction;
+        }
+        else if (ms->treemap != 0 && (mem = tmalloc_small(ms, nb)) != 0) {
+          check_malloced_chunk(ms, mem, nb);
+          goto postaction;
+        }
+      }
+    }
+    else if (bytes >= MAX_REQUEST)
+      nb = MAX_SIZE_T; /* Too big to allocate. Force failure (in sys alloc) */
+    else {
+      nb = pad_request(bytes);
+      if (ms->treemap != 0 && (mem = tmalloc_large(ms, nb)) != 0) {
+        check_malloced_chunk(ms, mem, nb);
+        goto postaction;
+      }
+    }
+    if (nb <= ms->dvsize) {
+      size_t rsize = ms->dvsize - nb;
+      mchunkptr p = ms->dv;
+      if (rsize >= MIN_CHUNK_SIZE) { /* split dv */
+        mchunkptr r = ms->dv = chunk_plus_offset(p, nb);
+        ms->dvsize = rsize;
+        set_size_and_pinuse_of_free_chunk(r, rsize);
+        set_size_and_pinuse_of_inuse_chunk(ms, p, nb);
+      }
+      else { /* exhaust dv */
+        size_t dvs = ms->dvsize;
+        ms->dvsize = 0;
+        ms->dv = 0;
+        set_inuse_and_pinuse(ms, p, dvs);
+      }
+      mem = chunk2mem(p);
+      check_malloced_chunk(ms, mem, nb);
+      goto postaction;
+    }
+    else if (nb < ms->topsize) { /* Split top */
+      size_t rsize = ms->topsize -= nb;
+      mchunkptr p = ms->top;
+      mchunkptr r = ms->top = chunk_plus_offset(p, nb);
+      r->head = rsize | PINUSE_BIT;
+      set_size_and_pinuse_of_inuse_chunk(ms, p, nb);
+      mem = chunk2mem(p);
+      check_top_chunk(ms, ms->top);
+      check_malloced_chunk(ms, mem, nb);
+      goto postaction;
+    }
+    mem = sys_alloc(ms, nb);
+  postaction:
+    POSTACTION(ms);
+    return mem;
+  }
+  return 0;
+}
+void mspace_free(mspace msp, void* mem) {
+  if (mem != 0) {
+    mchunkptr p  = mem2chunk(mem);
+#if FOOTERS
+    mstate fm = get_mstate_for(p);
+#else /* FOOTERS */
+    mstate fm = (mstate)msp;
+#endif /* FOOTERS */
+    if (!ok_magic(fm)) {
+      USAGE_ERROR_ACTION(fm, p);
+      return;
+    }
+    if (!PREACTION(fm)) {
+      check_inuse_chunk(fm, p);
+      if (RTCHECK(ok_address(fm, p) && ok_cinuse(p))) {
+        size_t psize = chunksize(p);
+        mchunkptr next = chunk_plus_offset(p, psize);
+        if (!pinuse(p)) {
+          size_t prevsize = p->prev_foot;
+          if ((prevsize & IS_MMAPPED_BIT) != 0) {
+            prevsize &= ~IS_MMAPPED_BIT;
+            psize += prevsize + MMAP_FOOT_PAD;
+            if (CALL_MUNMAP((char*)p - prevsize, psize) == 0)
+              fm->footprint -= psize;
+            goto postaction;
+          }
+          else {
+            mchunkptr prev = chunk_minus_offset(p, prevsize);
+            psize += prevsize;
+            p = prev;
+            if (RTCHECK(ok_address(fm, prev))) { /* consolidate backward */
+              if (p != fm->dv) {
+                unlink_chunk(fm, p, prevsize);
+              }
+              else if ((next->head & INUSE_BITS) == INUSE_BITS) {
+                fm->dvsize = psize;
+                set_free_with_pinuse(p, psize, next);
+                goto postaction;
+              }
+            }
+            else
+              goto erroraction;
+          }
+        }
+        if (RTCHECK(ok_next(p, next) && ok_pinuse(next))) {
+          if (!cinuse(next)) {  /* consolidate forward */
+            if (next == fm->top) {
+              size_t tsize = fm->topsize += psize;
+              fm->top = p;
+              p->head = tsize | PINUSE_BIT;
+              if (p == fm->dv) {
+                fm->dv = 0;
+                fm->dvsize = 0;
+              }
+              if (should_trim(fm, tsize))
+                sys_trim(fm, 0);
+              goto postaction;
+            }
+            else if (next == fm->dv) {
+              size_t dsize = fm->dvsize += psize;
+              fm->dv = p;
+              set_size_and_pinuse_of_free_chunk(p, dsize);
+              goto postaction;
+            }
+            else {
+              size_t nsize = chunksize(next);
+              psize += nsize;
+              unlink_chunk(fm, next, nsize);
+              set_size_and_pinuse_of_free_chunk(p, psize);
+              if (p == fm->dv) {
+                fm->dvsize = psize;
+                goto postaction;
+              }
+            }
+          }
+          else
+            set_free_with_pinuse(p, psize, next);
+          insert_chunk(fm, p, psize);
+          check_free_chunk(fm, p);
+          goto postaction;
+        }
+      }
+    erroraction:
+      USAGE_ERROR_ACTION(fm, p);
+    postaction:
+      POSTACTION(fm);
+    }
+  }
+}
+void* mspace_calloc(mspace msp, size_t n_elements, size_t elem_size) {
+  void* mem;
+  size_t req = 0;
+  mstate ms = (mstate)msp;
+  if (!ok_magic(ms)) {
+    USAGE_ERROR_ACTION(ms,ms);
+    return 0;
+  }
+  if (n_elements != 0) {
+    req = n_elements * elem_size;
+    if (((n_elements | elem_size) & ~(size_t)0xffff) &&
+        (req / n_elements != elem_size))
+      req = MAX_SIZE_T; /* force downstream failure on overflow */
+  }
+  mem = internal_malloc(ms, req);
+  if (mem != 0 && calloc_must_clear(mem2chunk(mem)))
+    memset(mem, 0, req);
+  return mem;
+}
+void* mspace_realloc(mspace msp, void* oldmem, size_t bytes) {
+  if (oldmem == 0)
+    return mspace_malloc(msp, bytes);
+#ifdef REALLOC_ZERO_BYTES_FREES
+  if (bytes == 0) {
+    mspace_free(msp, oldmem);
+    return 0;
+  }
+#endif /* REALLOC_ZERO_BYTES_FREES */
+  else {
+#if FOOTERS
+    mchunkptr p  = mem2chunk(oldmem);
+    mstate ms = get_mstate_for(p);
+#else /* FOOTERS */
+    mstate ms = (mstate)msp;
+#endif /* FOOTERS */
+    if (!ok_magic(ms)) {
+      USAGE_ERROR_ACTION(ms,ms);
+      return 0;
+    }
+    return internal_realloc(ms, oldmem, bytes);
+  }
+}
+void* mspace_memalign(mspace msp, size_t alignment, size_t bytes) {
+  mstate ms = (mstate)msp;
+  if (!ok_magic(ms)) {
+    USAGE_ERROR_ACTION(ms,ms);
+    return 0;
+  }
+  return internal_memalign(ms, alignment, bytes);
+}
+void** mspace_independent_calloc(mspace msp, size_t n_elements,
+                                 size_t elem_size, void* chunks[]) {
+  size_t sz = elem_size; /* serves as 1-element array */
+  mstate ms = (mstate)msp;
+  if (!ok_magic(ms)) {
+    USAGE_ERROR_ACTION(ms,ms);
+    return 0;
+  }
+  return ialloc(ms, n_elements, &sz, 3, chunks);
+}
+void** mspace_independent_comalloc(mspace msp, size_t n_elements,
+                                   size_t sizes[], void* chunks[]) {
+  mstate ms = (mstate)msp;
+  if (!ok_magic(ms)) {
+    USAGE_ERROR_ACTION(ms,ms);
+    return 0;
+  }
+  return ialloc(ms, n_elements, sizes, 0, chunks);
+}
+int mspace_trim(mspace msp, size_t pad) {
+  int result = 0;
+  mstate ms = (mstate)msp;
+  if (ok_magic(ms)) {
+    if (!PREACTION(ms)) {
+      result = sys_trim(ms, pad);
+      POSTACTION(ms);
+    }
+  }
+  else {
+    USAGE_ERROR_ACTION(ms,ms);
+  }
+  return result;
+}
+void mspace_malloc_stats(mspace msp) {
+  mstate ms = (mstate)msp;
+  if (ok_magic(ms)) {
+    internal_malloc_stats(ms);
+  }
+  else {
+    USAGE_ERROR_ACTION(ms,ms);
+  }
+}
+size_t mspace_footprint(mspace msp) {
+  size_t result;
+  mstate ms = (mstate)msp;
+  if (ok_magic(ms)) {
+    result = ms->footprint;
+  }
+  USAGE_ERROR_ACTION(ms,ms);
+  return result;
+}
+size_t mspace_max_footprint(mspace msp) {
+  size_t result;
+  mstate ms = (mstate)msp;
+  if (ok_magic(ms)) {
+    result = ms->max_footprint;
+  }
+  USAGE_ERROR_ACTION(ms,ms);
+  return result;
+}
+#if !NO_MALLINFO
+struct mallinfo mspace_mallinfo(mspace msp) {
+  mstate ms = (mstate)msp;
+  if (!ok_magic(ms)) {
+    USAGE_ERROR_ACTION(ms,ms);
+  }
+  return internal_mallinfo(ms);
+}
+#endif /* NO_MALLINFO */
+int mspace_mallopt(int param_number, int value) {
+  return change_mparam(param_number, value);
+}
+#endif /* MSPACES */
+/* -------------------- Alternative MORECORE functions ------------------- */
+/*
+  Guidelines for creating a custom version of MORECORE:
+  * For best performance, MORECORE should allocate in multiples of pagesize.
+  * MORECORE may allocate more memory than requested. (Or even less,
+      but this will usually result in a malloc failure.)
+  * MORECORE must not allocate memory when given argument zero, but
+      instead return one past the end address of memory from previous
+      nonzero call.
+  * For best performance, consecutive calls to MORECORE with positive
+      arguments should return increasing addresses, indicating that
+      space has been contiguously extended.
+  * Even though consecutive calls to MORECORE need not return contiguous
+      addresses, it must be OK for malloc'ed chunks to span multiple
+      regions in those cases where they do happen to be contiguous.
+  * MORECORE need not handle negative arguments -- it may instead
+      just return MFAIL when given negative arguments.
+      Negative arguments are always multiples of pagesize. MORECORE
+      must not misinterpret negative args as large positive unsigned
+      args. You can suppress all such calls from even occurring by defining
+      MORECORE_CANNOT_TRIM,
+  As an example alternative MORECORE, here is a custom allocator
+  kindly contributed for pre-OSX macOS.  It uses virtually but not
+  necessarily physically contiguous non-paged memory (locked in,
+  present and won't get swapped out).  You can use it by uncommenting
+  this section, adding some #includes, and setting up the appropriate
+  defines above:
+      #define MORECORE osMoreCore
+  There is also a shutdown routine that should somehow be called for
+  cleanup upon program exit.
+  #define MAX_POOL_ENTRIES 100
+  #define MINIMUM_MORECORE_SIZE  (64 * 1024U)
+  static int next_os_pool;
+  void *our_os_pools[MAX_POOL_ENTRIES];
+  void *osMoreCore(int size)
+  {
+    void *ptr = 0;
+    static void *sbrk_top = 0;
+    if (size > 0)
+    {
+      if (size < MINIMUM_MORECORE_SIZE)
+         size = MINIMUM_MORECORE_SIZE;
+      if (CurrentExecutionLevel() == kTaskLevel)
+         ptr = PoolAllocateResident(size + RM_PAGE_SIZE, 0);
+      if (ptr == 0)
+      {
+        return (void *) MFAIL;
+      }
+      // save ptrs so they can be freed during cleanup
+      our_os_pools[next_os_pool] = ptr;
+      next_os_pool++;
+      ptr = (void *) ((((size_t) ptr) + RM_PAGE_MASK) & ~RM_PAGE_MASK);
+      sbrk_top = (char *) ptr + size;
+      return ptr;
+    }
+    else if (size < 0)
+    {
+      // we don't currently support shrink behavior
+      return (void *) MFAIL;
+    }
+    else
+    {
+      return sbrk_top;
+    }
+  }
+  // cleanup any allocated memory pools
+  // called as last thing before shutting down driver
+  void osCleanupMem(void)
+  {
+    void **ptr;
+    for (ptr = our_os_pools; ptr < &our_os_pools[MAX_POOL_ENTRIES]; ptr++)
+      if (*ptr)
+      {
+         PoolDeallocate(*ptr);
+         *ptr = 0;
+      }
+  }
+*/
+/* -----------------------------------------------------------------------
+History:
+    V2.8.3 Thu Sep 22 11:16:32 2005  Doug Lea  (dl at gee)
+      * Add max_footprint functions
+      * Ensure all appropriate literals are size_t
+      * Fix conditional compilation problem for some #define settings
+      * Avoid concatenating segments with the one provided
+        in create_mspace_with_base
+      * Rename some variables to avoid compiler shadowing warnings
+      * Use explicit lock initialization.
+      * Better handling of sbrk interference.
+      * Simplify and fix segment insertion, trimming and mspace_destroy
+      * Reinstate REALLOC_ZERO_BYTES_FREES option from 2.7.x
+      * Thanks especially to Dennis Flanagan for help on these.
+    V2.8.2 Sun Jun 12 16:01:10 2005  Doug Lea  (dl at gee)
+      * Fix memalign brace error.
+    V2.8.1 Wed Jun  8 16:11:46 2005  Doug Lea  (dl at gee)
+      * Fix improper #endif nesting in C++
+      * Add explicit casts needed for C++
+    V2.8.0 Mon May 30 14:09:02 2005  Doug Lea  (dl at gee)
+      * Use trees for large bins
+      * Support mspaces
+      * Use segments to unify sbrk-based and mmap-based system allocation,
+        removing need for emulation on most platforms without sbrk.
+      * Default safety checks
+      * Optional footer checks. Thanks to William Robertson for the idea.
+      * Internal code refactoring
+      * Incorporate suggestions and platform-specific changes.
+        Thanks to Dennis Flanagan, Colin Plumb, Niall Douglas,
+        Aaron Bachmann,  Emery Berger, and others.
+      * Speed up non-fastbin processing enough to remove fastbins.
+      * Remove useless cfree() to avoid conflicts with other apps.
+      * Remove internal memcpy, memset. Compilers handle builtins better.
+      * Remove some options that no one ever used and rename others.
+    V2.7.2 Sat Aug 17 09:07:30 2002  Doug Lea  (dl at gee)
+      * Fix malloc_state bitmap array misdeclaration
+    V2.7.1 Thu Jul 25 10:58:03 2002  Doug Lea  (dl at gee)
+      * Allow tuning of FIRST_SORTED_BIN_SIZE
+      * Use PTR_UINT as type for all ptr->int casts. Thanks to John Belmonte.
+      * Better detection and support for non-contiguousness of MORECORE.
+        Thanks to Andreas Mueller, Conal Walsh, and Wolfram Gloger
+      * Bypass most of malloc if no frees. Thanks To Emery Berger.
+      * Fix freeing of old top non-contiguous chunk im sysmalloc.
+      * Raised default trim and map thresholds to 256K.
+      * Fix mmap-related #defines. Thanks to Lubos Lunak.
+      * Fix copy macros; added LACKS_FCNTL_H. Thanks to Neal Walfield.
+      * Branch-free bin calculation
+      * Default trim and mmap thresholds now 256K.
+    V2.7.0 Sun Mar 11 14:14:06 2001  Doug Lea  (dl at gee)
+      * Introduce independent_comalloc and independent_calloc.
+        Thanks to Michael Pachos for motivation and help.
+      * Make optional .h file available
+      * Allow > 2GB requests on 32bit systems.
+      * new WIN32 sbrk, mmap, munmap, lock code from <Walter@GeNeSys-e.de>.
+        Thanks also to Andreas Mueller <a.mueller at paradatec.de>,
+        and Anonymous.
+      * Allow override of MALLOC_ALIGNMENT (Thanks to Ruud Waij for
+        helping test this.)
+      * memalign: check alignment arg
+      * realloc: don't try to shift chunks backwards, since this
+        leads to  more fragmentation in some programs and doesn't
+        seem to help in any others.
+      * Collect all cases in malloc requiring system memory into sysmalloc
+      * Use mmap as backup to sbrk
+      * Place all internal state in malloc_state
+      * Introduce fastbins (although similar to 2.5.1)
+      * Many minor tunings and cosmetic improvements
+      * Introduce USE_PUBLIC_MALLOC_WRAPPERS, USE_MALLOC_LOCK
+      * Introduce MALLOC_FAILURE_ACTION, MORECORE_CONTIGUOUS
+        Thanks to Tony E. Bennett <tbennett@nvidia.com> and others.
+      * Include errno.h to support default failure action.
+    V2.6.6 Sun Dec  5 07:42:19 1999  Doug Lea  (dl at gee)
+      * return null for negative arguments
+      * Added Several WIN32 cleanups from Martin C. Fong <mcfong at yahoo.com>
+         * Add 'LACKS_SYS_PARAM_H' for those systems without 'sys/param.h'
+          (e.g. WIN32 platforms)
+         * Cleanup header file inclusion for WIN32 platforms
+         * Cleanup code to avoid Microsoft Visual C++ compiler complaints
+         * Add 'USE_DL_PREFIX' to quickly allow co-existence with existing
+           memory allocation routines
+         * Set 'malloc_getpagesize' for WIN32 platforms (needs more work)
+         * Use 'assert' rather than 'ASSERT' in WIN32 code to conform to
+           usage of 'assert' in non-WIN32 code
+         * Improve WIN32 'sbrk()' emulation's 'findRegion()' routine to
+           avoid infinite loop
+      * Always call 'fREe()' rather than 'free()'
+    V2.6.5 Wed Jun 17 15:57:31 1998  Doug Lea  (dl at gee)
+      * Fixed ordering problem with boundary-stamping
+    V2.6.3 Sun May 19 08:17:58 1996  Doug Lea  (dl at gee)
+      * Added pvalloc, as recommended by H.J. Liu
+      * Added 64bit pointer support mainly from Wolfram Gloger
+      * Added anonymously donated WIN32 sbrk emulation
+      * Malloc, calloc, getpagesize: add optimizations from Raymond Nijssen
+      * malloc_extend_top: fix mask error that caused wastage after
+        foreign sbrks
+      * Add linux mremap support code from HJ Liu
+    V2.6.2 Tue Dec  5 06:52:55 1995  Doug Lea  (dl at gee)
+      * Integrated most documentation with the code.
+      * Add support for mmap, with help from
+        Wolfram Gloger (Gloger@lrz.uni-muenchen.de).
+      * Use last_remainder in more cases.
+      * Pack bins using idea from  colin@nyx10.cs.du.edu
+      * Use ordered bins instead of best-fit threshhold
+      * Eliminate block-local decls to simplify tracing and debugging.
+      * Support another case of realloc via move into top
+      * Fix error occuring when initial sbrk_base not word-aligned.
+      * Rely on page size for units instead of SBRK_UNIT to
+        avoid surprises about sbrk alignment conventions.
+      * Add mallinfo, mallopt. Thanks to Raymond Nijssen
+        (raymond@es.ele.tue.nl) for the suggestion.
+      * Add `pad' argument to malloc_trim and top_pad mallopt parameter.
+      * More precautions for cases where other routines call sbrk,
+        courtesy of Wolfram Gloger (Gloger@lrz.uni-muenchen.de).
+      * Added macros etc., allowing use in linux libc from
+        H.J. Lu (hjl@gnu.ai.mit.edu)
+      * Inverted this history list
+    V2.6.1 Sat Dec  2 14:10:57 1995  Doug Lea  (dl at gee)
+      * Re-tuned and fixed to behave more nicely with V2.6.0 changes.
+      * Removed all preallocation code since under current scheme
+        the work required to undo bad preallocations exceeds
+        the work saved in good cases for most test programs.
+      * No longer use return list or unconsolidated bins since
+        no scheme using them consistently outperforms those that don't
+        given above changes.
+      * Use best fit for very large chunks to prevent some worst-cases.
+      * Added some support for debugging
+    V2.6.0 Sat Nov  4 07:05:23 1995  Doug Lea  (dl at gee)
+      * Removed footers when chunks are in use. Thanks to
+        Paul Wilson (wilson@cs.texas.edu) for the suggestion.
+    V2.5.4 Wed Nov  1 07:54:51 1995  Doug Lea  (dl at gee)
+      * Added malloc_trim, with help from Wolfram Gloger
+        (wmglo@Dent.MED.Uni-Muenchen.DE).
+    V2.5.3 Tue Apr 26 10:16:01 1994  Doug Lea  (dl at g)
+    V2.5.2 Tue Apr  5 16:20:40 1994  Doug Lea  (dl at g)
+      * realloc: try to expand in both directions
+      * malloc: swap order of clean-bin strategy;
+      * realloc: only conditionally expand backwards
+      * Try not to scavenge used bins
+      * Use bin counts as a guide to preallocation
+      * Occasionally bin return list chunks in first scan
+      * Add a few optimizations from colin@nyx10.cs.du.edu
+    V2.5.1 Sat Aug 14 15:40:43 1993  Doug Lea  (dl at g)
+      * faster bin computation & slightly different binning
+      * merged all consolidations to one part of malloc proper
+         (eliminating old malloc_find_space & malloc_clean_bin)
+      * Scan 2 returns chunks (not just 1)
+      * Propagate failure in realloc if malloc returns 0
+      * Add stuff to allow compilation on non-ANSI compilers
+          from kpv@research.att.com
+    V2.5 Sat Aug  7 07:41:59 1993  Doug Lea  (dl at g.oswego.edu)
+      * removed potential for odd address access in prev_chunk
+      * removed dependency on getpagesize.h
+      * misc cosmetics and a bit more internal documentation
+      * anticosmetics: mangled names in macros to evade debugger strangeness
+      * tested on sparc, hp-700, dec-mips, rs6000
+          with gcc & native cc (hp, dec only) allowing
+          Detlefs & Zorn comparison study (in SIGPLAN Notices.)
+    Trial version Fri Aug 28 13:14:29 1992  Doug Lea  (dl at g.oswego.edu)
+      * Based loosely on libg++-1.2X malloc. (It retains some of the overall
+         structure of old version,  but most details differ.)
+*/
+/** @}
+ */

 /tags/0.2.0.2/uspace/libc/arch/ia32/include/ddi.h
 ,0 → 1,76
+/*
+ * Copyright (C) 2006 Ondrej Palkovsky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/** @file
+ * @ingroup libcia32, libcamd64
+ */
+#ifndef __ia32_libc_DDI_H_
+#define __ia32_libc_DDI_H_
+static inline void outb(int16_t port, uint8_t b)
+{
+    asm volatile ("outb %0, %1\n" :: "a" (b), "d" (port));
+}
+static inline void outw(int16_t port, int16_t w)
+{
+    asm volatile ("outw %0, %1\n" :: "a" (w), "d" (port));
+}
+static inline void outl(int16_t port, uint32_t l)
+{
+    asm volatile ("outl %0, %1\n" :: "a" (l), "d" (port));
+}
+static inline uint8_t inb(int16_t port)
+{
+    uint8_t val;
+    asm volatile ("inb %1, %0 \n" : "=a" (val) : "d"(port));
+    return val;
+}
+static inline int16_t inw(int16_t port)
+{
+    int16_t val;
+    asm volatile ("inw %1, %0 \n" : "=a" (val) : "d"(port));
+    return val;
+}
+static inline uint32_t inl(int16_t port)
+{
+    uint32_t val;
+    asm volatile ("inl %1, %0 \n" : "=a" (val) : "d"(port));
+    return val;
+}
+#endif

 /tags/0.2.0.2/uspace/libc/arch/ia32/include/psthread.h
 ,0 → 1,67
+/*
+ * Copyright (C) 2006 Ondrej Palkovsky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup libcia32
+ * @{
+ */
+/** @file
+ */
+#ifndef __LIBC__ia32PSTHREAD_H__
+#define __LIBC__ia32PSTHREAD_H__
+#include <types.h>
+/* According to ABI the stack MUST be aligned on
+ * 16-byte boundary. If it is not, the va_arg calling will
+ * panic sooner or later
+ */
+#define SP_DELTA     (12)
+/* We include only registers that must be preserved
+ * during function call
+ */
+typedef struct {
+    uint32_t sp;
+    uint32_t pc;
+    uint32_t ebx;
+    uint32_t esi;
+    uint32_t edi;
+    uint32_t ebp;
+    uint32_t tls;
+} context_t;
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/uspace/libc/arch/ia32/include/atomic.h
 ,0 → 1,81
+/*
+ * Copyright (C) 2001-2004 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup libcia32
+ * @{
+ */
+/** @file
+ */
+#ifndef __ia32_ATOMIC_H__
+#define __ia32_ATOMIC_H__
+static inline void atomic_inc(atomic_t *val) {
+    __asm__ volatile ("lock incl %0\n" : "=m" (val->count));
+}
+static inline void atomic_dec(atomic_t *val) {
+    __asm__ volatile ("lock decl %0\n" : "=m" (val->count));
+}
+static inline long atomic_postinc(atomic_t *val)
+{
+    long r;
+    __asm__ volatile (
+        "movl $1, %0\n"
+        "lock xaddl %0, %1\n"
+        : "=r" (r), "=m" (val->count)
+    );
+    return r;
+}
+static inline long atomic_postdec(atomic_t *val)
+{
+    long r;
+    __asm__ volatile (
+        "movl $-1, %0\n"
+        "lock xaddl %0, %1\n"
+        : "=r" (r), "=m" (val->count)
+    );
+    return r;
+}
+#define atomic_preinc(val) (atomic_postinc(val)+1)
+#define atomic_predec(val) (atomic_postdec(val)-1)
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/uspace/libc/arch/ia32/include/endian.h
 ,0 → 1,52
+/*
+ * Copyright (C) 2006 Josef Cejka
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup libcia32
+ * @{
+ */
+/** @file
+ */
+#ifndef __ia32_ENDIAN_H__
+#define __ia32_ENDIAN_H__
+#ifndef __LIBC__ENDIAN_H__
+# error "Never use <libarch/endian.h> directly - use <endian.h> instead."
+#endif
+#define __BYTE_ORDER __LITTLE_ENDIAN
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/uspace/libc/arch/ia32/include/stackarg.h
 ,0 → 1,70
+/*
+ * Copyright (C) 2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup libcia32
+ * @{
+ */
+/** @file
+ */
+/*
+ * Variable argument list manipulation macros
+ * for architectures using stack to pass arguments.
+ */
+#ifndef __LIBC_STACKARG_H__
+#define __LIBC_STACKARG_H__
+#include <types.h>
+/* dont allow to define it second time in stdarg.h */
+#define __VARARGS_DEFINED
+typedef struct va_list {
+    int pos;
+    uint8_t *last;
+} va_list;
+#define va_start(ap, lst) \
+    (ap).pos = sizeof(lst);             \
+    (ap).last = (uint8_t *) &(lst)
+#define va_arg(ap, type)        \
+    (*((type *)((ap).last + ((ap).pos  += sizeof(type) ) - sizeof(type))))
+#define va_end(ap)
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/uspace/libc/arch/ia32/include/limits.h
 ,0 → 1,50
+/*
+ * Copyright (C) 2006 Josef Cejka
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup libcia32
+ * @{
+ */
+/** @file
+ */
+#ifndef __ia32__LIMITS_H__
+#define __ia32__LIMITS_H__
+# define LONG_MIN MIN_INT32
+# define LONG_MAX MAX_INT32
+# define ULONG_MIN MIN_UINT32
+# define ULONG_MAX MAX_UINT32
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/uspace/libc/arch/ia32/include/types.h
 ,0 → 1,59
+/*
+ * Copyright (C) 2005 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup libcia32
+ * @{
+ */
+/** @file
+ */
+#ifndef __LIBC__TYPES_H__
+#define __LIBC__TYPES_H__
+typedef unsigned int sysarg_t;
+typedef unsigned int size_t;
+typedef signed int ssize_t;
+typedef ssize_t off_t;
+typedef char int8_t;
+typedef short int int16_t;
+typedef int int32_t;
+typedef long long int int64_t;
+typedef unsigned char uint8_t;
+typedef unsigned short int uint16_t;
+typedef unsigned int uint32_t;
+typedef unsigned long long int uint64_t;
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/uspace/libc/arch/ia32/include/thread.h
 ,0 → 1,64
+/*
+ * Copyright (C) 2006 Ondrej Palkovsky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup libcia32
+ * @{
+ */
+/** @file
+ */
+#ifndef __LIBC__ia32THREAD_H__
+#define __LIBC__ia32THREAD_H__
+#include <libc.h>
+typedef struct {
+    void *self;
+    void *pst_data;
+} tcb_t;
+static inline void __tcb_set(tcb_t *tcb)
+{
+    __SYSCALL1(SYS_TLS_SET, (sysarg_t) tcb);
+}
+static inline tcb_t * __tcb_get(void)
+{
+    void * retval;
+    __asm__ ("movl %%gs:0, %0" : "=r"(retval));
+    return retval;
+}
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/uspace/libc/arch/ia32/src/syscall.c
 ,0 → 1,60
+/*
+ * Copyright (C) 2005 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup libcia32 ia32
+ * @brief   ia32 architecture dependent parts of libc
+ * @ingroup lc
+ * @{
+ */
+/** @file
+ */
+#include <thread.h>
+#include <libc.h>
+sysarg_t __syscall(const sysarg_t p1, const sysarg_t p2, const sysarg_t p3,
+           const sysarg_t p4, const syscall_t id)
+{
+    sysarg_t ret;
+    asm volatile (
+        "int $0x30\n"
+        : "=a" (ret)
+        : "a" (p1),
+          "c" (p2),
+          "d" (p3),
+          "S" (p4),
+          "D" (id)
+    );
+    return ret;
+}
+/** @}
+ */

 /tags/0.2.0.2/uspace/libc/arch/ia32/src/psthread.S
 ,0 → 1,84
+#
+# Copyright (C) 2001-2004 Jakub Jermar
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# - Redistributions of source code must retain the above copyright
+#   notice, this list of conditions and the following disclaimer.
+# - Redistributions in binary form must reproduce the above copyright
+#   notice, this list of conditions and the following disclaimer in the
+#   documentation and/or other materials provided with the distribution.
+# - The name of the author may not be used to endorse or promote products
+#   derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+.text
+.global context_save
+.global context_restore
+## Save current CPU context
+#
+# Save CPU context to the context_t variable
+# pointed by the 1st argument. Returns 1 in EAX.
+#
+context_save:
+    movl 0(%esp),%eax   # the caller's return %eip
+    movl 4(%esp),%edx   # address of the kernel_context variable to save context to
+    movl %esp,0(%edx)   # %esp -> ctx->sp
+    movl %eax,4(%edx)   # %eip -> ctx->pc
+    movl %ebx,8(%edx)   # %ebx -> ctx->ebx
+    movl %esi,12(%edx)  # %esi -> ctx->esi
+    movl %edi,16(%edx)  # %edi -> ctx->edi
+    movl %ebp,20(%edx)  # %ebp -> ctx->ebp
+    # Save TLS
+    movl %gs:0, %eax
+    movl %eax, 24(%edx)     # tls -> ctx->tls
+    xorl %eax,%eax      # context_save returns 1
+    incl %eax
+    ret
+## Restore saved CPU context
+#
+# Restore CPU context from context_t variable
+# pointed by the 1st argument. Returns 0 in EAX.
+#
+context_restore:
+    movl 4(%esp),%eax   # address of the kernel_context variable to restore context from
+    movl 0(%eax),%esp   # ctx->sp -> %esp
+    movl 4(%eax),%edx   # ctx->pc -> %edx
+    movl 8(%eax),%ebx   # ctx->ebx -> %ebx
+    movl 12(%eax),%esi  # ctx->esi -> %esi
+    movl 16(%eax),%edi  # ctx->edi -> %edi
+    movl 20(%eax),%ebp  # ctx->ebp -> %ebp
+    movl %edx,0(%esp)   # ctx->pc -> saver's return %eip
+    # Set thread local storage
+    pushl %edi
+    movl 24(%eax), %eax   # Set arg1 to TLS addr
+    movl $1, %edi         # Syscall 1
+    int $0x30
+    popl %edi
+    xorl %eax,%eax      # context_restore returns 0
+    ret

 /tags/0.2.0.2/uspace/libc/arch/ia32/src/entry.s
 ,0 → 1,60
+#
+# Copyright (C) 2005 Martin Decky
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# - Redistributions of source code must retain the above copyright
+#   notice, this list of conditions and the following disclaimer.
+# - Redistributions in binary form must reproduce the above copyright
+#   notice, this list of conditions and the following disclaimer in the
+#   documentation and/or other materials provided with the distribution.
+# - The name of the author may not be used to endorse or promote products
+#   derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+.section .init, "ax"
+.org 0
+.globl __entry
+.globl __entry_driver
+## User-space task entry point
+#
+#
+__entry:
+    mov %ss, %ax
+    mov %ax, %ds
+    mov %ax, %es
+    mov %ax, %fs
+    # Do not set %gs, it contains descriptor that can see TLS
+    call __main
+    call __io_init
+    call main
+    call __exit
+__entry_driver:
+    mov %ss, %ax
+    mov %ax, %ds
+    mov %ax, %es
+    mov %ax, %fs
+    # Do not set %gs, it contains descriptor that can see TLS
+    call __main
+    call main
+    call __exit

/tags/0.2.0.2/uspace/libc/arch/ia32/src/thread.c
0,0 → 1,0
link ../../amd64/src/thread.c
Property changes:
Added: svn:special
+*
\ No newline at end of property

 /tags/0.2.0.2/uspace/libc/arch/ia32/src/thread_entry.s
 ,0 → 1,53
+#
+# Copyright (C) 2006 Jakub Jermar
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# - Redistributions of source code must retain the above copyright
+#   notice, this list of conditions and the following disclaimer.
+# - Redistributions in binary form must reproduce the above copyright
+#   notice, this list of conditions and the following disclaimer in the
+#   documentation and/or other materials provided with the distribution.
+# - The name of the author may not be used to endorse or promote products
+#   derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+.text
+.globl __thread_entry
+## User-space thread entry point for all but the first threads.
+#
+#
+__thread_entry:
+    mov %ss, %dx
+    mov %dx, %ds
+    mov %dx, %es
+    mov %dx, %fs
+    # Do not set %gs, it contains descriptor that can see TLS
+    #
+    # EAX contains address of uarg.
+    #
+    pushl %eax
+    call __thread_main
+    #
+    # Not reached.
+    #
+.end __thread_entry

 /tags/0.2.0.2/uspace/libc/arch/ia32/Makefile.inc
 ,0 → 1,42
+#
+# Copyright (C) 2005 Martin Decky
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# - Redistributions of source code must retain the above copyright
+#   notice, this list of conditions and the following disclaimer.
+# - Redistributions in binary form must reproduce the above copyright
+#   notice, this list of conditions and the following disclaimer in the
+#   documentation and/or other materials provided with the distribution.
+# - The name of the author may not be used to endorse or promote products
+#   derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+## Toolchain configuration
+#
+TARGET = i686-pc-linux-gnu
+TOOLCHAIN_DIR = /usr/local/i686/bin
+ARCH_SOURCES += arch/$(ARCH)/src/syscall.c \
+        arch/$(ARCH)/src/psthread.S \
+        arch/$(ARCH)/src/thread.c
+LFLAGS += -N
+BFD_NAME = elf32-i386
+BFD_ARCH = i386

 /tags/0.2.0.2/uspace/libc/arch/ia32/_link.ld.in
 ,0 → 1,45
+STARTUP(../libc/arch/ARCH/src/entry.o)
+ENTRY(__entry)
+PHDRS {
+        text PT_LOAD FLAGS(5);
+    data PT_LOAD FLAGS(6);
+}
+SECTIONS {
+    . = 0x1000;
+    .init ALIGN(0x1000) : SUBALIGN(0x1000) {
+        *(.init);
+    } :text
+    .text : {
+        *(.text);
+                *(.rodata*);
+    } :text
+    .data ALIGN(0x1000) : SUBALIGN(0x1000) {
+        *(.data);
+    } :data
+    .tdata : {
+        _tdata_start = .;
+        *(.tdata);
+        _tdata_end = .;
+    } :data
+    .tbss : {
+        _tbss_start = .;
+        *(.tbss);
+        _tbss_end = .;
+    } :data
+    .bss : {
+                *(COMMON);
+                *(.bss);
+    } :data
+    . = ALIGN(0x1000);
+    _heap = .;
+    /DISCARD/ : {
+        *(*);
+    }
+}

/tags/0.2.0.2/uspace/libc/arch/amd64/include/ddi.h
0,0 → 1,0
link ../../ia32/include/ddi.h
Property changes:
Added: svn:special
+*
\ No newline at end of property

 /tags/0.2.0.2/uspace/libc/arch/amd64/include/context_offset.h
 ,0 → 1,16
+/* This file is automatically generated by gencontext.c. */
+#define OFFSET_SP  0x0
+#define OFFSET_PC  0x8
+#define OFFSET_RBX 0x10
+#define OFFSET_RBP 0x18
+#define OFFSET_R12 0x20
+#define OFFSET_R13 0x28
+#define OFFSET_R14 0x30
+#define OFFSET_R15 0x38
+#define OFFSET_TLS 0x40
+ /** @}
+ */

 /tags/0.2.0.2/uspace/libc/arch/amd64/include/psthread.h
 ,0 → 1,70
+/*
+ * Copyright (C) 2006 Ondrej Palkovsky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup libcamd64
+ * @{
+ */
+/** @file
+ */
+#ifndef __LIBC__amd64PSTHREAD_H__
+#define __LIBC__amd64PSTHREAD_H__
+#include <types.h>
+/* According to ABI the stack MUST be aligned on
+ * 16-byte boundary. If it is not, the va_arg calling will
+ * panic sooner or later
+ */
+#define SP_DELTA     16
+/* We include only registers that must be preserved
+ * during function call
+ */
+typedef struct {
+    uint64_t sp;
+    uint64_t pc;
+    uint64_t rbx;
+    uint64_t rbp;
+    uint64_t r12;
+    uint64_t r13;
+    uint64_t r14;
+    uint64_t r15;
+    uint64_t tls;
+} context_t;
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/uspace/libc/arch/amd64/include/atomic.h
 ,0 → 1,83
+/*
+ * Copyright (C) 2001-2004 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup libcamd64 amd64
+ * @ingroup lc
+ * @brief   amd64 architecture dependent parts of libc
+ * @{
+ */
+/** @file
+ */
+#ifndef __amd64_ATOMIC_H__
+#define __amd64_ATOMIC_H__
+static inline void atomic_inc(atomic_t *val) {
+    __asm__ volatile ("lock incq %0\n" : "=m" (val->count));
+}
+static inline void atomic_dec(atomic_t *val) {
+    __asm__ volatile ("lock decq %0\n" : "=m" (val->count));
+}
+static inline long atomic_postinc(atomic_t *val)
+{
+    long r;
+    __asm__ volatile (
+        "movq $1, %0\n"
+        "lock xaddq %0, %1\n"
+        : "=r" (r), "=m" (val->count)
+    );
+    return r;
+}
+static inline long atomic_postdec(atomic_t *val)
+{
+    long r;
+    __asm__ volatile (
+        "movq $-1, %0\n"
+        "lock xaddq %0, %1\n"
+        : "=r" (r), "=m" (val->count)
+    );
+    return r;
+}
+#define atomic_preinc(val) (atomic_postinc(val)+1)
+#define atomic_predec(val) (atomic_postdec(val)-1)
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/uspace/libc/arch/amd64/include/endian.h
 ,0 → 1,51
+/*
+ * Copyright (C) 2006 Josef Cejka
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup libcamd64
+ * @{
+ */
+/** @file
+ */
+#ifndef __amd64_ENDIAN_H__
+#define __amd64_ENDIAN_H__
+#ifndef __LIBC__ENDIAN_H__
+# error "Never use <libarch/endian.h> directly - use <endian.h> instead."
+#endif
+#define __BYTE_ORDER __LITTLE_ENDIAN
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/uspace/libc/arch/amd64/include/stackarg.h
 ,0 → 1,44
+/*
+ * Copyright (C) 2006 Josef Cejka
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup libcamd64
+ * @{
+ */
+/** @file
+ */
+#ifndef __LIBC__STACKARG_H__
+#define __LIBC__STACKARG_H__
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/uspace/libc/arch/amd64/include/limits.h
 ,0 → 1,51
+/*
+ * Copyright (C) 2006 Josef Cejka
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup libcamd64
+ * @{
+ */
+/** @file
+ */
+#ifndef __amd64__LIMITS_H__
+#define __amd64__LIMITS_H__
+# define LONG_MIN MIN_INT64
+# define LONG_MAX MAX_INT64
+# define ULONG_MIN MIN_UINT64
+# define ULONG_MAX MAX_UINT64
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/uspace/libc/arch/amd64/include/types.h
 ,0 → 1,59
+/*
+ * Copyright (C) 2006 Ondrej Palkovsky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup libcamd64
+ * @{
+ */
+/** @file
+ */
+#ifndef __LIBC__TYPES_H__
+#define __LIBC__TYPES_H__
+typedef unsigned long long sysarg_t;
+typedef unsigned long size_t;
+typedef signed long ssize_t;
+typedef ssize_t off_t;
+typedef char int8_t;
+typedef short int int16_t;
+typedef int int32_t;
+typedef long long int int64_t;
+typedef unsigned char uint8_t;
+typedef unsigned short int uint16_t;
+typedef unsigned int uint32_t;
+typedef unsigned long long int uint64_t;
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/uspace/libc/arch/amd64/include/thread.h
 ,0 → 1,64
+/*
+ * Copyright (C) 2006 Ondrej Palkovsky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup libcamd64
+ * @{
+ */
+/** @file
+ */
+#ifndef __LIBC__amd64THREAD_H__
+#define __LIBC__amd64THREAD_H__
+#include <libc.h>
+typedef struct {
+    void *self;
+    void *pst_data;
+} tcb_t;
+static inline void __tcb_set(tcb_t *tcb)
+{
+    __SYSCALL1(SYS_TLS_SET, (sysarg_t) tcb);
+}
+static inline tcb_t * __tcb_get(void)
+{
+    void * retval;
+    __asm__ ("movq %%fs:0, %0" : "=r"(retval));
+    return retval;
+}
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/uspace/libc/arch/amd64/src/thread.c
 ,0 → 1,67
+/*
+ * Copyright (C) 2006 Ondrej Palkovsky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup libcamd64 amd64
+ * @ingroup lc
+ * @{
+ */
+/** @file
+  * @ingroup libcia32
+ */
+#include <thread.h>
+#include <malloc.h>
+/** Allocate TLS & TCB for initial module threads
+ *
+ * @param data Start of data section
+ * @return pointer to tcb_t structure
+ */
+tcb_t * __alloc_tls(void **data, size_t size)
+{
+    tcb_t *tcb;
+    *data = malloc(sizeof(tcb_t) + size);
+    tcb = (tcb_t *) (*data + size);
+    tcb->self = tcb;
+    return tcb;
+}
+void __free_tls_arch(tcb_t *tcb, size_t size)
+{
+    void *start = ((void *)tcb) - size;
+    free(start);
+}
+ /** @}
+ */

 /tags/0.2.0.2/uspace/libc/arch/amd64/src/entry.s
 ,0 → 1,48
+#
+# Copyright (C) 2006 Ondrej Palkovsky
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# - Redistributions of source code must retain the above copyright
+#   notice, this list of conditions and the following disclaimer.
+# - Redistributions in binary form must reproduce the above copyright
+#   notice, this list of conditions and the following disclaimer in the
+#   documentation and/or other materials provided with the distribution.
+# - The name of the author may not be used to endorse or promote products
+#   derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+.section .init, "ax"
+.org 0
+.globl __entry
+.globl __entry_driver
+## User-space task entry point
+#
+#
+__entry:
+    call __main
+    call __io_init
+    call main
+    call __exit
+__entry_driver:
+    call __main
+    call main
+    call __exit

 /tags/0.2.0.2/uspace/libc/arch/amd64/src/thread_entry.s
 ,0 → 1,43
+#
+# Copyright (C) 2006 Jakub Jermar
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# - Redistributions of source code must retain the above copyright
+#   notice, this list of conditions and the following disclaimer.
+# - Redistributions in binary form must reproduce the above copyright
+#   notice, this list of conditions and the following disclaimer in the
+#   documentation and/or other materials provided with the distribution.
+# - The name of the author may not be used to endorse or promote products
+#   derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+.text
+.globl __thread_entry
+## User-space thread entry point for all but the first threads.
+#
+#
+__thread_entry:
+    #
+    # RAX contains address of uarg
+    #
+    movq %rax, %rdi
+    call __thread_main
+.end __thread_entry

 /tags/0.2.0.2/uspace/libc/arch/amd64/src/psthread.S
 ,0 → 1,87
+#
+# Copyright (C) 2001-2004 Jakub Jermar
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# - Redistributions of source code must retain the above copyright
+#   notice, this list of conditions and the following disclaimer.
+# - Redistributions in binary form must reproduce the above copyright
+#   notice, this list of conditions and the following disclaimer in the
+#   documentation and/or other materials provided with the distribution.
+# - The name of the author may not be used to endorse or promote products
+#   derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+.text
+.global context_save
+.global context_restore
+#include <libarch/context_offset.h>
+## Save current CPU context
+#
+# Save CPU context to context_t variable
+# pointed by the 1st argument. Returns 1 in EAX.
+#
+context_save:
+    movq (%rsp), %rdx     # the caller's return %eip
+    # In %edi is passed 1st argument
+    movq %rdx, OFFSET_PC(%rdi)
+    movq %rsp, OFFSET_SP(%rdi)
+    movq %rbx, OFFSET_RBX(%rdi)
+    movq %rbp, OFFSET_RBP(%rdi)
+    movq %r12, OFFSET_R12(%rdi)
+    movq %r13, OFFSET_R13(%rdi)
+    movq %r14, OFFSET_R14(%rdi)
+    movq %r15, OFFSET_R15(%rdi)
+    # Save TLS
+    movq %fs:0, %rax
+    movq %rax, OFFSET_TLS(%rdi)
+    xorq %rax,%rax      # context_save returns 1
+    incq %rax
+    ret
+## Restore current CPU context
+#
+# Restore CPU context from context_t variable
+# pointed by the 1st argument. Returns 0 in EAX.
+#
+context_restore:
+    movq OFFSET_R15(%rdi), %r15
+    movq OFFSET_R14(%rdi), %r14
+    movq OFFSET_R13(%rdi), %r13
+    movq OFFSET_R12(%rdi), %r12
+    movq OFFSET_RBP(%rdi), %rbp
+    movq OFFSET_RBX(%rdi), %rbx
+    movq OFFSET_SP(%rdi), %rsp   # ctx->sp -> %rsp
+    movq OFFSET_PC(%rdi), %rdx
+    movq %rdx,(%rsp)
+    # Set thread local storage
+    movq OFFSET_TLS(%rdi), %rdi   # Set arg1 to TLS addr
+    movq $1, %r8
+    syscall
+    xorq %rax,%rax      # context_restore returns 0
+    ret

 /tags/0.2.0.2/uspace/libc/arch/amd64/src/syscall.S
 ,0 → 1,40
+#
+# Copyright (C) 2006 Ondrej Palkovsky
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# - Redistributions of source code must retain the above copyright
+#   notice, this list of conditions and the following disclaimer.
+# - Redistributions in binary form must reproduce the above copyright
+#   notice, this list of conditions and the following disclaimer in the
+#   documentation and/or other materials provided with the distribution.
+# - The name of the author may not be used to endorse or promote products
+#   derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+.text
+.globl __syscall
+__syscall:
+    # rcx gets rewritten on syscall
+    movq %rcx, %r9
+    syscall
+    ret
+.end __syscall

 /tags/0.2.0.2/uspace/libc/arch/amd64/Makefile.inc
 ,0 → 1,42
+#
+# Copyright (C) 2005 Martin Decky
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# - Redistributions of source code must retain the above copyright
+#   notice, this list of conditions and the following disclaimer.
+# - Redistributions in binary form must reproduce the above copyright
+#   notice, this list of conditions and the following disclaimer in the
+#   documentation and/or other materials provided with the distribution.
+# - The name of the author may not be used to endorse or promote products
+#   derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+## Toolchain configuration
+#
+TARGET = amd64-linux-gnu
+TOOLCHAIN_DIR = /usr/local/amd64/bin
+ARCH_SOURCES += arch/$(ARCH)/src/syscall.S \
+        arch/$(ARCH)/src/psthread.S \
+        arch/$(ARCH)/src/thread.c
+LFLAGS += -N
+BFD_NAME = elf64-x86-64
+BFD_ARCH = i386:x86-64

 /tags/0.2.0.2/uspace/libc/arch/amd64/_link.ld.in
 ,0 → 1,46
+STARTUP(../libc/arch/ARCH/src/entry.o)
+ENTRY(__entry)
+PHDRS {
+    text PT_LOAD FLAGS(5);
+    data PT_LOAD FLAGS(6);
+}
+SECTIONS {
+    . = 0x1000;
+    .init ALIGN(0x1000) : SUBALIGN(0x1000) {
+        *(.init);
+    } :text
+    .text : {
+        *(.text);
+        *(.rodata*);
+    } :text
+    .data ALIGN(0x1000) : SUBALIGN(0x1000) {
+        *(.data);
+    } :data
+    .tdata : {
+        _tdata_start = .;
+        *(.tdata);
+        _tdata_end = .;
+    } :data
+    .tbss : {
+        _tbss_start = .;
+        *(.tbss);
+        _tbss_end = .;
+    } :data
+    .bss : {
+        *(COMMON);
+        *(.bss);
+    } :data
+    . = ALIGN(0x1000);
+    _heap = .;
+    /DISCARD/ : {
+        *(*);
+    }
+}

 /tags/0.2.0.2/uspace/libc/arch/ia64/Makefile.inc
 ,0 → 1,43
+#
+# Copyright (C) 2005 Martin Decky
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# - Redistributions of source code must retain the above copyright
+#   notice, this list of conditions and the following disclaimer.
+# - Redistributions in binary form must reproduce the above copyright
+#   notice, this list of conditions and the following disclaimer in the
+#   documentation and/or other materials provided with the distribution.
+# - The name of the author may not be used to endorse or promote products
+#   derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+## Toolchain configuration
+#
+TARGET = ia64-pc-linux-gnu
+TOOLCHAIN_DIR = /usr/local/ia64/bin
+CFLAGS += -fno-unwind-tables -DMALLOC_ALIGNMENT_16
+LFLAGS += -N ../softint/libsoftint.a
+AFLAGS +=
+ARCH_SOURCES += arch/$(ARCH)/src/syscall.S \
+        arch/$(ARCH)/src/psthread.S \
+        arch/$(ARCH)/src/thread.c
+BFD_NAME = elf64-little
+BFD_ARCH = ia64-elf64

 /tags/0.2.0.2/uspace/libc/arch/ia64/include/psthread.h
 ,0 → 1,140
+/*
+ * Copyright (C) 2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup libcia64
+ * @{
+ */
+/** @file
+ */
+#ifndef __LIBC__ia64PSTHREAD_H__
+#define __LIBC__ia64PSTHREAD_H__
+#include <types.h>
+#include <align.h>
+#include <libarch/stack.h>
+#include <arch/types.h>
+/*
+ * context_save() and context_restore() are both leaf procedures.
+ * No need to allocate scratch area.
+ */
+#define SP_DELTA    (0+ALIGN_UP(STACK_ITEM_SIZE, STACK_ALIGNMENT))
+#define PFM_MASK        (~0x3fffffffff)
+#define PSTHREAD_INITIAL_STACK_PAGES_NO 2
+/* Stack is divided into two equal parts (for memory stack and register stack). */
+#define PSTHREAD_INITIAL_STACK_DIVISION 2
+#ifdef context_set
+#undef context_set
+#endif
+#define context_set(c, _pc, stack, size, tls)                               \
+    do {                                                \
+        (c)->pc = (uint64_t) _pc;                               \
+        (c)->bsp = ((uint64_t) stack) + size / PSTHREAD_INITIAL_STACK_DIVISION;                             \
+        (c)->ar_pfs &= PFM_MASK;                                \
+        (c)->sp = ((uint64_t) stack) + ALIGN_UP((size / PSTHREAD_INITIAL_STACK_DIVISION), STACK_ALIGNMENT) - SP_DELTA;      \
+        (c)->tp = (uint64_t) tls;                               \
+    } while (0);
+/*
+ * Only save registers that must be preserved across
+ * function calls.
+ */
+typedef struct context {
+    /*
+     * Application registers
+     */
+    uint64_t ar_pfs;
+    uint64_t ar_unat_caller;
+    uint64_t ar_unat_callee;
+    uint64_t ar_rsc;
+    uint64_t bsp;       /* ar_bsp */
+    uint64_t ar_rnat;
+    uint64_t ar_lc;
+    /*
+     * General registers
+     */
+    uint64_t r1;
+    uint64_t r4;
+    uint64_t r5;
+    uint64_t r6;
+    uint64_t r7;
+    uint64_t sp;        /* r12 */
+    uint64_t tp;        /* r13 */
+    /*
+     * Branch registers
+     */
+    uint64_t pc;        /* b0 */
+    uint64_t b1;
+    uint64_t b2;
+    uint64_t b3;
+    uint64_t b4;
+    uint64_t b5;
+    /*
+     * Predicate registers
+     */
+    uint64_t pr;
+    __r128 f2 __attribute__ ((aligned(16)));
+    __r128 f3;
+    __r128 f4;
+    __r128 f5;
+    __r128 f16;
+    __r128 f17;
+    __r128 f18;
+    __r128 f19;
+    __r128 f20;
+    __r128 f21;
+    __r128 f22;
+    __r128 f23;
+    __r128 f24;
+    __r128 f25;
+    __r128 f26;
+    __r128 f27;
+    __r128 f28;
+    __r128 f29;
+    __r128 f30;
+    __r128 f31;
+} context_t;
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/uspace/libc/arch/ia64/include/atomic.h
 ,0 → 1,67
+/*
+ * Copyright (C) 2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup libcia64
+ * @{
+ */
+/** @file
+ */
+#ifndef __ia64_ATOMIC_H__
+#define __ia64_ATOMIC_H__
+/** Atomic addition.
+ *
+ * @param val Atomic value.
+ * @param imm Value to add.
+ *
+ * @return Value before addition.
+ */
+static inline long atomic_add(atomic_t *val, int imm)
+{
+    long v;
+    __asm__ volatile ("fetchadd8.rel %0 = %1, %2\n" : "=r" (v), "+m" (val->count) : "i" (imm));
+    return v;
+}
+static inline void atomic_inc(atomic_t *val) { atomic_add(val, 1); }
+static inline void atomic_dec(atomic_t *val) { atomic_add(val, -1); }
+static inline long atomic_preinc(atomic_t *val) { return atomic_add(val, 1) + 1; }
+static inline long atomic_predec(atomic_t *val) { return atomic_add(val, -1) - 1; }
+static inline long atomic_postinc(atomic_t *val) { return atomic_add(val, 1); }
+static inline long atomic_postdec(atomic_t *val) { return atomic_add(val, -1); }
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/uspace/libc/arch/ia64/include/endian.h
 ,0 → 1,50
+/*
+ * Copyright (C) 2006 Josef Cejka
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup libcia64
+ * @{
+ */
+/** @file
+ */
+#ifndef __ia64_ENDIAN_H__
+#define __ia64_ENDIAN_H__
+#ifndef __LIBC__ENDIAN_H__
+# error "Never use <libarch/endian.h> directly - use <endian.h> instead."
+#endif
+#define __BYTE_ORDER __LITTLE_ENDIAN
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/uspace/libc/arch/ia64/include/stackarg.h
 ,0 → 1,43
+/*
+ * Copyright (C) 2006 Josef Cejka
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup libcia64
+ * @{
+ */
+/** @file
+ */
+#ifndef __LIBC__STACKARG_H__
+#define __LIBC__STACKARG_H__
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/uspace/libc/arch/ia64/include/limits.h
 ,0 → 1,50
+/*
+ * Copyright (C) 2006 Josef Cejka
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup libcia64
+ * @{
+ */
+/** @file
+ */
+#ifndef __ia64__LIMITS_H__
+#define __ia64__LIMITS_H__
+# define LONG_MIN MIN_INT64
+# define LONG_MAX MAX_INT64
+# define ULONG_MIN MIN_UINT64
+# define ULONG_MAX MAX_UINT64
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/uspace/libc/arch/ia64/include/types.h
 ,0 → 1,57
+/*
+ * Copyright (C) 2006 Ondrej Palkovsky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup libcia64
+ * @{
+ */
+/** @file
+ */
+#ifndef __LIBC__TYPES_H__
+#define __LIBC__TYPES_H__
+typedef unsigned long long sysarg_t;
+typedef unsigned long size_t;
+typedef signed long ssize_t;
+typedef ssize_t off_t;
+typedef char int8_t;
+typedef short int int16_t;
+typedef int int32_t;
+typedef long int int64_t;
+typedef unsigned char uint8_t;
+typedef unsigned short int uint16_t;
+typedef unsigned int uint32_t;
+typedef unsigned long int uint64_t;
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/uspace/libc/arch/ia64/include/stack.h
 ,0 → 1,47
+/*
+ * Copyright (C) 2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup libcia64
+ * @{
+ */
+/** @file
+ */
+#ifndef __ia64_STACK_H__
+#define __ia64_STACK_H__
+#define STACK_ITEM_SIZE         8
+#define STACK_ALIGNMENT         16
+#define STACK_SCRATCH_AREA_SIZE     16
+#define REGISTER_STACK_ALIGNMENT    8
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/uspace/libc/arch/ia64/include/thread.h
 ,0 → 1,64
+/*
+ * Copyright (C) 2006 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup libcia64
+ * @{
+ */
+/** @file
+ */
+#ifndef __LIBC__ia64THREAD_H__
+#define __LIBC__ia64THREAD_H__
+#define THREAD_INITIAL_STACK_PAGES_NO 2
+/* This structure must be exactly 16 bytes long */
+typedef struct {
+    void *dtv; /* unused in static linking*/
+    void *pst_data;
+} tcb_t;
+static inline void __tcb_set(tcb_t *tcb)
+{
+    __asm__ volatile ("mov r13 = %0\n" : : "r" (tcb) : "r13");
+}
+static inline tcb_t *__tcb_get(void)
+{
+    void *retval;
+    __asm__ volatile ("mov %0 = r13\n" : "=r" (retval));
+    return retval;
+}
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/uspace/libc/arch/ia64/src/psthread.S
 ,0 → 1,246
+#
+# Copyright (C) 2005 Jakub Jermar
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# - Redistributions of source code must retain the above copyright
+#   notice, this list of conditions and the following disclaimer.
+# - Redistributions in binary form must reproduce the above copyright
+#   notice, this list of conditions and the following disclaimer in the
+#   documentation and/or other materials provided with the distribution.
+# - The name of the author may not be used to endorse or promote products
+#   derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+.text
+.global context_save
+.global context_restore
+context_save:
+    alloc loc0 = ar.pfs, 1, 8, 0, 0
+    mov loc1 = ar.unat  ;;
+    /* loc2 */
+    mov loc3 = ar.rsc
+    .auto
+    /*
+     * Flush dirty registers to backing store.
+     * After this ar.bsp and ar.bspstore are equal.
+     */
+    flushrs
+    mov loc4 = ar.bsp
+    /*
+     * Put RSE to enforced lazy mode.
+     * So that ar.rnat can be read.
+     */
+    and loc5 = ~3, loc3
+    mov ar.rsc = loc5
+    mov loc5 = ar.rnat
+    .explicit
+    mov loc6 = ar.lc
+    /*
+     * Save application registers
+     */
+    st8 [in0] = loc0, 8 ;;  /* save ar.pfs */
+    st8 [in0] = loc1, 8 ;;  /* save ar.unat (caller) */
+    mov loc2 = in0      ;;
+    add in0 = 8, in0    ;;  /* skip ar.unat (callee) */
+    st8 [in0] = loc3, 8 ;;  /* save ar.rsc */
+    st8 [in0] = loc4, 8 ;;  /* save ar.bsp */
+    st8 [in0] = loc5, 8 ;;  /* save ar.rnat */
+    st8 [in0] = loc6, 8 ;;  /* save ar.lc */
+    /*
+     * Save general registers including NaT bits
+     */
+    st8.spill [in0] = r1, 8     ;;
+    st8.spill [in0] = r4, 8     ;;
+    st8.spill [in0] = r5, 8     ;;
+    st8.spill [in0] = r6, 8     ;;
+    st8.spill [in0] = r7, 8     ;;
+    st8.spill [in0] = r12, 8    ;;  /* save sp */
+    st8.spill [in0] = r13, 8    ;;  /* save tp */
+    mov loc3 = ar.unat      ;;
+    st8 [loc2] = loc3       /* save ar.unat (callee) */
+    /*
+     * Save branch registers
+     */
+    mov loc2 = b0       ;;
+    st8 [in0] = loc2, 8     /* save pc */
+    mov loc3 = b1       ;;
+    st8 [in0] = loc3, 8
+    mov loc4 = b2       ;;
+    st8 [in0] = loc4, 8
+    mov loc5 = b3       ;;
+    st8 [in0] = loc5, 8
+    mov loc6 = b4       ;;
+    st8 [in0] = loc6, 8
+    mov loc7 = b5       ;;
+    st8 [in0] = loc7, 8
+    /*
+     * Save predicate registers
+     */
+    mov loc2 = pr       ;;
+    st8 [in0] = loc2, 16;;      /* Next fpu registers should be spilled to 16B aligned address */
+    /*
+     * Save floating-point registers.
+     */
+    stf.spill [in0] = f2, 16 ;;
+    stf.spill [in0] = f3, 16 ;;
+    stf.spill [in0] = f4, 16 ;;
+    stf.spill [in0] = f5, 16 ;;
+    stf.spill [in0] = f16, 16 ;;
+    stf.spill [in0] = f17, 16 ;;
+    stf.spill [in0] = f18, 16 ;;
+    stf.spill [in0] = f19, 16 ;;
+    stf.spill [in0] = f20, 16 ;;
+    stf.spill [in0] = f21, 16 ;;
+    stf.spill [in0] = f22, 16 ;;
+    stf.spill [in0] = f23, 16 ;;
+    stf.spill [in0] = f24, 16 ;;
+    stf.spill [in0] = f25, 16 ;;
+    stf.spill [in0] = f26, 16 ;;
+    stf.spill [in0] = f27, 16 ;;
+    stf.spill [in0] = f28, 16 ;;
+    stf.spill [in0] = f29, 16 ;;
+    stf.spill [in0] = f30, 16 ;;
+    stf.spill [in0] = f31, 16 ;;
+    mov ar.unat = loc1
+    add r8 = r0, r0, 1      /* context_save returns 1 */
+    br.ret.sptk.many b0
+context_restore:
+    alloc loc0 = ar.pfs, 1, 9, 0, 0 ;;
+    ld8 loc0 = [in0], 8 ;;  /* load ar.pfs */
+    ld8 loc1 = [in0], 8 ;;  /* load ar.unat (caller) */
+    ld8 loc2 = [in0], 8 ;;  /* load ar.unat (callee) */
+    ld8 loc3 = [in0], 8 ;;  /* load ar.rsc */
+    ld8 loc4 = [in0], 8 ;;  /* load ar.bsp */
+    ld8 loc5 = [in0], 8 ;;  /* load ar.rnat */
+    ld8 loc6 = [in0], 8 ;;  /* load ar.lc */
+    .auto
+    /*
+     * Invalidate the ALAT
+     */
+    invala
+    /*
+     * Put RSE to enforced lazy mode.
+     * So that ar.bspstore and ar.rnat can be written.
+     */
+    movl loc8 = ~3
+    and loc8 = loc3, loc8
+    mov ar.rsc = loc8
+    /*
+     * Flush dirty registers to backing store.
+     * We do this because we want the following move
+     * to ar.bspstore to assign the same value to ar.bsp.
+     */
+    flushrs
+    /*
+     * Restore application registers
+     */
+    mov ar.bspstore = loc4  /* rse.bspload = ar.bsp = ar.bspstore = loc4 */
+    mov ar.rnat = loc5
+    mov ar.pfs = loc0
+    mov ar.rsc = loc3
+    .explicit
+    mov ar.unat = loc2  ;;
+    mov ar.lc = loc6
+    /*
+     * Restore general registers including NaT bits
+     */
+    ld8.fill r1 = [in0], 8  ;;
+    ld8.fill r4 = [in0], 8  ;;
+    ld8.fill r5 = [in0], 8  ;;
+    ld8.fill r6 = [in0], 8  ;;
+    ld8.fill r7 = [in0], 8  ;;
+    ld8.fill r12 = [in0], 8 ;;  /* restore sp */
+    ld8.fill r13 = [in0], 8 ;;
+    /*
+     * Restore branch registers
+     */
+    ld8 loc2 = [in0], 8 ;;  /* restore pc */
+    mov b0 = loc2
+    ld8 loc3 = [in0], 8 ;;
+    mov b1 = loc3
+    ld8 loc4 = [in0], 8 ;;
+    mov b2 = loc4
+    ld8 loc5 = [in0], 8 ;;
+    mov b3 = loc5
+    ld8 loc6 = [in0], 8 ;;
+    mov b4 = loc6
+    ld8 loc7 = [in0], 8 ;;
+    mov b5 = loc7
+    /*
+     * Restore predicate registers
+     */
+    ld8 loc2 = [in0], 16    ;;
+    mov pr = loc2, ~0
+    /*
+     * Restore floating-point registers.
+     */
+    ldf.fill f2 = [in0], 16 ;;
+    ldf.fill f3 = [in0], 16 ;;
+    ldf.fill f4 = [in0], 16 ;;
+    ldf.fill f5 = [in0], 16 ;;
+    ldf.fill f16 = [in0], 16 ;;
+    ldf.fill f17 = [in0], 16 ;;
+    ldf.fill f18 = [in0], 16 ;;
+    ldf.fill f19 = [in0], 16 ;;
+    ldf.fill f20 = [in0], 16 ;;
+    ldf.fill f21 = [in0], 16 ;;
+    ldf.fill f22 = [in0], 16 ;;
+    ldf.fill f23 = [in0], 16 ;;
+    ldf.fill f24 = [in0], 16 ;;
+    ldf.fill f25 = [in0], 16 ;;
+    ldf.fill f26 = [in0], 16 ;;
+    ldf.fill f27 = [in0], 16 ;;
+    ldf.fill f28 = [in0], 16 ;;
+    ldf.fill f29 = [in0], 16 ;;
+    ldf.fill f30 = [in0], 16 ;;
+    ldf.fill f31 = [in0], 16 ;;
+    mov ar.unat = loc1
+    mov r8 = r0         /* context_restore returns 0 */
+    br.ret.sptk.many b0

 /tags/0.2.0.2/uspace/libc/arch/ia64/src/thread.c
 ,0 → 1,66
+/*
+ * Copyright (C) 2006 Ondrej Palkovsky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup libcia64 ia64
+  * @brief ia64 architecture dependent parts of libc
+  * @ingroup lc
+ * @{
+ */
+/** @file
+ */
+#include <thread.h>
+#include <malloc.h>
+/** Allocate TLS & TCB for initial module threads
+ *
+ * @param data Start of data section
+ * @return pointer to tcb_t structure
+ */
+extern char _tdata_start;
+extern char _tbss_end;
+tcb_t * __alloc_tls(void **data, size_t size)
+{
+    tcb_t *tcb;
+/*  ASSERT(sizeof(tcb_t) == 16); */
+    tcb = malloc(sizeof(tcb_t) + size);
+    *data = ((void *) tcb) + 16;
+    return tcb;
+}
+void __free_tls_arch(tcb_t *tcb, size_t size)
+{
+    free(tcb);
+}
+ /** @}
+ */

 /tags/0.2.0.2/uspace/libc/arch/ia64/src/entry.s
 ,0 → 1,57
+#
+# Copyright (C) 2006 Jakub Jermar
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# - Redistributions of source code must retain the above copyright
+#   notice, this list of conditions and the following disclaimer.
+# - Redistributions in binary form must reproduce the above copyright
+#   notice, this list of conditions and the following disclaimer in the
+#   documentation and/or other materials provided with the distribution.
+# - The name of the author may not be used to endorse or promote products
+#   derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+.section .init, "ax"
+.org 0
+.globl __entry
+.globl __entry_driver
+## User-space task entry point
+#
+#
+__entry:
+    alloc loc0 = ar.pfs, 0, 1, 2, 0
+    mov r1 = _gp
+    br.call.sptk.many b0 = __main
+:
+    br.call.sptk.many b0 = __io_init
+:
+    br.call.sptk.many b0 = main
+:
+    br.call.sptk.many b0 = __exit
+__entry_driver:
+    alloc loc0 = ar.pfs, 0, 1, 2, 0
+    mov r1 = _gp
+    br.call.sptk.many b0 = __main
+:
+    br.call.sptk.many b0 = main
+:
+    br.call.sptk.many b0 = __exit

 /tags/0.2.0.2/uspace/libc/arch/ia64/src/thread_entry.s
 ,0 → 1,52
+#
+# Copyright (C) 2006 Jakub Jermar
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# - Redistributions of source code must retain the above copyright
+#   notice, this list of conditions and the following disclaimer.
+# - Redistributions in binary form must reproduce the above copyright
+#   notice, this list of conditions and the following disclaimer in the
+#   documentation and/or other materials provided with the distribution.
+# - The name of the author may not be used to endorse or promote products
+#   derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+.text
+.globl __thread_entry
+## User-space thread entry point for all but the first threads.
+#
+#
+__thread_entry:
+    alloc loc0 = ar.pfs, 0, 1, 1, 0
+    mov r1 = _gp
+    #
+    # r8 contains address of uarg structure.
+    #
+    mov out0 = r8
+    br.call.sptk.many b0 = __thread_main
+    #
+    # Not reached.
+    #
+.end __thread_entry

 /tags/0.2.0.2/uspace/libc/arch/ia64/src/syscall.S
 ,0 → 1,44
+#
+# Copyright (C) 2006 Jakub Jermar
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# - Redistributions of source code must retain the above copyright
+#   notice, this list of conditions and the following disclaimer.
+# - Redistributions in binary form must reproduce the above copyright
+#   notice, this list of conditions and the following disclaimer in the
+#   documentation and/or other materials provided with the distribution.
+# - The name of the author may not be used to endorse or promote products
+#   derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+/**
+ * Immediate operand for break instruction.
+ * Be carefull about the value as Ski simulator
+ * is somewhat sensitive to its value.
+ *
+ * 0 will be confused with Ski breakpoint.
+ * And higher values will be confused with SSC's.
+ */
+#define SYSCALL_IMM 1
+.global __syscall
+__syscall:
+    alloc r14 = ar.pfs, 5, 0, 0, 0 ;;
+    break SYSCALL_IMM
+    mov ar.pfs = r14 ;;
+    br.ret.sptk.many b0

 /tags/0.2.0.2/uspace/libc/arch/ia64/_link.ld.in
 ,0 → 1,52
+STARTUP(../libc/arch/ARCH/src/entry.o)
+ENTRY(__entry)
+PHDRS {
+    text PT_LOAD FLAGS(5);
+    data PT_LOAD FLAGS(6);
+}
+SECTIONS {
+    . = 0x4000;
+    .init ALIGN(0x4000): SUBALIGN(0x4000) {
+        *(.init);
+    } : text
+    .text : {
+        *(.text);
+        *(.rodata*);
+    } :text
+    .got ALIGN(0x4000) : SUBALIGN(0x4000) {
+        _gp = .;
+        *(.got*);
+    } :data
+    .data : {
+        *(.opd);
+        *(.data .data.*);
+        *(.sdata);
+    } :data
+    .tdata : {
+        _tdata_start = .;
+        *(.tdata);
+        _tdata_end = .;
+    } :data
+    .tbss : {
+        _tbss_start = .;
+        *(.tbss);
+        _tbss_end = .;
+    } :data
+    .bss : {
+        *(.sbss);
+        *(.scommon);
+        *(COMMON);
+        *(.bss);
+    } :data
+    . = ALIGN(0x4000);
+    _heap = .;
+    /DISCARD/ : {
+        *(*);
+        }
+}

 /tags/0.2.0.2/uspace/libc/arch/mips32/include/context_offset.h
 ,0 → 1,31
+/* This file is automatically generated by gencontext.c. */
+/* struct context */
+#define OFFSET_SP      0x0
+#define OFFSET_PC      0x4
+#define OFFSET_S0      0x8
+#define OFFSET_S1      0xc
+#define OFFSET_S2      0x10
+#define OFFSET_S3      0x14
+#define OFFSET_S4      0x18
+#define OFFSET_S5      0x1c
+#define OFFSET_S6      0x20
+#define OFFSET_S7      0x24
+#define OFFSET_S8      0x28
+#define OFFSET_GP      0x2c
+#define OFFSET_TLS     0x30
+#define OFFSET_F20     0x34
+#define OFFSET_F21     0x38
+#define OFFSET_F22     0x3c
+#define OFFSET_F23     0x40
+#define OFFSET_F24     0x44
+#define OFFSET_F25     0x48
+#define OFFSET_F26     0x4c
+#define OFFSET_F27     0x50
+#define OFFSET_F28     0x54
+#define OFFSET_F29     0x58
+#define OFFSET_F30     0x5c
+ /** @}
+ */

 /tags/0.2.0.2/uspace/libc/arch/mips32/include/psthread.h
 ,0 → 1,91
+/*
+ * Copyright (C) 2006 Ondrej Palkovsky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup libcmips32
+ * @{
+ */
+/** @file
+ * @ingroup libcmips32eb
+ */
+#ifndef __LIBC__mips32PSTHREAD_H__
+#define __LIBC__mips32PSTHREAD_H__
+#include <types.h>
+/* We define our own context_set, because we need to set
+ * the TLS pointer to the tcb+0x7000
+ *
+ * See tls_set in thread.h
+ */
+#define context_set(c, _pc, stack, size, ptls)          \
+    (c)->pc = (sysarg_t) (_pc);             \
+    (c)->sp = ((sysarg_t) (stack)) + (size) - SP_DELTA;     \
+        (c)->tls = ((sysarg_t)(ptls)) + 0x7000 + sizeof(tcb_t);
+/* +16 is just for sure that the called function
+ * have space to store it's arguments
+ */
+#define SP_DELTA    (8+16)
+typedef struct  {
+    uint32_t sp;
+    uint32_t pc;
+    uint32_t s0;
+    uint32_t s1;
+    uint32_t s2;
+    uint32_t s3;
+    uint32_t s4;
+    uint32_t s5;
+    uint32_t s6;
+    uint32_t s7;
+    uint32_t s8;
+    uint32_t gp;
+    uint32_t tls; /* Thread local storage(=k1) */
+    uint32_t f20;
+    uint32_t f21;
+    uint32_t f22;
+    uint32_t f23;
+    uint32_t f24;
+    uint32_t f25;
+    uint32_t f26;
+    uint32_t f27;
+    uint32_t f28;
+    uint32_t f29;
+    uint32_t f30;
+} context_t;
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/uspace/libc/arch/mips32/include/atomic.h
 ,0 → 1,78
+/*
+ * Copyright (C) 2005 Ondrej Palkovsky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup libcmips32
+ * @{
+ */
+/** @file
+ * @ingroup libcmips32eb
+ */
+#ifndef __mips32_ATOMIC_H__
+#define __mips32_ATOMIC_H__
+#define atomic_inc(x)   ((void) atomic_add(x, 1))
+#define atomic_dec(x)   ((void) atomic_add(x, -1))
+#define atomic_postinc(x) (atomic_add(x, 1) - 1)
+#define atomic_postdec(x) (atomic_add(x, -1) + 1)
+#define atomic_preinc(x) atomic_add(x, 1)
+#define atomic_predec(x) atomic_add(x, -1)
+/* Atomic addition of immediate value.
+ *
+ * @param val Memory location to which will be the immediate value added.
+ * @param i Signed immediate that will be added to *val.
+ *
+ * @return Value after addition.
+ */
+static inline long atomic_add(atomic_t *val, int i)
+{
+    long tmp, v;
+    __asm__ volatile (
+        "1:\n"
+        "   ll %0, %1\n"
+        "   addiu %0, %0, %3\n" /* same as addi, but never traps on overflow */
+        "       move %2, %0\n"
+        "   sc %0, %1\n"
+        "   beq %0, %4, 1b\n"   /* if the atomic operation failed, try again */
+        /*  nop */      /* nop is inserted automatically by compiler */
+        : "=r" (tmp), "=m" (val->count), "=r" (v)
+        : "i" (i), "i" (0)
+        );
+    return v;
+}
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/uspace/libc/arch/mips32/include/endian.h
 ,0 → 1,51
+/*
+ * Copyright (C) 2006 Josef Cejka
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup libcmips32 mips32
+  * @brief mips32 architecture dependent parts of libc
+  * @ingroup lc
+ * @{
+ */
+/** @file
+ */
+#ifndef __mips32_ENDIAN_H__
+#define __mips32_ENDIAN_H__
+#ifndef __LIBC__ENDIAN_H__
+# error "Never use <libarch/endian.h> directly - use <endian.h> instead."
+#endif
+#define __BYTE_ORDER __LITTLE_ENDIAN
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/uspace/libc/arch/mips32/include/stackarg.h
 ,0 → 1,63
+/*
+ * Copyright (C) 2006 Josef Cejka
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup libcmips32
+ * @{
+ */
+/** @file
+ * @ingroup libcmips32eb
+ */
+#ifndef __LIBC_mips32_STACKARG_H__
+#define __LIBC_mips32_STACKARG_H__
+/* dont allow to define it second time in stdarg.h */
+#define __VARARGS_DEFINED
+#include <types.h>
+/**
+ * va_arg macro for MIPS32 - problem is that 64 bit values must be aligned on an 8-byte boundary (32bit values not)
+ * To satisfy this, paddings must be sometimes inserted.
+ */
+typedef uint8_t* va_list;
+#define va_start(ap, lst) \
+    ((ap) = (va_list)&(lst) + sizeof(lst))
+#define va_arg(ap, type)    \
+    (((type *)((ap) = (va_list)( (sizeof(type) <= 4) ? ((uint32_t)((ap) + 2*4 - 1) & (~3)) : ((uint32_t)((ap) + 2*8 -1) & (~7)) )))[-1])
+#define va_end(ap)
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/uspace/libc/arch/mips32/include/limits.h
 ,0 → 1,50
+/*
+ * Copyright (C) 2006 Josef Cejka
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup libcmips32
+ * @{
+ */
+/** @file
+ * @ingroup libcmips32eb
+ */
+#ifndef __mips32__LIMITS_H__
+#define __mips32__LIMITS_H__
+# define LONG_MIN MIN_INT32
+# define LONG_MAX MAX_INT32
+# define ULONG_MIN MIN_UINT32
+# define ULONG_MAX MAX_UINT32
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/uspace/libc/arch/mips32/include/types.h
 ,0 → 1,58
+/*
+ * Copyright (C) 2005 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup libcmips32
+ * @{
+ */
+/** @file
+ * @ingroup libcmips32eb
+ */
+#ifndef __LIBC__TYPES_H__
+#define __LIBC__TYPES_H__
+typedef unsigned int sysarg_t;
+typedef unsigned int size_t;
+typedef signed int ssize_t;
+typedef ssize_t off_t;
+typedef char int8_t;
+typedef short int int16_t;
+typedef long int int32_t;
+typedef long long int int64_t;
+typedef unsigned char uint8_t;
+typedef unsigned short int uint16_t;
+typedef unsigned long int uint32_t;
+typedef unsigned long long int uint64_t;
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/uspace/libc/arch/mips32/include/thread.h
 ,0 → 1,80
+/*
+ * Copyright (C) 2006 Ondrej Palkovsky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup libcmips32
+ * @{
+ */
+/** @file
+ * @ingroup libcmips32eb
+ */
+/* TLS for MIPS is described in http://www.linux-mips.org/wiki/NPTL */
+#ifndef __LIBC__mips32THREAD_H__
+#define __LIBC__mips32THREAD_H__
+/* I did not find any specification (neither MIPS nor PowerPC), but
+ * as I found it
+ * - it uses Variant II
+ * - TCB is at Address(First TLS Block)+0x7000.
+ * - DTV is at Address(First TLS Block)+0x8000
+ * - What would happen if the TLS data was larger then 0x7000?
+ * - The linker never accesses DTV directly, has the second definition any
+ *   sense?
+ * We will make it this way:
+ * - TCB is at TP-0x7000-sizeof(tcb)
+ * - No assumption about DTV etc., but it will not have a fixed address
+ */
+#define MIPS_TP_OFFSET 0x7000
+typedef struct {
+    void *pst_data;
+} tcb_t;
+static inline void __tcb_set(tcb_t *tcb)
+{
+    void *tp = tcb;
+    tp += MIPS_TP_OFFSET + sizeof(tcb_t);
+    __asm__ volatile ("add $27, %0, $0" : : "r"(tp)); /* Move tls to K1 */
+}
+static inline tcb_t * __tcb_get(void)
+{
+    void * retval;
+    __asm__ volatile("add %0, $27, $0" : "=r"(retval));
+    return (tcb_t *)(retval - MIPS_TP_OFFSET - sizeof(tcb_t));
+}
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/uspace/libc/arch/mips32/Makefile.inc
 ,0 → 1,47
+#
+# Copyright (C) 2005 Martin Decky
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# - Redistributions of source code must retain the above copyright
+#   notice, this list of conditions and the following disclaimer.
+# - Redistributions in binary form must reproduce the above copyright
+#   notice, this list of conditions and the following disclaimer in the
+#   documentation and/or other materials provided with the distribution.
+# - The name of the author may not be used to endorse or promote products
+#   derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+## Toolchain configuration
+#
+TARGET = mipsel-linux-gnu
+TOOLCHAIN_DIR = /usr/local/mipsel/bin
+CFLAGS += -mips3
+-include ../Makefile.config
+ifeq ($(CONFIG_MIPS_FPU),y)
+    CFLAGS += -DCONFIG_MIPS_FPU
+endif
+ARCH_SOURCES += arch/$(ARCH)/src/syscall.c \
+    arch/$(ARCH)/src/psthread.S \
+    arch/$(ARCH)/src/thread.c
+BFD_ARCH = mips
+BFD_NAME = elf32-little

 /tags/0.2.0.2/uspace/libc/arch/mips32/src/entry.s
 ,0 → 1,89
+#
+# Copyright (C) 2005 Martin Decky
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# - Redistributions of source code must retain the above copyright
+#   notice, this list of conditions and the following disclaimer.
+# - Redistributions in binary form must reproduce the above copyright
+#   notice, this list of conditions and the following disclaimer in the
+#   documentation and/or other materials provided with the distribution.
+# - The name of the author may not be used to endorse or promote products
+#   derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+.text
+.section .init, "ax"
+.global __entry
+.global __entry_driver
+.set noreorder
+.option pic2
+## User-space task entry point
+#
+#
+.ent __entry
+__entry:
+    .frame $sp, 32, $31
+    .cpload $25
+    # Mips o32 may store its arguments on stack, make space (16 bytes),
+    # so that it could work with -O0
+    # Make space additional 16 bytes for the stack frame
+    addiu $sp, -32
+    .cprestore 16   # Allow PIC code
+    jal __main
+    nop
+    jal __io_init
+    nop
+    jal main
+    nop
+    jal __exit
+    nop
+.end
+.ent __entry_driver
+__entry_driver:
+    .frame $sp, 32, $31
+    .cpload $25
+    # Mips o32 may store its arguments on stack, make space (16 bytes),
+    # so that it could work with -O0
+    # Make space additional 16 bytes for the stack frame
+    addiu $sp, -32
+    .cprestore 16   # Allow PIC code
+    jal __main
+    nop
+    jal main
+    nop
+    jal __exit
+    nop
+.end
+# Alignment of output section data to 0x4000
+.section .data
+.align 14

 /tags/0.2.0.2/uspace/libc/arch/mips32/src/psthread.S
 ,0 → 1,161
+#
+# Copyright (C) 2003-2004 Jakub Jermar
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# - Redistributions of source code must retain the above copyright
+#   notice, this list of conditions and the following disclaimer.
+# - Redistributions in binary form must reproduce the above copyright
+#   notice, this list of conditions and the following disclaimer in the
+#   documentation and/or other materials provided with the distribution.
+# - The name of the author may not be used to endorse or promote products
+#   derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+.text
+.set noat
+.set noreorder
+#include <arch/asm/regname.h>
+#include <libarch/context_offset.h>
+.global context_save
+.global context_restore
+.macro CONTEXT_STORE r
+    sw $s0,OFFSET_S0(\r)
+    sw $s1,OFFSET_S1(\r)
+    sw $s2,OFFSET_S2(\r)
+    sw $s3,OFFSET_S3(\r)
+    sw $s4,OFFSET_S4(\r)
+    sw $s5,OFFSET_S5(\r)
+    sw $s6,OFFSET_S6(\r)
+    sw $s7,OFFSET_S7(\r)
+    sw $s8,OFFSET_S8(\r)
+    sw $gp,OFFSET_GP(\r)
+    sw $k1,OFFSET_TLS(\r)
+#ifdef CONFIG_MIPS_FPU
+    mfc1 $t0,$20
+    sw $t0, OFFSET_F20(\r)
+    mfc1 $t0,$21
+    sw $t0, OFFSET_F21(\r)
+    mfc1 $t0,$22
+    sw $t0, OFFSET_F22(\r)
+    mfc1 $t0,$23
+    sw $t0, OFFSET_F23(\r)
+    mfc1 $t0,$24
+    sw $t0, OFFSET_F24(\r)
+    mfc1 $t0,$25
+    sw $t0, OFFSET_F25(\r)
+    mfc1 $t0,$26
+    sw $t0, OFFSET_F26(\r)
+    mfc1 $t0,$27
+    sw $t0, OFFSET_F27(\r)
+    mfc1 $t0,$28
+    sw $t0, OFFSET_F28(\r)
+    mfc1 $t0,$29
+    sw $t0, OFFSET_F29(\r)
+    mfc1 $t0,$30
+    sw $t0, OFFSET_F30(\r)
+#endif
+    sw $ra,OFFSET_PC(\r)
+    sw $sp,OFFSET_SP(\r)
+.endm
+.macro CONTEXT_LOAD r
+    lw $s0,OFFSET_S0(\r)
+    lw $s1,OFFSET_S1(\r)
+    lw $s2,OFFSET_S2(\r)
+    lw $s3,OFFSET_S3(\r)
+    lw $s4,OFFSET_S4(\r)
+    lw $s5,OFFSET_S5(\r)
+    lw $s6,OFFSET_S6(\r)
+    lw $s7,OFFSET_S7(\r)
+    lw $s8,OFFSET_S8(\r)
+    lw $gp,OFFSET_GP(\r)
+    lw $k1,OFFSET_TLS(\r)
+#ifdef CONFIG_MIPS_FPU
+    lw $t0, OFFSET_F20(\r)
+    mtc1 $t0,$20
+    lw $t0, OFFSET_F21(\r)
+    mtc1 $t0,$21
+    lw $t0, OFFSET_F22(\r)
+    mtc1 $t0,$22
+    lw $t0, OFFSET_F23(\r)
+    mtc1 $t0,$23
+    lw $t0, OFFSET_F24(\r)
+    mtc1 $t0,$24
+    lw $t0, OFFSET_F25(\r)
+    mtc1 $t0,$25
+    lw $t0, OFFSET_F26(\r)
+    mtc1 $t0,$26
+    lw $t0, OFFSET_F27(\r)
+    mtc1 $t0,$27
+    lw $t0, OFFSET_F28(\r)
+    mtc1 $t0,$28
+    lw $t0, OFFSET_F29(\r)
+    mtc1 $t0,$29
+    lw $t0, OFFSET_F30(\r)
+    mtc1 $t0,$30
+#endif
+    lw $ra,OFFSET_PC(\r)
+    lw $sp,OFFSET_SP(\r)
+.endm
+context_save:
+    CONTEXT_STORE $a0
+    # context_save returns 1
+    j $ra
+    li $v0, 1
+context_restore:
+    CONTEXT_LOAD $a0
+    # Just for the jump into first function, but one instruction
+    # should not bother us
+    move $t9, $ra
+    # context_restore returns 0
+    j $ra
+    xor $v0, $v0

 /tags/0.2.0.2/uspace/libc/arch/mips32/src/thread.c
 ,0 → 1,61
+/*
+ * Copyright (C) 2006 Ondrej Palkovsky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup libcmips32
+ * @{
+ */
+/** @file
+ * @ingroup libcmips32eb
+ */
+#include <thread.h>
+#include <malloc.h>
+/** Allocate TLS & TCB for initial module threads
+ *
+ * @param data (out) Start of TLS section
+ * @param size Size of tdata+tbss section
+ * @return pointer to tcb_t structure
+ */
+tcb_t * __alloc_tls(void **data, size_t size)
+{
+    tcb_t *result;
+    result = malloc(sizeof(tcb_t) + size);
+    *data = ((void *)result) + sizeof(tcb_t);
+    return result;
+}
+void __free_tls_arch(tcb_t *tcb, size_t size)
+{
+    free(tcb);
+}
+ /** @}
+ */

 /tags/0.2.0.2/uspace/libc/arch/mips32/src/syscall.c
 ,0 → 1,65
+/*
+ * Copyright (C) 2005 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup libcmips32
+ * @{
+ */
+/** @file
+  * @ingroup libcmips32eb
+ */
+#include <libc.h>
+sysarg_t __syscall(const sysarg_t p1, const sysarg_t p2,
+           const sysarg_t p3, const sysarg_t p4,
+           const syscall_t id)
+{
+    register sysarg_t __mips_reg_a0 asm("$4") = p1;
+    register sysarg_t __mips_reg_a1 asm("$5") = p2;
+    register sysarg_t __mips_reg_a2 asm("$6") = p3;
+    register sysarg_t __mips_reg_a3 asm("$7") = p4;
+    register sysarg_t __mips_reg_v0 asm("$2") = id;
+    asm volatile (
+        "syscall\n"
+        : "=r" (__mips_reg_v0)
+        : "r" (__mips_reg_a0),
+          "r" (__mips_reg_a1),
+          "r" (__mips_reg_a2),
+          "r" (__mips_reg_a3),
+          "r" (__mips_reg_v0)
+        : "%ra" /* We are a function call, although C does not
+             * know it */
+    );
+    return __mips_reg_v0;
+}
+ /** @}
+ */

 /tags/0.2.0.2/uspace/libc/arch/mips32/src/thread_entry.s
 ,0 → 1,59
+#
+# Copyright (C) 2006 Jakub Jermar
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# - Redistributions of source code must retain the above copyright
+#   notice, this list of conditions and the following disclaimer.
+# - Redistributions in binary form must reproduce the above copyright
+#   notice, this list of conditions and the following disclaimer in the
+#   documentation and/or other materials provided with the distribution.
+# - The name of the author may not be used to endorse or promote products
+#   derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+.text
+.set noat
+.set noreorder
+.option pic2
+.globl __thread_entry
+## User-space thread entry point for all but the first threads.
+#
+#
+.ent __thread_entry
+__thread_entry:
+    .frame $sp, 32, $31
+    .cpload $25
+    #
+    # v0 contains address of uarg.
+    #
+    add $4, $2, 0
+    # Mips o32 may store its arguments on stack, make space
+    addiu $sp, -32
+    .cprestore 16
+    jal __thread_main
+    nop
+    #
+    # Not reached.
+    #
+.end __thread_entry

 /tags/0.2.0.2/uspace/libc/arch/mips32/_link.ld.in
 ,0 → 1,56
+STARTUP(../libc/arch/ARCH/src/entry.o)
+ENTRY(__entry)
+PHDRS {
+    text PT_LOAD FLAGS(5);
+    data PT_LOAD FLAGS(6);
+}
+SECTIONS {
+    . = 0x4000;
+    .init ALIGN(0x4000) : SUBALIGN(0x4000) {
+        *(.init);
+    } :text
+    .text : {
+            *(.text);
+        *(.rodata*);
+    } :text
+    .data : {
+        *(.data);
+        *(.data.rel*);
+    } :data
+    .got : {
+        _gp = .;
+        *(.got);
+    } :data
+    .tdata : {
+        _tdata_start = .;
+        *(.tdata);
+        _tdata_end = .;
+    } :data
+    .tbss : {
+        _tbss_start = .;
+        *(.tbss);
+        _tbss_end = .;
+    } :data
+    .sbss : {
+        *(.scommon);
+        *(.sbss);
+    }
+    .bss : {
+        *(.bss);
+        *(COMMON);
+    } :data
+    . = ALIGN(0x4000);
+    _heap = .;
+    /DISCARD/ : {
+        *(*);
+    }
+}

 /tags/0.2.0.2/uspace/libc/arch/mips32eb/include/endian.h
 ,0 → 1,51
+/*
+ * Copyright (C) 2006 Josef Cejka
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/** @addtogroup libcmips32eb mipseb32
+  * @brief mipseb32 architecture dependent parts of libc
+  * @ingroup lc
+ * @{
+ */
+/** @file
+ */
+#ifndef __mips32eb_ENDIAN_H__
+#define __mips32eb_ENDIAN_H__
+#ifndef __LIBC__ENDIAN_H__
+# error "Never use <libarch/endian.h> directly - use <endian.h> instead."
+#endif
+#define __BYTE_ORDER __BIG_ENDIAN
+#endif
+ /** @}
+ */

/tags/0.2.0.2/uspace/libc/arch/mips32eb/include/limits.h
0,0 → 1,0
link ../../mips32/include/limits.h
Property changes:
Added: svn:special
+*
\ No newline at end of property

/tags/0.2.0.2/uspace/libc/arch/mips32eb/include/context_offset.h
0,0 → 1,0
link ../../mips32/include/context_offset.h
Property changes:
Added: svn:special
+*
\ No newline at end of property

/tags/0.2.0.2/uspace/libc/arch/mips32eb/include/psthread.h
0,0 → 1,0
link ../../mips32/include/psthread.h
Property changes:
Added: svn:special
+*
\ No newline at end of property

/tags/0.2.0.2/uspace/libc/arch/mips32eb/include/atomic.h
0,0 → 1,0
link ../../mips32/include/atomic.h
Property changes:
Added: svn:special
+*
\ No newline at end of property

/tags/0.2.0.2/uspace/libc/arch/mips32eb/include/stackarg.h
0,0 → 1,0
link ../../mips32/include/stackarg.h
Property changes:
Added: svn:special
+*
\ No newline at end of property

/tags/0.2.0.2/uspace/libc/arch/mips32eb/include/types.h
0,0 → 1,0
link ../../mips32/include/types.h
Property changes:
Added: svn:special
+*
\ No newline at end of property

/tags/0.2.0.2/uspace/libc/arch/mips32eb/include/thread.h
0,0 → 1,0
link ../../mips32/include/thread.h
Property changes:
Added: svn:special
+*
\ No newline at end of property

 /tags/0.2.0.2/uspace/libc/arch/mips32eb/Makefile.inc
 ,0 → 1,43
+#
+# Copyright (C) 2005 Martin Decky
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# - Redistributions of source code must retain the above copyright
+#   notice, this list of conditions and the following disclaimer.
+# - Redistributions in binary form must reproduce the above copyright
+#   notice, this list of conditions and the following disclaimer in the
+#   documentation and/or other materials provided with the distribution.
+# - The name of the author may not be used to endorse or promote products
+#   derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+## Toolchain configuration
+#
+TARGET = mips-sgi-irix5
+TOOLCHAIN_DIR = /usr/local/mips/bin
+CFLAGS += -mips3
+ARCH_SOURCES += arch/$(ARCH)/src/syscall.c \
+        arch/$(ARCH)/src/psthread.S \
+        arch/$(ARCH)/src/thread.c
+LFLAGS += -N
+BFD_ARCH = mips
+BFD_NAME = elf32-big

/tags/0.2.0.2/uspace/libc/arch/mips32eb/_link.ld.in
0,0 → 1,0
link ../mips32/_link.ld.in
Property changes:
Added: svn:special
+*
\ No newline at end of property

/tags/0.2.0.2/uspace/libc/arch/mips32eb/src
0,0 → 1,0
link ../mips32/src
Property changes:
Added: svn:special
+*
\ No newline at end of property

 /tags/0.2.0.2/uspace/libc/arch/ppc32/include/context_offset.h
 ,0 → 1,29
+/* struct context */
+#define OFFSET_SP    0x0
+#define OFFSET_PC    0x4
+#define OFFSET_R2    0x8
+#define OFFSET_R13   0xc
+#define OFFSET_R14   0x10
+#define OFFSET_R15   0x14
+#define OFFSET_R16   0x18
+#define OFFSET_R17   0x1c
+#define OFFSET_R18   0x20
+#define OFFSET_R19   0x24
+#define OFFSET_R20   0x28
+#define OFFSET_R21   0x2c
+#define OFFSET_R22   0x30
+#define OFFSET_R23   0x34
+#define OFFSET_R24   0x38
+#define OFFSET_R25   0x3c
+#define OFFSET_R26   0x40
+#define OFFSET_R27   0x44
+#define OFFSET_R28   0x48
+#define OFFSET_R29   0x4c
+#define OFFSET_R30   0x50
+#define OFFSET_R31   0x54
+#define OFFSET_CR    0x58
+#define OFFSET_CR    0x58
+ /** @}
+ */

 /tags/0.2.0.2/uspace/libc/arch/ppc32/include/psthread.h
 ,0 → 1,84
+/*
+ * Copyright (C) 2006 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup libcppc32
+ * @{
+ */
+/** @file
+ */
+#ifndef __LIBC__ppc32__PSTHREAD_H__
+#define __LIBC__ppc32__PSTHREAD_H__
+#include <types.h>
+/* We define our own context_set, because we need to set
+ * the TLS pointer to the tcb+0x7000
+ *
+ * See tls_set in thread.h
+ */
+#define context_set(c, _pc, stack, size, ptls)          \
+    (c)->pc = (sysarg_t) (_pc);             \
+    (c)->sp = ((sysarg_t) (stack)) + (size) - SP_DELTA;     \
+    (c)->tls = ((sysarg_t) (ptls)) + 0x7000 + sizeof(tcb_t);
+#define SP_DELTA    16
+typedef struct {
+    uint32_t sp;
+    uint32_t pc;
+    uint32_t tls;
+    uint32_t r13;
+    uint32_t r14;
+    uint32_t r15;
+    uint32_t r16;
+    uint32_t r17;
+    uint32_t r18;
+    uint32_t r19;
+    uint32_t r20;
+    uint32_t r21;
+    uint32_t r22;
+    uint32_t r23;
+    uint32_t r24;
+    uint32_t r25;
+    uint32_t r26;
+    uint32_t r27;
+    uint32_t r28;
+    uint32_t r29;
+    uint32_t r30;
+    uint32_t r31;
+    uint32_t cr;
+} __attribute__ ((packed)) context_t;
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/uspace/libc/arch/ppc32/include/atomic.h
 ,0 → 1,96
+/*
+ * Copyright (C) 2005 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup libcppc32
+ * @{
+ */
+/** @file
+ */
+#ifndef __ppc32_ATOMIC_H__
+#define __ppc32_ATOMIC_H__
+static inline void atomic_inc(atomic_t *val)
+{
+    long tmp;
+    asm __volatile__ (
+        "1:\n"
+        "lwarx %0, 0, %2\n"
+        "addic %0, %0, 1\n"
+        "stwcx. %0, 0, %2\n"
+        "bne- 1b"
+        : "=&r" (tmp), "=m" (val->count)
+        : "r" (&val->count), "m" (val->count)
+        : "cc");
+}
+static inline void atomic_dec(atomic_t *val)
+{
+    long tmp;
+    asm __volatile__(
+        "1:\n"
+        "lwarx %0, 0, %2\n"
+        "addic %0, %0, -1\n"
+        "stwcx. %0, 0, %2\n"
+        "bne- 1b"
+        : "=&r" (tmp), "=m" (val->count)
+        : "r" (&val->count), "m" (val->count)
+        : "cc");
+}
+static inline long atomic_postinc(atomic_t *val)
+{
+    atomic_inc(val);
+    return val->count - 1;
+}
+static inline long atomic_postdec(atomic_t *val)
+{
+    atomic_dec(val);
+    return val->count + 1;
+}
+static inline long atomic_preinc(atomic_t *val)
+{
+    atomic_inc(val);
+    return val->count;
+}
+static inline long atomic_predec(atomic_t *val)
+{
+    atomic_dec(val);
+    return val->count;
+}
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/uspace/libc/arch/ppc32/include/endian.h
 ,0 → 1,48
+/*
+ * Copyright (C) 2006 Josef Cejka
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup libcppc32
+ * @{
+ */
+/** @file
+ */
+#ifndef __ppc32_ENDIAN_H__
+#define __ppc32_ENDIAN_H__
+#ifndef __LIBC__ENDIAN_H__
+# error "Never use <libarch/endian.h> directly - use <endian.h> instead."
+#endif
+#define __BYTE_ORDER __BIG_ENDIAN
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/uspace/libc/arch/ppc32/include/regname.h
 ,0 → 1,189
+/*
+ * Copyright (C) 2006 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup libcppc32
+ * @{
+ */
+/** @file
+ */
+#ifndef __ppc32_REGNAME_H__
+#define __ppc32_REGNAME_H__
+/* Condition Register Bit Fields */
+#define cr0 0
+#define cr1 1
+#define cr2 2
+#define cr3 3
+#define cr4 4
+#define cr5 5
+#define cr6 6
+#define cr7 7
+/* General Purpose Registers (GPRs) */
+#define r0  0
+#define r1  1
+#define r2  2
+#define r3  3
+#define r4  4
+#define r5  5
+#define r6  6
+#define r7  7
+#define r8  8
+#define r9  9
+#define r10 10
+#define r11 11
+#define r12 12
+#define r13 13
+#define r14 14
+#define r15 15
+#define r16 16
+#define r17 17
+#define r18 18
+#define r19 19
+#define r20 20
+#define r21 21
+#define r22 22
+#define r23 23
+#define r24 24
+#define r25 25
+#define r26 26
+#define r27 27
+#define r28 28
+#define r29 29
+#define r30 30
+#define r31 31
+/* GPR Aliases */
+#define sp  1
+/* Floating Point Registers (FPRs) */
+#define fr0     0
+#define fr1     1
+#define fr2     2
+#define fr3     3
+#define fr4     4
+#define fr5     5
+#define fr6     6
+#define fr7     7
+#define fr8     8
+#define fr9     9
+#define fr10    10
+#define fr11    11
+#define fr12    12
+#define fr13    13
+#define fr14    14
+#define fr15    15
+#define fr16    16
+#define fr17    17
+#define fr18    18
+#define fr19    19
+#define fr20    20
+#define fr21    21
+#define fr22    22
+#define fr23    23
+#define fr24    24
+#define fr25    25
+#define fr26    26
+#define fr27    27
+#define fr28    28
+#define fr29    29
+#define fr30    30
+#define fr31    31
+#define vr0     0
+#define vr1     1
+#define vr2     2
+#define vr3     3
+#define vr4     4
+#define vr5     5
+#define vr6     6
+#define vr7     7
+#define vr8     8
+#define vr9     9
+#define vr10    10
+#define vr11    11
+#define vr12    12
+#define vr13    13
+#define vr14    14
+#define vr15    15
+#define vr16    16
+#define vr17    17
+#define vr18    18
+#define vr19    19
+#define vr20    20
+#define vr21    21
+#define vr22    22
+#define vr23    23
+#define vr24    24
+#define vr25    25
+#define vr26    26
+#define vr27    27
+#define vr28    28
+#define vr29    29
+#define vr30    30
+#define vr31    31
+#define evr0    0
+#define evr1    1
+#define evr2    2
+#define evr3    3
+#define evr4    4
+#define evr5    5
+#define evr6    6
+#define evr7    7
+#define evr8    8
+#define evr9    9
+#define evr10   10
+#define evr11   11
+#define evr12   12
+#define evr13   13
+#define evr14   14
+#define evr15   15
+#define evr16   16
+#define evr17   17
+#define evr18   18
+#define evr19   19
+#define evr20   20
+#define evr21   21
+#define evr22   22
+#define evr23   23
+#define evr24   24
+#define evr25   25
+#define evr26   26
+#define evr27   27
+#define evr28   28
+#define evr29   29
+#define evr30   30
+#define evr31   31
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/uspace/libc/arch/ppc32/include/stackarg.h
 ,0 → 1,43
+/*
+ * Copyright (C) 2006 Josef Cejka
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup libcppc32
+ * @{
+ */
+/** @file
+ */
+#ifndef __LIBC__STACKARG_H__
+#define __LIBC__STACKARG_H__
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/uspace/libc/arch/ppc32/include/limits.h
 ,0 → 1,47
+/*
+ * Copyright (C) 2006 Josef Cejka
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup libcppc32
+ * @{
+ */
+/** @file
+ */
+#ifndef __ppc32__LIMITS_H__
+#define __ppc32__LIMITS_H__
+#define LONG_MIN MIN_INT32
+#define LONG_MAX MAX_INT32
+#define ULONG_MIN MIN_UINT32
+#define ULONG_MAX MAX_UINT32
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/uspace/libc/arch/ppc32/include/types.h
 ,0 → 1,57
+/*
+ * Copyright (C) 2005 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup libcppc32
+ * @{
+ */
+/** @file
+ */
+#ifndef __LIBC__TYPES_H__
+#define __LIBC__TYPES_H__
+typedef unsigned int sysarg_t;
+typedef unsigned int size_t;
+typedef signed int ssize_t;
+typedef ssize_t off_t;
+typedef char int8_t;
+typedef short int int16_t;
+typedef int int32_t;
+typedef long long int int64_t;
+typedef unsigned char uint8_t;
+typedef unsigned short int uint16_t;
+typedef unsigned int uint32_t;
+typedef unsigned long long int uint64_t;
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/uspace/libc/arch/ppc32/include/thread.h
 ,0 → 1,72
+/*
+ * Copyright (C) 2006 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup libcppc32
+ * @{
+ */
+/** @file
+ */
+#ifndef __LIBC__ppc32__THREAD_H__
+#define __LIBC__ppc32__THREAD_H__
+#define PPC_TP_OFFSET 0x7000
+typedef struct {
+    void *pst_data;
+} tcb_t;
+static inline void __tcb_set(tcb_t *tcb)
+{
+    void *tp = tcb;
+    tp += PPC_TP_OFFSET + sizeof(tcb_t);
+    asm volatile (
+        "mr %%r2, %0\n"
+        :
+        : "r" (tp)
+    );
+}
+static inline tcb_t * __tcb_get(void)
+{
+    void * retval;
+    asm volatile (
+        "mr %0, %%r2\n"
+        : "=r" (retval)
+    );
+    return (tcb_t *)(retval - PPC_TP_OFFSET - sizeof(tcb_t));
+}
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/uspace/libc/arch/ppc32/src/thread.c
 ,0 → 1,60
+/*
+ * Copyright (C) 2006 Ondrej Palkovsky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup libcppc32
+ * @{
+ */
+/** @file
+ */
+#include <thread.h>
+#include <malloc.h>
+/** Allocate TLS & TCB for initial module threads
+ *
+ * @param data Start of data section
+ * @return pointer to tcb_t structure
+ *
+ */
+tcb_t * __alloc_tls(void **data, size_t size)
+{
+    tcb_t *result;
+    result = malloc(sizeof(tcb_t) + size);
+    *data = ((void *)result) + sizeof(tcb_t);
+    return result;
+}
+void __free_tls_arch(tcb_t *tcb, size_t size)
+{
+    free(tcb);
+}
+ /** @}
+ */

 /tags/0.2.0.2/uspace/libc/arch/ppc32/src/syscall.c
 ,0 → 1,62
+/*
+ * Copyright (C) 2006 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup libcppc32 ppc32
+  * @brief ppc32 architecture dependent parts of libc
+  * @ingroup lc
+ * @{
+ */
+/** @file
+ */
+#include <libc.h>
+sysarg_t __syscall(const sysarg_t p1, const sysarg_t p2, const sysarg_t p3, const sysarg_t p4, const syscall_t id)
+{
+    register sysarg_t __ppc32_reg_r3 asm("3") = p1;
+    register sysarg_t __ppc32_reg_r4 asm("4") = p2;
+    register sysarg_t __ppc32_reg_r5 asm("5") = p3;
+    register sysarg_t __ppc32_reg_r6 asm("6") = p4;
+    register sysarg_t __ppc32_reg_r7 asm("7") = id;
+    asm volatile (
+        "sc\n"
+        : "=r" (__ppc32_reg_r3)
+        : "r" (__ppc32_reg_r3),
+          "r" (__ppc32_reg_r4),
+          "r" (__ppc32_reg_r5),
+          "r" (__ppc32_reg_r6),
+          "r" (__ppc32_reg_r7)
+    );
+    return __ppc32_reg_r3;
+}
+ /** @}
+ */

 /tags/0.2.0.2/uspace/libc/arch/ppc32/src/entry.s
 ,0 → 1,48
+#
+# Copyright (C) 2006 Martin Decky
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# - Redistributions of source code must retain the above copyright
+#   notice, this list of conditions and the following disclaimer.
+# - Redistributions in binary form must reproduce the above copyright
+#   notice, this list of conditions and the following disclaimer in the
+#   documentation and/or other materials provided with the distribution.
+# - The name of the author may not be used to endorse or promote products
+#   derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+.section .init, "ax"
+.org 0
+.globl __entry
+.globl __entry_driver
+## User-space task entry point
+#
+#
+__entry:
+    bl __main
+    bl __io_init
+    bl main
+    bl __exit
+__entry_driver:
+    bl __main
+    bl main
+    bl __exit

 /tags/0.2.0.2/uspace/libc/arch/ppc32/src/psthread.S
 ,0 → 1,110
+#
+# Copyright (C) 2006 Martin Decky
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# - Redistributions of source code must retain the above copyright
+#   notice, this list of conditions and the following disclaimer.
+# - Redistributions in binary form must reproduce the above copyright
+#   notice, this list of conditions and the following disclaimer in the
+#   documentation and/or other materials provided with the distribution.
+# - The name of the author may not be used to endorse or promote products
+#   derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+.text
+.global context_save
+.global context_restore
+#include <libarch/regname.h>
+#include <libarch/context_offset.h>
+.macro CONTEXT_STORE r
+    stw sp, OFFSET_SP(\r)
+    stw r2, OFFSET_R2(\r)
+    stw r13, OFFSET_R13(\r)
+    stw r14, OFFSET_R14(\r)
+    stw r15, OFFSET_R15(\r)
+    stw r16, OFFSET_R16(\r)
+    stw r17, OFFSET_R17(\r)
+    stw r18, OFFSET_R18(\r)
+    stw r19, OFFSET_R19(\r)
+    stw r20, OFFSET_R20(\r)
+    stw r21, OFFSET_R21(\r)
+    stw r22, OFFSET_R22(\r)
+    stw r23, OFFSET_R23(\r)
+    stw r24, OFFSET_R24(\r)
+    stw r25, OFFSET_R25(\r)
+    stw r26, OFFSET_R26(\r)
+    stw r27, OFFSET_R27(\r)
+    stw r28, OFFSET_R28(\r)
+    stw r29, OFFSET_R29(\r)
+    stw r30, OFFSET_R30(\r)
+    stw r31, OFFSET_R31(\r)
+.endm
+.macro CONTEXT_LOAD r
+    lwz sp, OFFSET_SP(\r)
+    lwz r2, OFFSET_R2(\r)
+    lwz r13, OFFSET_R13(\r)
+    lwz r14, OFFSET_R14(\r)
+    lwz r15, OFFSET_R15(\r)
+    lwz r16, OFFSET_R16(\r)
+    lwz r17, OFFSET_R17(\r)
+    lwz r18, OFFSET_R18(\r)
+    lwz r19, OFFSET_R19(\r)
+    lwz r20, OFFSET_R20(\r)
+    lwz r21, OFFSET_R21(\r)
+    lwz r22, OFFSET_R22(\r)
+    lwz r23, OFFSET_R23(\r)
+    lwz r24, OFFSET_R24(\r)
+    lwz r25, OFFSET_R25(\r)
+    lwz r26, OFFSET_R26(\r)
+    lwz r27, OFFSET_R27(\r)
+    lwz r28, OFFSET_R28(\r)
+    lwz r29, OFFSET_R29(\r)
+    lwz r30, OFFSET_R30(\r)
+    lwz r31, OFFSET_R31(\r)
+.endm
+context_save:
+    CONTEXT_STORE r3
+    mflr r4
+    stw r4, OFFSET_PC(r3)
+    mfcr r4
+    stw r4, OFFSET_CR(r3)
+    # context_save returns 1
+    li r3, 1
+    blr
+context_restore:
+    CONTEXT_LOAD r3
+    lwz r4, OFFSET_CR(r3)
+    mtcr r4
+    lwz r4, OFFSET_PC(r3)
+    mtlr r4
+    # context_restore returns 0
+    li r3, 0
+    blr

 /tags/0.2.0.2/uspace/libc/arch/ppc32/src/thread_entry.s
 ,0 → 1,39
+#
+# Copyright (C) 2006 Martin Decky
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# - Redistributions of source code must retain the above copyright
+#   notice, this list of conditions and the following disclaimer.
+# - Redistributions in binary form must reproduce the above copyright
+#   notice, this list of conditions and the following disclaimer in the
+#   documentation and/or other materials provided with the distribution.
+# - The name of the author may not be used to endorse or promote products
+#   derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+.text
+.globl __thread_entry
+## User-space thread entry point for all but the first threads.
+#
+#
+__thread_entry:
+    b __thread_main
+.end __thread_entry

 /tags/0.2.0.2/uspace/libc/arch/ppc32/Makefile.inc
 ,0 → 1,44
+#
+# Copyright (C) 2006 Martin Decky
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# - Redistributions of source code must retain the above copyright
+#   notice, this list of conditions and the following disclaimer.
+# - Redistributions in binary form must reproduce the above copyright
+#   notice, this list of conditions and the following disclaimer in the
+#   documentation and/or other materials provided with the distribution.
+# - The name of the author may not be used to endorse or promote products
+#   derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+## Toolchain configuration
+#
+TARGET = ppc-linux-gnu
+TOOLCHAIN_DIR = /usr/local/ppc/bin
+ARCH_SOURCES += arch/$(ARCH)/src/syscall.c \
+        arch/$(ARCH)/src/psthread.S \
+        arch/$(ARCH)/src/thread.c
+CFLAGS += -mcpu=powerpc -msoft-float -m32
+AFLAGS += -a32
+LFLAGS += -N
+BFD_NAME = elf32-powerpc
+BFD_ARCH = powerpc:common

 /tags/0.2.0.2/uspace/libc/arch/ppc32/_link.ld.in
 ,0 → 1,47
+STARTUP(../libc/arch/ARCH/src/entry.o)
+ENTRY(__entry)
+PHDRS {
+    text PT_LOAD FLAGS(5);
+    data PT_LOAD FLAGS(6);
+}
+SECTIONS {
+    . = 0x1000;
+    .init ALIGN(0x1000) : SUBALIGN(0x1000) {
+        *(.init);
+    } :text
+    .text : {
+        *(.text);
+        *(.rodata*);
+    } :text
+    .data ALIGN(0x1000) : SUBALIGN(0x1000) {
+        *(.data);
+        *(.sdata);
+    } :data
+    .tdata : {
+        _tdata_start = .;
+        *(.tdata);
+        _tdata_end = .;
+    } :data
+    .tbss : {
+        _tbss_start = .;
+        *(.tbss);
+        _tbss_end = .;
+    } :data
+    .bss : {
+        *(.sbss);
+        *(COMMON);
+        *(.bss);
+    } :data
+    . = ALIGN(0x1000);
+    _heap = .;
+    /DISCARD/ : {
+        *(*);
+    }
+}

 /tags/0.2.0.2/uspace/libc/arch/ppc64/include/context_offset.h
 ,0 → 1,28
+/* struct context */
+#define OFFSET_SP    0x0
+#define OFFSET_PC    0x4
+#define OFFSET_R2    0x8
+#define OFFSET_R13   0xc
+#define OFFSET_R14   0x10
+#define OFFSET_R15   0x14
+#define OFFSET_R16   0x18
+#define OFFSET_R17   0x1c
+#define OFFSET_R18   0x20
+#define OFFSET_R19   0x24
+#define OFFSET_R20   0x28
+#define OFFSET_R21   0x2c
+#define OFFSET_R22   0x30
+#define OFFSET_R23   0x34
+#define OFFSET_R24   0x38
+#define OFFSET_R25   0x3c
+#define OFFSET_R26   0x40
+#define OFFSET_R27   0x44
+#define OFFSET_R28   0x48
+#define OFFSET_R29   0x4c
+#define OFFSET_R30   0x50
+#define OFFSET_R31   0x54
+#define OFFSET_CR    0x58
+ /** @}
+ */

 /tags/0.2.0.2/uspace/libc/arch/ppc64/include/psthread.h
 ,0 → 1,84
+/*
+ * Copyright (C) 2006 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup libcppc64
+ * @{
+ */
+/** @file
+ */
+#ifndef __LIBC__ppc64__PSTHREAD_H__
+#define __LIBC__ppc64__PSTHREAD_H__
+#include <types.h>
+/* We define our own context_set, because we need to set
+ * the TLS pointer to the tcb+0x7000
+ *
+ * See tls_set in thread.h
+ */
+#define context_set(c, _pc, stack, size, ptls)          \
+    (c)->pc = (sysarg_t) (_pc);             \
+    (c)->sp = ((sysarg_t) (stack)) + (size) - SP_DELTA;     \
+    (c)->tls = ((sysarg_t) (ptls)) + 0x7000 + sizeof(tcb_t);
+#define SP_DELTA    16
+typedef struct {
+    uint64_t sp;
+    uint64_t pc;
+    uint64_t tls;
+    uint64_t r13;
+    uint64_t r14;
+    uint64_t r15;
+    uint64_t r16;
+    uint64_t r17;
+    uint64_t r18;
+    uint64_t r19;
+    uint64_t r20;
+    uint64_t r21;
+    uint64_t r22;
+    uint64_t r23;
+    uint64_t r24;
+    uint64_t r25;
+    uint64_t r26;
+    uint64_t r27;
+    uint64_t r28;
+    uint64_t r29;
+    uint64_t r30;
+    uint64_t r31;
+    uint64_t cr;
+} __attribute__ ((packed)) context_t;
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/uspace/libc/arch/ppc64/include/atomic.h
 ,0 → 1,96
+/*
+ * Copyright (C) 2006 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup libcppc64
+ * @{
+ */
+/** @file
+ */
+#ifndef __ppc64_ATOMIC_H__
+#define __ppc64_ATOMIC_H__
+static inline void atomic_inc(atomic_t *val)
+{
+    long tmp;
+    asm __volatile__ (
+        "1:\n"
+        "lwarx %0, 0, %2\n"
+        "addic %0, %0, 1\n"
+        "stwcx. %0, 0, %2\n"
+        "bne- 1b"
+        : "=&r" (tmp), "=m" (val->count)
+        : "r" (&val->count), "m" (val->count)
+        : "cc");
+}
+static inline void atomic_dec(atomic_t *val)
+{
+    long tmp;
+    asm __volatile__(
+        "1:\n"
+        "lwarx %0, 0, %2\n"
+        "addic %0, %0, -1\n"
+        "stwcx. %0, 0, %2\n"
+        "bne- 1b"
+        : "=&r" (tmp), "=m" (val->count)
+        : "r" (&val->count), "m" (val->count)
+        : "cc");
+}
+static inline long atomic_postinc(atomic_t *val)
+{
+    atomic_inc(val);
+    return val->count - 1;
+}
+static inline long atomic_postdec(atomic_t *val)
+{
+    atomic_dec(val);
+    return val->count + 1;
+}
+static inline long atomic_preinc(atomic_t *val)
+{
+    atomic_inc(val);
+    return val->count;
+}
+static inline long atomic_predec(atomic_t *val)
+{
+    atomic_dec(val);
+    return val->count;
+}
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/uspace/libc/arch/ppc64/include/endian.h
 ,0 → 1,48
+/*
+ * Copyright (C) 2006 Josef Cejka
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup libcppc64
+ * @{
+ */
+/** @file
+ */
+#ifndef __ppc64_ENDIAN_H__
+#define __ppc64_ENDIAN_H__
+#ifndef __LIBC__ENDIAN_H__
+# error "Never use <libarch/endian.h> directly - use <endian.h> instead."
+#endif
+#define __BYTE_ORDER __BIG_ENDIAN
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/uspace/libc/arch/ppc64/include/regname.h
 ,0 → 1,189
+/*
+ * Copyright (C) 2006 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup libcppc64
+ * @{
+ */
+/** @file
+ */
+#ifndef __ppc64_REGNAME_H__
+#define __ppc64_REGNAME_H__
+/* Condition Register Bit Fields */
+#define cr0 0
+#define cr1 1
+#define cr2 2
+#define cr3 3
+#define cr4 4
+#define cr5 5
+#define cr6 6
+#define cr7 7
+/* General Purpose Registers (GPRs) */
+#define r0  0
+#define r1  1
+#define r2  2
+#define r3  3
+#define r4  4
+#define r5  5
+#define r6  6
+#define r7  7
+#define r8  8
+#define r9  9
+#define r10 10
+#define r11 11
+#define r12 12
+#define r13 13
+#define r14 14
+#define r15 15
+#define r16 16
+#define r17 17
+#define r18 18
+#define r19 19
+#define r20 20
+#define r21 21
+#define r22 22
+#define r23 23
+#define r24 24
+#define r25 25
+#define r26 26
+#define r27 27
+#define r28 28
+#define r29 29
+#define r30 30
+#define r31 31
+/* GPR Aliases */
+#define sp  1
+/* Floating Point Registers (FPRs) */
+#define fr0     0
+#define fr1     1
+#define fr2     2
+#define fr3     3
+#define fr4     4
+#define fr5     5
+#define fr6     6
+#define fr7     7
+#define fr8     8
+#define fr9     9
+#define fr10    10
+#define fr11    11
+#define fr12    12
+#define fr13    13
+#define fr14    14
+#define fr15    15
+#define fr16    16
+#define fr17    17
+#define fr18    18
+#define fr19    19
+#define fr20    20
+#define fr21    21
+#define fr22    22
+#define fr23    23
+#define fr24    24
+#define fr25    25
+#define fr26    26
+#define fr27    27
+#define fr28    28
+#define fr29    29
+#define fr30    30
+#define fr31    31
+#define vr0     0
+#define vr1     1
+#define vr2     2
+#define vr3     3
+#define vr4     4
+#define vr5     5
+#define vr6     6
+#define vr7     7
+#define vr8     8
+#define vr9     9
+#define vr10    10
+#define vr11    11
+#define vr12    12
+#define vr13    13
+#define vr14    14
+#define vr15    15
+#define vr16    16
+#define vr17    17
+#define vr18    18
+#define vr19    19
+#define vr20    20
+#define vr21    21
+#define vr22    22
+#define vr23    23
+#define vr24    24
+#define vr25    25
+#define vr26    26
+#define vr27    27
+#define vr28    28
+#define vr29    29
+#define vr30    30
+#define vr31    31
+#define evr0    0
+#define evr1    1
+#define evr2    2
+#define evr3    3
+#define evr4    4
+#define evr5    5
+#define evr6    6
+#define evr7    7
+#define evr8    8
+#define evr9    9
+#define evr10   10
+#define evr11   11
+#define evr12   12
+#define evr13   13
+#define evr14   14
+#define evr15   15
+#define evr16   16
+#define evr17   17
+#define evr18   18
+#define evr19   19
+#define evr20   20
+#define evr21   21
+#define evr22   22
+#define evr23   23
+#define evr24   24
+#define evr25   25
+#define evr26   26
+#define evr27   27
+#define evr28   28
+#define evr29   29
+#define evr30   30
+#define evr31   31
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/uspace/libc/arch/ppc64/include/stackarg.h
 ,0 → 1,43
+/*
+ * Copyright (C) 2006 Josef Cejka
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup libcppc64
+ * @{
+ */
+/** @file
+ */
+#ifndef __LIBC__STACKARG_H__
+#define __LIBC__STACKARG_H__
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/uspace/libc/arch/ppc64/include/limits.h
 ,0 → 1,47
+/*
+ * Copyright (C) 2006 Josef Cejka
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup libcppc64
+ * @{
+ */
+/** @file
+ */
+#ifndef __ppc64__LIMITS_H__
+#define __ppc64__LIMITS_H__
+#define LONG_MIN MIN_INT64
+#define LONG_MAX MAX_INT64
+#define ULONG_MIN MIN_UINT64
+#define ULONG_MAX MAX_UINT64
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/uspace/libc/arch/ppc64/include/types.h
 ,0 → 1,57
+/*
+ * Copyright (C) 2006 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup libcppc64
+ * @{
+ */
+/** @file
+ */
+#ifndef __LIBC__TYPES_H__
+#define __LIBC__TYPES_H__
+typedef unsigned long sysarg_t;
+typedef unsigned long size_t;
+typedef signed long ssize_t;
+typedef ssize_t off_t;
+typedef char int8_t;
+typedef short int int16_t;
+typedef int int32_t;
+typedef long int int64_t;
+typedef unsigned char uint8_t;
+typedef unsigned short int uint16_t;
+typedef unsigned int uint32_t;
+typedef unsigned long int uint64_t;
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/uspace/libc/arch/ppc64/include/thread.h
 ,0 → 1,72
+/*
+ * Copyright (C) 2006 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup libcppc64
+ * @{
+ */
+/** @file
+ */
+#ifndef __LIBC__ppc64__THREAD_H__
+#define __LIBC__ppc64__THREAD_H__
+#define PPC_TP_OFFSET 0x7000
+typedef struct {
+    void *pst_data;
+} tcb_t;
+static inline void __tcb_set(tcb_t *tcb)
+{
+    void *tp = tcb;
+    tp += PPC_TP_OFFSET + sizeof(tcb_t);
+    asm volatile (
+        "mr %%r2, %0\n"
+        :
+        : "r" (tp)
+    );
+}
+static inline tcb_t * __tcb_get(void)
+{
+    void * retval;
+    asm volatile (
+        "mr %0, %%r2\n"
+        : "=r" (retval)
+    );
+    return (tcb_t *)(retval - PPC_TP_OFFSET - sizeof(tcb_t));
+}
+#endif
+ /** @}
+ */

 /tags/0.2.0.2/uspace/libc/arch/ppc64/src/thread.c
 ,0 → 1,61
+/*
+ * Copyright (C) 2006 Ondrej Palkovsky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup libcppc64
+ * @{
+ */
+/** @file
+ */
+#include <thread.h>
+#include <malloc.h>
+/** Allocate TLS & TCB for initial module threads
+ *
+ * @param data Start of data section
+ * @return pointer to tcb_t structure
+ *
+ */
+tcb_t * __alloc_tls(void **data, size_t size)
+{
+    tcb_t *tcb;
+    *data = malloc(sizeof(tcb_t) + size);
+    tcb = (tcb_t *) (*data + size);
+    return tcb;
+}
+void __free_tls_arch(tcb_t *tcb, size_t size)
+{
+    void *start = ((void *) tcb) - size;
+    free(start);
+}
+ /** @}
+ */

 /tags/0.2.0.2/uspace/libc/arch/ppc64/src/syscall.c
 ,0 → 1,62
+/*
+ * Copyright (C) 2006 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /** @addtogroup libcppc64 ppc64
+  * @brief ppc64 architecture dependent parts of libc
+  * @ingroup lc
+ * @{
+ */
+/** @file
+ */
+#include <libc.h>
+sysarg_t __syscall(const sysarg_t p1, const sysarg_t p2, const sysarg_t p3, const sysarg_t p4, const syscall_t id)
+{
+    register sysarg_t __ppc32_reg_r3 asm("3") = p1;
+    register sysarg_t __ppc32_reg_r4 asm("4") = p2;
+    register sysarg_t __ppc32_reg_r5 asm("5") = p3;
+    register sysarg_t __ppc32_reg_r6 asm("6") = p4;
+    register sysarg_t __ppc32_reg_r7 asm("7") = id;
+    asm volatile (
+        "sc\n"
+        : "=r" (__ppc32_reg_r3)
+        : "r" (__ppc32_reg_r3),
+          "r" (__ppc32_reg_r4),
+          "r" (__ppc32_reg_r5),
+          "r" (__ppc32_reg_r6),
+          "r" (__ppc32_reg_r7)
+    );
+    return __ppc32_reg_r3;
+}
+ /** @}
+ */

 /tags/0.2.0.2/uspace/libc/arch/ppc64/src/entry.s
 ,0 → 1,48
+#
+# Copyright (C) 2006 Martin Decky
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# - Redistributions of source code must retain the above copyright
+#   notice, this list of conditions and the following disclaimer.
+# - Redistributions in binary form must reproduce the above copyright
+#   notice, this list of conditions and the following disclaimer in the
+#   documentation and/or other materials provided with the distribution.
+# - The name of the author may not be used to endorse or promote products
+#   derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+.section .init, "ax"
+.org 0
+.globl __entry
+.globl __entry_driver
+## User-space task entry point
+#
+#
+__entry:
+    bl __main
+    bl __io_init
+    bl main
+    bl __exit
+__entry_driver:
+    bl __main
+    bl main
+    bl __exit

 /tags/0.2.0.2/uspace/libc/arch/ppc64/src/thread_entry.s
 ,0 → 1,39
+#
+# Copyright (C) 2006 Martin Decky
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# - Redistributions of source code must retain the above copyright
+#   notice, this list of conditions and the following disclaimer.
+# - Redistributions in binary form must reproduce the above copyright
+#   notice, this list of conditions and the following disclaimer in the
+#   documentation and/or other materials provided with the distribution.
+# - The name of the author may not be used to endorse or promote products
+#   derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+.text
+.globl __thread_entry
+## User-space thread entry point for all but the first threads.
+#
+#
+__thread_entry:
+    b __thread_main
+.end __thread_entry

 /tags/0.2.0.2/uspace/libc/arch/ppc64/src/psthread.S
 ,0 → 1,110
+#
+# Copyright (C) 2006 Martin Decky
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# - Redistributions of source code must retain the above copyright
+#   notice, this list of conditions and the following disclaimer.
+# - Redistributions in binary form must reproduce the above copyright
+#   notice, this list of conditions and the following disclaimer in the
+#   documentation and/or other materials provided with the distribution.
+# - The name of the author may not be used to endorse or promote products
+#   derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+.text
+.global context_save
+.global context_restore
+#include <libarch/regname.h>
+#include <libarch/context_offset.h>
+.macro CONTEXT_STORE r
+    stw sp, OFFSET_SP(\r)
+    stw r2, OFFSET_R2(\r)
+    stw r13, OFFSET_R13(\r)
+    stw r14, OFFSET_R14(\r)
+    stw r15, OFFSET_R15(\r)
+    stw r16, OFFSET_R16(\r)
+    stw r17, OFFSET_R17(\r)
+    stw r18, OFFSET_R18(\r)
+    stw r19, OFFSET_R19(\r)
+    stw r20, OFFSET_R20(\r)
+    stw r21, OFFSET_R21(\r)
+    stw r22, OFFSET_R22(\r)
+    stw r23, OFFSET_R23(\r)
+    stw r24, OFFSET_R24(\r)
+    stw r25, OFFSET_R25(\r)
+    stw r26, OFFSET_R26(\r)
+    stw r27, OFFSET_R27(\r)
+    stw r28, OFFSET_R28(\r)
+    stw r29, OFFSET_R29(\r)
+    stw r30, OFFSET_R30(\r)
+    stw r31, OFFSET_R31(\r)
+.endm
+.macro CONTEXT_LOAD r
+    lwz sp, OFFSET_SP(\r)
+    lwz r2, OFFSET_R2(\r)
+    lwz r13, OFFSET_R13(\r)
+    lwz r14, OFFSET_R14(\r)
+    lwz r15, OFFSET_R15(\r)
+    lwz r16, OFFSET_R16(\r)
+    lwz r17, OFFSET_R17(\r)
+    lwz r18, OFFSET_R18(\r)
+    lwz r19, OFFSET_R19(\r)
+    lwz r20, OFFSET_R20(\r)
+    lwz r21, OFFSET_R21(\r)
+    lwz r22, OFFSET_R22(\r)
+    lwz r23, OFFSET_R23(\r)
+    lwz r24, OFFSET_R24(\r)
+    lwz r25, OFFSET_R25(\r)
+    lwz r26, OFFSET_R26(\r)
+    lwz r27, OFFSET_R27(\r)
+    lwz r28, OFFSET_R28(\r)
+    lwz r29, OFFSET_R29(\r)
+    lwz r30, OFFSET_R30(\r)
+    lwz r31, OFFSET_R31(\r)
+.endm
+context_save:
+    CONTEXT_STORE r3
+    mflr r4
+    stw r4, OFFSET_PC(r3)
+    mfcr r4
+    stw r4, OFFSET_CR(r3)
+    # context_save returns 1
+    li r3, 1
+    blr
+context_restore:
+    CONTEXT_LOAD r3
+    lwz r4, OFFSET_CR(r3)
+    mtcr r4
+    lwz r4, OFFSET_PC(r3)
+    mtlr r4
+    # context_restore returns 0
+    li r3, 0
+    blr

 /tags/0.2.0.2/uspace/libc/arch/ppc64/_link.ld.in
 ,0 → 1,49
+STARTUP(../libc/arch/ARCH/src/entry.o)
+ENTRY(__entry)
+PHDRS {
+    text PT_LOAD FLAGS(5);
+    data PT_LOAD FLAGS(6);
+}
+SECTIONS {
+    . = 0x1000;
+    .init ALIGN(0x1000) : SUBALIGN(0x1000) {
+        *(.init);
+    } :text
+    .text : {
+        *(.text);
+        *(.toc);
+        *(.rodata*);
+    } :text
+    .data ALIGN(0x1000) : SUBALIGN(0x1000) {
+        *(.opd);
+        *(.data*);
+        *(.sdata);
+    } :data
+    .tdata : {
+        _tdata_start = .;
+        *(.tdata);
+        _tdata_end = .;
+    } :data
+    .tbss : {
+        _tbss_start = .;
+        *(.tbss);
+        _tbss_end = .;
+    } :data
+    .bss : {
+        *(.sbss);
+        *(COMMON);
+        *(.bss);
+    } :data
+    . = ALIGN(0x1000);
+    _heap = .;
+    /DISCARD/ : {
+        *(*);
+    }
+}

 /tags/0.2.0.2/uspace/libc/arch/ppc64/Makefile.inc
 ,0 → 1,41
+#
+# Copyright (C) 2006 Martin Decky
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# - Redistributions of source code must retain the above copyright
+#   notice, this list of conditions and the following disclaimer.
+# - Redistributions in binary form must reproduce the above copyright
+#   notice, this list of conditions and the following disclaimer in the
+#   documentation and/or other materials provided with the distribution.
+# - The name of the author may not be used to endorse or promote products
+#   derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+## Toolchain configuration
+#
+TARGET = ppc64-linux-gnu
+TOOLCHAIN_DIR = /usr/local/ppc64/bin
+ARCH_SOURCES += arch/$(ARCH)/src/syscall.c \
+        arch/$(ARCH)/src/psthread.S \
+        arch/$(ARCH)/src/thread.c
+CFLAGS += -mcpu=powerpc64 -msoft-float -m64
+AFLAGS += -a64
+LFLAGS += -N

 /tags/0.2.0.2/uspace/libc/Makefile
 ,0 → 1,115
+#
+# Copyright (C) 2005 Martin Decky
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# - Redistributions of source code must retain the above copyright
+#   notice, this list of conditions and the following disclaimer.
+# - Redistributions in binary form must reproduce the above copyright
+#   notice, this list of conditions and the following disclaimer in the
+#   documentation and/or other materials provided with the distribution.
+# - The name of the author may not be used to endorse or promote products
+#   derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+## Common compiler flags
+#
+LIBC_PREFIX = .
+SOFTINT_PREFIX = ../softint
+CONSOLE_PREFIX = ../console
+## Setup toolchain
+#
+include $(LIBC_PREFIX)/Makefile.toolchain
+CFLAGS += -I$(CONSOLE_PREFIX)
+## Sources
+#
+GENERIC_SOURCES = \
+    generic/libc.c \
+    generic/ddi.c \
+    generic/as.c \
+    generic/cap.c \
+    generic/string.c \
+    generic/thread.c \
+    generic/task.c \
+    generic/futex.c \
+    generic/io/io.c \
+    generic/io/printf.c \
+    generic/io/stream.c \
+    generic/io/sprintf.c \
+    generic/io/snprintf.c \
+    generic/io/vprintf.c \
+    generic/io/vsprintf.c \
+    generic/io/vsnprintf.c \
+    generic/io/printf_core.c \
+    malloc/malloc.c \
+    generic/psthread.c \
+    generic/sysinfo.c \
+    generic/ipc.c \
+    generic/async.c \
+    generic/libadt/list.o \
+    generic/libadt/hash_table.o \
+    generic/time.c \
+    generic/err.c \
+    generic/stdlib.c \
+    generic/mmap.c
+ARCH_SOURCES += \
+    arch/$(ARCH)/src/entry.s \
+    arch/$(ARCH)/src/thread_entry.s
+GENERIC_OBJECTS := $(addsuffix .o,$(basename $(GENERIC_SOURCES)))
+ARCH_OBJECTS := $(addsuffix .o,$(basename $(ARCH_SOURCES)))
+.PHONY: all clean depend kerninc
+all: kerninc libc.a arch/$(ARCH)/_link.ld
+kerninc:
+    ln -sfn ../../../kernel/generic/include include/kernel
+    ln -sfn kernel/arch include/arch
+    ln -sfn ../arch/$(ARCH)/include include/libarch
+-include Makefile.depend
+clean:
+    -rm -f include/kernel include/arch include/libarch libc.a arch/$(ARCH)/_link.ld Makefile.depend
+    find generic/ arch/$(ARCH)/ -name '*.o' -follow -exec rm \{\} \;
+depend: kerninc
+    -makedepend $(DEFS) $(CFLAGS) -f - $(ARCH_SOURCES) $(GENERIC_SOURCES) > Makefile.depend 2> /dev/null
+libc.a: depend $(ARCH_OBJECTS) $(GENERIC_OBJECTS)
+    $(AR) rc libc.a $(LIBS) $(ARCH_OBJECTS) $(GENERIC_OBJECTS)
+arch/$(ARCH)/_link.ld: arch/$(ARCH)/_link.ld.in
+    $(CC) $(DEFS) $(CFLAGS) -E -x c $< | grep -v "^\#" > $@
+%.o: %.S
+    $(CC) $(DEFS) $(AFLAGS) $(CFLAGS) -D__ASM__ -c $< -o $@
+%.o: %.s
+    $(AS) $(AFLAGS) $< -o $@
+%.o: %.c
+    $(CC) $(DEFS) $(CFLAGS) -c $< -o $@

 /tags/0.2.0.2/uspace/tetris/input.c
 ,0 → 1,187
+/*  $OpenBSD: input.c,v 1.12 2005/04/13 02:33:08 deraadt Exp $  */
+/*    $NetBSD: input.c,v 1.3 1996/02/06 22:47:33 jtc Exp $    */
+/*-
+ * Copyright (c) 1992, 1993
+ *  The Regents of the University of California.  All rights reserved.
+ *
+ * This code is derived from software contributed to Berkeley by
+ * Chris Torek and Darren F. Provine.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the University nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ *  @(#)input.c 8.1 (Berkeley) 5/31/93
+ */
+/** @addtogroup tetris
+ * @{
+ */
+/** @file
+ */
+/*
+ * Tetris input.
+ */
+#include <sys/types.h>
+#include <sys/time.h>
+#include <stdio.h>
+#include <errno.h>
+#include <unistd.h>
+#include <string.h>
+#include "input.h"
+#include "tetris.h"
+#include <async.h>
+#include "../console/console.h"
+/* return true iff the given timeval is positive */
+#define TV_POS(tv) \
+    ((tv)->tv_sec > 0 || ((tv)->tv_sec == 0 && (tv)->tv_usec > 0))
+/* subtract timeval `sub' from `res' */
+#define TV_SUB(res, sub) \
+    (res)->tv_sec -= (sub)->tv_sec; \
+    (res)->tv_usec -= (sub)->tv_usec; \
+    if ((res)->tv_usec < 0) { \
+        (res)->tv_usec += 1000000; \
+        (res)->tv_sec--; \
+    }
+/* We will use a hack here - if lastchar is non-zero, it is
+ * the last character read. We will somehow simulate the select
+ * semantics.
+ */
+static aid_t getchar_inprog = 0;
+static char lastchar = '\0';
+/*
+ * Do a `read wait': select for reading from stdin, with timeout *tvp.
+ * On return, modify *tvp to reflect the amount of time spent waiting.
+ * It will be positive only if input appeared before the time ran out;
+ * otherwise it will be zero or perhaps negative.
+ *
+ * If tvp is nil, wait forever, but return if select is interrupted.
+ *
+ * Return 0 => no input, 1 => can read() from stdin
+ *
+ */
+int
+rwait(struct timeval *tvp)
+{
+    struct timeval starttv, endtv, *s;
+    static ipc_call_t charcall;
+    ipcarg_t rc;
+    /*
+     * Someday, select() will do this for us.
+     * Just in case that day is now, and no one has
+     * changed this, we use a temporary.
+     */
+    if (tvp) {
+        (void) gettimeofday(&starttv, NULL);
+        endtv = *tvp;
+        s = &endtv;
+    } else
+        s = NULL;
+    if (!lastchar) {
+        if (!getchar_inprog)
+            getchar_inprog = async_send_2(1,CONSOLE_GETCHAR,0,0,&charcall);
+        if (!s)
+            async_wait_for(getchar_inprog, &rc);
+        else if (async_wait_timeout(getchar_inprog, &rc, s->tv_usec) == ETIMEOUT) {
+            tvp->tv_sec = 0;
+            tvp->tv_usec = 0;
+            return (0);
+        }
+        getchar_inprog = 0;
+        if (rc) {
+            stop("end of file, help");
+        }
+        lastchar = IPC_GET_ARG1(charcall);
+    }
+    if (tvp) {
+        /* since there is input, we may not have timed out */
+        (void) gettimeofday(&endtv, NULL);
+        TV_SUB(&endtv, &starttv);
+        TV_SUB(tvp, &endtv);    /* adjust *tvp by elapsed time */
+    }
+    return (1);
+}
+/*
+ * `sleep' for the current turn time (using select).
+ * Eat any input that might be available.
+ */
+void
+tsleep(void)
+{
+    struct timeval tv;
+    tv.tv_sec = 0;
+    tv.tv_usec = fallrate;
+    while (TV_POS(&tv))
+        if (rwait(&tv)) {
+            lastchar = '\0';
+        } else
+            break;
+}
+/*
+ * getchar with timeout.
+ */
+int
+tgetchar(void)
+{
+    static struct timeval timeleft;
+    char c;
+    /*
+     * Reset timeleft to fallrate whenever it is not positive.
+     * In any case, wait to see if there is any input.  If so,
+     * take it, and update timeleft so that the next call to
+     * tgetchar() will not wait as long.  If there is no input,
+     * make timeleft zero or negative, and return -1.
+     *
+     * Most of the hard work is done by rwait().
+     */
+    if (!TV_POS(&timeleft)) {
+        faster();   /* go faster */
+        timeleft.tv_sec = 0;
+        timeleft.tv_usec = fallrate;
+    }
+    if (!rwait(&timeleft))
+        return (-1);
+    c = lastchar;
+    lastchar = '\0';
+    return ((int)(unsigned char)c);
+}
+/** @}
+ */

 /tags/0.2.0.2/uspace/tetris/screen.c
 ,0 → 1,312
+/*  $OpenBSD: screen.c,v 1.13 2006/04/20 03:25:36 ray Exp $ */
+/*  $NetBSD: screen.c,v 1.4 1995/04/29 01:11:36 mycroft Exp $   */
+/*-
+ * Copyright (c) 1992, 1993
+ *  The Regents of the University of California.  All rights reserved.
+ *
+ * This code is derived from software contributed to Berkeley by
+ * Chris Torek and Darren F. Provine.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the University nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ *  @(#)screen.c    8.1 (Berkeley) 5/31/93
+ */
+/** @addtogroup tetris
+ * @{
+ */
+/** @file
+ */
+/*
+ * Tetris screen control.
+ */
+#include <err.h>
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+#include <unistd.h>
+#include <io/stream.h>
+#include <async.h>
+#include "screen.h"
+#include "tetris.h"
+#include "../console/console.h"
+static cell curscreen[B_SIZE];  /* 1 => standout (or otherwise marked) */
+static int curscore;
+static int isset;       /* true => terminal is in game mode */
+/*
+ * putstr() is for unpadded strings (either as in termcap(5) or
+ * simply literal strings);
+ */
+static inline void putstr(char *s)
+{
+    while (*s)
+        putchar(*(s++));
+}
+static int con_phone;
+static void set_style(int fgcolor, int bgcolor)
+{
+    async_msg_2(con_phone, CONSOLE_SET_STYLE, fgcolor, bgcolor);
+}
+static void start_standout(void)
+{
+    set_style(0xf0f0f0, 0);
+}
+static void resume_normal(void)
+{
+    set_style(0, 0xf0f0f0);
+}
+void clear_screen(void)
+{
+    async_msg(con_phone, CONSOLE_CLEAR, 0);
+    moveto(0,0);
+}
+/*
+ * Clear the screen, forgetting the current contents in the process.
+ */
+void
+scr_clear(void)
+{
+    resume_normal();
+    async_msg(con_phone, CONSOLE_CLEAR, 0);
+    curscore = -1;
+    memset((char *)curscreen, 0, sizeof(curscreen));
+}
+/*
+ * Set up screen
+ */
+void
+scr_init(void)
+{
+    con_phone = get_fd_phone(1);
+    async_msg(con_phone, CONSOLE_CURSOR_VISIBILITY, 0);
+    resume_normal();
+    scr_clear();
+}
+void moveto(int r, int c)
+{
+    async_msg_2(con_phone, CONSOLE_GOTO, r, c);
+}
+static void fflush(void)
+{
+    async_msg(con_phone, CONSOLE_FLUSH, 0);
+}
+winsize_t winsize;
+static int get_display_size(winsize_t *ws)
+{
+    return async_req_2(con_phone, CONSOLE_GETSIZE, 0, 0, &ws->ws_row, &ws->ws_col);
+}
+/*
+ * Set up screen mode.
+ */
+void
+scr_set(void)
+{
+    winsize_t ws;
+    Rows = 0, Cols = 0;
+    if (get_display_size(&ws) == 0) {
+        Rows = ws.ws_row;
+        Cols = ws.ws_col;
+    }
+    if (Rows < MINROWS || Cols < MINCOLS) {
+        char smallscr[55];
+        snprintf(smallscr, sizeof(smallscr),
+            "the screen is too small (must be at least %dx%d)",
+            MINROWS, MINCOLS);
+        stop(smallscr);
+    }
+    isset = 1;
+    scr_clear();
+}
+/*
+ * End screen mode.
+ */
+void
+scr_end(void)
+{
+}
+void
+stop(char *why)
+{
+    if (isset)
+        scr_end();
+    errx(1, "aborting: %s", why);
+}
+/*
+ * Update the screen.
+ */
+void
+scr_update(void)
+{
+    cell *bp, *sp;
+    cell so, cur_so = 0;
+    int i, ccol, j;
+    static const struct shape *lastshape;
+    /* always leave cursor after last displayed point */
+    curscreen[D_LAST * B_COLS - 1] = -1;
+    if (score != curscore) {
+        moveto(0, 0);
+        printf("Score: %d", score);
+        curscore = score;
+    }
+    /* draw preview of next pattern */
+    if (showpreview && (nextshape != lastshape)) {
+        int i;
+        static int r=5, c=2;
+        int tr, tc, t;
+        lastshape = nextshape;
+        /* clean */
+        resume_normal();
+        moveto(r-1, c-1); putstr("          ");
+        moveto(r,   c-1); putstr("          ");
+        moveto(r+1, c-1); putstr("          ");
+        moveto(r+2, c-1); putstr("          ");
+        moveto(r-3, c-2);
+        putstr("Next shape:");
+        /* draw */
+        start_standout();
+        moveto(r, 2 * c);
+        putstr("  ");
+        for (i = 0; i < 3; i++) {
+            t = c + r * B_COLS;
+            t += nextshape->off[i];
+            tr = t / B_COLS;
+            tc = t % B_COLS;
+            moveto(tr, 2*tc);
+            putstr("  ");
+        }
+        resume_normal();
+    }
+    bp = &board[D_FIRST * B_COLS];
+    sp = &curscreen[D_FIRST * B_COLS];
+    for (j = D_FIRST; j < D_LAST; j++) {
+        ccol = -1;
+        for (i = 0; i < B_COLS; bp++, sp++, i++) {
+            if (*sp == (so = *bp))
+                continue;
+            *sp = so;
+            if (i != ccol) {
+                if (cur_so) {
+                    resume_normal();
+                    cur_so = 0;
+                }
+                moveto(RTOD(j), CTOD(i));
+            }
+            if (so != cur_so) {
+                if (so)
+                    start_standout();
+                else
+                    resume_normal();
+                cur_so = so;
+            }
+            putstr("  ");
+            ccol = i + 1;
+            /*
+             * Look ahead a bit, to avoid extra motion if
+             * we will be redrawing the cell after the next.
+             * Motion probably takes four or more characters,
+             * so we save even if we rewrite two cells
+             * `unnecessarily'.  Skip it all, though, if
+             * the next cell is a different color.
+             */
+#define STOP (B_COLS - 3)
+            if (i > STOP || sp[1] != bp[1] || so != bp[1])
+                continue;
+            if (sp[2] != bp[2])
+                sp[1] = -1;
+            else if (i < STOP && so == bp[2] && sp[3] != bp[3]) {
+                sp[2] = -1;
+                sp[1] = -1;
+            }
+        }
+    }
+    if (cur_so)
+        resume_normal();
+    fflush();
+}
+/*
+ * Write a message (set!=0), or clear the same message (set==0).
+ * (We need its length in case we have to overwrite with blanks.)
+ */
+void
+scr_msg(char *s, int set)
+{
+    int l = strlen(s);
+    moveto(Rows - 2, ((Cols - l) >> 1) - 1);
+    if (set)
+        putstr(s);
+    else
+        while (--l >= 0)
+            (void) putchar(' ');
+}
+/** @}
+ */

 /tags/0.2.0.2/uspace/tetris/tetris.c
 ,0 → 1,469
+/*  $OpenBSD: tetris.c,v 1.21 2006/04/20 03:24:12 ray Exp $ */
+/*  $NetBSD: tetris.c,v 1.2 1995/04/22 07:42:47 cgd Exp $   */
+/*-
+ * Copyright (c) 1992, 1993
+ *  The Regents of the University of California.  All rights reserved.
+ *
+ * This code is derived from software contributed to Berkeley by
+ * Chris Torek and Darren F. Provine.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the University nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ *  @(#)tetris.c    8.1 (Berkeley) 5/31/93
+ */
+/** @addtogroup tetris Tetris
+ * @brief   Tetris ported from OpenBSD
+ * @{
+ */
+/** @file
+ */
+#ifndef lint
+static const char copyright[] =
+"@(#) Copyright (c) 1992, 1993\n\
+    The Regents of the University of California.  All rights reserved.\n";
+#endif /* not lint */
+/*
+ * Tetris (or however it is spelled).
+ */
+#include <sys/time.h>
+#include <sys/types.h>
+#include <err.h>
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+#include <unistd.h>
+#include "input.h"
+#include "scores.h"
+#include "screen.h"
+#include "tetris.h"
+cell    board[B_SIZE];
+int Rows, Cols;
+const struct shape *curshape;
+const struct shape *nextshape;
+long    fallrate;
+int score;
+//gid_t gid, egid;
+char    key_msg[100];
+int showpreview, classic;
+static void elide(void);
+static void setup_board(void);
+const struct shape *randshape(void);
+void    onintr(int);
+void    usage(void);
+/*
+ * Set up the initial board.  The bottom display row is completely set,
+ * along with another (hidden) row underneath that.  Also, the left and
+ * right edges are set.
+ */
+static void
+setup_board(void)
+{
+    int i;
+    cell *p;
+    p = board;
+    for (i = B_SIZE; i; i--)
+        *p++ = i <= (2 * B_COLS) || (i % B_COLS) < 2;
+}
+/*
+ * Elide any full active rows.
+ */
+static void
+elide(void)
+{
+    int rows = 0;
+    int i, j, base;
+    cell *p;
+    for (i = A_FIRST; i < A_LAST; i++) {
+        base = i * B_COLS + 1;
+        p = &board[base];
+        for (j = B_COLS - 2; *p++ != 0;) {
+            if (--j <= 0) {
+                /* this row is to be elided */
+                rows++;
+                memset(&board[base], 0, B_COLS - 2);
+                scr_update();
+                tsleep();
+                while (--base != 0)
+                    board[base + B_COLS] = board[base];
+                scr_update();
+                tsleep();
+                break;
+            }
+        }
+    }
+    switch (rows) {
+    case 1:
+        score += 10;
+        break;
+    case 2:
+        score += 30;
+        break;
+    case 3:
+        score += 70;
+        break;
+    case 4:
+        score += 150;
+        break;
+    default:
+        break;
+    }
+}
+const struct shape *
+randshape(void)
+{
+    const struct shape *tmp;
+    int i, j;
+    tmp = &shapes[random() % 7];
+    j = random() % 4;
+    for (i = 0; i < j; i++)
+        tmp = &shapes[classic? tmp->rotc : tmp->rot];
+    return (tmp);
+}
+static void srandomdev(void)
+{
+    struct timeval tv;
+    gettimeofday(&tv, NULL);
+    srandom(tv.tv_sec + tv.tv_usec / 100000);
+}
+static void tetris_menu_draw(int level)
+{
+        clear_screen();
+        moveto(5,10);
+        puts("Tetris\n\n");
+        moveto(8,10);
+        printf("Level = %d (press keys 1 - 9 to change)",level);
+        moveto(9,10);
+        printf("Preview is %s (press 'p' to change)", (showpreview?"on ":"off"));
+        moveto(12,10);
+        printf("Press 'h' to show hiscore table.");
+        moveto(13,10);
+        printf("Press 's' to start game.");
+        moveto(14,10);
+        printf("Press 'q' to quit game.");
+        moveto(20,10);
+        printf("In game controls:");
+        moveto(21,0);
+        puts(key_msg);
+}
+static int tetris_menu(int *level)
+{
+    static int firstgame = 1;
+    int i;
+/*  if (showpreview == 0)
+        (void)printf("Your score:  %d point%s  x  level %d  =  %d\n",
+            score, score == 1 ? "" : "s", level, score * level);
+    else {
+        (void)printf("Your score:  %d point%s x level %d x preview penalty %0.3f = %d\n",
+            score, score == 1 ? "" : "s", level, (double)PRE_PENALTY,
+            (int)(score * level * PRE_PENALTY));
+        score = score * PRE_PENALTY;
+    }
+    savescore(level);
+    showscores(level);
+    printf("\nHit 's' to new game, 'q' to quit.\n");
+*/
+    tetris_menu_draw(*level);
+    while (1) {
+        i = getchar();
+        switch(i) {
+            case 'p':
+                showpreview = !showpreview;
+                moveto(9,21);
+                if (showpreview)
+                    printf("on ");
+                else
+                    printf("off");
+                break;
+            case 'h':
+                showscores(firstgame);
+                tetris_menu_draw(*level);
+                break;
+            case 's':
+                firstgame = 0;
+                return 1;
+            case 'q':
+                return 0;
+            case '1':
+            case '2':
+            case '3':
+            case '4':
+            case '5':
+            case '6':
+            case '7':
+            case '8':
+            case '9':
+                *level = i - '0';
+                moveto(8,18);
+                printf("%d", *level);
+                break;
+        }
+    }
+}
+int
+main(int argc, char *argv[])
+{
+    int pos, c;
+    char *keys;
+    int level = 2;
+    char key_write[6][10];
+    int i, j;
+    keys = "jkl pq";
+//  gid = getgid();
+//  egid = getegid();
+//  setegid(gid);
+    classic = 0;
+    showpreview = 1;
+/*  while ((ch = getopt(argc, argv, "ck:l:ps")) != -1) */
+/*      switch(ch) { */
+/*      case 'c': */
+/*          /\* */
+/*           * this means: */
+/*           *  - rotate the other way; */
+/*           *  - no reverse video. */
+/*           *\/ */
+/*          classic = 1; */
+/*          break; */
+/*      case 'k': */
+/*          if (strlen(keys = optarg) != 6) */
+/*              usage(); */
+/*          break; */
+/*      case 'l': */
+/*          level = (int)strtonum(optarg, MINLEVEL, MAXLEVEL, */
+/*              &errstr); */
+/*          if (errstr) */
+/*              errx(1, "level must be from %d to %d", */
+/*                  MINLEVEL, MAXLEVEL); */
+/*          break; */
+/*      case 'p': */
+/*          showpreview = 1; */
+/*          break; */
+/*      case 's': */
+/*          showscores(0); */
+/*          exit(0); */
+/*      default: */
+/*          usage(); */
+/*      } */
+/*  argc -= optind; */
+/*  argv += optind; */
+/*  if (argc) */
+/*      usage(); */
+    for (i = 0; i <= 5; i++) {
+        for (j = i+1; j <= 5; j++) {
+            if (keys[i] == keys[j])
+                errx(1, "duplicate command keys specified.");
+        }
+        if (keys[i] == ' ')
+            strncpy(key_write[i], "<space>", sizeof key_write[i]);
+        else {
+            key_write[i][0] = keys[i];
+            key_write[i][1] = '\0';
+        }
+    }
+    snprintf(key_msg, sizeof key_msg,
+"%s - left   %s - rotate   %s - right   %s - drop   %s - pause   %s - quit",
+        key_write[0], key_write[1], key_write[2], key_write[3],
+        key_write[4], key_write[5]);
+    scr_init();
+    initscores();
+    while (tetris_menu(&level)) {
+        fallrate = 1000000 / level;
+        scr_clear();
+        setup_board();
+        srandomdev();
+        scr_set();
+        pos = A_FIRST*B_COLS + (B_COLS/2)-1;
+        nextshape = randshape();
+        curshape = randshape();
+        scr_msg(key_msg, 1);
+        for (;;) {
+            place(curshape, pos, 1);
+            scr_update();
+            place(curshape, pos, 0);
+            c = tgetchar();
+            if (c < 0) {
+                /*
+                 * Timeout.  Move down if possible.
+                 */
+                if (fits_in(curshape, pos + B_COLS)) {
+                    pos += B_COLS;
+                    continue;
+                }
+                /*
+                 * Put up the current shape `permanently',
+                 * bump score, and elide any full rows.
+                 */
+                place(curshape, pos, 1);
+                score++;
+                elide();
+                /*
+                 * Choose a new shape.  If it does not fit,
+                 * the game is over.
+                 */
+                curshape = nextshape;
+                nextshape = randshape();
+                pos = A_FIRST*B_COLS + (B_COLS/2)-1;
+                if (!fits_in(curshape, pos))
+                    break;
+                continue;
+            }
+            /*
+             * Handle command keys.
+             */
+            if (c == keys[5]) {
+                /* quit */
+                break;
+            }
+            if (c == keys[4]) {
+                static char msg[] =
+                    "paused - press RETURN to continue";
+                place(curshape, pos, 1);
+                do {
+                    scr_update();
+                    scr_msg(key_msg, 0);
+                    scr_msg(msg, 1);
+    //              (void) fflush(stdout);
+                } while (rwait((struct timeval *)NULL) == -1);
+                scr_msg(msg, 0);
+                scr_msg(key_msg, 1);
+                place(curshape, pos, 0);
+                continue;
+            }
+            if (c == keys[0]) {
+                /* move left */
+                if (fits_in(curshape, pos - 1))
+                    pos--;
+                continue;
+            }
+            if (c == keys[1]) {
+                /* turn */
+                const struct shape *new = &shapes[
+                    classic? curshape->rotc : curshape->rot];
+                if (fits_in(new, pos))
+                    curshape = new;
+                continue;
+            }
+            if (c == keys[2]) {
+                /* move right */
+                if (fits_in(curshape, pos + 1))
+                    pos++;
+                continue;
+            }
+            if (c == keys[3]) {
+                /* move to bottom */
+                while (fits_in(curshape, pos + B_COLS)) {
+                    pos += B_COLS;
+                    score++;
+                }
+                continue;
+            }
+            if (c == '\f') {
+                scr_clear();
+                scr_msg(key_msg, 1);
+            }
+        }
+        scr_clear();
+        insertscore(score, level);
+        score=0;
+    }
+    scr_clear();
+    printf("\n\n\n\t\tGame over.\n");
+/*
+    while ((i = getchar()) != '\n')
+        if (i == EOF)
+            break
+*/
+    scr_end();
+    return 0;
+}
+/* void */
+/* onintr(int signo) */
+/* { */
+/*  scr_clear();        /\* XXX signal race *\/ */
+/*  scr_end();      /\* XXX signal race *\/ */
+/*  _exit(0); */
+/* } */
+void
+usage(void)
+{
+    (void)fprintf(stderr, "usage: tetris [-ps] [-k keys] [-l level]\n");
+    exit(1);
+}
+/** @}
+ */

 /tags/0.2.0.2/uspace/tetris/scores.c
 ,0 → 1,543
+/*  $OpenBSD: scores.c,v 1.11 2006/04/20 03:25:36 ray Exp $ */
+/*  $NetBSD: scores.c,v 1.2 1995/04/22 07:42:38 cgd Exp $   */
+/*-
+ * Copyright (c) 1992, 1993
+ *  The Regents of the University of California.  All rights reserved.
+ *
+ * This code is derived from software contributed to Berkeley by
+ * Chris Torek and Darren F. Provine.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the University nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ *  @(#)scores.c    8.1 (Berkeley) 5/31/93
+ */
+/** @addtogroup tetris
+ * @{
+ */
+/** @file
+ */
+/*
+ * Score code for Tetris, by Darren Provine (kilroy@gboro.glassboro.edu)
+ * modified 22 January 1992, to limit the number of entries any one
+ * person has.
+ *
+ * Major whacks since then.
+ */
+#include <errno.h>
+/* #include <err.h> */
+/* #include <fcntl.h> */
+/* #include <pwd.h> */
+ #include <stdio.h>
+/* #include <stdlib.h> */
+#include <string.h>
+/* #include <time.h> */
+/* #include <term.h> */
+/* #include <unistd.h> */
+/* #include <sys/param.h> */
+/* #include <sys/stat.h> */
+/* #include <sys/types.h> */
+#include "pathnames.h"
+#include "screen.h"
+#include "tetris.h"
+#include "scores.h"
+/*
+ * Within this code, we can hang onto one extra "high score", leaving
+ * room for our current score (whether or not it is high).
+ *
+ * We also sometimes keep tabs on the "highest" score on each level.
+ * As long as the scores are kept sorted, this is simply the first one at
+ * that level.
+ */
+#define NUMSPOTS (MAXHISCORES + 1)
+#define NLEVELS (MAXLEVEL + 1)
+/* static time_t now; */
+/* static int nscores; */
+/* static int gotscores; */
+/* static struct highscore scores[NUMSPOTS]; */
+static struct highscore scores[NUMSPOTS];
+/* static int checkscores(struct highscore *, int); */
+/* static int cmpscores(const void *, const void *); */
+/* static void getscores(FILE **); */
+/* static void printem(int, int, struct highscore *, int, const char *); */
+/* static char *thisuser(void); */
+void showscores(int firstgame)
+{
+    int i;
+    clear_screen();
+    moveto(10, 0);
+    printf("\tRank \tLevel \tName\t                     points\n");
+    printf("\t========================================================\n");
+    for (i = 0; i < NUMSPOTS - 1; i++) {
+        printf("\t%6d %6d %-16s %20d\n", i+1, scores[i].hs_level, scores[i].hs_name, scores[i].hs_score);
+    }
+    if (!firstgame) {
+        printf("\t========================================================\n");
+        printf("\t  Last %6d %-16s %20d\n", scores[NUMSPOTS - 1].hs_level, scores[NUMSPOTS - 1].hs_name, scores[NUMSPOTS - 1].hs_score);
+    }
+    printf("\n\n\n\n\tPress any key to return to main menu.");
+    getchar();
+}
+/** Copy from hiscore table score with index src to dest
+ *
+ */
+static void copyhiscore(int dest, int src)
+{
+    strcpy(scores[dest].hs_name, scores[src].hs_name);
+    scores[dest].hs_score = scores[src].hs_score;
+    scores[dest].hs_level = scores[src].hs_level;
+}
+void insertscore(int score, int level)
+{
+    int i,j;
+    int key;
+    clear_screen();
+    moveto(10 , 10);
+    puts("Insert your name: ");
+    strncpy(scores[NUMSPOTS - 1].hs_name, "Player", MAXLOGNAME);
+    i = 6;
+    moveto(10 , 28);
+    printf("%s%.*s",scores[NUMSPOTS - 1].hs_name,MAXLOGNAME-i,"........................................");
+    key = getchar();
+    while(key != '\n') {
+        if (key == '\b') {
+            if (i > 0)
+                scores[NUMSPOTS - 1].hs_name[--i] = '\0';
+        } else {
+            if (i < (MAXLOGNAME - 1))
+                scores[NUMSPOTS - 1].hs_name[i++] = key;
+                scores[NUMSPOTS - 1].hs_name[i] = '\0';
+        }
+        moveto(10 , 28);
+        printf("%s%.*s",scores[NUMSPOTS - 1].hs_name,MAXLOGNAME-i,"........................................");
+        key = getchar();
+    }
+    scores[NUMSPOTS - 1].hs_score = score;
+    scores[NUMSPOTS - 1].hs_level = level;
+    i = NUMSPOTS-1;
+    while ((i > 0) && (scores[i - 1].hs_score < score))
+        i--;
+    for (j = NUMSPOTS - 2; j > i; j--) {
+        copyhiscore(j,j-1);
+    }
+    copyhiscore(i, NUMSPOTS - 1);
+}
+void initscores(void)
+{
+    int i;
+    for(i = 0; i < NUMSPOTS; i++) {
+        strncpy(scores[i].hs_name, "HelenOS Team", MAXLOGNAME);
+        scores[i].hs_score = (NUMSPOTS - i) * 200;
+        scores[i].hs_level = (i + 1 > MAXLEVEL?MAXLEVEL:i + 1);
+    }
+}
+/*
+ * Read the score file.  Can be called from savescore (before showscores)
+ * or showscores (if savescore will not be called).  If the given pointer
+ * is not NULL, sets *fpp to an open file pointer that corresponds to a
+ * read/write score file that is locked with LOCK_EX.  Otherwise, the
+ * file is locked with LOCK_SH for the read and closed before return.
+ *
+ * Note, we assume closing the stdio file releases the lock.
+ */
+/* static void */
+/* getscores(FILE **fpp) */
+/* { */
+/*  int sd, mint, lck, mask, i; */
+/*  char *mstr, *human; */
+/*  FILE *sf; */
+/*  if (fpp != NULL) { */
+/*      mint = O_RDWR | O_CREAT; */
+/*      mstr = "r+"; */
+/*      human = "read/write"; */
+/*      lck = LOCK_EX; */
+/*  } else { */
+/*      mint = O_RDONLY; */
+/*      mstr = "r"; */
+/*      human = "reading"; */
+/*      lck = LOCK_SH; */
+/*  } */
+/*  setegid(egid); */
+/*  mask = umask(S_IWOTH); */
+/*  sd = open(_PATH_SCOREFILE, mint, 0666); */
+/*  (void)umask(mask); */
+/*  setegid(gid); */
+/*  if (sd < 0) { */
+/*      if (fpp == NULL) { */
+/*          nscores = 0; */
+/*          return; */
+/*      } */
+/*      err(1, "cannot open %s for %s", _PATH_SCOREFILE, human); */
+/*  } */
+/*  setegid(egid); */
+/*  if ((sf = fdopen(sd, mstr)) == NULL) */
+/*      err(1, "cannot fdopen %s for %s", _PATH_SCOREFILE, human); */
+/*  setegid(gid); */
+/*  /\* */
+/*   * Grab a lock. */
+/*   *\/ */
+/*  if (flock(sd, lck)) */
+/*      warn("warning: score file %s cannot be locked", */
+/*          _PATH_SCOREFILE); */
+/*  nscores = fread(scores, sizeof(scores[0]), MAXHISCORES, sf); */
+/*  if (ferror(sf)) */
+/*      err(1, "error reading %s", _PATH_SCOREFILE); */
+/*  for (i = 0; i < nscores; i++) */
+/*      if (scores[i].hs_level < MINLEVEL || */
+/*          scores[i].hs_level > MAXLEVEL) */
+/*          errx(1, "scorefile %s corrupt", _PATH_SCOREFILE); */
+/*  if (fpp) */
+/*      *fpp = sf; */
+/*  else */
+/*      (void)fclose(sf); */
+/* } */
+void
+savescore(int level)
+{
+    return;
+}
+/*  struct highscore *sp; */
+/*  int i; */
+/*  int change; */
+/*  FILE *sf; */
+/*  const char *me; */
+/*  getscores(&sf); */
+/*  gotscores = 1; */
+/*  (void)time(&now); */
+/*  /\* */
+/*   * Allow at most one score per person per level -- see if we */
+/*   * can replace an existing score, or (easiest) do nothing. */
+/*   * Otherwise add new score at end (there is always room). */
+/*   *\/ */
+/*  change = 0; */
+/*  me = thisuser(); */
+/*  for (i = 0, sp = &scores[0]; i < nscores; i++, sp++) { */
+/*      if (sp->hs_level != level || strcmp(sp->hs_name, me) != 0) */
+/*          continue; */
+/*      if (score > sp->hs_score) { */
+/*          (void)printf("%s bettered %s %d score of %d!\n", */
+/*              "\nYou", "your old level", level, */
+/*              sp->hs_score * sp->hs_level); */
+/*          sp->hs_score = score;   /\* new score *\/ */
+/*          sp->hs_time = now;  /\* and time *\/ */
+/*          change = 1; */
+/*      } else if (score == sp->hs_score) { */
+/*          (void)printf("%s tied %s %d high score.\n", */
+/*              "\nYou", "your old level", level); */
+/*          sp->hs_time = now;  /\* renew it *\/ */
+/*          change = 1;     /\* gotta rewrite, sigh *\/ */
+/*      } /\* else new score < old score: do nothing *\/ */
+/*      break; */
+/*  } */
+/*  if (i >= nscores) { */
+/*      strlcpy(sp->hs_name, me, sizeof sp->hs_name); */
+/*      sp->hs_level = level; */
+/*      sp->hs_score = score; */
+/*      sp->hs_time = now; */
+/*      nscores++; */
+/*      change = 1; */
+/*  } */
+/*  if (change) { */
+/*      /\* */
+/*       * Sort & clean the scores, then rewrite. */
+/*       *\/ */
+/*      nscores = checkscores(scores, nscores); */
+/*      rewind(sf); */
+/*      if (fwrite(scores, sizeof(*sp), nscores, sf) != nscores || */
+/*          fflush(sf) == EOF) */
+/*          warnx("error writing %s: %s\n\t-- %s", */
+/*              _PATH_SCOREFILE, strerror(errno), */
+/*              "high scores may be damaged"); */
+/*  } */
+/*  (void)fclose(sf);   /\* releases lock *\/ */
+/* } */
+/*
+ * Get login name, or if that fails, get something suitable.
+ * The result is always trimmed to fit in a score.
+ */
+/* static char * */
+/* thisuser(void) */
+/* { */
+/*  const char *p; */
+/*  struct passwd *pw; */
+/*  static char u[sizeof(scores[0].hs_name)]; */
+/*  if (u[0]) */
+/*      return (u); */
+/*  p = getlogin(); */
+/*  if (p == NULL || *p == '\0') { */
+/*      pw = getpwuid(getuid()); */
+/*      if (pw != NULL) */
+/*          p = pw->pw_name; */
+/*      else */
+/*          p = "  ???"; */
+/*  } */
+/*  strlcpy(u, p, sizeof(u)); */
+/*  return (u); */
+/* } */
+/*
+ * Score comparison function for qsort.
+ *
+ * If two scores are equal, the person who had the score first is
+ * listed first in the highscore file.
+ */
+/* static int */
+/* cmpscores(const void *x, const void *y) */
+/* { */
+/*  const struct highscore *a, *b; */
+/*  long l; */
+/*  a = x; */
+/*  b = y; */
+/*  l = (long)b->hs_level * b->hs_score - (long)a->hs_level * a->hs_score; */
+/*  if (l < 0) */
+/*      return (-1); */
+/*  if (l > 0) */
+/*      return (1); */
+/*  if (a->hs_time < b->hs_time) */
+/*      return (-1); */
+/*  if (a->hs_time > b->hs_time) */
+/*      return (1); */
+/*  return (0); */
+/* } */
+/*
+ * If we've added a score to the file, we need to check the file and ensure
+ * that this player has only a few entries.  The number of entries is
+ * controlled by MAXSCORES, and is to ensure that the highscore file is not
+ * monopolised by just a few people.  People who no longer have accounts are
+ * only allowed the highest score.  Scores older than EXPIRATION seconds are
+ * removed, unless they are someone's personal best.
+ * Caveat:  the highest score on each level is always kept.
+ */
+/* static int */
+/* checkscores(struct highscore *hs, int num) */
+/* { */
+/*  struct highscore *sp; */
+/*  int i, j, k, numnames; */
+/*  int levelfound[NLEVELS]; */
+/*  struct peruser { */
+/*      char *name; */
+/*      int times; */
+/*  } count[NUMSPOTS]; */
+/*  struct peruser *pu; */
+/*  /\* */
+/*   * Sort so that highest totals come first. */
+/*   * */
+/*   * levelfound[i] becomes set when the first high score for that */
+/*   * level is encountered.  By definition this is the highest score. */
+/*   *\/ */
+/*  qsort((void *)hs, nscores, sizeof(*hs), cmpscores); */
+/*  for (i = MINLEVEL; i < NLEVELS; i++) */
+/*      levelfound[i] = 0; */
+/*  numnames = 0; */
+/*  for (i = 0, sp = hs; i < num;) { */
+/*      /\* */
+/*       * This is O(n^2), but do you think we care? */
+/*       *\/ */
+/*      for (j = 0, pu = count; j < numnames; j++, pu++) */
+/*          if (strcmp(sp->hs_name, pu->name) == 0) */
+/*              break; */
+/*      if (j == numnames) { */
+/*          /\* */
+/*           * Add new user, set per-user count to 1. */
+/*           *\/ */
+/*          pu->name = sp->hs_name; */
+/*          pu->times = 1; */
+/*          numnames++; */
+/*      } else { */
+/*          /\* */
+/*           * Two ways to keep this score: */
+/*           * - Not too many (per user), still has acct, & */
+/*           *  score not dated; or */
+/*           * - High score on this level. */
+/*           *\/ */
+/*          if ((pu->times < MAXSCORES && */
+/*               getpwnam(sp->hs_name) != NULL && */
+/*               sp->hs_time + EXPIRATION >= now) || */
+/*              levelfound[sp->hs_level] == 0) */
+/*              pu->times++; */
+/*          else { */
+/*              /\* */
+/*               * Delete this score, do not count it, */
+/*               * do not pass go, do not collect $200. */
+/*               *\/ */
+/*              num--; */
+/*              for (k = i; k < num; k++) */
+/*                  hs[k] = hs[k + 1]; */
+/*              continue; */
+/*          } */
+/*      } */
+/*      levelfound[sp->hs_level] = 1; */
+/*      i++, sp++; */
+/*  } */
+/*  return (num > MAXHISCORES ? MAXHISCORES : num); */
+/* } */
+/*
+ * Show current scores.  This must be called after savescore, if
+ * savescore is called at all, for two reasons:
+ * - Showscores munches the time field.
+ * - Even if that were not the case, a new score must be recorded
+ *   before it can be shown anyway.
+ */
+/*
+void
+showscores(int level)
+{
+    return;
+}
+*/
+/*  struct highscore *sp; */
+/*  int i, n, c; */
+/*  const char *me; */
+/*  int levelfound[NLEVELS]; */
+/*  if (!gotscores) */
+/*      getscores((FILE **)NULL); */
+/*  (void)printf("\n\t\t    Tetris High Scores\n"); */
+/*  /\* */
+/*   * If level == 0, the person has not played a game but just asked for */
+/*   * the high scores; we do not need to check for printing in highlight */
+/*   * mode.  If SOstr is null, we can't do highlighting anyway. */
+/*   *\/ */
+/*  me = level && SOstr ? thisuser() : NULL; */
+/*  /\* */
+/*   * Set times to 0 except for high score on each level. */
+/*   *\/ */
+/*  for (i = MINLEVEL; i < NLEVELS; i++) */
+/*      levelfound[i] = 0; */
+/*  for (i = 0, sp = scores; i < nscores; i++, sp++) { */
+/*      if (levelfound[sp->hs_level]) */
+/*          sp->hs_time = 0; */
+/*      else { */
+/*          sp->hs_time = 1; */
+/*          levelfound[sp->hs_level] = 1; */
+/*      } */
+/*  } */
+/*  /\* */
+/*   * Page each screenful of scores. */
+/*   *\/ */
+/*  for (i = 0, sp = scores; i < nscores; sp += n) { */
+/*      n = 20; */
+/*      if (i + n > nscores) */
+/*          n = nscores - i; */
+/*      printem(level, i + 1, sp, n, me); */
+/*      if ((i += n) < nscores) { */
+/*          (void)printf("\nHit RETURN to continue."); */
+/*          (void)fflush(stdout); */
+/*          while ((c = getchar()) != '\n') */
+/*              if (c == EOF) */
+/*                  break; */
+/*          (void)printf("\n"); */
+/*      } */
+/*  } */
+/*  if (nscores == 0) */
+/*      printf("\t\t\t      - none to date.\n"); */
+/* } */
+/* static void */
+/* printem(int level, int offset, struct highscore *hs, int n, const char *me) */
+/* { */
+/*  struct highscore *sp; */
+/*  int row, highlight, i; */
+/*  char buf[100]; */
+/* #define  TITLE "Rank  Score   Name                          (points/level)" */
+/* #define  TITL2 "==========================================================" */
+/*  printf("%s\n%s\n", TITLE, TITL2); */
+/*  highlight = 0; */
+/*  for (row = 0; row < n; row++) { */
+/*      sp = &hs[row]; */
+/*      (void)snprintf(buf, sizeof(buf), */
+/*          "%3d%c %6d  %-31s (%6d on %d)\n", */
+/*          row + offset, sp->hs_time ? '*' : ' ', */
+/*          sp->hs_score * sp->hs_level, */
+/*          sp->hs_name, sp->hs_score, sp->hs_level); */
+/*      /\* Print leaders every three lines *\/ */
+/*      if ((row + 1) % 3 == 0) { */
+/*          for (i = 0; i < sizeof(buf); i++) */
+/*              if (buf[i] == ' ') */
+/*                  buf[i] = '_'; */
+/*      } */
+/*      /\* */
+/*       * Highlight if appropriate.  This works because */
+/*       * we only get one score per level. */
+/*       *\/ */
+/*      if (me != NULL && */
+/*          sp->hs_level == level && */
+/*          sp->hs_score == score && */
+/*          strcmp(sp->hs_name, me) == 0) { */
+/*          putpad(SOstr); */
+/*          highlight = 1; */
+/*      } */
+/*      (void)printf("%s", buf); */
+/*      if (highlight) { */
+/*          putpad(SEstr); */
+/*          highlight = 0; */
+/*      } */
+/*  } */
+/* } */
+/** @}
+ */

 /tags/0.2.0.2/uspace/tetris/tetris.h
 ,0 → 1,188
+/*  $OpenBSD: tetris.h,v 1.9 2003/06/03 03:01:41 millert Exp $  */
+/*  $NetBSD: tetris.h,v 1.2 1995/04/22 07:42:48 cgd Exp $   */
+/*-
+ * Copyright (c) 1992, 1993
+ *  The Regents of the University of California.  All rights reserved.
+ *
+ * This code is derived from software contributed to Berkeley by
+ * Chris Torek and Darren F. Provine.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the University nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ *  @(#)tetris.h    8.1 (Berkeley) 5/31/93
+ */
+/** @addtogroup tetris
+ * @{
+ */
+/** @file
+ */
+/*
+ * Definitions for Tetris.
+ */
+/*
+ * The display (`board') is composed of 23 rows of 12 columns of characters
+ * (numbered 0..22 and 0..11), stored in a single array for convenience.
+ * Columns 1 to 10 of rows 1 to 20 are the actual playing area, where
+ * shapes appear.  Columns 0 and 11 are always occupied, as are all
+ * columns of rows 21 and 22.  Rows 0 and 22 exist as boundary areas
+ * so that regions `outside' the visible area can be examined without
+ * worrying about addressing problems.
+ */
+    /* the board */
+#define B_COLS  12
+#define B_ROWS  23
+#define B_SIZE  (B_ROWS * B_COLS)
+typedef unsigned char cell;
+extern cell board[B_SIZE];  /* 1 => occupied, 0 => empty */
+    /* the displayed area (rows) */
+#define D_FIRST 1
+#define D_LAST  22
+    /* the active area (rows) */
+#define A_FIRST 1
+#define A_LAST  21
+/*
+ * Minimum display size.
+ */
+#define MINROWS 23
+#define MINCOLS 40
+extern int  Rows, Cols; /* current screen size */
+/*
+ * Translations from board coordinates to display coordinates.
+ * As with board coordinates, display coordiates are zero origin.
+ */
+#define RTOD(x) ((x) - 1)
+#define CTOD(x) ((x) * 2 + (((Cols - 2 * B_COLS) >> 1) - 1))
+/*
+ * A `shape' is the fundamental thing that makes up the game.  There
+ * are 7 basic shapes, each consisting of four `blots':
+ *
+ *  X.X   X.X       X.X
+ *    X.X   X.X X.X.X   X.X X.X.X   X.X.X   X.X.X.X
+ *            X     X       X
+ *
+ *    0   1   2   3   4   5   6
+ *
+ * Except for 3 and 6, the center of each shape is one of the blots.
+ * This blot is designated (0,0).  The other three blots can then be
+ * described as offsets from the center.  Shape 3 is the same under
+ * rotation, so its center is effectively irrelevant; it has been chosen
+ * so that it `sticks out' upward and leftward.  Except for shape 6,
+ * all the blots are contained in a box going from (-1,-1) to (+1,+1);
+ * shape 6's center `wobbles' as it rotates, so that while it `sticks out'
+ * rightward, its rotation---a vertical line---`sticks out' downward.
+ * The containment box has to include the offset (2,0), making the overall
+ * containment box range from offset (-1,-1) to (+2,+1).  (This is why
+ * there is only one row above, but two rows below, the display area.)
+ *
+ * The game works by choosing one of these shapes at random and putting
+ * its center at the middle of the first display row (row 1, column 5).
+ * The shape is moved steadily downward until it collides with something:
+ * either  another shape, or the bottom of the board.  When the shape can
+ * no longer be moved downwards, it is merged into the current board.
+ * At this time, any completely filled rows are elided, and blots above
+ * these rows move down to make more room.  A new random shape is again
+ * introduced at the top of the board, and the whole process repeats.
+ * The game ends when the new shape will not fit at (1,5).
+ *
+ * While the shapes are falling, the user can rotate them counterclockwise
+ * 90 degrees (in addition to moving them left or right), provided that the
+ * rotation puts the blots in empty spaces.  The table of shapes is set up
+ * so that each shape contains the index of the new shape obtained by
+ * rotating the current shape.  Due to symmetry, each shape has exactly
+ * 1, 2, or 4 rotations total; the first 7 entries in the table represent
+ * the primary shapes, and the remaining 12 represent their various
+ * rotated forms.
+ */
+struct shape {
+    int rot;    /* index of rotated version of this shape */
+    int rotc;   /* -- " -- in classic version  */
+    int off[3]; /* offsets to other blots if center is at (0,0) */
+};
+extern const struct shape shapes[];
+extern const struct shape *curshape;
+extern const struct shape *nextshape;
+/*
+ * Shapes fall at a rate faster than once per second.
+ *
+ * The initial rate is determined by dividing 1 million microseconds
+ * by the game `level'.  (This is at most 1 million, or one second.)
+ * Each time the fall-rate is used, it is decreased a little bit,
+ * depending on its current value, via the `faster' macro below.
+ * The value eventually reaches a limit, and things stop going faster,
+ * but by then the game is utterly impossible.
+ */
+extern long fallrate;   /* less than 1 million; smaller => faster */
+#define faster() (fallrate -= fallrate / 3000)
+/*
+ * Game level must be between 1 and 9.  This controls the initial fall rate
+ * and affects scoring.
+ */
+#define MINLEVEL    1
+#define MAXLEVEL    9
+/*
+ * Scoring is as follows:
+ *
+ * When the shape comes to rest, and is integrated into the board,
+ * we score one point.  If the shape is high up (at a low-numbered row),
+ * and the user hits the space bar, the shape plummets all the way down,
+ * and we score a point for each row it falls (plus one more as soon as
+ * we find that it is at rest and integrate it---until then, it can
+ * still be moved or rotated).
+ *
+ * If previewing has been turned on, the score is multiplied by PRE_PENALTY.
+ */
+#define PRE_PENALTY 0.75
+extern int  score;      /* the obvious thing */
+//extern gid_t  gid, egid;
+extern char key_msg[100];
+extern int  showpreview;
+extern int  classic;
+int fits_in(const struct shape *, int);
+void    place(const struct shape *, int, int);
+void    stop(char *);
+/** @}
+ */

 /tags/0.2.0.2/uspace/tetris/scores.h
 ,0 → 1,67
+/*  $OpenBSD: scores.h,v 1.5 2003/06/03 03:01:41 millert Exp $  */
+/*  $NetBSD: scores.h,v 1.2 1995/04/22 07:42:40 cgd Exp $   */
+/*-
+ * Copyright (c) 1992, 1993
+ *  The Regents of the University of California.  All rights reserved.
+ *
+ * This code is derived from software contributed to Berkeley by
+ * Chris Torek and Darren F. Provine.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the University nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ *  @(#)scores.h    8.1 (Berkeley) 5/31/93
+ */
+/** @addtogroup tetris
+ * @{
+ */
+/** @file
+ */
+/*
+ * Tetris scores.
+ */
+#include <sys/time.h>
+#define MAXLOGNAME 16
+struct highscore {
+    char    hs_name[MAXLOGNAME + 1];    /* login name */
+    int hs_score;   /* raw score */
+    int hs_level;   /* play level */
+//  time_t  hs_time;    /* time at game end */
+};
+#define MAXHISCORES 10
+//#define MAXSCORES 9   /* maximum high score entries per person */
+//#define   EXPIRATION  (5L * 365 * 24 * 60 * 60)
+void savescore(int);
+void showscores(int);
+void insertscore(int score, int level);
+void initscores(void);
+/** @}
+ */

 /tags/0.2.0.2/uspace/tetris/shapes.c
 ,0 → 1,116
+/*  $OpenBSD: shapes.c,v 1.8 2004/07/10 07:26:24 deraadt Exp $  */
+/*  $NetBSD: shapes.c,v 1.2 1995/04/22 07:42:44 cgd Exp $   */
+/*-
+ * Copyright (c) 1992, 1993
+ *  The Regents of the University of California.  All rights reserved.
+ *
+ * This code is derived from software contributed to Berkeley by
+ * Chris Torek and Darren F. Provine.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the University nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ *  @(#)shapes.c    8.1 (Berkeley) 5/31/93
+ */
+/** @addtogroup tetris
+ * @{
+ */
+/** @file
+ */
+/*
+ * Tetris shapes and related routines.
+ *
+ * Note that the first 7 are `well known'.
+ */
+#include <unistd.h>
+#include "tetris.h"
+#define TL  -B_COLS-1   /* top left */
+#define TC  -B_COLS     /* top center */
+#define TR  -B_COLS+1   /* top right */
+#define ML  -1      /* middle left */
+#define MR  1       /* middle right */
+#define BL  B_COLS-1    /* bottom left */
+#define BC  B_COLS      /* bottom center */
+#define BR  B_COLS+1    /* bottom right */
+const struct shape shapes[] = {
+    /* 0*/  { 7,    7,  { TL, TC, MR } },
+    /* 1*/  { 8,    8,  { TC, TR, ML } },
+    /* 2*/  { 9,    11, { ML, MR, BC } },
+    /* 3*/  { 3,    3,  { TL, TC, ML } },
+    /* 4*/  { 12,   14, { ML, BL, MR } },
+    /* 5*/  { 15,   17, { ML, BR, MR } },
+    /* 6*/  { 18,   18, { ML, MR, 2  } }, /* sticks out */
+    /* 7*/  { 0,    0,  { TC, ML, BL } },
+    /* 8*/  { 1,    1,  { TC, MR, BR } },
+    /* 9*/  { 10,   2,  { TC, MR, BC } },
+    /*10*/  { 11,   9,  { TC, ML, MR } },
+    /*11*/  { 2,    10, { TC, ML, BC } },
+    /*12*/  { 13,   4,  { TC, BC, BR } },
+    /*13*/  { 14,   12, { TR, ML, MR } },
+    /*14*/  { 4,    13, { TL, TC, BC } },
+    /*15*/  { 16,   5,  { TR, TC, BC } },
+    /*16*/  { 17,   15, { TL, MR, ML } },
+    /*17*/  { 5,    16, { TC, BC, BL } },
+    /*18*/  { 6,    6,  { TC, BC, 2*B_COLS } }/* sticks out */
+};
+/*
+ * Return true iff the given shape fits in the given position,
+ * taking the current board into account.
+ */
+int
+fits_in(const struct shape *shape, int pos)
+{
+    int *o = shape->off;
+    if (board[pos] || board[pos + *o++] || board[pos + *o++] ||
+        board[pos + *o])
+        return 0;
+    return 1;
+}
+/*
+ * Write the given shape into the current board, turning it on
+ * if `onoff' is 1, and off if `onoff' is 0.
+ */
+void
+place(const struct shape *shape, int pos, int onoff)
+{
+    int *o = shape->off;
+    board[pos] = onoff;
+    board[pos + *o++] = onoff;
+    board[pos + *o++] = onoff;
+    board[pos + *o] = onoff;
+}
+/** @}
+ */

 /tags/0.2.0.2/uspace/tetris/input.h
 ,0 → 1,50
+/*  $OpenBSD: input.h,v 1.5 2003/06/03 03:01:41 millert Exp $   */
+/*  $NetBSD: input.h,v 1.2 1995/04/22 07:42:36 cgd Exp $    */
+/*-
+ * Copyright (c) 1992, 1993
+ *  The Regents of the University of California.  All rights reserved.
+ *
+ * This code is derived from software contributed to Berkeley by
+ * Chris Torek and Darren F. Provine.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the University nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ *  @(#)input.h 8.1 (Berkeley) 5/31/93
+ */
+/** @addtogroup tetris
+ * @{
+ */
+/** @file
+ */
+int rwait(struct timeval *);
+int tgetchar(void);
+void    tsleep(void);
+/** @}
+ */

 /tags/0.2.0.2/uspace/tetris/screen.h
 ,0 → 1,71
+/*  $OpenBSD: screen.h,v 1.5 2003/06/03 03:01:41 millert Exp $  */
+/*  $NetBSD: screen.h,v 1.2 1995/04/22 07:42:42 cgd Exp $   */
+/*-
+ * Copyright (c) 1992, 1993
+ *  The Regents of the University of California.  All rights reserved.
+ *
+ * This code is derived from software contributed to Berkeley by
+ * Chris Torek and Darren F. Provine.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the University nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ *  @(#)screen.h    8.1 (Berkeley) 5/31/93
+ */
+/** @addtogroup tetris
+ * @{
+ */
+/** @file
+ */
+/*
+ * putpad() is for padded strings with count=1.
+ */
+#define putpad(s)   tputs(s, 1, put)
+#include <async.h>
+typedef struct {
+    ipcarg_t ws_row;
+    ipcarg_t ws_col;
+} winsize_t;
+extern winsize_t winsize;
+void moveto(int r, int c);
+void clear_screen(void);
+int put(int);           /* just calls putchar; for tputs */
+void    scr_clear(void);
+void    scr_end(void);
+void    scr_init(void);
+void    scr_msg(char *, int);
+void    scr_set(void);
+void    scr_update(void);
+/** @}
+ */

 /tags/0.2.0.2/uspace/tetris/pathnames.h
 ,0 → 1,49
+/*  $OpenBSD: pathnames.h,v 1.3 2003/06/03 03:01:41 millert Exp $   */
+/*  $NetBSD: pathnames.h,v 1.2 1995/04/22 07:42:37 cgd Exp $    */
+/*-
+ * Copyright (c) 1992, 1993
+ *  The Regents of the University of California.  All rights reserved.
+ *
+ * This code is derived from software contributed to Berkeley by
+ * Chris Torek and Darren F. Provine.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the University nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ *  @(#)pathnames.h 8.1 (Berkeley) 5/31/93
+ */
+/** @addtogroup tetris
+ * @{
+ */
+/** @file
+ */
+#define _PATH_SCOREFILE "/var/games/tetris.scores"
+/** @}
+ */

 /tags/0.2.0.2/uspace/tetris/Makefile
 ,0 → 1,35
+LIBC_PREFIX = ../libc
+SOFTINT_PREFIX = ../softint
+include $(LIBC_PREFIX)/Makefile.toolchain
+LIBS = $(LIBC_PREFIX)/libc.a
+OUTPUT = tetris
+SOURCES = shapes.c scores.c input.c tetris.c screen.c
+OBJECTS := $(addsuffix .o,$(basename $(SOURCES)))
+.PHONY: all clean depend disasm
+all: $(OUTPUT) disasm
+-include Makefile.depend
+depend:
+    $(CC) $(DEFS) $(CFLAGS) -M $(SOURCES) > Makefile.depend
+$(OUTPUT): $(OBJECTS) $(LIBS)
+    $(LD) -T $(LIBC_PREFIX)/arch/$(ARCH)/_link.ld $(OBJECTS) $(LIBS) $(LFLAGS) -o $@ -Map $(OUTPUT).map
+clean:
+    -rm -f $(OUTPUT) $(OUTPUT).map $(OUTPUT).disasm Makefile.depend *.o
+disasm:
+    $(OBJDUMP) -d $(OUTPUT) >$(OUTPUT).disasm
+%.o: %.S
+    $(CC) $(DEFS) $(AFLAGS) $(CFLAGS) -D__ASM__ -c $< -o $@
+%.o: %.s
+    $(AS) $(AFLAGS) $< -o $@
+%.o: %.c
+    $(CC) $(DEFS) $(CFLAGS) -c $< -o $@

 /tags/0.2.0.2/uspace/pci/pci.c
 ,0 → 1,90
+/*
+ * HelenOS PCI driver.
+ *
+ * Copyright (C) 1997-2003 Martin Mares
+ * Copyright (C) 2006 Jakub Jermar
+ *
+ * (Based on libpci example.c written by Martin Mares.)
+ *
+ * Can be freely distributed and used under the terms of the GNU GPL.
+ */
+/**
+ * @addtogroup pci
+ * @{
+ */
+#include <stdio.h>
+#include <ddi.h>
+#include <task.h>
+#include <stdlib.h>
+#include <ipc/ipc.h>
+#include <ipc/services.h>
+#include <errno.h>
+#include "libpci/pci.h"
+#define PCI_CONF1   0xcf8
+#define PCI_CONF1_SIZE  8
+#define NAME        "PCI"
+static struct pci_access *pacc;
+int main(int argc, char *argv[])
+{
+    struct pci_dev *dev;
+    unsigned int c;
+    char buf[80];
+    ipcarg_t ns_in_phone_hash;
+    printf("%s: HelenOS PCI driver\n", NAME);
+    /*
+     * Gain control over PCI configuration ports.
+     */
+    iospace_enable(task_get_id(), (void *) PCI_CONF1, PCI_CONF1_SIZE);
+    pacc = pci_alloc();           /* Get the pci_access structure */
+    pci_init(pacc);               /* Initialize the PCI library */
+    pci_scan_bus(pacc);           /* We want to get the list of devices */
+    for(dev=pacc->devices; dev; dev=dev->next) {   /* Iterate over all devices */
+        pci_fill_info(dev, PCI_FILL_IDENT | PCI_FILL_BASES | PCI_FILL_IRQ);
+        c = pci_read_word(dev, PCI_CLASS_DEVICE); /* Read config register directly */
+        printf("%02x:%02x.%d vendor=%04x device=%04x class=%04x irq=%d base0=%lx\n",
+            dev->bus, dev->dev, dev->func, dev->vendor_id, dev->device_id,
+            c, dev->irq, dev->base_addr[0]);
+        printf("\t%s\n", pci_lookup_name(pacc, buf, sizeof(buf), PCI_LOOKUP_VENDOR | PCI_LOOKUP_DEVICE,
+            dev->vendor_id, dev->device_id));
+    }
+    printf("%s: registering at naming service.\n", NAME);
+    if (ipc_connect_to_me(PHONE_NS, SERVICE_PCI, 0, &ns_in_phone_hash) != 0) {
+        printf("Failed to register %s at naming service.\n", NAME);
+        return -1;
+    }
+    printf("%s: accepting connections\n", NAME);
+    while (1) {
+        ipc_call_t call;
+        ipc_callid_t callid;
+        callid = ipc_wait_for_call(&call);
+        switch(IPC_GET_METHOD(call)) {
+        case IPC_M_CONNECT_ME_TO:
+            IPC_SET_RETVAL(call, 0);
+            break;
+        }
+        if (! (callid & IPC_CALLID_NOTIFICATION)) {
+            ipc_answer(callid, &call);
+        }
+        printf("%s: received call from %lX\n", NAME, call.in_phone_hash);
+    }
+    pci_cleanup(pacc);
+    return 0;
+}
+/**
+ * @}
+ */

 /tags/0.2.0.2/uspace/pci/Makefile
 ,0 → 1,78
+#
+# Copyright (C) 2005 Martin Decky
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# - Redistributions of source code must retain the above copyright
+#   notice, this list of conditions and the following disclaimer.
+# - Redistributions in binary form must reproduce the above copyright
+#   notice, this list of conditions and the following disclaimer in the
+#   documentation and/or other materials provided with the distribution.
+# - The name of the author may not be used to endorse or promote products
+#   derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+## Setup toolchain
+#
+LIBC_PREFIX = ../libc
+SOFTINT_PREFIX = ../softint
+include $(LIBC_PREFIX)/Makefile.toolchain
+LIBS = libpci/libpci.a $(LIBC_PREFIX)/libc.a
+## Sources
+#
+OUTPUT = pci
+SOURCES = \
+    pci.c
+OBJECTS := $(addsuffix .o,$(basename $(SOURCES)))
+.PHONY: all clean depend disasm
+all: $(OUTPUT) disasm
+-include Makefile.depend
+clean:
+    -rm -f $(OUTPUT) $(OUTPUT).map $(OUTPUT).disasm Makefile.depend
+    $(MAKE) -C libpci clean
+depend:
+    $(CC) $(DEFS) $(CFLAGS) -M $(SOURCES) > Makefile.depend
+$(OUTPUT): $(OBJECTS) $(LIBS)
+    $(MAKE) -C libpci
+    $(LD) -T $(LIBC_PREFIX)/arch/$(ARCH)/_link.ld $(OBJECTS) $(LIBS) $(LFLAGS) -o $@ -Map $(OUTPUT).map
+disasm:
+    $(OBJDUMP) -d $(OUTPUT) >$(OUTPUT).disasm
+%.o: %.S
+    $(CC) $(DEFS) $(AFLAGS) $(CFLAGS) -D__ASM__ -c $< -o $@
+%.o: %.s
+    $(AS) $(AFLAGS) $< -o $@
+%.o: %.c
+    $(CC) $(DEFS) $(CFLAGS) -c $< -o $@
+libpci/libpci.a:
+    $(MAKE) -C libpci

 /tags/0.2.0.2/uspace/pci/libpci/pci.h
 ,0 → 1,146
+/*
+ *  The PCI Library
+ *
+ *  Copyright (c) 1997--2005 Martin Mares <mj@ucw.cz>
+ *
+ *  May 8, 2006 - Modified and ported to HelenOS by Jakub Jermar.
+ *
+ *  Can be freely distributed and used under the terms of the GNU GPL.
+ */
+#ifndef _PCI_LIB_H
+#define _PCI_LIB_H
+#include "header.h"
+#include "types.h"
+#define PCI_LIB_VERSION 0x020200
+/*
+ *  PCI Access Structure
+ */
+struct pci_methods;
+enum pci_access_type {
+    /* Known access methods, remember to update access.c as well */
+    PCI_ACCESS_I386_TYPE1,  /* i386 ports, type 1 (params: none) */
+    PCI_ACCESS_I386_TYPE2,  /* i386 ports, type 2 (params: none) */
+    PCI_ACCESS_MAX
+};
+struct pci_access {
+    /* Options you can change: */
+    unsigned int method;    /* Access method */
+    char *method_params[PCI_ACCESS_MAX];    /* Parameters for the methods */
+    int writeable;      /* Open in read/write mode */
+    int buscentric;     /* Bus-centric view of the world */
+    int numeric_ids;    /* Don't resolve device IDs to names */
+    int debugging;      /* Turn on debugging messages */
+    /* Functions you can override: */
+    void (*error) (char *msg, ...); /* Write error message and quit */
+    void (*warning) (char *msg, ...);   /* Write a warning message */
+    void (*debug) (char *msg, ...); /* Write a debugging message */
+    struct pci_dev *devices;    /* Devices found on this bus */
+    /* Fields used internally: */
+    struct pci_methods *methods;
+    struct id_entry **id_hash;  /* names.c */
+    struct id_bucket *current_id_bucket;
+};
+/* Initialize PCI access */
+struct pci_access *pci_alloc(void);
+void pci_init(struct pci_access *);
+void pci_cleanup(struct pci_access *);
+/* Scanning of devices */
+void pci_scan_bus(struct pci_access *acc);
+struct pci_dev *pci_get_dev(struct pci_access *acc, int domain, int bus, int dev, int func);    /* Raw access to specified device */
+void pci_free_dev(struct pci_dev *);
+/*
+ *  Devices
+ */
+struct pci_dev {
+    struct pci_dev *next;   /* Next device in the chain */
+    u16 domain;     /* PCI domain (host bridge) */
+    u8 bus, dev, func;  /* Bus inside domain, device and function */
+    /* These fields are set by pci_fill_info() */
+    int known_fields;   /* Set of info fields already known */
+    u16 vendor_id, device_id;   /* Identity of the device */
+    int irq;        /* IRQ number */
+    pciaddr_t base_addr[6]; /* Base addresses */
+    pciaddr_t size[6];  /* Region sizes */
+    pciaddr_t rom_base_addr;    /* Expansion ROM base address */
+    pciaddr_t rom_size; /* Expansion ROM size */
+    /* Fields used internally: */
+    struct pci_access *access;
+    struct pci_methods *methods;
+    u8 *cache;      /* Cached config registers */
+    int cache_len;
+    int hdrtype;        /* Cached low 7 bits of header type, -1 if unknown */
+    void *aux;      /* Auxillary data */
+};
+#define PCI_ADDR_IO_MASK (~(pciaddr_t) 0x3)
+#define PCI_ADDR_MEM_MASK (~(pciaddr_t) 0xf)
+u8 pci_read_byte(struct pci_dev *, int pos);    /* Access to configuration space */
+u16 pci_read_word(struct pci_dev *, int pos);
+u32 pci_read_long(struct pci_dev *, int pos);
+int pci_read_block(struct pci_dev *, int pos, u8 * buf, int len);
+int pci_write_byte(struct pci_dev *, int pos, u8 data);
+int pci_write_word(struct pci_dev *, int pos, u16 data);
+int pci_write_long(struct pci_dev *, int pos, u32 data);
+int pci_write_block(struct pci_dev *, int pos, u8 * buf, int len);
+int pci_fill_info(struct pci_dev *, int flags); /* Fill in device information */
+#define PCI_FILL_IDENT      1
+#define PCI_FILL_IRQ        2
+#define PCI_FILL_BASES      4
+#define PCI_FILL_ROM_BASE   8
+#define PCI_FILL_SIZES      16
+#define PCI_FILL_RESCAN     0x10000
+void pci_setup_cache(struct pci_dev *, u8 * cache, int len);
+/*
+ *  Conversion of PCI ID's to names (according to the pci.ids file)
+ *
+ *  Call pci_lookup_name() to identify different types of ID's:
+ *
+ *  VENDOR              (vendorID) -> vendor
+ *  DEVICE              (vendorID, deviceID) -> device
+ *  VENDOR | DEVICE         (vendorID, deviceID) -> combined vendor and device
+ *  SUBSYSTEM | VENDOR      (subvendorID) -> subsystem vendor
+ *  SUBSYSTEM | DEVICE      (vendorID, deviceID, subvendorID, subdevID) -> subsystem device
+ *  SUBSYSTEM | VENDOR | DEVICE (vendorID, deviceID, subvendorID, subdevID) -> combined subsystem v+d
+ *  SUBSYSTEM | ...         (-1, -1, subvendorID, subdevID) -> generic subsystem
+ *  CLASS               (classID) -> class
+ *  PROGIF              (classID, progif) -> programming interface
+ */
+char *pci_lookup_name(struct pci_access *a, char *buf, int size, int flags,
+              ...);
+int pci_load_name_list(struct pci_access *a);   /* Called automatically by pci_lookup_*() when needed; returns success */
+void pci_free_name_list(struct pci_access *a);  /* Called automatically by pci_cleanup() */
+enum pci_lookup_mode {
+    PCI_LOOKUP_VENDOR = 1,  /* Vendor name (args: vendorID) */
+    PCI_LOOKUP_DEVICE = 2,  /* Device name (args: vendorID, deviceID) */
+    PCI_LOOKUP_CLASS = 4,   /* Device class (args: classID) */
+    PCI_LOOKUP_SUBSYSTEM = 8,
+    PCI_LOOKUP_PROGIF = 16, /* Programming interface (args: classID, prog_if) */
+    PCI_LOOKUP_NUMERIC = 0x10000,   /* Want only formatted numbers; default if access->numeric_ids is set */
+    PCI_LOOKUP_NO_NUMBERS = 0x20000 /* Return NULL if not found in the database; default is to print numerically */
+};
+#endif

 /tags/0.2.0.2/uspace/pci/libpci/i386-ports.c
 ,0 → 1,274
+/*
+ *  The PCI Library -- Direct Configuration access via i386 Ports
+ *
+ *  Copyright (c) 1997--2004 Martin Mares <mj@ucw.cz>
+ *
+ *  May 8, 2006 - Modified and ported to HelenOS by Jakub Jermar.
+ *
+ *  Can be freely distributed and used under the terms of the GNU GPL.
+ */
+#include <unistd.h>
+#include "internal.h"
+static inline void outb(u8 b, u16 port)
+{
+    asm volatile ("outb %0, %1\n" :: "a" (b), "d" (port));
+}
+static inline void outw(u16 w, u16 port)
+{
+    asm volatile ("outw %0, %1\n" :: "a" (w), "d" (port));
+}
+static inline void outl(u32 l, u16 port)
+{
+    asm volatile ("outl %0, %1\n" :: "a" (l), "d" (port));
+}
+static inline u8 inb(u16 port)
+{
+    u8 val;
+    asm volatile ("inb %1, %0 \n" : "=a" (val) : "d"(port));
+    return val;
+}
+static inline u16 inw(u16 port)
+{
+    u16 val;
+    asm volatile ("inw %1, %0 \n" : "=a" (val) : "d"(port));
+    return val;
+}
+static inline u32 inl(u16 port)
+{
+    u32 val;
+    asm volatile ("inl %1, %0 \n" : "=a" (val) : "d"(port));
+    return val;
+}
+static void conf12_init(struct pci_access *a)
+{
+}
+static void conf12_cleanup(struct pci_access *a UNUSED)
+{
+}
+/*
+ * Before we decide to use direct hardware access mechanisms, we try to do some
+ * trivial checks to ensure it at least _seems_ to be working -- we just test
+ * whether bus 00 contains a host bridge (this is similar to checking
+ * techniques used in XFree86, but ours should be more reliable since we
+ * attempt to make use of direct access hints provided by the PCI BIOS).
+ *
+ * This should be close to trivial, but it isn't, because there are buggy
+ * chipsets (yes, you guessed it, by Intel and Compaq) that have no class ID.
+ */
+static int intel_sanity_check(struct pci_access *a, struct pci_methods *m)
+{
+    struct pci_dev d;
+    a->debug("...sanity check");
+    d.bus = 0;
+    d.func = 0;
+    for (d.dev = 0; d.dev < 32; d.dev++) {
+        u16 class, vendor;
+        if (m->read(&d, PCI_CLASS_DEVICE, (byte *) & class,
+             sizeof(class))
+            && (class == cpu_to_le16(PCI_CLASS_BRIDGE_HOST)
+            || class == cpu_to_le16(PCI_CLASS_DISPLAY_VGA))
+            || m->read(&d, PCI_VENDOR_ID, (byte *) & vendor,
+                   sizeof(vendor))
+            && (vendor == cpu_to_le16(PCI_VENDOR_ID_INTEL)
+            || vendor == cpu_to_le16(PCI_VENDOR_ID_COMPAQ))) {
+            a->debug("...outside the Asylum at 0/%02x/0",
+                 d.dev);
+            return 1;
+        }
+    }
+    a->debug("...insane");
+    return 0;
+}
+/*
+ *  Configuration type 1
+ */
+#define CONFIG_CMD(bus, device_fn, where)   (0x80000000 | (bus << 16) | (device_fn << 8) | (where & ~3))
+static int conf1_detect(struct pci_access *a)
+{
+    unsigned int tmp;
+    int res = 0;
+    outb(0x01, 0xCFB);
+    tmp = inl(0xCF8);
+    outl(0x80000000, 0xCF8);
+    if (inl(0xCF8) == 0x80000000)
+        res = 1;
+    outl(tmp, 0xCF8);
+    if (res)
+        res = intel_sanity_check(a, &pm_intel_conf1);
+    return res;
+}
+static int conf1_read(struct pci_dev *d, int pos, byte * buf, int len)
+{
+    int addr = 0xcfc + (pos & 3);
+    if (pos >= 256)
+        return 0;
+    outl(0x80000000 | ((d->bus & 0xff) << 16) |
+         (PCI_DEVFN(d->dev, d->func) << 8) | (pos & ~3), 0xcf8);
+    switch (len) {
+    case 1:
+        buf[0] = inb(addr);
+        break;
+    case 2:
+        ((u16 *) buf)[0] = cpu_to_le16(inw(addr));
+        break;
+    case 4:
+        ((u32 *) buf)[0] = cpu_to_le32(inl(addr));
+        break;
+    default:
+        return pci_generic_block_read(d, pos, buf, len);
+    }
+    return 1;
+}
+static int conf1_write(struct pci_dev *d, int pos, byte * buf, int len)
+{
+    int addr = 0xcfc + (pos & 3);
+    if (pos >= 256)
+        return 0;
+    outl(0x80000000 | ((d->bus & 0xff) << 16) |
+         (PCI_DEVFN(d->dev, d->func) << 8) | (pos & ~3), 0xcf8);
+    switch (len) {
+    case 1:
+        outb(buf[0], addr);
+        break;
+    case 2:
+        outw(le16_to_cpu(((u16 *) buf)[0]), addr);
+        break;
+    case 4:
+        outl(le32_to_cpu(((u32 *) buf)[0]), addr);
+        break;
+    default:
+        return pci_generic_block_write(d, pos, buf, len);
+    }
+    return 1;
+}
+/*
+ *  Configuration type 2. Obsolete and brain-damaged, but existing.
+ */
+static int conf2_detect(struct pci_access *a)
+{
+    /* This is ugly and tends to produce false positives. Beware. */
+    outb(0x00, 0xCFB);
+    outb(0x00, 0xCF8);
+    outb(0x00, 0xCFA);
+    if (inb(0xCF8) == 0x00 && inb(0xCFA) == 0x00)
+        return intel_sanity_check(a, &pm_intel_conf2);
+    else
+        return 0;
+}
+static int conf2_read(struct pci_dev *d, int pos, byte * buf, int len)
+{
+    int addr = 0xc000 | (d->dev << 8) | pos;
+    if (pos >= 256)
+        return 0;
+    if (d->dev >= 16)
+        /* conf2 supports only 16 devices per bus */
+        return 0;
+    outb((d->func << 1) | 0xf0, 0xcf8);
+    outb(d->bus, 0xcfa);
+    switch (len) {
+    case 1:
+        buf[0] = inb(addr);
+        break;
+    case 2:
+        ((u16 *) buf)[0] = cpu_to_le16(inw(addr));
+        break;
+    case 4:
+        ((u32 *) buf)[0] = cpu_to_le32(inl(addr));
+        break;
+    default:
+        outb(0, 0xcf8);
+        return pci_generic_block_read(d, pos, buf, len);
+    }
+    outb(0, 0xcf8);
+    return 1;
+}
+static int conf2_write(struct pci_dev *d, int pos, byte * buf, int len)
+{
+    int addr = 0xc000 | (d->dev << 8) | pos;
+    if (pos >= 256)
+        return 0;
+    if (d->dev >= 16)
+        d->access->error("conf2_write: only first 16 devices exist.");
+    outb((d->func << 1) | 0xf0, 0xcf8);
+    outb(d->bus, 0xcfa);
+    switch (len) {
+    case 1:
+        outb(buf[0], addr);
+        break;
+    case 2:
+        outw(le16_to_cpu(*(u16 *) buf), addr);
+        break;
+    case 4:
+        outl(le32_to_cpu(*(u32 *) buf), addr);
+        break;
+    default:
+        outb(0, 0xcf8);
+        return pci_generic_block_write(d, pos, buf, len);
+    }
+    outb(0, 0xcf8);
+    return 1;
+}
+struct pci_methods pm_intel_conf1 = {
+    "Intel-conf1",
+    NULL,           /* config */
+    conf1_detect,
+    conf12_init,
+    conf12_cleanup,
+    pci_generic_scan,
+    pci_generic_fill_info,
+    conf1_read,
+    conf1_write,
+    NULL,           /* init_dev */
+    NULL            /* cleanup_dev */
+};
+struct pci_methods pm_intel_conf2 = {
+    "Intel-conf2",
+    NULL,           /* config */
+    conf2_detect,
+    conf12_init,
+    conf12_cleanup,
+    pci_generic_scan,
+    pci_generic_fill_info,
+    conf2_read,
+    conf2_write,
+    NULL,           /* init_dev */
+    NULL            /* cleanup_dev */
+};

 /tags/0.2.0.2/uspace/pci/libpci/access.c
 ,0 → 1,270
+/*
+ *  The PCI Library -- User Access
+ *
+ *  Copyright (c) 1997--2003 Martin Mares <mj@ucw.cz>
+ *
+ *  May 8, 2006 - Modified and ported to HelenOS by Jakub Jermar.
+ *
+ *  Can be freely distributed and used under the terms of the GNU GPL.
+ */
+#include <stdio.h>
+#include <stdlib.h>
+#include <stdarg.h>
+#include <string.h>
+#include "internal.h"
+static struct pci_methods *pci_methods[PCI_ACCESS_MAX] = {
+    &pm_intel_conf1,
+    &pm_intel_conf2,
+};
+struct pci_access *pci_alloc(void)
+{
+    struct pci_access *a = malloc(sizeof(struct pci_access));
+    int i;
+    if (!a)
+        return NULL;
+    bzero(a, sizeof(*a));
+    for (i = 0; i < PCI_ACCESS_MAX; i++)
+        if (pci_methods[i] && pci_methods[i]->config)
+            pci_methods[i]->config(a);
+    return a;
+}
+void *pci_malloc(struct pci_access *a, int size)
+{
+    void *x = malloc(size);
+    if (!x)
+        a->error("Out of memory (allocation of %d bytes failed)", size);
+    return x;
+}
+void pci_mfree(void *x)
+{
+    if (x)
+        free(x);
+}
+static void pci_generic_error(char *msg, ...)
+{
+    va_list args;
+    va_start(args, msg);
+    puts("pcilib: ");
+    vprintf(msg, args);
+    putchar('\n');
+    exit(1);
+}
+static void pci_generic_warn(char *msg, ...)
+{
+    va_list args;
+    va_start(args, msg);
+    puts("pcilib: ");
+    vprintf(msg, args);
+    putchar('\n');
+}
+static void pci_generic_debug(char *msg, ...)
+{
+    va_list args;
+    va_start(args, msg);
+    vprintf(msg, args);
+    va_end(args);
+}
+static void pci_null_debug(char *msg UNUSED, ...)
+{
+}
+void pci_init(struct pci_access *a)
+{
+    if (!a->error)
+        a->error = pci_generic_error;
+    if (!a->warning)
+        a->warning = pci_generic_warn;
+    if (!a->debug)
+        a->debug = pci_generic_debug;
+    if (!a->debugging)
+        a->debug = pci_null_debug;
+    if (a->method) {
+        if (a->method >= PCI_ACCESS_MAX || !pci_methods[a->method])
+            a->error("This access method is not supported.");
+        a->methods = pci_methods[a->method];
+    } else {
+        unsigned int i;
+        for (i = 0; i < PCI_ACCESS_MAX; i++)
+            if (pci_methods[i]) {
+                a->debug("Trying method %d...", i);
+                if (pci_methods[i]->detect(a)) {
+                    a->debug("...OK\n");
+                    a->methods = pci_methods[i];
+                    a->method = i;
+                    break;
+                }
+                a->debug("...No.\n");
+            }
+        if (!a->methods)
+            a->error("Cannot find any working access method.");
+    }
+    a->debug("Decided to use %s\n", a->methods->name);
+    a->methods->init(a);
+}
+void pci_cleanup(struct pci_access *a)
+{
+    struct pci_dev *d, *e;
+    for (d = a->devices; d; d = e) {
+        e = d->next;
+        pci_free_dev(d);
+    }
+    if (a->methods)
+        a->methods->cleanup(a);
+    pci_free_name_list(a);
+    pci_mfree(a);
+}
+void pci_scan_bus(struct pci_access *a)
+{
+    a->methods->scan(a);
+}
+struct pci_dev *pci_alloc_dev(struct pci_access *a)
+{
+    struct pci_dev *d = pci_malloc(a, sizeof(struct pci_dev));
+    bzero(d, sizeof(*d));
+    d->access = a;
+    d->methods = a->methods;
+    d->hdrtype = -1;
+    if (d->methods->init_dev)
+        d->methods->init_dev(d);
+    return d;
+}
+int pci_link_dev(struct pci_access *a, struct pci_dev *d)
+{
+    d->next = a->devices;
+    a->devices = d;
+    return 1;
+}
+struct pci_dev *pci_get_dev(struct pci_access *a, int domain, int bus,
+                int dev, int func)
+{
+    struct pci_dev *d = pci_alloc_dev(a);
+    d->domain = domain;
+    d->bus = bus;
+    d->dev = dev;
+    d->func = func;
+    return d;
+}
+void pci_free_dev(struct pci_dev *d)
+{
+    if (d->methods->cleanup_dev)
+        d->methods->cleanup_dev(d);
+    pci_mfree(d);
+}
+static inline void
+pci_read_data(struct pci_dev *d, void *buf, int pos, int len)
+{
+    if (pos & (len - 1))
+        d->access->error("Unaligned read: pos=%02x, len=%d", pos,
+                 len);
+    if (pos + len <= d->cache_len)
+        memcpy(buf, d->cache + pos, len);
+    else if (!d->methods->read(d, pos, buf, len))
+        memset(buf, 0xff, len);
+}
+byte pci_read_byte(struct pci_dev *d, int pos)
+{
+    byte buf;
+    pci_read_data(d, &buf, pos, 1);
+    return buf;
+}
+word pci_read_word(struct pci_dev * d, int pos)
+{
+    word buf;
+    pci_read_data(d, &buf, pos, 2);
+    return le16_to_cpu(buf);
+}
+u32 pci_read_long(struct pci_dev * d, int pos)
+{
+    u32 buf;
+    pci_read_data(d, &buf, pos, 4);
+    return le32_to_cpu(buf);
+}
+int pci_read_block(struct pci_dev *d, int pos, byte * buf, int len)
+{
+    return d->methods->read(d, pos, buf, len);
+}
+static inline int
+pci_write_data(struct pci_dev *d, void *buf, int pos, int len)
+{
+    if (pos & (len - 1))
+        d->access->error("Unaligned write: pos=%02x,len=%d", pos, len);
+    if (pos + len <= d->cache_len)
+        memcpy(d->cache + pos, buf, len);
+    return d->methods->write(d, pos, buf, len);
+}
+int pci_write_byte(struct pci_dev *d, int pos, byte data)
+{
+    return pci_write_data(d, &data, pos, 1);
+}
+int pci_write_word(struct pci_dev *d, int pos, word data)
+{
+    word buf = cpu_to_le16(data);
+    return pci_write_data(d, &buf, pos, 2);
+}
+int pci_write_long(struct pci_dev *d, int pos, u32 data)
+{
+    u32 buf = cpu_to_le32(data);
+    return pci_write_data(d, &buf, pos, 4);
+}
+int pci_write_block(struct pci_dev *d, int pos, byte * buf, int len)
+{
+    if (pos < d->cache_len) {
+        int l = (pos + len >= d->cache_len) ? (d->cache_len - pos) : len;
+        memcpy(d->cache + pos, buf, l);
+    }
+    return d->methods->write(d, pos, buf, len);
+}
+int pci_fill_info(struct pci_dev *d, int flags)
+{
+    if (flags & PCI_FILL_RESCAN) {
+        flags &= ~PCI_FILL_RESCAN;
+        d->known_fields = 0;
+    }
+    if (flags & ~d->known_fields)
+        d->known_fields |= d->methods->fill_info(d, flags & ~d->known_fields);
+    return d->known_fields;
+}
+void pci_setup_cache(struct pci_dev *d, byte * cache, int len)
+{
+    d->cache = cache;
+    d->cache_len = len;
+}

 /tags/0.2.0.2/uspace/pci/libpci/internal.h
 ,0 → 1,43
+/*
+ *  The PCI Library -- Internal Stuff
+ *
+ *  Copyright (c) 1997--2004 Martin Mares <mj@ucw.cz>
+ *
+ *  May 8, 2006 - Modified and ported to HelenOS by Jakub Jermar.
+ *
+ *  Can be freely distributed and used under the terms of the GNU GPL.
+ */
+#include "pci.h"
+#include "sysdep.h"
+struct pci_methods {
+    char *name;
+    void (*config) (struct pci_access *);
+    int (*detect) (struct pci_access *);
+    void (*init) (struct pci_access *);
+    void (*cleanup) (struct pci_access *);
+    void (*scan) (struct pci_access *);
+    int (*fill_info) (struct pci_dev *, int flags);
+    int (*read) (struct pci_dev *, int pos, byte * buf, int len);
+    int (*write) (struct pci_dev *, int pos, byte * buf, int len);
+    void (*init_dev) (struct pci_dev *);
+    void (*cleanup_dev) (struct pci_dev *);
+};
+void pci_generic_scan_bus(struct pci_access *, byte * busmap, int bus);
+void pci_generic_scan(struct pci_access *);
+int pci_generic_fill_info(struct pci_dev *, int flags);
+int pci_generic_block_read(struct pci_dev *, int pos, byte * buf, int len);
+int pci_generic_block_write(struct pci_dev *, int pos, byte * buf,
+                int len);
+void *pci_malloc(struct pci_access *, int);
+void pci_mfree(void *);
+struct pci_dev *pci_alloc_dev(struct pci_access *);
+int pci_link_dev(struct pci_access *, struct pci_dev *);
+extern struct pci_methods pm_intel_conf1, pm_intel_conf2, pm_linux_proc,
+    pm_fbsd_device, pm_aix_device, pm_nbsd_libpci, pm_obsd_device,
+    pm_dump, pm_linux_sysfs;

 /tags/0.2.0.2/uspace/pci/libpci/names.c
 ,0 → 1,456
+/*
+ *  The PCI Library -- ID to Name Translation
+ *
+ *  Copyright (c) 1997--2005 Martin Mares <mj@ucw.cz>
+ *
+ *  May 8, 2006 - Modified and ported to HelenOS by Jakub Jermar.
+ *
+ *  Can be freely distributed and used under the terms of the GNU GPL.
+ */
+#include <stdio.h>
+#include <stdlib.h>
+#include <stdarg.h>
+#include <string.h>
+#include <errno.h>
+#include "internal.h"
+#include "pci_ids.h"
+struct id_entry {
+    struct id_entry *next;
+    u32 id12, id34;
+    byte cat;
+    byte name[1];
+};
+enum id_entry_type {
+    ID_UNKNOWN,
+    ID_VENDOR,
+    ID_DEVICE,
+    ID_SUBSYSTEM,
+    ID_GEN_SUBSYSTEM,
+    ID_CLASS,
+    ID_SUBCLASS,
+    ID_PROGIF
+};
+struct id_bucket {
+    struct id_bucket *next;
+    unsigned int full;
+};
+#define MAX_LINE 1024
+#define BUCKET_SIZE 8192
+#define HASH_SIZE 4099
+#ifdef __GNUC__
+#define BUCKET_ALIGNMENT __alignof__(struct id_bucket)
+#else
+union id_align {
+    struct id_bucket *next;
+    unsigned int full;
+};
+#define BUCKET_ALIGNMENT sizeof(union id_align)
+#endif
+#define BUCKET_ALIGN(n) ((n)+BUCKET_ALIGNMENT-(n)%BUCKET_ALIGNMENT)
+static void *id_alloc(struct pci_access *a, unsigned int size)
+{
+    struct id_bucket *buck = a->current_id_bucket;
+    unsigned int pos;
+    if (!buck || buck->full + size > BUCKET_SIZE) {
+        buck = pci_malloc(a, BUCKET_SIZE);
+        buck->next = a->current_id_bucket;
+        a->current_id_bucket = buck;
+        buck->full = BUCKET_ALIGN(sizeof(struct id_bucket));
+    }
+    pos = buck->full;
+    buck->full = BUCKET_ALIGN(buck->full + size);
+    return (byte *) buck + pos;
+}
+static inline u32 id_pair(unsigned int x, unsigned int y)
+{
+    return ((x << 16) | y);
+}
+static inline unsigned int id_hash(int cat, u32 id12, u32 id34)
+{
+    unsigned int h;
+    h = id12 ^ (id34 << 3) ^ (cat << 5);
+    return h % HASH_SIZE;
+}
+static struct id_entry *id_lookup(struct pci_access *a, int cat, int id1,
+                  int id2, int id3, int id4)
+{
+    struct id_entry *n;
+    u32 id12 = id_pair(id1, id2);
+    u32 id34 = id_pair(id3, id4);
+    n = a->id_hash[id_hash(cat, id12, id34)];
+    while (n && (n->id12 != id12 || n->id34 != id34 || n->cat != cat))
+        n = n->next;
+    return n;
+}
+static int id_insert(struct pci_access *a, int cat, int id1, int id2,
+             int id3, int id4, byte * text)
+{
+    u32 id12 = id_pair(id1, id2);
+    u32 id34 = id_pair(id3, id4);
+    unsigned int h = id_hash(cat, id12, id34);
+    struct id_entry *n = a->id_hash[h];
+    int len = strlen((char *) text);
+    while (n && (n->id12 != id12 || n->id34 != id34 || n->cat != cat))
+        n = n->next;
+    if (n)
+        return 1;
+    n = id_alloc(a, sizeof(struct id_entry) + len);
+    n->id12 = id12;
+    n->id34 = id34;
+    n->cat = cat;
+    memcpy(n->name, text, len + 1);
+    n->next = a->id_hash[h];
+    a->id_hash[h] = n;
+    return 0;
+}
+static int id_hex(byte * p, int cnt)
+{
+    int x = 0;
+    while (cnt--) {
+        x <<= 4;
+        if (*p >= '0' && *p <= '9')
+            x += (*p - '0');
+        else if (*p >= 'a' && *p <= 'f')
+            x += (*p - 'a' + 10);
+        else if (*p >= 'A' && *p <= 'F')
+            x += (*p - 'A' + 10);
+        else
+            return -1;
+        p++;
+    }
+    return x;
+}
+static inline int id_white_p(int c)
+{
+    return (c == ' ') || (c == '\t');
+}
+static const char *id_parse_list(struct pci_access *a, int *lino)
+{
+    byte *line;
+    byte *p;
+    int id1 = 0, id2 = 0, id3 = 0, id4 = 0;
+    int cat = -1;
+    int nest;
+    static const char parse_error[] = "Parse error";
+    int i;
+    *lino = 0;
+    for (i = 0; i < sizeof(pci_ids) / sizeof(char *); i++) {
+        line = (byte *) pci_ids[i];
+        (*lino)++;
+        p = line;
+        while (*p)
+            p++;
+        if (p > line && (p[-1] == ' ' || p[-1] == '\t'))
+            *--p = 0;
+        p = line;
+        while (id_white_p(*p))
+            p++;
+        if (!*p || *p == '#')
+            continue;
+        p = line;
+        while (*p == '\t')
+            p++;
+        nest = p - line;
+        if (!nest) {    /* Top-level entries */
+            if (p[0] == 'C' && p[1] == ' ') {   /* Class block */
+                if ((id1 = id_hex(p + 2, 2)) < 0 || !id_white_p(p[4]))
+                    return parse_error;
+                cat = ID_CLASS;
+                p += 5;
+            } else if (p[0] == 'S' && p[1] == ' ') {    /* Generic subsystem block */
+                if ((id1 = id_hex(p + 2, 4)) < 0 || p[6])
+                    return parse_error;
+                if (!id_lookup(a, ID_VENDOR, id1, 0, 0, 0))
+                    return "Vendor does not exist";
+                cat = ID_GEN_SUBSYSTEM;
+                continue;
+            } else if (p[0] >= 'A' && p[0] <= 'Z' && p[1] == ' ') { /* Unrecognized block (RFU) */
+                cat = ID_UNKNOWN;
+                continue;
+            } else {    /* Vendor ID */
+                if ((id1 = id_hex(p, 4)) < 0 || !id_white_p(p[4]))
+                    return parse_error;
+                cat = ID_VENDOR;
+                p += 5;
+            }
+            id2 = id3 = id4 = 0;
+        } else if (cat == ID_UNKNOWN)   /* Nested entries in RFU blocks are skipped */
+            continue;
+        else if (nest == 1) /* Nesting level 1 */
+            switch (cat) {
+            case ID_VENDOR:
+            case ID_DEVICE:
+            case ID_SUBSYSTEM:
+                if ((id2 = id_hex(p, 4)) < 0 || !id_white_p(p[4]))
+                    return parse_error;
+                p += 5;
+                cat = ID_DEVICE;
+                id3 = id4 = 0;
+                break;
+            case ID_GEN_SUBSYSTEM:
+                if ((id2 = id_hex(p, 4)) < 0 || !id_white_p(p[4]))
+                    return parse_error;
+                p += 5;
+                id3 = id4 = 0;
+                break;
+            case ID_CLASS:
+            case ID_SUBCLASS:
+            case ID_PROGIF:
+                if ((id2 = id_hex(p, 2)) < 0 || !id_white_p(p[2]))
+                    return parse_error;
+                p += 3;
+                cat = ID_SUBCLASS;
+                id3 = id4 = 0;
+                break;
+            default:
+                return parse_error;
+        } else if (nest == 2)   /* Nesting level 2 */
+            switch (cat) {
+            case ID_DEVICE:
+            case ID_SUBSYSTEM:
+                if ((id3 = id_hex(p, 4)) < 0 || !id_white_p(p[4])
+                    || (id4 = id_hex(p + 5, 4)) < 0 || !id_white_p(p[9]))
+                    return parse_error;
+                p += 10;
+                cat = ID_SUBSYSTEM;
+                break;
+            case ID_CLASS:
+            case ID_SUBCLASS:
+            case ID_PROGIF:
+                if ((id3 = id_hex(p, 2)) < 0 || !id_white_p(p[2]))
+                    return parse_error;
+                p += 3;
+                cat = ID_PROGIF;
+                id4 = 0;
+                break;
+            default:
+                return parse_error;
+        } else      /* Nesting level 3 or more */
+            return parse_error;
+        while (id_white_p(*p))
+            p++;
+        if (!*p)
+            return parse_error;
+        if (id_insert(a, cat, id1, id2, id3, id4, p))
+            return "Duplicate entry";
+    }
+    return NULL;
+}
+int pci_load_name_list(struct pci_access *a)
+{
+    int lino;
+    const char *err;
+    pci_free_name_list(a);
+    a->id_hash = pci_malloc(a, sizeof(struct id_entry *) * HASH_SIZE);
+    bzero(a->id_hash, sizeof(struct id_entry *) * HASH_SIZE);
+    err = id_parse_list(a, &lino);
+    if (err)
+        a->error("%s at %s, element %d\n", err, "pci_ids.h", lino);
+    return 1;
+}
+void pci_free_name_list(struct pci_access *a)
+{
+    pci_mfree(a->id_hash);
+    a->id_hash = NULL;
+    while (a->current_id_bucket) {
+        struct id_bucket *buck = a->current_id_bucket;
+        a->current_id_bucket = buck->next;
+        pci_mfree(buck);
+    }
+}
+static struct id_entry *id_lookup_subsys(struct pci_access *a, int iv,
+                     int id, int isv, int isd)
+{
+    struct id_entry *d = NULL;
+    if (iv > 0 && id > 0)   /* Per-device lookup */
+        d = id_lookup(a, ID_SUBSYSTEM, iv, id, isv, isd);
+    if (!d)         /* Generic lookup */
+        d = id_lookup(a, ID_GEN_SUBSYSTEM, isv, isd, 0, 0);
+    if (!d && iv == isv && id == isd)   /* Check for subsystem == device */
+        d = id_lookup(a, ID_DEVICE, iv, id, 0, 0);
+    return d;
+}
+char *pci_lookup_name(struct pci_access *a, char *buf, int size, int flags,
+              ...)
+{
+    va_list args;
+    int num, res, synth;
+    struct id_entry *v, *d, *cls, *pif;
+    int iv, id, isv, isd, icls, ipif;
+    va_start(args, flags);
+    num = 0;
+    if ((flags & PCI_LOOKUP_NUMERIC) || a->numeric_ids) {
+        flags &= ~PCI_LOOKUP_NUMERIC;
+        num = 1;
+    } else if (!a->id_hash) {
+        if (!pci_load_name_list(a))
+            num = a->numeric_ids = 1;
+    }
+    if (flags & PCI_LOOKUP_NO_NUMBERS) {
+        flags &= ~PCI_LOOKUP_NO_NUMBERS;
+        synth = 0;
+        if (num)
+            return NULL;
+    } else
+        synth = 1;
+    switch (flags) {
+    case PCI_LOOKUP_VENDOR:
+        iv = va_arg(args, int);
+        if (num)
+            res = snprintf(buf, size, "%04x", iv);
+        else if (v = id_lookup(a, ID_VENDOR, iv, 0, 0, 0))
+            return (char *) v->name;
+        else
+            res = snprintf(buf, size, "Unknown vendor %04x", iv);
+        break;
+    case PCI_LOOKUP_DEVICE:
+        iv = va_arg(args, int);
+        id = va_arg(args, int);
+        if (num)
+            res = snprintf(buf, size, "%04x", id);
+        else if (d = id_lookup(a, ID_DEVICE, iv, id, 0, 0))
+            return (char *) d->name;
+        else if (synth)
+            res = snprintf(buf, size, "Unknown device %04x", id);
+        else
+            return NULL;
+        break;
+    case PCI_LOOKUP_VENDOR | PCI_LOOKUP_DEVICE:
+        iv = va_arg(args, int);
+        id = va_arg(args, int);
+        if (num)
+            res = snprintf(buf, size, "%04x:%04x", iv, id);
+        else {
+            v = id_lookup(a, ID_VENDOR, iv, 0, 0, 0);
+            d = id_lookup(a, ID_DEVICE, iv, id, 0, 0);
+            if (v && d)
+                res = snprintf(buf, size, "%s %s", v->name,
+                         d->name);
+            else if (!synth)
+                return NULL;
+            else if (!v)
+                res = snprintf(buf, size, "Unknown device %04x:%04x", iv, id);
+            else    /* !d */
+                res = snprintf(buf, size, "%s Unknown device %04x", v->name, id);
+        }
+        break;
+    case PCI_LOOKUP_SUBSYSTEM | PCI_LOOKUP_VENDOR:
+        isv = va_arg(args, int);
+        if (num)
+            res = snprintf(buf, size, "%04x", isv);
+        else if (v = id_lookup(a, ID_VENDOR, isv, 0, 0, 0))
+            return (char *) v->name;
+        else if (synth)
+            res = snprintf(buf, size, "Unknown vendor %04x", isv);
+        else
+            return NULL;
+        break;
+    case PCI_LOOKUP_SUBSYSTEM | PCI_LOOKUP_DEVICE:
+        iv = va_arg(args, int);
+        id = va_arg(args, int);
+        isv = va_arg(args, int);
+        isd = va_arg(args, int);
+        if (num)
+            res = snprintf(buf, size, "%04x", isd);
+        else if (d = id_lookup_subsys(a, iv, id, isv, isd))
+            return (char *) d->name;
+        else if (synth)
+            res = snprintf(buf, size, "Unknown device %04x", isd);
+        else
+            return NULL;
+        break;
+    case PCI_LOOKUP_VENDOR | PCI_LOOKUP_DEVICE | PCI_LOOKUP_SUBSYSTEM:
+        iv = va_arg(args, int);
+        id = va_arg(args, int);
+        isv = va_arg(args, int);
+        isd = va_arg(args, int);
+        if (num)
+            res = snprintf(buf, size, "%04x:%04x", isv, isd);
+        else {
+            v = id_lookup(a, ID_VENDOR, isv, 0, 0, 0);
+            d = id_lookup_subsys(a, iv, id, isv, isd);
+            if (v && d)
+                res = snprintf(buf, size, "%s %s", v->name, d->name);
+            else if (!synth)
+                return NULL;
+            else if (!v)
+                res = snprintf(buf, size, "Unknown device %04x:%04x", isv, isd);
+            else    /* !d */
+                res = snprintf(buf, size, "%s Unknown device %04x", v->name, isd);
+        }
+        break;
+    case PCI_LOOKUP_CLASS:
+        icls = va_arg(args, int);
+        if (num)
+            res = snprintf(buf, size, "%04x", icls);
+        else if (cls = id_lookup(a, ID_SUBCLASS, icls >> 8, icls & 0xff, 0, 0))
+            return (char *) cls->name;
+        else if (cls = id_lookup(a, ID_CLASS, icls, 0, 0, 0))
+            res = snprintf(buf, size, "%s [%04x]", cls->name, icls);
+        else if (synth)
+            res = snprintf(buf, size, "Class %04x", icls);
+        else
+            return NULL;
+        break;
+    case PCI_LOOKUP_PROGIF:
+        icls = va_arg(args, int);
+        ipif = va_arg(args, int);
+        if (num)
+            res = snprintf(buf, size, "%02x", ipif);
+        else if (pif = id_lookup(a, ID_PROGIF, icls >> 8, icls & 0xff, ipif, 0))
+            return (char *) pif->name;
+        else if (icls == 0x0101 && !(ipif & 0x70)) {
+            /* IDE controllers have complex prog-if semantics */
+            res = snprintf(buf, size, "%s%s%s%s%s",
+                       (ipif & 0x80) ? "Master " : "",
+                       (ipif & 0x08) ? "SecP " : "",
+                       (ipif & 0x04) ? "SecO " : "",
+                       (ipif & 0x02) ? "PriP " : "",
+                       (ipif & 0x01) ? "PriO " : "");
+            if (res > 0 && res < size)
+                buf[--res] = 0;
+        } else if (synth)
+            res = snprintf(buf, size, "ProgIf %02x", ipif);
+        else
+            return NULL;
+        break;
+    default:
+        return "<pci_lookup_name: invalid request>";
+    }
+    if (res < 0 || res >= size)
+        return "<pci_lookup_name: buffer too small>";
+    else
+        return buf;
+}

 /tags/0.2.0.2/uspace/pci/libpci/types.h
 ,0 → 1,49
+/*
+ *  The PCI Library -- Types and Format Strings
+ *
+ *  Copyright (c) 1997--2005 Martin Mares <mj@ucw.cz>
+ *
+ *  May 8, 2006 - Modified and ported to HelenOS by Jakub Jermar.
+ *
+ *  Can be freely distributed and used under the terms of the GNU GPL.
+ */
+#include <types.h>
+#ifndef PCI_HAVE_Uxx_TYPES
+typedef uint8_t u8;
+typedef uint16_t u16;
+typedef uint32_t u32;
+#ifdef PCI_HAVE_64BIT_ADDRESS
+#include <limits.h>
+#if ULONG_MAX > 0xffffffff
+typedef unsigned long u64;
+#define PCI_U64_FMT "l"
+#else
+typedef unsigned long long u64;
+#define PCI_U64_FMT "ll"
+#endif
+#endif
+#endif              /* PCI_HAVE_Uxx_TYPES */
+#ifdef PCI_HAVE_64BIT_ADDRESS
+typedef u64 pciaddr_t;
+#define PCIADDR_T_FMT "%08" PCI_U64_FMT "x"
+#define PCIADDR_PORT_FMT "%04" PCI_U64_FMT "x"
+#else
+typedef u32 pciaddr_t;
+#define PCIADDR_T_FMT "%08x"
+#define PCIADDR_PORT_FMT "%04x"
+#endif
+#ifdef PCI_ARCH_SPARC64
+/* On sparc64 Linux the kernel reports remapped port addresses and IRQ numbers */
+#undef PCIADDR_PORT_FMT
+#define PCIADDR_PORT_FMT PCIADDR_T_FMT
+#define PCIIRQ_FMT "%08x"
+#else
+#define PCIIRQ_FMT "%d"
+#endif

 /tags/0.2.0.2/uspace/pci/libpci/generic.c
 ,0 → 1,206
+/*
+ *  The PCI Library -- Generic Direct Access Functions
+ *
+ *  Copyright (c) 1997--2000 Martin Mares <mj@ucw.cz>
+ *
+ *  May 8, 2006 - Modified and ported to HelenOS by Jakub Jermar.
+ *
+ *  Can be freely distributed and used under the terms of the GNU GPL.
+ */
+#include <string.h>
+#include "internal.h"
+void pci_generic_scan_bus(struct pci_access *a, byte * busmap, int bus)
+{
+    int dev, multi, ht;
+    struct pci_dev *t;
+    a->debug("Scanning bus %02x for devices...\n", bus);
+    if (busmap[bus]) {
+        a->warning("Bus %02x seen twice (firmware bug). Ignored.",
+               bus);
+        return;
+    }
+    busmap[bus] = 1;
+    t = pci_alloc_dev(a);
+    t->bus = bus;
+    for (dev = 0; dev < 32; dev++) {
+        t->dev = dev;
+        multi = 0;
+        for (t->func = 0; !t->func || multi && t->func < 8;
+             t->func++) {
+            u32 vd = pci_read_long(t, PCI_VENDOR_ID);
+            struct pci_dev *d;
+            if (!vd || vd == 0xffffffff)
+                continue;
+            ht = pci_read_byte(t, PCI_HEADER_TYPE);
+            if (!t->func)
+                multi = ht & 0x80;
+            ht &= 0x7f;
+            d = pci_alloc_dev(a);
+            d->bus = t->bus;
+            d->dev = t->dev;
+            d->func = t->func;
+            d->vendor_id = vd & 0xffff;
+            d->device_id = vd >> 16U;
+            d->known_fields = PCI_FILL_IDENT;
+            d->hdrtype = ht;
+            pci_link_dev(a, d);
+            switch (ht) {
+            case PCI_HEADER_TYPE_NORMAL:
+                break;
+            case PCI_HEADER_TYPE_BRIDGE:
+            case PCI_HEADER_TYPE_CARDBUS:
+                pci_generic_scan_bus(a, busmap,
+                             pci_read_byte(t,
+                                   PCI_SECONDARY_BUS));
+                break;
+            default:
+                a->debug
+                    ("Device %04x:%02x:%02x.%d has unknown header type %02x.\n",
+                     d->domain, d->bus, d->dev, d->func,
+                     ht);
+            }
+        }
+    }
+    pci_free_dev(t);
+}
+void pci_generic_scan(struct pci_access *a)
+{
+    byte busmap[256];
+    bzero(busmap, sizeof(busmap));
+    pci_generic_scan_bus(a, busmap, 0);
+}
+int pci_generic_fill_info(struct pci_dev *d, int flags)
+{
+    struct pci_access *a = d->access;
+    if ((flags & (PCI_FILL_BASES | PCI_FILL_ROM_BASE))
+        && d->hdrtype < 0)
+        d->hdrtype = pci_read_byte(d, PCI_HEADER_TYPE) & 0x7f;
+    if (flags & PCI_FILL_IDENT) {
+        d->vendor_id = pci_read_word(d, PCI_VENDOR_ID);
+        d->device_id = pci_read_word(d, PCI_DEVICE_ID);
+    }
+    if (flags & PCI_FILL_IRQ)
+        d->irq = pci_read_byte(d, PCI_INTERRUPT_LINE);
+    if (flags & PCI_FILL_BASES) {
+        int cnt = 0, i;
+        bzero(d->base_addr, sizeof(d->base_addr));
+        switch (d->hdrtype) {
+        case PCI_HEADER_TYPE_NORMAL:
+            cnt = 6;
+            break;
+        case PCI_HEADER_TYPE_BRIDGE:
+            cnt = 2;
+            break;
+        case PCI_HEADER_TYPE_CARDBUS:
+            cnt = 1;
+            break;
+        }
+        if (cnt) {
+            for (i = 0; i < cnt; i++) {
+                u32 x = pci_read_long(d, PCI_BASE_ADDRESS_0 + i * 4);
+                if (!x || x == (u32) ~ 0)
+                    continue;
+                if ((x & PCI_BASE_ADDRESS_SPACE) == PCI_BASE_ADDRESS_SPACE_IO)
+                    d->base_addr[i] = x;
+                else {
+                    if ((x & PCI_BASE_ADDRESS_MEM_TYPE_MASK) != PCI_BASE_ADDRESS_MEM_TYPE_64)
+                        d->base_addr[i] = x;
+                    else if (i >= cnt - 1)
+                        a->warning("%04x:%02x:%02x.%d: Invalid 64-bit address seen for BAR %d.",
+                             d->domain, d->bus,
+                             d->dev, d->func, i);
+                    else {
+                        u32 y = pci_read_long(d, PCI_BASE_ADDRESS_0 + (++i) * 4);
+#ifdef PCI_HAVE_64BIT_ADDRESS
+                        d->base_addr[i - 1] = x | (((pciaddr_t) y) << 32);
+#else
+                        if (y)
+                            a->warning("%04x:%02x:%02x.%d 64-bit device address ignored.",
+                                 d->domain,
+                                 d->bus,
+                                 d->dev,
+                                 d->func);
+                        else
+                            d->base_addr[i - 1] = x;
+#endif
+                    }
+                }
+            }
+        }
+    }
+    if (flags & PCI_FILL_ROM_BASE) {
+        int reg = 0;
+        d->rom_base_addr = 0;
+        switch (d->hdrtype) {
+        case PCI_HEADER_TYPE_NORMAL:
+            reg = PCI_ROM_ADDRESS;
+            break;
+        case PCI_HEADER_TYPE_BRIDGE:
+            reg = PCI_ROM_ADDRESS1;
+            break;
+        }
+        if (reg) {
+            u32 u = pci_read_long(d, reg);
+            if (u != 0xffffffff)
+                d->rom_base_addr = u;
+        }
+    }
+    return flags & ~PCI_FILL_SIZES;
+}
+static int
+pci_generic_block_op(struct pci_dev *d, int pos, byte * buf, int len,
+             int (*r) (struct pci_dev * d, int pos, byte * buf,
+                   int len))
+{
+    if ((pos & 1) && len >= 1) {
+        if (!r(d, pos, buf, 1))
+            return 0;
+        pos++;
+        buf++;
+        len--;
+    }
+    if ((pos & 3) && len >= 2) {
+        if (!r(d, pos, buf, 2))
+            return 0;
+        pos += 2;
+        buf += 2;
+        len -= 2;
+    }
+    while (len >= 4) {
+        if (!r(d, pos, buf, 4))
+            return 0;
+        pos += 4;
+        buf += 4;
+        len -= 4;
+    }
+    if (len >= 2) {
+        if (!r(d, pos, buf, 2))
+            return 0;
+        pos += 2;
+        buf += 2;
+        len -= 2;
+    }
+    if (len && !r(d, pos, buf, 1))
+        return 0;
+    return 1;
+}
+int pci_generic_block_read(struct pci_dev *d, int pos, byte * buf, int len)
+{
+    return pci_generic_block_op(d, pos, buf, len, d->access->methods->read);
+}
+int pci_generic_block_write(struct pci_dev *d, int pos, byte * buf, int len)
+{
+    return pci_generic_block_op(d, pos, buf, len, d->access->methods->write);
+}

 /tags/0.2.0.2/uspace/pci/libpci/sysdep.h
 ,0 → 1,26
+/*
+ *  The PCI Library -- System-Dependent Stuff
+ *
+ *  Copyright (c) 1997--2004 Martin Mares <mj@ucw.cz>
+ *
+ *  May 8, 2006 - Modified and ported to HelenOS by Jakub Jermar.
+ *
+ *  Can be freely distributed and used under the terms of the GNU GPL.
+ */
+#ifdef __GNUC__
+#define UNUSED __attribute__((unused))
+#define NONRET __attribute__((noreturn))
+#else
+#define UNUSED
+#define NONRET
+#define inline
+#endif
+typedef u8 byte;
+typedef u16 word;
+#define cpu_to_le16(x) (x)
+#define cpu_to_le32(x) (x)
+#define le16_to_cpu(x) (x)
+#define le32_to_cpu(x) (x)

 /tags/0.2.0.2/uspace/pci/libpci/header.h
 ,0 → 1,937
+/*
+ *  The PCI Library -- PCI Header Structure (based on <linux/pci.h>)
+ *
+ *  Copyright (c) 1997--2005 Martin Mares <mj@ucw.cz>
+ *
+ *  May 8, 2006 - Modified and ported to HelenOS by Jakub Jermar.
+ *
+ *  Can be freely distributed and used under the terms of the GNU GPL.
+ */
+/*
+ * Under PCI, each device has 256 bytes of configuration address space,
+ * of which the first 64 bytes are standardized as follows:
+ */
+#define PCI_VENDOR_ID       0x00    /* 16 bits */
+#define PCI_DEVICE_ID       0x02    /* 16 bits */
+#define PCI_COMMAND     0x04    /* 16 bits */
+#define  PCI_COMMAND_IO     0x1 /* Enable response in I/O space */
+#define  PCI_COMMAND_MEMORY 0x2 /* Enable response in Memory space */
+#define  PCI_COMMAND_MASTER 0x4 /* Enable bus mastering */
+#define  PCI_COMMAND_SPECIAL    0x8 /* Enable response to special cycles */
+#define  PCI_COMMAND_INVALIDATE 0x10    /* Use memory write and invalidate */
+#define  PCI_COMMAND_VGA_PALETTE 0x20   /* Enable palette snooping */
+#define  PCI_COMMAND_PARITY 0x40    /* Enable parity checking */
+#define  PCI_COMMAND_WAIT   0x80    /* Enable address/data stepping */
+#define  PCI_COMMAND_SERR   0x100   /* Enable SERR */
+#define  PCI_COMMAND_FAST_BACK  0x200   /* Enable back-to-back writes */
+#define PCI_STATUS      0x06    /* 16 bits */
+#define  PCI_STATUS_CAP_LIST    0x10    /* Support Capability List */
+#define  PCI_STATUS_66MHZ   0x20    /* Support 66 Mhz PCI 2.1 bus */
+#define  PCI_STATUS_UDF     0x40    /* Support User Definable Features [obsolete] */
+#define  PCI_STATUS_FAST_BACK   0x80    /* Accept fast-back to back */
+#define  PCI_STATUS_PARITY  0x100   /* Detected parity error */
+#define  PCI_STATUS_DEVSEL_MASK 0x600   /* DEVSEL timing */
+#define  PCI_STATUS_DEVSEL_FAST 0x000
+#define  PCI_STATUS_DEVSEL_MEDIUM 0x200
+#define  PCI_STATUS_DEVSEL_SLOW 0x400
+#define  PCI_STATUS_SIG_TARGET_ABORT 0x800  /* Set on target abort */
+#define  PCI_STATUS_REC_TARGET_ABORT 0x1000 /* Master ack of " */
+#define  PCI_STATUS_REC_MASTER_ABORT 0x2000 /* Set on master abort */
+#define  PCI_STATUS_SIG_SYSTEM_ERROR 0x4000 /* Set when we drive SERR */
+#define  PCI_STATUS_DETECTED_PARITY 0x8000  /* Set on parity error */
+#define PCI_CLASS_REVISION  0x08    /* High 24 bits are class, low 8
+                       revision */
+#define PCI_REVISION_ID         0x08    /* Revision ID */
+#define PCI_CLASS_PROG          0x09    /* Reg. Level Programming Interface */
+#define PCI_CLASS_DEVICE        0x0a    /* Device class */
+#define PCI_CACHE_LINE_SIZE 0x0c    /* 8 bits */
+#define PCI_LATENCY_TIMER   0x0d    /* 8 bits */
+#define PCI_HEADER_TYPE     0x0e    /* 8 bits */
+#define  PCI_HEADER_TYPE_NORMAL 0
+#define  PCI_HEADER_TYPE_BRIDGE 1
+#define  PCI_HEADER_TYPE_CARDBUS 2
+#define PCI_BIST        0x0f    /* 8 bits */
+#define PCI_BIST_CODE_MASK  0x0f    /* Return result */
+#define PCI_BIST_START      0x40    /* 1 to start BIST, 2 secs or less */
+#define PCI_BIST_CAPABLE    0x80    /* 1 if BIST capable */
+/*
+ * Base addresses specify locations in memory or I/O space.
+ * Decoded size can be determined by writing a value of
+ * 0xffffffff to the register, and reading it back.  Only
+ * 1 bits are decoded.
+ */
+#define PCI_BASE_ADDRESS_0  0x10    /* 32 bits */
+#define PCI_BASE_ADDRESS_1  0x14    /* 32 bits [htype 0,1 only] */
+#define PCI_BASE_ADDRESS_2  0x18    /* 32 bits [htype 0 only] */
+#define PCI_BASE_ADDRESS_3  0x1c    /* 32 bits */
+#define PCI_BASE_ADDRESS_4  0x20    /* 32 bits */
+#define PCI_BASE_ADDRESS_5  0x24    /* 32 bits */
+#define  PCI_BASE_ADDRESS_SPACE 0x01    /* 0 = memory, 1 = I/O */
+#define  PCI_BASE_ADDRESS_SPACE_IO 0x01
+#define  PCI_BASE_ADDRESS_SPACE_MEMORY 0x00
+#define  PCI_BASE_ADDRESS_MEM_TYPE_MASK 0x06
+#define  PCI_BASE_ADDRESS_MEM_TYPE_32   0x00    /* 32 bit address */
+#define  PCI_BASE_ADDRESS_MEM_TYPE_1M   0x02    /* Below 1M [obsolete] */
+#define  PCI_BASE_ADDRESS_MEM_TYPE_64   0x04    /* 64 bit address */
+#define  PCI_BASE_ADDRESS_MEM_PREFETCH  0x08    /* prefetchable? */
+#define  PCI_BASE_ADDRESS_MEM_MASK  (~(pciaddr_t)0x0f)
+#define  PCI_BASE_ADDRESS_IO_MASK   (~(pciaddr_t)0x03)
+/* bit 1 is reserved if address_space = 1 */
+/* Header type 0 (normal devices) */
+#define PCI_CARDBUS_CIS     0x28
+#define PCI_SUBSYSTEM_VENDOR_ID 0x2c
+#define PCI_SUBSYSTEM_ID    0x2e
+#define PCI_ROM_ADDRESS     0x30    /* Bits 31..11 are address, 10..1 reserved */
+#define  PCI_ROM_ADDRESS_ENABLE 0x01
+#define PCI_ROM_ADDRESS_MASK    (~(pciaddr_t)0x7ff)
+#define PCI_CAPABILITY_LIST 0x34    /* Offset of first capability list entry */
+/* 0x35-0x3b are reserved */
+#define PCI_INTERRUPT_LINE  0x3c    /* 8 bits */
+#define PCI_INTERRUPT_PIN   0x3d    /* 8 bits */
+#define PCI_MIN_GNT     0x3e    /* 8 bits */
+#define PCI_MAX_LAT     0x3f    /* 8 bits */
+/* Header type 1 (PCI-to-PCI bridges) */
+#define PCI_PRIMARY_BUS     0x18    /* Primary bus number */
+#define PCI_SECONDARY_BUS   0x19    /* Secondary bus number */
+#define PCI_SUBORDINATE_BUS 0x1a    /* Highest bus number behind the bridge */
+#define PCI_SEC_LATENCY_TIMER   0x1b    /* Latency timer for secondary interface */
+#define PCI_IO_BASE     0x1c    /* I/O range behind the bridge */
+#define PCI_IO_LIMIT        0x1d
+#define  PCI_IO_RANGE_TYPE_MASK 0x0f    /* I/O bridging type */
+#define  PCI_IO_RANGE_TYPE_16   0x00
+#define  PCI_IO_RANGE_TYPE_32   0x01
+#define  PCI_IO_RANGE_MASK  ~0x0f
+#define PCI_SEC_STATUS      0x1e    /* Secondary status register */
+#define PCI_MEMORY_BASE     0x20    /* Memory range behind */
+#define PCI_MEMORY_LIMIT    0x22
+#define  PCI_MEMORY_RANGE_TYPE_MASK 0x0f
+#define  PCI_MEMORY_RANGE_MASK  ~0x0f
+#define PCI_PREF_MEMORY_BASE    0x24    /* Prefetchable memory range behind */
+#define PCI_PREF_MEMORY_LIMIT   0x26
+#define  PCI_PREF_RANGE_TYPE_MASK 0x0f
+#define  PCI_PREF_RANGE_TYPE_32 0x00
+#define  PCI_PREF_RANGE_TYPE_64 0x01
+#define  PCI_PREF_RANGE_MASK    ~0x0f
+#define PCI_PREF_BASE_UPPER32   0x28    /* Upper half of prefetchable memory range */
+#define PCI_PREF_LIMIT_UPPER32  0x2c
+#define PCI_IO_BASE_UPPER16 0x30    /* Upper half of I/O addresses */
+#define PCI_IO_LIMIT_UPPER16    0x32
+/* 0x34 same as for htype 0 */
+/* 0x35-0x3b is reserved */
+#define PCI_ROM_ADDRESS1    0x38    /* Same as PCI_ROM_ADDRESS, but for htype 1 */
+/* 0x3c-0x3d are same as for htype 0 */
+#define PCI_BRIDGE_CONTROL  0x3e
+#define  PCI_BRIDGE_CTL_PARITY  0x01    /* Enable parity detection on secondary interface */
+#define  PCI_BRIDGE_CTL_SERR    0x02    /* The same for SERR forwarding */
+#define  PCI_BRIDGE_CTL_NO_ISA  0x04    /* Disable bridging of ISA ports */
+#define  PCI_BRIDGE_CTL_VGA 0x08    /* Forward VGA addresses */
+#define  PCI_BRIDGE_CTL_MASTER_ABORT 0x20   /* Report master aborts */
+#define  PCI_BRIDGE_CTL_BUS_RESET 0x40  /* Secondary bus reset */
+#define  PCI_BRIDGE_CTL_FAST_BACK 0x80  /* Fast Back2Back enabled on secondary interface */
+/* Header type 2 (CardBus bridges) */
+/* 0x14-0x15 reserved */
+#define PCI_CB_SEC_STATUS   0x16    /* Secondary status */
+#define PCI_CB_PRIMARY_BUS  0x18    /* PCI bus number */
+#define PCI_CB_CARD_BUS     0x19    /* CardBus bus number */
+#define PCI_CB_SUBORDINATE_BUS  0x1a    /* Subordinate bus number */
+#define PCI_CB_LATENCY_TIMER    0x1b    /* CardBus latency timer */
+#define PCI_CB_MEMORY_BASE_0    0x1c
+#define PCI_CB_MEMORY_LIMIT_0   0x20
+#define PCI_CB_MEMORY_BASE_1    0x24
+#define PCI_CB_MEMORY_LIMIT_1   0x28
+#define PCI_CB_IO_BASE_0    0x2c
+#define PCI_CB_IO_BASE_0_HI 0x2e
+#define PCI_CB_IO_LIMIT_0   0x30
+#define PCI_CB_IO_LIMIT_0_HI    0x32
+#define PCI_CB_IO_BASE_1    0x34
+#define PCI_CB_IO_BASE_1_HI 0x36
+#define PCI_CB_IO_LIMIT_1   0x38
+#define PCI_CB_IO_LIMIT_1_HI    0x3a
+#define  PCI_CB_IO_RANGE_MASK   ~0x03
+/* 0x3c-0x3d are same as for htype 0 */
+#define PCI_CB_BRIDGE_CONTROL   0x3e
+#define  PCI_CB_BRIDGE_CTL_PARITY   0x01    /* Similar to standard bridge control register */
+#define  PCI_CB_BRIDGE_CTL_SERR     0x02
+#define  PCI_CB_BRIDGE_CTL_ISA      0x04
+#define  PCI_CB_BRIDGE_CTL_VGA      0x08
+#define  PCI_CB_BRIDGE_CTL_MASTER_ABORT 0x20
+#define  PCI_CB_BRIDGE_CTL_CB_RESET 0x40    /* CardBus reset */
+#define  PCI_CB_BRIDGE_CTL_16BIT_INT    0x80    /* Enable interrupt for 16-bit cards */
+#define  PCI_CB_BRIDGE_CTL_PREFETCH_MEM0 0x100  /* Prefetch enable for both memory regions */
+#define  PCI_CB_BRIDGE_CTL_PREFETCH_MEM1 0x200
+#define  PCI_CB_BRIDGE_CTL_POST_WRITES  0x400
+#define PCI_CB_SUBSYSTEM_VENDOR_ID 0x40
+#define PCI_CB_SUBSYSTEM_ID 0x42
+#define PCI_CB_LEGACY_MODE_BASE 0x44    /* 16-bit PC Card legacy mode base address (ExCa) */
+/* 0x48-0x7f reserved */
+/* Capability lists */
+#define PCI_CAP_LIST_ID     0    /* Capability ID */
+#define  PCI_CAP_ID_PM      0x01    /* Power Management */
+#define  PCI_CAP_ID_AGP     0x02    /* Accelerated Graphics Port */
+#define  PCI_CAP_ID_VPD     0x03    /* Vital Product Data */
+#define  PCI_CAP_ID_SLOTID  0x04    /* Slot Identification */
+#define  PCI_CAP_ID_MSI     0x05    /* Message Signalled Interrupts */
+#define  PCI_CAP_ID_CHSWP   0x06    /* CompactPCI HotSwap */
+#define  PCI_CAP_ID_PCIX        0x07    /* PCI-X */
+#define  PCI_CAP_ID_HT          0x08    /* HyperTransport */
+#define  PCI_CAP_ID_VNDR    0x09    /* Vendor specific */
+#define  PCI_CAP_ID_DBG     0x0A    /* Debug port */
+#define  PCI_CAP_ID_CCRC    0x0B    /* CompactPCI Central Resource Control */
+#define  PCI_CAP_ID_AGP3    0x0E    /* AGP 8x */
+#define  PCI_CAP_ID_EXP     0x10    /* PCI Express */
+#define  PCI_CAP_ID_MSIX    0x11    /* MSI-X */
+#define PCI_CAP_LIST_NEXT   1   /* Next capability in the list */
+#define PCI_CAP_FLAGS       2   /* Capability defined flags (16 bits) */
+#define PCI_CAP_SIZEOF      4
+/* Capabilities residing in the PCI Express extended configuration space */
+#define PCI_EXT_CAP_ID_AER  0x01    /* Advanced Error Reporting */
+#define PCI_EXT_CAP_ID_VC   0x02    /* Virtual Channel */
+#define PCI_EXT_CAP_ID_DSN  0x03    /* Device Serial Number */
+#define PCI_EXT_CAP_ID_PB   0x04    /* Power Budgeting */
+/* Power Management Registers */
+#define  PCI_PM_CAP_VER_MASK    0x0007  /* Version (2=PM1.1) */
+#define  PCI_PM_CAP_PME_CLOCK   0x0008  /* Clock required for PME generation */
+#define  PCI_PM_CAP_DSI     0x0020  /* Device specific initialization required */
+#define  PCI_PM_CAP_AUX_C_MASK  0x01c0  /* Maximum aux current required in D3cold */
+#define  PCI_PM_CAP_D1      0x0200  /* D1 power state support */
+#define  PCI_PM_CAP_D2      0x0400  /* D2 power state support */
+#define  PCI_PM_CAP_PME_D0  0x0800  /* PME can be asserted from D0 */
+#define  PCI_PM_CAP_PME_D1  0x1000  /* PME can be asserted from D1 */
+#define  PCI_PM_CAP_PME_D2  0x2000  /* PME can be asserted from D2 */
+#define  PCI_PM_CAP_PME_D3_HOT  0x4000  /* PME can be asserted from D3hot */
+#define  PCI_PM_CAP_PME_D3_COLD 0x8000  /* PME can be asserted from D3cold */
+#define PCI_PM_CTRL     4   /* PM control and status register */
+#define  PCI_PM_CTRL_STATE_MASK 0x0003  /* Current power state (D0 to D3) */
+#define  PCI_PM_CTRL_PME_ENABLE 0x0100  /* PME pin enable */
+#define  PCI_PM_CTRL_DATA_SEL_MASK  0x1e00  /* PM table data index */
+#define  PCI_PM_CTRL_DATA_SCALE_MASK    0x6000  /* PM table data scaling factor */
+#define  PCI_PM_CTRL_PME_STATUS 0x8000  /* PME pin status */
+#define PCI_PM_PPB_EXTENSIONS   6   /* PPB support extensions */
+#define  PCI_PM_PPB_B2_B3   0x40    /* If bridge enters D3hot, bus enters: 0=B3, 1=B2 */
+#define  PCI_PM_BPCC_ENABLE 0x80    /* Secondary bus is power managed */
+#define PCI_PM_DATA_REGISTER    7   /* PM table contents read here */
+#define PCI_PM_SIZEOF       8
+/* AGP registers */
+#define PCI_AGP_VERSION     2   /* BCD version number */
+#define PCI_AGP_RFU     3   /* Rest of capability flags */
+#define PCI_AGP_STATUS      4   /* Status register */
+#define  PCI_AGP_STATUS_RQ_MASK 0xff000000  /* Maximum number of requests - 1 */
+#define  PCI_AGP_STATUS_ISOCH   0x10000 /* Isochronous transactions supported */
+#define  PCI_AGP_STATUS_ARQSZ_MASK  0xe000  /* log2(optimum async req size in bytes) - 4 */
+#define  PCI_AGP_STATUS_CAL_MASK    0x1c00  /* Calibration cycle timing */
+#define  PCI_AGP_STATUS_SBA 0x0200  /* Sideband addressing supported */
+#define  PCI_AGP_STATUS_ITA_COH 0x0100  /* In-aperture accesses always coherent */
+#define  PCI_AGP_STATUS_GART64  0x0080  /* 64-bit GART entries supported */
+#define  PCI_AGP_STATUS_HTRANS  0x0040  /* If 0, core logic can xlate host CPU accesses thru aperture */
+#define  PCI_AGP_STATUS_64BIT   0x0020  /* 64-bit addressing cycles supported */
+#define  PCI_AGP_STATUS_FW  0x0010  /* Fast write transfers supported */
+#define  PCI_AGP_STATUS_AGP3    0x0008  /* AGP3 mode supported */
+#define  PCI_AGP_STATUS_RATE4   0x0004  /* 4x transfer rate supported (RFU in AGP3 mode) */
+#define  PCI_AGP_STATUS_RATE2   0x0002  /* 2x transfer rate supported (8x in AGP3 mode) */
+#define  PCI_AGP_STATUS_RATE1   0x0001  /* 1x transfer rate supported (4x in AGP3 mode) */
+#define PCI_AGP_COMMAND     8   /* Control register */
+#define  PCI_AGP_COMMAND_RQ_MASK 0xff000000 /* Master: Maximum number of requests */
+#define  PCI_AGP_COMMAND_ARQSZ_MASK 0xe000  /* log2(optimum async req size in bytes) - 4 */
+#define  PCI_AGP_COMMAND_CAL_MASK   0x1c00  /* Calibration cycle timing */
+#define  PCI_AGP_COMMAND_SBA    0x0200  /* Sideband addressing enabled */
+#define  PCI_AGP_COMMAND_AGP    0x0100  /* Allow processing of AGP transactions */
+#define  PCI_AGP_COMMAND_GART64 0x0080  /* 64-bit GART entries enabled */
+#define  PCI_AGP_COMMAND_64BIT  0x0020  /* Allow generation of 64-bit addr cycles */
+#define  PCI_AGP_COMMAND_FW 0x0010  /* Enable FW transfers */
+#define  PCI_AGP_COMMAND_RATE4  0x0004  /* Use 4x rate (RFU in AGP3 mode) */
+#define  PCI_AGP_COMMAND_RATE2  0x0002  /* Use 2x rate (8x in AGP3 mode) */
+#define  PCI_AGP_COMMAND_RATE1  0x0001  /* Use 1x rate (4x in AGP3 mode) */
+#define PCI_AGP_SIZEOF      12
+/* Slot Identification */
+#define PCI_SID_ESR     2   /* Expansion Slot Register */
+#define  PCI_SID_ESR_NSLOTS 0x1f    /* Number of expansion slots available */
+#define  PCI_SID_ESR_FIC    0x20    /* First In Chassis Flag */
+#define PCI_SID_CHASSIS_NR  3   /* Chassis Number */
+/* Message Signalled Interrupts registers */
+#define PCI_MSI_FLAGS       2   /* Various flags */
+#define  PCI_MSI_FLAGS_64BIT    0x80    /* 64-bit addresses allowed */
+#define  PCI_MSI_FLAGS_QSIZE    0x70    /* Message queue size configured */
+#define  PCI_MSI_FLAGS_QMASK    0x0e    /* Maximum queue size available */
+#define  PCI_MSI_FLAGS_ENABLE   0x01    /* MSI feature enabled */
+#define PCI_MSI_RFU     3   /* Rest of capability flags */
+#define PCI_MSI_ADDRESS_LO  4   /* Lower 32 bits */
+#define PCI_MSI_ADDRESS_HI  8   /* Upper 32 bits (if PCI_MSI_FLAGS_64BIT set) */
+#define PCI_MSI_DATA_32     8   /* 16 bits of data for 32-bit devices */
+#define PCI_MSI_DATA_64     12  /* 16 bits of data for 64-bit devices */
+/* PCI-X */
+#define PCI_PCIX_COMMAND                                                2   /* Command register offset */
+#define PCI_PCIX_COMMAND_DPERE                                     0x0001   /* Data Parity Error Recover Enable */
+#define PCI_PCIX_COMMAND_ERO                                       0x0002   /* Enable Relaxed Ordering */
+#define PCI_PCIX_COMMAND_MAX_MEM_READ_BYTE_COUNT                   0x000c   /* Maximum Memory Read Byte Count */
+#define PCI_PCIX_COMMAND_MAX_OUTSTANDING_SPLIT_TRANS               0x0070
+#define PCI_PCIX_COMMAND_RESERVED                                   0xf80
+#define PCI_PCIX_STATUS                                                 4   /* Status register offset */
+#define PCI_PCIX_STATUS_FUNCTION                               0x00000007
+#define PCI_PCIX_STATUS_DEVICE                                 0x000000f8
+#define PCI_PCIX_STATUS_BUS                                    0x0000ff00
+#define PCI_PCIX_STATUS_64BIT                                  0x00010000
+#define PCI_PCIX_STATUS_133MHZ                                 0x00020000
+#define PCI_PCIX_STATUS_SC_DISCARDED                           0x00040000   /* Split Completion Discarded */
+#define PCI_PCIX_STATUS_UNEXPECTED_SC                          0x00080000   /* Unexpected Split Completion */
+#define PCI_PCIX_STATUS_DEVICE_COMPLEXITY                      0x00100000   /* 0 = simple device, 1 = bridge device */
+#define PCI_PCIX_STATUS_DESIGNED_MAX_MEM_READ_BYTE_COUNT       0x00600000   /* 0 = 512 bytes, 1 = 1024, 2 = 2048, 3 = 4096 */
+#define PCI_PCIX_STATUS_DESIGNED_MAX_OUTSTANDING_SPLIT_TRANS   0x03800000
+#define PCI_PCIX_STATUS_DESIGNED_MAX_CUMULATIVE_READ_SIZE      0x1c000000
+#define PCI_PCIX_STATUS_RCVD_SC_ERR_MESS                       0x20000000   /* Received Split Completion Error Message */
+#define PCI_PCIX_STATUS_266MHZ                     0x40000000   /* 266 MHz capable */
+#define PCI_PCIX_STATUS_533MHZ                     0x80000000   /* 533 MHz capable */
+#define PCI_PCIX_SIZEOF     4
+/* PCI-X Bridges */
+#define PCI_PCIX_BRIDGE_SEC_STATUS                                      2   /* Secondary bus status register offset */
+#define PCI_PCIX_BRIDGE_SEC_STATUS_64BIT                           0x0001
+#define PCI_PCIX_BRIDGE_SEC_STATUS_133MHZ                          0x0002
+#define PCI_PCIX_BRIDGE_SEC_STATUS_SC_DISCARDED                    0x0004   /* Split Completion Discarded on secondary bus */
+#define PCI_PCIX_BRIDGE_SEC_STATUS_UNEXPECTED_SC                   0x0008   /* Unexpected Split Completion on secondary bus */
+#define PCI_PCIX_BRIDGE_SEC_STATUS_SC_OVERRUN                      0x0010   /* Split Completion Overrun on secondary bus */
+#define PCI_PCIX_BRIDGE_SEC_STATUS_SPLIT_REQUEST_DELAYED           0x0020
+#define PCI_PCIX_BRIDGE_SEC_STATUS_CLOCK_FREQ                      0x01c0
+#define PCI_PCIX_BRIDGE_SEC_STATUS_RESERVED                        0xfe00
+#define PCI_PCIX_BRIDGE_STATUS                                          4   /* Primary bus status register offset */
+#define PCI_PCIX_BRIDGE_STATUS_FUNCTION                        0x00000007
+#define PCI_PCIX_BRIDGE_STATUS_DEVICE                          0x000000f8
+#define PCI_PCIX_BRIDGE_STATUS_BUS                             0x0000ff00
+#define PCI_PCIX_BRIDGE_STATUS_64BIT                           0x00010000
+#define PCI_PCIX_BRIDGE_STATUS_133MHZ                          0x00020000
+#define PCI_PCIX_BRIDGE_STATUS_SC_DISCARDED                    0x00040000   /* Split Completion Discarded */
+#define PCI_PCIX_BRIDGE_STATUS_UNEXPECTED_SC                   0x00080000   /* Unexpected Split Completion */
+#define PCI_PCIX_BRIDGE_STATUS_SC_OVERRUN                      0x00100000   /* Split Completion Overrun */
+#define PCI_PCIX_BRIDGE_STATUS_SPLIT_REQUEST_DELAYED           0x00200000
+#define PCI_PCIX_BRIDGE_STATUS_RESERVED                        0xffc00000
+#define PCI_PCIX_BRIDGE_UPSTREAM_SPLIT_TRANS_CTRL                       8   /* Upstream Split Transaction Register offset */
+#define PCI_PCIX_BRIDGE_DOWNSTREAM_SPLIT_TRANS_CTRL                    12   /* Downstream Split Transaction Register offset */
+#define PCI_PCIX_BRIDGE_STR_CAPACITY                           0x0000ffff
+#define PCI_PCIX_BRIDGE_STR_COMMITMENT_LIMIT                   0xffff0000
+#define PCI_PCIX_BRIDGE_SIZEOF 12
+/* HyperTransport (as of spec rev. 2.00) */
+#define PCI_HT_CMD      2   /* Command Register */
+#define  PCI_HT_CMD_TYP_HI  0xe000  /* Capability Type high part */
+#define  PCI_HT_CMD_TYP_HI_PRI  0x0000  /* Slave or Primary Interface */
+#define  PCI_HT_CMD_TYP_HI_SEC  0x2000  /* Host or Secondary Interface */
+#define  PCI_HT_CMD_TYP     0xf800  /* Capability Type */
+#define  PCI_HT_CMD_TYP_SW  0x4000  /* Switch */
+#define  PCI_HT_CMD_TYP_IDC 0x8000  /* Interrupt Discovery and Configuration */
+#define  PCI_HT_CMD_TYP_RID 0x8800  /* Revision ID */
+#define  PCI_HT_CMD_TYP_UIDC    0x9000  /* UnitID Clumping */
+#define  PCI_HT_CMD_TYP_ECSA    0x9800  /* Extended Configuration Space Access */
+#define  PCI_HT_CMD_TYP_AM  0xa000  /* Address Mapping */
+#define  PCI_HT_CMD_TYP_MSIM    0xa800  /* MSI Mapping */
+#define  PCI_HT_CMD_TYP_DR  0xb000  /* DirectRoute */
+#define  PCI_HT_CMD_TYP_VCS 0xb800  /* VCSet */
+#define  PCI_HT_CMD_TYP_RM  0xc000  /* Retry Mode */
+#define  PCI_HT_CMD_TYP_X86 0xc800  /* X86 (reserved) */
+                    /* Link Control Register */
+#define  PCI_HT_LCTR_CFLE   0x0002  /* CRC Flood Enable */
+#define  PCI_HT_LCTR_CST    0x0004  /* CRC Start Test */
+#define  PCI_HT_LCTR_CFE    0x0008  /* CRC Force Error */
+#define  PCI_HT_LCTR_LKFAIL 0x0010  /* Link Failure */
+#define  PCI_HT_LCTR_INIT   0x0020  /* Initialization Complete */
+#define  PCI_HT_LCTR_EOC    0x0040  /* End of Chain */
+#define  PCI_HT_LCTR_TXO    0x0080  /* Transmitter Off */
+#define  PCI_HT_LCTR_CRCERR 0x0f00  /* CRC Error */
+#define  PCI_HT_LCTR_ISOCEN 0x1000  /* Isochronous Flow Control Enable */
+#define  PCI_HT_LCTR_LSEN   0x2000  /* LDTSTOP# Tristate Enable */
+#define  PCI_HT_LCTR_EXTCTL 0x4000  /* Extended CTL Time */
+#define  PCI_HT_LCTR_64B    0x8000  /* 64-bit Addressing Enable */
+                    /* Link Configuration Register */
+#define  PCI_HT_LCNF_MLWI   0x0007  /* Max Link Width In */
+#define  PCI_HT_LCNF_LW_8B  0x0 /* Link Width 8 bits */
+#define  PCI_HT_LCNF_LW_16B 0x1 /* Link Width 16 bits */
+#define  PCI_HT_LCNF_LW_32B 0x3 /* Link Width 32 bits */
+#define  PCI_HT_LCNF_LW_2B  0x4 /* Link Width 2 bits */
+#define  PCI_HT_LCNF_LW_4B  0x5 /* Link Width 4 bits */
+#define  PCI_HT_LCNF_LW_NC  0x7 /* Link physically not connected */
+#define  PCI_HT_LCNF_DFI    0x0008  /* Doubleword Flow Control In */
+#define  PCI_HT_LCNF_MLWO   0x0070  /* Max Link Width Out */
+#define  PCI_HT_LCNF_DFO    0x0080  /* Doubleword Flow Control Out */
+#define  PCI_HT_LCNF_LWI    0x0700  /* Link Width In */
+#define  PCI_HT_LCNF_DFIE   0x0800  /* Doubleword Flow Control In Enable */
+#define  PCI_HT_LCNF_LWO    0x7000  /* Link Width Out */
+#define  PCI_HT_LCNF_DFOE   0x8000  /* Doubleword Flow Control Out Enable */
+                    /* Revision ID Register */
+#define  PCI_HT_RID_MIN     0x1f    /* Minor Revision */
+#define  PCI_HT_RID_MAJ     0xe0    /* Major Revision */
+                    /* Link Frequency/Error Register */
+#define  PCI_HT_LFRER_FREQ  0x0f    /* Transmitter Clock Frequency */
+#define  PCI_HT_LFRER_200   0x00    /* 200MHz */
+#define  PCI_HT_LFRER_300   0x01    /* 300MHz */
+#define  PCI_HT_LFRER_400   0x02    /* 400MHz */
+#define  PCI_HT_LFRER_500   0x03    /* 500MHz */
+#define  PCI_HT_LFRER_600   0x04    /* 600MHz */
+#define  PCI_HT_LFRER_800   0x05    /* 800MHz */
+#define  PCI_HT_LFRER_1000  0x06    /* 1.0GHz */
+#define  PCI_HT_LFRER_1200  0x07    /* 1.2GHz */
+#define  PCI_HT_LFRER_1400  0x08    /* 1.4GHz */
+#define  PCI_HT_LFRER_1600  0x09    /* 1.6GHz */
+#define  PCI_HT_LFRER_VEND  0x0f    /* Vendor-Specific */
+#define  PCI_HT_LFRER_ERR   0xf0    /* Link Error */
+#define  PCI_HT_LFRER_PROT  0x10    /* Protocol Error */
+#define  PCI_HT_LFRER_OV    0x20    /* Overflow Error */
+#define  PCI_HT_LFRER_EOC   0x40    /* End of Chain Error */
+#define  PCI_HT_LFRER_CTLT  0x80    /* CTL Timeout */
+                    /* Link Frequency Capability Register */
+#define  PCI_HT_LFCAP_200   0x0001  /* 200MHz */
+#define  PCI_HT_LFCAP_300   0x0002  /* 300MHz */
+#define  PCI_HT_LFCAP_400   0x0004  /* 400MHz */
+#define  PCI_HT_LFCAP_500   0x0008  /* 500MHz */
+#define  PCI_HT_LFCAP_600   0x0010  /* 600MHz */
+#define  PCI_HT_LFCAP_800   0x0020  /* 800MHz */
+#define  PCI_HT_LFCAP_1000  0x0040  /* 1.0GHz */
+#define  PCI_HT_LFCAP_1200  0x0080  /* 1.2GHz */
+#define  PCI_HT_LFCAP_1400  0x0100  /* 1.4GHz */
+#define  PCI_HT_LFCAP_1600  0x0200  /* 1.6GHz */
+#define  PCI_HT_LFCAP_VEND  0x8000  /* Vendor-Specific */
+                    /* Feature Register */
+#define  PCI_HT_FTR_ISOCFC  0x0001  /* Isochronous Flow Control Mode */
+#define  PCI_HT_FTR_LDTSTOP 0x0002  /* LDTSTOP# Supported */
+#define  PCI_HT_FTR_CRCTM   0x0004  /* CRC Test Mode */
+#define  PCI_HT_FTR_ECTLT   0x0008  /* Extended CTL Time Required */
+#define  PCI_HT_FTR_64BA    0x0010  /* 64-bit Addressing */
+#define  PCI_HT_FTR_UIDRD   0x0020  /* UnitID Reorder Disable */
+                    /* Error Handling Register */
+#define  PCI_HT_EH_PFLE     0x0001  /* Protocol Error Flood Enable */
+#define  PCI_HT_EH_OFLE     0x0002  /* Overflow Error Flood Enable */
+#define  PCI_HT_EH_PFE      0x0004  /* Protocol Error Fatal Enable */
+#define  PCI_HT_EH_OFE      0x0008  /* Overflow Error Fatal Enable */
+#define  PCI_HT_EH_EOCFE    0x0010  /* End of Chain Error Fatal Enable */
+#define  PCI_HT_EH_RFE      0x0020  /* Response Error Fatal Enable */
+#define  PCI_HT_EH_CRCFE    0x0040  /* CRC Error Fatal Enable */
+#define  PCI_HT_EH_SERRFE   0x0080  /* System Error Fatal Enable (B */
+#define  PCI_HT_EH_CF       0x0100  /* Chain Fail */
+#define  PCI_HT_EH_RE       0x0200  /* Response Error */
+#define  PCI_HT_EH_PNFE     0x0400  /* Protocol Error Nonfatal Enable */
+#define  PCI_HT_EH_ONFE     0x0800  /* Overflow Error Nonfatal Enable */
+#define  PCI_HT_EH_EOCNFE   0x1000  /* End of Chain Error Nonfatal Enable */
+#define  PCI_HT_EH_RNFE     0x2000  /* Response Error Nonfatal Enable */
+#define  PCI_HT_EH_CRCNFE   0x4000  /* CRC Error Nonfatal Enable */
+#define  PCI_HT_EH_SERRNFE  0x8000  /* System Error Nonfatal Enable */
+/* HyperTransport: Slave or Primary Interface */
+#define PCI_HT_PRI_CMD      2   /* Command Register */
+#define  PCI_HT_PRI_CMD_BUID    0x001f  /* Base UnitID */
+#define  PCI_HT_PRI_CMD_UC  0x03e0  /* Unit Count */
+#define  PCI_HT_PRI_CMD_MH  0x0400  /* Master Host */
+#define  PCI_HT_PRI_CMD_DD  0x0800  /* Default Direction */
+#define  PCI_HT_PRI_CMD_DUL 0x1000  /* Drop on Uninitialized Link */
+#define PCI_HT_PRI_LCTR0    4   /* Link Control 0 Register */
+#define PCI_HT_PRI_LCNF0    6   /* Link Config 0 Register */
+#define PCI_HT_PRI_LCTR1    8   /* Link Control 1 Register */
+#define PCI_HT_PRI_LCNF1    10  /* Link Config 1 Register */
+#define PCI_HT_PRI_RID      12  /* Revision ID Register */
+#define PCI_HT_PRI_LFRER0   13  /* Link Frequency/Error 0 Register */
+#define PCI_HT_PRI_LFCAP0   14  /* Link Frequency Capability 0 Register */
+#define PCI_HT_PRI_FTR      16  /* Feature Register */
+#define PCI_HT_PRI_LFRER1   17  /* Link Frequency/Error 1 Register */
+#define PCI_HT_PRI_LFCAP1   18  /* Link Frequency Capability 1 Register */
+#define PCI_HT_PRI_ES       20  /* Enumeration Scratchpad Register */
+#define PCI_HT_PRI_EH       22  /* Error Handling Register */
+#define PCI_HT_PRI_MBU      24  /* Memory Base Upper Register */
+#define PCI_HT_PRI_MLU      25  /* Memory Limit Upper Register */
+#define PCI_HT_PRI_BN       26  /* Bus Number Register */
+#define PCI_HT_PRI_SIZEOF   28
+/* HyperTransport: Host or Secondary Interface */
+#define PCI_HT_SEC_CMD      2   /* Command Register */
+#define  PCI_HT_SEC_CMD_WR  0x0001  /* Warm Reset */
+#define  PCI_HT_SEC_CMD_DE  0x0002  /* Double-Ended */
+#define  PCI_HT_SEC_CMD_DN  0x0076  /* Device Number */
+#define  PCI_HT_SEC_CMD_CS  0x0080  /* Chain Side */
+#define  PCI_HT_SEC_CMD_HH  0x0100  /* Host Hide */
+#define  PCI_HT_SEC_CMD_AS  0x0400  /* Act as Slave */
+#define  PCI_HT_SEC_CMD_HIECE   0x0800  /* Host Inbound End of Chain Error */
+#define  PCI_HT_SEC_CMD_DUL 0x1000  /* Drop on Uninitialized Link */
+#define PCI_HT_SEC_LCTR     4   /* Link Control Register */
+#define PCI_HT_SEC_LCNF     6   /* Link Config Register */
+#define PCI_HT_SEC_RID      8   /* Revision ID Register */
+#define PCI_HT_SEC_LFRER    9   /* Link Frequency/Error Register */
+#define PCI_HT_SEC_LFCAP    10  /* Link Frequency Capability Register */
+#define PCI_HT_SEC_FTR      12  /* Feature Register */
+#define  PCI_HT_SEC_FTR_EXTRS   0x0100  /* Extended Register Set */
+#define  PCI_HT_SEC_FTR_UCNFE   0x0200  /* Upstream Configuration Enable */
+#define PCI_HT_SEC_ES       16  /* Enumeration Scratchpad Register */
+#define PCI_HT_SEC_EH       18  /* Error Handling Register */
+#define PCI_HT_SEC_MBU      20  /* Memory Base Upper Register */
+#define PCI_HT_SEC_MLU      21  /* Memory Limit Upper Register */
+#define PCI_HT_SEC_SIZEOF   24
+/* HyperTransport: Switch */
+#define PCI_HT_SW_CMD       2   /* Switch Command Register */
+#define  PCI_HT_SW_CMD_VIBERR   0x0080  /* VIB Error */
+#define  PCI_HT_SW_CMD_VIBFL    0x0100  /* VIB Flood */
+#define  PCI_HT_SW_CMD_VIBFT    0x0200  /* VIB Fatal */
+#define  PCI_HT_SW_CMD_VIBNFT   0x0400  /* VIB Nonfatal */
+#define PCI_HT_SW_PMASK     4   /* Partition Mask Register */
+#define PCI_HT_SW_SWINF     8   /* Switch Info Register */
+#define  PCI_HT_SW_SWINF_DP 0x0000001f  /* Default Port */
+#define  PCI_HT_SW_SWINF_EN 0x00000020  /* Enable Decode */
+#define  PCI_HT_SW_SWINF_CR 0x00000040  /* Cold Reset */
+#define  PCI_HT_SW_SWINF_PCIDX  0x00000f00  /* Performance Counter Index */
+#define  PCI_HT_SW_SWINF_BLRIDX 0x0003f000  /* Base/Limit Range Index */
+#define  PCI_HT_SW_SWINF_SBIDX  0x00002000  /* Secondary Base Range Index */
+#define  PCI_HT_SW_SWINF_HP 0x00040000  /* Hot Plug */
+#define  PCI_HT_SW_SWINF_HIDE   0x00080000  /* Hide Port */
+#define PCI_HT_SW_PCD       12  /* Performance Counter Data Register */
+#define PCI_HT_SW_BLRD      16  /* Base/Limit Range Data Register */
+#define PCI_HT_SW_SBD       20  /* Secondary Base Data Register */
+#define PCI_HT_SW_SIZEOF    24
+                    /* Counter indices */
+#define  PCI_HT_SW_PC_PCR   0x0 /* Posted Command Receive */
+#define  PCI_HT_SW_PC_NPCR  0x1 /* Nonposted Command Receive */
+#define  PCI_HT_SW_PC_RCR   0x2 /* Response Command Receive */
+#define  PCI_HT_SW_PC_PDWR  0x3 /* Posted DW Receive */
+#define  PCI_HT_SW_PC_NPDWR 0x4 /* Nonposted DW Receive */
+#define  PCI_HT_SW_PC_RDWR  0x5 /* Response DW Receive */
+#define  PCI_HT_SW_PC_PCT   0x6 /* Posted Command Transmit */
+#define  PCI_HT_SW_PC_NPCT  0x7 /* Nonposted Command Transmit */
+#define  PCI_HT_SW_PC_RCT   0x8 /* Response Command Transmit */
+#define  PCI_HT_SW_PC_PDWT  0x9 /* Posted DW Transmit */
+#define  PCI_HT_SW_PC_NPDWT 0xa /* Nonposted DW Transmit */
+#define  PCI_HT_SW_PC_RDWT  0xb /* Response DW Transmit */
+                    /* Base/Limit Range indices */
+#define  PCI_HT_SW_BLR_BASE0_LO 0x0 /* Base 0[31:1], Enable */
+#define  PCI_HT_SW_BLR_BASE0_HI 0x1 /* Base 0 Upper */
+#define  PCI_HT_SW_BLR_LIM0_LO  0x2 /* Limit 0 Lower */
+#define  PCI_HT_SW_BLR_LIM0_HI  0x3 /* Limit 0 Upper */
+                    /* Secondary Base indices */
+#define  PCI_HT_SW_SB_LO    0x0 /* Secondary Base[31:1], Enable */
+#define  PCI_HT_SW_S0_HI    0x1 /* Secondary Base Upper */
+/* HyperTransport: Interrupt Discovery and Configuration */
+#define PCI_HT_IDC_IDX      2   /* Index Register */
+#define PCI_HT_IDC_DATA     4   /* Data Register */
+#define PCI_HT_IDC_SIZEOF   8
+                    /* Register indices */
+#define  PCI_HT_IDC_IDX_LINT    0x01    /* Last Interrupt Register */
+#define   PCI_HT_IDC_LINT   0x00ff0000  /* Last interrupt definition */
+#define  PCI_HT_IDC_IDX_IDR 0x10    /* Interrupt Definition Registers */
+                    /* Low part (at index) */
+#define   PCI_HT_IDC_IDR_MASK   0x10000001  /* Mask */
+#define   PCI_HT_IDC_IDR_POL    0x10000002  /* Polarity */
+#define   PCI_HT_IDC_IDR_II_2   0x1000001c  /* IntrInfo[4:2]: Message Type */
+#define   PCI_HT_IDC_IDR_II_5   0x10000020  /* IntrInfo[5]: Request EOI */
+#define   PCI_HT_IDC_IDR_II_6   0x00ffffc0  /* IntrInfo[23:6] */
+#define   PCI_HT_IDC_IDR_II_24  0xff000000  /* IntrInfo[31:24] */
+                    /* High part (at index + 1) */
+#define   PCI_HT_IDC_IDR_II_32  0x00ffffff  /* IntrInfo[55:32] */
+#define   PCI_HT_IDC_IDR_PASSPW 0x40000000  /* PassPW setting for messages */
+#define   PCI_HT_IDC_IDR_WEOI   0x80000000  /* Waiting for EOI */
+/* HyperTransport: Revision ID */
+#define PCI_HT_RID_RID      2   /* Revision Register */
+#define PCI_HT_RID_SIZEOF   4
+/* HyperTransport: UnitID Clumping */
+#define PCI_HT_UIDC_CS      4   /* Clumping Support Register */
+#define PCI_HT_UIDC_CE      8   /* Clumping Enable Register */
+#define PCI_HT_UIDC_SIZEOF  12
+/* HyperTransport: Extended Configuration Space Access */
+#define PCI_HT_ECSA_ADDR    4   /* Configuration Address Register */
+#define  PCI_HT_ECSA_ADDR_REG   0x00000ffc  /* Register */
+#define  PCI_HT_ECSA_ADDR_FUN   0x00007000  /* Function */
+#define  PCI_HT_ECSA_ADDR_DEV   0x000f1000  /* Device */
+#define  PCI_HT_ECSA_ADDR_BUS   0x0ff00000  /* Bus Number */
+#define  PCI_HT_ECSA_ADDR_TYPE  0x10000000  /* Access Type */
+#define PCI_HT_ECSA_DATA    8   /* Configuration Data Register */
+#define PCI_HT_ECSA_SIZEOF  12
+/* HyperTransport: Address Mapping */
+#define PCI_HT_AM_CMD       2   /* Command Register */
+#define  PCI_HT_AM_CMD_NDMA 0x000f  /* Number of DMA Mappings */
+#define  PCI_HT_AM_CMD_IOSIZ    0x01f0  /* I/O Size */
+#define  PCI_HT_AM_CMD_MT   0x0600  /* Map Type */
+#define  PCI_HT_AM_CMD_MT_40B   0x0000  /* 40-bit */
+#define  PCI_HT_AM_CMD_MT_64B   0x0200  /* 64-bit */
+                    /* Window Control Register bits */
+#define  PCI_HT_AM_SBW_CTR_COMP 0x1 /* Compat */
+#define  PCI_HT_AM_SBW_CTR_NCOH 0x2 /* NonCoherent */
+#define  PCI_HT_AM_SBW_CTR_ISOC 0x4 /* Isochronous */
+#define  PCI_HT_AM_SBW_CTR_EN   0x8 /* Enable */
+/* HyperTransport: 40-bit Address Mapping */
+#define PCI_HT_AM40_SBNPW   4   /* Secondary Bus Non-Prefetchable Window Register */
+#define  PCI_HT_AM40_SBW_BASE   0x000fffff  /* Window Base */
+#define  PCI_HT_AM40_SBW_CTR    0xf0000000  /* Window Control */
+#define PCI_HT_AM40_SBPW    8   /* Secondary Bus Prefetchable Window Register */
+#define PCI_HT_AM40_DMA_PBASE0  12  /* DMA Window Primary Base 0 Register */
+#define PCI_HT_AM40_DMA_CTR0    15  /* DMA Window Control 0 Register */
+#define  PCI_HT_AM40_DMA_CTR_CTR 0xf0   /* Window Control */
+#define PCI_HT_AM40_DMA_SLIM0   16  /* DMA Window Secondary Limit 0 Register */
+#define PCI_HT_AM40_DMA_SBASE0  18  /* DMA Window Secondary Base 0 Register */
+#define PCI_HT_AM40_SIZEOF  12  /* size is variable: 12 + 8 * NDMA */
+/* HyperTransport: 64-bit Address Mapping */
+#define PCI_HT_AM64_IDX     4   /* Index Register */
+#define PCI_HT_AM64_DATA_LO 8   /* Data Lower Register */
+#define PCI_HT_AM64_DATA_HI 12  /* Data Upper Register */
+#define PCI_HT_AM64_SIZEOF  16
+                    /* Register indices */
+#define  PCI_HT_AM64_IDX_SBNPW  0x00    /* Secondary Bus Non-Prefetchable Window Register */
+#define   PCI_HT_AM64_W_BASE_LO 0xfff00000  /* Window Base Lower */
+#define   PCI_HT_AM64_W_CTR 0x0000000f  /* Window Control */
+#define  PCI_HT_AM64_IDX_SBPW   0x01    /* Secondary Bus Prefetchable Window Register */
+#define   PCI_HT_AM64_IDX_PBNPW 0x02    /* Primary Bus Non-Prefetchable Window Register */
+#define   PCI_HT_AM64_IDX_DMAPB0 0x04   /* DMA Window Primary Base 0 Register */
+#define   PCI_HT_AM64_IDX_DMASB0 0x05   /* DMA Window Secondary Base 0 Register */
+#define   PCI_HT_AM64_IDX_DMASL0 0x06   /* DMA Window Secondary Limit 0 Register */
+/* HyperTransport: MSI Mapping */
+#define PCI_HT_MSIM_CMD     2   /* Command Register */
+#define  PCI_HT_MSIM_CMD_EN 0x0001  /* Mapping Active */
+#define  PCI_HT_MSIM_CMD_FIXD   0x0002  /* MSI Mapping Address Fixed */
+#define PCI_HT_MSIM_ADDR_LO 4   /* MSI Mapping Address Lower Register */
+#define PCI_HT_MSIM_ADDR_HI 8   /* MSI Mapping Address Upper Register */
+#define PCI_HT_MSIM_SIZEOF  12
+/* HyperTransport: DirectRoute */
+#define PCI_HT_DR_CMD       2   /* Command Register */
+#define  PCI_HT_DR_CMD_NDRS 0x000f  /* Number of DirectRoute Spaces */
+#define  PCI_HT_DR_CMD_IDX  0x01f0  /* Index */
+#define PCI_HT_DR_EN        4   /* Enable Vector Register */
+#define PCI_HT_DR_DATA      8   /* Data Register */
+#define PCI_HT_DR_SIZEOF    12
+                    /* Register indices */
+#define  PCI_HT_DR_IDX_BASE_LO  0x00    /* DirectRoute Base Lower Register */
+#define   PCI_HT_DR_OTNRD   0x00000001  /* Opposite to Normal Request Direction */
+#define   PCI_HT_DR_BL_LO   0xffffff00  /* Base/Limit Lower */
+#define  PCI_HT_DR_IDX_BASE_HI  0x01    /* DirectRoute Base Upper Register */
+#define  PCI_HT_DR_IDX_LIMIT_LO 0x02    /* DirectRoute Limit Lower Register */
+#define  PCI_HT_DR_IDX_LIMIT_HI 0x03    /* DirectRoute Limit Upper Register */
+/* HyperTransport: VCSet */
+#define PCI_HT_VCS_SUP      4   /* VCSets Supported Register */
+#define PCI_HT_VCS_L1EN     5   /* Link 1 VCSets Enabled Register */
+#define PCI_HT_VCS_L0EN     6   /* Link 0 VCSets Enabled Register */
+#define PCI_HT_VCS_SBD      8   /* Stream Bucket Depth Register */
+#define PCI_HT_VCS_SINT     9   /* Stream Interval Register */
+#define PCI_HT_VCS_SSUP     10  /* Number of Streaming VCs Supported Register */
+#define  PCI_HT_VCS_SSUP_0  0x00    /* Streaming VC 0 */
+#define  PCI_HT_VCS_SSUP_3  0x01    /* Streaming VCs 0-3 */
+#define  PCI_HT_VCS_SSUP_15 0x02    /* Streaming VCs 0-15 */
+#define PCI_HT_VCS_NFCBD    12  /* Non-FC Bucket Depth Register */
+#define PCI_HT_VCS_NFCINT   13  /* Non-FC Bucket Interval Register */
+#define PCI_HT_VCS_SIZEOF   16
+/* HyperTransport: Retry Mode */
+#define PCI_HT_RM_CTR0      4   /* Control 0 Register */
+#define  PCI_HT_RM_CTR_LRETEN   0x01    /* Link Retry Enable */
+#define  PCI_HT_RM_CTR_FSER 0x02    /* Force Single Error */
+#define  PCI_HT_RM_CTR_ROLNEN   0x04    /* Rollover Nonfatal Enable */
+#define  PCI_HT_RM_CTR_FSS  0x08    /* Force Single Stomp */
+#define  PCI_HT_RM_CTR_RETNEN   0x10    /* Retry Nonfatal Enable */
+#define  PCI_HT_RM_CTR_RETFEN   0x20    /* Retry Fatal Enable */
+#define  PCI_HT_RM_CTR_AA   0xc0    /* Allowed Attempts */
+#define PCI_HT_RM_STS0      5   /* Status 0 Register */
+#define  PCI_HT_RM_STS_RETSNT   0x01    /* Retry Sent */
+#define  PCI_HT_RM_STS_CNTROL   0x02    /* Count Rollover */
+#define  PCI_HT_RM_STS_SRCV 0x04    /* Stomp Received */
+#define PCI_HT_RM_CTR1      6   /* Control 1 Register */
+#define PCI_HT_RM_STS1      7   /* Status 1 Register */
+#define PCI_HT_RM_CNT0      8   /* Retry Count 0 Register */
+#define PCI_HT_RM_CNT1      10  /* Retry Count 1 Register */
+#define PCI_HT_RM_SIZEOF    12
+/* PCI Express */
+#define PCI_EXP_FLAGS       0x2 /* Capabilities register */
+#define PCI_EXP_FLAGS_VERS  0x000f  /* Capability version */
+#define PCI_EXP_FLAGS_TYPE  0x00f0  /* Device/Port type */
+#define  PCI_EXP_TYPE_ENDPOINT  0x0 /* Express Endpoint */
+#define  PCI_EXP_TYPE_LEG_END   0x1 /* Legacy Endpoint */
+#define  PCI_EXP_TYPE_ROOT_PORT 0x4 /* Root Port */
+#define  PCI_EXP_TYPE_UPSTREAM  0x5 /* Upstream Port */
+#define  PCI_EXP_TYPE_DOWNSTREAM 0x6    /* Downstream Port */
+#define  PCI_EXP_TYPE_PCI_BRIDGE 0x7    /* PCI/PCI-X Bridge */
+#define PCI_EXP_FLAGS_SLOT  0x0100  /* Slot implemented */
+#define PCI_EXP_FLAGS_IRQ   0x3e00  /* Interrupt message number */
+#define PCI_EXP_DEVCAP      0x4 /* Device capabilities */
+#define  PCI_EXP_DEVCAP_PAYLOAD 0x07    /* Max_Payload_Size */
+#define  PCI_EXP_DEVCAP_PHANTOM 0x18    /* Phantom functions */
+#define  PCI_EXP_DEVCAP_EXT_TAG 0x20    /* Extended tags */
+#define  PCI_EXP_DEVCAP_L0S 0x1c0   /* L0s Acceptable Latency */
+#define  PCI_EXP_DEVCAP_L1  0xe00   /* L1 Acceptable Latency */
+#define  PCI_EXP_DEVCAP_ATN_BUT 0x1000  /* Attention Button Present */
+#define  PCI_EXP_DEVCAP_ATN_IND 0x2000  /* Attention Indicator Present */
+#define  PCI_EXP_DEVCAP_PWR_IND 0x4000  /* Power Indicator Present */
+#define  PCI_EXP_DEVCAP_PWR_VAL 0x3fc0000   /* Slot Power Limit Value */
+#define  PCI_EXP_DEVCAP_PWR_SCL 0xc000000   /* Slot Power Limit Scale */
+#define PCI_EXP_DEVCTL      0x8 /* Device Control */
+#define  PCI_EXP_DEVCTL_CERE    0x0001  /* Correctable Error Reporting En. */
+#define  PCI_EXP_DEVCTL_NFERE   0x0002  /* Non-Fatal Error Reporting Enable */
+#define  PCI_EXP_DEVCTL_FERE    0x0004  /* Fatal Error Reporting Enable */
+#define  PCI_EXP_DEVCTL_URRE    0x0008  /* Unsupported Request Reporting En. */
+#define  PCI_EXP_DEVCTL_RELAXED 0x0010  /* Enable Relaxed Ordering */
+#define  PCI_EXP_DEVCTL_PAYLOAD 0x00e0  /* Max_Payload_Size */
+#define  PCI_EXP_DEVCTL_EXT_TAG 0x0100  /* Extended Tag Field Enable */
+#define  PCI_EXP_DEVCTL_PHANTOM 0x0200  /* Phantom Functions Enable */
+#define  PCI_EXP_DEVCTL_AUX_PME 0x0400  /* Auxiliary Power PM Enable */
+#define  PCI_EXP_DEVCTL_NOSNOOP 0x0800  /* Enable No Snoop */
+#define  PCI_EXP_DEVCTL_READRQ  0x7000  /* Max_Read_Request_Size */
+#define PCI_EXP_DEVSTA      0xa /* Device Status */
+#define  PCI_EXP_DEVSTA_CED 0x01    /* Correctable Error Detected */
+#define  PCI_EXP_DEVSTA_NFED    0x02    /* Non-Fatal Error Detected */
+#define  PCI_EXP_DEVSTA_FED 0x04    /* Fatal Error Detected */
+#define  PCI_EXP_DEVSTA_URD 0x08    /* Unsupported Request Detected */
+#define  PCI_EXP_DEVSTA_AUXPD   0x10    /* AUX Power Detected */
+#define  PCI_EXP_DEVSTA_TRPND   0x20    /* Transactions Pending */
+#define PCI_EXP_LNKCAP      0xc /* Link Capabilities */
+#define  PCI_EXP_LNKCAP_SPEED   0x0000f /* Maximum Link Speed */
+#define  PCI_EXP_LNKCAP_WIDTH   0x003f0 /* Maximum Link Width */
+#define  PCI_EXP_LNKCAP_ASPM    0x00c00 /* Active State Power Management */
+#define  PCI_EXP_LNKCAP_L0S 0x07000 /* L0s Acceptable Latency */
+#define  PCI_EXP_LNKCAP_L1  0x38000 /* L1 Acceptable Latency */
+#define  PCI_EXP_LNKCAP_PORT    0xff000000  /* Port Number */
+#define PCI_EXP_LNKCTL      0x10    /* Link Control */
+#define  PCI_EXP_LNKCTL_ASPM    0x0003  /* ASPM Control */
+#define  PCI_EXP_LNKCTL_RCB 0x0008  /* Read Completion Boundary */
+#define  PCI_EXP_LNKCTL_DISABLE 0x0010  /* Link Disable */
+#define  PCI_EXP_LNKCTL_RETRAIN 0x0020  /* Retrain Link */
+#define  PCI_EXP_LNKCTL_CLOCK   0x0040  /* Common Clock Configuration */
+#define  PCI_EXP_LNKCTL_XSYNCH  0x0080  /* Extended Synch */
+#define PCI_EXP_LNKSTA      0x12    /* Link Status */
+#define  PCI_EXP_LNKSTA_SPEED   0x000f  /* Negotiated Link Speed */
+#define  PCI_EXP_LNKSTA_WIDTH   0x03f0  /* Negotiated Link Width */
+#define  PCI_EXP_LNKSTA_TR_ERR  0x0400  /* Training Error */
+#define  PCI_EXP_LNKSTA_TRAIN   0x0800  /* Link Training */
+#define  PCI_EXP_LNKSTA_SL_CLK  0x1000  /* Slot Clock Configuration */
+#define PCI_EXP_SLTCAP      0x14    /* Slot Capabilities */
+#define  PCI_EXP_SLTCAP_ATNB    0x0001  /* Attention Button Present */
+#define  PCI_EXP_SLTCAP_PWRC    0x0002  /* Power Controller Present */
+#define  PCI_EXP_SLTCAP_MRL 0x0004  /* MRL Sensor Present */
+#define  PCI_EXP_SLTCAP_ATNI    0x0008  /* Attention Indicator Present */
+#define  PCI_EXP_SLTCAP_PWRI    0x0010  /* Power Indicator Present */
+#define  PCI_EXP_SLTCAP_HPS 0x0020  /* Hot-Plug Surprise */
+#define  PCI_EXP_SLTCAP_HPC 0x0040  /* Hot-Plug Capable */
+#define  PCI_EXP_SLTCAP_PWR_VAL 0x00007f80  /* Slot Power Limit Value */
+#define  PCI_EXP_SLTCAP_PWR_SCL 0x00018000  /* Slot Power Limit Scale */
+#define  PCI_EXP_SLTCAP_PSN 0xfff80000  /* Physical Slot Number */
+#define PCI_EXP_SLTCTL      0x18    /* Slot Control */
+#define  PCI_EXP_SLTCTL_ATNB    0x0001  /* Attention Button Pressed Enable */
+#define  PCI_EXP_SLTCTL_PWRF    0x0002  /* Power Fault Detected Enable */
+#define  PCI_EXP_SLTCTL_MRLS    0x0004  /* MRL Sensor Changed Enable */
+#define  PCI_EXP_SLTCTL_PRSD    0x0008  /* Presence Detect Changed Enable */
+#define  PCI_EXP_SLTCTL_CMDC    0x0010  /* Command Completed Interrupt Enable */
+#define  PCI_EXP_SLTCTL_HPIE    0x0020  /* Hot-Plug Interrupt Enable */
+#define  PCI_EXP_SLTCTL_ATNI    0x00C0  /* Attention Indicator Control */
+#define  PCI_EXP_SLTCTL_PWRI    0x0300  /* Power Indicator Control */
+#define  PCI_EXP_SLTCTL_PWRC    0x0400  /* Power Controller Control */
+#define PCI_EXP_SLTSTA      0x1a    /* Slot Status */
+#define PCI_EXP_RTCTL       0x1c    /* Root Control */
+#define  PCI_EXP_RTCTL_SECEE    0x1 /* System Error on Correctable Error */
+#define  PCI_EXP_RTCTL_SENFEE   0x1 /* System Error on Non-Fatal Error */
+#define  PCI_EXP_RTCTL_SEFEE    0x1 /* System Error on Fatal Error */
+#define  PCI_EXP_RTCTL_PMEIE    0x1 /* PME Interrupt Enable */
+#define PCI_EXP_RTSTA       0x20    /* Root Status */
+/* MSI-X */
+#define  PCI_MSIX_ENABLE    0x8000
+#define  PCI_MSIX_MASK      0x4000
+#define  PCI_MSIX_TABSIZE   0x03ff
+#define PCI_MSIX_TABLE      4
+#define PCI_MSIX_PBA        8
+#define  PCI_MSIX_BIR       0x7
+/* Advanced Error Reporting */
+#define PCI_ERR_UNCOR_STATUS    4   /* Uncorrectable Error Status */
+#define  PCI_ERR_UNC_TRAIN  0x00000001  /* Training */
+#define  PCI_ERR_UNC_DLP    0x00000010  /* Data Link Protocol */
+#define  PCI_ERR_UNC_POISON_TLP 0x00001000  /* Poisoned TLP */
+#define  PCI_ERR_UNC_FCP    0x00002000  /* Flow Control Protocol */
+#define  PCI_ERR_UNC_COMP_TIME  0x00004000  /* Completion Timeout */
+#define  PCI_ERR_UNC_COMP_ABORT 0x00008000  /* Completer Abort */
+#define  PCI_ERR_UNC_UNX_COMP   0x00010000  /* Unexpected Completion */
+#define  PCI_ERR_UNC_RX_OVER    0x00020000  /* Receiver Overflow */
+#define  PCI_ERR_UNC_MALF_TLP   0x00040000  /* Malformed TLP */
+#define  PCI_ERR_UNC_ECRC   0x00080000  /* ECRC Error Status */
+#define  PCI_ERR_UNC_UNSUP  0x00100000  /* Unsupported Request */
+#define PCI_ERR_UNCOR_MASK  8   /* Uncorrectable Error Mask */
+    /* Same bits as above */
+#define PCI_ERR_UNCOR_SEVER 12  /* Uncorrectable Error Severity */
+    /* Same bits as above */
+#define PCI_ERR_COR_STATUS  16  /* Correctable Error Status */
+#define  PCI_ERR_COR_RCVR   0x00000001  /* Receiver Error Status */
+#define  PCI_ERR_COR_BAD_TLP    0x00000040  /* Bad TLP Status */
+#define  PCI_ERR_COR_BAD_DLLP   0x00000080  /* Bad DLLP Status */
+#define  PCI_ERR_COR_REP_ROLL   0x00000100  /* REPLAY_NUM Rollover */
+#define  PCI_ERR_COR_REP_TIMER  0x00001000  /* Replay Timer Timeout */
+#define PCI_ERR_COR_MASK    20  /* Correctable Error Mask */
+    /* Same bits as above */
+#define PCI_ERR_CAP     24  /* Advanced Error Capabilities */
+#define  PCI_ERR_CAP_FEP(x) ((x) & 31)  /* First Error Pointer */
+#define  PCI_ERR_CAP_ECRC_GENC  0x00000020  /* ECRC Generation Capable */
+#define  PCI_ERR_CAP_ECRC_GENE  0x00000040  /* ECRC Generation Enable */
+#define  PCI_ERR_CAP_ECRC_CHKC  0x00000080  /* ECRC Check Capable */
+#define  PCI_ERR_CAP_ECRC_CHKE  0x00000100  /* ECRC Check Enable */
+#define PCI_ERR_HEADER_LOG  28  /* Header Log Register (16 bytes) */
+#define PCI_ERR_ROOT_COMMAND    44  /* Root Error Command */
+#define PCI_ERR_ROOT_STATUS 48
+#define PCI_ERR_ROOT_COR_SRC    52
+#define PCI_ERR_ROOT_SRC    54
+/* Virtual Channel */
+#define PCI_VC_PORT_REG1    4
+#define PCI_VC_PORT_REG2    8
+#define PCI_VC_PORT_CTRL    12
+#define PCI_VC_PORT_STATUS  14
+#define PCI_VC_RES_CAP      16
+#define PCI_VC_RES_CTRL     20
+#define PCI_VC_RES_STATUS   26
+/* Power Budgeting */
+#define PCI_PWR_DSR     4   /* Data Select Register */
+#define PCI_PWR_DATA        8   /* Data Register */
+#define  PCI_PWR_DATA_BASE(x)   ((x) & 0xff)    /* Base Power */
+#define  PCI_PWR_DATA_SCALE(x)  (((x) >> 8) & 3)    /* Data Scale */
+#define  PCI_PWR_DATA_PM_SUB(x) (((x) >> 10) & 7)   /* PM Sub State */
+#define  PCI_PWR_DATA_PM_STATE(x) (((x) >> 13) & 3) /* PM State */
+#define  PCI_PWR_DATA_TYPE(x)   (((x) >> 15) & 7)   /* Type */
+#define  PCI_PWR_DATA_RAIL(x)   (((x) >> 18) & 7)   /* Power Rail */
+#define PCI_PWR_CAP     12  /* Capability */
+#define  PCI_PWR_CAP_BUDGET(x)  ((x) & 1)   /* Included in system budget */
+/*
+ * The PCI interface treats multi-function devices as independent
+ * devices.  The slot/function address of each device is encoded
+ * in a single byte as follows:
+ *
+ *  7:3 = slot
+ *  2:0 = function
+ */
+#define PCI_DEVFN(slot,func)    ((((slot) & 0x1f) << 3) | ((func) & 0x07))
+#define PCI_SLOT(devfn)     (((devfn) >> 3) & 0x1f)
+#define PCI_FUNC(devfn)     ((devfn) & 0x07)
+/* Device classes and subclasses */
+#define PCI_CLASS_NOT_DEFINED       0x0000
+#define PCI_CLASS_NOT_DEFINED_VGA   0x0001
+#define PCI_BASE_CLASS_STORAGE      0x01
+#define PCI_CLASS_STORAGE_SCSI      0x0100
+#define PCI_CLASS_STORAGE_IDE       0x0101
+#define PCI_CLASS_STORAGE_FLOPPY    0x0102
+#define PCI_CLASS_STORAGE_IPI       0x0103
+#define PCI_CLASS_STORAGE_RAID      0x0104
+#define PCI_CLASS_STORAGE_OTHER     0x0180
+#define PCI_BASE_CLASS_NETWORK      0x02
+#define PCI_CLASS_NETWORK_ETHERNET  0x0200
+#define PCI_CLASS_NETWORK_TOKEN_RING    0x0201
+#define PCI_CLASS_NETWORK_FDDI      0x0202
+#define PCI_CLASS_NETWORK_ATM       0x0203
+#define PCI_CLASS_NETWORK_OTHER     0x0280
+#define PCI_BASE_CLASS_DISPLAY      0x03
+#define PCI_CLASS_DISPLAY_VGA       0x0300
+#define PCI_CLASS_DISPLAY_XGA       0x0301
+#define PCI_CLASS_DISPLAY_OTHER     0x0380
+#define PCI_BASE_CLASS_MULTIMEDIA   0x04
+#define PCI_CLASS_MULTIMEDIA_VIDEO  0x0400
+#define PCI_CLASS_MULTIMEDIA_AUDIO  0x0401
+#define PCI_CLASS_MULTIMEDIA_OTHER  0x0480
+#define PCI_BASE_CLASS_MEMORY       0x05
+#define  PCI_CLASS_MEMORY_RAM       0x0500
+#define  PCI_CLASS_MEMORY_FLASH     0x0501
+#define  PCI_CLASS_MEMORY_OTHER     0x0580
+#define PCI_BASE_CLASS_BRIDGE       0x06
+#define  PCI_CLASS_BRIDGE_HOST      0x0600
+#define  PCI_CLASS_BRIDGE_ISA       0x0601
+#define  PCI_CLASS_BRIDGE_EISA      0x0602
+#define  PCI_CLASS_BRIDGE_MC        0x0603
+#define  PCI_CLASS_BRIDGE_PCI       0x0604
+#define  PCI_CLASS_BRIDGE_PCMCIA    0x0605
+#define  PCI_CLASS_BRIDGE_NUBUS     0x0606
+#define  PCI_CLASS_BRIDGE_CARDBUS   0x0607
+#define  PCI_CLASS_BRIDGE_OTHER     0x0680
+#define PCI_BASE_CLASS_COMMUNICATION    0x07
+#define PCI_CLASS_COMMUNICATION_SERIAL  0x0700
+#define PCI_CLASS_COMMUNICATION_PARALLEL 0x0701
+#define PCI_CLASS_COMMUNICATION_OTHER   0x0780
+#define PCI_BASE_CLASS_SYSTEM       0x08
+#define PCI_CLASS_SYSTEM_PIC        0x0800
+#define PCI_CLASS_SYSTEM_DMA        0x0801
+#define PCI_CLASS_SYSTEM_TIMER      0x0802
+#define PCI_CLASS_SYSTEM_RTC        0x0803
+#define PCI_CLASS_SYSTEM_OTHER      0x0880
+#define PCI_BASE_CLASS_INPUT        0x09
+#define PCI_CLASS_INPUT_KEYBOARD    0x0900
+#define PCI_CLASS_INPUT_PEN     0x0901
+#define PCI_CLASS_INPUT_MOUSE       0x0902
+#define PCI_CLASS_INPUT_OTHER       0x0980
+#define PCI_BASE_CLASS_DOCKING      0x0a
+#define PCI_CLASS_DOCKING_GENERIC   0x0a00
+#define PCI_CLASS_DOCKING_OTHER     0x0a01
+#define PCI_BASE_CLASS_PROCESSOR    0x0b
+#define PCI_CLASS_PROCESSOR_386     0x0b00
+#define PCI_CLASS_PROCESSOR_486     0x0b01
+#define PCI_CLASS_PROCESSOR_PENTIUM 0x0b02
+#define PCI_CLASS_PROCESSOR_ALPHA   0x0b10
+#define PCI_CLASS_PROCESSOR_POWERPC 0x0b20
+#define PCI_CLASS_PROCESSOR_CO      0x0b40
+#define PCI_BASE_CLASS_SERIAL       0x0c
+#define PCI_CLASS_SERIAL_FIREWIRE   0x0c00
+#define PCI_CLASS_SERIAL_ACCESS     0x0c01
+#define PCI_CLASS_SERIAL_SSA        0x0c02
+#define PCI_CLASS_SERIAL_USB        0x0c03
+#define PCI_CLASS_SERIAL_FIBER      0x0c04
+#define PCI_CLASS_OTHERS        0xff
+/* Several ID's we need in the library */
+#define PCI_VENDOR_ID_INTEL     0x8086
+#define PCI_VENDOR_ID_COMPAQ        0x0e11

 /tags/0.2.0.2/uspace/pci/libpci/pci_ids.h
 ,0 → 1,11934
+/* DO NOT EDIT, THIS FILE IS AUTOMATICALLY GENERATED */
+char *pci_ids[] = {
+"0000  Gammagraphx, Inc.",
+"001a  Ascend Communications, Inc.",
+"0033  Paradyne corp.",
+"003d  Lockheed Martin-Marietta Corp",
+"0059  Tiger Jet Network Inc. (Wrong ID)",
+"0070  Hauppauge computer works Inc.",
+"0071  Nebula Electronics Ltd.",
+"0095  Silicon Image, Inc. (Wrong ID)",
+"   0680  Ultra ATA/133 IDE RAID CONTROLLER CARD",
+"00a7  Teles AG (Wrong ID)",
+"00f5  BFG Technologies, Inc.",
+"0100  Ncipher Corp Ltd",
+"0123  General Dynamics",
+"018a  LevelOne",
+"   0106  FPC-0106TX misprogrammed [RTL81xx]",
+"021b  Compaq Computer Corporation",
+"   8139  HNE-300 (RealTek RTL8139c) [iPaq Networking]",
+"0270  Hauppauge computer works Inc. (Wrong ID)",
+"0291  Davicom Semiconductor, Inc.",
+"   8212  DM9102A(DM9102AE, SM9102AF) Ethernet 100/10 MBit(Rev 40)",
+"02ac  SpeedStream",
+"   1012  1012 PCMCIA 10/100 Ethernet Card [RTL81xx]",
+"0315  SK-Electronics Co., Ltd.",
+"0357  TTTech AG",
+"   000a  TTP-Monitoring Card V2.0",
+"0432  SCM Microsystems, Inc.",
+"   0001  Pluto2 DVB-T Receiver for PCMCIA [EasyWatch MobilSet]",
+"045e  Microsoft",
+"   006e  MN-510 802.11b wireless USB paddle",
+"   00c2  MN-710 wireless USB paddle",
+"04cf  Myson Century, Inc",
+"   8818  CS8818 USB2.0-to-ATAPI Bridge Controller with Embedded PHY",
+"050d  Belkin",
+"   0109  F5U409-CU USB/Serial Portable Adapter",
+"   7050  F5D7050 802.11g Wireless USB Adapter",
+"05e3  CyberDoor",
+"   0701  CBD516",
+"066f  Sigmatel Inc.",
+"   3410  SMTP3410",
+"   3500  SMTP3500",
+"0675  Dynalink",
+"   1700  IS64PH ISDN Adapter",
+"   1702  IS64PH ISDN Adapter",
+"   1703  ISDN Adapter (PCI Bus, DV, W)",
+"   1704  ISDN Adapter (PCI Bus, D, C)",
+"067b  Prolific Technology, Inc.",
+"   3507  PL-3507 Hi-Speed USB & IEEE 1394 Combo to IDE Bridge Controller",
+"0721  Sapphire, Inc.",
+"07e2  ELMEG Communication Systems GmbH",
+"0925  VIA Technologies, Inc. (Wrong ID)",
+"09c1  Arris",
+"   0704  CM 200E Cable Modem",
+"0a89  BREA Technologies Inc",
+"0b0b  Rhino Equiment Corp.",
+"   0105  Rhino R1T1",
+"   0205  Rhino R4FXO",
+"   0305  Rhino R4T1",
+"   0405  Rhino R8FXX",
+"   0505  Rhino R24FXX",
+"   0506  Rhino R2T1",
+"0b49  ASCII Corporation",
+"   064f  Trance Vibrator",
+"0e11  Compaq Computer Corporation",
+"   0001  PCI to EISA Bridge",
+"   0002  PCI to ISA Bridge",
+"   0046  Smart Array 64xx",
+"       0e11 409a  Smart Array 641",
+"       0e11 409b  Smart Array 642",
+"       0e11 409c  Smart Array 6400",
+"       0e11 409d  Smart Array 6400 EM",
+"   0049  NC7132 Gigabit Upgrade Module",
+"   004a  NC6136 Gigabit Server Adapter",
+"   005a  Remote Insight II board - Lights-Out",
+"   007c  NC7770 1000BaseTX",
+"   007d  NC6770 1000BaseTX",
+"   0085  NC7780 1000BaseTX",
+"   00b1  Remote Insight II board - PCI device",
+"   00bb  NC7760",
+"   00ca  NC7771",
+"   00cb  NC7781",
+"   00cf  NC7772",
+"   00d0  NC7782",
+"   00d1  NC7783",
+"   00e3  NC7761",
+"   0508  Netelligent 4/16 Token Ring",
+"   1000  Triflex/Pentium Bridge, Model 1000",
+"   2000  Triflex/Pentium Bridge, Model 2000",
+"   3032  QVision 1280/p",
+"   3033  QVision 1280/p",
+"   3034  QVision 1280/p",
+"   4000  4000 [Triflex]",
+"   4030  SMART-2/P",
+"   4031  SMART-2SL",
+"   4032  Smart Array 3200",
+"   4033  Smart Array 3100ES",
+"   4034  Smart Array 221",
+"   4040  Integrated Array",
+"   4048  Compaq Raid LC2",
+"   4050  Smart Array 4200",
+"   4051  Smart Array 4250ES",
+"   4058  Smart Array 431",
+"   4070  Smart Array 5300",
+"   4080  Smart Array 5i",
+"   4082  Smart Array 532",
+"   4083  Smart Array 5312",
+"   4091  Smart Array 6i",
+"   409a  Smart Array 641",
+"   409b  Smart Array 642",
+"   409c  Smart Array 6400",
+"   409d  Smart Array 6400 EM",
+"   6010  HotPlug PCI Bridge 6010",
+"   7020  USB Controller",
+"   a0ec  Fibre Channel Host Controller",
+"   a0f0  Advanced System Management Controller",
+"   a0f3  Triflex PCI to ISA Bridge",
+"   a0f7  PCI Hotplug Controller",
+"       8086 002a  PCI Hotplug Controller A",
+"       8086 002b  PCI Hotplug Controller B",
+"   a0f8  ZFMicro Chipset USB",
+"   a0fc  FibreChannel HBA Tachyon",
+"   ae10  Smart-2/P RAID Controller",
+"       0e11 4030  Smart-2/P Array Controller",
+"       0e11 4031  Smart-2SL Array Controller",
+"       0e11 4032  Smart Array Controller",
+"       0e11 4033  Smart 3100ES Array Controller",
+"   ae29  MIS-L",
+"   ae2a  MPC",
+"   ae2b  MIS-E",
+"   ae31  System Management Controller",
+"   ae32  Netelligent 10/100 TX PCI UTP",
+"   ae33  Triflex Dual EIDE Controller",
+"   ae34  Netelligent 10 T PCI UTP",
+"   ae35  Integrated NetFlex-3/P",
+"   ae40  Netelligent Dual 10/100 TX PCI UTP",
+"   ae43  Netelligent Integrated 10/100 TX UTP",
+"   ae69  CETUS-L",
+"   ae6c  Northstar",
+"   ae6d  NorthStar CPU to PCI Bridge",
+"   b011  Netelligent 10/100 TX Embedded UTP",
+"   b012  Netelligent 10 T/2 PCI UTP/Coax",
+"   b01e  NC3120 Fast Ethernet NIC",
+"   b01f  NC3122 Fast Ethernet NIC",
+"   b02f  NC1120 Ethernet NIC",
+"   b030  Netelligent 10/100 TX UTP",
+"   b04a  10/100 TX PCI Intel WOL UTP Controller",
+"   b060  Smart Array 5300 Controller",
+"   b0c6  NC3161 Fast Ethernet NIC",
+"   b0c7  NC3160 Fast Ethernet NIC",
+"   b0d7  NC3121 Fast Ethernet NIC",
+"   b0dd  NC3131 Fast Ethernet NIC",
+"   b0de  NC3132 Fast Ethernet Module",
+"   b0df  NC6132 Gigabit Module",
+"   b0e0  NC6133 Gigabit Module",
+"   b0e1  NC3133 Fast Ethernet Module",
+"   b123  NC6134 Gigabit NIC",
+"   b134  NC3163 Fast Ethernet NIC",
+"   b13c  NC3162 Fast Ethernet NIC",
+"   b144  NC3123 Fast Ethernet NIC",
+"   b163  NC3134 Fast Ethernet NIC",
+"   b164  NC3165 Fast Ethernet Upgrade Module",
+"   b178  Smart Array 5i/532",
+"       0e11 4080  Smart Array 5i",
+"       0e11 4082  Smart Array 532",
+"       0e11 4083  Smart Array 5312",
+"   b1a4  NC7131 Gigabit Server Adapter",
+"   b200  Memory Hot-Plug Controller",
+"   b203  Integrated Lights Out Controller",
+"   b204  Integrated Lights Out  Processor",
+"   f130  NetFlex-3/P ThunderLAN 1.0",
+"   f150  NetFlex-3/P ThunderLAN 2.3",
+"0e21  Cowon Systems, Inc.",
+"0e55  HaSoTec GmbH",
+"1000  LSI Logic / Symbios Logic",
+"   0001  53c810",
+"       1000 1000  LSI53C810AE PCI to SCSI I/O Processor",
+"   0002  53c820",
+"   0003  53c825",
+"       1000 1000  LSI53C825AE PCI to SCSI I/O Processor (Ultra Wide)",
+"   0004  53c815",
+"   0005  53c810AP",
+"   0006  53c860",
+"       1000 1000  LSI53C860E PCI to Ultra SCSI I/O Processor",
+"   000a  53c1510",
+"       1000 1000  LSI53C1510 PCI to Dual Channel Wide Ultra2 SCSI Controller (Nonintelligent mode)",
+"   000b  53C896/897",
+"       0e11 6004  EOB003 Series SCSI host adapter",
+"       1000 1000  LSI53C896/7 PCI to Dual Channel Ultra2 SCSI Multifunction Controller",
+"       1000 1010  LSI22910 PCI to Dual Channel Ultra2 SCSI host adapter",
+"       1000 1020  LSI21002 PCI to Dual Channel Ultra2 SCSI host adapter",
+"       13e9 1000  6221L-4U",
+"   000c  53c895",
+"       1000 1010  LSI8951U PCI to Ultra2 SCSI host adapter",
+"       1000 1020  LSI8952U PCI to Ultra2 SCSI host adapter",
+"       1de1 3906  DC-390U2B SCSI adapter",
+"       1de1 3907  DC-390U2W",
+"   000d  53c885",
+"   000f  53c875",
+"       0e11 7004  Embedded Ultra Wide SCSI Controller",
+"       1000 1000  LSI53C876/E PCI to Dual Channel SCSI Controller",
+"       1000 1010  LSI22801 PCI to Dual Channel Ultra SCSI host adapter",
+"       1000 1020  LSI22802 PCI to Dual Channel Ultra SCSI host adapter",
+"       1092 8760  FirePort 40 Dual SCSI Controller",
+"       1de1 3904  DC390F/U Ultra Wide SCSI Adapter",
+"       4c53 1000  CC7/CR7/CP7/VC7/VP7/VR7 mainboard",
+"       4c53 1050  CT7 mainboard",
+"   0010  53C1510",
+"       0e11 4040  Integrated Array Controller",
+"       0e11 4048  RAID LC2 Controller",
+"       1000 1000  53C1510 PCI to Dual Channel Wide Ultra2 SCSI Controller (Intelligent mode)",
+"   0012  53c895a",
+"       1000 1000  LSI53C895A PCI to Ultra2 SCSI Controller",
+"   0013  53c875a",
+"       1000 1000  LSI53C875A PCI to Ultra SCSI Controller",
+"   0020  53c1010 Ultra3 SCSI Adapter",
+"       1000 1000  LSI53C1010-33 PCI to Dual Channel Ultra160 SCSI Controller",
+"       1de1 1020  DC-390U3W",
+"   0021  53c1010 66MHz  Ultra3 SCSI Adapter",
+"       1000 1000  LSI53C1000/1000R/1010R/1010-66 PCI to Ultra160 SCSI Controller",
+"       1000 1010  Asus TR-DLS onboard 53C1010-66",
+"       124b 1070  PMC-USCSI3",
+"       4c53 1080  CT8 mainboard",
+"       4c53 1300  P017 mezzanine (32-bit PMC)",
+"       4c53 1310  P017 mezzanine (64-bit PMC)",
+"   0030  53c1030 PCI-X Fusion-MPT Dual Ultra320 SCSI",
+"       0e11 00da  ProLiant ML 350",
+"       1028 0123  PowerEdge 2600",
+"       1028 014a  PowerEdge 1750",
+"       1028 016c  PowerEdge 1850 MPT Fusion SCSI/RAID (Perc 4)",
+"       1028 0183  PowerEdge 1800",
+"       1028 1010  LSI U320 SCSI Controller",
+"       124b 1170  PMC-USCSI320",
+"       1734 1052  Primergy RX300 S2",
+"   0031  53c1030ZC PCI-X Fusion-MPT Dual Ultra320 SCSI",
+"   0032  53c1035 PCI-X Fusion-MPT Dual Ultra320 SCSI",
+"       1000 1000  LSI53C1020/1030 PCI-X to Ultra320 SCSI Controller",
+"   0033  1030ZC_53c1035 PCI-X Fusion-MPT Dual Ultra320 SCSI",
+"   0040  53c1035 PCI-X Fusion-MPT Dual Ultra320 SCSI",
+"       1000 0033  MegaRAID SCSI 320-2XR",
+"       1000 0066  MegaRAID SCSI 320-2XRWS",
+"   0041  53C1035ZC PCI-X Fusion-MPT Dual Ultra320 SCSI",
+"   0050  SAS1064 PCI-X Fusion-MPT SAS",
+"   0054  SAS1068 PCI-X Fusion-MPT SAS",
+"   0056  SAS1064E PCI-Express Fusion-MPT SAS",
+"   0058  SAS1068E PCI-Express Fusion-MPT SAS",
+"   005a  SAS1066E PCI-Express Fusion-MPT SAS",
+"   005c  SAS1064A PCI-X Fusion-MPT SAS",
+"   005e  SAS1066 PCI-X Fusion-MPT SAS",
+"   0060  SAS1078 PCI-X Fusion-MPT SAS",
+"   0062  SAS1078 PCI-Express Fusion-MPT SAS",
+"       1000 0062  SAS1078 PCI-Express Fusion-MPT SAS",
+"   008f  53c875J",
+"       1092 8000  FirePort 40 SCSI Controller",
+"       1092 8760  FirePort 40 Dual SCSI Host Adapter",
+"   0407  MegaRAID",
+"       1000 0530  MegaRAID 530 SCSI 320-0X RAID Controller",
+"       1000 0531  MegaRAID 531 SCSI 320-4X RAID Controller",
+"       1000 0532  MegaRAID 532 SCSI 320-2X RAID Controller",
+"       1028 0531  PowerEdge Expandable RAID Controller 4/QC",
+"       1028 0533  PowerEdge Expandable RAID Controller 4/QC",
+"       8086 0530  MegaRAID Intel RAID Controller SRCZCRX",
+"       8086 0532  MegaRAID Intel RAID Controller SRCU42X",
+"   0408  MegaRAID",
+"       1000 0001  MegaRAID SCSI 320-1E RAID Controller",
+"       1000 0002  MegaRAID SCSI 320-2E RAID Controller",
+"       1025 004d  MegaRAID ACER ROMB-2E RAID Controller",
+"       1028 0001  PowerEdge RAID Controller PERC4e/SC",
+"       1028 0002  PowerEdge RAID Controller PERC4e/DC",
+"       1734 1065  FSC MegaRAID PCI Express ROMB",
+"       8086 0002  MegaRAID Intel RAID Controller SRCU42E",
+"   0409  MegaRAID",
+"       1000 3004  MegaRAID SATA 300-4X RAID Controller",
+"       1000 3008  MegaRAID SATA 300-8X RAID Controller",
+"       8086 3008  MegaRAID RAID Controller SRCS28X",
+"       8086 3431  MegaRAID RAID Controller Alief SROMBU42E",
+"       8086 3499  MegaRAID RAID Controller Harwich SROMBU42E",
+"   0621  FC909 Fibre Channel Adapter",
+"   0622  FC929 Fibre Channel Adapter",
+"       1000 1020  44929 O Dual Fibre Channel card",
+"   0623  FC929 LAN",
+"   0624  FC919 Fibre Channel Adapter",
+"   0625  FC919 LAN",
+"   0626  FC929X Fibre Channel Adapter",
+"       1000 1010  7202-XP-LC Dual Fibre Channel card",
+"   0627  FC929X LAN",
+"   0628  FC919X Fibre Channel Adapter",
+"   0629  FC919X LAN",
+"   0640  FC949X Fibre Channel Adapter",
+"   0642  FC939X Fibre Channel Adapter",
+"   0646  FC949ES Fibre Channel Adapter",
+"   0701  83C885 NT50 DigitalScape Fast Ethernet",
+"   0702  Yellowfin G-NIC gigabit ethernet",
+"       1318 0000  PEI100X",
+"   0804  SA2010",
+"   0805  SA2010ZC",
+"   0806  SA2020",
+"   0807  SA2020ZC",
+"   0901  61C102",
+"   1000  63C815",
+"   1960  MegaRAID",
+"       1000 0518  MegaRAID 518 SCSI 320-2 Controller",
+"       1000 0520  MegaRAID 520 SCSI 320-1 Controller",
+"       1000 0522  MegaRAID 522 i4 133 RAID Controller",
+"       1000 0523  MegaRAID SATA 150-6 RAID Controller",
+"       1000 4523  MegaRAID SATA 150-4 RAID Controller",
+"       1000 a520  MegaRAID ZCR SCSI 320-0 Controller",
+"       1028 0518  MegaRAID 518 DELL PERC 4/DC RAID Controller",
+"       1028 0520  MegaRAID 520 DELL PERC 4/SC RAID Controller",
+"       1028 0531  PowerEdge Expandable RAID Controller 4/QC",
+"       1028 0533  PowerEdge Expandable RAID Controller 4/QC",
+"       8086 0520  MegaRAIDRAID Controller SRCU41L",
+"       8086 0523  MegaRAID RAID Controller SRCS16",
+"1001  Kolter Electronic",
+"   0010  PCI 1616 Measurement card with 32 digital I/O lines",
+"   0011  OPTO-PCI Opto-Isolated digital I/O board",
+"   0012  PCI-AD/DA Analogue I/O board",
+"   0013  PCI-OPTO-RELAIS Digital I/O board with relay outputs",
+"   0014  PCI-Counter/Timer Counter Timer board",
+"   0015  PCI-DAC416 Analogue output board",
+"   0016  PCI-MFB Analogue I/O board",
+"   0017  PROTO-3 PCI Prototyping board",
+"   9100  INI-9100/9100W SCSI Host",
+"1002  ATI Technologies Inc",
+"   3150  M24 1P [Radeon Mobility X600]",
+"   3152  M22 [Radeon Mobility X300]",
+"   3154  M24 1T [FireGL M24 GL]",
+"   3e50  RV380 0x3e50 [Radeon X600]",
+"   3e54  RV380 0x3e54 [FireGL V3200]",
+"   3e70  RV380 [Radeon X600] Secondary",
+"   4136  Radeon IGP 320 M",
+"   4137  Radeon IGP330/340/350",
+"   4144  R300 AD [Radeon 9500 Pro]",
+"   4145  R300 AE [Radeon 9700 Pro]",
+"   4146  R300 AF [Radeon 9700 Pro]",
+"   4147  R300 AG [FireGL Z1/X1]",
+"   4148  R350 AH [Radeon 9800]",
+"   4149  R350 AI [Radeon 9800]",
+"   414a  R350 AJ [Radeon 9800]",
+"   414b  R350 AK [Fire GL X2]",
+"   4150  RV350 AP [Radeon 9600]",
+"       1002 0002  R9600 Pro primary (Asus OEM for HP)",
+"       1002 0003  R9600 Pro secondary (Asus OEM for HP)",
+"       1002 4722  All-in-Wonder 2006 AGP Edition",
+"       1458 4024  Giga-Byte GV-R96128D Primary",
+"       148c 2064  PowerColor R96A-C3N",
+"       148c 2066  PowerColor R96A-C3N",
+"       174b 7c19  Sapphire Atlantis Radeon 9600 Pro",
+"       174b 7c29  GC-R9600PRO Primary [Sapphire]",
+"       17ee 2002  Radeon 9600 256Mb Primary",
+"       18bc 0101  GC-R9600PRO Primary",
+"   4151  RV350 AQ [Radeon 9600]",
+"       1043 c004  A9600SE",
+"   4152  RV350 AR [Radeon 9600]",
+"       1002 0002  Radeon 9600XT",
+"       1002 4772  All-in-Wonder 9600 XT",
+"       1043 c002  Radeon 9600 XT TVD",
+"       1043 c01a  A9600XT/TD",
+"       174b 7c29  Sapphire Radeon 9600XT",
+"       1787 4002  Radeon 9600 XT",
+"   4153  RV350 AS [Radeon 9550]",
+"       1462 932c  865PE Neo2-V (MS-6788) mainboard",
+"   4154  RV350 AT [Fire GL T2]",
+"   4155  RV350 AU [Fire GL T2]",
+"   4156  RV350 AV [Fire GL T2]",
+"   4157  RV350 AW [Fire GL T2]",
+"   4158  68800AX [Mach32]",
+"   4164  R300 AD [Radeon 9500 Pro] (Secondary)",
+"   4165  R300 AE [Radeon 9700 Pro] (Secondary)",
+"   4166  R300 AF [Radeon 9700 Pro] (Secondary)",
+"   4168  Radeon R350 [Radeon 9800] (Secondary)",
+"   4170  RV350 AP [Radeon 9600] (Secondary)",
+"       1002 0003  R9600 Pro secondary (Asus OEM for HP)",
+"       1002 4723  All-in-Wonder 2006 AGP Edition (Secondary)",
+"       1458 4025  Giga-Byte GV-R96128D Secondary",
+"       148c 2067  PowerColor R96A-C3N (Secondary)",
+"       174b 7c28  GC-R9600PRO Secondary [Sapphire]",
+"       17ee 2003  Radeon 9600 256Mb Secondary",
+"       18bc 0100  GC-R9600PRO Secondary",
+"   4171  RV350 AQ [Radeon 9600] (Secondary)",
+"       1043 c005  A9600SE (Secondary)",
+"   4172  RV350 AR [Radeon 9600] (Secondary)",
+"       1002 0003  Radeon 9600XT (Secondary)",
+"       1002 4773  All-in-Wonder 9600 XT (Secondary)",
+"       1043 c003  A9600XT (Secondary)",
+"       1043 c01b  A9600XT/TD (Secondary)",
+"       174b 7c28  Sapphire Radeon 9600XT (Secondary)",
+"       1787 4003  Radeon 9600 XT (Secondary)",
+"   4173  RV350 ?? [Radeon 9550] (Secondary)",
+"   4237  Radeon 7000 IGP",
+"   4242  R200 BB [Radeon All in Wonder 8500DV]",
+"       1002 02aa  Radeon 8500 AIW DV Edition",
+"   4243  R200 BC [Radeon All in Wonder 8500]",
+"   4336  Radeon Mobility U1",
+"       1002 4336  Pavilion ze4300 ATI Radeon Mobility U1 (IGP 320 M)",
+"       103c 0024  Pavilion ze4400 builtin Video",
+"       161f 2029  eMachines M5312 builtin Video",
+"   4337  Radeon IGP 330M/340M/350M",
+"       1014 053a  ThinkPad R40e (2684-HVG) builtin VGA controller",
+"       103c 0850  Radeon IGP 345M",
+"   4341  IXP150 AC'97 Audio Controller",
+"   4345  EHCI USB Controller",
+"   4347  OHCI USB Controller #1",
+"   4348  OHCI USB Controller #2",
+"   4349  ATI Dual Channel Bus Master PCI IDE Controller",
+"   434d  IXP AC'97 Modem",
+"   4353  ATI SMBus",
+"   4354  215CT [Mach64 CT]",
+"   4358  210888CX [Mach64 CX]",
+"   4363  ATI SMBus",
+"   436e  ATI 436E Serial ATA Controller",
+"   4370  IXP SB400 AC'97 Audio Controller",
+"       1025 0079  Aspire 5024WLMMi",
+"       103c 308b  MX6125",
+"       107b 0300  MX6421",
+"   4371  IXP SB400 PCI-PCI Bridge",
+"       103c 308b  MX6125",
+"   4372  IXP SB400 SMBus Controller",
+"       1025 0080  Aspire 5024WLMMi",
+"       103c 308b  MX6125",
+"   4373  IXP SB400 USB2 Host Controller",
+"       1025 0080  Aspire 5024WLMMi",
+"       103c 308b  MX6125",
+"   4374  IXP SB400 USB Host Controller",
+"       103c 308b  MX6125",
+"   4375  IXP SB400 USB Host Controller",
+"       1025 0080  Aspire 5024WLMMi",
+"       103c 308b  MX6125",
+"   4376  Standard Dual Channel PCI IDE Controller ATI",
+"       1025 0080  Aspire 5024WLMMi",
+"       103c 308b  MX6125",
+"   4377  IXP SB400 PCI-ISA Bridge",
+"       1025 0080  Aspire 5024WLMi",
+"       103c 308b  MX6125",
+"   4378  ATI SB400 - AC'97 Modem Controller",
+"       1025 0080  Aspire 5024WLMMi",
+"       103c 308b  MX6125",
+"   4379  ATI 4379 Serial ATA Controller",
+"   437a  ATI 437A Serial ATA Controller",
+"   437b  SB450 HDA Audio",
+"   4380  SB600 Non-Raid-5 SATA",
+"   4381  SB600 Raid-5 SATA",
+"   4382  SB600 AC97 Audio",
+"   4383  SB600 Azalia",
+"   4384  SB600 PCI to PCI Bridge",
+"   4385  SB600 SMBus",
+"   4386  SB600 USB Controller (EHCI)",
+"   4387  SB600 USB (OHCI0)",
+"   4388  SB600 USB (OHCI1)",
+"   4389  SB600 USB (OHCI2)",
+"   438a  SB600 USB (OHCI3)",
+"   438b  SB600 USB (OHCI4)",
+"   438c  SB600 IDE",
+"   438d  SB600 PCI to LPC Bridge",
+"   438e  SB600 AC97 Modem",
+"   4437  Radeon Mobility 7000 IGP",
+"   4554  210888ET [Mach64 ET]",
+"   4654  Mach64 VT",
+"   4742  3D Rage Pro AGP 1X/2X",
+"       1002 0040  Rage Pro Turbo AGP 2X",
+"       1002 0044  Rage Pro Turbo AGP 2X",
+"       1002 0061  Rage Pro AIW AGP 2X",
+"       1002 0062  Rage Pro AIW AGP 2X",
+"       1002 0063  Rage Pro AIW AGP 2X",
+"       1002 0080  Rage Pro Turbo AGP 2X",
+"       1002 0084  Rage Pro Turbo AGP 2X",
+"       1002 4742  Rage Pro Turbo AGP 2X",
+"       1002 8001  Rage Pro Turbo AGP 2X",
+"       1028 0082  Rage Pro Turbo AGP 2X",
+"       1028 4082  Optiplex GX1 Onboard Display Adapter",
+"       1028 8082  Rage Pro Turbo AGP 2X",
+"       1028 c082  Rage Pro Turbo AGP 2X",
+"       8086 4152  Xpert 98D AGP 2X",
+"       8086 464a  Rage Pro Turbo AGP 2X",
+"   4744  3D Rage Pro AGP 1X",
+"       1002 4744  Rage Pro Turbo AGP",
+"   4747  3D Rage Pro",
+"   4749  3D Rage Pro",
+"       1002 0061  Rage Pro AIW",
+"       1002 0062  Rage Pro AIW",
+"   474c  Rage XC",
+"   474d  Rage XL AGP 2X",
+"       1002 0004  Xpert 98 RXL AGP 2X",
+"       1002 0008  Xpert 98 RXL AGP 2X",
+"       1002 0080  Rage XL AGP 2X",
+"       1002 0084  Xpert 98 AGP 2X",
+"       1002 474d  Rage XL AGP",
+"       1033 806a  Rage XL AGP",
+"   474e  Rage XC AGP",
+"       1002 474e  Rage XC AGP",
+"   474f  Rage XL",
+"       1002 0008  Rage XL",
+"       1002 474f  Rage XL",
+"   4750  3D Rage Pro 215GP",
+"       1002 0040  Rage Pro Turbo",
+"       1002 0044  Rage Pro Turbo",
+"       1002 0080  Rage Pro Turbo",
+"       1002 0084  Rage Pro Turbo",
+"       1002 4750  Rage Pro Turbo",
+"   4751  3D Rage Pro 215GQ",
+"   4752  Rage XL",
+"       0e11 001e  Proliant Rage XL",
+"       1002 0008  Rage XL",
+"       1002 4752  Proliant Rage XL",
+"       1002 8008  Rage XL",
+"       1028 00ce  PowerEdge 1400",
+"       1028 00d1  PowerEdge 2550",
+"       1028 00d9  PowerEdge 2500",
+"       1028 0134  Poweredge SC600",
+"       103c 10e1  NetServer Rage XL",
+"       1734 007a  Primergy RX300",
+"       8086 3411  SDS2 Mainboard",
+"       8086 3427  S875WP1-E mainboard",
+"   4753  Rage XC",
+"       1002 4753  Rage XC",
+"   4754  3D Rage I/II 215GT [Mach64 GT]",
+"   4755  3D Rage II+ 215GTB [Mach64 GTB]",
+"   4756  3D Rage IIC 215IIC [Mach64 GT IIC]",
+"       1002 4756  Rage IIC",
+"   4757  3D Rage IIC AGP",
+"       1002 4757  Rage IIC AGP",
+"       1028 0089  Rage 3D IIC",
+"       1028 008e  PowerEdge 1300 onboard video",
+"       1028 4082  Rage 3D IIC",
+"       1028 8082  Rage 3D IIC",
+"       1028 c082  Rage 3D IIC",
+"   4758  210888GX [Mach64 GX]",
+"   4759  3D Rage IIC",
+"   475a  3D Rage IIC AGP",
+"       1002 0084  Rage 3D Pro AGP 2x XPERT 98",
+"       1002 0087  Rage 3D IIC",
+"       1002 475a  Rage IIC AGP",
+"   4964  Radeon RV250 Id [Radeon 9000]",
+"   4965  Radeon RV250 Ie [Radeon 9000]",
+"   4966  Radeon RV250 If [Radeon 9000]",
+"       10f1 0002  RV250 If [Tachyon G9000 PRO]",
+"       148c 2039  RV250 If [Radeon 9000 Pro 'Evil Commando']",
+"       1509 9a00  RV250 If [Radeon 9000 'AT009']",
+"       1681 0040  RV250 If [3D prophet 9000]",
+"       174b 7176  RV250 If [Sapphire Radeon 9000 Pro]",
+"       174b 7192  RV250 If [Radeon 9000 'Atlantis']",
+"       17af 2005  RV250 If [Excalibur Radeon 9000 Pro]",
+"       17af 2006  RV250 If [Excalibur Radeon 9000]",
+"   4967  Radeon RV250 Ig [Radeon 9000]",
+"   496e  Radeon RV250 [Radeon 9000] (Secondary)",
+"   4a48  R420 JH [Radeon X800]",
+"   4a49  R420 JI [Radeon X800PRO]",
+"   4a4a  R420 JJ [Radeon X800SE]",
+"   4a4b  R420 JK [Radeon X800]",
+"   4a4c  R420 JL [Radeon X800]",
+"   4a4d  R420 JM [FireGL X3]",
+"   4a4e  M18 JN [Radeon Mobility 9800]",
+"   4a50  R420 JP [Radeon X800XT]",
+"   4a70  R420 [X800XT-PE] (Secondary)",
+"   4b49  R480 [Radeon X850XT]",
+"   4b4b  R480 [Radeon X850Pro]",
+"   4b4c  R481 [Radeon X850XT-PE]",
+"   4b69  R480 [Radeon X850XT] (Secondary)",
+"   4b6b  R480 [Radeon X850Pro] (Secondary)",
+"   4b6c  R481 [Radeon X850XT-PE] (Secondary)",
+"   4c42  3D Rage LT Pro AGP-133",
+"       0e11 b0e7  Rage LT Pro (Compaq Presario 5240)",
+"       0e11 b0e8  Rage 3D LT Pro",
+"       0e11 b10e  3D Rage LT Pro (Compaq Armada 1750)",
+"       1002 0040  Rage LT Pro AGP 2X",
+"       1002 0044  Rage LT Pro AGP 2X",
+"       1002 4c42  Rage LT Pro AGP 2X",
+"       1002 8001  Rage LT Pro AGP 2X",
+"       1028 0085  Rage 3D LT Pro",
+"   4c44  3D Rage LT Pro AGP-66",
+"   4c45  Rage Mobility M3 AGP",
+"   4c46  Rage Mobility M3 AGP 2x",
+"       1028 00b1  Latitude C600",
+"   4c47  3D Rage LT-G 215LG",
+"   4c49  3D Rage LT Pro",
+"       1002 0004  Rage LT Pro",
+"       1002 0040  Rage LT Pro",
+"       1002 0044  Rage LT Pro",
+"       1002 4c49  Rage LT Pro",
+"   4c4d  Rage Mobility P/M AGP 2x",
+"       0e11 b111  Armada M700",
+"       0e11 b160  Armada E500",
+"       1002 0084  Xpert 98 AGP 2X (Mobility)",
+"       1014 0154  ThinkPad A20m/A21m",
+"       1028 00aa  Latitude CPt",
+"       1028 00bb  Latitude CPx",
+"       10e1 10cf  Fujitsu Siemens LifeBook C Series",
+"       1179 ff00  Satellite 1715XCDS laptop",
+"       13bd 1019  PC-AR10",
+"   4c4e  Rage Mobility L AGP 2x",
+"   4c50  3D Rage LT Pro",
+"       1002 4c50  Rage LT Pro",
+"   4c51  3D Rage LT Pro",
+"   4c52  Rage Mobility P/M",
+"       1033 8112  Versa Note VXi",
+"   4c53  Rage Mobility L",
+"   4c54  264LT [Mach64 LT]",
+"   4c57  Radeon Mobility M7 LW [Radeon Mobility 7500]",
+"       1014 0517  ThinkPad T30",
+"       1028 00e6  Radeon Mobility M7 LW (Dell Inspiron 8100)",
+"       1028 012a  Latitude C640",
+"       144d c006  Radeon Mobility M7 LW in vpr Matrix 170B4",
+"   4c58  Radeon RV200 LX [Mobility FireGL 7800 M7]",
+"   4c59  Radeon Mobility M6 LY",
+"       0e11 b111  Evo N600c",
+"       1014 0235  ThinkPad A30/A30p (2652/2653)",
+"       1014 0239  ThinkPad X22/X23/X24",
+"       104d 80e7  VAIO PCG-GR214EP/GR214MP/GR215MP/GR314MP/GR315MP",
+"       104d 8140  PCG-Z1SP laptop",
+"       1509 1930  Medion MD9703",
+"   4c5a  Radeon Mobility M6 LZ",
+"   4c64  Radeon R250 Ld [Radeon Mobility 9000 M9]",
+"   4c65  Radeon R250 Le [Radeon Mobility 9000 M9]",
+"   4c66  Radeon R250 [Radeon Mobility 9200]",
+"   4c67  Radeon R250 Lg [Radeon Mobility 9000 M9]",
+"   4c6e  Radeon R250 Ln [Radeon Mobility 9000 M9] [Secondary]",
+"   4d46  Rage Mobility M4 AGP",
+"   4d4c  Rage Mobility M4 AGP",
+"   4e44  Radeon R300 ND [Radeon 9700 Pro]",
+"       1002 515e  Radeon ES1000",
+"       1002 5965  Radeon ES1000",
+"   4e45  Radeon R300 NE [Radeon 9500 Pro]",
+"       1002 0002  Radeon R300 NE [Radeon 9500 Pro]",
+"       1681 0002  Hercules 3D Prophet 9500 PRO [Radeon 9500 Pro]",
+"   4e46  RV350 NF [Radeon 9600]",
+"   4e47  Radeon R300 NG [FireGL X1]",
+"   4e48  Radeon R350 [Radeon 9800 Pro]",
+"   4e49  Radeon R350 [Radeon 9800]",
+"   4e4a  RV350 NJ [Radeon 9800 XT]",
+"   4e4b  R350 NK [Fire GL X2]",
+"   4e50  RV350 [Mobility Radeon 9600 M10]",
+"       1025 005a  TravelMate 290",
+"       103c 088c  NC8000 laptop",
+"       103c 0890  NC6000 laptop",
+"       1462 0311  MSI M510A",
+"       1734 1055  Amilo M1420W",
+"   4e51  M10 NQ [Radeon Mobility 9600]",
+"   4e52  RV350 [Mobility Radeon 9600 M10]",
+"   4e53  M10 NS [Radeon Mobility 9600]",
+"   4e54  M10 NT [FireGL Mobility T2]",
+"   4e56  M11 NV [FireGL Mobility T2e]",
+"   4e64  Radeon R300 [Radeon 9700 Pro] (Secondary)",
+"   4e65  Radeon R300 [Radeon 9500 Pro] (Secondary)",
+"       1002 0003  Radeon R300 NE [Radeon 9500 Pro]",
+"       1681 0003  Hercules 3D Prophet 9500 PRO [Radeon 9500 Pro] (Secondary)",
+"   4e66  RV350 NF [Radeon 9600] (Secondary)",
+"   4e67  Radeon R300 [FireGL X1] (Secondary)",
+"   4e68  Radeon R350 [Radeon 9800 Pro] (Secondary)",
+"   4e69  Radeon R350 [Radeon 9800] (Secondary)",
+"   4e6a  RV350 NJ [Radeon 9800 XT] (Secondary)",
+"       1002 4e71  ATI Technologies Inc M10 NQ [Radeon Mobility 9600]",
+"   4e71  M10 NQ [Radeon Mobility 9600] (Secondary)",
+"   4f72  RV250 [Radeon 9000 Series]",
+"   4f73  Radeon RV250 [Radeon 9000 Series] (Secondary)",
+"   5041  Rage 128 PA/PRO",
+"   5042  Rage 128 PB/PRO AGP 2x",
+"   5043  Rage 128 PC/PRO AGP 4x",
+"   5044  Rage 128 PD/PRO TMDS",
+"       1002 0028  Rage 128 AIW",
+"       1002 0029  Rage 128 AIW",
+"   5045  Rage 128 PE/PRO AGP 2x TMDS",
+"   5046  Rage 128 PF/PRO AGP 4x TMDS",
+"       1002 0004  Rage Fury Pro",
+"       1002 0008  Rage Fury Pro/Xpert 2000 Pro",
+"       1002 0014  Rage Fury Pro",
+"       1002 0018  Rage Fury Pro/Xpert 2000 Pro",
+"       1002 0028  Rage 128 Pro AIW AGP",
+"       1002 002a  Rage 128 Pro AIW AGP",
+"       1002 0048  Rage Fury Pro",
+"       1002 2000  Rage Fury MAXX AGP 4x (TMDS) (VGA device)",
+"       1002 2001  Rage Fury MAXX AGP 4x (TMDS) (Extra device?!)",
+"   5047  Rage 128 PG/PRO",
+"   5048  Rage 128 PH/PRO AGP 2x",
+"   5049  Rage 128 PI/PRO AGP 4x",
+"   504a  Rage 128 PJ/PRO TMDS",
+"   504b  Rage 128 PK/PRO AGP 2x TMDS",
+"   504c  Rage 128 PL/PRO AGP 4x TMDS",
+"   504d  Rage 128 PM/PRO",
+"   504e  Rage 128 PN/PRO AGP 2x",
+"   504f  Rage 128 PO/PRO AGP 4x",
+"   5050  Rage 128 PP/PRO TMDS [Xpert 128]",
+"       1002 0008  Xpert 128",
+"   5051  Rage 128 PQ/PRO AGP 2x TMDS",
+"   5052  Rage 128 PR/PRO AGP 4x TMDS",
+"   5053  Rage 128 PS/PRO",
+"   5054  Rage 128 PT/PRO AGP 2x",
+"   5055  Rage 128 PU/PRO AGP 4x",
+"   5056  Rage 128 PV/PRO TMDS",
+"   5057  Rage 128 PW/PRO AGP 2x TMDS",
+"   5058  Rage 128 PX/PRO AGP 4x TMDS",
+"   5144  Radeon R100 QD [Radeon 7200]",
+"       1002 0008  Radeon 7000/Radeon VE",
+"       1002 0009  Radeon 7000/Radeon",
+"       1002 000a  Radeon 7000/Radeon",
+"       1002 001a  Radeon 7000/Radeon",
+"       1002 0029  Radeon AIW",
+"       1002 0038  Radeon 7000/Radeon",
+"       1002 0039  Radeon 7000/Radeon",
+"       1002 008a  Radeon 7000/Radeon",
+"       1002 00ba  Radeon 7000/Radeon",
+"       1002 0139  Radeon 7000/Radeon",
+"       1002 028a  Radeon 7000/Radeon",
+"       1002 02aa  Radeon AIW",
+"       1002 053a  Radeon 7000/Radeon",
+"   5145  Radeon R100 QE",
+"   5146  Radeon R100 QF",
+"   5147  Radeon R100 QG",
+"   5148  Radeon R200 QH [Radeon 8500]",
+"       1002 010a  FireGL 8800 64Mb",
+"       1002 0152  FireGL 8800 128Mb",
+"       1002 0162  FireGL 8700 32Mb",
+"       1002 0172  FireGL 8700 64Mb",
+"   5149  Radeon R200 QI",
+"   514a  Radeon R200 QJ",
+"   514b  Radeon R200 QK",
+"   514c  Radeon R200 QL [Radeon 8500 LE]",
+"       1002 003a  Radeon R200 QL [Radeon 8500 LE]",
+"       1002 013a  Radeon 8500",
+"       148c 2026  R200 QL [Radeon 8500 Evil Master II Multi Display Edition]",
+"       1681 0010  Radeon 8500 [3D Prophet 8500 128Mb]",
+"       174b 7149  Radeon R200 QL [Sapphire Radeon 8500 LE]",
+"   514d  Radeon R200 QM [Radeon 9100]",
+"   514e  Radeon R200 QN [Radeon 8500LE]",
+"   514f  Radeon R200 QO [Radeon 8500LE]",
+"   5154  R200 QT [Radeon 8500]",
+"   5155  R200 QU [Radeon 9100]",
+"   5157  Radeon RV200 QW [Radeon 7500]",
+"       1002 013a  Radeon 7500",
+"       1002 103a  Dell Optiplex GX260",
+"       1458 4000  RV200 QW [RADEON 7500 PRO MAYA AR]",
+"       148c 2024  RV200 QW [Radeon 7500LE Dual Display]",
+"       148c 2025  RV200 QW [Radeon 7500 Evil Master Multi Display Edition]",
+"       148c 2036  RV200 QW [Radeon 7500 PCI Dual Display]",
+"       174b 7146  RV200 QW [Radeon 7500 LE]",
+"       174b 7147  RV200 QW [Sapphire Radeon 7500LE]",
+"       174b 7161  Radeon RV200 QW [Radeon 7500 LE]",
+"       17af 0202  RV200 QW [Excalibur Radeon 7500LE]",
+"   5158  Radeon RV200 QX [Radeon 7500]",
+"   5159  Radeon RV100 QY [Radeon 7000/VE]",
+"       1002 000a  Radeon 7000/Radeon VE",
+"       1002 000b  Radeon 7000",
+"       1002 0038  Radeon 7000/Radeon VE",
+"       1002 003a  Radeon 7000/Radeon VE",
+"       1002 00ba  Radeon 7000/Radeon VE",
+"       1002 013a  Radeon 7000/Radeon VE",
+"       1002 0908  XVR-100 (supplied by Sun)",
+"       1014 029a  Remote Supervisor Adapter II (RSA2)",
+"       1014 02c8  IBM eServer xSeries server mainboard",
+"       1028 019a  PowerEdge SC1425",
+"       1458 4002  RV100 QY [RADEON 7000 PRO MAYA AV Series]",
+"       148c 2003  RV100 QY [Radeon 7000 Multi-Display Edition]",
+"       148c 2023  RV100 QY [Radeon 7000 Evil Master Multi-Display]",
+"       174b 7112  RV100 QY [Sapphire Radeon VE 7000]",
+"       174b 7c28  Sapphire Radeon VE 7000 DDR",
+"       1787 0202  RV100 QY [Excalibur Radeon 7000]",
+"   515a  Radeon RV100 QZ [Radeon 7000/VE]",
+"   515e  ES1000",
+"   515f  ES1000",
+"   5168  Radeon R200 Qh",
+"   5169  Radeon R200 Qi",
+"   516a  Radeon R200 Qj",
+"   516b  Radeon R200 Qk",
+"   516c  Radeon R200 Ql",
+"   5245  Rage 128 RE/SG",
+"       1002 0008  Xpert 128",
+"       1002 0028  Rage 128 AIW",
+"       1002 0029  Rage 128 AIW",
+"       1002 0068  Rage 128 AIW",
+"   5246  Rage 128 RF/SG AGP",
+"       1002 0004  Magnum/Xpert 128/Xpert 99",
+"       1002 0008  Magnum/Xpert128/X99/Xpert2000",
+"       1002 0028  Rage 128 AIW AGP",
+"       1002 0044  Rage Fury/Xpert 128/Xpert 2000",
+"       1002 0068  Rage 128 AIW AGP",
+"       1002 0448  Rage Fury",
+"   5247  Rage 128 RG",
+"   524b  Rage 128 RK/VR",
+"   524c  Rage 128 RL/VR AGP",
+"       1002 0008  Xpert 99/Xpert 2000",
+"       1002 0088  Xpert 99",
+"   5345  Rage 128 SE/4x",
+"   5346  Rage 128 SF/4x AGP 2x",
+"       1002 0048  RAGE 128 16MB VGA TVOUT AMC PAL",
+"   5347  Rage 128 SG/4x AGP 4x",
+"   5348  Rage 128 SH",
+"   534b  Rage 128 SK/4x",
+"   534c  Rage 128 SL/4x AGP 2x",
+"   534d  Rage 128 SM/4x AGP 4x",
+"       1002 0008  Xpert 99/Xpert 2000",
+"       1002 0018  Xpert 2000",
+"   534e  Rage 128 4x",
+"   5354  Mach 64 VT",
+"       1002 5654  Mach 64 reference",
+"   5446  Rage 128 Pro Ultra TF",
+"       1002 0004  Rage Fury Pro",
+"       1002 0008  Rage Fury Pro/Xpert 2000 Pro",
+"       1002 0018  Rage Fury Pro/Xpert 2000 Pro",
+"       1002 0028  Rage 128 AIW Pro AGP",
+"       1002 0029  Rage 128 AIW",
+"       1002 002a  Rage 128 AIW Pro AGP",
+"       1002 002b  Rage 128 AIW",
+"       1002 0048  Xpert 2000 Pro",
+"   544c  Rage 128 Pro Ultra TL",
+"   5452  Rage 128 Pro Ultra TR",
+"       1002 001c  Rage 128 Pro 4XL",
+"       103c 1279  Rage 128 Pro 4XL",
+"   5453  Rage 128 Pro Ultra TS",
+"   5454  Rage 128 Pro Ultra TT",
+"   5455  Rage 128 Pro Ultra TU",
+"   5460  M22 [Radeon Mobility M300]",
+"   5462  M24 [Radeon Mobility X600]",
+"   5464  M22 [FireGL GL]",
+"   5548  R423 UH [Radeon X800 (PCIE)]",
+"   5549  R423 UI [Radeon X800PRO (PCIE)]",
+"   554a  R423 UJ [Radeon X800LE (PCIE)]",
+"   554b  R423 UK [Radeon X800SE (PCIE)]",
+"   554d  R430 [Radeon X800 XL] (PCIe)",
+"   554f  R430 [Radeon X800 (PCIE)]",
+"   5550  R423 [Fire GL V7100]",
+"   5551  R423 UQ [FireGL V7200 (PCIE)]",
+"   5552  R423 UR [FireGL V5100 (PCIE)]",
+"   5554  R423 UT [FireGL V7100 (PCIE)]",
+"   556b  Radeon R423 UK (PCIE) [X800 SE] (Secondary)",
+"   556d  R430 [Radeon X800 XL] (PCIe) Secondary",
+"   556f  R430 [Radeon X800 (PCIE) Secondary]",
+"   564a  M26 [Mobility FireGL V5000]",
+"   564b  M26 [Mobility FireGL V5000]",
+"   564f  M26 [Radeon Mobility X700 XL] (PCIE)",
+"   5652  M26 [Radeon Mobility X700]",
+"   5653  Radeon Mobility X700 (PCIE)",
+"       1025 0080  Aspire 5024WLMi",
+"   5654  264VT [Mach64 VT]",
+"       1002 5654  Mach64VT Reference",
+"   5655  264VT3 [Mach64 VT3]",
+"   5656  264VT4 [Mach64 VT4]",
+"   5830  RS300 Host Bridge",
+"   5831  RS300 Host Bridge",
+"   5832  RS300 Host Bridge",
+"   5833  Radeon 9100 IGP Host Bridge",
+"   5834  Radeon 9100 IGP",
+"   5835  RS300M AGP [Radeon Mobility 9100IGP]",
+"   5838  Radeon 9100 IGP AGP Bridge",
+"   5940  RV280 [Radeon 9200 PRO] (Secondary)",
+"   5941  RV280 [Radeon 9200] (Secondary)",
+"       1458 4019  Gigabyte Radeon 9200",
+"       174b 7c12  Sapphire Radeon 9200",
+"       17af 200d  Excalibur Radeon 9200",
+"       18bc 0050  GeXcube GC-R9200-C3 (Secondary)",
+"   5944  RV280 [Radeon 9200 SE (PCI)]",
+"   5950  RS480 Host Bridge",
+"       1025 0080  Aspire 5024WLMMi",
+"       103c 308b  MX6125",
+"   5951  ATI Radeon Xpress 200 (RS480/RS482/RX480/RX482) Chipset - Host bridge",
+"   5954  RS480 [Radeon Xpress 200G Series]",
+"       1002 5954  RV370 [Radeon Xpress 200G Series]",
+"   5955  ATI Radeon XPRESS 200M 5955 (PCIE)",
+"       1002 5955  RS480 0x5955 [ATI Radeon XPRESS 200M 5955 (PCIE)]",
+"       103c 308b  MX6125",
+"   5960  RV280 [Radeon 9200 PRO]",
+"   5961  RV280 [Radeon 9200]",
+"       1002 2f72  All-in-Wonder 9200 Series",
+"       1019 4c30  Radeon 9200 VIVO",
+"       12ab 5961  YUAN SMARTVGA Radeon 9200",
+"       1458 4018  Gigabyte Radeon 9200",
+"       174b 7c13  Sapphire Radeon 9200",
+"       17af 200c  Excalibur Radeon 9200",
+"       18bc 0050  Radeon 9200 Game Buster",
+"       18bc 0051  GeXcube GC-R9200-C3",
+"       18bc 0053  Radeon 9200 Game Buster VIVO",
+"   5962  RV280 [Radeon 9200]",
+"   5964  RV280 [Radeon 9200 SE]",
+"       1043 c006  ASUS Radeon 9200 SE / TD / 128M",
+"       1458 4018  Radeon 9200 SE",
+"       1458 4032  Radeon 9200 SE 128MB",
+"       147b 6191  R9200SE-DT",
+"       148c 2073  CN-AG92E",
+"       174b 7c13  Sapphire Radeon 9200 SE",
+"       1787 5964  Excalibur 9200SE VIVO 128M",
+"       17af 2012  Radeon 9200 SE Excalibur",
+"       18bc 0170  Sapphire Radeon 9200 SE 128MB Game Buster",
+"       18bc 0173  GC-R9200L(SE)-C3H [Radeon 9200 Game Buster]",
+"   5969  ES1000",
+"   5974  RS482 [Radeon Xpress 200]",
+"   5975  RS482 [Radeon Xpress 200M]",
+"   5a34  RS480 PCI-X Root Port",
+"   5a36  RS480 PCI Bridge",
+"   5a38  RS480 PCI Bridge",
+"   5a39  RS480 PCI Bridge",
+"   5a3f  RS480 PCI Bridge",
+"   5a41  RS400 [Radeon Xpress 200]",
+"   5a42  RS400 [Radeon Xpress 200M]",
+"   5a61  RC410 [Radeon Xpress 200]",
+"   5a62  RC410 [Radeon Xpress 200M]",
+"   5b60  RV370 5B60 [Radeon X300 (PCIE)]",
+"       1043 002a  Extreme AX300SE-X",
+"       1043 032e  Extreme AX300/TD",
+"       1462 0400  RX300SE-TD128E (MS-8940 REV:200)",
+"       1462 0402  RX300SE-TD128E (MS-8940)",
+"   5b62  RV370 5B62 [Radeon X600 (PCIE)]",
+"   5b63  RV370 [Sapphire X550 Silent]",
+"   5b64  RV370 5B64 [FireGL V3100 (PCIE)]",
+"   5b65  RV370 5B65 [FireGL D1100 (PCIE)]",
+"   5b70  RV370 [Radeon X300SE]",
+"       1462 0403  RX300SE-TD128E (MS-8940) (secondary display)",
+"   5b72  Radeon X600(RV380)",
+"   5b73  RV370 secondary [Sapphire X550 Silent]",
+"   5b74  RV370 5B64 [FireGL V3100 (PCIE)] (Secondary)",
+"   5c61  M9+ 5C61 [Radeon Mobility 9200 (AGP)]",
+"   5c63  M9+ 5C63 [Radeon Mobility 9200 (AGP)]",
+"       1002 5c63  Apple iBook G4 2004",
+"   5d44  RV280 [Radeon 9200 SE] (Secondary)",
+"       1458 4019  Radeon 9200 SE (Secondary)",
+"       1458 4032  Radeon 9200 SE 128MB",
+"       174b 7c12  Sapphire Radeon 9200 SE (Secondary)",
+"       1787 5965  Excalibur 9200SE VIVO 128M (Secondary)",
+"       17af 2013  Radeon 9200 SE Excalibur (Secondary)",
+"       18bc 0171  Radeon 9200 SE 128MB Game Buster (Secondary)",
+"       18bc 0172  GC-R9200L(SE)-C3H [Radeon 9200 Game Buster]",
+"   5d48  M28 [Radeon Mobility X800XT]",
+"   5d49  M28 [Mobility FireGL V5100]",
+"   5d4a  Mobility Radeon X800",
+"   5d4d  R480 [Radeon X850XT Platinum (PCIE)]",
+"   5d4f  R480 [Radeon X800 GTO (PCIE)]",
+"   5d52  R480 [Radeon X850XT (PCIE)] (Primary)",
+"       1002 0b12  PowerColor X850XT PCIe Primary",
+"       1002 0b13  PowerColor X850XT PCIe Secondary",
+"   5d57  R423 5F57 [Radeon X800XT (PCIE)]",
+"   5d6d  R480 [Radeon X850XT Platinum (PCIE)] (Secondary)",
+"   5d6f  R480 [Radeon X800 GTO (PCIE)] (Secondary)",
+"   5d72  R480 [Radeon X850XT (PCIE)] (Secondary)",
+"   5d77  R423 5F57 [Radeon X800XT (PCIE)] (Secondary)",
+"   5e48  RV410 [FireGL V5000]",
+"   5e49  RV410 [FireGL V3300]",
+"   5e4a  RV410 [Radeon X700XT]",
+"   5e4b  RV410 [Radeon X700 Pro (PCIE)]",
+"   5e4c  RV410 [Radeon X700SE]",
+"   5e4d  RV410 [Radeon X700 (PCIE)]",
+"       148c 2116  PowerColor Bravo X700",
+"   5e4f  RV410 [Radeon X700]",
+"   5e6b  RV410 [Radeon X700 Pro (PCIE)] Secondary",
+"   5e6d  RV410 [Radeon X700 (PCIE)] (Secondary)",
+"       148c 2117  PowerColor Bravo X700",
+"   5f57  R423 [Radeon X800XT (PCIE)]",
+"   700f  PCI Bridge [IGP 320M]",
+"   7010  PCI Bridge [IGP 340M]",
+"   7100  R520 [Radeon X1800]",
+"   7105  R520 [FireGL]",
+"   7109  R520 [Radeon X1800]",
+"       1002 0322  All-in-Wonder X1800XL",
+"       1002 0d02  Radeon X1800 CrossFire Edition",
+"   7120  R520 [Radeon X1800] (Secondary)",
+"   7129  R520 [Radeon X1800] (Secondary)",
+"       1002 0323  All-in-Wonder X1800XL (Secondary)",
+"       1002 0d03  Radeon X1800 CrossFire Edition (Secondary)",
+"   7142  RV515 [Radeon X1300]",
+"       1002 0322  All-in-Wonder 2006 PCI-E Edition",
+"   7145  Radeon Mobility X1400",
+"   7146  RV515 [Radeon X1300]",
+"       1002 0322  All-in-Wonder 2006 PCI-E Edition",
+"   7149  M52 [ATI Mobility Radeon X1300]",
+"   714a  M52 [ATI Mobility Radeon X1300]",
+"   714b  M52 [ATI Mobility Radeon X1300]",
+"   714c  M52 [ATI Mobility Radeon X1300]",
+"   7162  RV515 [Radeon X1300] (Secondary)",
+"       1002 0323  All-in-Wonder 2006 PCI-E Edition (Secondary)",
+"   7166  RV515 [Radeon X1300] (Secondary)",
+"       1002 0323  All-in-Wonder 2006 PCI-E Edition (Secondary)",
+"   71c0  RV530 [Radeon X1600]",
+"   71c2  RV530 [Radeon X1600]",
+"   71c4  M56GL [ATI Mobility FireGL V5200]",
+"   71c5  M56P [Radeon Mobility X1600]",
+"   71e0  RV530 [Radeon X1600] (Secondary)",
+"   71e2  RV530 [Radeon X1600] (Secondary)",
+"   7833  Radeon 9100 IGP Host Bridge",
+"   7834  Radeon 9100 PRO IGP",
+"   7835  Radeon Mobility 9200 IGP",
+"   7838  Radeon 9100 IGP PCI/AGP Bridge",
+"   7c37  RV350 AQ [Radeon 9600 SE]",
+"   cab0  AGP Bridge [IGP 320M]",
+"   cab2  RS200/RS200M AGP Bridge [IGP 340M]",
+"   cab3  R200 AGP Bridge [Mobility Radeon 7000 IGP]",
+"   cbb2  RS200/RS200M AGP Bridge [IGP 340M]",
+"1003  ULSI Systems",
+"   0201  US201",
+"1004  VLSI Technology Inc",
+"   0005  82C592-FC1",
+"   0006  82C593-FC1",
+"   0007  82C594-AFC2",
+"   0008  82C596/7 [Wildcat]",
+"   0009  82C597-AFC2",
+"   000c  82C541 [Lynx]",
+"   000d  82C543 [Lynx]",
+"   0101  82C532",
+"   0102  82C534 [Eagle]",
+"   0103  82C538",
+"   0104  82C535",
+"   0105  82C147",
+"   0200  82C975",
+"   0280  82C925",
+"   0304  QSound ThunderBird PCI Audio",
+"       1004 0304  QSound ThunderBird PCI Audio",
+"       122d 1206  DSP368 Audio",
+"       1483 5020  XWave Thunder 3D Audio",
+"   0305  QSound ThunderBird PCI Audio Gameport",
+"       1004 0305  QSound ThunderBird PCI Audio Gameport",
+"       122d 1207  DSP368 Audio Gameport",
+"       1483 5021  XWave Thunder 3D Audio Gameport",
+"   0306  QSound ThunderBird PCI Audio Support Registers",
+"       1004 0306  QSound ThunderBird PCI Audio Support Registers",
+"       122d 1208  DSP368 Audio Support Registers",
+"       1483 5022  XWave Thunder 3D Audio Support Registers",
+"   0307  Thunderbird",
+"   0308  Thunderbird",
+"   0702  VAS96011 [Golden Gate II]",
+"   0703  Tollgate",
+"1005  Avance Logic Inc. [ALI]",
+"   2064  ALG2032/2064",
+"   2128  ALG2364A",
+"   2301  ALG2301",
+"   2302  ALG2302",
+"   2364  ALG2364",
+"   2464  ALG2364A",
+"   2501  ALG2564A/25128A",
+"1006  Reply Group",
+"1007  NetFrame Systems Inc",
+"1008  Epson",
+"100a  Phoenix Technologies",
+"100b  National Semiconductor Corporation",
+"   0001  DP83810",
+"   0002  87415/87560 IDE",
+"   000e  87560 Legacy I/O",
+"   000f  FireWire Controller",
+"   0011  NS87560 National PCI System I/O",
+"   0012  USB Controller",
+"   0020  DP83815 (MacPhyter) Ethernet Controller",
+"       103c 0024  Pavilion ze4400 builtin Network",
+"       12d9 000c  Aculab E1/T1 PMXc cPCI carrier card",
+"       1385 f311  FA311 / FA312 (FA311 with WoL HW)",
+"   0021  PC87200 PCI to ISA Bridge",
+"   0022  DP83820 10/100/1000 Ethernet Controller",
+"   0028  Geode GX2 Host Bridge",
+"   002a  CS5535 South Bridge",
+"   002b  CS5535 ISA bridge",
+"   002d  CS5535 IDE",
+"   002e  CS5535 Audio",
+"   002f  CS5535 USB",
+"   0030  Geode GX2 Graphics Processor",
+"   0035  DP83065 [Saturn] 10/100/1000 Ethernet Controller",
+"   0500  SCx200 Bridge",
+"   0501  SCx200 SMI",
+"   0502  SCx200 IDE",
+"   0503  SCx200 Audio",
+"   0504  SCx200 Video",
+"   0505  SCx200 XBus",
+"   0510  SC1100 Bridge",
+"   0511  SC1100 SMI",
+"   0515  SC1100 XBus",
+"   d001  87410 IDE",
+"100c  Tseng Labs Inc",
+"   3202  ET4000/W32p rev A",
+"   3205  ET4000/W32p rev B",
+"   3206  ET4000/W32p rev C",
+"   3207  ET4000/W32p rev D",
+"   3208  ET6000",
+"   4702  ET6300",
+"100d  AST Research Inc",
+"100e  Weitek",
+"   9000  P9000 Viper",
+"   9001  P9000 Viper",
+"   9002  P9000 Viper",
+"   9100  P9100 Viper Pro/SE",
+"1010  Video Logic, Ltd.",
+"1011  Digital Equipment Corporation",
+"   0001  DECchip 21050",
+"   0002  DECchip 21040 [Tulip]",
+"   0004  DECchip 21030 [TGA]",
+"   0007  NVRAM [Zephyr NVRAM]",
+"   0008  KZPSA [KZPSA]",
+"   0009  DECchip 21140 [FasterNet]",
+"       1025 0310  21140 Fast Ethernet",
+"       10b8 2001  SMC9332BDT EtherPower 10/100",
+"       10b8 2002  SMC9332BVT EtherPower T4 10/100",
+"       10b8 2003  SMC9334BDT EtherPower 10/100 (1-port)",
+"       1109 2400  ANA-6944A/TX Fast Ethernet",
+"       1112 2300  RNS2300 Fast Ethernet",
+"       1112 2320  RNS2320 Fast Ethernet",
+"       1112 2340  RNS2340 Fast Ethernet",
+"       1113 1207  EN-1207-TX Fast Ethernet",
+"       1186 1100  DFE-500TX Fast Ethernet",
+"       1186 1112  DFE-570TX Fast Ethernet",
+"       1186 1140  DFE-660 Cardbus Ethernet 10/100",
+"       1186 1142  DFE-660 Cardbus Ethernet 10/100",
+"       11f6 0503  Freedomline Fast Ethernet",
+"       1282 9100  AEF-380TXD Fast Ethernet",
+"       1385 1100  FA310TX Fast Ethernet",
+"       2646 0001  KNE100TX Fast Ethernet",
+"   000a  21230 Video Codec",
+"   000d  PBXGB [TGA2]",
+"   000f  PCI-to-PDQ Interface Chip [PFI]",
+"       1011 def1  FDDI controller (DEFPA)",
+"       103c def1  FDDI controller (3X-DEFPA)",
+"   0014  DECchip 21041 [Tulip Pass 3]",
+"       1186 0100  DE-530+",
+"   0016  DGLPB [OPPO]",
+"   0017  PV-PCI Graphics Controller (ZLXp-L)",
+"   0019  DECchip 21142/43",
+"       1011 500a  DE500A Fast Ethernet",
+"       1011 500b  DE500B Fast Ethernet",
+"       1014 0001  10/100 EtherJet Cardbus",
+"       1025 0315  ALN315 Fast Ethernet",
+"       1033 800c  PC-9821-CS01 100BASE-TX Interface Card",
+"       1033 800d  PC-9821NR-B06 100BASE-TX Interface Card",
+"       108d 0016  Rapidfire 2327 10/100 Ethernet",
+"       108d 0017  GoCard 2250 Ethernet 10/100 Cardbus",
+"       10b8 2005  SMC8032DT Extreme Ethernet 10/100",
+"       10b8 8034  SMC8034 Extreme Ethernet 10/100",
+"       10ef 8169  Cardbus Fast Ethernet",
+"       1109 2a00  ANA-6911A/TX Fast Ethernet",
+"       1109 2b00  ANA-6911A/TXC Fast Ethernet",
+"       1109 3000  ANA-6922/TX Fast Ethernet",
+"       1113 1207  Cheetah Fast Ethernet",
+"       1113 2220  Cardbus Fast Ethernet",
+"       115d 0002  Cardbus Ethernet 10/100",
+"       1179 0203  Fast Ethernet",
+"       1179 0204  Cardbus Fast Ethernet",
+"       1186 1100  DFE-500TX Fast Ethernet",
+"       1186 1101  DFE-500TX Fast Ethernet",
+"       1186 1102  DFE-500TX Fast Ethernet",
+"       1186 1112  DFE-570TX Quad Fast Ethernet",
+"       1259 2800  AT-2800Tx Fast Ethernet",
+"       1266 0004  Eagle Fast EtherMAX",
+"       12af 0019  NetFlyer Cardbus Fast Ethernet",
+"       1374 0001  Cardbus Ethernet Card 10/100",
+"       1374 0002  Cardbus Ethernet Card 10/100",
+"       1374 0007  Cardbus Ethernet Card 10/100",
+"       1374 0008  Cardbus Ethernet Card 10/100",
+"       1385 2100  FA510",
+"       1395 0001  10/100 Ethernet CardBus PC Card",
+"       13d1 ab01  EtherFast 10/100 Cardbus (PCMPC200)",
+"       14cb 0100  LNDL-100N 100Base-TX Ethernet PC Card",
+"       8086 0001  EtherExpress PRO/100 Mobile CardBus 32",
+"   001a  Farallon PN9000SX Gigabit Ethernet",
+"   0021  DECchip 21052",
+"   0022  DECchip 21150",
+"   0023  DECchip 21150",
+"   0024  DECchip 21152",
+"   0025  DECchip 21153",
+"   0026  DECchip 21154",
+"   0034  56k Modem Cardbus",
+"       1374 0003  56k Modem Cardbus",
+"   0045  DECchip 21553",
+"   0046  DECchip 21554",
+"       0e11 4050  Integrated Smart Array",
+"       0e11 4051  Integrated Smart Array",
+"       0e11 4058  Integrated Smart Array",
+"       103c 10c2  Hewlett-Packard NetRAID-4M",
+"       12d9 000a  IP Telephony card",
+"       4c53 1050  CT7 mainboard",
+"       4c53 1051  CE7 mainboard",
+"       9005 0364  5400S (Mustang)",
+"       9005 0365  5400S (Mustang)",
+"       9005 1364  Dell PowerEdge RAID Controller 2",
+"       9005 1365  Dell PowerEdge RAID Controller 2",
+"       e4bf 1000  CC8-1-BLUES",
+"   1065  StrongARM DC21285",
+"       1069 0020  DAC960P / DAC1164P",
+"1012  Micronics Computers Inc",
+"1013  Cirrus Logic",
+"   0038  GD 7548",
+"   0040  GD 7555 Flat Panel GUI Accelerator",
+"   004c  GD 7556 Video/Graphics LCD/CRT Ctrlr",
+"   00a0  GD 5430/40 [Alpine]",
+"   00a2  GD 5432 [Alpine]",
+"   00a4  GD 5434-4 [Alpine]",
+"   00a8  GD 5434-8 [Alpine]",
+"   00ac  GD 5436 [Alpine]",
+"   00b0  GD 5440",
+"   00b8  GD 5446",
+"   00bc  GD 5480",
+"       1013 00bc  CL-GD5480",
+"   00d0  GD 5462",
+"   00d2  GD 5462 [Laguna I]",
+"   00d4  GD 5464 [Laguna]",
+"   00d5  GD 5464 BD [Laguna]",
+"   00d6  GD 5465 [Laguna]",
+"       13ce 8031  Barco Metheus 2 Megapixel, Dual Head",
+"       13cf 8031  Barco Metheus 2 Megapixel, Dual Head",
+"   00e8  GD 5436U",
+"   1100  CL 6729",
+"   1110  PD 6832 PCMCIA/CardBus Ctrlr",
+"   1112  PD 6834 PCMCIA/CardBus Ctrlr",
+"   1113  PD 6833 PCMCIA/CardBus Ctrlr",
+"   1200  GD 7542 [Nordic]",
+"   1202  GD 7543 [Viking]",
+"   1204  GD 7541 [Nordic Light]",
+"   4000  MD 5620 [CLM Data Fax Voice]",
+"   4400  CD 4400",
+"   6001  CS 4610/11 [CrystalClear SoundFusion Audio Accelerator]",
+"       1014 1010  CS4610 SoundFusion Audio Accelerator",
+"   6003  CS 4614/22/24 [CrystalClear SoundFusion Audio Accelerator]",
+"       1013 4280  Crystal SoundFusion PCI Audio Accelerator",
+"       1014 0153  ThinkPad A20m",
+"       153b 1136  SiXPack 5.1+",
+"       1681 0050  Game Theater XP",
+"       1681 a011  Fortissimo III 7.1",
+"   6004  CS 4614/22/24 [CrystalClear SoundFusion Audio Accelerator]",
+"   6005  Crystal CS4281 PCI Audio",
+"       1013 4281  Crystal CS4281 PCI Audio",
+"       10cf 10a8  Crystal CS4281 PCI Audio",
+"       10cf 10a9  Crystal CS4281 PCI Audio",
+"       10cf 10aa  Crystal CS4281 PCI Audio",
+"       10cf 10ab  Crystal CS4281 PCI Audio",
+"       10cf 10ac  Crystal CS4281 PCI Audio",
+"       10cf 10ad  Crystal CS4281 PCI Audio",
+"       10cf 10b4  Crystal CS4281 PCI Audio",
+"       1179 0001  Crystal CS4281 PCI Audio",
+"       14c0 000c  Crystal CS4281 PCI Audio",
+"1014  IBM",
+"   0002  PCI to MCA Bridge",
+"   0005  Alta Lite",
+"   0007  Alta MP",
+"   000a  Fire Coral",
+"   0017  CPU to PCI Bridge",
+"   0018  TR Auto LANstreamer",
+"   001b  GXT-150P",
+"   001c  Carrera",
+"   001d  82G2675",
+"   0020  GXT1000 Graphics Adapter",
+"   0022  IBM27-82351",
+"   002d  Python",
+"   002e  SCSI RAID Adapter [ServeRAID]",
+"       1014 002e  ServeRAID-3x",
+"       1014 022e  ServeRAID-4H",
+"   0031  2 Port Serial Adapter",
+"       1014 0031  2721 WAN IOA - 2 Port Sync Serial Adapter",
+"   0036  Miami",
+"   0037  82660 CPU to PCI Bridge",
+"   003a  CPU to PCI Bridge",
+"   003c  GXT250P/GXT255P Graphics Adapter",
+"   003e  16/4 Token ring UTP/STP controller",
+"       1014 003e  Token-Ring Adapter",
+"       1014 00cd  Token-Ring Adapter + Wake-On-LAN",
+"       1014 00ce  16/4 Token-Ring Adapter 2",
+"       1014 00cf  16/4 Token-Ring Adapter Special",
+"       1014 00e4  High-Speed 100/16/4 Token-Ring Adapter",
+"       1014 00e5  16/4 Token-Ring Adapter 2 + Wake-On-LAN",
+"       1014 016d  iSeries 2744 Card",
+"   0045  SSA Adapter",
+"   0046  MPIC interrupt controller",
+"   0047  PCI to PCI Bridge",
+"   0048  PCI to PCI Bridge",
+"   0049  Warhead SCSI Controller",
+"   004e  ATM Controller (14104e00)",
+"   004f  ATM Controller (14104f00)",
+"   0050  ATM Controller (14105000)",
+"   0053  25 MBit ATM Controller",
+"   0054  GXT500P/GXT550P Graphics Adapter",
+"   0057  MPEG PCI Bridge",
+"   005c  i82557B 10/100",
+"   005e  GXT800P Graphics Adapter",
+"   007c  ATM Controller (14107c00)",
+"   007d  3780IDSP [MWave]",
+"   008b  EADS PCI to PCI Bridge",
+"   008e  GXT3000P Graphics Adapter",
+"   0090  GXT 3000P",
+"       1014 008e  GXT-3000P",
+"   0091  SSA Adapter",
+"   0095  20H2999 PCI Docking Bridge",
+"   0096  Chukar chipset SCSI controller",
+"       1014 0097  iSeries 2778 DASD IOA",
+"       1014 0098  iSeries 2763 DASD IOA",
+"       1014 0099  iSeries 2748 DASD IOA",
+"   009f  PCI 4758 Cryptographic Accelerator",
+"   00a5  ATM Controller (1410a500)",
+"   00a6  ATM 155MBPS MM Controller (1410a600)",
+"   00b7  256-bit Graphics Rasterizer [Fire GL1]",
+"       1092 00b8  FireGL1 AGP 32Mb",
+"   00b8  GXT2000P Graphics Adapter",
+"   00be  ATM 622MBPS Controller (1410be00)",
+"   00dc  Advanced Systems Management Adapter (ASMA)",
+"   00fc  CPC710 Dual Bridge and Memory Controller (PCI-64)",
+"   0104  Gigabit Ethernet-SX Adapter",
+"   0105  CPC710 Dual Bridge and Memory Controller (PCI-32)",
+"   010f  Remote Supervisor Adapter (RSA)",
+"   0142  Yotta Video Compositor Input",
+"       1014 0143  Yotta Input Controller (ytin)",
+"   0144  Yotta Video Compositor Output",
+"       1014 0145  Yotta Output Controller (ytout)",
+"   0156  405GP PLB to PCI Bridge",
+"   015e  622Mbps ATM PCI Adapter",
+"   0160  64bit/66MHz PCI ATM 155 MMF",
+"   016e  GXT4000P Graphics Adapter",
+"   0170  GXT6000P Graphics Adapter",
+"   017d  GXT300P Graphics Adapter",
+"   0180  Snipe chipset SCSI controller",
+"       1014 0241  iSeries 2757 DASD IOA",
+"       1014 0264  Quad Channel PCI-X U320 SCSI RAID Adapter (2780)",
+"   0188  EADS-X PCI-X to PCI-X Bridge",
+"   01a7  PCI-X to PCI-X Bridge",
+"   01bd  ServeRAID Controller",
+"       1014 01be  ServeRAID-4M",
+"       1014 01bf  ServeRAID-4L",
+"       1014 0208  ServeRAID-4Mx",
+"       1014 020e  ServeRAID-4Lx",
+"       1014 022e  ServeRAID-4H",
+"       1014 0258  ServeRAID-5i",
+"       1014 0259  ServeRAID-5i",
+"   01c1  64bit/66MHz PCI ATM 155 UTP",
+"   01e6  Cryptographic Accelerator",
+"   01ff  10/100 Mbps Ethernet",
+"   0219  Multiport Serial Adapter",
+"       1014 021a  Dual RVX",
+"       1014 0251  Internal Modem/RVX",
+"       1014 0252  Quad Internal Modem",
+"   021b  GXT6500P Graphics Adapter",
+"   021c  GXT4500P Graphics Adapter",
+"   0233  GXT135P Graphics Adapter",
+"   0266  PCI-X Dual Channel SCSI",
+"   0268  Gigabit Ethernet-SX Adapter (PCI-X)",
+"   0269  10/100/1000 Base-TX Ethernet Adapter (PCI-X)",
+"   028c  Citrine chipset SCSI controller",
+"       1014 028d  Dual Channel PCI-X DDR SAS RAID Adapter (572E)",
+"       1014 02be  Dual Channel PCI-X DDR U320 SCSI RAID Adapter (571B)",
+"       1014 02c0  Dual Channel PCI-X DDR U320 SCSI Adapter (571A)",
+"       1014 030d  PCI-X DDR Auxiliary Cache Adapter (575B)",
+"   02a1  Calgary PCI-X Host Bridge",
+"   02bd  Obsidian chipset SCSI controller",
+"       1014 02c1  PCI-X DDR 3Gb SAS Adapter (572A/572C)",
+"       1014 02c2  PCI-X DDR 3Gb SAS RAID Adapter (572B/571D)",
+"   0302  Winnipeg PCI-X Host Bridge",
+"   0314  ZISC 036 Neural accelerator card",
+"   3022  QLA3022 Network Adapter",
+"   4022  QLA3022 Network Adapter",
+"   ffff  MPIC-2 interrupt controller",
+"1015  LSI Logic Corp of Canada",
+"1016  ICL Personal Systems",
+"1017  SPEA Software AG",
+"   5343  SPEA 3D Accelerator",
+"1018  Unisys Systems",
+"1019  Elitegroup Computer Systems",
+"101a  AT&T GIS (NCR)",
+"   0005  100VG ethernet",
+"101b  Vitesse Semiconductor",
+"101c  Western Digital",
+"   0193  33C193A",
+"   0196  33C196A",
+"   0197  33C197A",
+"   0296  33C296A",
+"   3193  7193",
+"   3197  7197",
+"   3296  33C296A",
+"   4296  34C296",
+"   9710  Pipeline 9710",
+"   9712  Pipeline 9712",
+"   c24a  90C",
+"101e  American Megatrends Inc.",
+"   0009  MegaRAID 428 Ultra RAID Controller (rev 03)",
+"   1960  MegaRAID",
+"       101e 0471  MegaRAID 471 Enterprise 1600 RAID Controller",
+"       101e 0475  MegaRAID 475 Express 500/500LC RAID Controller",
+"       101e 0477  MegaRAID 477 Elite 3100 RAID Controller",
+"       101e 0493  MegaRAID 493 Elite 1600 RAID Controller",
+"       101e 0494  MegaRAID 494 Elite 1650 RAID Controller",
+"       101e 0503  MegaRAID 503 Enterprise 1650 RAID Controller",
+"       101e 0511  MegaRAID 511 i4 IDE RAID Controller",
+"       101e 0522  MegaRAID 522 i4133 RAID Controller",
+"       1028 0471  PowerEdge RAID Controller 3/QC",
+"       1028 0475  PowerEdge RAID Controller 3/SC",
+"       1028 0493  PowerEdge RAID Controller 3/DC",
+"       1028 0511  PowerEdge Cost Effective RAID Controller ATA100/4Ch",
+"       103c 60e7  NetRAID-1M",
+"   9010  MegaRAID 428 Ultra RAID Controller",
+"   9030  EIDE Controller",
+"   9031  EIDE Controller",
+"   9032  EIDE & SCSI Controller",
+"   9033  SCSI Controller",
+"   9040  Multimedia card",
+"   9060  MegaRAID 434 Ultra GT RAID Controller",
+"   9063  MegaRAC",
+"       101e 0767  Dell Remote Assistant Card 2",
+"101f  PictureTel",
+"1020  Hitachi Computer Products",
+"1021  OKI Electric Industry Co. Ltd.",
+"1022  Advanced Micro Devices [AMD]",
+"   1100  K8 [Athlon64/Opteron] HyperTransport Technology Configuration",
+"   1101  K8 [Athlon64/Opteron] Address Map",
+"   1102  K8 [Athlon64/Opteron] DRAM Controller",
+"   1103  K8 [Athlon64/Opteron] Miscellaneous Control",
+"   2000  79c970 [PCnet32 LANCE]",
+"       1014 2000  NetFinity 10/100 Fast Ethernet",
+"       1022 2000  PCnet - Fast 79C971",
+"       103c 104c  Ethernet with LAN remote power Adapter",
+"       103c 1064  Ethernet with LAN remote power Adapter",
+"       103c 1065  Ethernet with LAN remote power Adapter",
+"       103c 106c  Ethernet with LAN remote power Adapter",
+"       103c 106e  Ethernet with LAN remote power Adapter",
+"       103c 10ea  Ethernet with LAN remote power Adapter",
+"       1113 1220  EN1220 10/100 Fast Ethernet",
+"       1259 2450  AT-2450 10/100 Fast Ethernet",
+"       1259 2454  AT-2450v4 10Mb Ethernet Adapter",
+"       1259 2700  AT-2700TX 10/100 Fast Ethernet",
+"       1259 2701  AT-2700FX 100Mb Ethernet",
+"       1259 2702  AT-2700FTX 10/100 Mb Fiber/Copper Fast Ethernet",
+"       1259 2703  AT-2701FX",
+"       4c53 1000  CC7/CR7/CP7/VC7/VP7/VR7 mainboard",
+"       4c53 1010  CP5/CR6 mainboard",
+"       4c53 1020  VR6 mainboard",
+"       4c53 1030  PC5 mainboard",
+"       4c53 1040  CL7 mainboard",
+"       4c53 1060  PC7 mainboard",
+"   2001  79c978 [HomePNA]",
+"       1092 0a78  Multimedia Home Network Adapter",
+"       1668 0299  ActionLink Home Network Adapter",
+"   2003  Am 1771 MBW [Alchemy]",
+"   2020  53c974 [PCscsi]",
+"   2040  79c974",
+"   2081  Geode LX Video",
+"   2082  Geode LX AES Security Block",
+"   208f  CS5536 GeodeLink PCI South Bridge",
+"   2090  CS5536 [Geode companion] ISA",
+"   2091  CS5536 [Geode companion] FLASH",
+"   2093  CS5536 [Geode companion] Audio",
+"   2094  CS5536 [Geode companion] OHC",
+"   2095  CS5536 [Geode companion] EHC",
+"   2096  CS5536 [Geode companion] UDC",
+"   2097  CS5536 [Geode companion] UOC",
+"   209a  CS5536 [Geode companion] IDE",
+"   3000  ELanSC520 Microcontroller",
+"   7006  AMD-751 [Irongate] System Controller",
+"   7007  AMD-751 [Irongate] AGP Bridge",
+"   700a  AMD-IGR4 AGP Host to PCI Bridge",
+"   700b  AMD-IGR4 PCI to PCI Bridge",
+"   700c  AMD-760 MP [IGD4-2P] System Controller",
+"   700d  AMD-760 MP [IGD4-2P] AGP Bridge",
+"   700e  AMD-760 [IGD4-1P] System Controller",
+"   700f  AMD-760 [IGD4-1P] AGP Bridge",
+"   7400  AMD-755 [Cobra] ISA",
+"   7401  AMD-755 [Cobra] IDE",
+"   7403  AMD-755 [Cobra] ACPI",
+"   7404  AMD-755 [Cobra] USB",
+"   7408  AMD-756 [Viper] ISA",
+"   7409  AMD-756 [Viper] IDE",
+"   740b  AMD-756 [Viper] ACPI",
+"   740c  AMD-756 [Viper] USB",
+"   7410  AMD-766 [ViperPlus] ISA",
+"   7411  AMD-766 [ViperPlus] IDE",
+"   7413  AMD-766 [ViperPlus] ACPI",
+"   7414  AMD-766 [ViperPlus] USB",
+"   7440  AMD-768 [Opus] ISA",
+"       1043 8044  A7M-D Mainboard",
+"   7441  AMD-768 [Opus] IDE",
+"   7443  AMD-768 [Opus] ACPI",
+"       1043 8044  A7M-D Mainboard",
+"   7445  AMD-768 [Opus] Audio",
+"   7446  AMD-768 [Opus] MC97 Modem (Smart Link HAMR5600 compatible)",
+"   7448  AMD-768 [Opus] PCI",
+"   7449  AMD-768 [Opus] USB",
+"   7450  AMD-8131 PCI-X Bridge",
+"   7451  AMD-8131 PCI-X IOAPIC",
+"   7454  AMD-8151 System Controller",
+"   7455  AMD-8151 AGP Bridge",
+"   7458  AMD-8132 PCI-X Bridge",
+"   7459  AMD-8132 PCI-X IOAPIC",
+"   7460  AMD-8111 PCI",
+"       161f 3017  HDAMB",
+"   7461  AMD-8111 USB",
+"   7462  AMD-8111 Ethernet",
+"   7464  AMD-8111 USB",
+"       161f 3017  HDAMB",
+"   7468  AMD-8111 LPC",
+"       161f 3017  HDAMB",
+"   7469  AMD-8111 IDE",
+"       1022 2b80  AMD-8111 IDE [Quartet]",
+"       161f 3017  HDAMB",
+"   746a  AMD-8111 SMBus 2.0",
+"   746b  AMD-8111 ACPI",
+"       161f 3017  HDAMB",
+"   746d  AMD-8111 AC97 Audio",
+"       161f 3017  HDAMB",
+"   746e  AMD-8111 MC97 Modem",
+"   756b  AMD-8111 ACPI",
+"1023  Trident Microsystems",
+"   0194  82C194",
+"   2000  4DWave DX",
+"   2001  4DWave NX",
+"       122d 1400  Trident PCI288-Q3DII (NX)",
+"   2100  CyberBlade XP4m32",
+"   2200  XGI Volari XP5",
+"   8400  CyberBlade/i7",
+"       1023 8400  CyberBlade i7 AGP",
+"   8420  CyberBlade/i7d",
+"       0e11 b15a  CyberBlade i7 AGP",
+"   8500  CyberBlade/i1",
+"   8520  CyberBlade i1",
+"       0e11 b16e  CyberBlade i1 AGP",
+"       1023 8520  CyberBlade i1 AGP",
+"   8620  CyberBlade/i1",
+"       1014 0502  ThinkPad R30/T30",
+"       1014 1025  Travelmate 352TE",
+"   8820  CyberBlade XPAi1",
+"   9320  TGUI 9320",
+"   9350  GUI Accelerator",
+"   9360  Flat panel GUI Accelerator",
+"   9382  Cyber 9382 [Reference design]",
+"   9383  Cyber 9383 [Reference design]",
+"   9385  Cyber 9385 [Reference design]",
+"   9386  Cyber 9386",
+"   9388  Cyber 9388",
+"   9397  Cyber 9397",
+"   939a  Cyber 9397DVD",
+"   9420  TGUI 9420",
+"   9430  TGUI 9430",
+"   9440  TGUI 9440",
+"   9460  TGUI 9460",
+"   9470  TGUI 9470",
+"   9520  Cyber 9520",
+"   9525  Cyber 9525",
+"       10cf 1094  Lifebook C6155",
+"   9540  Cyber 9540",
+"   9660  TGUI 9660/938x/968x",
+"   9680  TGUI 9680",
+"   9682  TGUI 9682",
+"   9683  TGUI 9683",
+"   9685  ProVIDIA 9685",
+"   9750  3DImage 9750",
+"       1014 9750  3DImage 9750",
+"       1023 9750  3DImage 9750",
+"   9753  TGUI 9753",
+"   9754  TGUI 9754",
+"   9759  TGUI 975",
+"   9783  TGUI 9783",
+"   9785  TGUI 9785",
+"   9850  3DImage 9850",
+"   9880  Blade 3D PCI/AGP",
+"       1023 9880  Blade 3D",
+"   9910  CyberBlade/XP",
+"   9930  CyberBlade/XPm",
+"1024  Zenith Data Systems",
+"1025  Acer Incorporated [ALI]",
+"   1435  M1435",
+"   1445  M1445",
+"   1449  M1449",
+"   1451  M1451",
+"   1461  M1461",
+"   1489  M1489",
+"   1511  M1511",
+"   1512  ALI M1512 Aladdin",
+"   1513  M1513",
+"   1521  ALI M1521 Aladdin III CPU Bridge",
+"       10b9 1521  ALI M1521 Aladdin III CPU Bridge",
+"   1523  ALI M1523 ISA Bridge",
+"       10b9 1523  ALI M1523 ISA Bridge",
+"   1531  M1531 Northbridge [Aladdin IV/IV+]",
+"   1533  M1533 PCI-to-ISA Bridge",
+"       10b9 1533  ALI M1533 Aladdin IV/V ISA South Bridge",
+"   1535  M1535 PCI Bridge + Super I/O + FIR",
+"   1541  M1541 Northbridge [Aladdin V]",
+"       10b9 1541  ALI M1541 Aladdin V/V+ AGP+PCI North Bridge",
+"   1542  M1542 Northbridge [Aladdin V]",
+"   1543  M1543 PCI-to-ISA Bridge + Super I/O + FIR",
+"   1561  M1561 Northbridge [Aladdin 7]",
+"   1621  M1621 Northbridge [Aladdin-Pro II]",
+"   1631  M1631 Northbridge+3D Graphics [Aladdin TNT2]",
+"   1641  M1641 Northbridge [Aladdin-Pro IV]",
+"   1647  M1647 [MaGiK1] PCI North Bridge",
+"   1671  M1671 Northbridge [ALADDiN-P4]",
+"   1672  Northbridge [CyberALADDiN-P4]",
+"   3141  M3141",
+"   3143  M3143",
+"   3145  M3145",
+"   3147  M3147",
+"   3149  M3149",
+"   3151  M3151",
+"   3307  M3307 MPEG-I Video Controller",
+"   3309  M3309 MPEG-II Video w/ Software Audio Decoder",
+"   3321  M3321 MPEG-II Audio/Video Decoder",
+"   5212  M4803",
+"   5215  ALI PCI EIDE Controller",
+"   5217  M5217H",
+"   5219  M5219",
+"   5225  M5225",
+"   5229  M5229",
+"   5235  M5235",
+"   5237  M5237 PCI USB Host Controller",
+"   5240  EIDE Controller",
+"   5241  PCMCIA Bridge",
+"   5242  General Purpose Controller",
+"   5243  PCI to PCI Bridge Controller",
+"   5244  Floppy Disk Controller",
+"   5247  M1541 PCI to PCI Bridge",
+"   5251  M5251 P1394 Controller",
+"   5427  PCI to AGP Bridge",
+"   5451  M5451 PCI AC-Link Controller Audio Device",
+"   5453  M5453 PCI AC-Link Controller Modem Device",
+"   7101  M7101 PCI PMU Power Management Controller",
+"       10b9 7101  M7101 PCI PMU Power Management Controller",
+"1028  Dell",
+"   0001  PowerEdge Expandable RAID Controller 2/Si",
+"       1028 0001  PowerEdge 2400",
+"   0002  PowerEdge Expandable RAID Controller 3/Di",
+"       1028 0002  PowerEdge 4400",
+"   0003  PowerEdge Expandable RAID Controller 3/Si",
+"       1028 0003  PowerEdge 2450",
+"   0006  PowerEdge Expandable RAID Controller 3/Di",
+"   0007  Remote Access Card III",
+"   0008  Remote Access Card III",
+"   0009  Remote Access Card III: BMC/SMIC device not present",
+"   000a  PowerEdge Expandable RAID Controller 3/Di",
+"   000c  Embedded Remote Access or ERA/O",
+"   000d  Embedded Remote Access: BMC/SMIC device",
+"   000e  PowerEdge Expandable RAID controller 4/Di",
+"   000f  PowerEdge Expandable RAID controller 4/Di",
+"   0010  Remote Access Card 4",
+"   0011  Remote Access Card 4 Daughter Card",
+"   0012  Remote Access Card 4 Daughter Card Virtual UART",
+"   0013  PowerEdge Expandable RAID controller 4",
+"       1028 016c  PowerEdge Expandable RAID Controller 4e/Si",
+"       1028 016d  PowerEdge Expandable RAID Controller 4e/Di",
+"       1028 016e  PowerEdge Expandable RAID Controller 4e/Di",
+"       1028 016f  PowerEdge Expandable RAID Controller 4e/Di",
+"       1028 0170  PowerEdge Expandable RAID Controller 4e/Di",
+"   0014  Remote Access Card 4 Daughter Card SMIC interface",
+"   0015  PowerEdge Expandable RAID controller 5",
+"1029  Siemens Nixdorf IS",
+"102a  LSI Logic",
+"   0000  HYDRA",
+"   0010  ASPEN",
+"   001f  AHA-2940U2/U2W /7890/7891 SCSI Controllers",
+"       9005 000f  2940U2W SCSI Controller",
+"       9005 0106  2940U2W SCSI Controller",
+"       9005 a180  2940U2W SCSI Controller",
+"   00c5  AIC-7899 U160/m SCSI Controller",
+"       1028 00c5  PowerEdge 2550/2650/4600",
+"   00cf  AIC-7899P U160/m",
+"       1028 0106  PowerEdge 4600",
+"       1028 0121  PowerEdge 2650",
+"102b  Matrox Graphics, Inc.",
+"   0010  MGA-I [Impression?]",
+"   0100  MGA 1064SG [Mystique]",
+"   0518  MGA-II [Athena]",
+"   0519  MGA 2064W [Millennium]",
+"   051a  MGA 1064SG [Mystique]",
+"       102b 0100  MGA-1064SG Mystique",
+"       102b 1100  MGA-1084SG Mystique",
+"       102b 1200  MGA-1084SG Mystique",
+"       1100 102b  MGA-1084SG Mystique",
+"       110a 0018  Scenic Pro C5 (D1025)",
+"   051b  MGA 2164W [Millennium II]",
+"       102b 051b  MGA-2164W Millennium II",
+"       102b 1100  MGA-2164W Millennium II",
+"       102b 1200  MGA-2164W Millennium II",
+"   051e  MGA 1064SG [Mystique] AGP",
+"   051f  MGA 2164W [Millennium II] AGP",
+"   0520  MGA G200",
+"       102b dbc2  G200 Multi-Monitor",
+"       102b dbc8  G200 Multi-Monitor",
+"       102b dbe2  G200 Multi-Monitor",
+"       102b dbe8  G200 Multi-Monitor",
+"       102b ff03  Millennium G200 SD",
+"       102b ff04  Marvel G200",
+"   0521  MGA G200 AGP",
+"       1014 ff03  Millennium G200 AGP",
+"       102b 48e9  Mystique G200 AGP",
+"       102b 48f8  Millennium G200 SD AGP",
+"       102b 4a60  Millennium G200 LE AGP",
+"       102b 4a64  Millennium G200 AGP",
+"       102b c93c  Millennium G200 AGP",
+"       102b c9b0  Millennium G200 AGP",
+"       102b c9bc  Millennium G200 AGP",
+"       102b ca60  Millennium G250 LE AGP",
+"       102b ca6c  Millennium G250 AGP",
+"       102b dbbc  Millennium G200 AGP",
+"       102b dbc2  Millennium G200 MMS (Dual G200)",
+"       102b dbc3  G200 Multi-Monitor",
+"       102b dbc8  Millennium G200 MMS (Dual G200)",
+"       102b dbd2  G200 Multi-Monitor",
+"       102b dbd3  G200 Multi-Monitor",
+"       102b dbd4  G200 Multi-Monitor",
+"       102b dbd5  G200 Multi-Monitor",
+"       102b dbd8  G200 Multi-Monitor",
+"       102b dbd9  G200 Multi-Monitor",
+"       102b dbe2  Millennium G200 MMS (Quad G200)",
+"       102b dbe3  G200 Multi-Monitor",
+"       102b dbe8  Millennium G200 MMS (Quad G200)",
+"       102b dbf2  G200 Multi-Monitor",
+"       102b dbf3  G200 Multi-Monitor",
+"       102b dbf4  G200 Multi-Monitor",
+"       102b dbf5  G200 Multi-Monitor",
+"       102b dbf8  G200 Multi-Monitor",
+"       102b dbf9  G200 Multi-Monitor",
+"       102b f806  Mystique G200 Video AGP",
+"       102b ff00  MGA-G200 AGP",
+"       102b ff02  Mystique G200 AGP",
+"       102b ff03  Millennium G200 AGP",
+"       102b ff04  Marvel G200 AGP",
+"       110a 0032  MGA-G200 AGP",
+"   0522  MGA G200e [Pilot] ServerEngines (SEP1)",
+"   0525  MGA G400/G450",
+"       0e11 b16f  MGA-G400 AGP",
+"       102b 0328  Millennium G400 16Mb SDRAM",
+"       102b 0338  Millennium G400 16Mb SDRAM",
+"       102b 0378  Millennium G400 32Mb SDRAM",
+"       102b 0541  Millennium G450 Dual Head",
+"       102b 0542  Millennium G450 Dual Head LX",
+"       102b 0543  Millennium G450 Single Head LX",
+"       102b 0641  Millennium G450 32Mb SDRAM Dual Head",
+"       102b 0642  Millennium G450 32Mb SDRAM Dual Head LX",
+"       102b 0643  Millennium G450 32Mb SDRAM Single Head LX",
+"       102b 07c0  Millennium G450 Dual Head LE",
+"       102b 07c1  Millennium G450 SDR Dual Head LE",
+"       102b 0d41  Millennium G450 Dual Head PCI",
+"       102b 0d42  Millennium G450 Dual Head LX PCI",
+"       102b 0d43  Millennium G450 32Mb Dual Head PCI",
+"       102b 0e00  Marvel G450 eTV",
+"       102b 0e01  Marvel G450 eTV",
+"       102b 0e02  Marvel G450 eTV",
+"       102b 0e03  Marvel G450 eTV",
+"       102b 0f80  Millennium G450 Low Profile",
+"       102b 0f81  Millennium G450 Low Profile",
+"       102b 0f82  Millennium G450 Low Profile DVI",
+"       102b 0f83  Millennium G450 Low Profile DVI",
+"       102b 19d8  Millennium G400 16Mb SGRAM",
+"       102b 19f8  Millennium G400 32Mb SGRAM",
+"       102b 2159  Millennium G400 Dual Head 16Mb",
+"       102b 2179  Millennium G400 MAX/Dual Head 32Mb",
+"       102b 217d  Millennium G400 Dual Head Max",
+"       102b 23c0  Millennium G450",
+"       102b 23c1  Millennium G450",
+"       102b 23c2  Millennium G450 DVI",
+"       102b 23c3  Millennium G450 DVI",
+"       102b 2f58  Millennium G400",
+"       102b 2f78  Millennium G400",
+"       102b 3693  Marvel G400 AGP",
+"       102b 5dd0  4Sight II",
+"       102b 5f50  4Sight II",
+"       102b 5f51  4Sight II",
+"       102b 5f52  4Sight II",
+"       102b 9010  Millennium G400 Dual Head",
+"       1458 0400  GA-G400",
+"       1705 0001  Millennium G450 32MB SGRAM",
+"       1705 0002  Millennium G450 16MB SGRAM",
+"       1705 0003  Millennium G450 32MB",
+"       1705 0004  Millennium G450 16MB",
+"   0527  MGA Parhelia AGP",
+"       102b 0840  Parhelia 128Mb",
+"       102b 0850  Parhelia 256MB AGP 4X",
+"   0528  Parhelia 8X",
+"       102b 1020  Parhelia 128MB",
+"       102b 1030  Parhelia 256 MB Dual DVI",
+"       102b 14e1  Parhelia PCI 256MB",
+"       102b 2021  QID Pro",
+"   0d10  MGA Ultima/Impression",
+"   1000  MGA G100 [Productiva]",
+"       102b ff01  Productiva G100",
+"       102b ff05  Productiva G100 Multi-Monitor",
+"   1001  MGA G100 [Productiva] AGP",
+"       102b 1001  MGA-G100 AGP",
+"       102b ff00  MGA-G100 AGP",
+"       102b ff01  MGA-G100 Productiva AGP",
+"       102b ff03  Millennium G100 AGP",
+"       102b ff04  MGA-G100 AGP",
+"       102b ff05  MGA-G100 Productiva AGP Multi-Monitor",
+"       110a 001e  MGA-G100 AGP",
+"   2007  MGA Mistral",
+"   2527  MGA G550 AGP",
+"       102b 0f83  Millennium G550",
+"       102b 0f84  Millennium G550 Dual Head DDR 32Mb",
+"       102b 1e41  Millennium G550",
+"   2537  Millenium P650/P750",
+"       102b 1820  Millennium P750 64MB",
+"       102b 1830  Millennium P650 64MB",
+"       102b 1c10  QID 128MB",
+"       102b 2811  Millennium P650 Low-profile PCI 64MB",
+"       102b 2c11  QID Low-profile PCI",
+"   2538  Millenium P650 PCIe",
+"       102b 08c7  Millennium P650 PCIe 128MB",
+"       102b 0907  Millennium P650 PCIe 64MB",
+"       102b 1047  Millennium P650 LP PCIe 128MB",
+"       102b 1087  Millennium P650 LP PCIe 64MB",
+"       102b 2538  Parhelia APVe",
+"       102b 3007  QID Low-profile PCIe",
+"   4536  VIA Framegrabber",
+"   6573  Shark 10/100 Multiport SwitchNIC",
+"102c  Chips and Technologies",
+"   00b8  F64310",
+"   00c0  F69000 HiQVideo",
+"       102c 00c0  F69000 HiQVideo",
+"       4c53 1000  CC7/CR7/CP7/VC7/VP7/VR7 mainboard",
+"       4c53 1010  CP5/CR6 mainboard",
+"       4c53 1020  VR6 mainboard",
+"       4c53 1030  PC5 mainboard",
+"       4c53 1050  CT7 mainboard",
+"       4c53 1051  CE7 mainboard",
+"   00d0  F65545",
+"   00d8  F65545",
+"   00dc  F65548",
+"   00e0  F65550",
+"   00e4  F65554",
+"   00e5  F65555 HiQVPro",
+"       0e11 b049  Armada 1700 Laptop Display Controller",
+"       1179 0001  Satellite Pro",
+"   00f0  F68554",
+"   00f4  F68554 HiQVision",
+"   00f5  F68555",
+"   0c30  F69030",
+"       4c53 1000  CC7/CR7/CP7/VC7/VP7/VR7 mainboard",
+"       4c53 1050  CT7 mainboard",
+"       4c53 1051  CE7 mainboard",
+"       4c53 1080  CT8 mainboard",
+"102d  Wyse Technology Inc.",
+"   50dc  3328 Audio",
+"102e  Olivetti Advanced Technology",
+"102f  Toshiba America",
+"   0009  r4x00",
+"   000a  TX3927 MIPS RISC PCI Controller",
+"   0020  ATM Meteor 155",
+"       102f 00f8  ATM Meteor 155",
+"   0030  TC35815CF PCI 10/100 Mbit Ethernet Controller",
+"   0031  TC35815CF PCI 10/100 Mbit Ethernet Controller with WOL",
+"   0105  TC86C001 [goku-s] IDE",
+"   0106  TC86C001 [goku-s] USB 1.1 Host",
+"   0107  TC86C001 [goku-s] USB Device Controller",
+"   0108  TC86C001 [goku-s] I2C/SIO/GPIO Controller",
+"   0180  TX4927/38 MIPS RISC PCI Controller",
+"   0181  TX4925 MIPS RISC PCI Controller",
+"   0182  TX4937 MIPS RISC PCI Controller",
+"1030  TMC Research",
+"1031  Miro Computer Products AG",
+"   5601  DC20 ASIC",
+"   5607  Video I/O & motion JPEG compressor",
+"   5631  Media 3D",
+"   6057  MiroVideo DC10/DC30+",
+"1032  Compaq",
+"1033  NEC Corporation",
+"   0000  Vr4181A USB Host or Function Control Unit",
+"   0001  PCI to 486-like bus Bridge",
+"   0002  PCI to VL98 Bridge",
+"   0003  ATM Controller",
+"   0004  R4000 PCI Bridge",
+"   0005  PCI to 486-like bus Bridge",
+"   0006  PC-9800 Graphic Accelerator",
+"   0007  PCI to UX-Bus Bridge",
+"   0008  PC-9800 Graphic Accelerator",
+"   0009  PCI to PC9800 Core-Graph Bridge",
+"   0016  PCI to VL Bridge",
+"   001a  [Nile II]",
+"   0021  Vrc4373 [Nile I]",
+"   0029  PowerVR PCX1",
+"   002a  PowerVR 3D",
+"   002c  Star Alpha 2",
+"   002d  PCI to C-bus Bridge",
+"   0035  USB",
+"       1033 0035  Hama USB 2.0 CardBus",
+"       1179 0001  USB",
+"       12ee 7000  Root Hub",
+"       14c2 0105  PTI-205N USB 2.0 Host Controller",
+"       1799 0001  Root Hub",
+"       1931 000a  GlobeTrotter Fusion Quad Lite (PPP data)",
+"       1931 000b  GlobeTrotter Fusion Quad Lite (GSM data)",
+"       807d 0035  PCI-USB2 (OHCI subsystem)",
+"   003b  PCI to C-bus Bridge",
+"   003e  NAPCCARD Cardbus Controller",
+"   0046  PowerVR PCX2 [midas]",
+"   005a  Vrc5074 [Nile 4]",
+"   0063  Firewarden",
+"   0067  PowerVR Neon 250 Chipset",
+"       1010 0020  PowerVR Neon 250 AGP 32Mb",
+"       1010 0080  PowerVR Neon 250 AGP 16Mb",
+"       1010 0088  PowerVR Neon 250 16Mb",
+"       1010 0090  PowerVR Neon 250 AGP 16Mb",
+"       1010 0098  PowerVR Neon 250 16Mb",
+"       1010 00a0  PowerVR Neon 250 AGP 32Mb",
+"       1010 00a8  PowerVR Neon 250 32Mb",
+"       1010 0120  PowerVR Neon 250 AGP 32Mb",
+"   0072  uPD72874 IEEE1394 OHCI 1.1 3-port PHY-Link Ctrlr",
+"   0074  56k Voice Modem",
+"       1033 8014  RCV56ACF 56k Voice Modem",
+"   009b  Vrc5476",
+"   00a5  VRC4173",
+"   00a6  VRC5477 AC97",
+"   00cd  IEEE 1394 [OrangeLink] Host Controller",
+"       12ee 8011  Root hub",
+"   00ce  IEEE 1394 Host Controller",
+"   00df  Vr4131",
+"   00e0  USB 2.0",
+"       12ee 7001  Root hub",
+"       14c2 0205  PTI-205N USB 2.0 Host Controller",
+"       1799 0002  Root Hub",
+"       807d 1043  PCI-USB2 (EHCI subsystem)",
+"   00e7  IEEE 1394 Host Controller",
+"   00f2  uPD72874 IEEE1394 OHCI 1.1 3-port PHY-Link Ctrlr",
+"   00f3  uPD6113x Multimedia Decoder/Processor [EMMA2]",
+"   010c  VR7701",
+"   0125  uPD720400 PCI Express - PCI/PCI-X Bridge",
+"1034  Framatome Connectors USA Inc.",
+"1035  Comp. & Comm. Research Lab",
+"1036  Future Domain Corp.",
+"   0000  TMC-18C30 [36C70]",
+"1037  Hitachi Micro Systems",
+"1038  AMP, Inc",
+"1039  Silicon Integrated Systems [SiS]",
+"   0001  Virtual PCI-to-PCI bridge (AGP)",
+"   0002  SG86C202",
+"   0003  SiS AGP Port (virtual PCI-to-PCI bridge)",
+"   0004  PCI-to-PCI bridge",
+"   0006  85C501/2/3",
+"   0008  SiS85C503/5513 (LPC Bridge)",
+"   0009  ACPI",
+"   000a  PCI-to-PCI bridge",
+"   0016  SiS961/2 SMBus Controller",
+"   0018  SiS85C503/5513 (LPC Bridge)",
+"   0180  RAID bus controller 180 SATA/PATA  [SiS]",
+"   0181  SATA",
+"   0182  182 SATA/RAID Controller",
+"   0190  190 Gigabit Ethernet Adapter",
+"   0191  191 Gigabit Ethernet Adapter",
+"   0200  5597/5598/6326 VGA",
+"       1039 0000  SiS5597 SVGA (Shared RAM)",
+"   0204  82C204",
+"   0205  SG86C205",
+"   0300  300/305 PCI/AGP VGA Display Adapter",
+"       107d 2720  Leadtek WinFast VR300",
+"   0310  315H PCI/AGP VGA Display Adapter",
+"   0315  315 PCI/AGP VGA Display Adapter",
+"   0325  315PRO PCI/AGP VGA Display Adapter",
+"   0330  330 [Xabre] PCI/AGP VGA Display Adapter",
+"   0406  85C501/2",
+"   0496  85C496",
+"   0530  530 Host",
+"   0540  540 Host",
+"   0550  550 Host",
+"   0597  5513C",
+"   0601  85C601",
+"   0620  620 Host",
+"   0630  630 Host",
+"   0633  633 Host",
+"   0635  635 Host",
+"   0645  SiS645 Host & Memory & AGP Controller",
+"   0646  SiS645DX Host & Memory & AGP Controller",
+"   0648  645xx",
+"   0650  650/M650 Host",
+"   0651  651 Host",
+"   0655  655 Host",
+"   0660  660 Host",
+"   0661  661FX/M661FX/M661MX Host",
+"   0730  730 Host",
+"   0733  733 Host",
+"   0735  735 Host",
+"   0740  740 Host",
+"   0741  741/741GX/M741 Host",
+"   0745  745 Host",
+"   0746  746 Host",
+"   0755  755 Host",
+"   0760  760/M760 Host",
+"   0761  761/M761 Host",
+"   0900  SiS900 PCI Fast Ethernet",
+"       1019 0a14  K7S5A motherboard",
+"       1039 0900  SiS900 10/100 Ethernet Adapter",
+"       1043 8035  CUSI-FX motherboard",
+"   0961  SiS961 [MuTIOL Media IO]",
+"   0962  SiS962 [MuTIOL Media IO]",
+"   0963  SiS963 [MuTIOL Media IO]",
+"   0964  SiS964 [MuTIOL Media IO]",
+"   0965  SiS965 [MuTIOL Media IO]",
+"   3602  83C602",
+"   5107  5107",
+"   5300  SiS540 PCI Display Adapter",
+"   5315  550 PCI/AGP VGA Display Adapter",
+"   5401  486 PCI Chipset",
+"   5511  5511/5512",
+"   5513  5513 [IDE]",
+"       1019 0970  P6STP-FL motherboard",
+"       1039 5513  SiS5513 EIDE Controller (A,B step)",
+"       1043 8035  CUSI-FX motherboard",
+"   5517  5517",
+"   5571  5571",
+"   5581  5581 Pentium Chipset",
+"   5582  5582",
+"   5591  5591/5592 Host",
+"   5596  5596 Pentium Chipset",
+"   5597  5597 [SiS5582]",
+"   5600  5600 Host",
+"   6204  Video decoder & MPEG interface",
+"   6205  VGA Controller",
+"   6236  6236 3D-AGP",
+"   6300  630/730 PCI/AGP VGA Display Adapter",
+"       1019 0970  P6STP-FL motherboard",
+"       1043 8035  CUSI-FX motherboard",
+"   6306  530/620 PCI/AGP VGA Display Adapter",
+"       1039 6306  SiS530,620 GUI Accelerator+3D",
+"   6325  65x/M650/740 PCI/AGP VGA Display Adapter",
+"   6326  86C326 5598/6326",
+"       1039 6326  SiS6326 GUI Accelerator",
+"       1092 0a50  SpeedStar A50",
+"       1092 0a70  SpeedStar A70",
+"       1092 4910  SpeedStar A70",
+"       1092 4920  SpeedStar A70",
+"       1569 6326  SiS6326 GUI Accelerator",
+"   6330  661/741/760/761 PCI/AGP VGA Display Adapter",
+"       1039 6330  [M]661xX/[M]741[GX]/[M]760 PCI/AGP VGA Adapter",
+"   7001  USB 1.0 Controller",
+"       1019 0a14  K7S5A motherboard",
+"       1039 7000  Onboard USB Controller",
+"       1462 5470  K7SOM+ 5.2C Motherboard",
+"   7002  USB 2.0 Controller",
+"       1509 7002  Onboard USB Controller",
+"   7007  FireWire Controller",
+"   7012  AC'97 Sound Controller",
+"       15bd 1001  DFI 661FX motherboard",
+"   7013  AC'97 Modem Controller",
+"   7016  SiS7016 PCI Fast Ethernet Adapter",
+"       1039 7016  SiS7016 10/100 Ethernet Adapter",
+"   7018  SiS PCI Audio Accelerator",
+"       1014 01b6  SiS PCI Audio Accelerator",
+"       1014 01b7  SiS PCI Audio Accelerator",
+"       1019 7018  SiS PCI Audio Accelerator",
+"       1025 000e  SiS PCI Audio Accelerator",
+"       1025 0018  SiS PCI Audio Accelerator",
+"       1039 7018  SiS PCI Audio Accelerator",
+"       1043 800b  SiS PCI Audio Accelerator",
+"       1054 7018  SiS PCI Audio Accelerator",
+"       107d 5330  SiS PCI Audio Accelerator",
+"       107d 5350  SiS PCI Audio Accelerator",
+"       1170 3209  SiS PCI Audio Accelerator",
+"       1462 400a  SiS PCI Audio Accelerator",
+"       14a4 2089  SiS PCI Audio Accelerator",
+"       14cd 2194  SiS PCI Audio Accelerator",
+"       14ff 1100  SiS PCI Audio Accelerator",
+"       152d 8808  SiS PCI Audio Accelerator",
+"       1558 1103  SiS PCI Audio Accelerator",
+"       1558 2200  SiS PCI Audio Accelerator",
+"       1563 7018  SiS PCI Audio Accelerator",
+"       15c5 0111  SiS PCI Audio Accelerator",
+"       270f a171  SiS PCI Audio Accelerator",
+"       a0a0 0022  SiS PCI Audio Accelerator",
+"   7019  SiS7019 Audio Accelerator",
+"103a  Seiko Epson Corporation",
+"103b  Tatung Co. of America",
+"103c  Hewlett-Packard Company",
+"   002a  NX9000 Notebook",
+"   1005  A4977A Visualize EG",
+"   1008  Visualize FX",
+"   1028  Tach TL Fibre Channel Host Adapter",
+"   1029  Tach XL2 Fibre Channel Host Adapter",
+"       107e 000f  Interphase 5560 Fibre Channel Adapter",
+"       9004 9210  1Gb/2Gb Family Fibre Channel Controller",
+"       9004 9211  1Gb/2Gb Family Fibre Channel Controller",
+"   102a  Tach TS Fibre Channel Host Adapter",
+"       107e 000e  Interphase 5540/5541 Fibre Channel Adapter",
+"       9004 9110  1Gb/2Gb Family Fibre Channel Controller",
+"       9004 9111  1Gb/2Gb Family Fibre Channel Controller",
+"   1030  J2585A DeskDirect 10/100VG NIC",
+"   1031  J2585B HP 10/100VG PCI LAN Adapter",
+"       103c 1040  J2973A DeskDirect 10BaseT NIC",
+"       103c 1041  J2585B DeskDirect 10/100VG NIC",
+"       103c 1042  J2970A DeskDirect 10BaseT/2 NIC",
+"   1040  J2973A DeskDirect 10BaseT NIC",
+"   1041  J2585B DeskDirect 10/100 NIC",
+"   1042  J2970A DeskDirect 10BaseT/2 NIC",
+"   1048  Diva Serial [GSP] Multiport UART",
+"       103c 1049  Tosca Console",
+"       103c 104a  Tosca Secondary",
+"       103c 104b  Maestro SP2",
+"       103c 1223  Superdome Console",
+"       103c 1226  Keystone SP2",
+"       103c 1227  Powerbar SP2",
+"       103c 1282  Everest SP2",
+"       103c 1301  Diva RMP3",
+"   1054  PCI Local Bus Adapter",
+"   1064  79C970 PCnet Ethernet Controller",
+"   108b  Visualize FXe",
+"   10c1  NetServer Smart IRQ Router",
+"   10ed  TopTools Remote Control",
+"   10f0  rio System Bus Adapter",
+"   10f1  rio I/O Controller",
+"   1200  82557B 10/100 NIC",
+"   1219  NetServer PCI Hot-Plug Controller",
+"   121a  NetServer SMIC Controller",
+"   121b  NetServer Legacy COM Port Decoder",
+"   121c  NetServer PCI COM Port Decoder",
+"   1229  zx1 System Bus Adapter",
+"   122a  zx1 I/O Controller",
+"   122e  zx1 Local Bus Adapter",
+"   127c  sx1000 I/O Controller",
+"   1290  Auxiliary Diva Serial Port",
+"   1291  Auxiliary Diva Serial Port",
+"   12b4  zx1 QuickSilver AGP8x Local Bus Adapter",
+"   12f8  Broadcom BCM4306 802.11b/g Wireless LAN",
+"   12fa  BCM4306 802.11b/g Wireless LAN Controller",
+"   2910  E2910A PCIBus Exerciser",
+"   2925  E2925A 32 Bit, 33 MHzPCI Exerciser & Analyzer",
+"   3080  Pavilion ze2028ea",
+"   3085  Realtek RTL8139/8139C/8139C+",
+"   3220  Hewlett-Packard Smart Array P600",
+"   3230  Hewlett-Packard Smart Array Controller",
+"103e  Solliday Engineering",
+"103f  Synopsys/Logic Modeling Group",
+"1040  Accelgraphics Inc.",
+"1041  Computrend",
+"1042  Micron",
+"   1000  PC Tech RZ1000",
+"   1001  PC Tech RZ1001",
+"   3000  Samurai_0",
+"   3010  Samurai_1",
+"   3020  Samurai_IDE",
+"1043  ASUSTeK Computer Inc.",
+"   0675  ISDNLink P-IN100-ST-D",
+"       0675 1704  ISDN Adapter (PCI Bus, D, C)",
+"       0675 1707  ISDN Adapter (PCI Bus, DV, W)",
+"       10cf 105e  ISDN Adapter (PCI Bus, DV, W)",
+"   0c11  A7N8X Motherboard nForce2 IDE/USB/SMBus",
+"   4015  v7100 SDRAM [GeForce2 MX]",
+"   4021  v7100 Combo Deluxe [GeForce2 MX + TV tuner]",
+"   4057  v8200 GeForce 3",
+"   8043  v8240 PAL 128M [P4T] Motherboard",
+"   807b  v9280/TD [Geforce4 TI4200 8X With TV-Out and DVI]",
+"   8095  A7N8X Motherboard nForce2 AC97 Audio",
+"   80ac  A7N8X Motherboard nForce2 AGP/Memory",
+"   80bb  v9180 Magic/T [GeForce4 MX440 AGP 8x 64MB TV-out]",
+"   80c5  nForce3 chipset motherboard [SK8N]",
+"   80df  v9520 Magic/T",
+"   8187  802.11a/b/g Wireless LAN Card",
+"   8188  Tiger Hybrid TV Capture Device",
+"1044  Adaptec (formerly DPT)",
+"   1012  Domino RAID Engine",
+"   a400  SmartCache/Raid I-IV Controller",
+"   a500  PCI Bridge",
+"   a501  SmartRAID V Controller",
+"       1044 c001  PM1554U2 Ultra2 Single Channel",
+"       1044 c002  PM1654U2 Ultra2 Single Channel",
+"       1044 c003  PM1564U3 Ultra3 Single Channel",
+"       1044 c004  PM1564U3 Ultra3 Dual Channel",
+"       1044 c005  PM1554U2 Ultra2 Single Channel (NON ACPI)",
+"       1044 c00a  PM2554U2 Ultra2 Single Channel",
+"       1044 c00b  PM2654U2 Ultra2 Single Channel",
+"       1044 c00c  PM2664U3 Ultra3 Single Channel",
+"       1044 c00d  PM2664U3 Ultra3 Dual Channel",
+"       1044 c00e  PM2554U2 Ultra2 Single Channel (NON ACPI)",
+"       1044 c00f  PM2654U2 Ultra2 Single Channel (NON ACPI)",
+"       1044 c014  PM3754U2 Ultra2 Single Channel (NON ACPI)",
+"       1044 c015  PM3755U2B Ultra2 Single Channel (NON ACPI)",
+"       1044 c016  PM3755F Fibre Channel (NON ACPI)",
+"       1044 c01e  PM3757U2 Ultra2 Single Channel",
+"       1044 c01f  PM3757U2 Ultra2 Dual Channel",
+"       1044 c020  PM3767U3 Ultra3 Dual Channel",
+"       1044 c021  PM3767U3 Ultra3 Quad Channel",
+"       1044 c028  PM2865U3 Ultra3 Single Channel",
+"       1044 c029  PM2865U3 Ultra3 Dual Channel",
+"       1044 c02a  PM2865F Fibre Channel",
+"       1044 c03c  2000S Ultra3 Single Channel",
+"       1044 c03d  2000S Ultra3 Dual Channel",
+"       1044 c03e  2000F Fibre Channel",
+"       1044 c046  3000S Ultra3 Single Channel",
+"       1044 c047  3000S Ultra3 Dual Channel",
+"       1044 c048  3000F Fibre Channel",
+"       1044 c050  5000S Ultra3 Single Channel",
+"       1044 c051  5000S Ultra3 Dual Channel",
+"       1044 c052  5000F Fibre Channel",
+"       1044 c05a  2400A UDMA Four Channel",
+"       1044 c05b  2400A UDMA Four Channel DAC",
+"       1044 c064  3010S Ultra3 Dual Channel",
+"       1044 c065  3410S Ultra160 Four Channel",
+"       1044 c066  3010S Fibre Channel",
+"   a511  SmartRAID V Controller",
+"       1044 c032  ASR-2005S I2O Zero Channel",
+"       1044 c035  ASR-2010S I2O Zero Channel",
+"1045  OPTi Inc.",
+"   a0f8  82C750 [Vendetta] USB Controller",
+"   c101  92C264",
+"   c178  92C178",
+"   c556  82X556 [Viper]",
+"   c557  82C557 [Viper-M]",
+"   c558  82C558 [Viper-M ISA+IDE]",
+"   c567  82C750 [Vendetta], device 0",
+"   c568  82C750 [Vendetta], device 1",
+"   c569  82C579 [Viper XPress+ Chipset]",
+"   c621  82C621 [Viper-M/N+]",
+"   c700  82C700 [FireStar]",
+"   c701  82C701 [FireStar Plus]",
+"   c814  82C814 [Firebridge 1]",
+"   c822  82C822",
+"   c824  82C824",
+"   c825  82C825 [Firebridge 2]",
+"   c832  82C832",
+"   c861  82C861",
+"   c895  82C895",
+"   c935  EV1935 ECTIVA MachOne PCIAudio",
+"   d568  82C825 [Firebridge 2]",
+"   d721  IDE [FireStar]",
+"1046  IPC Corporation, Ltd.",
+"1047  Genoa Systems Corp",
+"1048  Elsa AG",
+"   0c60  Gladiac MX",
+"   0d22  Quadro4 900XGL [ELSA GLoria4 900XGL]",
+"   1000  QuickStep 1000",
+"   3000  QuickStep 3000",
+"   8901  Gloria XL",
+"       1048 0935  GLoria XL (Virge)",
+"1049  Fountain Technologies, Inc.",
+"104a  STMicroelectronics",
+"   0008  STG 2000X",
+"   0009  STG 1764X",
+"   0010  STG4000 [3D Prophet Kyro Series]",
+"   0209  STPC Consumer/Industrial North- and Southbridge",
+"   020a  STPC Atlas/ConsumerS/Consumer IIA Northbridge",
+"   0210  STPC Atlas ISA Bridge",
+"   021a  STPC Consumer S Southbridge",
+"   021b  STPC Consumer IIA Southbridge",
+"   0500  ST70137 [Unicorn] ADSL DMT Transceiver",
+"   0564  STPC Client Northbridge",
+"   0981  21x4x DEC-Tulip compatible 10/100 Ethernet",
+"   1746  STG 1764X",
+"   2774  21x4x DEC-Tulip compatible 10/100 Ethernet",
+"   3520  MPEG-II decoder card",
+"   55cc  STPC Client Southbridge",
+"104b  BusLogic",
+"   0140  BT-946C (old) [multimaster  01]",
+"   1040  BT-946C (BA80C30) [MultiMaster 10]",
+"   8130  Flashpoint LT",
+"104c  Texas Instruments",
+"   0500  100 MBit LAN Controller",
+"   0508  TMS380C2X Compressor Interface",
+"   1000  Eagle i/f AS",
+"   104c  PCI1510 PC card Cardbus Controller",
+"   3d04  TVP4010 [Permedia]",
+"   3d07  TVP4020 [Permedia 2]",
+"       1011 4d10  Comet",
+"       1040 000f  AccelStar II",
+"       1040 0011  AccelStar II",
+"       1048 0a31  WINNER 2000",
+"       1048 0a32  GLoria Synergy",
+"       1048 0a34  GLoria Synergy",
+"       1048 0a35  GLoria Synergy",
+"       1048 0a36  GLoria Synergy",
+"       1048 0a43  GLoria Synergy",
+"       1048 0a44  GLoria Synergy",
+"       107d 2633  WinFast 3D L2300",
+"       1092 0127  FIRE GL 1000 PRO",
+"       1092 0136  FIRE GL 1000 PRO",
+"       1092 0141  FIRE GL 1000 PRO",
+"       1092 0146  FIRE GL 1000 PRO",
+"       1092 0148  FIRE GL 1000 PRO",
+"       1092 0149  FIRE GL 1000 PRO",
+"       1092 0152  FIRE GL 1000 PRO",
+"       1092 0154  FIRE GL 1000 PRO",
+"       1092 0155  FIRE GL 1000 PRO",
+"       1092 0156  FIRE GL 1000 PRO",
+"       1092 0157  FIRE GL 1000 PRO",
+"       1097 3d01  Jeronimo Pro",
+"       1102 100f  Graphics Blaster Extreme",
+"       3d3d 0100  Reference Permedia 2 3D",
+"   8000  PCILynx/PCILynx2 IEEE 1394 Link Layer Controller",
+"       e4bf 1010  CF1-1-SNARE",
+"       e4bf 1020  CF1-2-SNARE",
+"   8009  FireWire Controller",
+"       104d 8032  8032 OHCI i.LINK (IEEE 1394) Controller",
+"   8017  PCI4410 FireWire Controller",
+"   8019  TSB12LV23 IEEE-1394 Controller",
+"       11bd 000a  Studio DV500-1394",
+"       11bd 000e  Studio DV",
+"       e4bf 1010  CF2-1-CYMBAL",
+"   8020  TSB12LV26 IEEE-1394 Controller (Link)",
+"       11bd 000f  Studio DV500-1394",
+"   8021  TSB43AA22 IEEE-1394 Controller (PHY/Link Integrated)",
+"       104d 80df  Vaio PCG-FX403",
+"       104d 80e7  VAIO PCG-GR214EP/GR214MP/GR215MP/GR314MP/GR315MP",
+"   8022  TSB43AB22 IEEE-1394a-2000 Controller (PHY/Link)",
+"   8023  TSB43AB22/A IEEE-1394a-2000 Controller (PHY/Link)",
+"       103c 088c  NC8000 laptop",
+"       1043 808b  K8N4-E Mainboard",
+"   8024  TSB43AB23 IEEE-1394a-2000 Controller (PHY/Link)",
+"   8025  TSB82AA2 IEEE-1394b Link Layer Controller",
+"       1458 1000  GA-K8N Ultra-9 Mainboard",
+"   8026  TSB43AB21 IEEE-1394a-2000 Controller (PHY/Link)",
+"       1025 003c  Aspire 2001WLCi (Compaq CL50 motherboard)",
+"       103c 006a  NX9500",
+"       1043 808d  A7V333 mainboard.",
+"   8027  PCI4451 IEEE-1394 Controller",
+"       1028 00e6  PCI4451 IEEE-1394 Controller (Dell Inspiron 8100)",
+"   8029  PCI4510 IEEE-1394 Controller",
+"       1028 0163  Latitude D505",
+"       1028 0196  Inspiron 5160",
+"       1071 8160  MIM2900",
+"   802b  PCI7410,7510,7610 OHCI-Lynx Controller",
+"       1028 0139  Latitude D400",
+"       1028 014e  PCI7410,7510,7610 OHCI-Lynx Controller (Dell Latitude D800)",
+"   802e  PCI7x20 1394a-2000 OHCI Two-Port PHY/Link-Layer Controller",
+"   8031  PCIxx21/x515 Cardbus Controller",
+"       1025 0080  Aspire 5024WLMi",
+"       103c 099c  NX6110/NC6120",
+"       103c 308b  MX6125",
+"   8032  OHCI Compliant IEEE 1394 Host Controller",
+"       1025 0080  Aspire 5024WLMi",
+"       103c 099c  NX6110/NC6120",
+"       103c 308b  MX6125",
+"   8033  PCIxx21 Integrated FlashMedia Controller",
+"       1025 0080  Aspire 5024WLMi",
+"       103c 099c  NX6110/NC6120",
+"       103c 308b  MX6125",
+"   8034  PCI6411, PCI6421, PCI6611, PCI6621, PCI7411, PCI7421, PCI7611, PCI7621 Secure Digital (SD) Controller",
+"       1025 0080  Aspire 5024WLMi",
+"       103c 099c  NX6110/NC6120",
+"       103c 308b  MX6125",
+"   8035  PCI6411, PCI6421, PCI6611, PCI6621, PCI7411, PCI7421, PCI7611, PCI7621 Smart Card Controller (SMC)",
+"       103c 099c  NX6110/NC6120",
+"   8036  PCI6515 Cardbus Controller",
+"   8038  PCI6515 SmartCard Controller",
+"   803b  5-in-1 Multimedia Card Reader (SD/MMC/MS/MS PRO/xD)",
+"   8201  PCI1620 Firmware Loading Function",
+"   8204  PCI7410,7510,7610 PCI Firmware Loading Function",
+"       1028 0139  Latitude D400",
+"       1028 014e  Latitude D800",
+"   8231  XIO2000(A)/XIO2200 PCI Express-to-PCI Bridge",
+"   8235  XIO2200 IEEE-1394a-2000 Controller (PHY/Link)",
+"   8400  ACX 100 22Mbps Wireless Interface",
+"       1186 3b00  DWL-650+ PC Card cardbus 22Mbs Wireless Adapter [AirPlus]",
+"       1186 3b01  DWL-520+ 22Mbps PCI Wireless Adapter",
+"       16ab 8501  WL-8305 IEEE802.11b+ Wireless LAN PCI Adapter",
+"   8401  ACX 100 22Mbps Wireless Interface",
+"   9000  Wireless Interface (of unknown type)",
+"   9065  TMS320DM642",
+"   9066  ACX 111 54Mbps Wireless Interface",
+"       104c 9066  Trendnet TEW-421PC Wireless PCI Adapter",
+"       1186 3b04  DWL-G520+ Wireless PCI Adapter",
+"       1186 3b05  DWL-G650+ AirPlusG+ CardBus Wireless LAN",
+"       13d1 aba0  SWLMP-54108 108Mbps Wireless mini PCI card 802.11g+",
+"       1737 0033  WPC54G Ver.2 802.11G PC Card",
+"   a001  TDC1570",
+"   a100  TDC1561",
+"   a102  TNETA1575 HyperSAR Plus w/PCI Host i/f & UTOPIA i/f",
+"   a106  TMS320C6414 TMS320C6415 TMS320C6416",
+"       175c 5000  ASI50xx Audio Adapter",
+"       175c 6400  ASI6400 Cobranet series",
+"       175c 8700  ASI87xx Radio Tuner card",
+"   ac10  PCI1050",
+"   ac11  PCI1053",
+"   ac12  PCI1130",
+"   ac13  PCI1031",
+"   ac15  PCI1131",
+"   ac16  PCI1250",
+"       1014 0092  ThinkPad 600",
+"   ac17  PCI1220",
+"   ac18  PCI1260",
+"   ac19  PCI1221",
+"   ac1a  PCI1210",
+"   ac1b  PCI1450",
+"       0e11 b113  Armada M700",
+"       1014 0130  Thinkpad T20/T22/A21m",
+"   ac1c  PCI1225",
+"       0e11 b121  Armada E500",
+"       1028 0088  Latitude CPi A400XT",
+"   ac1d  PCI1251A",
+"   ac1e  PCI1211",
+"   ac1f  PCI1251B",
+"   ac20  TI 2030",
+"   ac21  PCI2031",
+"   ac22  PCI2032 PCI Docking Bridge",
+"   ac23  PCI2250 PCI-to-PCI Bridge",
+"   ac28  PCI2050 PCI-to-PCI Bridge",
+"   ac30  PCI1260 PC card Cardbus Controller",
+"   ac40  PCI4450 PC card Cardbus Controller",
+"   ac41  PCI4410 PC card Cardbus Controller",
+"   ac42  PCI4451 PC card Cardbus Controller",
+"       1028 00e6  PCI4451 PC card CardBus Controller (Dell Inspiron 8100)",
+"   ac44  PCI4510 PC card Cardbus Controller",
+"       1028 0163  Latitude D505",
+"       1028 0196  Inspiron 5160",
+"       1071 8160  MIM2000",
+"   ac46  PCI4520 PC card Cardbus Controller",
+"   ac47  PCI7510 PC card Cardbus Controller",
+"       1028 0139  Latitude D400",
+"       1028 013f  Precision M60",
+"       1028 014e  Latitude D800",
+"   ac4a  PCI7510,7610 PC card Cardbus Controller",
+"       1028 0139  Latitude D400",
+"       1028 014e  Latitude D800",
+"   ac50  PCI1410 PC card Cardbus Controller",
+"   ac51  PCI1420",
+"       0e11 004e  Evo N600c",
+"       1014 0148  ThinkPad A20m",
+"       1014 023b  ThinkPad T23 (2647-4MG)",
+"       1028 00b1  Latitude C600",
+"       1028 012a  Latitude C640",
+"       1033 80cd  Versa Note VXi",
+"       1095 10cf  Fujitsu-Siemens LifeBook C Series",
+"       10cf 1095  Lifebook S-4510/C6155",
+"       e4bf 1000  CP2-2-HIPHOP",
+"   ac52  PCI1451 PC card Cardbus Controller",
+"   ac53  PCI1421 PC card Cardbus Controller",
+"   ac54  PCI1620 PC Card Controller",
+"   ac55  PCI1520 PC card Cardbus Controller",
+"       1014 0512  ThinkPad T30/T40",
+"   ac56  PCI1510 PC card Cardbus Controller",
+"       1014 0528  ThinkPad R40e (2684-HVG) Cardbus Controller",
+"   ac60  PCI2040 PCI to DSP Bridge Controller",
+"       175c 5100  ASI51xx Audio Adapter",
+"       175c 6100  ASI61xx Audio Adapter",
+"       175c 6200  ASI62xx Audio Adapter",
+"       175c 8800  ASI88xx Audio Adapter",
+"   ac8d  PCI 7620",
+"   ac8e  PCI7420 CardBus Controller",
+"   ac8f  PCI7420/PCI7620 Dual Socket CardBus and Smart Card Cont. w/ 1394a-2000 OHCI Two-Port  PHY/Link-Layer Cont. and SD/MS-Pro Sockets",
+"   fe00  FireWire Host Controller",
+"   fe03  12C01A FireWire Host Controller",
+"104d  Sony Corporation",
+"   8004  DTL-H2500 [Playstation development board]",
+"   8009  CXD1947Q i.LINK Controller",
+"   8039  CXD3222 i.LINK Controller",
+"   8056  Rockwell HCF 56K modem",
+"   808a  Memory Stick Controller",
+"104e  Oak Technology, Inc",
+"   0017  OTI-64017",
+"   0107  OTI-107 [Spitfire]",
+"   0109  Video Adapter",
+"   0111  OTI-64111 [Spitfire]",
+"   0217  OTI-64217",
+"   0317  OTI-64317",
+"104f  Co-time Computer Ltd",
+"1050  Winbond Electronics Corp",
+"   0000  NE2000",
+"   0001  W83769F",
+"   0033  W89C33D 802.11 a/b/g BB/MAC",
+"   0105  W82C105",
+"   0840  W89C840",
+"       1050 0001  W89C840 Ethernet Adapter",
+"       1050 0840  W89C840 Ethernet Adapter",
+"   0940  W89C940",
+"   5a5a  W89C940F",
+"   6692  W6692",
+"       1043 1702  ISDN Adapter (PCI Bus, D, W)",
+"       1043 1703  ISDN Adapter (PCI Bus, DV, W)",
+"       1043 1707  ISDN Adapter (PCI Bus, DV, W)",
+"       144f 1702  ISDN Adapter (PCI Bus, D, W)",
+"       144f 1703  ISDN Adapter (PCI Bus, DV, W)",
+"       144f 1707  ISDN Adapter (PCI Bus, DV, W)",
+"   9921  W99200F MPEG-1 Video Encoder",
+"   9922  W99200F/W9922PF MPEG-1/2 Video Encoder",
+"   9970  W9970CF",
+"1051  Anigma, Inc.",
+"1052  ?Young Micro Systems",
+"1053  Young Micro Systems",
+"1054  Hitachi, Ltd",
+"1055  Efar Microsystems",
+"   9130  SLC90E66 [Victory66] IDE",
+"   9460  SLC90E66 [Victory66] ISA",
+"   9462  SLC90E66 [Victory66] USB",
+"   9463  SLC90E66 [Victory66] ACPI",
+"1056  ICL",
+"1057  Motorola",
+"   0001  MPC105 [Eagle]",
+"   0002  MPC106 [Grackle]",
+"   0003  MPC8240 [Kahlua]",
+"   0004  MPC107",
+"   0006  MPC8245 [Unity]",
+"   0008  MPC8540",
+"   0009  MPC8560",
+"   0100  MC145575 [HFC-PCI]",
+"   0431  KTI829c 100VG",
+"   1801  DSP56301 Digital Signal Processor",
+"       14fb 0101  Transas Radar Imitator Board [RIM]",
+"       14fb 0102  Transas Radar Imitator Board [RIM-2]",
+"       14fb 0202  Transas Radar Integrator Board [RIB-2]",
+"       14fb 0611  1 channel CAN bus Controller [CanPci-1]",
+"       14fb 0612  2 channels CAN bus Controller [CanPci-2]",
+"       14fb 0613  3 channels CAN bus Controller [CanPci-3]",
+"       14fb 0614  4 channels CAN bus Controller [CanPci-4]",
+"       14fb 0621  1 channel CAN bus Controller [CanPci2-1]",
+"       14fb 0622  2 channels CAN bus Controller [CanPci2-2]",
+"       14fb 0810  Transas VTS Radar Integrator Board [RIB-4]",
+"       175c 4200  ASI4215 Audio Adapter",
+"       175c 4300  ASI43xx Audio Adapter",
+"       175c 4400  ASI4401 Audio Adapter",
+"       ecc0 0010  Darla",
+"       ecc0 0020  Gina",
+"       ecc0 0030  Layla rev.0",
+"       ecc0 0031  Layla rev.1",
+"       ecc0 0040  Darla24 rev.0",
+"       ecc0 0041  Darla24 rev.1",
+"       ecc0 0050  Gina24 rev.0",
+"       ecc0 0051  Gina24 rev.1",
+"       ecc0 0070  Mona rev.0",
+"       ecc0 0071  Mona rev.1",
+"       ecc0 0072  Mona rev.2",
+"   18c0  MPC8265A/8266/8272",
+"   18c1  MPC8271/MPC8272",
+"   3410  DSP56361 Digital Signal Processor",
+"       ecc0 0050  Gina24 rev.0",
+"       ecc0 0051  Gina24 rev.1",
+"       ecc0 0060  Layla24",
+"       ecc0 0070  Mona rev.0",
+"       ecc0 0071  Mona rev.1",
+"       ecc0 0072  Mona rev.2",
+"       ecc0 0080  Mia rev.0",
+"       ecc0 0081  Mia rev.1",
+"       ecc0 0090  Indigo",
+"       ecc0 00a0  Indigo IO",
+"       ecc0 00b0  Indigo DJ",
+"       ecc0 0100  3G",
+"   4801  Raven",
+"   4802  Falcon",
+"   4803  Hawk",
+"   4806  CPX8216",
+"   4d68  20268",
+"   5600  SM56 PCI Modem",
+"       1057 0300  SM56 PCI Speakerphone Modem",
+"       1057 0301  SM56 PCI Voice Modem",
+"       1057 0302  SM56 PCI Fax Modem",
+"       1057 5600  SM56 PCI Voice modem",
+"       13d2 0300  SM56 PCI Speakerphone Modem",
+"       13d2 0301  SM56 PCI Voice modem",
+"       13d2 0302  SM56 PCI Fax Modem",
+"       1436 0300  SM56 PCI Speakerphone Modem",
+"       1436 0301  SM56 PCI Voice modem",
+"       1436 0302  SM56 PCI Fax Modem",
+"       144f 100c  SM56 PCI Fax Modem",
+"       1494 0300  SM56 PCI Speakerphone Modem",
+"       1494 0301  SM56 PCI Voice modem",
+"       14c8 0300  SM56 PCI Speakerphone Modem",
+"       14c8 0302  SM56 PCI Fax Modem",
+"       1668 0300  SM56 PCI Speakerphone Modem",
+"       1668 0302  SM56 PCI Fax Modem",
+"   5608  Wildcard X100P",
+"   5803  MPC5200",
+"   5806  MCF54 Coldfire",
+"   5808  MPC8220",
+"   5809  MPC5200B",
+"   6400  MPC190 Security Processor (S1 family, encryption)",
+"   6405  MPC184 Security Processor (S1 family)",
+"1058  Electronics & Telecommunications RSH",
+"1059  Teknor Industrial Computers Inc",
+"105a  Promise Technology, Inc.",
+"   0d30  PDC20265 (FastTrak100 Lite/Ultra100)",
+"       105a 4d33  Ultra100",
+"   0d38  20263",
+"       105a 4d39  Fasttrak66",
+"   1275  20275",
+"   3318  PDC20318 (SATA150 TX4)",
+"   3319  PDC20319 (FastTrak S150 TX4)",
+"       8086 3427  S875WP1-E mainboard",
+"   3371  PDC20371 (FastTrak S150 TX2plus)",
+"   3373  PDC20378 (FastTrak 378/SATA 378)",
+"       1043 80f5  K8V Deluxe/PC-DL Deluxe motherboard",
+"       1462 702e  K8T NEO FIS2R motherboard",
+"   3375  PDC20375 (SATA150 TX2plus)",
+"   3376  PDC20376 (FastTrak 376)",
+"       1043 809e  A7V8X motherboard",
+"   3515  PDC40719 [FastTrak TX4300/TX4310]",
+"   3519  PDC40519 (FastTrak TX4200)",
+"   3570  20771 (FastTrak TX2300)",
+"   3571  PDC20571 (FastTrak TX2200)",
+"   3574  PDC20579 SATAII 150 IDE Controller",
+"   3577  PDC40779 (SATA 300 779)",
+"   3d17  PDC40718 (SATA 300 TX4)",
+"   3d18  PDC20518/PDC40518 (SATAII 150 TX4)",
+"   3d73  PDC40775 (SATA 300 TX2plus)",
+"   3d75  PDC20575 (SATAII150 TX2plus)",
+"   4d30  PDC20267 (FastTrak100/Ultra100)",
+"       105a 4d33  Ultra100",
+"       105a 4d39  FastTrak100",
+"   4d33  20246",
+"       105a 4d33  20246 IDE Controller",
+"   4d38  PDC20262 (FastTrak66/Ultra66)",
+"       105a 4d30  Ultra Device on SuperTrak",
+"       105a 4d33  Ultra66",
+"       105a 4d39  FastTrak66",
+"   4d68  PDC20268 (Ultra100 TX2)",
+"       105a 4d68  Ultra100TX2",
+"   4d69  20269",
+"       105a 4d68  Ultra133TX2",
+"   5275  PDC20276 (MBFastTrak133 Lite)",
+"       1043 807e  A7V333 motherboard.",
+"       105a 0275  SuperTrak SX6000 IDE",
+"       105a 1275  MBFastTrak133 Lite (tm) Controller (RAID mode)",
+"       1458 b001  MBUltra 133",
+"   5300  DC5300",
+"   6268  PDC20270 (FastTrak100 LP/TX2/TX4)",
+"       105a 4d68  FastTrak100 TX2",
+"   6269  PDC20271 (FastTrak TX2000)",
+"       105a 6269  FastTrak TX2/TX2000",
+"   6621  PDC20621 (FastTrak S150 SX4/FastTrak SX4000 lite)",
+"   6622  PDC20621 [SATA150 SX4] 4 Channel IDE RAID Controller",
+"   6624  PDC20621 [FastTrak SX4100]",
+"   6626  PDC20618 (Ultra 618)",
+"   6629  PDC20619 (FastTrak TX4000)",
+"   7275  PDC20277 (SBFastTrak133 Lite)",
+"   8002  SATAII150 SX8",
+"105b  Foxconn International, Inc.",
+"105c  Wipro Infotech Limited",
+"105d  Number 9 Computer Company",
+"   2309  Imagine 128",
+"   2339  Imagine 128-II",
+"       105d 0000  Imagine 128 series 2 4Mb VRAM",
+"       105d 0001  Imagine 128 series 2 4Mb VRAM",
+"       105d 0002  Imagine 128 series 2 4Mb VRAM",
+"       105d 0003  Imagine 128 series 2 4Mb VRAM",
+"       105d 0004  Imagine 128 series 2 4Mb VRAM",
+"       105d 0005  Imagine 128 series 2 4Mb VRAM",
+"       105d 0006  Imagine 128 series 2 4Mb VRAM",
+"       105d 0007  Imagine 128 series 2 4Mb VRAM",
+"       105d 0008  Imagine 128 series 2e 4Mb DRAM",
+"       105d 0009  Imagine 128 series 2e 4Mb DRAM",
+"       105d 000a  Imagine 128 series 2 8Mb VRAM",
+"       105d 000b  Imagine 128 series 2 8Mb H-VRAM",
+"       11a4 000a  Barco Metheus 5 Megapixel",
+"       13cc 0000  Barco Metheus 5 Megapixel",
+"       13cc 0004  Barco Metheus 5 Megapixel",
+"       13cc 0005  Barco Metheus 5 Megapixel",
+"       13cc 0006  Barco Metheus 5 Megapixel",
+"       13cc 0008  Barco Metheus 5 Megapixel",
+"       13cc 0009  Barco Metheus 5 Megapixel",
+"       13cc 000a  Barco Metheus 5 Megapixel",
+"       13cc 000c  Barco Metheus 5 Megapixel",
+"   493d  Imagine 128 T2R [Ticket to Ride]",
+"       11a4 000a  Barco Metheus 5 Megapixel, Dual Head",
+"       11a4 000b  Barco Metheus 5 Megapixel, Dual Head",
+"       13cc 0002  Barco Metheus 4 Megapixel, Dual Head",
+"       13cc 0003  Barco Metheus 5 Megapixel, Dual Head",
+"       13cc 0007  Barco Metheus 5 Megapixel, Dual Head",
+"       13cc 0008  Barco Metheus 5 Megapixel, Dual Head",
+"       13cc 0009  Barco Metheus 5 Megapixel, Dual Head",
+"       13cc 000a  Barco Metheus 5 Megapixel, Dual Head",
+"   5348  Revolution 4",
+"       105d 0037  Revolution IV-FP AGP (For SGI 1600SW)",
+"       11a4 0028  PVS5600M",
+"       11a4 0038  PVS5600D",
+"105e  Vtech Computers Ltd",
+"105f  Infotronic America Inc",
+"1060  United Microelectronics [UMC]",
+"   0001  UM82C881",
+"   0002  UM82C886",
+"   0101  UM8673F",
+"   0881  UM8881",
+"   0886  UM8886F",
+"   0891  UM8891A",
+"   1001  UM886A",
+"   673a  UM8886BF",
+"   673b  EIDE Master/DMA",
+"   8710  UM8710",
+"   886a  UM8886A",
+"   8881  UM8881F",
+"   8886  UM8886F",
+"   888a  UM8886A",
+"   8891  UM8891A",
+"   9017  UM9017F",
+"   9018  UM9018",
+"   9026  UM9026",
+"   e881  UM8881N",
+"   e886  UM8886N",
+"   e88a  UM8886N",
+"   e891  UM8891N",
+"1061  I.I.T.",
+"   0001  AGX016",
+"   0002  IIT3204/3501",
+"1062  Maspar Computer Corp",
+"1063  Ocean Office Automation",
+"1064  Alcatel",
+"1065  Texas Microsystems",
+"1066  PicoPower Technology",
+"   0000  PT80C826",
+"   0001  PT86C521 [Vesuvius v1] Host Bridge",
+"   0002  PT86C523 [Vesuvius v3] PCI-ISA Bridge Master",
+"   0003  PT86C524 [Nile] PCI-to-PCI Bridge",
+"   0004  PT86C525 [Nile-II] PCI-to-PCI Bridge",
+"   0005  National PC87550 System Controller",
+"   8002  PT86C523 [Vesuvius v3] PCI-ISA Bridge Slave",
+"1067  Mitsubishi Electric",
+"   0301  AccelGraphics AccelECLIPSE",
+"   0304  AccelGALAXY A2100 [OEM Evans & Sutherland]",
+"   0308  Tornado 3000 [OEM Evans & Sutherland]",
+"   1002  VG500 [VolumePro Volume Rendering Accelerator]",
+"1068  Diversified Technology",
+"1069  Mylex Corporation",
+"   0001  DAC960P",
+"   0002  DAC960PD",
+"   0010  DAC960PG",
+"   0020  DAC960LA",
+"   0050  AcceleRAID 352/170/160 support Device",
+"       1069 0050  AcceleRAID 352 support Device",
+"       1069 0052  AcceleRAID 170 support Device",
+"       1069 0054  AcceleRAID 160 support Device",
+"   b166  AcceleRAID 600/500/400/Sapphire support Device",
+"       1014 0242  iSeries 2872 DASD IOA",
+"       1014 0266  Dual Channel PCI-X U320 SCSI Adapter",
+"       1014 0278  Dual Channel PCI-X U320 SCSI RAID Adapter",
+"       1014 02d3  Dual Channel PCI-X U320 SCSI Adapter",
+"       1014 02d4  Dual Channel PCI-X U320 SCSI RAID Adapter",
+"       1069 0200  AcceleRAID 400, Single Channel, PCI-X, U320, SCSI RAID",
+"       1069 0202  AcceleRAID Sapphire, Dual Channel, PCI-X, U320, SCSI RAID",
+"       1069 0204  AcceleRAID 500, Dual Channel, Low-Profile, PCI-X, U320, SCSI RAID",
+"       1069 0206  AcceleRAID 600, Dual Channel, PCI-X, U320, SCSI RAID",
+"   ba55  eXtremeRAID 1100 support Device",
+"   ba56  eXtremeRAID 2000/3000 support Device",
+"       1069 0030  eXtremeRAID 3000 support Device",
+"       1069 0040  eXtremeRAID 2000 support Device",
+"   ba57  eXtremeRAID 4000/5000 support Device",
+"       1069 0072  eXtremeRAID 5000 support Device",
+"106a  Aten Research Inc",
+"106b  Apple Computer Inc.",
+"   0001  Bandit PowerPC host bridge",
+"   0002  Grand Central I/O",
+"   0003  Control Video",
+"   0004  PlanB Video-In",
+"   0007  O'Hare I/O",
+"   000c  DOS on Mac",
+"   000e  Hydra Mac I/O",
+"   0010  Heathrow Mac I/O",
+"   0017  Paddington Mac I/O",
+"   0018  UniNorth FireWire",
+"   0019  KeyLargo USB",
+"   001e  UniNorth Internal PCI",
+"   001f  UniNorth PCI",
+"   0020  UniNorth AGP",
+"   0021  UniNorth GMAC (Sun GEM)",
+"   0022  KeyLargo Mac I/O",
+"   0024  UniNorth/Pangea GMAC (Sun GEM)",
+"   0025  KeyLargo/Pangea Mac I/O",
+"   0026  KeyLargo/Pangea USB",
+"   0027  UniNorth/Pangea AGP",
+"   0028  UniNorth/Pangea PCI",
+"   0029  UniNorth/Pangea Internal PCI",
+"   002d  UniNorth 1.5 AGP",
+"   002e  UniNorth 1.5 PCI",
+"   002f  UniNorth 1.5 Internal PCI",
+"   0030  UniNorth/Pangea FireWire",
+"   0031  UniNorth 2 FireWire",
+"       106b 5811  iBook G4 2004",
+"   0032  UniNorth 2 GMAC (Sun GEM)",
+"   0033  UniNorth 2 ATA/100",
+"   0034  UniNorth 2 AGP",
+"   0035  UniNorth 2 PCI",
+"   0036  UniNorth 2 Internal PCI",
+"   003b  UniNorth/Intrepid ATA/100",
+"   003e  KeyLargo/Intrepid Mac I/O",
+"   003f  KeyLargo/Intrepid USB",
+"   0040  K2 KeyLargo USB",
+"   0041  K2 KeyLargo Mac/IO",
+"   0042  K2 FireWire",
+"   0043  K2 ATA/100",
+"   0045  K2 HT-PCI Bridge",
+"   0046  K2 HT-PCI Bridge",
+"   0047  K2 HT-PCI Bridge",
+"   0048  K2 HT-PCI Bridge",
+"   0049  K2 HT-PCI Bridge",
+"   004b  U3 AGP",
+"   004c  K2 GMAC (Sun GEM)",
+"   004f  Shasta Mac I/O",
+"   0050  Shasta IDE",
+"   0051  Shasta (Sun GEM)",
+"   0052  Shasta Firewire",
+"   0053  Shasta PCI Bridge",
+"   0054  Shasta PCI Bridge",
+"   0055  Shasta PCI Bridge",
+"   0058  U3L AGP Bridge",
+"   0059  U3H AGP Bridge",
+"   0066  Intrepid2 AGP Bridge",
+"   0067  Intrepid2 PCI Bridge",
+"   0068  Intrepid2 PCI Bridge",
+"   0069  Intrepid2 ATA/100",
+"   006a  Intrepid2 Firewire",
+"   006b  Intrepid2 GMAC (Sun GEM)",
+"   1645  Tigon3 Gigabit Ethernet NIC (BCM5701)",
+"106c  Hynix Semiconductor",
+"   8801  Dual Pentium ISA/PCI Motherboard",
+"   8802  PowerPC ISA/PCI Motherboard",
+"   8803  Dual Window Graphics Accelerator",
+"   8804  LAN Controller",
+"   8805  100-BaseT LAN",
+"106d  Sequent Computer Systems",
+"106e  DFI, Inc",
+"106f  City Gate Development Ltd",
+"1070  Daewoo Telecom Ltd",
+"1071  Mitac",
+"   8160  Mitac 8060B Mobile Platform",
+"1072  GIT Co Ltd",
+"1073  Yamaha Corporation",
+"   0001  3D GUI Accelerator",
+"   0002  YGV615 [RPA3 3D-Graphics Controller]",
+"   0003  YMF-740",
+"   0004  YMF-724",
+"       1073 0004  YMF724-Based PCI Audio Adapter",
+"   0005  DS1 Audio",
+"       1073 0005  DS-XG PCI Audio CODEC",
+"   0006  DS1 Audio",
+"   0008  DS1 Audio",
+"       1073 0008  DS-XG PCI Audio CODEC",
+"   000a  DS1L Audio",
+"       1073 0004  DS-XG PCI Audio CODEC",
+"       1073 000a  DS-XG PCI Audio CODEC",
+"   000c  YMF-740C [DS-1L Audio Controller]",
+"       107a 000c  DS-XG PCI Audio CODEC",
+"   000d  YMF-724F [DS-1 Audio Controller]",
+"       1073 000d  DS-XG PCI Audio CODEC",
+"   0010  YMF-744B [DS-1S Audio Controller]",
+"       1073 0006  DS-XG PCI Audio CODEC",
+"       1073 0010  DS-XG PCI Audio CODEC",
+"   0012  YMF-754 [DS-1E Audio Controller]",
+"       1073 0012  DS-XG PCI Audio Codec",
+"   0020  DS-1 Audio",
+"   2000  DS2416 Digital Mixing Card",
+"       1073 2000  DS2416 Digital Mixing Card",
+"1074  NexGen Microsystems",
+"   4e78  82c500/1",
+"1075  Advanced Integrations Research",
+"1076  Chaintech Computer Co. Ltd",
+"1077  QLogic Corp.",
+"   1016  ISP10160 Single Channel Ultra3 SCSI Processor",
+"   1020  ISP1020 Fast-wide SCSI",
+"   1022  ISP1022 Fast-wide SCSI",
+"   1080  ISP1080 SCSI Host Adapter",
+"   1216  ISP12160 Dual Channel Ultra3 SCSI Processor",
+"       101e 8471  QLA12160 on AMI MegaRAID",
+"       101e 8493  QLA12160 on AMI MegaRAID",
+"   1240  ISP1240 SCSI Host Adapter",
+"   1280  ISP1280 SCSI Host Adapter",
+"   2020  ISP2020A Fast!SCSI Basic Adapter",
+"   2100  QLA2100 64-bit Fibre Channel Adapter",
+"       1077 0001  QLA2100 64-bit Fibre Channel Adapter",
+"   2200  QLA2200 64-bit Fibre Channel Adapter",
+"       1077 0002  QLA2200",
+"   2300  QLA2300 64-bit Fibre Channel Adapter",
+"   2312  QLA2312 Fibre Channel Adapter",
+"   2322  QLA2322 Fibre Channel Adapter",
+"   2422  QLA2422 Fibre Channel Adapter",
+"   2432  QLA2432 Fibre Channel Adapter",
+"   3010  QLA3010 Network Adapter",
+"   3022  QLA3022 Network Adapter",
+"   4010  QLA4010 iSCSI TOE Adapter",
+"   4022  QLA4022 iSCSI TOE Adapter",
+"   6312  QLA6312 Fibre Channel Adapter",
+"   6322  QLA6322 Fibre Channel Adapter",
+"1078  Cyrix Corporation",
+"   0000  5510 [Grappa]",
+"   0001  PCI Master",
+"   0002  5520 [Cognac]",
+"   0100  5530 Legacy [Kahlua]",
+"   0101  5530 SMI [Kahlua]",
+"   0102  5530 IDE [Kahlua]",
+"   0103  5530 Audio [Kahlua]",
+"   0104  5530 Video [Kahlua]",
+"   0400  ZFMicro PCI Bridge",
+"   0401  ZFMicro Chipset SMI",
+"   0402  ZFMicro Chipset IDE",
+"   0403  ZFMicro Expansion Bus",
+"1079  I-Bus",
+"107a  NetWorth",
+"107b  Gateway 2000",
+"107c  LG Electronics [Lucky Goldstar Co. Ltd]",
+"107d  LeadTek Research Inc.",
+"   0000  P86C850",
+"   204d  [GeForce 7800 GTX] Winfast PX7800 GTX TDH",
+"   2134  WinFast 3D S320 II",
+"   2971  [GeForce FX 5900] WinFast A350 TDH MyViVo",
+"107e  Interphase Corporation",
+"   0001  5515 ATM Adapter [Flipper]",
+"   0002  100 VG AnyLan Controller",
+"   0004  5526 Fibre Channel Host Adapter",
+"   0005  x526 Fibre Channel Host Adapter",
+"   0008  5525/5575 ATM Adapter (155 Mbit) [Atlantic]",
+"   9003  5535-4P-BRI-ST",
+"   9007  5535-4P-BRI-U",
+"   9008  5535-1P-SR",
+"   900c  5535-1P-SR-ST",
+"   900e  5535-1P-SR-U",
+"   9011  5535-1P-PRI",
+"   9013  5535-2P-PRI",
+"   9023  5536-4P-BRI-ST",
+"   9027  5536-4P-BRI-U",
+"   9031  5536-1P-PRI",
+"   9033  5536-2P-PRI",
+"107f  Data Technology Corporation",
+"   0802  SL82C105",
+"1080  Contaq Microsystems",
+"   0600  82C599",
+"   c691  Cypress CY82C691",
+"   c693  82c693",
+"1081  Supermac Technology",
+"   0d47  Radius PCI to NuBUS Bridge",
+"1082  EFA Corporation of America",
+"1083  Forex Computer Corporation",
+"   0001  FR710",
+"1084  Parador",
+"1085  Tulip Computers Int.B.V.",
+"1086  J. Bond Computer Systems",
+"1087  Cache Computer",
+"1088  Microcomputer Systems (M) Son",
+"1089  Data General Corporation",
+"108a  SBS Technologies",
+"   0001  VME Bridge Model 617",
+"   0010  VME Bridge Model 618",
+"   0040  dataBLIZZARD",
+"   3000  VME Bridge Model 2706",
+"108c  Oakleigh Systems Inc.",
+"108d  Olicom",
+"   0001  Token-Ring 16/4 PCI Adapter (3136/3137)",
+"   0002  16/4 Token Ring",
+"   0004  RapidFire 3139 Token-Ring 16/4 PCI Adapter",
+"       108d 0004  OC-3139/3140 RapidFire Token-Ring 16/4 Adapter",
+"   0005  GoCard 3250 Token-Ring 16/4 CardBus PC Card",
+"   0006  OC-3530 RapidFire Token-Ring 100",
+"   0007  RapidFire 3141 Token-Ring 16/4 PCI Fiber Adapter",
+"       108d 0007  OC-3141 RapidFire Token-Ring 16/4 Adapter",
+"   0008  RapidFire 3540 HSTR 100/16/4 PCI Adapter",
+"       108d 0008  OC-3540 RapidFire HSTR 100/16/4 Adapter",
+"   0011  OC-2315",
+"   0012  OC-2325",
+"   0013  OC-2183/2185",
+"   0014  OC-2326",
+"   0019  OC-2327/2250 10/100 Ethernet Adapter",
+"       108d 0016  OC-2327 Rapidfire 10/100 Ethernet Adapter",
+"       108d 0017  OC-2250 GoCard 10/100 Ethernet Adapter",
+"   0021  OC-6151/6152 [RapidFire ATM 155]",
+"   0022  ATM Adapter",
+"108e  Sun Microsystems Computer Corp.",
+"   0001  EBUS",
+"   1000  EBUS",
+"   1001  Happy Meal",
+"   1100  RIO EBUS",
+"   1101  RIO GEM",
+"   1102  RIO 1394",
+"   1103  RIO USB",
+"   1648  [bge] Gigabit Ethernet",
+"   2bad  GEM",
+"   5000  Simba Advanced PCI Bridge",
+"   5043  SunPCI Co-processor",
+"   8000  Psycho PCI Bus Module",
+"   8001  Schizo PCI Bus Module",
+"   8002  Schizo+ PCI Bus Module",
+"   a000  Ultra IIi",
+"   a001  Ultra IIe",
+"   a801  Tomatillo PCI Bus Module",
+"   abba  Cassini 10/100/1000",
+"108f  Systemsoft",
+"1090  Compro Computer Services, Inc.",
+"1091  Intergraph Corporation",
+"   0020  3D graphics processor",
+"   0021  3D graphics processor w/Texturing",
+"   0040  3D graphics frame buffer",
+"   0041  3D graphics frame buffer",
+"   0060  Proprietary bus bridge",
+"   00e4  Powerstorm 4D50T",
+"   0720  Motion JPEG codec",
+"   07a0  Sun Expert3D-Lite Graphics Accelerator",
+"   1091  Sun Expert3D Graphics Accelerator",
+"1092  Diamond Multimedia Systems",
+"   00a0  Speedstar Pro SE",
+"   00a8  Speedstar 64",
+"   0550  Viper V550",
+"   08d4  Supra 2260 Modem",
+"   094c  SupraExpress 56i Pro",
+"   1092  Viper V330",
+"   6120  Maximum DVD",
+"   8810  Stealth SE",
+"   8811  Stealth 64/SE",
+"   8880  Stealth",
+"   8881  Stealth",
+"   88b0  Stealth 64",
+"   88b1  Stealth 64",
+"   88c0  Stealth 64",
+"   88c1  Stealth 64",
+"   88d0  Stealth 64",
+"   88d1  Stealth 64",
+"   88f0  Stealth 64",
+"   88f1  Stealth 64",
+"   9999  DMD-I0928-1 'Monster sound' sound chip",
+"1093  National Instruments",
+"   0160  PCI-DIO-96",
+"   0162  PCI-MIO-16XE-50",
+"   1150  PCI-DIO-32HS High Speed Digital I/O Board",
+"   1170  PCI-MIO-16XE-10",
+"   1180  PCI-MIO-16E-1",
+"   1190  PCI-MIO-16E-4",
+"   1310  PCI-6602",
+"   1330  PCI-6031E",
+"   1350  PCI-6071E",
+"   14e0  PCI-6110",
+"   14f0  PCI-6111",
+"   17d0  PCI-6503",
+"   1870  PCI-6713",
+"   1880  PCI-6711",
+"   18b0  PCI-6052E",
+"   2410  PCI-6733",
+"   2890  PCI-6036E",
+"   2a60  PCI-6023E",
+"   2a70  PCI-6024E",
+"   2a80  PCI-6025E",
+"   2c80  PCI-6035E",
+"   2ca0  PCI-6034E",
+"   70a9  PCI-6528 (Digital I/O at 60V)",
+"   70b8  PCI-6251 [M Series - High Speed Multifunction DAQ]",
+"   b001  IMAQ-PCI-1408",
+"   b011  IMAQ-PXI-1408",
+"   b021  IMAQ-PCI-1424",
+"   b031  IMAQ-PCI-1413",
+"   b041  IMAQ-PCI-1407",
+"   b051  IMAQ-PXI-1407",
+"   b061  IMAQ-PCI-1411",
+"   b071  IMAQ-PCI-1422",
+"   b081  IMAQ-PXI-1422",
+"   b091  IMAQ-PXI-1411",
+"   c801  PCI-GPIB",
+"   c831  PCI-GPIB bridge",
+"1094  First International Computers [FIC]",
+"1095  Silicon Image, Inc.",
+"   0240  Adaptec AAR-1210SA SATA HostRAID Controller",
+"   0640  PCI0640",
+"   0643  PCI0643",
+"   0646  PCI0646",
+"   0647  PCI0647",
+"   0648  PCI0648",
+"       1043 8025  CUBX motherboard",
+"   0649  SiI 0649 Ultra ATA/100 PCI to ATA Host Controller",
+"       0e11 005d  Integrated Ultra ATA-100 Dual Channel Controller",
+"       0e11 007e  Integrated Ultra ATA-100 IDE RAID Controller",
+"       101e 0649  AMI MegaRAID IDE 100 Controller",
+"   0650  PBC0650A",
+"   0670  USB0670",
+"       1095 0670  USB0670",
+"   0673  USB0673",
+"   0680  PCI0680 Ultra ATA-133 Host Controller",
+"       1095 3680  Winic W-680 (Silicon Image 680 based)",
+"   3112  SiI 3112 [SATALink/SATARaid] Serial ATA Controller",
+"       1095 3112  SiI 3112 SATALink Controller",
+"       1095 6112  SiI 3112 SATARaid Controller",
+"       9005 0250  SATAConnect 1205SA Host Controller",
+"   3114  SiI 3114 [SATALink/SATARaid] Serial ATA Controller",
+"       1095 3114  SiI 3114 SATALink Controller",
+"       1095 6114  SiI 3114 SATARaid Controller",
+"   3124  SiI 3124 PCI-X Serial ATA Controller",
+"       1095 3124  SiI 3124 PCI-X Serial ATA Controller",
+"   3132  SiI 3132 Serial ATA Raid II Controller",
+"   3512  SiI 3512 [SATALink/SATARaid] Serial ATA Controller",
+"       1095 3512  SiI 3512 SATALink Controller",
+"       1095 6512  SiI 3512 SATARaid Controller",
+"1096  Alacron",
+"1097  Appian Technology",
+"1098  Quantum Designs (H.K.) Ltd",
+"   0001  QD-8500",
+"   0002  QD-8580",
+"1099  Samsung Electronics Co., Ltd",
+"109a  Packard Bell",
+"109b  Gemlight Computer Ltd.",
+"109c  Megachips Corporation",
+"109d  Zida Technologies Ltd.",
+"109e  Brooktree Corporation",
+"   032e  Bt878 Video Capture",
+"   0350  Bt848 Video Capture",
+"   0351  Bt849A Video capture",
+"   0369  Bt878 Video Capture",
+"       1002 0001  TV-Wonder",
+"       1002 0003  TV-Wonder/VE",
+"   036c  Bt879(??) Video Capture",
+"       13e9 0070  Win/TV (Video Section)",
+"   036e  Bt878 Video Capture",
+"       0070 13eb  WinTV Series",
+"       0070 ff01  Viewcast Osprey 200",
+"       0071 0101  DigiTV PCI",
+"       107d 6606  WinFast TV 2000",
+"       11bd 0012  PCTV pro (TV + FM stereo receiver)",
+"       11bd 001c  PCTV Sat (DBC receiver)",
+"       127a 0001  Bt878 Mediastream Controller NTSC",
+"       127a 0002  Bt878 Mediastream Controller PAL BG",
+"       127a 0003  Bt878a Mediastream Controller PAL BG",
+"       127a 0048  Bt878/832 Mediastream Controller",
+"       144f 3000  MagicTView CPH060 - Video",
+"       1461 0002  TV98 Series (TV/No FM/Remote)",
+"       1461 0003  AverMedia UltraTV PCI 350",
+"       1461 0004  AVerTV WDM Video Capture",
+"       1461 0761  AverTV DVB-T",
+"       14f1 0001  Bt878 Mediastream Controller NTSC",
+"       14f1 0002  Bt878 Mediastream Controller PAL BG",
+"       14f1 0003  Bt878a Mediastream Controller PAL BG",
+"       14f1 0048  Bt878/832 Mediastream Controller",
+"       1822 0001  VisionPlus DVB card",
+"       1851 1850  FlyVideo'98 - Video",
+"       1851 1851  FlyVideo II",
+"       1852 1852  FlyVideo'98 - Video (with FM Tuner)",
+"       18ac d500  DViCO FusionHDTV5 Lite",
+"       270f fc00  Digitop DTT-1000",
+"       bd11 1200  PCTV pro (TV + FM stereo receiver)",
+"   036f  Bt879 Video Capture",
+"       127a 0044  Bt879 Video Capture NTSC",
+"       127a 0122  Bt879 Video Capture PAL I",
+"       127a 0144  Bt879 Video Capture NTSC",
+"       127a 0222  Bt879 Video Capture PAL BG",
+"       127a 0244  Bt879a Video Capture NTSC",
+"       127a 0322  Bt879 Video Capture NTSC",
+"       127a 0422  Bt879 Video Capture NTSC",
+"       127a 1122  Bt879 Video Capture PAL I",
+"       127a 1222  Bt879 Video Capture PAL BG",
+"       127a 1322  Bt879 Video Capture NTSC",
+"       127a 1522  Bt879a Video Capture PAL I",
+"       127a 1622  Bt879a Video Capture PAL BG",
+"       127a 1722  Bt879a Video Capture NTSC",
+"       14f1 0044  Bt879 Video Capture NTSC",
+"       14f1 0122  Bt879 Video Capture PAL I",
+"       14f1 0144  Bt879 Video Capture NTSC",
+"       14f1 0222  Bt879 Video Capture PAL BG",
+"       14f1 0244  Bt879a Video Capture NTSC",
+"       14f1 0322  Bt879 Video Capture NTSC",
+"       14f1 0422  Bt879 Video Capture NTSC",
+"       14f1 1122  Bt879 Video Capture PAL I",
+"       14f1 1222  Bt879 Video Capture PAL BG",
+"       14f1 1322  Bt879 Video Capture NTSC",
+"       14f1 1522  Bt879a Video Capture PAL I",
+"       14f1 1622  Bt879a Video Capture PAL BG",
+"       14f1 1722  Bt879a Video Capture NTSC",
+"       1851 1850  FlyVideo'98 - Video",
+"       1851 1851  FlyVideo II",
+"       1852 1852  FlyVideo'98 - Video (with FM Tuner)",
+"   0370  Bt880 Video Capture",
+"       1851 1850  FlyVideo'98",
+"       1851 1851  FlyVideo'98 EZ - video",
+"       1852 1852  FlyVideo'98 (with FM Tuner)",
+"   0878  Bt878 Audio Capture",
+"       0070 13eb  WinTV Series",
+"       0070 ff01  Viewcast Osprey 200",
+"       0071 0101  DigiTV PCI",
+"       1002 0001  TV-Wonder",
+"       1002 0003  TV-Wonder/VE",
+"       11bd 0012  PCTV pro (TV + FM stereo receiver, audio section)",
+"       11bd 001c  PCTV Sat (DBC receiver)",
+"       127a 0001  Bt878 Video Capture (Audio Section)",
+"       127a 0002  Bt878 Video Capture (Audio Section)",
+"       127a 0003  Bt878 Video Capture (Audio Section)",
+"       127a 0048  Bt878 Video Capture (Audio Section)",
+"       13e9 0070  Win/TV (Audio Section)",
+"       144f 3000  MagicTView CPH060 - Audio",
+"       1461 0002  Avermedia PCTV98 Audio Capture",
+"       1461 0004  AVerTV WDM Audio Capture",
+"       1461 0761  AVerTV DVB-T",
+"       14f1 0001  Bt878 Video Capture (Audio Section)",
+"       14f1 0002  Bt878 Video Capture (Audio Section)",
+"       14f1 0003  Bt878 Video Capture (Audio Section)",
+"       14f1 0048  Bt878 Video Capture (Audio Section)",
+"       1822 0001  VisionPlus DVB Card",
+"       18ac d500  DViCO FusionHDTV5 Lite",
+"       270f fc00  Digitop DTT-1000",
+"       bd11 1200  PCTV pro (TV + FM stereo receiver, audio section)",
+"   0879  Bt879 Audio Capture",
+"       127a 0044  Bt879 Video Capture (Audio Section)",
+"       127a 0122  Bt879 Video Capture (Audio Section)",
+"       127a 0144  Bt879 Video Capture (Audio Section)",
+"       127a 0222  Bt879 Video Capture (Audio Section)",
+"       127a 0244  Bt879 Video Capture (Audio Section)",
+"       127a 0322  Bt879 Video Capture (Audio Section)",
+"       127a 0422  Bt879 Video Capture (Audio Section)",
+"       127a 1122  Bt879 Video Capture (Audio Section)",
+"       127a 1222  Bt879 Video Capture (Audio Section)",
+"       127a 1322  Bt879 Video Capture (Audio Section)",
+"       127a 1522  Bt879 Video Capture (Audio Section)",
+"       127a 1622  Bt879 Video Capture (Audio Section)",
+"       127a 1722  Bt879 Video Capture (Audio Section)",
+"       14f1 0044  Bt879 Video Capture (Audio Section)",
+"       14f1 0122  Bt879 Video Capture (Audio Section)",
+"       14f1 0144  Bt879 Video Capture (Audio Section)",
+"       14f1 0222  Bt879 Video Capture (Audio Section)",
+"       14f1 0244  Bt879 Video Capture (Audio Section)",
+"       14f1 0322  Bt879 Video Capture (Audio Section)",
+"       14f1 0422  Bt879 Video Capture (Audio Section)",
+"       14f1 1122  Bt879 Video Capture (Audio Section)",
+"       14f1 1222  Bt879 Video Capture (Audio Section)",
+"       14f1 1322  Bt879 Video Capture (Audio Section)",
+"       14f1 1522  Bt879 Video Capture (Audio Section)",
+"       14f1 1622  Bt879 Video Capture (Audio Section)",
+"       14f1 1722  Bt879 Video Capture (Audio Section)",
+"   0880  Bt880 Audio Capture",
+"   2115  BtV 2115 Mediastream controller",
+"   2125  BtV 2125 Mediastream controller",
+"   2164  BtV 2164",
+"   2165  BtV 2165",
+"   8230  Bt8230 ATM Segment/Reassembly Ctrlr (SRC)",
+"   8472  Bt8472",
+"   8474  Bt8474",
+"109f  Trigem Computer Inc.",
+"10a0  Meidensha Corporation",
+"10a1  Juko Electronics Ind. Co. Ltd",
+"10a2  Quantum Corporation",
+"10a3  Everex Systems Inc",
+"10a4  Globe Manufacturing Sales",
+"10a5  Smart Link Ltd.",
+"   3052  SmartPCI562 56K Modem",
+"   5449  SmartPCI561 modem",
+"10a6  Informtech Industrial Ltd.",
+"10a7  Benchmarq Microelectronics",
+"10a8  Sierra Semiconductor",
+"   0000  STB Horizon 64",
+"10a9  Silicon Graphics, Inc.",
+"   0001  Crosstalk to PCI Bridge",
+"   0002  Linc I/O controller",
+"   0003  IOC3 I/O controller",
+"   0004  O2 MACE",
+"   0005  RAD Audio",
+"   0006  HPCEX",
+"   0007  RPCEX",
+"   0008  DiVO VIP",
+"   0009  AceNIC Gigabit Ethernet",
+"       10a9 8002  AceNIC Gigabit Ethernet",
+"   0010  AMP Video I/O",
+"   0011  GRIP",
+"   0012  SGH PSHAC GSN",
+"   1001  Magic Carpet",
+"   1002  Lithium",
+"   1003  Dual JPEG 1",
+"   1004  Dual JPEG 2",
+"   1005  Dual JPEG 3",
+"   1006  Dual JPEG 4",
+"   1007  Dual JPEG 5",
+"   1008  Cesium",
+"   100a  IOC4 I/O controller",
+"   2001  Fibre Channel",
+"   2002  ASDE",
+"   4001  TIO-CE PCI Express Bridge",
+"   4002  TIO-CE PCI Express Port",
+"   8001  O2 1394",
+"   8002  G-net NT",
+"   8010  Broadcom e-net [SGI IO9/IO10 BaseIO]",
+"   8018  Broadcom e-net [SGI A330 Server BaseIO]",
+"10aa  ACC Microelectronics",
+"   0000  ACCM 2188",
+"10ab  Digicom",
+"10ac  Honeywell IAC",
+"10ad  Symphony Labs",
+"   0001  W83769F",
+"   0003  SL82C103",
+"   0005  SL82C105",
+"   0103  SL82c103",
+"   0105  SL82c105",
+"   0565  W83C553",
+"10ae  Cornerstone Technology",
+"10af  Micro Computer Systems Inc",
+"10b0  CardExpert Technology",
+"10b1  Cabletron Systems Inc",
+"10b2  Raytheon Company",
+"10b3  Databook Inc",
+"   3106  DB87144",
+"   b106  DB87144",
+"10b4  STB Systems Inc",
+"   1b1d  Velocity 128 3D",
+"       10b4 237e  Velocity 4400",
+"10b5  PLX Technology, Inc.",
+"   0001  i960 PCI bus interface",
+"   1042  Brandywine / jxi2, Inc. - PMC-SyncClock32, IRIG A & B, Nasa 36",
+"   1076  VScom 800 8 port serial adaptor",
+"   1077  VScom 400 4 port serial adaptor",
+"   1078  VScom 210 2 port serial and 1 port parallel adaptor",
+"   1103  VScom 200 2 port serial adaptor",
+"   1146  VScom 010 1 port parallel adaptor",
+"   1147  VScom 020 2 port parallel adaptor",
+"   2540  IXXAT CAN-Interface PC-I 04/PCI",
+"   2724  Thales PCSM Security Card",
+"   6540  PCI6540/6466 PCI-PCI bridge (transparent mode)",
+"       4c53 10e0  PSL09 PrPMC",
+"   6541  PCI6540/6466 PCI-PCI bridge (non-transparent mode, primary side)",
+"       4c53 10e0  PSL09 PrPMC",
+"   6542  PCI6540/6466 PCI-PCI bridge (non-transparent mode, secondary side)",
+"       4c53 10e0  PSL09 PrPMC",
+"   8111  PEX 8111 PCI Express-to-PCI Bridge",
+"   8114  PEX 8114 PCI Express-to-PCI/PCI-X Bridge",
+"   8516  PEX 8516  Versatile PCI Express Switch",
+"   8532  PEX 8532  Versatile PCI Express Switch",
+"   9030  PCI <-> IOBus Bridge Hot Swap",
+"       10b5 2862  Alpermann+Velte PCL PCI LV (3V/5V): Timecode Reader Board",
+"       10b5 2906  Alpermann+Velte PCI TS (3V/5V): Time Synchronisation Board",
+"       10b5 2940  Alpermann+Velte PCL PCI D (3V/5V): Timecode Reader Board",
+"       10b5 2977  IXXAT iPC-I XC16/PCI CAN Board",
+"       10b5 2978  SH ARC-PCIu SOHARD ARCNET card",
+"       10b5 3025  Alpermann+Velte PCL PCI L (3V/5V): Timecode Reader Board",
+"       10b5 3068  Alpermann+Velte PCL PCI HD (3V/5V): Timecode Reader Board",
+"       1397 3136  4xS0-ISDN PCI Adapter",
+"       1397 3137  S2M-E1-ISDN PCI Adapter",
+"       1518 0200  Kontron ThinkIO-C",
+"       15ed 1002  MCCS 8-port Serial Hot Swap",
+"       15ed 1003  MCCS 16-port Serial Hot Swap",
+"   9036  9036",
+"   9050  PCI <-> IOBus Bridge",
+"       10b5 1067  IXXAT CAN i165",
+"       10b5 1172  IK220 (Heidenhain)",
+"       10b5 2036  SatPak GPS",
+"       10b5 2221  Alpermann+Velte PCL PCI LV: Timecode Reader Board",
+"       10b5 2273  SH ARC-PCI SOHARD ARCNET card",
+"       10b5 2431  Alpermann+Velte PCL PCI D: Timecode Reader Board",
+"       10b5 2905  Alpermann+Velte PCI TS: Time Synchronisation Board",
+"       10b5 9050  MP9050",
+"       1498 0362  TPMC866 8 Channel Serial Card",
+"       1522 0001  RockForce 4 Port V.90 Data/Fax/Voice Modem",
+"       1522 0002  RockForce 2 Port V.90 Data/Fax/Voice Modem",
+"       1522 0003  RockForce 6 Port V.90 Data/Fax/Voice Modem",
+"       1522 0004  RockForce 8 Port V.90 Data/Fax/Voice Modem",
+"       1522 0010  RockForce2000 4 Port V.90 Data/Fax/Voice Modem",
+"       1522 0020  RockForce2000 2 Port V.90 Data/Fax/Voice Modem",
+"       15ed 1000  Macrolink MCCS 8-port Serial",
+"       15ed 1001  Macrolink MCCS 16-port Serial",
+"       15ed 1002  Macrolink MCCS 8-port Serial Hot Swap",
+"       15ed 1003  Macrolink MCCS 16-port Serial Hot Swap",
+"       5654 2036  OpenSwitch 6 Telephony card",
+"       5654 3132  OpenSwitch 12 Telephony card",
+"       5654 5634  OpenLine4 Telephony Card",
+"       d531 c002  PCIntelliCAN 2xSJA1000 CAN bus",
+"       d84d 4006  EX-4006 1P",
+"       d84d 4008  EX-4008 1P EPP/ECP",
+"       d84d 4014  EX-4014 2P",
+"       d84d 4018  EX-4018 3P EPP/ECP",
+"       d84d 4025  EX-4025 1S(16C550) RS-232",
+"       d84d 4027  EX-4027 1S(16C650) RS-232",
+"       d84d 4028  EX-4028 1S(16C850) RS-232",
+"       d84d 4036  EX-4036 2S(16C650) RS-232",
+"       d84d 4037  EX-4037 2S(16C650) RS-232",
+"       d84d 4038  EX-4038 2S(16C850) RS-232",
+"       d84d 4052  EX-4052 1S(16C550) RS-422/485",
+"       d84d 4053  EX-4053 2S(16C550) RS-422/485",
+"       d84d 4055  EX-4055 4S(16C550) RS-232",
+"       d84d 4058  EX-4055 4S(16C650) RS-232",
+"       d84d 4065  EX-4065 8S(16C550) RS-232",
+"       d84d 4068  EX-4068 8S(16C650) RS-232",
+"       d84d 4078  EX-4078 2S(16C552) RS-232+1P",
+"   9054  PCI <-> IOBus Bridge",
+"       10b5 2455  Wessex Techology PHIL-PCI",
+"       10b5 2696  Innes Corp AM Radcap card",
+"       10b5 2717  Innes Corp Auricon card",
+"       10b5 2844  Innes Corp TVS Encoder card",
+"       12c7 4001  Intel Dialogic DM/V960-4T1 PCI",
+"       12d9 0002  PCI Prosody Card rev 1.5",
+"       16df 0011  PIKA PrimeNet MM PCI",
+"       16df 0012  PIKA PrimeNet MM cPCI 8",
+"       16df 0013  PIKA PrimeNet MM cPCI 8 (without CAS Signaling)",
+"       16df 0014  PIKA PrimeNet MM cPCI 4",
+"       16df 0015  PIKA Daytona MM",
+"       16df 0016  PIKA InLine MM",
+"   9056  Francois",
+"       10b5 2979  CellinkBlade 11 - CPCI board VoATM AAL1",
+"   9060  9060",
+"   906d  9060SD",
+"       125c 0640  Aries 16000P",
+"   906e  9060ES",
+"   9080  9080",
+"       103c 10eb  (Agilent) E2777B 83K Series Optical Communication Interface",
+"       103c 10ec  (Agilent) E6978-66442 PCI CIC",
+"       10b5 9080  9080 [real subsystem ID not set]",
+"       129d 0002  Aculab PCI Prosidy card",
+"       12d9 0002  PCI Prosody Card",
+"       12df 4422  4422PCI ['Do-All' Telemetry Data Aquisition System]",
+"   bb04  B&B 3PCIOSD1A Isolated PCI Serial",
+"10b6  Madge Networks",
+"   0001  Smart 16/4 PCI Ringnode",
+"   0002  Smart 16/4 PCI Ringnode Mk2",
+"       10b6 0002  Smart 16/4 PCI Ringnode Mk2",
+"       10b6 0006  16/4 CardBus Adapter",
+"   0003  Smart 16/4 PCI Ringnode Mk3",
+"       0e11 b0fd  Compaq NC4621 PCI, 4/16, WOL",
+"       10b6 0003  Smart 16/4 PCI Ringnode Mk3",
+"       10b6 0007  Presto PCI Plus Adapter",
+"   0004  Smart 16/4 PCI Ringnode Mk1",
+"   0006  16/4 Cardbus Adapter",
+"       10b6 0006  16/4 CardBus Adapter",
+"   0007  Presto PCI Adapter",
+"       10b6 0007  Presto PCI",
+"   0009  Smart 100/16/4 PCI-HS Ringnode",
+"       10b6 0009  Smart 100/16/4 PCI-HS Ringnode",
+"   000a  Smart 100/16/4 PCI Ringnode",
+"       10b6 000a  Smart 100/16/4 PCI Ringnode",
+"   000b  16/4 CardBus Adapter Mk2",
+"       10b6 0008  16/4 CardBus Adapter Mk2",
+"       10b6 000b  16/4 Cardbus Adapter Mk2",
+"   000c  RapidFire 3140V2 16/4 TR Adapter",
+"       10b6 000c  RapidFire 3140V2 16/4 TR Adapter",
+"   1000  Collage 25/155 ATM Client Adapter",
+"   1001  Collage 155 ATM Server Adapter",
+"10b7  3Com Corporation",
+"   0001  3c985 1000BaseSX (SX/TX)",
+"   0013  AR5212 802.11abg NIC (3CRDAG675)",
+"       10b7 2031  3CRDAG675 11a/b/g Wireless PCI Adapter",
+"   0910  3C910-A01",
+"   1006  MINI PCI type 3B Data Fax Modem",
+"   1007  Mini PCI 56k Winmodem",
+"       10b7 615c  Mini PCI 56K Modem",
+"   1201  3c982-TXM 10/100baseTX Dual Port A [Hydra]",
+"   1202  3c982-TXM 10/100baseTX Dual Port B [Hydra]",
+"   1700  3c940 10/100/1000Base-T [Marvell]",
+"       1043 80eb  A7V600/P4P800/K8V motherboard",
+"       10b7 0010  3C940 Gigabit LOM Ethernet Adapter",
+"       10b7 0020  3C941 Gigabit LOM Ethernet Adapter",
+"       147b 1407  KV8-MAX3 motherboard",
+"   3390  3c339 TokenLink Velocity",
+"   3590  3c359 TokenLink Velocity XL",
+"       10b7 3590  TokenLink Velocity XL Adapter (3C359/359B)",
+"   4500  3c450 HomePNA [Tornado]",
+"   5055  3c555 Laptop Hurricane",
+"   5057  3c575 Megahertz 10/100 LAN CardBus [Boomerang]",
+"       10b7 5a57  3C575 Megahertz 10/100 LAN Cardbus PC Card",
+"   5157  3cCFE575BT Megahertz 10/100 LAN CardBus [Cyclone]",
+"       10b7 5b57  3C575 Megahertz 10/100 LAN Cardbus PC Card",
+"   5257  3cCFE575CT CardBus [Cyclone]",
+"       10b7 5c57  FE575C-3Com 10/100 LAN CardBus-Fast Ethernet",
+"   5900  3c590 10BaseT [Vortex]",
+"   5920  3c592 EISA 10mbps Demon/Vortex",
+"   5950  3c595 100BaseTX [Vortex]",
+"   5951  3c595 100BaseT4 [Vortex]",
+"   5952  3c595 100Base-MII [Vortex]",
+"   5970  3c597 EISA Fast Demon/Vortex",
+"   5b57  3c595 Megahertz 10/100 LAN CardBus [Boomerang]",
+"       10b7 5b57  3C575 Megahertz 10/100 LAN Cardbus PC Card",
+"   6000  3CRSHPW796 [OfficeConnect Wireless CardBus]",
+"   6001  3com 3CRWE154G72 [Office Connect Wireless LAN Adapter]",
+"   6055  3c556 Hurricane CardBus [Cyclone]",
+"   6056  3c556B CardBus [Tornado]",
+"       10b7 6556  10/100 Mini PCI Ethernet Adapter",
+"   6560  3cCFE656 CardBus [Cyclone]",
+"       10b7 656a  3CCFEM656 10/100 LAN+56K Modem CardBus",
+"   6561  3cCFEM656 10/100 LAN+56K Modem CardBus",
+"       10b7 656b  3CCFEM656 10/100 LAN+56K Modem CardBus",
+"   6562  3cCFEM656B 10/100 LAN+Winmodem CardBus [Cyclone]",
+"       10b7 656b  3CCFEM656B 10/100 LAN+56K Modem CardBus",
+"   6563  3cCFEM656B 10/100 LAN+56K Modem CardBus",
+"       10b7 656b  3CCFEM656 10/100 LAN+56K Modem CardBus",
+"   6564  3cXFEM656C 10/100 LAN+Winmodem CardBus [Tornado]",
+"   7646  3cSOHO100-TX Hurricane",
+"   7770  3CRWE777 PCI(PLX) Wireless Adaptor [Airconnect]",
+"   7940  3c803 FDDILink UTP Controller",
+"   7980  3c804 FDDILink SAS Controller",
+"   7990  3c805 FDDILink DAS Controller",
+"   80eb  3c940B 10/100/1000Base-T",
+"   8811  Token ring",
+"   9000  3c900 10BaseT [Boomerang]",
+"   9001  3c900 10Mbps Combo [Boomerang]",
+"   9004  3c900B-TPO Etherlink XL [Cyclone]",
+"       10b7 9004  3C900B-TPO Etherlink XL TPO 10Mb",
+"   9005  3c900B-Combo Etherlink XL [Cyclone]",
+"       10b7 9005  3C900B-Combo Etherlink XL Combo",
+"   9006  3c900B-TPC Etherlink XL [Cyclone]",
+"   900a  3c900B-FL 10base-FL [Cyclone]",
+"   9050  3c905 100BaseTX [Boomerang]",
+"   9051  3c905 100BaseT4 [Boomerang]",
+"   9055  3c905B 100BaseTX [Cyclone]",
+"       1028 0080  3C905B Fast Etherlink XL 10/100",
+"       1028 0081  3C905B Fast Etherlink XL 10/100",
+"       1028 0082  3C905B Fast Etherlink XL 10/100",
+"       1028 0083  3C905B Fast Etherlink XL 10/100",
+"       1028 0084  3C905B Fast Etherlink XL 10/100",
+"       1028 0085  3C905B Fast Etherlink XL 10/100",
+"       1028 0086  3C905B Fast Etherlink XL 10/100",
+"       1028 0087  3C905B Fast Etherlink XL 10/100",
+"       1028 0088  3C905B Fast Etherlink XL 10/100",
+"       1028 0089  3C905B Fast Etherlink XL 10/100",
+"       1028 0090  3C905B Fast Etherlink XL 10/100",
+"       1028 0091  3C905B Fast Etherlink XL 10/100",
+"       1028 0092  3C905B Fast Etherlink XL 10/100",
+"       1028 0093  3C905B Fast Etherlink XL 10/100",
+"       1028 0094  3C905B Fast Etherlink XL 10/100",
+"       1028 0095  3C905B Fast Etherlink XL 10/100",
+"       1028 0096  3C905B Fast Etherlink XL 10/100",
+"       1028 0097  3C905B Fast Etherlink XL 10/100",
+"       1028 0098  3C905B Fast Etherlink XL 10/100",
+"       1028 0099  3C905B Fast Etherlink XL 10/100",
+"       10b7 9055  3C905B Fast Etherlink XL 10/100",
+"   9056  3c905B-T4 Fast EtherLink XL [Cyclone]",
+"   9058  3c905B Deluxe Etherlink 10/100/BNC [Cyclone]",
+"   905a  3c905B-FX Fast Etherlink XL FX 100baseFx [Cyclone]",
+"   9200  3c905C-TX/TX-M [Tornado]",
+"       1028 0095  3C920 Integrated Fast Ethernet Controller",
+"       1028 0097  3C920 Integrated Fast Ethernet Controller",
+"       1028 00fe  Optiplex GX240",
+"       1028 012a  3C920 Integrated Fast Ethernet Controller [Latitude C640]",
+"       10b7 1000  3C905C-TX Fast Etherlink for PC Management NIC",
+"       10b7 7000  10/100 Mini PCI Ethernet Adapter",
+"       10f1 2466  Tiger MPX S2466 (3C920 Integrated Fast Ethernet Controller)",
+"   9201  3C920B-EMB Integrated Fast Ethernet Controller [Tornado]",
+"       1043 80ab  A7N8X Deluxe onboard 3C920B-EMB Integrated Fast Ethernet Controller",
+"   9202  3Com 3C920B-EMB-WNM Integrated Fast Ethernet Controller",
+"   9210  3C920B-EMB-WNM Integrated Fast Ethernet Controller",
+"   9300  3CSOHO100B-TX 910-A01 [tulip]",
+"   9800  3c980-TX Fast Etherlink XL Server Adapter [Cyclone]",
+"       10b7 9800  3c980-TX Fast Etherlink XL Server Adapter",
+"   9805  3c980-C 10/100baseTX NIC [Python-T]",
+"       10b7 1201  EtherLink Server 10/100 Dual Port A",
+"       10b7 1202  EtherLink Server 10/100 Dual Port B",
+"       10b7 9805  3c980 10/100baseTX NIC [Python-T]",
+"       10f1 2462  Thunder K7 S2462",
+"   9900  3C990-TX [Typhoon]",
+"   9902  3CR990-TX-95 [Typhoon 56-bit]",
+"   9903  3CR990-TX-97 [Typhoon 168-bit]",
+"   9904  3C990B-TX-M/3C990BSVR [Typhoon2]",
+"       10b7 1000  3CR990B-TX-M [Typhoon2]",
+"       10b7 2000  3CR990BSVR [Typhoon2 Server]",
+"   9905  3CR990-FX-95/97/95 [Typhon Fiber]",
+"       10b7 1101  3CR990-FX-95 [Typhoon Fiber 56-bit]",
+"       10b7 1102  3CR990-FX-97 [Typhoon Fiber 168-bit]",
+"       10b7 2101  3CR990-FX-95 Server [Typhoon Fiber 56-bit]",
+"       10b7 2102  3CR990-FX-97 Server [Typhoon Fiber 168-bit]",
+"   9908  3CR990SVR95 [Typhoon Server 56-bit]",
+"   9909  3CR990SVR97 [Typhoon Server 168-bit]",
+"   990a  3C990SVR [Typhoon Server]",
+"   990b  3C990SVR [Typhoon Server]",
+"10b8  Standard Microsystems Corp [SMC]",
+"   0005  83c170 EPIC/100 Fast Ethernet Adapter",
+"       1055 e000  LANEPIC 10/100 [EVB171Q-PCI]",
+"       1055 e002  LANEPIC 10/100 [EVB171G-PCI]",
+"       10b8 a011  EtherPower II 10/100",
+"       10b8 a014  EtherPower II 10/100",
+"       10b8 a015  EtherPower II 10/100",
+"       10b8 a016  EtherPower II 10/100",
+"       10b8 a017  EtherPower II 10/100",
+"   0006  83c175 EPIC/100 Fast Ethernet Adapter",
+"       1055 e100  LANEPIC Cardbus Fast Ethernet Adapter",
+"       1055 e102  LANEPIC Cardbus Fast Ethernet Adapter",
+"       1055 e300  LANEPIC Cardbus Fast Ethernet Adapter",
+"       1055 e302  LANEPIC Cardbus Fast Ethernet Adapter",
+"       10b8 a012  LANEPIC Cardbus Fast Ethernet Adapter",
+"       13a2 8002  LANEPIC Cardbus Fast Ethernet Adapter",
+"       13a2 8006  LANEPIC Cardbus Fast Ethernet Adapter",
+"   1000  FDC 37c665",
+"   1001  FDC 37C922",
+"   2802  SMC2802W [EZ Connect g]",
+"   a011  83C170QF",
+"   b106  SMC34C90",
+"10b9  ALi Corporation",
+"   0101  CMI8338/C3DX PCI Audio Device",
+"   0111  C-Media CMI8738/C3DX Audio Device (OEM)",
+"       10b9 0111  C-Media CMI8738/C3DX Audio Device (OEM)",
+"   0780  Multi-IO Card",
+"   0782  Multi-IO Card",
+"   1435  M1435",
+"   1445  M1445",
+"   1449  M1449",
+"   1451  M1451",
+"   1461  M1461",
+"   1489  M1489",
+"   1511  M1511 [Aladdin]",
+"   1512  M1512 [Aladdin]",
+"   1513  M1513 [Aladdin]",
+"   1521  M1521 [Aladdin III]",
+"       10b9 1521  ALI M1521 Aladdin III CPU Bridge",
+"   1523  M1523",
+"       10b9 1523  ALI M1523 ISA Bridge",
+"   1531  M1531 [Aladdin IV]",
+"   1533  M1533/M1535 PCI to ISA Bridge [Aladdin IV/V/V+]",
+"       1014 053b  ThinkPad R40e (2684-HVG) PCI to ISA Bridge",
+"       10b9 1533  ALi M1533 Aladdin IV/V ISA Bridge",
+"   1541  M1541",
+"       10b9 1541  ALI M1541 Aladdin V/V+ AGP System Controller",
+"   1543  M1543",
+"   1563  M1563 HyperTransport South Bridge",
+"   1573  PCI to LPC Controller",
+"   1621  M1621",
+"   1631  ALI M1631 PCI North Bridge Aladdin Pro III",
+"   1632  M1632M Northbridge+Trident",
+"   1641  ALI M1641 PCI North Bridge Aladdin Pro IV",
+"   1644  M1644/M1644T Northbridge+Trident",
+"   1646  M1646 Northbridge+Trident",
+"   1647  M1647 Northbridge [MAGiK 1 / MobileMAGiK 1]",
+"   1651  M1651/M1651T Northbridge [Aladdin-Pro 5/5M,Aladdin-Pro 5T/5TM]",
+"   1671  M1671 Super P4 Northbridge [AGP4X,PCI and SDR/DDR]",
+"   1672  M1672 Northbridge [CyberALADDiN-P4]",
+"   1681  M1681 P4 Northbridge [AGP8X,HyperTransport and SDR/DDR]",
+"   1687  M1687 K8 Northbridge [AGP8X and HyperTransport]",
+"   1689  M1689 K8 Northbridge [Super K8 Single Chip]",
+"   1695  M1695 K8 Northbridge [PCI Express and HyperTransport]",
+"   1697  M1697 HTT Host Bridge",
+"   3141  M3141",
+"   3143  M3143",
+"   3145  M3145",
+"   3147  M3147",
+"   3149  M3149",
+"   3151  M3151",
+"   3307  M3307",
+"   3309  M3309",
+"   3323  M3325 Video/Audio Decoder",
+"   5212  M4803",
+"   5215  MS4803",
+"   5217  M5217H",
+"   5219  M5219",
+"   5225  M5225",
+"   5228  M5228 ALi ATA/RAID Controller",
+"   5229  M5229 IDE",
+"       1014 050f  ThinkPad R30",
+"       1014 053d  ThinkPad R40e (2684-HVG) builtin IDE",
+"       103c 0024  Pavilion ze4400 builtin IDE",
+"       1043 8053  A7A266 Motherboard IDE",
+"   5235  M5225",
+"   5237  USB 1.1 Controller",
+"       1014 0540  ThinkPad R40e (2684-HVG) builtin USB",
+"       103c 0024  Pavilion ze4400 builtin USB",
+"       104d 810f  VAIO PCG-U1 USB/OHCI Revision 1.0",
+"   5239  USB 2.0 Controller",
+"   5243  M1541 PCI to AGP Controller",
+"   5246  AGP8X Controller",
+"   5247  PCI to AGP Controller",
+"   5249  M5249 HTT to PCI Bridge",
+"   524b  PCI Express Root Port",
+"   524c  PCI Express Root Port",
+"   524d  PCI Express Root Port",
+"   524e  PCI Express Root Port",
+"   5251  M5251 P1394 OHCI 1.0 Controller",
+"   5253  M5253 P1394 OHCI 1.1 Controller",
+"   5261  M5261 Ethernet Controller",
+"   5263  M5263 Ethernet Controller",
+"   5281  ALi M5281 Serial ATA / RAID Host Controller",
+"   5287  ULi 5287 SATA",
+"   5288  ULi M5288 SATA",
+"   5289  ULi 5289 SATA",
+"   5450  Lucent Technologies Soft Modem AMR",
+"   5451  M5451 PCI AC-Link Controller Audio Device",
+"       1014 0506  ThinkPad R30",
+"       1014 053e  ThinkPad R40e (2684-HVG) builtin Audio",
+"       103c 0024  Pavilion ze4400 builtin Audio",
+"       10b9 5451  HP Compaq nc4010 (DY885AA#ABN)",
+"   5453  M5453 PCI AC-Link Controller Modem Device",
+"   5455  M5455 PCI AC-Link Controller Audio Device",
+"   5457  M5457 AC'97 Modem Controller",
+"       1014 0535  ThinkPad R40e (2684-HVG) builtin modem",
+"       103c 0024  Pavilion ze4400 builtin Modem Device",
+"   5459  SmartLink SmartPCI561 56K Modem",
+"   545a  SmartLink SmartPCI563 56K Modem",
+"   5461  High Definition Audio/AC'97 Host Controller",
+"   5471  M5471 Memory Stick Controller",
+"   5473  M5473 SD-MMC Controller",
+"   7101  M7101 Power Management Controller [PMU]",
+"       1014 0510  ThinkPad R30",
+"       1014 053c  ThinkPad R40e (2684-HVG) Power Management Controller",
+"       103c 0024  Pavilion ze4400",
+"10ba  Mitsubishi Electric Corp.",
+"   0301  AccelGraphics AccelECLIPSE",
+"   0304  AccelGALAXY A2100 [OEM Evans & Sutherland]",
+"   0308  Tornado 3000 [OEM Evans & Sutherland]",
+"   1002  VG500 [VolumePro Volume Rendering Accelerator]",
+"10bb  Dapha Electronics Corporation",
+"10bc  Advanced Logic Research",
+"10bd  Surecom Technology",
+"   0e34  NE-34",
+"10be  Tseng Labs International Co.",
+"10bf  Most Inc",
+"10c0  Boca Research Inc.",
+"10c1  ICM Co., Ltd.",
+"10c2  Auspex Systems Inc.",
+"10c3  Samsung Semiconductors, Inc.",
+"   1100  Smartether100 SC1100 LAN Adapter (i82557B)",
+"10c4  Award Software International Inc.",
+"10c5  Xerox Corporation",
+"10c6  Rambus Inc.",
+"10c7  Media Vision",
+"10c8  Neomagic Corporation",
+"   0001  NM2070 [MagicGraph 128]",
+"   0002  NM2090 [MagicGraph 128V]",
+"   0003  NM2093 [MagicGraph 128ZV]",
+"   0004  NM2160 [MagicGraph 128XD]",
+"       1014 00ba  MagicGraph 128XD",
+"       1025 1007  MagicGraph 128XD",
+"       1028 0074  MagicGraph 128XD",
+"       1028 0075  MagicGraph 128XD",
+"       1028 007d  MagicGraph 128XD",
+"       1028 007e  MagicGraph 128XD",
+"       1033 802f  MagicGraph 128XD",
+"       104d 801b  MagicGraph 128XD",
+"       104d 802f  MagicGraph 128XD",
+"       104d 830b  MagicGraph 128XD",
+"       10ba 0e00  MagicGraph 128XD",
+"       10c8 0004  MagicGraph 128XD",
+"       10cf 1029  MagicGraph 128XD",
+"       10f7 8308  MagicGraph 128XD",
+"       10f7 8309  MagicGraph 128XD",
+"       10f7 830b  MagicGraph 128XD",
+"       10f7 830d  MagicGraph 128XD",
+"       10f7 8312  MagicGraph 128XD",
+"   0005  NM2200 [MagicGraph 256AV]",
+"       1014 00dd  ThinkPad 570",
+"       1028 0088  Latitude CPi A",
+"   0006  NM2360 [MagicMedia 256ZX]",
+"   0016  NM2380 [MagicMedia 256XL+]",
+"       10c8 0016  MagicMedia 256XL+",
+"   0025  NM2230 [MagicGraph 256AV+]",
+"   0083  NM2093 [MagicGraph 128ZV+]",
+"   8005  NM2200 [MagicMedia 256AV Audio]",
+"       0e11 b0d1  MagicMedia 256AV Audio Device on Discovery",
+"       0e11 b126  MagicMedia 256AV Audio Device on Durango",
+"       1014 00dd  MagicMedia 256AV Audio Device on BlackTip Thinkpad",
+"       1025 1003  MagicMedia 256AV Audio Device on TravelMate 720",
+"       1028 0088  Latitude CPi A",
+"       1028 008f  MagicMedia 256AV Audio Device on Colorado Inspiron",
+"       103c 0007  MagicMedia 256AV Audio Device on Voyager II",
+"       103c 0008  MagicMedia 256AV Audio Device on Voyager III",
+"       103c 000d  MagicMedia 256AV Audio Device on Omnibook 900",
+"       10c8 8005  MagicMedia 256AV Audio Device on FireAnt",
+"       110a 8005  MagicMedia 256AV Audio Device",
+"       14c0 0004  MagicMedia 256AV Audio Device",
+"   8006  NM2360 [MagicMedia 256ZX Audio]",
+"   8016  NM2380 [MagicMedia 256XL+ Audio]",
+"10c9  Dataexpert Corporation",
+"10ca  Fujitsu Microelectr., Inc.",
+"10cb  Omron Corporation",
+"10cc  Mai Logic Incorporated",
+"   0660  Articia S Host Bridge",
+"   0661  Articia S PCI Bridge",
+"10cd  Advanced System Products, Inc",
+"   1100  ASC1100",
+"   1200  ASC1200 [(abp940) Fast SCSI-II]",
+"   1300  ABP940-U / ABP960-U",
+"       10cd 1310  ASC1300 SCSI Adapter",
+"   2300  ABP940-UW",
+"   2500  ABP940-U2W",
+"10ce  Radius",
+"10cf  Fujitsu Limited.",
+"   2001  mb86605",
+"10d1  FuturePlus Systems Corp.",
+"10d2  Molex Incorporated",
+"10d3  Jabil Circuit Inc",
+"10d4  Hualon Microelectronics",
+"10d5  Autologic Inc.",
+"10d6  Cetia",
+"10d7  BCM Advanced Research",
+"10d8  Advanced Peripherals Labs",
+"10d9  Macronix, Inc. [MXIC]",
+"   0431  MX98715",
+"   0512  MX98713",
+"   0531  MX987x5",
+"       1186 1200  DFE-540TX ProFAST 10/100 Adapter",
+"   8625  MX86250",
+"   8626  Macronix MX86251 + 3Dfx Voodoo Rush",
+"   8888  MX86200",
+"10da  Compaq IPG-Austin",
+"   0508  TC4048 Token Ring 4/16",
+"   3390  Tl3c3x9",
+"10db  Rohm LSI Systems, Inc.",
+"10dc  CERN/ECP/EDU",
+"   0001  STAR/RD24 SCI-PCI (PMC)",
+"   0002  TAR/RD24 SCI-PCI (PMC)",
+"   0021  HIPPI destination",
+"   0022  HIPPI source",
+"   10dc  ATT2C15-3 FPGA",
+"10dd  Evans & Sutherland",
+"   0100  Lightning 1200",
+"10de  nVidia Corporation",
+"   0008  NV1 [EDGE 3D]",
+"   0009  NV1 [EDGE 3D]",
+"   0010  NV2 [Mutara V08]",
+"   0020  NV4 [RIVA TNT]",
+"       1043 0200  V3400 TNT",
+"       1048 0c18  Erazor II SGRAM",
+"       1048 0c19  Erazor II",
+"       1048 0c1b  Erazor II",
+"       1048 0c1c  Erazor II",
+"       1092 0550  Viper V550",
+"       1092 0552  Viper V550",
+"       1092 4804  Viper V550",
+"       1092 4808  Viper V550",
+"       1092 4810  Viper V550",
+"       1092 4812  Viper V550",
+"       1092 4815  Viper V550",
+"       1092 4820  Viper V550 with TV out",
+"       1092 4822  Viper V550",
+"       1092 4904  Viper V550",
+"       1092 4914  Viper V550",
+"       1092 8225  Viper V550",
+"       10b4 273d  Velocity 4400",
+"       10b4 273e  Velocity 4400",
+"       10b4 2740  Velocity 4400",
+"       10de 0020  Riva TNT",
+"       1102 1015  Graphics Blaster CT6710",
+"       1102 1016  Graphics Blaster RIVA TNT",
+"   0028  NV5 [RIVA TNT2/TNT2 Pro]",
+"       1043 0200  AGP-V3800 SGRAM",
+"       1043 0201  AGP-V3800 SDRAM",
+"       1043 0205  PCI-V3800",
+"       1043 4000  AGP-V3800PRO",
+"       1048 0c21  Synergy II",
+"       1048 0c28  Erazor III",
+"       1048 0c29  Erazor III",
+"       1048 0c2a  Erazor III",
+"       1048 0c2b  Erazor III",
+"       1048 0c31  Erazor III Pro",
+"       1048 0c32  Erazor III Pro",
+"       1048 0c33  Erazor III Pro",
+"       1048 0c34  Erazor III Pro",
+"       107d 2134  WinFast 3D S320 II + TV-Out",
+"       1092 4804  Viper V770",
+"       1092 4a00  Viper V770",
+"       1092 4a02  Viper V770 Ultra",
+"       1092 5a00  RIVA TNT2/TNT2 Pro",
+"       1092 6a02  Viper V770 Ultra",
+"       1092 7a02  Viper V770 Ultra",
+"       10de 0005  RIVA TNT2 Pro",
+"       10de 000f  Compaq NVIDIA TNT2 Pro",
+"       1102 1020  3D Blaster RIVA TNT2",
+"       1102 1026  3D Blaster RIVA TNT2 Digital",
+"       14af 5810  Maxi Gamer Xentor",
+"   0029  NV5 [RIVA TNT2 Ultra]",
+"       1043 0200  AGP-V3800 Deluxe",
+"       1043 0201  AGP-V3800 Ultra SDRAM",
+"       1043 0205  PCI-V3800 Ultra",
+"       1048 0c2e  Erazor III Ultra",
+"       1048 0c2f  Erazor III Ultra",
+"       1048 0c30  Erazor III Ultra",
+"       1102 1021  3D Blaster RIVA TNT2 Ultra",
+"       1102 1029  3D Blaster RIVA TNT2 Ultra",
+"       1102 102f  3D Blaster RIVA TNT2 Ultra",
+"       14af 5820  Maxi Gamer Xentor 32",
+"   002a  NV5 [Riva TnT2]",
+"   002b  NV5 [Riva TnT2]",
+"   002c  NV6 [Vanta/Vanta LT]",
+"       1043 0200  AGP-V3800 Combat SDRAM",
+"       1043 0201  AGP-V3800 Combat",
+"       1048 0c20  TNT2 Vanta",
+"       1048 0c21  TNT2 Vanta",
+"       1092 6820  Viper V730",
+"       1102 1031  CT6938 VANTA 8MB",
+"       1102 1034  CT6894 VANTA 16MB",
+"       14af 5008  Maxi Gamer Phoenix 2",
+"   002d  NV5M64 [RIVA TNT2 Model 64/Model 64 Pro]",
+"       1043 0200  AGP-V3800M",
+"       1043 0201  AGP-V3800M",
+"       1048 0c3a  Erazor III LT",
+"       1048 0c3b  Erazor III LT",
+"       10de 001e  M64 AGP4x",
+"       1102 1023  CT6892 RIVA TNT2 Value",
+"       1102 1024  CT6932 RIVA TNT2 Value 32Mb",
+"       1102 102c  CT6931 RIVA TNT2 Value [Jumper]",
+"       1462 8808  MSI-8808",
+"       1554 1041  Pixelview RIVA TNT2 M64",
+"       1569 002d  Palit Microsystems Daytona TNT2 M64",
+"   002e  NV6 [Vanta]",
+"   002f  NV6 [Vanta]",
+"   0034  MCP04 SMBus",
+"   0035  MCP04 IDE",
+"   0036  MCP04 Serial ATA Controller",
+"   0037  MCP04 Ethernet Controller",
+"   0038  MCP04 Ethernet Controller",
+"   003a  MCP04 AC'97 Audio Controller",
+"   003b  MCP04 USB Controller",
+"   003c  MCP04 USB Controller",
+"   003d  MCP04 PCI Bridge",
+"   003e  MCP04 Serial ATA Controller",
+"   0040  NV40 [GeForce 6800 Ultra]",
+"   0041  NV40 [GeForce 6800]",
+"       1043 817b  V9999 Gamer Edition",
+"   0042  NV40.2 [GeForce 6800 LE]",
+"   0043  NV40.3",
+"   0044  NV40 [GeForce 6800 XT]",
+"   0045  NV40 [GeForce 6800 GT]",
+"   0047  NV40 [GeForce 6800 GS]",
+"       1682 2109  GeForce 6800 GS",
+"   0049  NV40GL",
+"   004e  NV40GL [Quadro FX 4000]",
+"   0050  CK804 ISA Bridge",
+"       1043 815a  K8N4-E Mainboard",
+"       1458 0c11  GA-K8N Ultra-9 Mainboard",
+"       1462 7100  MSI K8N Diamond",
+"   0051  CK804 ISA Bridge",
+"   0052  CK804 SMBus",
+"       1043 815a  K8N4-E Mainboard",
+"       1458 0c11  GA-K8N Ultra-9 Mainboard",
+"       1462 7100  MSI K8N Diamond",
+"   0053  CK804 IDE",
+"       1043 815a  K8N4-E Mainboard",
+"       1458 5002  GA-K8N Ultra-9 Mainboard",
+"       1462 7100  MSI K8N Diamond",
+"   0054  CK804 Serial ATA Controller",
+"       1458 b003  GA-K8N Ultra-9 Mainboard",
+"       1462 7100  MSI K8N Diamond",
+"   0055  CK804 Serial ATA Controller",
+"       1043 815a  K8N4-E Mainboard",
+"       1458 b003  GA-K8N Ultra-9 Mainboard",
+"   0056  CK804 Ethernet Controller",
+"   0057  CK804 Ethernet Controller",
+"       1043 8141  K8N4-E Mainboard",
+"       1458 e000  GA-K8N Ultra-9 Mainboard",
+"       1462 7100  MSI K8N Diamond",
+"   0058  CK804 AC'97 Modem",
+"   0059  CK804 AC'97 Audio Controller",
+"       1043 812a  K8N4-E Mainboard",
+"   005a  CK804 USB Controller",
+"       1043 815a  K8N4-E Mainboard",
+"       1458 5004  GA-K8N Ultra-9 Mainboard",
+"       1462 7100  MSI K8N Diamond",
+"   005b  CK804 USB Controller",
+"       1043 815a  K8N4-E Mainboard",
+"       1458 5004  GA-K8N Ultra-9 Mainboard",
+"       1462 7100  MSI K8N Diamond",
+"   005c  CK804 PCI Bridge",
+"   005d  CK804 PCIE Bridge",
+"   005e  CK804 Memory Controller",
+"       10f1 2891  Thunder K8SRE Mainboard",
+"       1458 5000  GA-K8N Ultra-9 Mainboard",
+"       1462 7100  MSI K8N Diamond",
+"   005f  CK804 Memory Controller",
+"   0060  nForce2 ISA Bridge",
+"       1043 80ad  A7N8X Mainboard",
+"       a0a0 03ba  UK79G-1394 motherboard",
+"   0064  nForce2 SMBus (MCP)",
+"       a0a0 03bb  UK79G-1394 motherboard",
+"   0065  nForce2 IDE",
+"       a0a0 03b2  UK79G-1394 motherboard",
+"   0066  nForce2 Ethernet Controller",
+"       1043 80a7  A7N8X Mainboard onboard nForce2 Ethernet",
+"   0067  nForce2 USB Controller",
+"       1043 0c11  A7N8X Mainboard",
+"   0068  nForce2 USB Controller",
+"       1043 0c11  A7N8X Mainboard",
+"       a0a0 03b4  UK79G-1394 motherboard",
+"   006a  nForce2 AC97 Audio Controler (MCP)",
+"       a0a0 0304  UK79G-1394 motherboard",
+"   006b  nForce Audio Processing Unit",
+"       10de 006b  nForce2 MCP Audio Processing Unit",
+"   006c  nForce2 External PCI Bridge",
+"   006d  nForce2 PCI Bridge",
+"   006e  nForce2 FireWire (IEEE 1394) Controller",
+"       a0a0 0306  UK79G-1394 motherboard",
+"   0080  MCP2A ISA bridge",
+"       147b 1c09  NV7 Motherboard",
+"   0084  MCP2A SMBus",
+"       147b 1c09  NV7 Motherboard",
+"   0085  MCP2A IDE",
+"       147b 1c09  NV7 Motherboard",
+"   0086  MCP2A Ethernet Controller",
+"   0087  MCP2A USB Controller",
+"       147b 1c09  NV7 Motherboard",
+"   0088  MCP2A USB Controller",
+"       147b 1c09  NV7 Motherboard",
+"   008a  MCP2S AC'97 Audio Controller",
+"       147b 1c09  NV7 Motherboard",
+"   008b  MCP2A PCI Bridge",
+"   008c  MCP2A Ethernet Controller",
+"   008e  nForce2 Serial ATA Controller",
+"   0090  G70 [GeForce 7800 GTX]",
+"   0091  G70 [GeForce 7800 GTX]",
+"   0092  G70 [GeForce 7800 GT]",
+"   0093  G70 [GeForce 7800 GS]",
+"   0098  GeForce Go 7800",
+"   0099  GE Force Go 7800 GTX",
+"   009d  G70GL [Quadro FX4500]",
+"   00a0  NV5 [Aladdin TNT2]",
+"       14af 5810  Maxi Gamer Xentor",
+"   00c0  NV41 [GeForce 6800 GS]",
+"   00c1  NV41.1 [GeForce 6800]",
+"   00c2  NV41.2 [GeForce 6800 LE]",
+"   00c3  NV42 [Geforce 6800 XT]",
+"   00c8  NV41.8 [GeForce Go 6800]",
+"   00c9  NV41.9 [GeForce Go 6800 Ultra]",
+"   00cc  NV41 [Quadro FX Go1400]",
+"   00cd  NV41 [Quadro FX 3450/4000 SDI]",
+"   00ce  NV41GL [Quadro FX 1400]",
+"   00d0  nForce3 LPC Bridge",
+"   00d1  nForce3 Host Bridge",
+"   00d2  nForce3 AGP Bridge",
+"   00d3  CK804 Memory Controller",
+"   00d4  nForce3 SMBus",
+"   00d5  nForce3 IDE",
+"   00d6  nForce3 Ethernet",
+"   00d7  nForce3 USB 1.1",
+"   00d8  nForce3 USB 2.0",
+"   00d9  nForce3 Audio",
+"   00da  nForce3 Audio",
+"   00dd  nForce3 PCI Bridge",
+"   00df  CK8S Ethernet Controller",
+"       147b 1c0b  NF8 Mainboard",
+"   00e0  nForce3 250Gb LPC Bridge",
+"       147b 1c0b  NF8 Mainboard",
+"   00e1  nForce3 250Gb Host Bridge",
+"       147b 1c0b  NF8 Mainboard",
+"   00e2  nForce3 250Gb AGP Host to PCI Bridge",
+"   00e3  CK8S Serial ATA Controller (v2.5)",
+"       147b 1c0b  NF8 Mainboard",
+"   00e4  nForce 250Gb PCI System Management",
+"       147b 1c0b  NF8 Mainboard",
+"   00e5  CK8S Parallel ATA Controller (v2.5)",
+"       147b 1c0b  NF8 Mainboard",
+"   00e6  CK8S Ethernet Controller",
+"   00e7  CK8S USB Controller",
+"       147b 1c0b  NF8 Mainboard",
+"   00e8  nForce3 EHCI USB 2.0 Controller",
+"       147b 1c0b  NF8 Mainboard",
+"   00ea  nForce3 250Gb AC'97 Audio Controller",
+"       147b 1c0b  NF8 Mainboard",
+"   00ed  nForce3 250Gb PCI-to-PCI Bridge",
+"   00ee  CK8S Serial ATA Controller (v2.5)",
+"   00f0  NV40 [GeForce 6800/GeForce 6800 Ultra]",
+"   00f1  NV43 [GeForce 6600/GeForce 6600 GT]",
+"       1043 81a6  N6600GT TD 128M AGP",
+"       1682 2119  GeForce 6600 GT AGP 128MB DDR3 DUAL DVI TV",
+"   00f2  NV43 [GeForce 6600/GeForce 6600 GT]",
+"       1682 211c  GeForce 6600 256MB DDR DUAL DVI TV",
+"   00f3  NV43 [GeForce 6200]",
+"   00f4  NV43 [GeForce 6600 LE]",
+"   00f5  G70 [GeForce 7800 GS]",
+"   00f6  NV43 [GeForce 6600 GS]",
+"   00f8  NV45GL [Quadro FX 3400/4400]",
+"   00f9  NV40 [GeForce 6800 Ultra/GeForce 6800 GT]",
+"       1682 2120  GEFORCE 6800 GT PCI-E",
+"   00fa  NV36 [GeForce PCX 5750]",
+"   00fb  NV35 [GeForce PCX 5900]",
+"   00fc  NV37GL [Quadro FX 330/GeForce PCX 5300]",
+"   00fd  NV37GL [Quadro FX 330/Quadro NVS280]",
+"   00fe  NV38GL [Quadro FX 1300]",
+"   00ff  NV18 [GeForce PCX 4300]",
+"   0100  NV10 [GeForce 256 SDR]",
+"       1043 0200  AGP-V6600 SGRAM",
+"       1043 0201  AGP-V6600 SDRAM",
+"       1043 4008  AGP-V6600 SGRAM",
+"       1043 4009  AGP-V6600 SDRAM",
+"       1048 0c41  Erazor X",
+"       1048 0c43  ERAZOR X PCI",
+"       1048 0c48  Synergy Force",
+"       1102 102d  CT6941 GeForce 256",
+"       14af 5022  3D Prophet SE",
+"   0101  NV10DDR [GeForce 256 DDR]",
+"       1043 0202  AGP-V6800 DDR",
+"       1043 400a  AGP-V6800 DDR SGRAM",
+"       1043 400b  AGP-V6800 DDR SDRAM",
+"       1048 0c42  Erazor X",
+"       107d 2822  WinFast GeForce 256",
+"       1102 102e  CT6971 GeForce 256 DDR",
+"       14af 5021  3D Prophet DDR-DVI",
+"   0103  NV10GL [Quadro]",
+"       1048 0c40  GLoria II-64",
+"       1048 0c44  GLoria II",
+"       1048 0c45  GLoria II",
+"       1048 0c4a  GLoria II-64 Pro",
+"       1048 0c4b  GLoria II-64 Pro DVII",
+"   0110  NV11 [GeForce2 MX/MX 400]",
+"       1043 4015  AGP-V7100 Pro",
+"       1043 4031  V7100 Pro with TV output",
+"       1048 0c60  Gladiac MX",
+"       1048 0c61  Gladiac 511PCI",
+"       1048 0c63  Gladiac 511TV-OUT 32MB",
+"       1048 0c64  Gladiac 511TV-OUT 64MB",
+"       1048 0c65  Gladiac 511TWIN",
+"       1048 0c66  Gladiac 311",
+"       10de 0091  Dell OEM GeForce 2 MX 400",
+"       10de 00a1  Apple OEM GeForce2 MX",
+"       1462 8817  MSI GeForce2 MX400 Pro32S [MS-8817]",
+"       14af 7102  3D Prophet II MX",
+"       14af 7103  3D Prophet II MX Dual-Display",
+"   0111  NV11DDR [GeForce2 MX 100 DDR/200 DDR]",
+"   0112  NV11 [GeForce2 Go]",
+"   0113  NV11GL [Quadro2 MXR/EX/Go]",
+"   0140  NV43 [GeForce 6600 GT]",
+"   0141  NV43 [GeForce 6600]",
+"       1458 3124  GV-NX66128DP Turbo Force Edition",
+"   0142  NV43 [GeForce 6600 PCIe]",
+"   0144  NV43 [GeForce Go 6600]",
+"   0145  NV43 [GeForce 6610 XL]",
+"   0146  NV43 [Geforce Go 6600TE/6200TE]",
+"   0148  NV43 [GeForce Go 6600]",
+"   0149  NV43 [GeForce Go 6600 GT]",
+"   014a  Quadro NVS 440",
+"   014c  Quadro FX 550",
+"   014e  NV43GL [Quadro FX 540]",
+"   014f  NV43 [GeForce 6200]",
+"   0150  NV15 [GeForce2 GTS/Pro]",
+"       1043 4016  V7700 AGP Video Card",
+"       1048 0c50  Gladiac",
+"       1048 0c52  Gladiac-64",
+"       107d 2840  WinFast GeForce2 GTS with TV output",
+"       107d 2842  WinFast GeForce 2 Pro",
+"       1462 8831  Creative GeForce2 Pro",
+"   0151  NV15DDR [GeForce2 Ti]",
+"       1043 405f  V7700Ti",
+"       1462 5506  Creative 3D Blaster Geforce2 Titanium",
+"   0152  NV15BR [GeForce2 Ultra, Bladerunner]",
+"       1048 0c56  GLADIAC Ultra",
+"   0153  NV15GL [Quadro2 Pro]",
+"   0161  GeForce 6200 TurboCache(TM)",
+"   0162  NV43 [GeForce 6200 SE]",
+"   0164  NV44 [GeForce Go 6200]",
+"   0165  NV44 [Quadro NVS 285]",
+"   0166  NV43 [GeForce Go 6400]",
+"   0167  GeForce Go 6200 TurboCache",
+"   0168  NV43 [GeForce Go 6200 TurboCache]",
+"   0170  NV17 [GeForce4 MX 460]",
+"   0171  NV17 [GeForce4 MX 440]",
+"       10b0 0002  Gainward Pro/600 TV",
+"       10de 0008  Apple OEM GeForce4 MX 440",
+"       1462 8661  G4MX440-VTP",
+"       1462 8730  MX440SES-T (MS-8873)",
+"       1462 8852  GeForce4 MX440 PCI",
+"       147b 8f00  Abit Siluro GeForce4MX440",
+"   0172  NV17 [GeForce4 MX 420]",
+"   0173  NV17 [GeForce4 MX 440-SE]",
+"   0174  NV17 [GeForce4 440 Go]",
+"   0175  NV17 [GeForce4 420 Go]",
+"   0176  NV17 [GeForce4 420 Go 32M]",
+"       4c53 1090  Cx9 / Vx9 mainboard",
+"   0177  NV17 [GeForce4 460 Go]",
+"   0178  NV17GL [Quadro4 550 XGL]",
+"   0179  NV17 [GeForce4 420 Go 32M]",
+"       10de 0179  GeForce4 MX (Mac)",
+"   017a  NV17GL [Quadro4 200/400 NVS]",
+"   017b  NV17GL [Quadro4 550 XGL]",
+"   017c  NV17GL [Quadro4 500 GoGL]",
+"   017d  NV17 [GeForce4 410 Go 16M]",
+"   0181  NV18 [GeForce4 MX 440 AGP 8x]",
+"       1043 806f  V9180 Magic",
+"       1462 8880  MS-StarForce GeForce4 MX 440 with AGP8X",
+"       1462 8900  MS-8890 GeForce 4 MX440 AGP8X",
+"       1462 9350  MSI Geforce4 MX T8X with AGP8X",
+"       147b 8f0d  Siluro GF4 MX-8X",
+"   0182  NV18 [GeForce4 MX 440SE AGP 8x]",
+"   0183  NV18 [GeForce4 MX 420 AGP 8x]",
+"   0185  NV18 [GeForce4 MX 4000 AGP 8x]",
+"   0186  NV18M [GeForce4 448 Go]",
+"   0187  NV18M [GeForce4 488 Go]",
+"   0188  NV18GL [Quadro4 580 XGL]",
+"   018a  NV18GL [Quadro4 NVS AGP 8x]",
+"   018b  NV18GL [Quadro4 380 XGL]",
+"   018c  Quadro NVS 50 PCI",
+"   018d  NV18M [GeForce4 448 Go]",
+"   01a0  NVCrush11 [GeForce2 MX Integrated Graphics]",
+"   01a4  nForce CPU bridge",
+"   01ab  nForce 420 Memory Controller (DDR)",
+"   01ac  nForce 220/420 Memory Controller",
+"   01ad  nForce 220/420 Memory Controller",
+"   01b0  nForce Audio",
+"   01b1  nForce Audio",
+"   01b2  nForce ISA Bridge",
+"   01b4  nForce PCI System Management",
+"   01b7  nForce AGP to PCI Bridge",
+"   01b8  nForce PCI-to-PCI bridge",
+"   01bc  nForce IDE",
+"   01c1  nForce AC'97 Modem Controller",
+"   01c2  nForce USB Controller",
+"   01c3  nForce Ethernet Controller",
+"   01d1  GeForce 7300 LE",
+"   01d7  Quadro NVS 110M / GeForce Go 7300",
+"   01d8  GeForce Go 7400",
+"   01da  Quadro NVS 110M",
+"   01de  Quadro FX 350",
+"       10de 01dc  Quadro  FX Go350M",
+"   01df  GeForce 7300 GS",
+"   01e0  nForce2 AGP (different version?)",
+"       147b 1c09  NV7 Motherboard",
+"   01e8  nForce2 AGP",
+"   01ea  nForce2 Memory Controller 0",
+"       a0a0 03b9  UK79G-1394 motherboard",
+"   01eb  nForce2 Memory Controller 1",
+"       a0a0 03b9  UK79G-1394 motherboard",
+"   01ec  nForce2 Memory Controller 2",
+"       a0a0 03b9  UK79G-1394 motherboard",
+"   01ed  nForce2 Memory Controller 3",
+"       a0a0 03b9  UK79G-1394 motherboard",
+"   01ee  nForce2 Memory Controller 4",
+"       a0a0 03b9  UK79G-1394 motherboard",
+"   01ef  nForce2 Memory Controller 5",
+"       a0a0 03b9  UK79G-1394 motherboard",
+"   01f0  NV18 [GeForce4 MX - nForce GPU]",
+"       a0a0 03b5  UK79G-1394 motherboard",
+"   0200  NV20 [GeForce3]",
+"       1043 402f  AGP-V8200 DDR",
+"       1048 0c70  GLADIAC 920",
+"   0201  NV20 [GeForce3 Ti 200]",
+"   0202  NV20 [GeForce3 Ti 500]",
+"       1043 405b  V8200 T5",
+"       1545 002f  Xtasy 6964",
+"   0203  NV20DCC [Quadro DCC]",
+"   0211  NV40 [GeForce 6800]",
+"   0212  NV40 [GeForce 6800 LE]",
+"   0215  NV40 [GeForce 6800 GT]",
+"   0218  NV40 [GeForce 6800 XT]",
+"   0221  NV43 [GeForce 6200]",
+"   0240  C51PV [GeForce 6150]",
+"       1462 7207  K8NGM2 series",
+"   0241  C51 PCI Express Bridge",
+"   0242  C51G [GeForce 6100]",
+"   0243  C51 PCI Express Bridge",
+"   0244  C51 PCI Express Bridge",
+"   0245  C51 PCI Express Bridge",
+"   0246  C51 PCI Express Bridge",
+"   0247  C51 PCI Express Bridge",
+"   0248  C51 PCI Express Bridge",
+"   0249  C51 PCI Express Bridge",
+"   024a  C51 PCI Express Bridge",
+"   024b  C51 PCI Express Bridge",
+"   024c  C51 PCI Express Bridge",
+"   024d  C51 PCI Express Bridge",
+"   024e  C51 PCI Express Bridge",
+"   024f  C51 PCI Express Bridge",
+"   0250  NV25 [GeForce4 Ti 4600]",
+"   0251  NV25 [GeForce4 Ti 4400]",
+"       1043 8023  v8440 GeForce 4 Ti4400",
+"   0252  NV25 [GeForce4 Ti]",
+"   0253  NV25 [GeForce4 Ti 4200]",
+"       107d 2896  WinFast A250 LE TD (Dual VGA/TV-out/DVI)",
+"       147b 8f09  Siluro (Dual VGA/TV-out/DVI)",
+"   0258  NV25GL [Quadro4 900 XGL]",
+"   0259  NV25GL [Quadro4 750 XGL]",
+"   025b  NV25GL [Quadro4 700 XGL]",
+"   0260  MCP51 LPC Bridge",
+"       1462 7207  K8NGM2 series",
+"   0261  MCP51 LPC Bridge",
+"   0262  MCP51 LPC Bridge",
+"   0263  MCP51 LPC Bridge",
+"   0264  MCP51 SMBus",
+"       1462 7207  K8NGM2 series",
+"   0265  MCP51 IDE",
+"       1462 7207  K8NGM2 series",
+"   0266  MCP51 Serial ATA Controller",
+"       1462 7207  K8NGM2 series",
+"   0267  MCP51 Serial ATA Controller",
+"       1462 7207  K8NGM2 series",
+"   0268  MCP51 Ethernet Controller",
+"   0269  MCP51 Ethernet Controller",
+"       1462 7207  K8NGM2 series",
+"   026a  MCP51 MCI",
+"   026b  MCP51 AC97 Audio Controller",
+"   026c  MCP51 High Definition Audio",
+"       1462 7207  K8NGM2 series",
+"   026d  MCP51 USB Controller",
+"       1462 7207  K8NGM2 series",
+"   026e  MCP51 USB Controller",
+"       1462 7207  K8NGM2 series",
+"   026f  MCP51 PCI Bridge",
+"   0270  MCP51 Host Bridge",
+"       1462 7207  K8NGM2 series",
+"   0271  MCP51 PMU",
+"   0272  MCP51 Memory Controller 0",
+"   027e  C51 Memory Controller 2",
+"       1462 7207  K8NGM2 series",
+"   027f  C51 Memory Controller 3",
+"       1462 7207  K8NGM2 series",
+"   0280  NV28 [GeForce4 Ti 4800]",
+"   0281  NV28 [GeForce4 Ti 4200 AGP 8x]",
+"   0282  NV28 [GeForce4 Ti 4800 SE]",
+"   0286  NV28 [GeForce4 Ti 4200 Go AGP 8x]",
+"   0288  NV28GL [Quadro4 980 XGL]",
+"   0289  NV28GL [Quadro4 780 XGL]",
+"   028c  NV28GLM [Quadro4 700 GoGL]",
+"   0290  GeForce 7900 GTX",
+"   0291  GeForce 7900 GT",
+"   029a  G71 [Quadro FX 2500M]",
+"   029b  G71 [Quadro FX 1500M]",
+"   029c  Quadro FX 5500",
+"   029d  Quadro FX 3500",
+"   029e  Quadro FX 1500",
+"   02a0  NV2A [XGPU]",
+"   02e1  GeForce 7600 GS",
+"   02f0  C51 Host Bridge",
+"       1462 7207  K8NGM2 series",
+"   02f1  C51 Host Bridge",
+"   02f2  C51 Host Bridge",
+"   02f3  C51 Host Bridge",
+"   02f4  C51 Host Bridge",
+"   02f5  C51 Host Bridge",
+"   02f6  C51 Host Bridge",
+"   02f7  C51 Host Bridge",
+"   02f8  C51 Memory Controller 5",
+"       1462 7207  K8NGM2 series",
+"   02f9  C51 Memory Controller 4",
+"       1462 7207  K8NGM2 series",
+"   02fa  C51 Memory Controller 0",
+"       1462 7207  K8NGM2 series",
+"   02fb  C51 PCI Express Bridge",
+"   02fc  C51 PCI Express Bridge",
+"   02fd  C51 PCI Express Bridge",
+"   02fe  C51 Memory Controller 1",
+"       1462 7207  K8NGM2 series",
+"   02ff  C51 Host Bridge",
+"       1462 7207  K8NGM2 series",
+"   0300  NV30 [GeForce FX]",
+"   0301  NV30 [GeForce FX 5800 Ultra]",
+"   0302  NV30 [GeForce FX 5800]",
+"   0308  NV30GL [Quadro FX 2000]",
+"   0309  NV30GL [Quadro FX 1000]",
+"   0311  NV31 [GeForce FX 5600 Ultra]",
+"   0312  NV31 [GeForce FX 5600]",
+"   0313  NV31",
+"   0314  NV31 [GeForce FX 5600XT]",
+"       1043 814a  V9560XT/TD",
+"   0316  NV31M",
+"   0317  NV31M Pro",
+"   031a  NV31M [GeForce FX Go5600]",
+"   031b  NV31M [GeForce FX Go5650]",
+"   031c  NVIDIA Quadro FX Go700",
+"   031d  NV31GLM",
+"   031e  NV31GLM Pro",
+"   031f  NV31GLM Pro",
+"   0320  NV34 [GeForce FX 5200]",
+"   0321  NV34 [GeForce FX 5200 Ultra]",
+"   0322  NV34 [GeForce FX 5200]",
+"       1462 9171  MS-8917 (FX5200-T128)",
+"       1462 9360  MS-8936 (FX5200-T128)",
+"   0323  NV34 [GeForce FX 5200LE]",
+"   0324  NV34M [GeForce FX Go5200]",
+"       1028 0196  Inspiron 5160",
+"       1071 8160  MIM2000",
+"   0325  NV34M [GeForce FX Go5250]",
+"   0326  NV34 [GeForce FX 5500]",
+"   0327  NV34 [GeForce FX 5100]",
+"   0328  NV34M [GeForce FX Go5200 32M/64M]",
+"   0329  NV34M [GeForce FX Go5200]",
+"   032a  NV34GL [Quadro NVS 280 PCI]",
+"   032b  NV34GL [Quadro FX 500/600 PCI]",
+"   032c  NV34GLM [GeForce FX Go 5300]",
+"   032d  NV34 [GeForce FX Go5100]",
+"   032f  NV34GL",
+"   0330  NV35 [GeForce FX 5900 Ultra]",
+"   0331  NV35 [GeForce FX 5900]",
+"       1043 8145  V9950GE",
+"   0332  NV35 [GeForce FX 5900XT]",
+"   0333  NV38 [GeForce FX 5950 Ultra]",
+"   0334  NV35 [GeForce FX 5900ZT]",
+"   0338  NV35GL [Quadro FX 3000]",
+"   033f  NV35GL [Quadro FX 700]",
+"   0341  NV36.1 [GeForce FX 5700 Ultra]",
+"   0342  NV36.2 [GeForce FX 5700]",
+"   0343  NV36 [GeForce FX 5700LE]",
+"   0344  NV36.4 [GeForce FX 5700VE]",
+"   0345  NV36.5",
+"   0347  NV36 [GeForce FX Go5700]",
+"       103c 006a  NX9500",
+"   0348  NV36 [GeForce FX Go5700]",
+"   0349  NV36M Pro",
+"   034b  NV36MAP",
+"   034c  NV36 [Quadro FX Go1000]",
+"   034e  NV36GL [Quadro FX 1100]",
+"   034f  NV36GL",
+"   0360  MCP55 LPC Bridge",
+"   0361  MCP55 LPC Bridge",
+"   0362  MCP55 LPC Bridge",
+"   0363  MCP55 LPC Bridge",
+"   0364  MCP55 LPC Bridge",
+"   0365  MCP55 LPC Bridge",
+"   0366  MCP55 LPC Bridge",
+"   0367  MCP55 LPC Bridge",
+"   0368  MCP55 SMBus",
+"   0369  MCP55 Memory Controller",
+"   036a  MCP55 Memory Controller",
+"   036c  MCP55 USB Controller",
+"   036d  MCP55 USB Controller",
+"   036e  MCP55 IDE",
+"   0371  MCP55 High Definition Audio",
+"   0372  MCP55 Ethernet",
+"   0373  MCP55 Ethernet",
+"   037a  MCP55 Memory Controller",
+"   037e  MCP55 SATA Controller",
+"   037f  MCP55 SATA Controller",
+"   0391  G70 [GeForce 7600 GT]",
+"   0392  G70 [GeForce 7600 GS]",
+"   0398  G70 [GeForce Go 7600]",
+"   039e  Quadro FX 560",
+"   03e0  MCP61 LPC Bridge",
+"   03e1  MCP61 LPC Bridge",
+"   03e2  MCP61 LPC Bridge",
+"   03e3  MCP61 LPC Bridge",
+"   03e4  MCP61 High Definition Audio",
+"   03e5  MCP61 Ethernet",
+"   03e6  MCP61 Ethernet",
+"   03e7  MCP61 SATA Controller",
+"   03ea  MCP61 Memory Controller",
+"   03eb  MCP61 SMBus",
+"   03ec  MCP61 IDE",
+"   03ee  MCP61 Ethernet",
+"   03ef  MCP61 Ethernet",
+"   03f0  MCP61 High Definition Audio",
+"   03f1  MCP61 USB Controller",
+"   03f2  MCP61 USB Controller",
+"   03f5  MCP61 Memory Controller",
+"   03f6  MCP61 SATA Controller",
+"   03f7  MCP61 SATA Controller",
+"10df  Emulex Corporation",
+"   1ae5  LP6000 Fibre Channel Host Adapter",
+"   f085  LP850 Fibre Channel Host Adapter",
+"   f095  LP952 Fibre Channel Host Adapter",
+"   f098  LP982 Fibre Channel Host Adapter",
+"   f0a1  Thor LightPulse Fibre Channel Host Adapter",
+"   f0a5  Thor LightPulse Fibre Channel Host Adapter",
+"   f0b5  Viper LightPulse Fibre Channel Host Adapter",
+"   f0d1  Helios LightPulse Fibre Channel Host Adapter",
+"   f0d5  Helios LightPulse Fibre Channel Host Adapter",
+"   f0e1  Zephyr LightPulse Fibre Channel Host Adapter",
+"   f0e5  Zephyr LightPulse Fibre Channel Host Adapter",
+"   f0f5  Neptune LightPulse Fibre Channel Host Adapter",
+"   f700  LP7000 Fibre Channel Host Adapter",
+"   f701  LP7000 Fibre Channel Host Adapter Alternate ID (JX1:2-3, JX2:1-2)",
+"   f800  LP8000 Fibre Channel Host Adapter",
+"   f801  LP8000 Fibre Channel Host Adapter Alternate ID (JX1:2-3, JX2:1-2)",
+"   f900  LP9000 Fibre Channel Host Adapter",
+"   f901  LP9000 Fibre Channel Host Adapter Alternate ID (JX1:2-3, JX2:1-2)",
+"   f980  LP9802 Fibre Channel Host Adapter",
+"   f981  LP9802 Fibre Channel Host Adapter Alternate ID",
+"   f982  LP9802 Fibre Channel Host Adapter Alternate ID",
+"   fa00  Thor-X LightPulse Fibre Channel Host Adapter",
+"   fb00  Viper LightPulse Fibre Channel Host Adapter",
+"   fc00  Thor-X LightPulse Fibre Channel Host Adapter",
+"   fc10  Helios-X LightPulse Fibre Channel Host Adapter",
+"   fc20  Zephyr-X LightPulse Fibre Channel Host Adapter",
+"   fd00  Helios-X LightPulse Fibre Channel Host Adapter",
+"   fe00  Zephyr-X LightPulse Fibre Channel Host Adapter",
+"   ff00  Neptune LightPulse Fibre Channel Host Adapter",
+"10e0  Integrated Micro Solutions Inc.",
+"   5026  IMS5026/27/28",
+"   5027  IMS5027",
+"   5028  IMS5028",
+"   8849  IMS8849",
+"   8853  IMS8853",
+"   9128  IMS9128 [Twin turbo 128]",
+"10e1  Tekram Technology Co.,Ltd.",
+"   0391  TRM-S1040",
+"       10e1 0391  DC-315U SCSI-3 Host Adapter",
+"   690c  DC-690c",
+"   dc29  DC-290",
+"10e2  Aptix Corporation",
+"10e3  Tundra Semiconductor Corp.",
+"   0000  CA91C042 [Universe]",
+"   0148  Tsi148 [Tempe]",
+"   0860  CA91C860 [QSpan]",
+"   0862  CA91C862A [QSpan-II]",
+"   8260  CA91L8200B [Dual PCI PowerSpan II]",
+"   8261  CA91L8260B [Single PCI PowerSpan II]",
+"10e4  Tandem Computers",
+"   8029  Realtek 8029 Network Card",
+"10e5  Micro Industries Corporation",
+"10e6  Gainbery Computer Products Inc.",
+"10e7  Vadem",
+"10e8  Applied Micro Circuits Corp.",
+"   1072  INES GPIB-PCI (AMCC5920 based)",
+"   2011  Q-Motion Video Capture/Edit board",
+"   4750  S5930 [Matchmaker]",
+"   5920  S5920",
+"   8043  LANai4.x [Myrinet LANai interface chip]",
+"   8062  S5933_PARASTATION",
+"   807d  S5933 [Matchmaker]",
+"   8088  Kongsberg Spacetec Format Synchronizer",
+"   8089  Kongsberg Spacetec Serial Output Board",
+"   809c  S5933_HEPC3",
+"   80d7  PCI-9112",
+"   80d9  PCI-9118",
+"   80da  PCI-9812",
+"   811a  PCI-IEEE1355-DS-DE Interface",
+"   814c  Fastcom ESCC-PCI (Commtech, Inc.)",
+"   8170  S5933 [Matchmaker] (Chipset Development Tool)",
+"   81e6  Multimedia video controller",
+"   8291  Fastcom 232/8-PCI (Commtech, Inc.)",
+"   82c4  Fastcom 422/4-PCI (Commtech, Inc.)",
+"   82c5  Fastcom 422/2-PCI (Commtech, Inc.)",
+"   82c6  Fastcom IG422/1-PCI (Commtech, Inc.)",
+"   82c7  Fastcom IG232/2-PCI (Commtech, Inc.)",
+"   82ca  Fastcom 232/4-PCI (Commtech, Inc.)",
+"   82db  AJA HDNTV HD SDI Framestore",
+"   82e2  Fastcom DIO24H-PCI (Commtech, Inc.)",
+"   8851  S5933 on Innes Corp FM Radio Capture card",
+"10e9  Alps Electric Co., Ltd.",
+"10ea  Intergraphics Systems",
+"   1680  IGA-1680",
+"   1682  IGA-1682",
+"   1683  IGA-1683",
+"   2000  CyberPro 2000",
+"   2010  CyberPro 2000A",
+"   5000  CyberPro 5000",
+"   5050  CyberPro 5050",
+"   5202  CyberPro 5202",
+"   5252  CyberPro5252",
+"10eb  Artists Graphics",
+"   0101  3GA",
+"   8111  Twist3 Frame Grabber",
+"10ec  Realtek Semiconductor Co., Ltd.",
+"   0139  Zonet Zen3200",
+"   8029  RTL-8029(AS)",
+"       10b8 2011  EZ-Card (SMC1208)",
+"       10ec 8029  RTL-8029(AS)",
+"       1113 1208  EN1208",
+"       1186 0300  DE-528",
+"       1259 2400  AT-2400",
+"   8129  RTL-8129",
+"       10ec 8129  RT8129 Fast Ethernet Adapter",
+"   8138  RT8139 (B/C) Cardbus Fast Ethernet Adapter",
+"       10ec 8138  RT8139 (B/C) Fast Ethernet Adapter",
+"   8139  RTL-8139/8139C/8139C+",
+"       0357 000a  TTP-Monitoring Card V2.0",
+"       1025 005a  TravelMate 290",
+"       1025 8920  ALN-325",
+"       1025 8921  ALN-325",
+"       103c 006a  NX9500",
+"       1043 8109  P5P800-MX Mainboard",
+"       1071 8160  MIM2000",
+"       10bd 0320  EP-320X-R",
+"       10ec 8139  RT8139",
+"       1113 ec01  FNC-0107TX",
+"       1186 1300  DFE-538TX",
+"       1186 1320  SN5200",
+"       1186 8139  DRN-32TX",
+"       11f6 8139  FN22-3(A) LinxPRO Ethernet Adapter",
+"       1259 2500  AT-2500TX",
+"       1259 2503  AT-2500TX/ACPI",
+"       1429 d010  ND010",
+"       1432 9130  EN-9130TX",
+"       1436 8139  RT8139",
+"       1458 e000  GA-7VM400M/7VT600 Motherboard",
+"       1462 788c  865PE Neo2-V Mainboard",
+"       146c 1439  FE-1439TX",
+"       1489 6001  GF100TXRII",
+"       1489 6002  GF100TXRA",
+"       149c 139a  LFE-8139ATX",
+"       149c 8139  LFE-8139TX",
+"       14cb 0200  LNR-100 Family 10/100 Base-TX Ethernet",
+"       1695 9001  Onboard RTL8101L 10/100 MBit",
+"       1799 5000  F5D5000 PCI Card/Desktop Network PCI Card",
+"       1904 8139  RTL8139D Fast Ethernet Adapter",
+"       2646 0001  EtheRx",
+"       8e2e 7000  KF-230TX",
+"       8e2e 7100  KF-230TX/2",
+"       a0a0 0007  ALN-325C",
+"   8169  RTL-8169 Gigabit Ethernet",
+"       1025 0079  Aspire 5024WLMi",
+"       1259 c107  CG-LAPCIGT",
+"       1371 434e  ProG-2000L",
+"       1458 e000  GA-8I915ME-G Mainboard",
+"       1462 702c  K8T NEO 2 motherboard",
+"   8180  RTL8180L 802.11b MAC",
+"   8185  RTL-8185 IEEE 802.11a/b/g Wireless LAN Controller",
+"   8197  SmartLAN56 56K Modem",
+"10ed  Ascii Corporation",
+"   7310  V7310",
+"10ee  Xilinx Corporation",
+"   0205  Wildcard TE205P",
+"   0210  Wildcard TE210P",
+"   0314  Wildcard TE405P/TE410P (1st Gen)",
+"   0405  Wildcard TE405P (2nd Gen)",
+"   0410  Wildcard TE410P (2nd Gen)",
+"   3fc0  RME Digi96",
+"   3fc1  RME Digi96/8",
+"   3fc2  RME Digi96/8 Pro",
+"   3fc3  RME Digi96/8 Pad",
+"   3fc4  RME Digi9652 (Hammerfall)",
+"   3fc5  RME Hammerfall DSP",
+"   3fc6  RME Hammerfall DSP MADI",
+"   8381  Ellips Santos Frame Grabber",
+"   d154  Copley Controls CAN card (PCI-CAN-02)",
+"10ef  Racore Computer Products, Inc.",
+"   8154  M815x Token Ring Adapter",
+"10f0  Peritek Corporation",
+"10f1  Tyan Computer",
+"   2865  Tyan Thunder K8E S2865",
+"10f2  Achme Computer, Inc.",
+"10f3  Alaris, Inc.",
+"10f4  S-MOS Systems, Inc.",
+"10f5  NKK Corporation",
+"   a001  NDR4000 [NR4600 Bridge]",
+"10f6  Creative Electronic Systems SA",
+"10f7  Matsushita Electric Industrial Co., Ltd.",
+"10f8  Altos India Ltd",
+"10f9  PC Direct",
+"10fa  Truevision",
+"   000c  TARGA 1000",
+"10fb  Thesys Gesellschaft fuer Mikroelektronik mbH",
+"   186f  TH 6255",
+"10fc  I-O Data Device, Inc.",
+"   0003  Cardbus IDE Controller",
+"   0005  Cardbus SCSI CBSC II",
+"10fd  Soyo Computer, Inc",
+"10fe  Fast Multimedia AG",
+"10ff  NCube",
+"1100  Jazz Multimedia",
+"1101  Initio Corporation",
+"   1060  INI-A100U2W",
+"   9100  INI-9100/9100W",
+"   9400  INI-940",
+"   9401  INI-950",
+"   9500  360P",
+"   9502  Initio INI-9100UW Ultra Wide SCSI Controller INIC-950P chip",
+"1102  Creative Labs",
+"   0002  SB Live! EMU10k1",
+"       1102 0020  CT4850 SBLive! Value",
+"       1102 0021  CT4620 SBLive!",
+"       1102 002f  SBLive! mainboard implementation",
+"       1102 100a  SB Live! 5.1 Digital OEM [SB0220]",
+"       1102 4001  E-mu APS",
+"       1102 8022  CT4780 SBLive! Value",
+"       1102 8023  CT4790 SoundBlaster PCI512",
+"       1102 8024  CT4760 SBLive!",
+"       1102 8025  SBLive! Mainboard Implementation",
+"       1102 8026  CT4830 SBLive! Value",
+"       1102 8027  CT4832 SBLive! Value",
+"       1102 8028  CT4760 SBLive! OEM version",
+"       1102 8031  CT4831 SBLive! Value",
+"       1102 8040  CT4760 SBLive!",
+"       1102 8051  CT4850 SBLive! Value",
+"       1102 8061  SBLive! Player 5.1",
+"       1102 8064  SBLive! 5.1 Model SB0100",
+"       1102 8065  SBLive! 5.1 Digital Model SB0220",
+"       1102 8067  SBLive! 5.1 eMicro 28028",
+"   0004  SB Audigy",
+"       1102 0051  SB0090 Audigy Player",
+"       1102 0053  SB0090 Audigy Player/OEM",
+"       1102 0058  SB0090 Audigy Player/OEM",
+"       1102 1007  SB0240 Audigy 2 Platinum 6.1",
+"       1102 2002  SB Audigy 2 ZS (SB0350)",
+"   0006  [SB Live! Value] EMU10k1X",
+"   0007  SB Audigy LS",
+"       1102 0007  SBLive! 24bit",
+"       1102 1001  SB0310 Audigy LS",
+"       1102 1002  SB0312 Audigy LS",
+"       1102 1006  SB0410 SBLive! 24-bit",
+"       1462 1009  K8N Diamond",
+"   0008  SB0400 Audigy2 Value",
+"       1102 0008  EMU0404 Digital Audio System",
+"   4001  SB Audigy FireWire Port",
+"       1102 0010  SB Audigy FireWire Port",
+"   7002  SB Live! Game Port",
+"       1102 0020  Gameport Joystick",
+"   7003  SB Audigy Game Port",
+"       1102 0040  SB Audigy MIDI/Game Port",
+"   7004  [SB Live! Value] Input device controller",
+"   7005  SB Audigy LS Game Port",
+"       1102 1001  SB0310 Audigy LS MIDI/Game port",
+"       1102 1002  SB0312 Audigy LS MIDI/Game port",
+"   8064  SB0100 [SBLive! 5.1 OEM]",
+"   8938  Ectiva EV1938",
+"       1033 80e5  SlimTower-Jim (NEC)",
+"       1071 7150  Mitac 7150",
+"       110a 5938  Siemens Scenic Mobile 510PIII",
+"       13bd 100c  Ceres-C (Sharp, Intel BX)",
+"       13bd 100d  Sharp, Intel Banister",
+"       13bd 100e  TwinHead P09S/P09S3 (Sharp)",
+"       13bd f6f1  Marlin (Sharp)",
+"       14ff 0e70  P88TE (TWINHEAD INTERNATIONAL Corp)",
+"       14ff c401  Notebook 9100/9200/2000 (TWINHEAD INTERNATIONAL Corp)",
+"       156d b400  G400 - Geo (AlphaTop (Taiwan))",
+"       156d b550  G560  (AlphaTop (Taiwan))",
+"       156d b560  G560  (AlphaTop (Taiwan))",
+"       156d b700  G700/U700  (AlphaTop (Taiwan))",
+"       156d b795  G795  (AlphaTop (Taiwan))",
+"       156d b797  G797  (AlphaTop (Taiwan))",
+"1103  Triones Technologies, Inc.",
+"   0003  HPT343/345/346/363",
+"   0004  HPT366/368/370/370A/372/372N",
+"       1103 0001  HPT370A",
+"       1103 0004  HPT366 UDMA66 (r1) / HPT368 UDMA66 (r2) / HPT370 UDMA100 (r3) / HPT370 UDMA100 RAID (r4)",
+"       1103 0005  HPT370 UDMA100",
+"   0005  HPT372A/372N",
+"   0006  HPT302/302N",
+"   0007  HPT371/371N",
+"   0008  HPT374",
+"   0009  HPT372N",
+"1104  RasterOps Corp.",
+"1105  Sigma Designs, Inc.",
+"   1105  REALmagic Xcard MPEG 1/2/3/4 DVD Decoder",
+"   8300  REALmagic Hollywood Plus DVD Decoder",
+"   8400  EM840x REALmagic DVD/MPEG-2 Audio/Video Decoder",
+"   8401  EM8401 REALmagic DVD/MPEG-2 A/V Decoder",
+"   8470  EM8470 REALmagic DVD/MPEG-4 A/V Decoder",
+"   8471  EM8471 REALmagic DVD/MPEG-4 A/V Decoder",
+"   8475  EM8475 REALmagic DVD/MPEG-4 A/V Decoder",
+"       1105 0001  REALmagic X-Card",
+"   8476  EM8476 REALmagic DVD/MPEG-4 A/V Decoder",
+"       127d 0000  CineView II",
+"   8485  EM8485 REALmagic DVD/MPEG-4 A/V Decoder",
+"   8486  EM8486 REALmagic DVD/MPEG-4 A/V Decoder",
+"1106  VIA Technologies, Inc.",
+"   0102  Embedded VIA Ethernet Controller",
+"   0130  VT6305 1394.A Controller",
+"   0204  K8M800 Host Bridge",
+"   0208  PT890 Host Bridge",
+"   0238  K8T890 Host Bridge",
+"   0258  PT880 Host Bridge",
+"   0259  CN400/PM880 Host Bridge",
+"   0269  KT880 Host Bridge",
+"   0282  K8T800Pro Host Bridge",
+"       1043 80a3  A8V Deluxe",
+"   0290  K8M890 Host Bridge",
+"   0293  PM896 Host Bridge",
+"   0296  P4M800 Host Bridge",
+"   0305  VT8363/8365 [KT133/KM133]",
+"       1019 0987  K7VZA Mainboard",
+"       1043 8033  A7V Mainboard",
+"       1043 803e  A7V-E Mainboard",
+"       1043 8042  A7V133/A7V133-C Mainboard",
+"       147b a401  KT7/KT7-RAID/KT7A/KT7A-RAID Mainboard",
+"   0308  PT894 Host Bridge",
+"   0314  CN700/VN800/P4M800CE/Pro Host Bridge",
+"   0324  CX700 Host Bridge",
+"   0327  P4M890 Host Bridge",
+"   0336  K8M890CE Host Bridge",
+"   0340  PT900 Host Bridge",
+"   0351  VT3351 Host Bridge",
+"   0364  P4M900 Host Bridge",
+"   0391  VT8371 [KX133]",
+"   0501  VT8501 [Apollo MVP4]",
+"   0505  VT82C505",
+"   0561  VT82C576MV",
+"   0571  VT82C586A/B/VT82C686/A/B/VT823x/A/C PIPC Bus Master IDE",
+"       1019 0985  P6VXA Motherboard",
+"       1019 0a81  L7VTA v1.0 Motherboard (KT400-8235)",
+"       1043 8052  VT8233A Bus Master ATA100/66/33 IDE",
+"       1043 808c  A7V8X / A7V333 motherboard",
+"       1043 80a1  A7V8X-X motherboard rev. 1.01",
+"       1043 80ed  A7V600/K8V-X/A8V Deluxe motherboard",
+"       1106 0571  VT82C586/B/VT82C686/A/B/VT8233/A/C/VT8235 PIPC Bus Master IDE",
+"       1179 0001  Magnia Z310",
+"       1297 f641  FX41 motherboard",
+"       1458 5002  GA-7VAX Mainboard",
+"       1462 7020  K8T NEO 2 motherboard",
+"       147b 1407  KV8-MAX3 motherboard",
+"       1849 0571  K7VT2/K7VT6 motherboard",
+"   0576  VT82C576 3V [Apollo Master]",
+"   0585  VT82C585VP [Apollo VP1/VPX]",
+"   0586  VT82C586/A/B PCI-to-ISA [Apollo VP]",
+"       1106 0000  MVP3 ISA Bridge",
+"   0591  VT8237A SATA 2-Port Controller",
+"   0595  VT82C595 [Apollo VP2]",
+"   0596  VT82C596 ISA [Mobile South]",
+"       1106 0000  VT82C596/A/B PCI to ISA Bridge",
+"       1458 0596  VT82C596/A/B PCI to ISA Bridge",
+"   0597  VT82C597 [Apollo VP3]",
+"   0598  VT82C598 [Apollo MVP3]",
+"   0601  VT8601 [Apollo ProMedia]",
+"   0605  VT8605 [ProSavage PM133]",
+"       1043 802c  CUV4X mainboard",
+"   0680  VT82C680 [Apollo P6]",
+"   0686  VT82C686 [Apollo Super South]",
+"       1019 0985  P6VXA Motherboard",
+"       1043 802c  CUV4X mainboard",
+"       1043 8033  A7V Mainboard",
+"       1043 803e  A7V-E Mainboard",
+"       1043 8040  A7M266 Mainboard",
+"       1043 8042  A7V133/A7V133-C Mainboard",
+"       1106 0000  VT82C686/A PCI to ISA Bridge",
+"       1106 0686  VT82C686/A PCI to ISA Bridge",
+"       1179 0001  Magnia Z310",
+"       147b a702  KG7-Lite Mainboard",
+"   0691  VT82C693A/694x [Apollo PRO133x]",
+"       1019 0985  P6VXA Motherboard",
+"       1179 0001  Magnia Z310",
+"       1458 0691  VT82C691 Apollo Pro System Controller",
+"   0693  VT82C693 [Apollo Pro Plus]",
+"   0698  VT82C693A [Apollo Pro133 AGP]",
+"   0926  VT82C926 [Amazon]",
+"   1000  VT82C570MV",
+"   1106  VT82C570MV",
+"   1204  K8M800 Host Bridge",
+"   1208  PT890 Host Bridge",
+"   1238  K8T890 Host Bridge",
+"   1258  PT880 Host Bridge",
+"   1259  CN400/PM880 Host Bridge",
+"   1269  KT880 Host Bridge",
+"   1282  K8T800Pro Host Bridge",
+"   1290  K8M890 Host Bridge",
+"   1293  PM896 Host Bridge",
+"   1296  P4M800 Host Bridge",
+"   1308  PT894 Host Bridge",
+"   1314  CN700/VN800/P4M800CE/Pro Host Bridge",
+"   1324  CX700 Host Bridge",
+"   1327  P4M890 Host Bridge",
+"   1336  K8M890CE Host Bridge",
+"   1340  PT900 Host Bridge",
+"   1351  VT3351 Host Bridge",
+"   1364  P4M900 Host Bridge",
+"   1571  VT82C576M/VT82C586",
+"   1595  VT82C595/97 [Apollo VP2/97]",
+"   2204  K8M800 Host Bridge",
+"   2208  PT890 Host Bridge",
+"   2238  K8T890 Host Bridge",
+"   2258  PT880 Host Bridge",
+"   2259  CN400/PM880 Host Bridge",
+"   2269  KT880 Host Bridge",
+"   2282  K8T800Pro Host Bridge",
+"   2290  K8M890 Host Bridge",
+"   2293  PM896 Host Bridge",
+"   2296  P4M800 Host Bridge",
+"   2308  PT894 Host Bridge",
+"   2314  CN700/VN800/P4M800CE/Pro Host Bridge",
+"   2324  CX700 Host Bridge",
+"   2327  P4M890 Host Bridge",
+"   2336  K8M890CE Host Bridge",
+"   2340  PT900 Host Bridge",
+"   2351  VT3351 Host Bridge",
+"   2364  P4M900 Host Bridge",
+"   287a  VT8251 PCI to PCI Bridge",
+"   287b  VT8251 Host Bridge",
+"   287c  VT8251 PCIE Root Port",
+"   287d  VT8251 PCIE Root Port",
+"   287e  VT8251 Ultra VLINK Controller",
+"   3022  CLE266",
+"   3038  VT82xxxxx UHCI USB 1.1 Controller",
+"       0925 1234  USB Controller",
+"       1019 0985  P6VXA Motherboard",
+"       1019 0a81  L7VTA v1.0 Motherboard (KT400-8235)",
+"       1043 8080  A7V333 motherboard",
+"       1043 808c  VT6202 USB2.0 4 port controller",
+"       1043 80a1  A7V8X-X motherboard",
+"       1043 80ed  A7V600/K8V-X/A8V Deluxe motherboard",
+"       1179 0001  Magnia Z310",
+"       1458 5004  GA-7VAX Mainboard",
+"       1462 7020  K8T NEO 2 motherboard",
+"       147b 1407  KV8-MAX3 motherboard",
+"       182d 201d  CN-029 USB2.0 4 port PCI Card",
+"       1849 3038  K7VT6",
+"   3040  VT82C586B ACPI",
+"   3043  VT86C100A [Rhine]",
+"       10bd 0000  VT86C100A Fast Ethernet Adapter",
+"       1106 0100  VT86C100A Fast Ethernet Adapter",
+"       1186 1400  DFE-530TX rev A",
+"   3044  IEEE 1394 Host Controller",
+"       1025 005a  TravelMate 290",
+"       1043 808a  A8V Deluxe",
+"       1458 1000  GA-7VT600-1394 Motherboard",
+"       1462 207d  K8NGM2 series motherboard",
+"       1462 702d  K8T NEO 2 motherboard",
+"       1462 971d  MS-6917",
+"   3050  VT82C596 Power Management",
+"   3051  VT82C596 Power Management",
+"   3053  VT6105M [Rhine-III]",
+"   3057  VT82C686 [Apollo Super ACPI]",
+"       1019 0985  P6VXA Motherboard",
+"       1019 0987  K7VZA Motherboard",
+"       1043 8033  A7V Mainboard",
+"       1043 803e  A7V-E Mainboard",
+"       1043 8040  A7M266 Mainboard",
+"       1043 8042  A7V133/A7V133-C Mainboard",
+"       1179 0001  Magnia Z310",
+"   3058  VT82C686 AC97 Audio Controller",
+"       0e11 0097  SoundMax Digital Integrated Audio",
+"       0e11 b194  Soundmax integrated digital audio",
+"       1019 0985  P6VXA Motherboard",
+"       1019 0987  K7VZA Motherboard",
+"       1043 1106  A7V133/A7V133-C Mainboard",
+"       1106 4511  Onboard Audio on EP7KXA",
+"       1458 7600  Onboard Audio",
+"       1462 3091  MS-6309 Onboard Audio",
+"       1462 3300  MS-6330 Onboard Audio",
+"       15dd 7609  Onboard Audio",
+"   3059  VT8233/A/8235/8237 AC97 Audio Controller",
+"       1019 0a81  L7VTA v1.0 Motherboard (KT400-8235)",
+"       1043 8095  A7V8X Motherboard (Realtek ALC650 codec)",
+"       1043 80a1  A7V8X-X Motherboard",
+"       1043 80b0  A7V600/K8V Deluxe motherboard (ADI AD1980 codec [SoundMAX])",
+"       1043 812a  A8V Deluxe motherboard (Realtek ALC850 codec)",
+"       1106 3059  L7VMM2 Motherboard",
+"       1106 4161  K7VT2 motherboard",
+"       1106 4170  PCPartner P4M800-8237R Motherboard",
+"       1106 4552  Soyo KT-600 Dragon Plus (Realtek ALC 650)",
+"       1297 c160  FX41 motherboard (Realtek ALC650 codec)",
+"       1458 a002  GA-7VAX Onboard Audio (Realtek ALC650)",
+"       1462 0080  K8T NEO 2 motherboard",
+"       1462 3800  KT266 onboard audio",
+"       147b 1407  KV8-MAX3 motherboard",
+"       1849 9761  K7VT6 motherboard",
+"       4005 4710  MSI K7T266 Pro2-RU (MSI-6380 v2) onboard audio (Realtek/ALC 200/200P)",
+"       a0a0 01b6  AK77-8XN onboard audio",
+"   3065  VT6102 [Rhine-II]",
+"       1043 80a1  A7V8X-X Motherboard",
+"       1106 0102  VT6102 [Rhine II] Embeded Ethernet Controller on VT8235",
+"       1186 1400  DFE-530TX rev A",
+"       1186 1401  DFE-530TX rev B",
+"       13b9 1421  LD-10/100AL PCI Fast Ethernet Adapter (rev.B)",
+"       147b 1c09  NV7 Motherboard",
+"       1695 3005  VT6103",
+"       1695 300c  Realtek ALC655 sound chip",
+"       1849 3065  K7VT6 motherboard",
+"   3068  AC'97 Modem Controller",
+"       1462 309e  MS-6309 Saturn Motherboard",
+"   3074  VT8233 PCI to ISA Bridge",
+"       1043 8052  VT8233A",
+"   3091  VT8633 [Apollo Pro266]",
+"   3099  VT8366/A/7 [Apollo KT266/A/333]",
+"       1043 8064  A7V266-E Mainboard",
+"       1043 807f  A7V333 Mainboard",
+"       1849 3099  K7VT2 motherboard",
+"   3101  VT8653 Host Bridge",
+"   3102  VT8662 Host Bridge",
+"   3103  VT8615 Host Bridge",
+"   3104  USB 2.0",
+"       1019 0a81  L7VTA v1.0 Motherboard (KT400-8235)",
+"       1043 808c  A7V8X motherboard",
+"       1043 80a1  A7V8X-X motherboard rev 1.01",
+"       1043 80ed  A7V600/K8V-X/A8V Deluxe motherboard",
+"       1297 f641  FX41 motherboard",
+"       1458 5004  GA-7VAX Mainboard",
+"       1462 7020  K8T NEO 2 motherboard",
+"       147b 1407  KV8-MAX3 motherboard",
+"       182d 201d  CN-029 USB 2.0 4 port PCI Card",
+"       1849 3104  K7VT6 motherboard",
+"   3106  VT6105 [Rhine-III]",
+"       1186 1403  DFE-530TX rev C",
+"   3108  S3 Unichrome Pro VGA Adapter",
+"   3109  VT8233C PCI to ISA Bridge",
+"   3112  VT8361 [KLE133] Host Bridge",
+"   3113  VPX/VPX2 PCI to PCI Bridge Controller",
+"   3116  VT8375 [KM266/KL266] Host Bridge",
+"       1297 f641  FX41 motherboard",
+"   3118  S3 Unichrome Pro VGA Adapter",
+"   3119  VT6120/VT6121/VT6122 Gigabit Ethernet Adapter",
+"   3122  VT8623 [Apollo CLE266] integrated CastleRock graphics",
+"   3123  VT8623 [Apollo CLE266]",
+"   3128  VT8753 [P4X266 AGP]",
+"   3133  VT3133 Host Bridge",
+"   3147  VT8233A ISA Bridge",
+"       1043 808c  A7V333 motherboard",
+"   3148  P4M266 Host Bridge",
+"   3149  VIA VT6420 SATA RAID Controller",
+"       1043 80ed  A7V600/K8V Deluxe/K8V-X/A8V Deluxe motherboard",
+"       1458 b003  GA-7VM400AM(F) Motherboard",
+"       1462 7020  K8T Neo 2 Motherboard",
+"       147b 1407  KV8-MAX3 motherboard",
+"       147b 1408  KV7",
+"       1849 3149  K7VT6 motherboard",
+"   3156  P/KN266 Host Bridge",
+"   3164  VT6410 ATA133 RAID controller",
+"       1043 80f4  P4P800 Mainboard Deluxe ATX",
+"       1462 7028  915P/G Neo2",
+"   3168  VT8374 P4X400 Host Controller/AGP Bridge",
+"   3177  VT8235 ISA Bridge",
+"       1019 0a81  L7VTA v1.0 Motherboard (KT400-8235)",
+"       1043 808c  A7V8X motherboard",
+"       1043 80a1  A7V8X-X motherboard",
+"       1297 f641  FX41 motherboard",
+"       1458 5001  GA-7VAX Mainboard",
+"       1849 3177  K7VT2 motherboard",
+"   3178  ProSavageDDR P4N333 Host Bridge",
+"   3188  VT8385 [K8T800 AGP] Host Bridge",
+"       1043 80a3  K8V Deluxe/K8V-X motherboard",
+"       147b 1407  KV8-MAX3 motherboard",
+"   3189  VT8377 [KT400/KT600 AGP] Host Bridge",
+"       1043 807f  A7V8X motherboard",
+"       1458 5000  GA-7VAX Mainboard",
+"       1849 3189  K7VT6 motherboard",
+"   3204  K8M800 Host Bridge",
+"   3205  VT8378 [KM400/A] Chipset Host Bridge",
+"       1458 5000  GA-7VM400M Motherboard",
+"   3208  PT890 Host Bridge",
+"   3213  VPX/VPX2 PCI to PCI Bridge Controller",
+"   3218  K8T800M Host Bridge",
+"   3227  VT8237 ISA bridge [KT600/K8T800/K8T890 South]",
+"       1043 80ed  A7V600/K8V-X/A8V Deluxe motherboard",
+"       1106 3227  DFI KT600-AL Motherboard",
+"       1458 5001  GA-7VT600 Motherboard",
+"       147b 1407  KV8-MAX3 motherboard",
+"       1849 3227  K7VT4 motherboard",
+"   3238  K8T890 Host Bridge",
+"   3249  VT6421 IDE RAID Controller",
+"   324a  CX700 PCI to PCI Bridge",
+"   324b  CX700 Host Bridge",
+"   324e  CX700 Internal Module Bus",
+"   3258  PT880 Host Bridge",
+"   3259  CN400/PM880 Host Bridge",
+"   3269  KT880 Host Bridge",
+"   3282  K8T800Pro Host Bridge",
+"   3287  VT8251 PCI to ISA Bridge",
+"   3288  VIA High Definition Audio Controller",
+"   3290  K8M890 Host Bridge",
+"   3296  P4M800 Host Bridge",
+"   3324  CX700 Host Bridge",
+"   3327  P4M890 Host Bridge",
+"   3336  K8M890CE Host Bridge",
+"   3337  VT8237A PCI to ISA Bridge",
+"   3340  PT900 Host Bridge",
+"   3344  UniChrome Pro IGP",
+"   3349  VT8251 AHCI/SATA 4-Port Controller",
+"   3351  VT3351 Host Bridge",
+"   3364  P4M900 Host Bridge",
+"   337a  VT8237A PCI to PCI Bridge",
+"   337b  VT8237A Host Bridge",
+"   4149  VIA VT6420 (ATA133) Controller",
+"   4204  K8M800 Host Bridge",
+"   4208  PT890 Host Bridge",
+"   4238  K8T890 Host Bridge",
+"   4258  PT880 Host Bridge",
+"   4259  CN400/PM880 Host Bridge",
+"   4269  KT880 Host Bridge",
+"   4282  K8T800Pro Host Bridge",
+"   4290  K8M890 Host Bridge",
+"   4293  PM896 Host Bridge",
+"   4296  P4M800 Host Bridge",
+"   4308  PT894 Host Bridge",
+"   4314  CN700/VN800/P4M800CE/Pro Host Bridge",
+"   4324  CX700 Host Bridge",
+"   4327  P4M890 Host Bridge",
+"   4336  K8M890CE Host Bridge",
+"   4340  PT900 Host Bridge",
+"   4351  VT3351 Host Bridge",
+"   4364  P4M900 Host Bridge",
+"   5030  VT82C596 ACPI [Apollo PRO]",
+"   5208  PT890 I/O APIC Interrupt Controller",
+"   5238  K8T890 I/O APIC Interrupt Controller",
+"   5290  K8M890 I/O APIC Interrupt Controller",
+"   5308  PT894 I/O APIC Interrupt Controller",
+"   5327  P4M890 I/O APIC Interrupt Controller",
+"   5336  K8M890CE I/O APIC Interrupt Controller",
+"   5340  PT900 I/O APIC Interrupt Controller",
+"   5351  VT3351 I/O APIC Interrupt Controller",
+"   5364  P4M900 I/O APIC Interrupt Controller",
+"   6100  VT85C100A [Rhine II]",
+"   6327  P4M890 Security Device",
+"   7204  K8M800 Host Bridge",
+"   7205  VT8378 [S3 UniChrome] Integrated Video",
+"       1458 d000  Gigabyte GA-7VM400(A)M(F) Motherboard",
+"   7208  PT890 Host Bridge",
+"   7238  K8T890 Host Bridge",
+"   7258  PT880 Host Bridge",
+"   7259  CN400/PM880 Host Bridge",
+"   7269  KT880 Host Bridge",
+"   7282  K8T800Pro Host Bridge",
+"   7290  K8M890 Host Bridge",
+"   7293  PM896 Host Bridge",
+"   7296  P4M800 Host Bridge",
+"   7308  PT894 Host Bridge",
+"   7314  CN700/VN800/P4M800CE/Pro Host Bridge",
+"   7324  CX700 Host Bridge",
+"   7327  P4M890 Host Bridge",
+"   7336  K8M890CE Host Bridge",
+"   7340  PT900 Host Bridge",
+"   7351  VT3351 Host Bridge",
+"   7364  P4M900 Host Bridge",
+"   8231  VT8231 [PCI-to-ISA Bridge]",
+"   8235  VT8235 ACPI",
+"   8305  VT8363/8365 [KT133/KM133 AGP]",
+"   8324  CX700 PCI to ISA Bridge",
+"   8391  VT8371 [KX133 AGP]",
+"   8501  VT8501 [Apollo MVP4 AGP]",
+"   8596  VT82C596 [Apollo PRO AGP]",
+"   8597  VT82C597 [Apollo VP3 AGP]",
+"   8598  VT82C598/694x [Apollo MVP3/Pro133x AGP]",
+"       1019 0985  P6VXA Motherboard",
+"   8601  VT8601 [Apollo ProMedia AGP]",
+"   8605  VT8605 [PM133 AGP]",
+"   8691  VT82C691 [Apollo Pro]",
+"   8693  VT82C693 [Apollo Pro Plus] PCI Bridge",
+"   a208  PT890 PCI to PCI Bridge Controller",
+"   a238  K8T890 PCI to PCI Bridge Controller",
+"   a327  P4M890 PCI to PCI Bridge Controller",
+"   a364  P4M900 PCI to PCI Bridge Controller",
+"   b091  VT8633 [Apollo Pro266 AGP]",
+"   b099  VT8366/A/7 [Apollo KT266/A/333 AGP]",
+"   b101  VT8653 AGP Bridge",
+"   b102  VT8362 AGP Bridge",
+"   b103  VT8615 AGP Bridge",
+"   b112  VT8361 [KLE133] AGP Bridge",
+"   b113  VPX/VPX2 I/O APIC Interrupt Controller",
+"   b115  VT8363/8365 [KT133/KM133] PCI Bridge",
+"   b168  VT8235 PCI Bridge",
+"   b188  VT8237 PCI bridge [K8T800/K8T890 South]",
+"       147b 1407  KV8-MAX3 motherboard",
+"   b198  VT8237 PCI Bridge",
+"   b213  VPX/VPX2 I/O APIC Interrupt Controller",
+"   b999  [K8T890 North / VT8237 South] PCI Bridge",
+"   c208  PT890 PCI to PCI Bridge Controller",
+"   c238  K8T890 PCI to PCI Bridge Controller",
+"   c327  P4M890 PCI to PCI Bridge Controller",
+"   c340  PT900 PCI to PCI Bridge Controller",
+"   c364  P4M900 PCI to PCI Bridge Controller",
+"   d104  VT8237 Integrated Fast Ethernet Controller",
+"   d208  PT890 PCI to PCI Bridge Controller",
+"   d213  VPX/VPX2 PCI to PCI Bridge Controller",
+"   d238  K8T890 PCI to PCI Bridge Controller",
+"   d340  PT900 PCI to PCI Bridge Controller",
+"   e208  PT890 PCI to PCI Bridge Controller",
+"   e238  K8T890 PCI to PCI Bridge Controller",
+"   e340  PT900 PCI to PCI Bridge Controller",
+"   f208  PT890 PCI to PCI Bridge Controller",
+"   f238  K8T890 PCI to PCI Bridge Controller",
+"   f340  PT900 PCI to PCI Bridge Controller",
+"1107  Stratus Computers",
+"   0576  VIA VT82C570MV [Apollo] (Wrong vendor ID!)",
+"1108  Proteon, Inc.",
+"   0100  p1690plus_AA",
+"   0101  p1690plus_AB",
+"   0105  P1690Plus",
+"   0108  P1690Plus",
+"   0138  P1690Plus",
+"   0139  P1690Plus",
+"   013c  P1690Plus",
+"   013d  P1690Plus",
+"1109  Cogent Data Technologies, Inc.",
+"   1400  EM110TX [EX110TX]",
+"110a  Siemens Nixdorf AG",
+"   0002  Pirahna 2-port",
+"   0005  Tulip controller, power management, switch extender",
+"   0006  FSC PINC (I/O-APIC)",
+"   0015  FSC Multiprocessor Interrupt Controller",
+"   001d  FSC Copernicus Management Controller",
+"   007b  FSC Remote Service Controller, mailbox device",
+"   007c  FSC Remote Service Controller, shared memory device",
+"   007d  FSC Remote Service Controller, SMIC device",
+"   2101  HST SAPHIR V Primary PCI (ISDN/PMx)",
+"   2102  DSCC4 PEB/PEF 20534 DMA Supported Serial Communication Controller with 4 Channels",
+"   2104  Eicon Diva 2.02 compatible passive ISDN card",
+"   3142  SIMATIC NET CP 5613A1 (Profibus Adapter)",
+"   4021  SIMATIC NET CP 5512 (Profibus and MPI Cardbus Adapter)",
+"   4029  SIMATIC NET CP 5613A2 (Profibus Adapter)",
+"   4942  FPGA I-Bus Tracer for MBD",
+"   6120  SZB6120",
+"110b  Chromatic Research Inc.",
+"   0001  Mpact Media Processor",
+"   0004  Mpact 2",
+"110c  Mini-Max Technology, Inc.",
+"110d  Znyx Advanced Systems",
+"110e  CPU Technology",
+"110f  Ross Technology",
+"1110  Powerhouse Systems",
+"   6037  Firepower Powerized SMP I/O ASIC",
+"   6073  Firepower Powerized SMP I/O ASIC",
+"1111  Santa Cruz Operation",
+"1112  Osicom Technologies Inc",
+"   2200  FDDI Adapter",
+"   2300  Fast Ethernet Adapter",
+"   2340  4 Port Fast Ethernet Adapter",
+"   2400  ATM Adapter",
+"1113  Accton Technology Corporation",
+"   1211  SMC2-1211TX",
+"       103c 1207  EN-1207D Fast Ethernet Adapter",
+"       1113 1211  EN-1207D Fast Ethernet Adapter",
+"   1216  EN-1216 Ethernet Adapter",
+"       1113 2242  EN2242 10/100 Ethernet Mini-PCI Card",
+"       111a 1020  SpeedStream 1020 PCI 10/100 Ethernet Adaptor [EN-1207F-TX ?]",
+"   1217  EN-1217 Ethernet Adapter",
+"   5105  10Mbps Network card",
+"   9211  EN-1207D Fast Ethernet Adapter",
+"       1113 9211  EN-1207D Fast Ethernet Adapter",
+"   9511  21x4x DEC-Tulip compatible Fast Ethernet",
+"   d301  CPWNA100 (Philips wireless PCMCIA)",
+"   ec02  SMC 1244TX v3",
+"1114  Atmel Corporation",
+"   0506  at76c506 802.11b Wireless Network Adaptor",
+"1115  3D Labs",
+"1116  Data Translation",
+"   0022  DT3001",
+"   0023  DT3002",
+"   0024  DT3003",
+"   0025  DT3004",
+"   0026  DT3005",
+"   0027  DT3001-PGL",
+"   0028  DT3003-PGL",
+"1117  Datacube, Inc",
+"   9500  Max-1C SVGA card",
+"   9501  Max-1C image processing",
+"1118  Berg Electronics",
+"1119  ICP Vortex Computersysteme GmbH",
+"   0000  GDT 6000/6020/6050",
+"   0001  GDT 6000B/6010",
+"   0002  GDT 6110/6510",
+"   0003  GDT 6120/6520",
+"   0004  GDT 6530",
+"   0005  GDT 6550",
+"   0006  GDT 6117/6517",
+"   0007  GDT 6127/6527",
+"   0008  GDT 6537",
+"   0009  GDT 6557/6557-ECC",
+"   000a  GDT 6115/6515",
+"   000b  GDT 6125/6525",
+"   000c  GDT 6535",
+"   000d  GDT 6555",
+"   0010  GDT 6115/6515",
+"   0011  GDT 6125/6525",
+"   0012  GDT 6535",
+"   0013  GDT 6555/6555-ECC",
+"   0100  GDT 6117RP/6517RP",
+"   0101  GDT 6127RP/6527RP",
+"   0102  GDT 6537RP",
+"   0103  GDT 6557RP",
+"   0104  GDT 6111RP/6511RP",
+"   0105  GDT 6121RP/6521RP",
+"   0110  GDT 6117RD/6517RD",
+"   0111  GDT 6127RD/6527RD",
+"   0112  GDT 6537RD",
+"   0113  GDT 6557RD",
+"   0114  GDT 6111RD/6511RD",
+"   0115  GDT 6121RD/6521RD",
+"   0118  GDT 6118RD/6518RD/6618RD",
+"   0119  GDT 6128RD/6528RD/6628RD",
+"   011a  GDT 6538RD/6638RD",
+"   011b  GDT 6558RD/6658RD",
+"   0120  GDT 6117RP2/6517RP2",
+"   0121  GDT 6127RP2/6527RP2",
+"   0122  GDT 6537RP2",
+"   0123  GDT 6557RP2",
+"   0124  GDT 6111RP2/6511RP2",
+"   0125  GDT 6121RP2/6521RP2",
+"   0136  GDT 6113RS/6513RS",
+"   0137  GDT 6123RS/6523RS",
+"   0138  GDT 6118RS/6518RS/6618RS",
+"   0139  GDT 6128RS/6528RS/6628RS",
+"   013a  GDT 6538RS/6638RS",
+"   013b  GDT 6558RS/6658RS",
+"   013c  GDT 6533RS/6633RS",
+"   013d  GDT 6543RS/6643RS",
+"   013e  GDT 6553RS/6653RS",
+"   013f  GDT 6563RS/6663RS",
+"   0166  GDT 7113RN/7513RN/7613RN",
+"   0167  GDT 7123RN/7523RN/7623RN",
+"   0168  GDT 7118RN/7518RN/7518RN",
+"   0169  GDT 7128RN/7528RN/7628RN",
+"   016a  GDT 7538RN/7638RN",
+"   016b  GDT 7558RN/7658RN",
+"   016c  GDT 7533RN/7633RN",
+"   016d  GDT 7543RN/7643RN",
+"   016e  GDT 7553RN/7653RN",
+"   016f  GDT 7563RN/7663RN",
+"   01d6  GDT 4x13RZ",
+"   01d7  GDT 4x23RZ",
+"   01f6  GDT 8x13RZ",
+"   01f7  GDT 8x23RZ",
+"   01fc  GDT 8x33RZ",
+"   01fd  GDT 8x43RZ",
+"   01fe  GDT 8x53RZ",
+"   01ff  GDT 8x63RZ",
+"   0210  GDT 6519RD/6619RD",
+"   0211  GDT 6529RD/6629RD",
+"   0260  GDT 7519RN/7619RN",
+"   0261  GDT 7529RN/7629RN",
+"   02ff  GDT MAXRP",
+"   0300  GDT NEWRX",
+"111a  Efficient Networks, Inc",
+"   0000  155P-MF1 (FPGA)",
+"   0002  155P-MF1 (ASIC)",
+"   0003  ENI-25P ATM",
+"       111a 0000  ENI-25p Miniport ATM Adapter",
+"   0005  SpeedStream (LANAI)",
+"       111a 0001  ENI-3010 ATM",
+"       111a 0009  ENI-3060 ADSL (VPI=0)",
+"       111a 0101  ENI-3010 ATM",
+"       111a 0109  ENI-3060CO ADSL (VPI=0)",
+"       111a 0809  ENI-3060 ADSL (VPI=0 or 8)",
+"       111a 0909  ENI-3060CO ADSL (VPI=0 or 8)",
+"       111a 0a09  ENI-3060 ADSL (VPI=<0..15>)",
+"   0007  SpeedStream ADSL",
+"       111a 1001  ENI-3061 ADSL [ASIC]",
+"   1203  SpeedStream 1023 Wireless PCI Adapter",
+"111b  Teledyne Electronic Systems",
+"111c  Tricord Systems Inc.",
+"   0001  Powerbis Bridge",
+"111d  Integrated Device Technology, Inc.",
+"   0001  IDT77201/77211 155Mbps ATM SAR Controller [NICStAR]",
+"   0003  IDT77222/77252 155Mbps ATM MICRO ABR SAR Controller",
+"   0004  IDT77V252 155Mbps ATM MICRO ABR SAR Controller",
+"   0005  IDT77V222 155Mbps ATM MICRO ABR SAR Controller",
+"111e  Eldec",
+"111f  Precision Digital Images",
+"   4a47  Precision MX Video engine interface",
+"   5243  Frame capture bus interface",
+"1120  EMC Corporation",
+"1121  Zilog",
+"1122  Multi-tech Systems, Inc.",
+"1123  Excellent Design, Inc.",
+"1124  Leutron Vision AG",
+"   2581  Picport Monochrome",
+"1125  Eurocore",
+"1126  Vigra",
+"1127  FORE Systems Inc",
+"   0200  ForeRunner PCA-200 ATM",
+"   0210  PCA-200PC",
+"   0250  ATM",
+"   0300  ForeRunner PCA-200EPC ATM",
+"   0310  ATM",
+"   0400  ForeRunnerHE ATM Adapter",
+"       1127 0400  ForeRunnerHE ATM",
+"1129  Firmworks",
+"112a  Hermes Electronics Company, Ltd.",
+"112b  Linotype - Hell AG",
+"112c  Zenith Data Systems",
+"112d  Ravicad",
+"112e  Infomedia Microelectronics Inc.",
+"112f  Imaging Technology Inc",
+"   0000  MVC IC-PCI",
+"   0001  MVC IM-PCI Video frame grabber/processor",
+"   0008  PC-CamLink PCI framegrabber",
+"1130  Computervision",
+"1131  Philips Semiconductors",
+"   1561  USB 1.1 Host Controller",
+"   1562  USB 2.0 Host Controller",
+"   3400  SmartPCI56(UCB1500) 56K Modem",
+"   5400  TriMedia TM1000/1100",
+"   5402  TriMedia TM-1300",
+"       1244 0f00  Fritz!Card DSL",
+"   5405  TriMedia TM1500",
+"   5406  TriMedia TM1700",
+"   7130  SAA7130 Video Broadcast Decoder",
+"       102b 48d0  Matrox CronosPlus",
+"       1048 226b  ELSA EX-VISION 300TV",
+"       1131 2001  10MOONS PCI TV CAPTURE CARD",
+"       1131 2005  Techcom (India) TV Tuner Card (SSD-TV-670)",
+"       1461 050c  Nagase Sangyo TransGear 3000TV",
+"       1461 10ff  AVerMedia DVD EZMaker",
+"       1461 2108  AverMedia AverTV/305",
+"       1461 2115  AverMedia AverTV Studio 305",
+"       153b 1152  Terratec Cinergy 200 TV",
+"       185b c100  Compro VideoMate TV PVR/FM",
+"       185b c901  Videomate DVB-T200",
+"       5168 0138  LifeView FlyVIDEO2000",
+"   7133  SAA7133/SAA7135 Video Broadcast Decoder",
+"       0000 4091  Beholder BeholdTV 409 FM",
+"       1019 4cb5  Elitegroup ECS TVP3XP FM1236 Tuner Card (NTSC,FM)",
+"       1043 0210  FlyTV mini Asus Digimatrix",
+"       1043 4843  ASUS TV-FM 7133",
+"       1043 4845  TV-FM 7135",
+"       1043 4862  P7131 Dual",
+"       1131 2001  Proteus Pro [philips reference design]",
+"       1131 2018  Tiger reference design",
+"       1131 4ee9  MonsterTV Mobile",
+"       11bd 002b  PCTV Stereo",
+"       11bd 002e  PCTV 110i (saa7133)",
+"       12ab 0800  PURPLE TV",
+"       1421 0335  Instant TV DVB-T Cardbus",
+"       1421 1370  Instant TV (saa7135)",
+"       1435 7330  VFG7330",
+"       1435 7350  VFG7350",
+"       1461 1044  AVerTVHD MCE A180",
+"       1461 f31f  Avermedia AVerTV GO 007 FM",
+"       1462 6231  TV@Anywhere plus",
+"       1489 0214  LifeView FlyTV Platinum FM",
+"       14c0 1212  LifeView FlyTV Platinum Mini2",
+"       153b 1160  Cinergy 250 PCI TV",
+"       153b 1162  Terratec Cinergy 400 mobile",
+"       185b c100  VideoMate TV",
+"       5168 0306  LifeView FlyDVB-T DUO",
+"       5168 0319  LifeView FlyDVB Trio",
+"   7134  SAA7134/SAA7135HL Video Broadcast Decoder",
+"       1019 4cb4  Elitegroup ECS TVP3XP FM1216 Tuner Card(PAL-BG,FM)",
+"       1043 0210  Digimatrix TV",
+"       1043 4840  ASUS TV-FM 7134",
+"       1131 2004  EUROPA V3 reference design",
+"       1131 4e85  SKNet Monster TV",
+"       1131 6752  EMPRESS",
+"       11bd 002b  PCTV Stereo",
+"       11bd 002d  PCTV 300i DVB-T + PAL",
+"       1461 2c00  AverTV Hybrid+FM PCI",
+"       1461 9715  AVerTV Studio 307",
+"       1461 a70a  Avermedia AVerTV 307",
+"       1461 a70b  AverMedia M156 / Medion 2819",
+"       1461 d6ee  Cardbus TV/Radio (E500)",
+"       1471 b7e9  AVerTV Cardbus plus",
+"       153b 1142  Terratec Cinergy 400 TV",
+"       153b 1143  Terratec Cinergy 600 TV",
+"       153b 1158  Terratec Cinergy 600 TV MK3",
+"       1540 9524  ProVideo PV952",
+"       16be 0003  Medion 7134",
+"       185b c200  Compro VideoMate Gold+ Pal",
+"       185b c900  Videomate DVB-T300",
+"       1894 a006  KNC One TV-Station DVR",
+"       1894 fe01  KNC One TV-Station RDS / Typhoon TV Tuner RDS",
+"   7145  SAA7145",
+"   7146  SAA7146",
+"       110a 0000  Fujitsu/Siemens DVB-C card rev1.5",
+"       110a ffff  Fujitsu/Siemens DVB-C card rev1.5",
+"       1131 4f56  KNC1 DVB-S Budget",
+"       1131 4f60  Fujitsu-Siemens Activy DVB-S Budget Rev AL",
+"       1131 4f61  Activy DVB-S Budget Rev GR",
+"       1131 5f61  Activy DVB-T Budget",
+"       114b 2003  DVRaptor Video Edit/Capture Card",
+"       11bd 0006  DV500 Overlay",
+"       11bd 000a  DV500 Overlay",
+"       11bd 000f  DV500 Overlay",
+"       13c2 0000  Siemens/Technotrend/Hauppauge DVB card rev1.3 or rev1.5",
+"       13c2 0001  Technotrend/Hauppauge DVB card rev1.3 or rev1.6",
+"       13c2 0002  Technotrend/Hauppauge DVB card rev2.1",
+"       13c2 0003  Technotrend/Hauppauge DVB card rev2.1",
+"       13c2 0004  Technotrend/Hauppauge DVB card rev2.1",
+"       13c2 0006  Technotrend/Hauppauge DVB card rev1.3 or rev1.6",
+"       13c2 0008  Technotrend/Hauppauge DVB-T",
+"       13c2 000a  Octal/Technotrend DVB-C for iTV",
+"       13c2 1003  Technotrend-Budget/Hauppauge WinTV-NOVA-S DVB card",
+"       13c2 1004  Technotrend-Budget/Hauppauge WinTV-NOVA-C DVB card",
+"       13c2 1005  Technotrend-Budget/Hauppauge WinTV-NOVA-T DVB card",
+"       13c2 100c  Technotrend-Budget/Hauppauge WinTV-NOVA-CI DVB card",
+"       13c2 100f  Technotrend-Budget/Hauppauge WinTV-NOVA-CI DVB card",
+"       13c2 1011  Technotrend-Budget/Hauppauge WinTV-NOVA-T DVB card",
+"       13c2 1013  SATELCO Multimedia DVB",
+"       13c2 1016  WinTV-NOVA-SE DVB card",
+"       13c2 1102  Technotrend/Hauppauge DVB card rev2.1",
+"       153b 1156  Terratec Cynergy 1200C",
+"   9730  SAA9730 Integrated Multimedia and Peripheral Controller",
+"1132  Mitel Corp.",
+"1133  Eicon Networks Corporation",
+"   7901  EiconCard S90",
+"   7902  EiconCard S90",
+"   7911  EiconCard S91",
+"   7912  EiconCard S91",
+"   7941  EiconCard S94",
+"   7942  EiconCard S94",
+"   7943  EiconCard S94",
+"   7944  EiconCard S94",
+"   b921  EiconCard P92",
+"   b922  EiconCard P92",
+"   b923  EiconCard P92",
+"   e001  Diva Pro 2.0 S/T",
+"   e002  Diva 2.0 S/T PCI",
+"   e003  Diva Pro 2.0 U",
+"   e004  Diva 2.0 U PCI",
+"   e005  Diva 2.01 S/T PCI",
+"   e006  Diva CT S/T PCI",
+"   e007  Diva CT U PCI",
+"   e008  Diva CT Lite S/T PCI",
+"   e009  Diva CT Lite U PCI",
+"   e00a  Diva ISDN+V.90 PCI",
+"   e00b  Diva 2.02 PCI S/T",
+"   e00c  Diva 2.02 PCI U",
+"   e00d  Diva ISDN Pro 3.0 PCI",
+"   e00e  Diva ISDN+CT S/T PCI Rev 2",
+"   e010  Diva Server BRI-2M PCI",
+"       110a 0021  Fujitsu Siemens ISDN S0",
+"   e011  Diva Server BRI S/T Rev 2",
+"   e012  Diva Server 4BRI-8M PCI",
+"   e013  Diva Server 4BRI Rev 2",
+"       1133 1300  Diva Server V-4BRI-8",
+"       1133 e013  Diva Server 4BRI-8M 2.0 PCI",
+"   e014  Diva Server PRI-30M PCI",
+"   e015  DIVA Server PRI Rev 2",
+"       1133 e015  Diva Server PRI 2.0 PCI",
+"   e016  Diva Server Voice 4BRI PCI",
+"   e017  Diva Server Voice 4BRI Rev 2",
+"       1133 e017  Diva Server Voice 4BRI-8M 2.0 PCI",
+"   e018  Diva Server BRI-2M 2.0 PCI",
+"       1133 1800  Diva Server V-BRI-2",
+"       1133 e018  Diva Server BRI-2M 2.0 PCI",
+"   e019  Diva Server Voice PRI Rev 2",
+"       1133 e019  Diva Server Voice PRI 2.0 PCI",
+"   e01a  Diva Server 2FX",
+"   e01b  Diva Server Voice BRI-2M 2.0 PCI",
+"       1133 e01b  Diva Server Voice BRI-2M 2.0 PCI",
+"   e01c  Diva Server PRI Rev 3",
+"       1133 1c01  Diva Server PRI/E1/T1-8",
+"       1133 1c02  Diva Server PRI/T1-24",
+"       1133 1c03  Diva Server PRI/E1-30",
+"       1133 1c04  Diva Server PRI/E1/T1",
+"       1133 1c05  Diva Server V-PRI/T1-24",
+"       1133 1c06  Diva Server V-PRI/E1-30",
+"       1133 1c07  Diva Server PRI/E1/T1-8 Cornet NQ",
+"       1133 1c08  Diva Server PRI/T1-24 Cornet NQ",
+"       1133 1c09  Diva Server PRI/E1-30 Cornet NQ",
+"       1133 1c0a  Diva Server PRI/E1/T1 Cornet NQ",
+"       1133 1c0b  Diva Server V-PRI/T1-24 Cornet NQ",
+"       1133 1c0c  Diva Server V-PRI/E1-30 Cornet NQ",
+"   e01e  Diva Server 2PRI",
+"   e020  Diva Server 4PRI",
+"   e022  Diva Server Analog-2P",
+"   e024  Diva Server Analog-4P",
+"       1133 2400  Diva Server V-Analog-4P",
+"       1133 e024  Diva Server Analog-4P",
+"   e028  Diva Server Analog-8P",
+"       1133 2800  Diva Server V-Analog-8P",
+"       1133 e028  Diva Server Analog-8P",
+"   e02a  Diva Server IPM-300",
+"   e02c  Diva Server IPM-600",
+"1134  Mercury Computer Systems",
+"   0001  Raceway Bridge",
+"   0002  Dual PCI to RapidIO Bridge",
+"1135  Fuji Xerox Co Ltd",
+"   0001  Printer controller",
+"1136  Momentum Data Systems",
+"1137  Cisco Systems Inc",
+"1138  Ziatech Corporation",
+"   8905  8905 [STD 32 Bridge]",
+"1139  Dynamic Pictures, Inc",
+"   0001  VGA Compatable 3D Graphics",
+"113a  FWB Inc",
+"113b  Network Computing Devices",
+"113c  Cyclone Microsystems, Inc.",
+"   0000  PCI-9060 i960 Bridge",
+"   0001  PCI-SDK [PCI i960 Evaluation Platform]",
+"   0911  PCI-911 [i960Jx-based Intelligent I/O Controller]",
+"   0912  PCI-912 [i960CF-based Intelligent I/O Controller]",
+"   0913  PCI-913",
+"   0914  PCI-914 [I/O Controller w/ secondary PCI bus]",
+"113d  Leading Edge Products Inc",
+"113e  Sanyo Electric Co - Computer Engineering Dept",
+"113f  Equinox Systems, Inc.",
+"   0808  SST-64P Adapter",
+"   1010  SST-128P Adapter",
+"   80c0  SST-16P DB Adapter",
+"   80c4  SST-16P RJ Adapter",
+"   80c8  SST-16P Adapter",
+"   8888  SST-4P Adapter",
+"   9090  SST-8P Adapter",
+"1140  Intervoice Inc",
+"1141  Crest Microsystem Inc",
+"1142  Alliance Semiconductor Corporation",
+"   3210  AP6410",
+"   6422  ProVideo 6422",
+"   6424  ProVideo 6424",
+"   6425  ProMotion AT25",
+"   643d  ProMotion AT3D",
+"1143  NetPower, Inc",
+"1144  Cincinnati Milacron",
+"   0001  Noservo controller",
+"1145  Workbit Corporation",
+"   8007  NinjaSCSI-32 Workbit",
+"   f007  NinjaSCSI-32 KME",
+"   f010  NinjaSCSI-32 Workbit",
+"   f012  NinjaSCSI-32 Logitec",
+"   f013  NinjaSCSI-32 Logitec",
+"   f015  NinjaSCSI-32 Melco",
+"   f020  NinjaSCSI-32 Sony PCGA-DVD51",
+"1146  Force Computers",
+"1147  Interface Corp",
+"1148  SysKonnect",
+"   4000  FDDI Adapter",
+"       0e11 b03b  Netelligent 100 FDDI DAS Fibre SC",
+"       0e11 b03c  Netelligent 100 FDDI SAS Fibre SC",
+"       0e11 b03d  Netelligent 100 FDDI DAS UTP",
+"       0e11 b03e  Netelligent 100 FDDI SAS UTP",
+"       0e11 b03f  Netelligent 100 FDDI SAS Fibre MIC",
+"       1148 5521  FDDI SK-5521 (SK-NET FDDI-UP)",
+"       1148 5522  FDDI SK-5522 (SK-NET FDDI-UP DAS)",
+"       1148 5541  FDDI SK-5541 (SK-NET FDDI-FP)",
+"       1148 5543  FDDI SK-5543 (SK-NET FDDI-LP)",
+"       1148 5544  FDDI SK-5544 (SK-NET FDDI-LP DAS)",
+"       1148 5821  FDDI SK-5821 (SK-NET FDDI-UP64)",
+"       1148 5822  FDDI SK-5822 (SK-NET FDDI-UP64 DAS)",
+"       1148 5841  FDDI SK-5841 (SK-NET FDDI-FP64)",
+"       1148 5843  FDDI SK-5843 (SK-NET FDDI-LP64)",
+"       1148 5844  FDDI SK-5844 (SK-NET FDDI-LP64 DAS)",
+"   4200  Token Ring adapter",
+"   4300  SK-9872 Gigabit Ethernet Server Adapter (SK-NET GE-ZX dual link)",
+"       1148 9821  SK-9821 Gigabit Ethernet Server Adapter (SK-NET GE-T)",
+"       1148 9822  SK-9822 Gigabit Ethernet Server Adapter (SK-NET GE-T dual link)",
+"       1148 9841  SK-9841 Gigabit Ethernet Server Adapter (SK-NET GE-LX)",
+"       1148 9842  SK-9842 Gigabit Ethernet Server Adapter (SK-NET GE-LX dual link)",
+"       1148 9843  SK-9843 Gigabit Ethernet Server Adapter (SK-NET GE-SX)",
+"       1148 9844  SK-9844 Gigabit Ethernet Server Adapter (SK-NET GE-SX dual link)",
+"       1148 9861  SK-9861 Gigabit Ethernet Server Adapter (SK-NET GE-SX Volition)",
+"       1148 9862  SK-9862 Gigabit Ethernet Server Adapter (SK-NET GE-SX Volition dual link)",
+"       1148 9871  SK-9871 Gigabit Ethernet Server Adapter (SK-NET GE-ZX)",
+"       1148 9872  SK-9872 Gigabit Ethernet Server Adapter (SK-NET GE-ZX dual link)",
+"       1259 2970  AT-2970SX Gigabit Ethernet Adapter",
+"       1259 2971  AT-2970LX Gigabit Ethernet Adapter",
+"       1259 2972  AT-2970TX Gigabit Ethernet Adapter",
+"       1259 2973  AT-2971SX Gigabit Ethernet Adapter",
+"       1259 2974  AT-2971T Gigabit Ethernet Adapter",
+"       1259 2975  AT-2970SX/2SC Gigabit Ethernet Adapter",
+"       1259 2976  AT-2970LX/2SC Gigabit Ethernet Adapter",
+"       1259 2977  AT-2970TX/2TX Gigabit Ethernet Adapter",
+"   4320  SK-9871 V2.0 Gigabit Ethernet 1000Base-ZX Adapter, PCI64, Fiber ZX/SC",
+"       1148 0121  Marvell RDK-8001 Adapter",
+"       1148 0221  Marvell RDK-8002 Adapter",
+"       1148 0321  Marvell RDK-8003 Adapter",
+"       1148 0421  Marvell RDK-8004 Adapter",
+"       1148 0621  Marvell RDK-8006 Adapter",
+"       1148 0721  Marvell RDK-8007 Adapter",
+"       1148 0821  Marvell RDK-8008 Adapter",
+"       1148 0921  Marvell RDK-8009 Adapter",
+"       1148 1121  Marvell RDK-8011 Adapter",
+"       1148 1221  Marvell RDK-8012 Adapter",
+"       1148 3221  SK-9521 V2.0 10/100/1000Base-T Adapter",
+"       1148 5021  SK-9821 V2.0 Gigabit Ethernet 10/100/1000Base-T Adapter",
+"       1148 5041  SK-9841 V2.0 Gigabit Ethernet 1000Base-LX Adapter",
+"       1148 5043  SK-9843 V2.0 Gigabit Ethernet 1000Base-SX Adapter",
+"       1148 5051  SK-9851 V2.0 Gigabit Ethernet 1000Base-SX Adapter",
+"       1148 5061  SK-9861 V2.0 Gigabit Ethernet 1000Base-SX Adapter",
+"       1148 5071  SK-9871 V2.0 Gigabit Ethernet 1000Base-ZX Adapter",
+"       1148 9521  SK-9521 10/100/1000Base-T Adapter",
+"   4400  SK-9Dxx Gigabit Ethernet Adapter",
+"   4500  SK-9Mxx Gigabit Ethernet Adapter",
+"   9000  SK-9S21 10/100/1000Base-T Server Adapter, PCI-X, Copper RJ-45",
+"   9843  [Fujitsu] Gigabit Ethernet",
+"   9e00  SK-9E21D 10/100/1000Base-T Adapter, Copper RJ-45",
+"       1148 2100  SK-9E21 Server Adapter",
+"       1148 21d0  SK-9E21D 10/100/1000Base-T Adapter",
+"       1148 2200  SK-9E22 Server Adapter",
+"       1148 8100  SK-9E81 Server Adapter",
+"       1148 8200  SK-9E82 Server Adapter",
+"       1148 9100  SK-9E91 Server Adapter",
+"       1148 9200  SK-9E92 Server Adapter",
+"1149  Win System Corporation",
+"114a  VMIC",
+"   5579  VMIPCI-5579 (Reflective Memory Card)",
+"   5587  VMIPCI-5587 (Reflective Memory Card)",
+"   6504  VMIC PCI 7755 FPGA",
+"   7587  VMIVME-7587",
+"114b  Canopus Co., Ltd",
+"114c  Annabooks",
+"114d  IC Corporation",
+"114e  Nikon Systems Inc",
+"114f  Digi International",
+"   0002  AccelePort EPC",
+"   0003  RightSwitch SE-6",
+"   0004  AccelePort Xem",
+"   0005  AccelePort Xr",
+"   0006  AccelePort Xr,C/X",
+"   0009  AccelePort Xr/J",
+"   000a  AccelePort EPC/J",
+"   000c  DataFirePRIme T1 (1-port)",
+"   000d  SyncPort 2-Port (x.25/FR)",
+"   0011  AccelePort 8r EIA-232 (IBM)",
+"   0012  AccelePort 8r EIA-422",
+"   0014  AccelePort 8r EIA-422",
+"   0015  AccelePort Xem",
+"   0016  AccelePort EPC/X",
+"   0017  AccelePort C/X",
+"   001a  DataFirePRIme E1 (1-port)",
+"   001b  AccelePort C/X (IBM)",
+"   001d  DataFire RAS T1/E1/PRI",
+"       114f 0050  DataFire RAS E1 Adapter",
+"       114f 0051  DataFire RAS Dual E1 Adapter",
+"       114f 0052  DataFire RAS T1 Adapter",
+"       114f 0053  DataFire RAS Dual T1 Adapter",
+"   0023  AccelePort RAS",
+"   0024  DataFire RAS B4 ST/U",
+"       114f 0030  DataFire RAS BRI U Adapter",
+"       114f 0031  DataFire RAS BRI S/T Adapter",
+"   0026  AccelePort 4r 920",
+"   0027  AccelePort Xr 920",
+"   0028  ClassicBoard 4",
+"   0029  ClassicBoard 8",
+"   0034  AccelePort 2r 920",
+"   0035  DataFire DSP T1/E1/PRI cPCI",
+"   0040  AccelePort Xp",
+"   0042  AccelePort 2p",
+"   0043  AccelePort 4p",
+"   0044  AccelePort 8p",
+"   0045  AccelePort 16p",
+"   004e  AccelePort 32p",
+"   0070  Datafire Micro V IOM2 (Europe)",
+"   0071  Datafire Micro V (Europe)",
+"   0072  Datafire Micro V IOM2 (North America)",
+"   0073  Datafire Micro V (North America)",
+"   00b0  Digi Neo 4",
+"   00b1  Digi Neo 8",
+"   00c8  Digi Neo 2 DB9",
+"   00c9  Digi Neo 2 DB9 PRI",
+"   00ca  Digi Neo 2 RJ45",
+"   00cb  Digi Neo 2 RJ45 PRI",
+"   00d0  ClassicBoard 4 422",
+"   00d1  ClassicBoard 8 422",
+"   6001  Avanstar",
+"1150  Thinking Machines Corp",
+"1151  JAE Electronics Inc.",
+"1152  Megatek",
+"1153  Land Win Electronic Corp",
+"1154  Melco Inc",
+"1155  Pine Technology Ltd",
+"1156  Periscope Engineering",
+"1157  Avsys Corporation",
+"1158  Voarx R & D Inc",
+"   3011  Tokenet/vg 1001/10m anylan",
+"   9050  Lanfleet/Truevalue",
+"   9051  Lanfleet/Truevalue",
+"1159  Mutech Corp",
+"   0001  MV-1000",
+"115a  Harlequin Ltd",
+"115b  Parallax Graphics",
+"115c  Photron Ltd.",
+"115d  Xircom",
+"   0003  Cardbus Ethernet 10/100",
+"       1014 0181  10/100 EtherJet Cardbus Adapter",
+"       1014 1181  10/100 EtherJet Cardbus Adapter",
+"       1014 8181  10/100 EtherJet Cardbus Adapter",
+"       1014 9181  10/100 EtherJet Cardbus Adapter",
+"       115d 0181  Cardbus Ethernet 10/100",
+"       115d 0182  RealPort2 CardBus Ethernet 10/100 (R2BE-100)",
+"       115d 1181  Cardbus Ethernet 10/100",
+"       1179 0181  Cardbus Ethernet 10/100",
+"       8086 8181  EtherExpress PRO/100 Mobile CardBus 32 Adapter",
+"       8086 9181  EtherExpress PRO/100 Mobile CardBus 32 Adapter",
+"   0005  Cardbus Ethernet 10/100",
+"       1014 0182  10/100 EtherJet Cardbus Adapter",
+"       1014 1182  10/100 EtherJet Cardbus Adapter",
+"       115d 0182  Cardbus Ethernet 10/100",
+"       115d 1182  Cardbus Ethernet 10/100",
+"   0007  Cardbus Ethernet 10/100",
+"       1014 0182  10/100 EtherJet Cardbus Adapter",
+"       1014 1182  10/100 EtherJet Cardbus Adapter",
+"       115d 0182  Cardbus Ethernet 10/100",
+"       115d 1182  Cardbus Ethernet 10/100",
+"   000b  Cardbus Ethernet 10/100",
+"       1014 0183  10/100 EtherJet Cardbus Adapter",
+"       115d 0183  Cardbus Ethernet 10/100",
+"   000c  Mini-PCI V.90 56k Modem",
+"   000f  Cardbus Ethernet 10/100",
+"       1014 0183  10/100 EtherJet Cardbus Adapter",
+"       115d 0183  Cardbus Ethernet 10/100",
+"   00d4  Mini-PCI K56Flex Modem",
+"   0101  Cardbus 56k modem",
+"       115d 1081  Cardbus 56k Modem",
+"   0103  Cardbus Ethernet + 56k Modem",
+"       1014 9181  Cardbus 56k Modem",
+"       1115 1181  Cardbus Ethernet 100 + 56k Modem",
+"       115d 1181  CBEM56G-100 Ethernet + 56k Modem",
+"       8086 9181  PRO/100 LAN + Modem56 CardBus",
+"115e  Peer Protocols Inc",
+"115f  Maxtor Corporation",
+"1160  Megasoft Inc",
+"1161  PFU Limited",
+"1162  OA Laboratory Co Ltd",
+"1163  Rendition",
+"   0001  Verite 1000",
+"   2000  Verite V2000/V2100/V2200",
+"       1092 2000  Stealth II S220",
+"1164  Advanced Peripherals Technologies",
+"1165  Imagraph Corporation",
+"   0001  Motion TPEG Recorder/Player with audio",
+"1166  Broadcom",
+"   0000  CMIC-LE",
+"   0005  CNB20-LE Host Bridge",
+"   0006  CNB20HE Host Bridge",
+"   0007  CNB20-LE Host Bridge",
+"   0008  CNB20HE Host Bridge",
+"   0009  CNB20LE Host Bridge",
+"   0010  CIOB30",
+"   0011  CMIC-HE",
+"   0012  CMIC-WS Host Bridge (GC-LE chipset)",
+"   0013  CNB20-HE Host Bridge",
+"   0014  CMIC-LE Host Bridge (GC-LE chipset)",
+"   0015  CMIC-GC Host Bridge",
+"   0016  CMIC-GC Host Bridge",
+"   0017  GCNB-LE Host Bridge",
+"   0036  HT1000 PCI/PCI-X bridge",
+"   0101  CIOB-X2 PCI-X I/O Bridge",
+"   0104  HT1000 PCI/PCI-X bridge",
+"   0110  CIOB-E I/O Bridge with Gigabit Ethernet",
+"   0130  HT1000 PCI-X bridge",
+"   0132  HT1000 PCI-Express bridge",
+"   0200  OSB4 South Bridge",
+"   0201  CSB5 South Bridge",
+"       4c53 1080  CT8 mainboard",
+"   0203  CSB6 South Bridge",
+"       1734 1012  Primergy RX300",
+"   0205  HT1000 Legacy South Bridge",
+"   0211  OSB4 IDE Controller",
+"   0212  CSB5 IDE Controller",
+"       4c53 1080  CT8 mainboard",
+"   0213  CSB6 RAID/IDE Controller",
+"       1028 c134  Poweredge SC600",
+"       1734 1012  Primergy RX300",
+"   0214  HT1000 Legacy IDE controller",
+"   0217  CSB6 IDE Controller",
+"       1028 4134  Poweredge SC600",
+"   0220  OSB4/CSB5 OHCI USB Controller",
+"       4c53 1080  CT8 mainboard",
+"   0221  CSB6 OHCI USB Controller",
+"       1734 1012  Primergy RX300",
+"   0223  HT1000 USB Controller",
+"   0225  CSB5 LPC bridge",
+"   0227  GCLE-2 Host Bridge",
+"       1734 1012  Primergy RX300",
+"   0230  CSB5 LPC bridge",
+"       4c53 1080  CT8 mainboard",
+"   0234  HT1000 LPC Bridge",
+"   0240  K2 SATA",
+"   0241  RAIDCore RC4000",
+"   0242  RAIDCore BC4000",
+"   024a  BCM5785 (HT1000) SATA Native SATA Mode",
+"   024b  BCM5785 (HT1000) PATA/IDE Mode",
+"1167  Mutoh Industries Inc",
+"1168  Thine Electronics Inc",
+"1169  Centre for Development of Advanced Computing",
+"116a  Polaris Communications",
+"   6100  Bus/Tag Channel",
+"   6800  Escon Channel",
+"   7100  Bus/Tag Channel",
+"   7800  Escon Channel",
+"116b  Connectware Inc",
+"116c  Intelligent Resources Integrated Systems",
+"116d  Martin-Marietta",
+"116e  Electronics for Imaging",
+"116f  Workstation Technology",
+"1170  Inventec Corporation",
+"1171  Loughborough Sound Images Plc",
+"1172  Altera Corporation",
+"1173  Adobe Systems, Inc",
+"1174  Bridgeport Machines",
+"1175  Mitron Computer Inc.",
+"1176  SBE Incorporated",
+"1177  Silicon Engineering",
+"1178  Alfa, Inc.",
+"   afa1  Fast Ethernet Adapter",
+"1179  Toshiba America Info Systems",
+"   0102  Extended IDE Controller",
+"   0103  EX-IDE Type-B",
+"   0404  DVD Decoder card",
+"   0406  Tecra Video Capture device",
+"   0407  DVD Decoder card (Version 2)",
+"   0601  CPU to PCI bridge",
+"       1179 0001  Satellite Pro",
+"   0603  ToPIC95 PCI to CardBus Bridge for Notebooks",
+"   060a  ToPIC95",
+"       1179 0001  Satellite Pro",
+"   060f  ToPIC97",
+"   0617  ToPIC100 PCI to Cardbus Bridge with ZV Support",
+"   0618  CPU to PCI and PCI to ISA bridge",
+"   0701  FIR Port",
+"   0804  TC6371AF SmartMedia Controller",
+"   0805  SD TypA Controller",
+"   0d01  FIR Port Type-DO",
+"       1179 0001  FIR Port Type-DO",
+"117a  A-Trend Technology",
+"117b  L G Electronics, Inc.",
+"117c  Atto Technology",
+"   0030  Ultra320 SCSI Host Adapter",
+"       117c 8013  ExpressPCI UL4D",
+"       117c 8014  ExpressPCI UL4S",
+"117d  Becton & Dickinson",
+"117e  T/R Systems",
+"117f  Integrated Circuit Systems",
+"1180  Ricoh Co Ltd",
+"   0465  RL5c465",
+"   0466  RL5c466",
+"   0475  RL5c475",
+"       144d c006  vpr Matrix 170B4 CardBus bridge",
+"   0476  RL5c476 II",
+"       1014 0185  ThinkPad A/T/X Series",
+"       1028 0188  Inspiron 6000 laptop",
+"       1043 1967  V6800V",
+"       1043 1987  Asus A4K and Z81K notebooks, possibly others ( mid-2005 machines )",
+"       104d 80df  Vaio PCG-FX403",
+"       104d 80e7  VAIO PCG-GR214EP/GR214MP/GR215MP/GR314MP/GR315MP",
+"       144d c00c  P35 notebook",
+"       14ef 0220  PCD-RP-220S",
+"       17aa 201c  Thinkpad X60s",
+"   0477  RL5c477",
+"   0478  RL5c478",
+"       1014 0184  ThinkPad A30p (2653-64G)",
+"   0511  R5C511",
+"   0522  R5C522 IEEE 1394 Controller",
+"       1014 01cf  ThinkPad A30p (2653-64G)",
+"       1043 1967  V6800V",
+"   0551  R5C551 IEEE 1394 Controller",
+"       144d c006  vpr Matrix 170B4",
+"   0552  R5C552 IEEE 1394 Controller",
+"       1014 0511  ThinkPad A/T/X Series",
+"       1028 0188  Inspiron 6000 laptop",
+"       144d c00c  P35 notebook",
+"       17aa 201e  Thinkpad X60s",
+"   0554  R5C554",
+"   0575  R5C575 SD Bus Host Adapter",
+"   0576  R5C576 SD Bus Host Adapter",
+"   0592  R5C592 Memory Stick Bus Host Adapter",
+"       1043 1967  V6800V",
+"       144d c018  X20 IV",
+"   0811  R5C811",
+"   0822  R5C822 SD/SDIO/MMC/MS/MSPro Host Adapter",
+"       1014 0556  Thinkpad X40",
+"       1014 0598  Thinkpad Z60m",
+"       1028 0188  Inspiron 6000 laptop",
+"       1028 01a2  Inspiron 9200",
+"       1043 1967  ASUS V6800V",
+"       144d c018  X20 IV",
+"       17aa 201d  Thinkpad X60s",
+"   0841  R5C841 CardBus/SD/SDIO/MMC/MS/MSPro/xD/IEEE1394",
+"   0852  xD-Picture Card Controller",
+"       1043 1967  V6800V",
+"1181  Telmatics International",
+"1183  Fujikura Ltd",
+"1184  Forks Inc",
+"1185  Dataworld International Ltd",
+"1186  D-Link System Inc",
+"   0100  DC21041",
+"   1002  DL10050 Sundance Ethernet",
+"       1186 1002  DFE-550TX",
+"       1186 1012  DFE-580TX",
+"   1025  AirPlus Xtreme G DWL-G650 Adapter",
+"   1026  AirXpert DWL-AG650 Wireless Cardbus Adapter",
+"   1043  AirXpert DWL-AG650 Wireless Cardbus Adapter",
+"   1300  RTL8139 Ethernet",
+"       1186 1300  DFE-538TX 10/100 Ethernet Adapter",
+"       1186 1301  DFE-530TX+ 10/100 Ethernet Adapter",
+"       1186 1303  DFE-528TX 10/100 Fast Ethernet PCI Adapter",
+"   1340  DFE-690TXD CardBus PC Card",
+"   1541  DFE-680TXD CardBus PC Card",
+"   1561  DRP-32TXD Cardbus PC Card",
+"   2027  AirPlus Xtreme G DWL-G520 Adapter",
+"   3203  AirPlus Xtreme G DWL-G520 Adapter",
+"   3300  DWL-510 2.4GHz Wireless PCI Adapter",
+"   3a03  AirPro DWL-A650 Wireless Cardbus Adapter(rev.B)",
+"   3a04  AirPro DWL-AB650 Multimode Wireless Cardbus Adapter",
+"   3a05  AirPro DWL-AB520 Multimode Wireless PCI Adapter",
+"   3a07  AirXpert DWL-AG650 Wireless Cardbus Adapter",
+"   3a08  AirXpert DWL-AG520 Wireless PCI Adapter",
+"   3a10  AirXpert DWL-AG650 Wireless Cardbus Adapter(rev.B)",
+"   3a11  AirXpert DWL-AG520 Wireless PCI Adapter(rev.B)",
+"   3a12  AirPlus DWL-G650 Wireless Cardbus Adapter(rev.C)",
+"   3a13  AirPlus DWL-G520 Wireless PCI Adapter(rev.B)",
+"   3a14  AirPremier DWL-AG530 Wireless PCI Adapter",
+"   3a63  AirXpert DWL-AG660 Wireless Cardbus Adapter",
+"   4000  DL2000-based Gigabit Ethernet",
+"   4300  DGE-528T Gigabit Ethernet Adapter",
+"   4b01  DGE-530T Gigabit Ethernet Adapter (rev 11)",
+"   4c00  Gigabit Ethernet Adapter",
+"       1186 4c00  DGE-530T Gigabit Ethernet Adapter",
+"   8400  D-Link DWL-650+ CardBus PC Card",
+"1187  Advanced Technology Laboratories, Inc.",
+"1188  Shima Seiki Manufacturing Ltd.",
+"1189  Matsushita Electronics Co Ltd",
+"118a  Hilevel Technology",
+"118b  Hypertec Pty Limited",
+"118c  Corollary, Inc",
+"   0014  PCIB [C-bus II to PCI bus host bridge chip]",
+"   1117  Intel 8-way XEON Profusion Chipset [Cache Coherency Filter]",
+"118d  BitFlow Inc",
+"   0001  Raptor-PCI framegrabber",
+"   0012  Model 12 Road Runner Frame Grabber",
+"   0014  Model 14 Road Runner Frame Grabber",
+"   0024  Model 24 Road Runner Frame Grabber",
+"   0044  Model 44 Road Runner Frame Grabber",
+"   0112  Model 12 Road Runner Frame Grabber",
+"   0114  Model 14 Road Runner Frame Grabber",
+"   0124  Model 24 Road Runner Frame Grabber",
+"   0144  Model 44 Road Runner Frame Grabber",
+"   0212  Model 12 Road Runner Frame Grabber",
+"   0214  Model 14 Road Runner Frame Grabber",
+"   0224  Model 24 Road Runner Frame Grabber",
+"   0244  Model 44 Road Runner Frame Grabber",
+"   0312  Model 12 Road Runner Frame Grabber",
+"   0314  Model 14 Road Runner Frame Grabber",
+"   0324  Model 24 Road Runner Frame Grabber",
+"   0344  Model 44 Road Runner Frame Grabber",
+"118e  Hermstedt GmbH",
+"118f  Green Logic",
+"1190  Tripace",
+"   c731  TP-910/920/940 PCI Ultra(Wide) SCSI Adapter",
+"1191  Artop Electronic Corp",
+"   0003  SCSI Cache Host Adapter",
+"   0004  ATP8400",
+"   0005  ATP850UF",
+"   0006  ATP860 NO-BIOS",
+"   0007  ATP860",
+"   0008  ATP865 NO-ROM",
+"   0009  ATP865",
+"   8002  AEC6710 SCSI-2 Host Adapter",
+"   8010  AEC6712UW SCSI",
+"   8020  AEC6712U SCSI",
+"   8030  AEC6712S SCSI",
+"   8040  AEC6712D SCSI",
+"   8050  AEC6712SUW SCSI",
+"   8060  AEC6712 SCSI",
+"   8080  AEC67160 SCSI",
+"   8081  AEC67160S SCSI",
+"   808a  AEC67162 2-ch. LVD SCSI",
+"1192  Densan Company Ltd",
+"1193  Zeitnet Inc.",
+"   0001  1221",
+"   0002  1225",
+"1194  Toucan Technology",
+"1195  Ratoc System Inc",
+"1196  Hytec Electronics Ltd",
+"1197  Gage Applied Sciences, Inc.",
+"   010c  CompuScope 82G 8bit 2GS/s Analog Input Card",
+"1198  Lambda Systems Inc",
+"1199  Attachmate Corporation",
+"119a  Mind Share, Inc.",
+"119b  Omega Micro Inc.",
+"   1221  82C092G",
+"119c  Information Technology Inst.",
+"119d  Bug, Inc. Sapporo Japan",
+"119e  Fujitsu Microelectronics Ltd.",
+"   0001  FireStream 155",
+"   0003  FireStream 50",
+"119f  Bull HN Information Systems",
+"11a0  Convex Computer Corporation",
+"11a1  Hamamatsu Photonics K.K.",
+"11a2  Sierra Research and Technology",
+"11a3  Deuretzbacher GmbH & Co. Eng. KG",
+"11a4  Barco Graphics NV",
+"11a5  Microunity Systems Eng. Inc",
+"11a6  Pure Data Ltd.",
+"11a7  Power Computing Corp.",
+"11a8  Systech Corp.",
+"11a9  InnoSys Inc.",
+"   4240  AMCC S933Q Intelligent Serial Card",
+"11aa  Actel",
+"11ab  Marvell Technology Group Ltd.",
+"   0146  GT-64010/64010A System Controller",
+"   138f  W8300 802.11 Adapter (rev 07)",
+"   1fa6  Marvell W8300 802.11 Adapter",
+"   1fa7  88W8310 and 88W8000G [Libertas] 802.11g client chipset",
+"   1faa  88w8335 [Libertas] 802.11b/g Wireless",
+"       1385 4e00  WG511 v2 54MBit/ Wireless PC-Card",
+"   4320  88E8001 Gigabit Ethernet Controller",
+"       1019 0f38  Marvell 88E8001 Gigabit Ethernet Controller (ECS)",
+"       1019 8001  Marvell 88E8001 Gigabit Ethernet Controller (ECS)",
+"       1043 173c  Marvell 88E8001 Gigabit Ethernet Controller (Asus)",
+"       1043 811a  Marvell 88E8001 Gigabit Ethernet Controller (Asus)",
+"       105b 0c19  Marvell 88E8001 Gigabit Ethernet Controller (Foxconn)",
+"       10b8 b452  EZ Card 1000 (SMC9452TXV.2)",
+"       11ab 0121  Marvell RDK-8001",
+"       11ab 0321  Marvell RDK-8003",
+"       11ab 1021  Marvell RDK-8010",
+"       11ab 4320  Marvell Yukon Gigabit Ethernet 10/100/1000Baset-T Constroller (Asus)",
+"       11ab 5021  Marvell Yukon Gigabit Ethernet 10/100/1000Base-T Controller (64 bit)",
+"       11ab 9521  Marvell Yukon Gigabit Ethernet 10/100/1000Base-T Controller (32 bit)",
+"       1458 e000  Marvell 88E8001 Gigabit Ethernet Controller (Gigabyte)",
+"       147b 1406  Marvell 88E8001 Gigabit Ethernet Controller (Abit)",
+"       15d4 0047  Marvell 88E8001 Gigabit Ethernet Controller (Iwill)",
+"       1695 9025  Marvell 88E8001 Gigabit Ethernet Controller (Epox)",
+"       17f2 1c03  Marvell 88E8001 Gigabit Ethernet Controller (Albatron)",
+"       270f 2803  Marvell 88E8001 Gigabit Ethernet Controller (Chaintech)",
+"   4340  88E8021 PCI-X IPMI Gigabit Ethernet Controller",
+"   4341  88E8022 PCI-X IPMI Gigabit Ethernet Controller",
+"   4342  88E8061 PCI-E IPMI Gigabit Ethernet Controller",
+"   4343  88E8062 PCI-E IPMI Gigabit Ethernet Controller",
+"   4344  88E8021 PCI-X IPMI Gigabit Ethernet Controller",
+"   4345  88E8022 PCI-X IPMI Gigabit Ethernet Controller",
+"   4346  88E8061 PCI-E IPMI Gigabit Ethernet Controller",
+"   4347  88E8062 PCI-E IPMI Gigabit Ethernet Controller",
+"   4350  88E8035 PCI-E Fast Ethernet Controller",
+"       1179 0001  Marvell 88E8035 Fast Ethernet Controller (Toshiba)",
+"       11ab 3521  Marvell RDK-8035",
+"       1854 000d  Marvell 88E8035 Fast Ethernet Controller (LGE)",
+"       1854 000e  Marvell 88E8035 Fast Ethernet Controller (LGE)",
+"       1854 000f  Marvell 88E8035 Fast Ethernet Controller (LGE)",
+"       1854 0011  Marvell 88E8035 Fast Ethernet Controller (LGE)",
+"       1854 0012  Marvell 88E8035 Fast Ethernet Controller (LGE)",
+"       1854 0016  Marvell 88E8035 Fast Ethernet Controller (LGE)",
+"       1854 0017  Marvell 88E8035 Fast Ethernet Controller (LGE)",
+"       1854 0018  Marvell 88E8035 Fast Ethernet Controller (LGE)",
+"       1854 0019  Marvell 88E8035 Fast Ethernet Controller (LGE)",
+"       1854 001c  Marvell 88E8035 Fast Ethernet Controller (LGE)",
+"       1854 001e  Marvell 88E8035 Fast Ethernet Controller (LGE)",
+"       1854 0020  Marvell 88E8035 Fast Ethernet Controller (LGE)",
+"   4351  88E8036 PCI-E Fast Ethernet Controller",
+"       107b 4009  Marvell 88E8036 Fast Ethernet Controller (Wistron)",
+"       10f7 8338  Marvell 88E8036 Fast Ethernet Controller (Panasonic)",
+"       1179 0001  Marvell 88E8036 Fast Ethernet Controller (Toshiba)",
+"       1179 ff00  Marvell 88E8036 Fast Ethernet Controller (Compal)",
+"       1179 ff10  Marvell 88E8036 Fast Ethernet Controller (Inventec)",
+"       11ab 3621  Marvell RDK-8036",
+"       13d1 ac12  Abocom EFE3K - 10/100 Ethernet Expresscard",
+"       161f 203d  Marvell 88E8036 Fast Ethernet Controller (Arima)",
+"       1854 000d  Marvell 88E8036 Fast Ethernet Controller (LGE)",
+"       1854 000e  Marvell 88E8036 Fast Ethernet Controller (LGE)",
+"       1854 000f  Marvell 88E8036 Fast Ethernet Controller (LGE)",
+"       1854 0011  Marvell 88E8036 Fast Ethernet Controller (LGE)",
+"       1854 0012  Marvell 88E8036 Fast Ethernet Controller (LGE)",
+"       1854 0016  Marvell 88E8036 Fast Ethernet Controller (LGE)",
+"       1854 0017  Marvell 88E8036 Fast Ethernet Controller (LGE)",
+"       1854 0018  Marvell 88E8036 Fast Ethernet Controller (LGE)",
+"       1854 0019  Marvell 88E8036 Fast Ethernet Controller (LGE)",
+"       1854 001c  Marvell 88E8036 Fast Ethernet Controller (LGE)",
+"       1854 001e  Marvell 88E8036 Fast Ethernet Controller (LGE)",
+"       1854 0020  Marvell 88E8036 Fast Ethernet Controller (LGE)",
+"   4352  88E8038 PCI-E Fast Ethernet Controller",
+"   4360  88E8052 PCI-E ASF Gigabit Ethernet Controller",
+"       1043 8134  Marvell 88E8052 Gigabit Ethernet Controller (Asus)",
+"       107b 4009  Marvell 88E8052 Gigabit Ethernet Controller (Wistron)",
+"       11ab 5221  Marvell RDK-8052",
+"       1458 e000  Marvell 88E8052 Gigabit Ethernet Controller (Gigabyte)",
+"       1462 052c  Marvell 88E8052 Gigabit Ethernet Controller (MSI)",
+"       1849 8052  Marvell 88E8052 Gigabit Ethernet Controller (ASRock)",
+"       a0a0 0509  Marvell 88E8052 Gigabit Ethernet Controller (Aopen)",
+"   4361  88E8050 PCI-E ASF Gigabit Ethernet Controller",
+"       107b 3015  Marvell 88E8050 Gigabit Ethernet Controller (Gateway)",
+"       11ab 5021  Marvell 88E8050 Gigabit Ethernet Controller (Intel)",
+"       8086 3063  D925XCVLK mainboard",
+"       8086 3439  Marvell 88E8050 Gigabit Ethernet Controller (Intel)",
+"   4362  88E8053 PCI-E Gigabit Ethernet Controller",
+"       103c 2a0d  Marvell 88E8053 Gigabit Ethernet Controller (Asus)",
+"       1043 8142  Marvell 88E8053 Gigabit Ethernet controller PCIe (Asus)",
+"       109f 3197  Marvell 88E8053 Gigabit Ethernet Controller (Trigem)",
+"       10f7 8338  Marvell 88E8053 Gigabit Ethernet Controller (Panasonic)",
+"       10fd a430  Marvell 88E8053 Gigabit Ethernet Controller (SOYO)",
+"       1179 0001  Marvell 88E8053 Gigabit Ethernet Controller (Toshiba)",
+"       1179 ff00  Marvell 88E8053 Gigabit Ethernet Controller (Compal)",
+"       1179 ff10  Marvell 88E8053 Gigabit Ethernet Controller (Inventec)",
+"       11ab 5321  Marvell RDK-8053",
+"       1297 c240  Marvell 88E8053 Gigabit Ethernet Controller (Shuttle)",
+"       1297 c241  Marvell 88E8053 Gigabit Ethernet Controller (Shuttle)",
+"       1297 c242  Marvell 88E8053 Gigabit Ethernet Controller (Shuttle)",
+"       1297 c243  Marvell 88E8053 Gigabit Ethernet Controller (Shuttle)",
+"       1297 c244  Marvell 88E8053 Gigabit Ethernet Controller (Shuttle)",
+"       13d1 ac11  EGE5K - Giga Ethernet Expresscard",
+"       1458 e000  Marvell 88E8053 Gigabit Ethernet Controller (Gigabyte)",
+"       1462 058c  Marvell 88E8053 Gigabit Ethernet Controller (MSI)",
+"       14c0 0012  Marvell 88E8053 Gigabit Ethernet Controller (Compal)",
+"       1558 04a0  Marvell 88E8053 Gigabit Ethernet Controller (Clevo)",
+"       15bd 1003  Marvell 88E8053 Gigabit Ethernet Controller (DFI)",
+"       161f 203c  Marvell 88E8053 Gigabit Ethernet Controller (Arima)",
+"       161f 203d  Marvell 88E8053 Gigabit Ethernet Controller (Arima)",
+"       1695 9029  Marvell 88E8053 Gigabit Ethernet Controller (Epox)",
+"       17f2 2c08  Marvell 88E8053 Gigabit Ethernet Controller (Albatron)",
+"       17ff 0585  Marvell 88E8053 Gigabit Ethernet Controller (Quanta)",
+"       1849 8053  Marvell 88E8053 Gigabit Ethernet Controller (ASRock)",
+"       1854 000b  Marvell 88E8053 Gigabit Ethernet Controller (LGE)",
+"       1854 000c  Marvell 88E8053 Gigabit Ethernet Controller (LGE)",
+"       1854 0010  Marvell 88E8053 Gigabit Ethernet Controller (LGE)",
+"       1854 0013  Marvell 88E8053 Gigabit Ethernet Controller (LGE)",
+"       1854 0014  Marvell 88E8053 Gigabit Ethernet Controller (LGE)",
+"       1854 0015  Marvell 88E8053 Gigabit Ethernet Controller (LGE)",
+"       1854 001a  Marvell 88E8053 Gigabit Ethernet Controller (LGE)",
+"       1854 001b  Marvell 88E8053 Gigabit Ethernet Controller (LGE)",
+"       1854 001d  Marvell 88E8053 Gigabit Ethernet Controller (LGE)",
+"       1854 001f  Marvell 88E8053 Gigabit Ethernet Controller (LGE)",
+"       1854 0021  Marvell 88E8053 Gigabit Ethernet Controller (LGE)",
+"       1854 0022  Marvell 88E8053 Gigabit Ethernet Controller (LGE)",
+"       270f 2801  Marvell 88E8053 Gigabit Ethernet Controller (Chaintech)",
+"       a0a0 0506  Marvell 88E8053 Gigabit Ethernet Controller (Aopen)",
+"   4363  88E8055 PCI-E Gigabit Ethernet Controller",
+"   4611  GT-64115 System Controller",
+"   4620  GT-64120/64120A/64121A System Controller",
+"   4801  GT-48001",
+"   5005  Belkin F5D5005 Gigabit Desktop Network PCI Card",
+"   5040  MV88SX5040 4-port SATA I PCI-X Controller",
+"   5041  MV88SX5041 4-port SATA I PCI-X Controller",
+"   5080  MV88SX5080 8-port SATA I PCI-X Controller",
+"   5081  MV88SX5081 8-port SATA I PCI-X Controller",
+"   6041  MV88SX6041 4-port SATA II PCI-X Controller",
+"   6081  MV88SX6081 8-port SATA II PCI-X Controller",
+"   6460  MV64360/64361/64362 System Controller",
+"   6480  MV64460/64461/64462 System Controller",
+"   f003  GT-64010 Primary Image Piranha Image Generator",
+"11ac  Canon Information Systems Research Aust.",
+"11ad  Lite-On Communications Inc",
+"   0002  LNE100TX",
+"       11ad 0002  LNE100TX",
+"       11ad 0003  LNE100TX",
+"       11ad f003  LNE100TX",
+"       11ad ffff  LNE100TX",
+"       1385 f004  FA310TX",
+"   c115  LNE100TX [Linksys EtherFast 10/100]",
+"       11ad c001  LNE100TX [ver 2.0]",
+"11ae  Aztech System Ltd",
+"11af  Avid Technology Inc.",
+"   0001  Cinema",
+"   ee40  Digidesign Audiomedia III",
+"11b0  V3 Semiconductor Inc.",
+"   0002  V300PSC",
+"   0292  V292PBC [Am29030/40 Bridge]",
+"   0960  V96xPBC",
+"   c960  V96DPC",
+"11b1  Apricot Computers",
+"11b2  Eastman Kodak",
+"11b3  Barr Systems Inc.",
+"11b4  Leitch Technology International",
+"11b5  Radstone Technology Plc",
+"11b6  United Video Corp",
+"11b7  Motorola",
+"11b8  XPoint Technologies, Inc",
+"   0001  Quad PeerMaster",
+"11b9  Pathlight Technology Inc.",
+"   c0ed  SSA Controller",
+"11ba  Videotron Corp",
+"11bb  Pyramid Technology",
+"11bc  Network Peripherals Inc",
+"   0001  NP-PCI",
+"11bd  Pinnacle Systems Inc.",
+"   002e  PCTV 40i",
+"   bede  AV/DV Studio Capture Card",
+"11be  International Microcircuits Inc",
+"11bf  Astrodesign, Inc.",
+"11c0  Hewlett Packard",
+"11c1  Agere Systems",
+"   0440  56k WinModem",
+"       1033 8015  LT WinModem 56k Data+Fax+Voice+Dsvd",
+"       1033 8047  LT WinModem 56k Data+Fax+Voice+Dsvd",
+"       1033 804f  LT WinModem 56k Data+Fax+Voice+Dsvd",
+"       10cf 102c  LB LT Modem V.90 56k",
+"       10cf 104a  BIBLO LT Modem 56k",
+"       10cf 105f  LB2 LT Modem V.90 56k",
+"       1179 0001  Internal V.90 Modem",
+"       11c1 0440  LT WinModem 56k Data+Fax+Voice+Dsvd",
+"       122d 4101  MDP7800-U Modem",
+"       122d 4102  MDP7800SP-U Modem",
+"       13e0 0040  LT WinModem 56k Data+Fax+Voice+Dsvd",
+"       13e0 0440  LT WinModem 56k Data+Fax+Voice+Dsvd",
+"       13e0 0441  LT WinModem 56k Data+Fax+Voice+Dsvd",
+"       13e0 0450  LT WinModem 56k Data+Fax+Voice+Dsvd",
+"       13e0 f100  LT WinModem 56k Data+Fax+Voice+Dsvd",
+"       13e0 f101  LT WinModem 56k Data+Fax+Voice+Dsvd",
+"       144d 2101  LT56PV Modem",
+"       149f 0440  LT WinModem 56k Data+Fax+Voice+Dsvd",
+"   0441  56k WinModem",
+"       1033 804d  LT WinModem 56k Data+Fax",
+"       1033 8065  LT WinModem 56k Data+Fax",
+"       1092 0440  Supra 56i",
+"       1179 0001  Internal V.90 Modem",
+"       11c1 0440  LT WinModem 56k Data+Fax",
+"       11c1 0441  LT WinModem 56k Data+Fax",
+"       122d 4100  MDP7800-U Modem",
+"       13e0 0040  LT WinModem 56k Data+Fax",
+"       13e0 0100  LT WinModem 56k Data+Fax",
+"       13e0 0410  LT WinModem 56k Data+Fax",
+"       13e0 0420  TelePath Internet 56k WinModem",
+"       13e0 0440  LT WinModem 56k Data+Fax",
+"       13e0 0443  LT WinModem 56k Data+Fax",
+"       13e0 f102  LT WinModem 56k Data+Fax",
+"       1416 9804  CommWave 56k Modem",
+"       141d 0440  LT WinModem 56k Data+Fax",
+"       144f 0441  Lucent 56k V.90 DF Modem",
+"       144f 0449  Lucent 56k V.90 DF Modem",
+"       144f 110d  Lucent Win Modem",
+"       1468 0441  Presario 56k V.90 DF Modem",
+"       1668 0440  Lucent Win Modem",
+"   0442  56k WinModem",
+"       11c1 0440  LT WinModem 56k Data+Fax+Voice+VoiceView+Dsvd",
+"       11c1 0442  LT WinModem 56k Data+Fax+Voice+VoiceView+Dsvd",
+"       13e0 0412  LT WinModem 56k Data+Fax+Voice+VoiceView+Dsvd",
+"       13e0 0442  LT WinModem 56k Data+Fax+Voice+VoiceView+Dsvd",
+"       13fc 2471  LT WinModem 56k Data+Fax+Voice+VoiceView+Dsvd",
+"       144d 2104  LT56PT Modem",
+"       144f 1104  LT WinModem 56k Data+Fax+Voice+VoiceView+Dsvd",
+"       149f 0440  LT WinModem 56k Data+Fax+Voice+VoiceView+Dsvd",
+"       1668 0440  LT WinModem 56k Data+Fax+Voice+VoiceView+Dsvd",
+"   0443  LT WinModem",
+"   0444  LT WinModem",
+"   0445  LT WinModem",
+"       8086 2203  PRO/100+ MiniPCI (probably an Ambit U98.003.C.00 combo card)",
+"       8086 2204  PRO/100+ MiniPCI on Armada E500",
+"   0446  LT WinModem",
+"   0447  LT WinModem",
+"   0448  WinModem 56k",
+"       1014 0131  Lucent Win Modem",
+"       1033 8066  LT WinModem 56k Data+Fax+Voice+Dsvd",
+"       13e0 0030  56k Voice Modem",
+"       13e0 0040  LT WinModem 56k Data+Fax+Voice+Dsvd",
+"       1668 2400  LT WinModem 56k (MiniPCI Ethernet+Modem)",
+"   0449  WinModem 56k",
+"       0e11 b14d  56k V.90 Modem",
+"       13e0 0020  LT WinModem 56k Data+Fax",
+"       13e0 0041  TelePath Internet 56k WinModem",
+"       1436 0440  Lucent Win Modem",
+"       144f 0449  Lucent 56k V.90 DFi Modem",
+"       1468 0410  IBM ThinkPad T23 (2647-4MG)",
+"       1468 0440  Lucent Win Modem",
+"       1468 0449  Presario 56k V.90 DFi Modem",
+"   044a  F-1156IV WinModem (V90, 56KFlex)",
+"       10cf 1072  LB Global LT Modem",
+"       13e0 0012  LT WinModem 56k Data+Fax+Voice+VoiceView+Dsvd",
+"       13e0 0042  LT WinModem 56k Data+Fax+Voice+VoiceView+Dsvd",
+"       144f 1005  LT WinModem 56k Data+Fax+Voice+VoiceView+Dsvd",
+"   044b  LT WinModem",
+"   044c  LT WinModem",
+"   044d  LT WinModem",
+"   044e  LT WinModem",
+"   044f  V90 WildWire Modem",
+"   0450  LT WinModem",
+"       1033 80a8  Versa Note Vxi",
+"       144f 4005  Magnia SG20",
+"       1468 0450  Evo N600c",
+"       4005 144f  LifeBook C Series",
+"   0451  LT WinModem",
+"   0452  LT WinModem",
+"   0453  LT WinModem",
+"   0454  LT WinModem",
+"   0455  LT WinModem",
+"   0456  LT WinModem",
+"   0457  LT WinModem",
+"   0458  LT WinModem",
+"   0459  LT WinModem",
+"   045a  LT WinModem",
+"   045c  LT WinModem",
+"   0461  V90 WildWire Modem",
+"   0462  V90 WildWire Modem",
+"   0480  Venus Modem (V90, 56KFlex)",
+"   048c  V.92 56K WinModem",
+"   048f  V.92 56k WinModem",
+"   5801  USB",
+"   5802  USS-312 USB Controller",
+"   5803  USS-344S USB Controller",
+"   5811  FW323",
+"       8086 524c  D865PERL mainboard",
+"       dead 0800  FireWire Host Bus Adapter",
+"   8110  T8110 H.100/H.110 TDM switch",
+"       12d9 000c  E1/T1 PMXc cPCI carrier card",
+"   ab10  WL60010 Wireless LAN MAC",
+"   ab11  WL60040 Multimode Wireles LAN MAC",
+"       11c1 ab12  WaveLAN 11abg Cardbus card (Model 1102)",
+"       11c1 ab13  WaveLAN 11abg MiniPCI card (Model 0512)",
+"       11c1 ab15  WaveLAN 11abg Cardbus card (Model 1106)",
+"       11c1 ab16  WaveLAN 11abg MiniPCI card (Model 0516)",
+"   ab20  ORiNOCO PCI Adapter",
+"   ab21  Agere Wireless PCI Adapter",
+"   ab30  Hermes2 Mini-PCI WaveLAN a/b/g",
+"       14cd 2012  Hermes2 Mini-PCI WaveLAN a/b/g",
+"   ed00  ET-131x PCI-E Ethernet Controller",
+"11c2  Sand Microelectronics",
+"11c3  NEC Corporation",
+"11c4  Document Technologies, Inc",
+"11c5  Shiva Corporation",
+"11c6  Dainippon Screen Mfg. Co. Ltd",
+"11c7  D.C.M. Data Systems",
+"11c8  Dolphin Interconnect Solutions AS",
+"   0658  PSB32 SCI-Adapter D31x",
+"   d665  PSB64 SCI-Adapter D32x",
+"   d667  PSB66 SCI-Adapter D33x",
+"11c9  Magma",
+"   0010  16-line serial port w/- DMA",
+"   0011  4-line serial port w/- DMA",
+"11ca  LSI Systems, Inc",
+"11cb  Specialix Research Ltd.",
+"   2000  PCI_9050",
+"       11cb 0200  SX",
+"       11cb b008  I/O8+",
+"   4000  SUPI_1",
+"   8000  T225",
+"11cc  Michels & Kleberhoff Computer GmbH",
+"11cd  HAL Computer Systems, Inc.",
+"11ce  Netaccess",
+"11cf  Pioneer Electronic Corporation",
+"11d0  Lockheed Martin Federal Systems-Manassas",
+"11d1  Auravision",
+"   01f7  VxP524",
+"11d2  Intercom Inc.",
+"11d3  Trancell Systems Inc",
+"11d4  Analog Devices",
+"   1535  Blackfin BF535 processor",
+"   1805  SM56 PCI modem",
+"   1889  AD1889 sound chip",
+"   1986  AD1986A sound chip",
+"   5340  AD1881 sound chip",
+"11d5  Ikon Corporation",
+"   0115  10115",
+"   0117  10117",
+"11d6  Tekelec Telecom",
+"11d7  Trenton Technology, Inc.",
+"11d8  Image Technologies Development",
+"11d9  TEC Corporation",
+"11da  Novell",
+"11db  Sega Enterprises Ltd",
+"11dc  Questra Corporation",
+"11dd  Crosfield Electronics Limited",
+"11de  Zoran Corporation",
+"   6057  ZR36057PQC Video cutting chipset",
+"       1031 7efe  DC10 Plus",
+"       1031 fc00  MiroVIDEO DC50, Motion JPEG Capture/CODEC Board",
+"       12f8 8a02  Tekram Video Kit",
+"       13ca 4231  JPEG/TV Card",
+"   6120  ZR36120",
+"       1328 f001  Cinemaster C DVD Decoder",
+"       13c2 0000  MediaFocus Satellite TV Card",
+"       1de1 9fff  Video Kit C210",
+"11df  New Wave PDG",
+"11e0  Cray Communications A/S",
+"11e1  GEC Plessey Semi Inc.",
+"11e2  Samsung Information Systems America",
+"11e3  Quicklogic Corporation",
+"   0001  COM-ON-AIR Dosch&Amand DECT",
+"   5030  PC Watchdog",
+"11e4  Second Wave Inc",
+"11e5  IIX Consulting",
+"11e6  Mitsui-Zosen System Research",
+"11e7  Toshiba America, Elec. Company",
+"11e8  Digital Processing Systems Inc.",
+"11e9  Highwater Designs Ltd.",
+"11ea  Elsag Bailey",
+"11eb  Formation Inc.",
+"11ec  Coreco Inc",
+"11ed  Mediamatics",
+"11ee  Dome Imaging Systems Inc",
+"11ef  Nicolet Technologies B.V.",
+"11f0  Compu-Shack",
+"   4231  FDDI",
+"   4232  FASTline UTP Quattro",
+"   4233  FASTline FO",
+"   4234  FASTline UTP",
+"   4235  FASTline-II UTP",
+"   4236  FASTline-II FO",
+"   4731  GIGAline",
+"11f1  Symbios Logic Inc",
+"11f2  Picture Tel Japan K.K.",
+"11f3  Keithley Metrabyte",
+"11f4  Kinetic Systems Corporation",
+"   2915  CAMAC controller",
+"11f5  Computing Devices International",
+"11f6  Compex",
+"   0112  ENet100VG4",
+"   0113  FreedomLine 100",
+"   1401  ReadyLink 2000",
+"   2011  RL100-ATX 10/100",
+"       11f6 2011  RL100-ATX",
+"   2201  ReadyLink 100TX (Winbond W89C840)",
+"       11f6 2011  ReadyLink 100TX",
+"   9881  RL100TX Fast Ethernet",
+"11f7  Scientific Atlanta",
+"11f8  PMC-Sierra Inc.",
+"   7375  PM7375 [LASAR-155 ATM SAR]",
+"11f9  I-Cube Inc",
+"11fa  Kasan Electronics Company, Ltd.",
+"11fb  Datel Inc",
+"11fc  Silicon Magic",
+"11fd  High Street Consultants",
+"11fe  Comtrol Corporation",
+"   0001  RocketPort 32 port w/external I/F",
+"   0002  RocketPort 8 port w/external I/F",
+"   0003  RocketPort 16 port w/external I/F",
+"   0004  RocketPort 4 port w/quad cable",
+"   0005  RocketPort 8 port w/octa cable",
+"   0006  RocketPort 8 port w/RJ11 connectors",
+"   0007  RocketPort 4 port w/RJ11 connectors",
+"   0008  RocketPort 8 port w/ DB78 SNI (Siemens) connector",
+"   0009  RocketPort 16 port w/ DB78 SNI (Siemens) connector",
+"   000a  RocketPort Plus 4 port",
+"   000b  RocketPort Plus 8 port",
+"   000c  RocketModem 6 port",
+"   000d  RocketModem 4-port",
+"   000e  RocketPort Plus 2 port RS232",
+"   000f  RocketPort Plus 2 port RS422",
+"   0801  RocketPort UPCI 32 port w/external I/F",
+"   0802  RocketPort UPCI 8 port w/external I/F",
+"   0803  RocketPort UPCI 16 port w/external I/F",
+"   0805  RocketPort UPCI 8 port w/octa cable",
+"   080c  RocketModem III 8 port",
+"   080d  RocketModem III 4 port",
+"   0812  RocketPort UPCI Plus 8 port RS422",
+"   0903  RocketPort Compact PCI 16 port w/external I/F",
+"   8015  RocketPort 4-port UART 16954",
+"11ff  Scion Corporation",
+"   0003  AG-5",
+"1200  CSS Corporation",
+"1201  Vista Controls Corp",
+"1202  Network General Corp.",
+"   4300  Gigabit Ethernet Adapter",
+"       1202 9841  SK-9841 LX",
+"       1202 9842  SK-9841 LX dual link",
+"       1202 9843  SK-9843 SX",
+"       1202 9844  SK-9843 SX dual link",
+"1203  Bayer Corporation, Agfa Division",
+"1204  Lattice Semiconductor Corporation",
+"1205  Array Corporation",
+"1206  Amdahl Corporation",
+"1208  Parsytec GmbH",
+"   4853  HS-Link Device",
+"1209  SCI Systems Inc",
+"120a  Synaptel",
+"120b  Adaptive Solutions",
+"120c  Technical Corp.",
+"120d  Compression Labs, Inc.",
+"120e  Cyclades Corporation",
+"   0100  Cyclom-Y below first megabyte",
+"   0101  Cyclom-Y above first megabyte",
+"   0102  Cyclom-4Y below first megabyte",
+"   0103  Cyclom-4Y above first megabyte",
+"   0104  Cyclom-8Y below first megabyte",
+"   0105  Cyclom-8Y above first megabyte",
+"   0200  Cyclades-Z below first megabyte",
+"   0201  Cyclades-Z above first megabyte",
+"   0300  PC300/RSV or /X21 (2 ports)",
+"   0301  PC300/RSV or /X21 (1 port)",
+"   0310  PC300/TE (2 ports)",
+"   0311  PC300/TE (1 port)",
+"   0320  PC300/TE-M (2 ports)",
+"   0321  PC300/TE-M (1 port)",
+"   0400  PC400",
+"120f  Essential Communications",
+"   0001  Roadrunner serial HIPPI",
+"1210  Hyperparallel Technologies",
+"1211  Braintech Inc",
+"1212  Kingston Technology Corp.",
+"1213  Applied Intelligent Systems, Inc.",
+"1214  Performance Technologies, Inc.",
+"1215  Interware Co., Ltd",
+"1216  Purup Prepress A/S",
+"1217  O2 Micro, Inc.",
+"   6729  OZ6729",
+"   673a  OZ6730",
+"   6832  OZ6832/6833 CardBus Controller",
+"   6836  OZ6836/6860 CardBus Controller",
+"   6872  OZ6812 CardBus Controller",
+"   6925  OZ6922 CardBus Controller",
+"   6933  OZ6933/711E1 CardBus/SmartCardBus Controller",
+"       1025 1016  Travelmate 612 TX",
+"   6972  OZ601/6912/711E0 CardBus/SmartCardBus Controller",
+"       1014 020c  ThinkPad R30",
+"       1179 0001  Magnia Z310",
+"   7110  OZ711Mx 4-in-1 MemoryCardBus Accelerator",
+"       103c 088c  NC8000 laptop",
+"       103c 0890  NC6000 laptop",
+"       1734 106c  Amilo A1645",
+"   7112  OZ711EC1/M1 SmartCardBus/MemoryCardBus Controller",
+"   7113  OZ711EC1 SmartCardBus Controller",
+"   7114  OZ711M1/MC1 4-in-1 MemoryCardBus Controller",
+"   7134  OZ711MP1/MS1 MemoryCardBus Controller",
+"   71e2  OZ711E2 SmartCardBus Controller",
+"   7212  OZ711M2 4-in-1 MemoryCardBus Controller",
+"   7213  OZ6933E CardBus Controller",
+"   7223  OZ711M3/MC3 4-in-1 MemoryCardBus Controller",
+"       103c 088c  NC8000 laptop",
+"       103c 0890  NC6000 laptop",
+"   7233  OZ711MP3/MS3 4-in-1 MemoryCardBus Controller",
+"1218  Hybricon Corp.",
+"1219  First Virtual Corporation",
+"121a  3Dfx Interactive, Inc.",
+"   0001  Voodoo",
+"   0002  Voodoo 2",
+"   0003  Voodoo Banshee",
+"       1092 0003  Monster Fusion",
+"       1092 4000  Monster Fusion",
+"       1092 4002  Monster Fusion",
+"       1092 4801  Monster Fusion AGP",
+"       1092 4803  Monster Fusion AGP",
+"       1092 8030  Monster Fusion",
+"       1092 8035  Monster Fusion AGP",
+"       10b0 0001  Dragon 4000",
+"       1102 1018  3D Blaster Banshee VE",
+"       121a 0001  Voodoo Banshee AGP",
+"       121a 0003  Voodoo Banshee AGP SGRAM",
+"       121a 0004  Voodoo Banshee",
+"       139c 0016  Raven",
+"       139c 0017  Raven",
+"       14af 0002  Maxi Gamer Phoenix",
+"   0004  Voodoo Banshee [Velocity 100]",
+"   0005  Voodoo 3",
+"       121a 0004  Voodoo3 AGP",
+"       121a 0030  Voodoo3 AGP",
+"       121a 0031  Voodoo3 AGP",
+"       121a 0034  Voodoo3 AGP",
+"       121a 0036  Voodoo3 2000 PCI",
+"       121a 0037  Voodoo3 AGP",
+"       121a 0038  Voodoo3 AGP",
+"       121a 003a  Voodoo3 AGP",
+"       121a 0044  Voodoo3",
+"       121a 004b  Velocity 100",
+"       121a 004c  Velocity 200",
+"       121a 004d  Voodoo3 AGP",
+"       121a 004e  Voodoo3 AGP",
+"       121a 0051  Voodoo3 AGP",
+"       121a 0052  Voodoo3 AGP",
+"       121a 0057  Voodoo3 3000 PCI",
+"       121a 0060  Voodoo3 3500 TV (NTSC)",
+"       121a 0061  Voodoo3 3500 TV (PAL)",
+"       121a 0062  Voodoo3 3500 TV (SECAM)",
+"   0009  Voodoo 4 / Voodoo 5",
+"       121a 0003  Voodoo5 PCI 5500",
+"       121a 0009  Voodoo5 AGP 5500/6000",
+"   0057  Voodoo 3/3000 [Avenger]",
+"121b  Advanced Telecommunications Modules",
+"121c  Nippon Texaco., Ltd",
+"121d  Lippert Automationstechnik GmbH",
+"121e  CSPI",
+"   0201  Myrinet 2000 Scalable Cluster Interconnect",
+"121f  Arcus Technology, Inc.",
+"1220  Ariel Corporation",
+"   1220  AMCC 5933 TMS320C80 DSP/Imaging board",
+"1221  Contec Co., Ltd",
+"1222  Ancor Communications, Inc.",
+"1223  Artesyn Communication Products",
+"   0003  PM/Link",
+"   0004  PM/T1",
+"   0005  PM/E1",
+"   0008  PM/SLS",
+"   0009  BajaSpan Resource Target",
+"   000a  BajaSpan Section 0",
+"   000b  BajaSpan Section 1",
+"   000c  BajaSpan Section 2",
+"   000d  BajaSpan Section 3",
+"   000e  PM/PPC",
+"1224  Interactive Images",
+"1225  Power I/O, Inc.",
+"1227  Tech-Source",
+"   0006  Raptor GFX 8P",
+"   0023  Raptor GFX [1100T]",
+"1228  Norsk Elektro Optikk A/S",
+"1229  Data Kinesis Inc.",
+"122a  Integrated Telecom",
+"122b  LG Industrial Systems Co., Ltd",
+"122c  Sican GmbH",
+"122d  Aztech System Ltd",
+"   1206  368DSP",
+"   1400  Trident PCI288-Q3DII (NX)",
+"   50dc  3328 Audio",
+"       122d 0001  3328 Audio",
+"   80da  3328 Audio",
+"       122d 0001  3328 Audio",
+"122e  Xyratex",
+"122f  Andrew Corporation",
+"1230  Fishcamp Engineering",
+"1231  Woodward McCoach, Inc.",
+"1232  GPT Limited",
+"1233  Bus-Tech, Inc.",
+"1234  Technical Corp.",
+"1235  Risq Modular Systems, Inc.",
+"1236  Sigma Designs Corporation",
+"   0000  RealMagic64/GX",
+"   6401  REALmagic 64/GX (SD 6425)",
+"1237  Alta Technology Corporation",
+"1238  Adtran",
+"1239  3DO Company",
+"123a  Visicom Laboratories, Inc.",
+"123b  Seeq Technology, Inc.",
+"123c  Century Systems, Inc.",
+"123d  Engineering Design Team, Inc.",
+"   0000  EasyConnect 8/32",
+"   0002  EasyConnect 8/64",
+"   0003  EasyIO",
+"123e  Simutech, Inc.",
+"123f  C-Cube Microsystems",
+"   00e4  MPEG",
+"   8120  E4?",
+"       11bd 0006  DV500 E4",
+"       11bd 000a  DV500 E4",
+"       11bd 000f  DV500 E4",
+"       1809 0016  Emuzed MAUI-III PCI PVR FM TV",
+"   8888  Cinemaster C 3.0 DVD Decoder",
+"       1002 0001  Cinemaster C 3.0 DVD Decoder",
+"       1002 0002  Cinemaster C 3.0 DVD Decoder",
+"       1328 0001  Cinemaster C 3.0 DVD Decoder",
+"1240  Marathon Technologies Corp.",
+"1241  DSC Communications",
+"1242  JNI Corporation",
+"   1560  JNIC-1560 PCI-X Fibre Channel Controller",
+"       1242 6562  FCX2-6562 Dual Channel PCI-X Fibre Channel Adapter",
+"       1242 656a  FCX-6562 PCI-X Fibre Channel Adapter",
+"   4643  FCI-1063 Fibre Channel Adapter",
+"   6562  FCX2-6562 Dual Channel PCI-X Fibre Channel Adapter",
+"   656a  FCX-6562 PCI-X Fibre Channel Adapter",
+"1243  Delphax",
+"1244  AVM Audiovisuelles MKTG & Computer System GmbH",
+"   0700  B1 ISDN",
+"   0800  C4 ISDN",
+"   0a00  A1 ISDN [Fritz]",
+"       1244 0a00  FRITZ!Card ISDN Controller",
+"   0e00  Fritz!PCI v2.0 ISDN",
+"   1100  C2 ISDN",
+"   1200  T1 ISDN",
+"   2700  Fritz!Card DSL SL",
+"   2900  Fritz!Card DSL v2.0",
+"1245  A.P.D., S.A.",
+"1246  Dipix Technologies, Inc.",
+"1247  Xylon Research, Inc.",
+"1248  Central Data Corporation",
+"1249  Samsung Electronics Co., Ltd.",
+"124a  AEG Electrocom GmbH",
+"124b  SBS/Greenspring Modular I/O",
+"   0040  PCI-40A or cPCI-200 Quad IndustryPack carrier",
+"       124b 9080  PCI9080 Bridge",
+"124c  Solitron Technologies, Inc.",
+"124d  Stallion Technologies, Inc.",
+"   0000  EasyConnection 8/32",
+"   0002  EasyConnection 8/64",
+"   0003  EasyIO",
+"   0004  EasyConnection/RA",
+"124e  Cylink",
+"124f  Infortrend Technology, Inc.",
+"   0041  IFT-2000 Series RAID Controller",
+"1250  Hitachi Microcomputer System Ltd",
+"1251  VLSI Solutions Oy",
+"1253  Guzik Technical Enterprises",
+"1254  Linear Systems Ltd.",
+"1255  Optibase Ltd",
+"   1110  MPEG Forge",
+"   1210  MPEG Fusion",
+"   2110  VideoPlex",
+"   2120  VideoPlex CC",
+"   2130  VideoQuest",
+"1256  Perceptive Solutions, Inc.",
+"   4201  PCI-2220I",
+"   4401  PCI-2240I",
+"   5201  PCI-2000",
+"1257  Vertex Networks, Inc.",
+"1258  Gilbarco, Inc.",
+"1259  Allied Telesyn International",
+"   2560  AT-2560 Fast Ethernet Adapter (i82557B)",
+"   a117  RTL81xx Fast Ethernet",
+"   a120  21x4x DEC-Tulip compatible 10/100 Ethernet",
+"125a  ABB Power Systems",
+"125b  Asix Electronics Corporation",
+"   1400  ALFA GFC2204 Fast Ethernet",
+"       1186 1100  AX8814X Based PCI Fast Ethernet Adapter",
+"125c  Aurora Technologies, Inc.",
+"   0101  Saturn 4520P",
+"   0640  Aries 16000P",
+"125d  ESS Technology",
+"   0000  ES336H Fax Modem (Early Model)",
+"   1948  Solo?",
+"   1968  ES1968 Maestro 2",
+"       1028 0085  ES1968 Maestro-2 PCI",
+"       1033 8051  ES1968 Maestro-2 Audiodrive",
+"   1969  ES1969 Solo-1 Audiodrive",
+"       1014 0166  ES1969 SOLO-1 AudioDrive on IBM Aptiva Mainboard",
+"       125d 8888  Solo-1 Audio Adapter",
+"       153b 111b  Terratec 128i PCI",
+"   1978  ES1978 Maestro 2E",
+"       0e11 b112  Armada M700/E500",
+"       1033 803c  ES1978 Maestro-2E Audiodrive",
+"       1033 8058  ES1978 Maestro-2E Audiodrive",
+"       1092 4000  Monster Sound MX400",
+"       1179 0001  ES1978 Maestro-2E Audiodrive",
+"   1988  ES1988 Allegro-1",
+"       0e11 0098  Evo N600c",
+"       1092 4100  Sonic Impact S100",
+"       125d 1988  ESS Allegro-1 Audiodrive",
+"   1989  ESS Modem",
+"       125d 1989  ESS Modem",
+"   1998  ES1983S Maestro-3i PCI Audio Accelerator",
+"       1028 00b1  Latitude C600",
+"       1028 00e6  ES1983S Maestro-3i (Dell Inspiron 8100)",
+"   1999  ES1983S Maestro-3i PCI Modem Accelerator",
+"   199a  ES1983S Maestro-3i PCI Audio Accelerator",
+"   199b  ES1983S Maestro-3i PCI Modem Accelerator",
+"   2808  ES336H Fax Modem (Later Model)",
+"   2838  ES2838/2839 SuperLink Modem",
+"   2898  ES2898 Modem",
+"       125d 0424  ES56-PI Data Fax Modem",
+"       125d 0425  ES56T-PI Data Fax Modem",
+"       125d 0426  ES56V-PI Data Fax Modem",
+"       125d 0427  VW-PI Data Fax Modem",
+"       125d 0428  ES56ST-PI Data Fax Modem",
+"       125d 0429  ES56SV-PI Data Fax Modem",
+"       147a c001  ES56-PI Data Fax Modem",
+"       14fe 0428  ES56-PI Data Fax Modem",
+"       14fe 0429  ES56-PI Data Fax Modem",
+"125e  Specialvideo Engineering SRL",
+"125f  Concurrent Technologies, Inc.",
+"1260  Intersil Corporation",
+"   3872  Prism 2.5 Wavelan chipset",
+"       1468 0202  LAN-Express IEEE 802.11b Wireless LAN",
+"   3873  Prism 2.5 Wavelan chipset",
+"       1186 3501  DWL-520 Wireless PCI Adapter",
+"       1186 3700  DWL-520 Wireless PCI Adapter, Rev E1",
+"       1385 4105  MA311 802.11b wireless adapter",
+"       1668 0414  HWP01170-01 802.11b PCI Wireless Adapter",
+"       16a5 1601  AIR.mate PC-400 PCI Wireless LAN Adapter",
+"       1737 3874  WMP11 Wireless 802.11b PCI Adapter",
+"       8086 2513  Wireless 802.11b MiniPCI Adapter",
+"   3886  ISL3886 [Prism Javelin/Prism Xbow]",
+"       17cf 0037  XG-901 and clones Wireless Adapter",
+"   3890  ISL3890 [Prism GT/Prism Duette]/ISL3886 [Prism Javelin/Prism Xbow]",
+"       10b8 2802  SMC2802W Wireless PCI Adapter",
+"       10b8 2835  SMC2835W Wireless Cardbus Adapter",
+"       10b8 a835  SMC2835W V2 Wireless Cardbus Adapter",
+"       1113 4203  WN4201B",
+"       1113 ee03  SMC2802W V2 Wireless PCI Adapter [ISL3886]",
+"       1113 ee08  SMC2835W V3 EU Wireless Cardbus Adapter",
+"       1186 3202  DWL-G650 A1 Wireless Adapter",
+"       1259 c104  CG-WLCB54GT Wireless Adapter",
+"       1385 4800  WG511 Wireless Adapter",
+"       16a5 1605  ALLNET ALL0271 Wireless PCI Adapter",
+"       17cf 0014  XG-600 and clones Wireless Adapter",
+"       17cf 0020  XG-900 and clones Wireless Adapter",
+"   8130  HMP8130 NTSC/PAL Video Decoder",
+"   8131  HMP8131 NTSC/PAL Video Decoder",
+"   ffff  ISL3886IK",
+"       1260 0000  Senao 3054MP+ (J) mini-PCI WLAN 802.11g adapter",
+"1261  Matsushita-Kotobuki Electronics Industries, Ltd.",
+"1262  ES Computer Company, Ltd.",
+"1263  Sonic Solutions",
+"1264  Aval Nagasaki Corporation",
+"1265  Casio Computer Co., Ltd.",
+"1266  Microdyne Corporation",
+"   0001  NE10/100 Adapter (i82557B)",
+"   1910  NE2000Plus (RT8029) Ethernet Adapter",
+"       1266 1910  NE2000Plus Ethernet Adapter",
+"1267  S. A. Telecommunications",
+"   5352  PCR2101",
+"   5a4b  Telsat Turbo",
+"1268  Tektronix",
+"1269  Thomson-CSF/TTM",
+"126a  Lexmark International, Inc.",
+"126b  Adax, Inc.",
+"126c  Northern Telecom",
+"   1211  10/100BaseTX [RTL81xx]",
+"   126c  802.11b Wireless Ethernet Adapter",
+"126d  Splash Technology, Inc.",
+"126e  Sumitomo Metal Industries, Ltd.",
+"126f  Silicon Motion, Inc.",
+"   0501  SM501 VoyagerGX Rev. AA",
+"   0510  SM501 VoyagerGX Rev. B",
+"   0710  SM710 LynxEM",
+"   0712  SM712 LynxEM+",
+"   0720  SM720 Lynx3DM",
+"   0730  SM731 Cougar3DR",
+"   0810  SM810 LynxE",
+"   0811  SM811 LynxE",
+"   0820  SM820 Lynx3D",
+"   0910  SM910",
+"1270  Olympus Optical Co., Ltd.",
+"1271  GW Instruments",
+"1272  Telematics International",
+"1273  Hughes Network Systems",
+"   0002  DirecPC",
+"1274  Ensoniq",
+"   1171  ES1373 [AudioPCI] (also Creative Labs CT5803)",
+"   1371  ES1371 [AudioPCI-97]",
+"       0e11 0024  AudioPCI on Motherboard Compaq Deskpro",
+"       0e11 b1a7  ES1371, ES1373 AudioPCI",
+"       1033 80ac  ES1371, ES1373 AudioPCI",
+"       1042 1854  Tazer",
+"       107b 8054  Tabor2",
+"       1274 1371  Creative Sound Blaster AudioPCI64V, AudioPCI128",
+"       1274 8001  CT4751 board",
+"       1462 6470  ES1371, ES1373 AudioPCI On Motherboard MS-6147 1.1A",
+"       1462 6560  ES1371, ES1373 AudioPCI On Motherboard MS-6156 1.10",
+"       1462 6630  ES1371, ES1373 AudioPCI On Motherboard MS-6163BX 1.0A",
+"       1462 6631  ES1371, ES1373 AudioPCI On Motherboard MS-6163VIA 1.0A",
+"       1462 6632  ES1371, ES1373 AudioPCI On Motherboard MS-6163BX 2.0A",
+"       1462 6633  ES1371, ES1373 AudioPCI On Motherboard MS-6163VIA 2.0A",
+"       1462 6820  ES1371, ES1373 AudioPCI On Motherboard MS-6182 1.00",
+"       1462 6822  ES1371, ES1373 AudioPCI On Motherboard MS-6182 1.00A",
+"       1462 6830  ES1371, ES1373 AudioPCI On Motherboard MS-6183 1.00",
+"       1462 6880  ES1371, ES1373 AudioPCI On Motherboard MS-6188 1.00",
+"       1462 6900  ES1371, ES1373 AudioPCI On Motherboard MS-6190 1.00",
+"       1462 6910  ES1371, ES1373 AudioPCI On Motherboard MS-6191",
+"       1462 6930  ES1371, ES1373 AudioPCI On Motherboard MS-6193",
+"       1462 6990  ES1371, ES1373 AudioPCI On Motherboard MS-6199BX 2.0A",
+"       1462 6991  ES1371, ES1373 AudioPCI On Motherboard MS-6199VIA 2.0A",
+"       14a4 2077  ES1371, ES1373 AudioPCI On Motherboard KR639",
+"       14a4 2105  ES1371, ES1373 AudioPCI On Motherboard MR800",
+"       14a4 2107  ES1371, ES1373 AudioPCI On Motherboard MR801",
+"       14a4 2172  ES1371, ES1373 AudioPCI On Motherboard DR739",
+"       1509 9902  ES1371, ES1373 AudioPCI On Motherboard KW11",
+"       1509 9903  ES1371, ES1373 AudioPCI On Motherboard KW31",
+"       1509 9904  ES1371, ES1373 AudioPCI On Motherboard KA11",
+"       1509 9905  ES1371, ES1373 AudioPCI On Motherboard KC13",
+"       152d 8801  ES1371, ES1373 AudioPCI On Motherboard CP810E",
+"       152d 8802  ES1371, ES1373 AudioPCI On Motherboard CP810",
+"       152d 8803  ES1371, ES1373 AudioPCI On Motherboard P3810E",
+"       152d 8804  ES1371, ES1373 AudioPCI On Motherboard P3810-S",
+"       152d 8805  ES1371, ES1373 AudioPCI On Motherboard P3820-S",
+"       270f 2001  ES1371, ES1373 AudioPCI On Motherboard 6CTR",
+"       270f 2200  ES1371, ES1373 AudioPCI On Motherboard 6WTX",
+"       270f 3000  ES1371, ES1373 AudioPCI On Motherboard 6WSV",
+"       270f 3100  ES1371, ES1373 AudioPCI On Motherboard 6WIV2",
+"       270f 3102  ES1371, ES1373 AudioPCI On Motherboard 6WIV",
+"       270f 7060  ES1371, ES1373 AudioPCI On Motherboard 6ASA2",
+"       8086 4249  ES1371, ES1373 AudioPCI On Motherboard BI440ZX",
+"       8086 424c  ES1371, ES1373 AudioPCI On Motherboard BL440ZX",
+"       8086 425a  ES1371, ES1373 AudioPCI On Motherboard BZ440ZX",
+"       8086 4341  ES1371, ES1373 AudioPCI On Motherboard Cayman",
+"       8086 4343  ES1371, ES1373 AudioPCI On Motherboard Cape Cod",
+"       8086 4541  D815EEA Motherboard",
+"       8086 4649  ES1371, ES1373 AudioPCI On Motherboard Fire Island",
+"       8086 464a  ES1371, ES1373 AudioPCI On Motherboard FJ440ZX",
+"       8086 4d4f  ES1371, ES1373 AudioPCI On Motherboard Montreal",
+"       8086 4f43  ES1371, ES1373 AudioPCI On Motherboard OC440LX",
+"       8086 5243  ES1371, ES1373 AudioPCI On Motherboard RC440BX",
+"       8086 5352  ES1371, ES1373 AudioPCI On Motherboard SunRiver",
+"       8086 5643  ES1371, ES1373 AudioPCI On Motherboard Vancouver",
+"       8086 5753  ES1371, ES1373 AudioPCI On Motherboard WS440BX",
+"   5000  ES1370 [AudioPCI]",
+"   5880  5880 AudioPCI",
+"       1274 2000  Creative Sound Blaster AudioPCI128",
+"       1274 2003  Creative SoundBlaster AudioPCI 128",
+"       1274 5880  Creative Sound Blaster AudioPCI128",
+"       1274 8001  Sound Blaster 16PCI 4.1ch",
+"       1458 a000  5880 AudioPCI On Motherboard 6OXET",
+"       1462 6880  5880 AudioPCI On Motherboard MS-6188 1.00",
+"       270f 2001  5880 AudioPCI On Motherboard 6CTR",
+"       270f 2200  5880 AudioPCI On Motherboard 6WTX",
+"       270f 7040  5880 AudioPCI On Motherboard 6ATA4",
+"1275  Network Appliance Corporation",
+"1276  Switched Network Technologies, Inc.",
+"1277  Comstream",
+"1278  Transtech Parallel Systems Ltd.",
+"   0701  TPE3/TM3 PowerPC Node",
+"   0710  TPE5 PowerPC PCI board",
+"1279  Transmeta Corporation",
+"   0060  TM8000 Northbridge",
+"   0061  TM8000 AGP bridge",
+"   0295  Northbridge",
+"   0395  LongRun Northbridge",
+"   0396  SDRAM controller",
+"   0397  BIOS scratchpad",
+"127a  Rockwell International",
+"   1002  HCF 56k Data/Fax Modem",
+"       1092 094c  SupraExpress 56i PRO [Diamond SUP2380]",
+"       122d 4002  HPG / MDP3858-U",
+"       122d 4005  MDP3858-E",
+"       122d 4007  MDP3858-A/-NZ",
+"       122d 4012  MDP3858-SA",
+"       122d 4017  MDP3858-W",
+"       122d 4018  MDP3858-W",
+"       127a 1002  Rockwell 56K D/F HCF Modem",
+"   1003  HCF 56k Data/Fax Modem",
+"       0e11 b0bc  229-DF Zephyr",
+"       0e11 b114  229-DF Cheetah",
+"       1033 802b  229-DF",
+"       13df 1003  PCI56RX Modem",
+"       13e0 0117  IBM",
+"       13e0 0147  IBM F-1156IV+/R3 Spain V.90 Modem",
+"       13e0 0197  IBM",
+"       13e0 01c7  IBM F-1156IV+/R3 WW V.90 Modem",
+"       13e0 01f7  IBM",
+"       1436 1003  IBM",
+"       1436 1103  IBM 5614PM3G V.90 Modem",
+"       1436 1602  Compaq 229-DF Ducati",
+"   1004  HCF 56k Data/Fax/Voice Modem",
+"       1048 1500  MicroLink 56k Modem",
+"       10cf 1059  Fujitsu 229-DFRT",
+"   1005  HCF 56k Data/Fax/Voice/Spkp (w/Handset) Modem",
+"       1005 127a  AOpen FM56-P",
+"       1033 8029  229-DFSV",
+"       1033 8054  Modem",
+"       10cf 103c  Fujitsu",
+"       10cf 1055  Fujitsu 229-DFSV",
+"       10cf 1056  Fujitsu 229-DFSV",
+"       122d 4003  MDP3858SP-U",
+"       122d 4006  Packard Bell MDP3858V-E",
+"       122d 4008  MDP3858SP-A/SP-NZ",
+"       122d 4009  MDP3858SP-E",
+"       122d 4010  MDP3858V-U",
+"       122d 4011  MDP3858SP-SA",
+"       122d 4013  MDP3858V-A/V-NZ",
+"       122d 4015  MDP3858SP-W",
+"       122d 4016  MDP3858V-W",
+"       122d 4019  MDP3858V-SA",
+"       13df 1005  PCI56RVP Modem",
+"       13e0 0187  IBM",
+"       13e0 01a7  IBM",
+"       13e0 01b7  IBM DF-1156IV+/R3 Spain V.90 Modem",
+"       13e0 01d7  IBM DF-1156IV+/R3 WW V.90 Modem",
+"       1436 1005  IBM",
+"       1436 1105  IBM",
+"       1437 1105  IBM 5614PS3G V.90 Modem",
+"   1022  HCF 56k Modem",
+"       1436 1303  M3-5614PM3G V.90 Modem",
+"   1023  HCF 56k Data/Fax Modem",
+"       122d 4020  Packard Bell MDP3858-WE",
+"       122d 4023  MDP3858-UE",
+"       13e0 0247  IBM F-1156IV+/R6 Spain V.90 Modem",
+"       13e0 0297  IBM",
+"       13e0 02c7  IBM F-1156IV+/R6 WW V.90 Modem",
+"       1436 1203  IBM",
+"       1436 1303  IBM",
+"   1024  HCF 56k Data/Fax/Voice Modem",
+"   1025  HCF 56k Data/Fax/Voice/Spkp (w/Handset) Modem",
+"       10cf 106a  Fujitsu 235-DFSV",
+"       122d 4021  Packard Bell MDP3858V-WE",
+"       122d 4022  MDP3858SP-WE",
+"       122d 4024  MDP3858V-UE",
+"       122d 4025  MDP3858SP-UE",
+"   1026  HCF 56k PCI Speakerphone Modem",
+"   1032  HCF 56k Modem",
+"   1033  HCF 56k Modem",
+"   1034  HCF 56k Modem",
+"   1035  HCF 56k PCI Speakerphone Modem",
+"   1036  HCF 56k Modem",
+"   1085  HCF 56k Volcano PCI Modem",
+"   2005  HCF 56k Data/Fax Modem",
+"       104d 8044  229-DFSV",
+"       104d 8045  229-DFSV",
+"       104d 8055  PBE/Aztech 235W-DFSV",
+"       104d 8056  235-DFSV",
+"       104d 805a  Modem",
+"       104d 805f  Modem",
+"       104d 8074  Modem",
+"   2013  HSF 56k Data/Fax Modem",
+"       1179 0001  Modem",
+"       1179 ff00  Modem",
+"   2014  HSF 56k Data/Fax/Voice Modem",
+"       10cf 1057  Fujitsu Citicorp III",
+"       122d 4050  MSP3880-U",
+"       122d 4055  MSP3880-W",
+"   2015  HSF 56k Data/Fax/Voice/Spkp (w/Handset) Modem",
+"       10cf 1063  Fujitsu",
+"       10cf 1064  Fujitsu",
+"       1468 2015  Fujitsu",
+"   2016  HSF 56k Data/Fax/Voice/Spkp Modem",
+"       122d 4051  MSP3880V-W",
+"       122d 4052  MSP3880SP-W",
+"       122d 4054  MSP3880V-U",
+"       122d 4056  MSP3880SP-U",
+"       122d 4057  MSP3880SP-A",
+"   4311  Riptide HSF 56k PCI Modem",
+"       127a 4311  Ring Modular? Riptide HSF RT HP Dom",
+"       13e0 0210  HP-GVC",
+"   4320  Riptide PCI Audio Controller",
+"       1235 4320  Riptide PCI Audio Controller",
+"   4321  Riptide HCF 56k PCI Modem",
+"       1235 4321  Hewlett Packard DF",
+"       1235 4324  Hewlett Packard DF",
+"       13e0 0210  Hewlett Packard DF",
+"       144d 2321  Riptide",
+"   4322  Riptide PCI Game Controller",
+"       1235 4322  Riptide PCI Game Controller",
+"   8234  RapidFire 616X ATM155 Adapter",
+"       108d 0022  RapidFire 616X ATM155 Adapter",
+"       108d 0027  RapidFire 616X ATM155 Adapter",
+"127b  Pixera Corporation",
+"127c  Crosspoint Solutions, Inc.",
+"127d  Vela Research",
+"127e  Winnov, L.P.",
+"127f  Fujifilm",
+"1280  Photoscript Group Ltd.",
+"1281  Yokogawa Electric Corporation",
+"1282  Davicom Semiconductor, Inc.",
+"   9009  Ethernet 100/10 MBit",
+"   9100  21x4x DEC-Tulip compatible 10/100 Ethernet",
+"   9102  21x4x DEC-Tulip compatible 10/100 Ethernet",
+"   9132  Ethernet 100/10 MBit",
+"1283  Integrated Technology Express, Inc.",
+"   673a  IT8330G",
+"   8211  ITE 8211F Single Channel UDMA 133 (ASUS 8211 (ITE IT8212 ATA RAID Controller))",
+"       1043 8138  P5GD1-VW Mainboard",
+"   8212  IT/ITE8212 Dual channel ATA RAID controller (PCI version seems to be IT8212, embedded seems to be ITE8212)",
+"       1283 0001  IT/ITE8212 Dual channel ATA RAID controller",
+"   8330  IT8330G",
+"   8872  IT8874F PCI Dual Serial Port Controller",
+"   8888  IT8888F PCI to ISA Bridge with SMB",
+"   8889  IT8889F PCI to ISA Bridge",
+"   e886  IT8330G",
+"1284  Sahara Networks, Inc.",
+"1285  Platform Technologies, Inc.",
+"   0100  AGOGO sound chip (aka ESS Maestro 1)",
+"1286  Mazet GmbH",
+"1287  M-Pact, Inc.",
+"   001e  LS220D DVD Decoder",
+"   001f  LS220C DVD Decoder",
+"1288  Timestep Corporation",
+"1289  AVC Technology, Inc.",
+"128a  Asante Technologies, Inc.",
+"128b  Transwitch Corporation",
+"128c  Retix Corporation",
+"128d  G2 Networks, Inc.",
+"   0021  ATM155 Adapter",
+"128e  Hoontech Corporation/Samho Multi Tech Ltd.",
+"   0008  ST128 WSS/SB",
+"   0009  ST128 SAM9407",
+"   000a  ST128 Game Port",
+"   000b  ST128 MPU Port",
+"   000c  ST128 Ctrl Port",
+"128f  Tateno Dennou, Inc.",
+"1290  Sord Computer Corporation",
+"1291  NCS Computer Italia",
+"1292  Tritech Microelectronics Inc",
+"1293  Media Reality Technology",
+"1294  Rhetorex, Inc.",
+"1295  Imagenation Corporation",
+"1296  Kofax Image Products",
+"1297  Holco Enterprise Co, Ltd/Shuttle Computer",
+"1298  Spellcaster Telecommunications Inc.",
+"1299  Knowledge Technology Lab.",
+"129a  VMetro, inc.",
+"   0615  PBT-615 PCI-X Bus Analyzer",
+"129b  Image Access",
+"129c  Jaycor",
+"129d  Compcore Multimedia, Inc.",
+"129e  Victor Company of Japan, Ltd.",
+"129f  OEC Medical Systems, Inc.",
+"12a0  Allen-Bradley Company",
+"12a1  Simpact Associates, Inc.",
+"12a2  Newgen Systems Corporation",
+"12a3  Lucent Technologies",
+"   8105  T8105 H100 Digital Switch",
+"12a4  NTT Electronics Technology Company",
+"12a5  Vision Dynamics Ltd.",
+"12a6  Scalable Networks, Inc.",
+"12a7  AMO GmbH",
+"12a8  News Datacom",
+"12a9  Xiotech Corporation",
+"12aa  SDL Communications, Inc.",
+"12ab  Yuan Yuan Enterprise Co., Ltd.",
+"   0002  AU8830 [Vortex2] Based Sound Card With A3D Support",
+"   3000  MPG-200C PCI DVD Decoder Card",
+"12ac  Measurex Corporation",
+"12ad  Multidata GmbH",
+"12ae  Alteon Networks Inc.",
+"   0001  AceNIC Gigabit Ethernet",
+"       1014 0104  Gigabit Ethernet-SX PCI Adapter",
+"       12ae 0001  Gigabit Ethernet-SX (Universal)",
+"       1410 0104  Gigabit Ethernet-SX PCI Adapter",
+"   0002  AceNIC Gigabit Ethernet (Copper)",
+"       10a9 8002  Acenic Gigabit Ethernet",
+"       12ae 0002  Gigabit Ethernet-T (3C986-T)",
+"   00fa  Farallon PN9100-T Gigabit Ethernet",
+"12af  TDK USA Corp",
+"12b0  Jorge Scientific Corp",
+"12b1  GammaLink",
+"12b2  General Signal Networks",
+"12b3  Inter-Face Co Ltd",
+"12b4  FutureTel Inc",
+"12b5  Granite Systems Inc.",
+"12b6  Natural Microsystems",
+"12b7  Cognex Modular Vision Systems Div. - Acumen Inc.",
+"12b8  Korg",
+"12b9  3Com Corp, Modem Division",
+"   1006  WinModem",
+"       12b9 005c  USR 56k Internal Voice WinModem (Model 3472)",
+"       12b9 005e  USR 56k Internal WinModem (Models 662975)",
+"       12b9 0062  USR 56k Internal Voice WinModem (Model 662978)",
+"       12b9 0068  USR 56k Internal Voice WinModem (Model 5690)",
+"       12b9 007a  USR 56k Internal Voice WinModem (Model 662974)",
+"       12b9 007f  USR 56k Internal WinModem (Models 5698, 5699)",
+"       12b9 0080  USR 56k Internal WinModem (Models 2975, 3528)",
+"       12b9 0081  USR 56k Internal Voice WinModem (Models 2974, 3529)",
+"       12b9 0091  USR 56k Internal Voice WinModem (Model 2978)",
+"   1007  USR 56k Internal WinModem",
+"       12b9 00a3  USR 56k Internal WinModem (Model 3595)",
+"   1008  56K FaxModem Model 5610",
+"       12b9 00a2  USR 56k Internal FAX Modem (Model 2977)",
+"       12b9 00aa  USR 56k Internal Voice Modem (Model 2976)",
+"       12b9 00ab  USR 56k Internal Voice Modem (Model 5609)",
+"       12b9 00ac  USR 56k Internal Voice Modem (Model 3298)",
+"       12b9 00ad  USR 56k Internal FAX Modem (Model 5610)",
+"12ba  BittWare, Inc.",
+"12bb  Nippon Unisoft Corporation",
+"12bc  Array Microsystems",
+"12bd  Computerm Corp.",
+"12be  Anchor Chips Inc.",
+"   3041  AN3041Q CO-MEM",
+"   3042  AN3042Q CO-MEM Lite",
+"       12be 3042  Anchor Chips Lite Evaluation Board",
+"12bf  Fujifilm Microdevices",
+"12c0  Infimed",
+"12c1  GMM Research Corp",
+"12c2  Mentec Limited",
+"12c3  Holtek Microelectronics Inc",
+"   0058  PCI NE2K Ethernet",
+"   5598  PCI NE2K Ethernet",
+"12c4  Connect Tech Inc",
+"   0001  Blue HEAT/PCI 8 (RS232/CL/RJ11)",
+"   0002  Blue HEAT/PCI 4 (RS232)",
+"   0003  Blue HEAT/PCI 2 (RS232)",
+"   0004  Blue HEAT/PCI 8 (UNIV, RS485)",
+"   0005  Blue HEAT/PCI 4+4/6+2 (UNIV, RS232/485)",
+"   0006  Blue HEAT/PCI 4 (OPTO, RS485)",
+"   0007  Blue HEAT/PCI 2+2 (RS232/485)",
+"   0008  Blue HEAT/PCI 2 (OPTO, Tx, RS485)",
+"   0009  Blue HEAT/PCI 2+6 (RS232/485)",
+"   000a  Blue HEAT/PCI 8 (Tx, RS485)",
+"   000b  Blue HEAT/PCI 4 (Tx, RS485)",
+"   000c  Blue HEAT/PCI 2 (20 MHz, RS485)",
+"   000d  Blue HEAT/PCI 2 PTM",
+"   0100  NT960/PCI",
+"   0201  cPCI Titan - 2 Port",
+"   0202  cPCI Titan - 4 Port",
+"   0300  CTI PCI UART 2 (RS232)",
+"   0301  CTI PCI UART 4 (RS232)",
+"   0302  CTI PCI UART 8 (RS232)",
+"   0310  CTI PCI UART 1+1 (RS232/485)",
+"   0311  CTI PCI UART 2+2 (RS232/485)",
+"   0312  CTI PCI UART 4+4 (RS232/485)",
+"   0320  CTI PCI UART 2",
+"   0321  CTI PCI UART 4",
+"   0322  CTI PCI UART 8",
+"   0330  CTI PCI UART 2 (RS485)",
+"   0331  CTI PCI UART 4 (RS485)",
+"   0332  CTI PCI UART 8 (RS485)",
+"12c5  Picture Elements Incorporated",
+"   007e  Imaging/Scanning Subsystem Engine",
+"   007f  Imaging/Scanning Subsystem Engine",
+"   0081  PCIVST [Grayscale Thresholding Engine]",
+"   0085  Video Simulator/Sender",
+"   0086  THR2 Multi-scale Thresholder",
+"12c6  Mitani Corporation",
+"12c7  Dialogic Corp",
+"12c8  G Force Co, Ltd",
+"12c9  Gigi Operations",
+"12ca  Integrated Computing Engines",
+"12cb  Antex Electronics Corporation",
+"12cc  Pluto Technologies International",
+"12cd  Aims Lab",
+"12ce  Netspeed Inc.",
+"12cf  Prophet Systems, Inc.",
+"12d0  GDE Systems, Inc.",
+"12d1  PSITech",
+"12d2  NVidia / SGS Thomson (Joint Venture)",
+"   0008  NV1",
+"   0009  DAC64",
+"   0018  Riva128",
+"       1048 0c10  VICTORY Erazor",
+"       107b 8030  STB Velocity 128",
+"       1092 0350  Viper V330",
+"       1092 1092  Viper V330",
+"       10b4 1b1b  STB Velocity 128",
+"       10b4 1b1d  STB Velocity 128",
+"       10b4 1b1e  STB Velocity 128, PAL TV-Out",
+"       10b4 1b20  STB Velocity 128 Sapphire",
+"       10b4 1b21  STB Velocity 128",
+"       10b4 1b22  STB Velocity 128 AGP, NTSC TV-Out",
+"       10b4 1b23  STB Velocity 128 AGP, PAL TV-Out",
+"       10b4 1b27  STB Velocity 128 DVD",
+"       10b4 1b88  MVP Pro 128",
+"       10b4 222a  STB Velocity 128 AGP",
+"       10b4 2230  STB Velocity 128",
+"       10b4 2232  STB Velocity 128",
+"       10b4 2235  STB Velocity 128 AGP",
+"       2a15 54a3  3DVision-SAGP / 3DexPlorer 3000",
+"   0019  Riva128ZX",
+"   0020  TNT",
+"   0028  TNT2",
+"   0029  UTNT2",
+"   002c  VTNT2",
+"   00a0  ITNT2",
+"12d3  Vingmed Sound A/S",
+"12d4  Ulticom (Formerly DGM&S)",
+"   0200  T1 Card",
+"12d5  Equator Technologies Inc",
+"   0003  BSP16",
+"   1000  BSP15",
+"12d6  Analogic Corp",
+"12d7  Biotronic SRL",
+"12d8  Pericom Semiconductor",
+"   8150  PCI to PCI Bridge",
+"12d9  Aculab PLC",
+"   0002  PCI Prosody",
+"   0004  cPCI Prosody",
+"   0005  Aculab E1/T1 PCI card",
+"   1078  Prosody X class e1000 device",
+"       12d9 000d  Prosody X PCI",
+"12da  True Time Inc.",
+"12db  Annapolis Micro Systems, Inc",
+"12dc  Symicron Computer Communication Ltd.",
+"12dd  Management Graphics",
+"12de  Rainbow Technologies",
+"   0200  CryptoSwift CS200",
+"12df  SBS Technologies Inc",
+"12e0  Chase Research",
+"   0010  ST16C654 Quad UART",
+"   0020  ST16C654 Quad UART",
+"   0030  ST16C654 Quad UART",
+"12e1  Nintendo Co, Ltd",
+"12e2  Datum Inc. Bancomm-Timing Division",
+"12e3  Imation Corp - Medical Imaging Systems",
+"12e4  Brooktrout Technology Inc",
+"12e5  Apex Semiconductor Inc",
+"12e6  Cirel Systems",
+"12e7  Sunsgroup Corporation",
+"12e8  Crisc Corp",
+"12e9  GE Spacenet",
+"12ea  Zuken",
+"12eb  Aureal Semiconductor",
+"   0001  Vortex 1",
+"       104d 8036  AU8820 Vortex Digital Audio Processor",
+"       1092 2000  Sonic Impact A3D",
+"       1092 2100  Sonic Impact A3D",
+"       1092 2110  Sonic Impact A3D",
+"       1092 2200  Sonic Impact A3D",
+"       122d 1002  AU8820 Vortex Digital Audio Processor",
+"       12eb 0001  AU8820 Vortex Digital Audio Processor",
+"       5053 3355  Montego",
+"   0002  Vortex 2",
+"       104d 8049  AU8830 Vortex 3D Digital Audio Processor",
+"       104d 807b  AU8830 Vortex 3D Digital Audio Processor",
+"       1092 3000  Monster Sound II",
+"       1092 3001  Monster Sound II",
+"       1092 3002  Monster Sound II",
+"       1092 3003  Monster Sound II",
+"       1092 3004  Monster Sound II",
+"       12eb 0002  AU8830 Vortex 3D Digital Audio Processor",
+"       12eb 0088  AU8830 Vortex 3D Digital Audio Processor",
+"       144d 3510  AU8830 Vortex 3D Digital Audio Processor",
+"       5053 3356  Montego II",
+"   0003  AU8810 Vortex Digital Audio Processor",
+"       104d 8049  AU8810 Vortex Digital Audio Processor",
+"       104d 8077  AU8810 Vortex Digital Audio Processor",
+"       109f 1000  AU8810 Vortex Digital Audio Processor",
+"       12eb 0003  AU8810 Vortex Digital Audio Processor",
+"       1462 6780  AU8810 Vortex Digital Audio Processor",
+"       14a4 2073  AU8810 Vortex Digital Audio Processor",
+"       14a4 2091  AU8810 Vortex Digital Audio Processor",
+"       14a4 2104  AU8810 Vortex Digital Audio Processor",
+"       14a4 2106  AU8810 Vortex Digital Audio Processor",
+"   8803  Vortex 56k Software Modem",
+"       12eb 8803  Vortex 56k Software Modem",
+"12ec  3A International, Inc.",
+"12ed  Optivision Inc.",
+"12ee  Orange Micro",
+"12ef  Vienna Systems",
+"12f0  Pentek",
+"12f1  Sorenson Vision Inc",
+"12f2  Gammagraphx, Inc.",
+"12f3  Radstone Technology",
+"12f4  Megatel",
+"12f5  Forks",
+"12f6  Dawson France",
+"12f7  Cognex",
+"12f8  Electronic Design GmbH",
+"   0002  VideoMaker",
+"12f9  Four Fold Ltd",
+"12fb  Spectrum Signal Processing",
+"   0001  PMC-MAI",
+"   00f5  F5 Dakar",
+"   02ad  PMC-2MAI",
+"   2adc  ePMC-2ADC",
+"   3100  PRO-3100",
+"   3500  PRO-3500",
+"   4d4f  Modena",
+"   8120  ePMC-8120",
+"   da62  Daytona C6201 PCI (Hurricane)",
+"   db62  Ingliston XBIF",
+"   dc62  Ingliston PLX9054",
+"   dd62  Ingliston JTAG/ISP",
+"   eddc  ePMC-MSDDC",
+"   fa01  ePMC-FPGA",
+"12fc  Capital Equipment Corp",
+"12fd  I2S",
+"12fe  ESD Electronic System Design GmbH",
+"12ff  Lexicon",
+"1300  Harman International Industries Inc",
+"1302  Computer Sciences Corp",
+"1303  Innovative Integration",
+"1304  Juniper Networks",
+"1305  Netphone, Inc",
+"1306  Duet Technologies",
+"1307  Measurement Computing",
+"   0001  PCI-DAS1602/16",
+"   000b  PCI-DIO48H",
+"   000c  PCI-PDISO8",
+"   000d  PCI-PDISO16",
+"   000f  PCI-DAS1200",
+"   0010  PCI-DAS1602/12",
+"   0014  PCI-DIO24H",
+"   0015  PCI-DIO24H/CTR3",
+"   0016  PCI-DIO48H/CTR15",
+"   0017  PCI-DIO96H",
+"   0018  PCI-CTR05",
+"   0019  PCI-DAS1200/JR",
+"   001a  PCI-DAS1001",
+"   001b  PCI-DAS1002",
+"   001c  PCI-DAS1602JR/16",
+"   001d  PCI-DAS6402/16",
+"   001e  PCI-DAS6402/12",
+"   001f  PCI-DAS16/M1",
+"   0020  PCI-DDA02/12",
+"   0021  PCI-DDA04/12",
+"   0022  PCI-DDA08/12",
+"   0023  PCI-DDA02/16",
+"   0024  PCI-DDA04/16",
+"   0025  PCI-DDA08/16",
+"   0026  PCI-DAC04/12-HS",
+"   0027  PCI-DAC04/16-HS",
+"   0028  PCI-DIO24",
+"   0029  PCI-DAS08",
+"   002c  PCI-INT32",
+"   0033  PCI-DUAL-AC5",
+"   0034  PCI-DAS-TC",
+"   0035  PCI-DAS64/M1/16",
+"   0036  PCI-DAS64/M2/16",
+"   0037  PCI-DAS64/M3/16",
+"   004c  PCI-DAS1000",
+"   004d  PCI-QUAD04",
+"   0052  PCI-DAS4020/12",
+"   0054  PCI-DIO96",
+"   005e  PCI-DAS6025",
+"1308  Jato Technologies Inc.",
+"   0001  NetCelerator Adapter",
+"       1308 0001  NetCelerator Adapter",
+"1309  AB Semiconductor Ltd",
+"130a  Mitsubishi Electric Microcomputer",
+"130b  Colorgraphic Communications Corp",
+"130c  Ambex Technologies, Inc",
+"130d  Accelerix Inc",
+"130e  Yamatake-Honeywell Co. Ltd",
+"130f  Advanet Inc",
+"1310  Gespac",
+"1311  Videoserver, Inc",
+"1312  Acuity Imaging, Inc",
+"1313  Yaskawa Electric Co.",
+"1316  Teradyne Inc",
+"1317  Linksys",
+"   0981  21x4x DEC-Tulip compatible 10/100 Ethernet",
+"   0985  NC100 Network Everywhere Fast Ethernet 10/100",
+"       1734 100c  Scenic N300 ADMtek AN983 10/100 Mbps PCI Adapter",
+"   1985  21x4x DEC-Tulip compatible 10/100 Ethernet",
+"   2850  HSP MicroModem 56",
+"   5120  ADMtek ADM5120 OpenGate System-on-Chip",
+"   8201  ADMtek ADM8211 802.11b Wireless Interface",
+"       10b8 2635  SMC2635W 802.11b (11Mbps) wireless lan pcmcia (cardbus) card",
+"       1317 8201  SMC2635W 802.11b (11mbps) wireless lan pcmcia (cardbus) card",
+"   8211  ADMtek ADM8211 802.11b Wireless Interface",
+"   9511  21x4x DEC-Tulip compatible 10/100 Ethernet",
+"1318  Packet Engines Inc.",
+"   0911  GNIC-II PCI Gigabit Ethernet [Hamachi]",
+"1319  Fortemedia, Inc",
+"   0801  Xwave QS3000A [FM801]",
+"       1319 1319  FM801 PCI Audio",
+"   0802  Xwave QS3000A [FM801 game port]",
+"       1319 1319  FM801 PCI Joystick",
+"   1000  FM801 PCI Audio",
+"   1001  FM801 PCI Joystick",
+"131a  Finisar Corp.",
+"131c  Nippon Electro-Sensory Devices Corp",
+"131d  Sysmic, Inc.",
+"131e  Xinex Networks Inc",
+"131f  Siig Inc",
+"   1000  CyberSerial (1-port) 16550",
+"   1001  CyberSerial (1-port) 16650",
+"   1002  CyberSerial (1-port) 16850",
+"   1010  Duet 1S(16550)+1P",
+"   1011  Duet 1S(16650)+1P",
+"   1012  Duet 1S(16850)+1P",
+"   1020  CyberParallel (1-port)",
+"   1021  CyberParallel (2-port)",
+"   1030  CyberSerial (2-port) 16550",
+"   1031  CyberSerial (2-port) 16650",
+"   1032  CyberSerial (2-port) 16850",
+"   1034  Trio 2S(16550)+1P",
+"   1035  Trio 2S(16650)+1P",
+"   1036  Trio 2S(16850)+1P",
+"   1050  CyberSerial (4-port) 16550",
+"   1051  CyberSerial (4-port) 16650",
+"   1052  CyberSerial (4-port) 16850",
+"   2000  CyberSerial (1-port) 16550",
+"   2001  CyberSerial (1-port) 16650",
+"   2002  CyberSerial (1-port) 16850",
+"   2010  Duet 1S(16550)+1P",
+"   2011  Duet 1S(16650)+1P",
+"   2012  Duet 1S(16850)+1P",
+"   2020  CyberParallel (1-port)",
+"   2021  CyberParallel (2-port)",
+"   2030  CyberSerial (2-port) 16550",
+"       131f 2030  PCI Serial Card",
+"   2031  CyberSerial (2-port) 16650",
+"   2032  CyberSerial (2-port) 16850",
+"   2040  Trio 1S(16550)+2P",
+"   2041  Trio 1S(16650)+2P",
+"   2042  Trio 1S(16850)+2P",
+"   2050  CyberSerial (4-port) 16550",
+"   2051  CyberSerial (4-port) 16650",
+"   2052  CyberSerial (4-port) 16850",
+"   2060  Trio 2S(16550)+1P",
+"   2061  Trio 2S(16650)+1P",
+"   2062  Trio 2S(16850)+1P",
+"   2081  CyberSerial (8-port) ST16654",
+"1320  Crypto AG",
+"1321  Arcobel Graphics BV",
+"1322  MTT Co., Ltd",
+"1323  Dome Inc",
+"1324  Sphere Communications",
+"1325  Salix Technologies, Inc",
+"1326  Seachange international",
+"1327  Voss scientific",
+"1328  quadrant international",
+"1329  Productivity Enhancement",
+"132a  Microcom Inc.",
+"132b  Broadband Technologies",
+"132c  Micrel Inc",
+"132d  Integrated Silicon Solution, Inc.",
+"1330  MMC Networks",
+"1331  Radisys Corp.",
+"   0030  ENP-2611",
+"   8200  82600 Host Bridge",
+"   8201  82600 IDE",
+"   8202  82600 USB",
+"   8210  82600 PCI Bridge",
+"1332  Micro Memory",
+"   5415  MM-5415CN PCI Memory Module with Battery Backup",
+"   5425  MM-5425CN PCI 64/66 Memory Module with Battery Backup",
+"   6140  MM-6140D",
+"1334  Redcreek Communications, Inc",
+"1335  Videomail, Inc",
+"1337  Third Planet Publishing",
+"1338  BT Electronics",
+"133a  Vtel Corp",
+"133b  Softcom Microsystems",
+"133c  Holontech Corp",
+"133d  SS Technologies",
+"133e  Virtual Computer Corp",
+"133f  SCM Microsystems",
+"1340  Atalla Corp",
+"1341  Kyoto Microcomputer Co",
+"1342  Promax Systems Inc",
+"1343  Phylon Communications Inc",
+"1344  Crucial Technology",
+"1345  Arescom Inc",
+"1347  Odetics",
+"1349  Sumitomo Electric Industries, Ltd.",
+"134a  DTC Technology Corp.",
+"   0001  Domex 536",
+"   0002  Domex DMX3194UP SCSI Adapter",
+"134b  ARK Research Corp.",
+"134c  Chori Joho System Co. Ltd",
+"134d  PCTel Inc",
+"   2189  HSP56 MicroModem",
+"   2486  2304WT V.92 MDC Modem",
+"   7890  HSP MicroModem 56",
+"       134d 0001  PCT789 adapter",
+"   7891  HSP MicroModem 56",
+"       134d 0001  HSP MicroModem 56",
+"   7892  HSP MicroModem 56",
+"   7893  HSP MicroModem 56",
+"   7894  HSP MicroModem 56",
+"   7895  HSP MicroModem 56",
+"   7896  HSP MicroModem 56",
+"   7897  HSP MicroModem 56",
+"134e  CSTI",
+"134f  Algo System Co Ltd",
+"1350  Systec Co. Ltd",
+"1351  Sonix Inc",
+"1353  Thales Idatys",
+"   0002  Proserver",
+"   0003  PCI-FUT",
+"   0004  PCI-S0",
+"   0005  PCI-FUT-S0",
+"1354  Dwave System Inc",
+"1355  Kratos Analytical Ltd",
+"1356  The Logical Co",
+"1359  Prisa Networks",
+"135a  Brain Boxes",
+"135b  Giganet Inc",
+"135c  Quatech Inc",
+"   0010  QSC-100",
+"   0020  DSC-100",
+"   0030  DSC-200/300",
+"   0040  QSC-200/300",
+"   0050  ESC-100D",
+"   0060  ESC-100M",
+"   00f0  MPAC-100 Syncronous Serial Card (Zilog 85230)",
+"   0170  QSCLP-100",
+"   0180  DSCLP-100",
+"   0190  SSCLP-100",
+"   01a0  QSCLP-200/300",
+"   01b0  DSCLP-200/300",
+"   01c0  SSCLP-200/300",
+"135d  ABB Network Partner AB",
+"135e  Sealevel Systems Inc",
+"   5101  Route 56.PCI - Multi-Protocol Serial Interface (Zilog Z16C32)",
+"   7101  Single Port RS-232/422/485/530",
+"   7201  Dual Port RS-232/422/485 Interface",
+"   7202  Dual Port RS-232 Interface",
+"   7401  Four Port RS-232 Interface",
+"   7402  Four Port RS-422/485 Interface",
+"   7801  Eight Port RS-232 Interface",
+"   7804  Eight Port RS-232/422/485 Interface",
+"   8001  8001 Digital I/O Adapter",
+"135f  I-Data International A-S",
+"1360  Meinberg Funkuhren",
+"   0101  PCI32 DCF77 Radio Clock",
+"   0102  PCI509 DCF77 Radio Clock",
+"   0103  PCI510 DCF77 Radio Clock",
+"   0104  PCI511 DCF77 Radio Clock",
+"   0201  GPS167PCI GPS Receiver",
+"   0202  GPS168PCI GPS Receiver",
+"   0203  GPS169PCI GPS Receiver",
+"   0204  GPS170PCI GPS Receiver",
+"   0301  TCR510PCI IRIG Timecode Reader",
+"   0302  TCR167PCI IRIG Timecode Reader",
+"1361  Soliton Systems K.K.",
+"1362  Fujifacom Corporation",
+"1363  Phoenix Technology Ltd",
+"1364  ATM Communications Inc",
+"1365  Hypercope GmbH",
+"1366  Teijin Seiki Co. Ltd",
+"1367  Hitachi Zosen Corporation",
+"1368  Skyware Corporation",
+"1369  Digigram",
+"136a  High Soft Tech",
+"136b  Kawasaki Steel Corporation",
+"   ff01  KL5A72002 Motion JPEG",
+"136c  Adtek System Science Co Ltd",
+"136d  Gigalabs Inc",
+"136f  Applied Magic Inc",
+"1370  ATL Products",
+"1371  CNet Technology Inc",
+"   434e  GigaCard Network Adapter",
+"       1371 434e  N-Way PCI-Bus Giga-Card 1000/100/10Mbps(L)",
+"1373  Silicon Vision Inc",
+"1374  Silicom Ltd.",
+"   0024  Silicom Dual port Giga Ethernet BGE Bypass Server Adapter",
+"   0025  Silicom Quad port Giga Ethernet BGE Bypass Server Adapter",
+"   0026  Silicom Dual port Fiber Giga Ethernet 546 Bypass Server Adapter",
+"   0027  Silicom Dual port Fiber LX Giga Ethernet 546 Bypass Server Adapter",
+"   0029  Silicom Dual port Copper Giga Ethernet 546GB Bypass Server Adapter",
+"   002a  Silicom Dual port Fiber Giga Ethernet 546 TAP/Bypass Server Adapter",
+"   002b  Silicom Dual port Copper Fast Ethernet 546 TAP/Bypass Server Adapter (PXE2TBI)",
+"   002c  Silicom Quad port Copper Giga Ethernet 546GB Bypass Server Adapter (PXG4BPI)",
+"   002d  Silicom Quad port Fiber-SX Giga Ethernet 546GB Bypass Server Adapter (PXG4BPFI)",
+"   002e  Silicom Quad port Fiber-LX Giga Ethernet 546GB Bypass Server Adapter (PXG4BPFI-LX)",
+"   002f  Silicom Dual port Fiber-SX Giga Ethernet 546GB Low profile Bypass Server Adapter (PXG2BPFIL)",
+"   0030  Silicom Dual port Fiber-LX Giga Ethernet 546GB Low profile Bypass Server Adapter",
+"   0031  Silicom Quad port Copper Giga Ethernet PCI-E Bypass Server Adapter",
+"   0032  Silicom Dual port Copper Fast Ethernet 546 TAP/Bypass Server Adapter",
+"   0034  Silicom Dual port Copper Giga Ethernet PCI-E BGE Bypass Server Adapter",
+"   0035  Silicom Quad port Copper Giga Ethernet PCI-E BGE Bypass Server Adapter",
+"   0036  Silicom Dual port Fiber Giga Ethernet PCI-E BGE Bypass Server Adapter",
+"   0037  Silicom Quad port Copper Ethernet PCI-E Intel based Bypass Server Adapter",
+"   0038  Silicom Quad port Copper Ethernet PCI-E Intel based Bypass Server Adapter",
+"   0039  Silicom Dual port Fiber-SX Ethernet PCI-E Intel based Bypass Server Adapter",
+"   003a  Silicom Dual port Fiber-LX Ethernet PCI-E Intel based Bypass Server Adapter",
+"1375  Argosystems Inc",
+"1376  LMC",
+"1377  Electronic Equipment Production & Distribution GmbH",
+"1378  Telemann Co. Ltd",
+"1379  Asahi Kasei Microsystems Co Ltd",
+"137a  Mark of the Unicorn Inc",
+"   0001  PCI-324 Audiowire Interface",
+"137b  PPT Vision",
+"137c  Iwatsu Electric Co Ltd",
+"137d  Dynachip Corporation",
+"137e  Patriot Scientific Corporation",
+"137f  Japan Satellite Systems Inc",
+"1380  Sanritz Automation Co Ltd",
+"1381  Brains Co. Ltd",
+"1382  Marian - Electronic & Software",
+"   0001  ARC88 audio recording card",
+"   2008  Prodif 96 Pro sound system",
+"   2048  Prodif Plus sound system",
+"   2088  Marc 8 Midi sound system",
+"   20c8  Marc A sound system",
+"   4008  Marc 2 sound system",
+"   4010  Marc 2 Pro sound system",
+"   4048  Marc 4 MIDI sound system",
+"   4088  Marc 4 Digi sound system",
+"   4248  Marc X sound system",
+"   4424  TRACE D4 Sound System",
+"1383  Controlnet Inc",
+"1384  Reality Simulation Systems Inc",
+"1385  Netgear",
+"   0013  WG311T 108 Mbps Wireless PCI Adapter",
+"   311a  GA511 Gigabit Ethernet",
+"   4100  802.11b Wireless Adapter (MA301)",
+"   4105  MA311 802.11b wireless adapter",
+"   4251  WG111T 108 Mbps Wireless USB 2.0 Adapter",
+"   4400  WAG511 802.11a/b/g Dual Band Wireless PC Card",
+"   4600  WAG511 802.11a/b/g Dual Band Wireless PC Card",
+"   4601  WAG511 802.11a/b/g Dual Band Wireless PC Card",
+"   4610  WAG511 802.11a/b/g Dual Band Wireless PC Card",
+"   4800  WG511(v1) 54 Mbps Wireless PC Card",
+"   4900  WG311v1 54 Mbps Wireless PCI Adapter",
+"   4a00  WAG311 802.11a/g Wireless PCI Adapter",
+"   4b00  WG511T 108 Mbps Wireless PC Card",
+"   4c00  WG311v2 54 Mbps Wireless PCI Adapter",
+"   4d00  WG311T 108 Mbps Wireless PCI Adapter",
+"   4e00  WG511v2 54 Mbps Wireless PC Card",
+"   4f00  WG511U Double 108 Mbps  Wireless PC Card",
+"   5200  GA511 Gigabit PC Card",
+"   620a  GA620 Gigabit Ethernet",
+"   622a  GA622",
+"   630a  GA630 Gigabit Ethernet",
+"   6b00  WG311v3 54 Mbps Wireless PCI Adapter",
+"   6d00  WPNT511 RangeMax 240 Mbps Wireless PC Card",
+"   f004  FA310TX",
+"1386  Video Domain Technologies",
+"1387  Systran Corp",
+"1388  Hitachi Information Technology Co Ltd",
+"1389  Applicom International",
+"   0001  PCI1500PFB [Intelligent fieldbus adaptor]",
+"138a  Fusion Micromedia Corp",
+"138b  Tokimec Inc",
+"138c  Silicon Reality",
+"138d  Future Techno Designs pte Ltd",
+"138e  Basler GmbH",
+"138f  Patapsco Designs Inc",
+"1390  Concept Development Inc",
+"1391  Development Concepts Inc",
+"1392  Medialight Inc",
+"1393  Moxa Technologies Co Ltd",
+"   1040  Smartio C104H/PCI",
+"   1141  Industrio CP-114",
+"   1680  Smartio C168H/PCI",
+"   2040  Intellio CP-204J",
+"   2180  Intellio C218 Turbo PCI",
+"   3200  Intellio C320 Turbo PCI",
+"1394  Level One Communications",
+"   0001  LXT1001 Gigabit Ethernet",
+"       1394 0001  NetCelerator Adapter",
+"1395  Ambicom Inc",
+"1396  Cipher Systems Inc",
+"1397  Cologne Chip Designs GmbH",
+"   08b4  ISDN network Controller [HFC-4S]",
+"       1397 b520  HFC-4S [IOB4ST]",
+"       1397 b540  HFC-4S [Swyx 4xS0 SX2 QuadBri]",
+"   16b8  ISDN network Controller [HFC-8S]",
+"   2bd0  ISDN network controller [HFC-PCI]",
+"       0675 1704  ISDN Adapter (PCI Bus, D, C)",
+"       0675 1708  ISDN Adapter (PCI Bus, D, C, ACPI)",
+"       1397 2bd0  ISDN Board",
+"       e4bf 1000  CI1-1-Harp",
+"1398  Clarion co. Ltd",
+"1399  Rios systems Co Ltd",
+"139a  Alacritech Inc",
+"   0001  Quad Port 10/100 Server Accelerator",
+"   0003  Single Port 10/100 Server Accelerator",
+"   0005  Single Port Gigabit Server Accelerator",
+"139b  Mediasonic Multimedia Systems Ltd",
+"139c  Quantum 3d Inc",
+"139d  EPL limited",
+"139e  Media4",
+"139f  Aethra s.r.l.",
+"13a0  Crystal Group Inc",
+"13a1  Kawasaki Heavy Industries Ltd",
+"13a2  Ositech Communications Inc",
+"13a3  Hifn Inc.",
+"   0005  7751 Security Processor",
+"   0006  6500 Public Key Processor",
+"   0007  7811 Security Processor",
+"   0012  7951 Security Processor",
+"   0014  78XX Security Processor",
+"   0016  8065 Security Processor",
+"   0017  8165 Security Processor",
+"   0018  8154 Security Processor",
+"   001d  7956 Security Processor",
+"   0020  7955 Security Processor",
+"   0026  8155 Security Processor",
+"13a4  Rascom Inc",
+"13a5  Audio Digital Imaging Inc",
+"13a6  Videonics Inc",
+"13a7  Teles AG",
+"13a8  Exar Corp.",
+"   0152  XR17C/D152 Dual PCI UART",
+"   0154  XR17C154 Quad UART",
+"   0158  XR17C158 Octal UART",
+"13a9  Siemens Medical Systems, Ultrasound Group",
+"13aa  Broadband Networks Inc",
+"13ab  Arcom Control Systems Ltd",
+"13ac  Motion Media Technology Ltd",
+"13ad  Nexus Inc",
+"13ae  ALD Technology Ltd",
+"13af  T.Sqware",
+"13b0  Maxspeed Corp",
+"13b1  Tamura corporation",
+"13b2  Techno Chips Co. Ltd",
+"13b3  Lanart Corporation",
+"13b4  Wellbean Co Inc",
+"13b5  ARM",
+"13b6  Dlog GmbH",
+"13b7  Logic Devices Inc",
+"13b8  Nokia Telecommunications oy",
+"13b9  Elecom Co Ltd",
+"13ba  Oxford Instruments",
+"13bb  Sanyo Technosound Co Ltd",
+"13bc  Bitran Corporation",
+"13bd  Sharp corporation",
+"13be  Miroku Jyoho Service Co. Ltd",
+"13bf  Sharewave Inc",
+"13c0  Microgate Corporation",
+"   0010  SyncLink Adapter v1",
+"   0020  SyncLink SCC Adapter",
+"   0030  SyncLink Multiport Adapter",
+"   0210  SyncLink Adapter v2",
+"13c1  3ware Inc",
+"   1000  5xxx/6xxx-series PATA-RAID",
+"   1001  7xxx/8xxx-series PATA/SATA-RAID",
+"       13c1 1001  7xxx/8xxx-series PATA/SATA-RAID",
+"   1002  9xxx-series SATA-RAID",
+"   1003  9550SX SATA-RAID",
+"13c2  Technotrend Systemtechnik GmbH",
+"   000e  Technotrend/Hauppauge DVB card rev2.3",
+"13c3  Janz Computer AG",
+"13c4  Phase Metrics",
+"13c5  Alphi Technology Corp",
+"13c6  Condor Engineering Inc",
+"   0520  CEI-520 A429 Card",
+"   0620  CEI-620 A429 Card",
+"   0820  CEI-820 A429 Card",
+"13c7  Blue Chip Technology Ltd",
+"13c8  Apptech Inc",
+"13c9  Eaton Corporation",
+"13ca  Iomega Corporation",
+"13cb  Yano Electric Co Ltd",
+"13cc  Metheus Corporation",
+"13cd  Compatible Systems Corporation",
+"13ce  Cocom A/S",
+"13cf  Studio Audio & Video Ltd",
+"13d0  Techsan Electronics Co Ltd",
+"   2103  B2C2 FlexCopII DVB chip / Technisat SkyStar2 DVB card",
+"   2200  B2C2 FlexCopIII DVB chip / Technisat SkyStar2 DVB card",
+"13d1  Abocom Systems Inc",
+"   ab02  ADMtek Centaur-C rev 17 [D-Link DFE-680TX] CardBus Fast Ethernet Adapter",
+"   ab03  21x4x DEC-Tulip compatible 10/100 Ethernet",
+"   ab06  RTL8139 [FE2000VX] CardBus Fast Ethernet Attached Port Adapter",
+"   ab08  21x4x DEC-Tulip compatible 10/100 Ethernet",
+"13d2  Shark Multimedia Inc",
+"13d3  IMC Networks",
+"13d4  Graphics Microsystems Inc",
+"13d5  Media 100 Inc",
+"13d6  K.I. Technology Co Ltd",
+"13d7  Toshiba Engineering Corporation",
+"13d8  Phobos corporation",
+"13d9  Apex PC Solutions Inc",
+"13da  Intresource Systems pte Ltd",
+"13db  Janich & Klass Computertechnik GmbH",
+"13dc  Netboost Corporation",
+"13dd  Multimedia Bundle Inc",
+"13de  ABB Robotics Products AB",
+"13df  E-Tech Inc",
+"   0001  PCI56RVP Modem",
+"       13df 0001  PCI56RVP Modem",
+"13e0  GVC Corporation",
+"13e1  Silicom Multimedia Systems Inc",
+"13e2  Dynamics Research Corporation",
+"13e3  Nest Inc",
+"13e4  Calculex Inc",
+"13e5  Telesoft Design Ltd",
+"13e6  Argosy research Inc",
+"13e7  NAC Incorporated",
+"13e8  Chip Express Corporation",
+"13e9  Intraserver Technology Inc",
+"13ea  Dallas Semiconductor",
+"13eb  Hauppauge Computer Works Inc",
+"13ec  Zydacron Inc",
+"   000a  NPC-RC01 Remote control receiver",
+"13ed  Raytheion E-Systems",
+"13ee  Hayes Microcomputer Products Inc",
+"13ef  Coppercom Inc",
+"13f0  Sundance Technology Inc / IC Plus Corp",
+"   0200  IC Plus IP100A Integrated 10/100 Ethernet MAC + PHY",
+"   0201  ST201 Sundance Ethernet",
+"   1023  IC Plus IP1000 Family Gigabit Ethernet",
+"13f1  Oce' - Technologies B.V.",
+"13f2  Ford Microelectronics Inc",
+"13f3  Mcdata Corporation",
+"13f4  Troika Networks, Inc.",
+"   1401  Zentai Fibre Channel Adapter",
+"13f5  Kansai Electric Co. Ltd",
+"13f6  C-Media Electronics Inc",
+"   0011  CMI8738",
+"   0100  CM8338A",
+"       13f6 ffff  CMI8338/C3DX PCI Audio Device",
+"   0101  CM8338B",
+"       13f6 0101  CMI8338-031 PCI Audio Device",
+"   0111  CM8738",
+"       1019 0970  P6STP-FL motherboard",
+"       1043 8035  CUSI-FX motherboard",
+"       1043 8077  CMI8738 6-channel audio controller",
+"       1043 80e2  CMI8738 6ch-MX",
+"       13f6 0111  CMI8738/C3DX PCI Audio Device",
+"       1681 a000  Gamesurround MUSE XL",
+"   0211  CM8738",
+"13f7  Wildfire Communications",
+"13f8  Ad Lib Multimedia Inc",
+"13f9  NTT Advanced Technology Corp.",
+"13fa  Pentland Systems Ltd",
+"13fb  Aydin Corp",
+"13fc  Computer Peripherals International",
+"13fd  Micro Science Inc",
+"13fe  Advantech Co. Ltd",
+"   1240  PCI-1240 4-channel stepper motor controller card",
+"   1600  PCI-1612 4-port RS-232/422/485 PCI communication card",
+"   1733  PCI-1733 32-channel isolated digital input card",
+"   1752  PCI-1752",
+"   1754  PCI-1754",
+"   1756  PCI-1756",
+"13ff  Silicon Spice Inc",
+"1400  Artx Inc",
+"   1401  9432 TX",
+"1401  CR-Systems A/S",
+"1402  Meilhaus Electronic GmbH",
+"1403  Ascor Inc",
+"1404  Fundamental Software Inc",
+"1405  Excalibur Systems Inc",
+"1406  Oce' Printing Systems GmbH",
+"1407  Lava Computer mfg Inc",
+"   0100  Lava Dual Serial",
+"   0101  Lava Quatro A",
+"   0102  Lava Quatro B",
+"   0110  Lava DSerial-PCI Port A",
+"   0111  Lava DSerial-PCI Port B",
+"   0120  Quattro-PCI A",
+"   0121  Quattro-PCI B",
+"   0180  Lava Octo A",
+"   0181  Lava Octo B",
+"   0200  Lava Port Plus",
+"   0201  Lava Quad A",
+"   0202  Lava Quad B",
+"   0220  Lava Quattro PCI Ports A/B",
+"   0221  Lava Quattro PCI Ports C/D",
+"   0500  Lava Single Serial",
+"   0600  Lava Port 650",
+"   8000  Lava Parallel",
+"   8001  Dual parallel port controller A",
+"   8002  Lava Dual Parallel port A",
+"   8003  Lava Dual Parallel port B",
+"   8800  BOCA Research IOPPAR",
+"1408  Aloka Co. Ltd",
+"1409  Timedia Technology Co Ltd",
+"   7168  PCI2S550 (Dual 16550 UART)",
+"140a  DSP Research Inc",
+"140b  Ramix Inc",
+"140c  Elmic Systems Inc",
+"140d  Matsushita Electric Works Ltd",
+"140e  Goepel Electronic GmbH",
+"140f  Salient Systems Corp",
+"1410  Midas lab Inc",
+"1411  Ikos Systems Inc",
+"1412  VIA Technologies Inc.",
+"   1712  ICE1712 [Envy24] PCI Multi-Channel I/O Controller",
+"       1412 1712  Hoontech ST Audio DSP 24",
+"       1412 d630  M-Audio Delta 1010",
+"       1412 d631  M-Audio Delta DiO",
+"       1412 d632  M-Audio Delta 66",
+"       1412 d633  M-Audio Delta 44",
+"       1412 d634  M-Audio Delta Audiophile",
+"       1412 d635  M-Audio Delta TDIF",
+"       1412 d637  M-Audio Delta RBUS",
+"       1412 d638  M-Audio Delta 410",
+"       1412 d63b  M-Audio Delta 1010LT",
+"       1412 d63c  Digigram VX442",
+"       1416 1712  Hoontech ST Audio DSP 24 Media 7.1",
+"       153b 1115  EWS88 MT",
+"       153b 1125  EWS88 MT (Master)",
+"       153b 112b  EWS88 D",
+"       153b 112c  EWS88 D (Master)",
+"       153b 1130  EWX 24/96",
+"       153b 1138  DMX 6fire 24/96",
+"       153b 1151  PHASE88",
+"       16ce 1040  Edirol DA-2496",
+"   1724  VT1720/24 [Envy24PT/HT] PCI Multi-Channel Audio Controller",
+"       1412 1724  Albatron PX865PE 7.1",
+"       1412 3630  M-Audio Revolution 7.1",
+"       1412 3631  M-Audio Revolution 5.1",
+"       153b 1145  Aureon 7.1 Space",
+"       153b 1147  Aureon 5.1 Sky",
+"       153b 1153  Aureon 7.1 Universe",
+"       270f f641  ZNF3-150",
+"       270f f645  ZNF3-250",
+"1413  Addonics",
+"1414  Microsoft Corporation",
+"1415  Oxford Semiconductor Ltd",
+"   8403  VScom 011H-EP1 1 port parallel adaptor",
+"   9501  OX16PCI954 (Quad 16950 UART) function 0",
+"       131f 2050  CyberPro (4-port)",
+"       131f 2051  CyberSerial 4S Plus",
+"       15ed 2000  MCCR Serial p0-3 of 8",
+"       15ed 2001  MCCR Serial p0-3 of 16",
+"   950a  EXSYS EX-41092 Dual 16950 Serial adapter",
+"   950b  OXCB950 Cardbus 16950 UART",
+"   9510  OX16PCI954 (Quad 16950 UART) function 1 (Disabled)",
+"   9511  OX16PCI954 (Quad 16950 UART) function 1",
+"       15ed 2000  MCCR Serial p4-7 of 8",
+"       15ed 2001  MCCR Serial p4-15 of 16",
+"   9521  OX16PCI952 (Dual 16950 UART)",
+"   9523  OX16PCI952 Integrated Parallel Port",
+"1416  Multiwave Innovation pte Ltd",
+"1417  Convergenet Technologies Inc",
+"1418  Kyushu electronics systems Inc",
+"1419  Excel Switching Corp",
+"141a  Apache Micro Peripherals Inc",
+"141b  Zoom Telephonics Inc",
+"141d  Digitan Systems Inc",
+"141e  Fanuc Ltd",
+"141f  Visiontech Ltd",
+"1420  Psion Dacom plc",
+"   8002  Gold Card NetGlobal 56k+10/100Mb CardBus (Ethernet part)",
+"   8003  Gold Card NetGlobal 56k+10/100Mb CardBus (Modem part)",
+"1421  Ads Technologies Inc",
+"1422  Ygrec Systems Co Ltd",
+"1423  Custom Technology Corp.",
+"1424  Videoserver Connections",
+"1425  Chelsio Communications Inc",
+"   000b  T210 Protocol Engine",
+"1426  Storage Technology Corp.",
+"1427  Better On-Line Solutions",
+"1428  Edec Co Ltd",
+"1429  Unex Technology Corp.",
+"142a  Kingmax Technology Inc",
+"142b  Radiolan",
+"142c  Minton Optic Industry Co Ltd",
+"142d  Pix stream Inc",
+"142e  Vitec Multimedia",
+"   4020  VM2-2 [Video Maker 2] MPEG1/2 Encoder",
+"   4337  VM2-2-C7 [Video Maker 2 rev. C7] MPEG1/2 Encoder",
+"142f  Radicom Research Inc",
+"1430  ITT Aerospace/Communications Division",
+"1431  Gilat Satellite Networks",
+"1432  Edimax Computer Co.",
+"   9130  RTL81xx Fast Ethernet",
+"1433  Eltec Elektronik GmbH",
+"1435  RTD Embedded Technologies, Inc.",
+"1436  CIS Technology Inc",
+"1437  Nissin Inc Co",
+"1438  Atmel-dream",
+"1439  Outsource Engineering & Mfg. Inc",
+"143a  Stargate Solutions Inc",
+"143b  Canon Research Center, America",
+"143c  Amlogic Inc",
+"143d  Tamarack Microelectronics Inc",
+"143e  Jones Futurex Inc",
+"143f  Lightwell Co Ltd - Zax Division",
+"1440  ALGOL Corp.",
+"1441  AGIE Ltd",
+"1442  Phoenix Contact GmbH & Co.",
+"1443  Unibrain S.A.",
+"1444  TRW",
+"1445  Logical DO Ltd",
+"1446  Graphin Co Ltd",
+"1447  AIM GmBH",
+"1448  Alesis Studio Electronics",
+"1449  TUT Systems Inc",
+"144a  Adlink Technology",
+"   7296  PCI-7296",
+"   7432  PCI-7432",
+"   7433  PCI-7433",
+"   7434  PCI-7434",
+"   7841  PCI-7841",
+"   8133  PCI-8133",
+"   8164  PCI-8164",
+"   8554  PCI-8554",
+"   9111  PCI-9111",
+"   9113  PCI-9113",
+"   9114  PCI-9114",
+"144b  Loronix Information Systems Inc",
+"144c  Catalina Research Inc",
+"144d  Samsung Electronics Co Ltd",
+"   c00c  P35 laptop",
+"144e  OLITEC",
+"144f  Askey Computer Corp.",
+"1450  Octave Communications Ind.",
+"1451  SP3D Chip Design GmBH",
+"1453  MYCOM Inc",
+"1454  Altiga Networks",
+"1455  Logic Plus Plus Inc",
+"1456  Advanced Hardware Architectures",
+"1457  Nuera Communications Inc",
+"1458  Giga-byte Technology",
+"   0c11  K8NS Pro Mainboard",
+"   e911  GN-WIAG02",
+"1459  DOOIN Electronics",
+"145a  Escalate Networks Inc",
+"145b  PRAIM SRL",
+"145c  Cryptek",
+"145d  Gallant Computer Inc",
+"145e  Aashima Technology B.V.",
+"145f  Baldor Electric Company",
+"   0001  NextMove PCI",
+"1460  DYNARC INC",
+"1461  Avermedia Technologies Inc",
+"   f436  AVerTV Hybrid+FM",
+"1462  Micro-Star International Co., Ltd.",
+"   5501  nVidia NV15DDR [GeForce2 Ti]",
+"   6819  Broadcom Corporation BCM4306 802.11b/g Wireless LAN Controller [MSI CB54G]",
+"   6825  PCI Card wireless 11g [PC54G]",
+"   6834  RaLink RT2500 802.11g [PC54G2]",
+"   7125  K8N motherboard",
+"   8725  NVIDIA NV25 [GeForce4 Ti 4600] VGA Adapter",
+"   9000  NVIDIA NV28 [GeForce4 Ti 4800] VGA Adapter",
+"   9110  GeFORCE FX5200",
+"   9119  NVIDIA NV31 [GeForce FX 5600XT] VGA Adapter",
+"   9123  NVIDIA NV31 [GeForce FX 5600] FX5600-VTDR128 [MS-8912]",
+"   9591  nVidia Corporation NV36 [GeForce FX 5700LE]",
+"1463  Fast Corporation",
+"1464  Interactive Circuits & Systems Ltd",
+"1465  GN NETTEST Telecom DIV.",
+"1466  Designpro Inc.",
+"1467  DIGICOM SPA",
+"1468  AMBIT Microsystem Corp.",
+"1469  Cleveland Motion Controls",
+"146a  IFR",
+"146b  Parascan Technologies Ltd",
+"146c  Ruby Tech Corp.",
+"   1430  FE-1430TX Fast Ethernet PCI Adapter",
+"146d  Tachyon, INC.",
+"146e  Williams Electronics Games, Inc.",
+"146f  Multi Dimensional Consulting Inc",
+"1470  Bay Networks",
+"1471  Integrated Telecom Express Inc",
+"1472  DAIKIN Industries, Ltd",
+"1473  ZAPEX Technologies Inc",
+"1474  Doug Carson & Associates",
+"1475  PICAZO Communications",
+"1476  MORTARA Instrument Inc",
+"1477  Net Insight",
+"1478  DIATREND Corporation",
+"1479  TORAY Industries Inc",
+"147a  FORMOSA Industrial Computing",
+"147b  ABIT Computer Corp.",
+"147c  AWARE, Inc.",
+"147d  Interworks Computer Products",
+"147e  Matsushita Graphic Communication Systems, Inc.",
+"147f  NIHON UNISYS, Ltd.",
+"1480  SCII Telecom",
+"1481  BIOPAC Systems Inc",
+"1482  ISYTEC - Integrierte Systemtechnik GmBH",
+"1483  LABWAY Corporation",
+"1484  Logic Corporation",
+"1485  ERMA - Electronic GmBH",
+"1486  L3 Communications Telemetry & Instrumentation",
+"1487  MARQUETTE Medical Systems",
+"1488  KONTRON Electronik GmBH",
+"1489  KYE Systems Corporation",
+"148a  OPTO",
+"148b  INNOMEDIALOGIC Inc.",
+"148c  C.P. Technology Co. Ltd",
+"148d  DIGICOM Systems, Inc.",
+"   1003  HCF 56k Data/Fax Modem",
+"148e  OSI Plus Corporation",
+"148f  Plant Equipment, Inc.",
+"1490  Stone Microsystems PTY Ltd.",
+"1491  ZEAL Corporation",
+"1492  Time Logic Corporation",
+"1493  MAKER Communications",
+"1494  WINTOP Technology, Inc.",
+"1495  TOKAI Communications Industry Co. Ltd",
+"1496  JOYTECH Computer Co., Ltd.",
+"1497  SMA Regelsysteme GmBH",
+"   1497  SMA Technologie AG",
+"1498  TEWS Datentechnik GmBH",
+"   0330  TPMC816 2 Channel CAN bus controller.",
+"   0385  TPMC901 Extended CAN bus with 2/4/6 CAN controller",
+"   21cd  TCP461 CompactPCI 8 Channel Serial Interface RS232/RS422",
+"   30c8  TPCI200",
+"1499  EMTEC CO., Ltd",
+"149a  ANDOR Technology Ltd",
+"149b  SEIKO Instruments Inc",
+"149c  OVISLINK Corp.",
+"149d  NEWTEK Inc",
+"   0001  Video Toaster for PC",
+"149e  Mapletree Networks Inc.",
+"149f  LECTRON Co Ltd",
+"14a0  SOFTING GmBH",
+"14a1  Systembase Co Ltd",
+"14a2  Millennium Engineering Inc",
+"14a3  Maverick Networks",
+"14a4  GVC/BCM Advanced Research",
+"14a5  XIONICS Document Technologies Inc",
+"14a6  INOVA Computers GmBH & Co KG",
+"14a7  MYTHOS Systems Inc",
+"14a8  FEATRON Technologies Corporation",
+"14a9  HIVERTEC Inc",
+"14aa  Advanced MOS Technology Inc",
+"14ab  Mentor Graphics Corp.",
+"14ac  Novaweb Technologies Inc",
+"14ad  Time Space Radio AB",
+"14ae  CTI, Inc",
+"14af  Guillemot Corporation",
+"   7102  3D Prophet II MX",
+"14b0  BST Communication Technology Ltd",
+"14b1  Nextcom K.K.",
+"14b2  ENNOVATE Networks Inc",
+"14b3  XPEED Inc",
+"   0000  DSL NIC",
+"14b4  PHILIPS Business Electronics B.V.",
+"14b5  Creamware GmBH",
+"   0200  Scope",
+"   0300  Pulsar",
+"   0400  PulsarSRB",
+"   0600  Pulsar2",
+"   0800  DSP-Board",
+"   0900  DSP-Board",
+"   0a00  DSP-Board",
+"   0b00  DSP-Board",
+"14b6  Quantum Data Corp.",
+"14b7  PROXIM Inc",
+"   0001  Symphony 4110",
+"14b8  Techsoft Technology Co Ltd",
+"14b9  AIRONET Wireless Communications",
+"   0001  PC4800",
+"   0340  PC4800",
+"   0350  PC4800",
+"   4500  PC4500",
+"   4800  Cisco Aironet 340 802.11b Wireless LAN Adapter/Aironet PC4800",
+"   a504  Cisco Aironet Wireless 802.11b",
+"   a505  Cisco Aironet CB20a 802.11a Wireless LAN Adapter",
+"   a506  Cisco Aironet Mini PCI b/g",
+"14ba  INTERNIX Inc.",
+"14bb  SEMTECH Corporation",
+"14bc  Globespan Semiconductor Inc.",
+"14bd  CARDIO Control N.V.",
+"14be  L3 Communications",
+"14bf  SPIDER Communications Inc.",
+"14c0  COMPAL Electronics Inc",
+"14c1  MYRICOM Inc.",
+"   0008  Myri-10G Dual-Protocol Interconnect",
+"   8043  Myrinet 2000 Scalable Cluster Interconnect",
+"14c2  DTK Computer",
+"14c3  MEDIATEK Corp.",
+"14c4  IWASAKI Information Systems Co Ltd",
+"14c5  Automation Products AB",
+"14c6  Data Race Inc",
+"14c7  Modular Technology Holdings Ltd",
+"14c8  Turbocomm Tech. Inc.",
+"14c9  ODIN Telesystems Inc",
+"14ca  PE Logic Corp.",
+"14cb  Billionton Systems Inc",
+"14cc  NAKAYO Telecommunications Inc",
+"14cd  Universal Scientific Ind.",
+"14ce  Whistle Communications",
+"14cf  TEK Microsystems Inc.",
+"14d0  Ericsson Axe R & D",
+"14d1  Computer Hi-Tech Co Ltd",
+"14d2  Titan Electronics Inc",
+"   8001  VScom 010L 1 port parallel adaptor",
+"   8002  VScom 020L 2 port parallel adaptor",
+"   8010  VScom 100L 1 port serial adaptor",
+"   8011  VScom 110L 1 port serial and 1 port parallel adaptor",
+"   8020  VScom 200L 1 port serial adaptor",
+"   8021  VScom 210L 2 port serial and 1 port parallel adaptor",
+"   8040  VScom 400L 4 port serial adaptor",
+"   8080  VScom 800L 8 port serial adaptor",
+"   a000  VScom 010H 1 port parallel adaptor",
+"   a001  VScom 100H 1 port serial adaptor",
+"   a003  VScom 400H 4 port serial adaptor",
+"   a004  VScom 400HF1 4 port serial adaptor",
+"   a005  VScom 200H 2 port serial adaptor",
+"   e001  VScom 010HV2 1 port parallel adaptor",
+"   e010  VScom 100HV2 1 port serial adaptor",
+"   e020  VScom 200HV2 2 port serial adaptor",
+"14d3  CIRTECH (UK) Ltd",
+"14d4  Panacom Technology Corp",
+"14d5  Nitsuko Corporation",
+"14d6  Accusys Inc",
+"14d7  Hirakawa Hewtech Corp",
+"14d8  HOPF Elektronik GmBH",
+"14d9  Alliance Semiconductor Corporation",
+"   0010  AP1011/SP1011 HyperTransport-PCI Bridge [Sturgeon]",
+"   9000  AS90L10204/10208 HyperTransport to PCI-X Bridge",
+"14da  National Aerospace Laboratories",
+"14db  AFAVLAB Technology Inc",
+"   2120  TK9902",
+"   2182  AFAVLAB Technology Inc. 8-port serial card",
+"14dc  Amplicon Liveline Ltd",
+"   0000  PCI230",
+"   0001  PCI242",
+"   0002  PCI244",
+"   0003  PCI247",
+"   0004  PCI248",
+"   0005  PCI249",
+"   0006  PCI260",
+"   0007  PCI224",
+"   0008  PCI234",
+"   0009  PCI236",
+"   000a  PCI272",
+"   000b  PCI215",
+"14dd  Boulder Design Labs Inc",
+"14de  Applied Integration Corporation",
+"14df  ASIC Communications Corp",
+"14e1  INVERTEX",
+"14e2  INFOLIBRIA",
+"14e3  AMTELCO",
+"14e4  Broadcom Corporation",
+"   0800  Sentry5 Chipcommon I/O Controller",
+"   0804  Sentry5 PCI Bridge",
+"   0805  Sentry5 MIPS32 CPU",
+"   0806  Sentry5 Ethernet Controller",
+"   080b  Sentry5 Crypto Accelerator",
+"   080f  Sentry5 DDR/SDR RAM Controller",
+"   0811  Sentry5 External Interface Core",
+"   0816  BCM3302 Sentry5 MIPS32 CPU",
+"   1600  NetXtreme BCM5752 Gigabit Ethernet PCI Express",
+"   1601  NetXtreme BCM5752M Gigabit Ethernet PCI Express",
+"   1644  NetXtreme BCM5700 Gigabit Ethernet",
+"       1014 0277  Broadcom Vigil B5700 1000Base-T",
+"       1028 00d1  Broadcom BCM5700",
+"       1028 0106  Broadcom BCM5700",
+"       1028 0109  Broadcom BCM5700 1000Base-T",
+"       1028 010a  Broadcom BCM5700 1000BaseTX",
+"       10b7 1000  3C996-T 1000Base-T",
+"       10b7 1001  3C996B-T 1000Base-T",
+"       10b7 1002  3C996C-T 1000Base-T",
+"       10b7 1003  3C997-T 1000Base-T Dual Port",
+"       10b7 1004  3C996-SX 1000Base-SX",
+"       10b7 1005  3C997-SX 1000Base-SX Dual Port",
+"       10b7 1008  3C942 Gigabit LOM (31X31)",
+"       14e4 0002  NetXtreme 1000Base-SX",
+"       14e4 0003  NetXtreme 1000Base-SX",
+"       14e4 0004  NetXtreme 1000Base-T",
+"       14e4 1028  NetXtreme 1000BaseTX",
+"       14e4 1644  BCM5700 1000Base-T",
+"   1645  NetXtreme BCM5701 Gigabit Ethernet",
+"       0e11 007c  NC7770 Gigabit Server Adapter (PCI-X, 10/100/1000-T)",
+"       0e11 007d  NC6770 Gigabit Server Adapter (PCI-X, 1000-SX)",
+"       0e11 0085  NC7780 Gigabit Server Adapter (embedded, WOL)",
+"       0e11 0099  NC7780 Gigabit Server Adapter (embedded, WOL)",
+"       0e11 009a  NC7770 Gigabit Server Adapter (PCI-X, 10/100/1000-T)",
+"       0e11 00c1  NC6770 Gigabit Server Adapter (PCI-X, 1000-SX)",
+"       1028 0121  Broadcom BCM5701 1000Base-T",
+"       103c 128a  1000Base-T (PCI) [A7061A]",
+"       103c 128b  1000Base-SX (PCI) [A7073A]",
+"       103c 12a4  Core Lan 1000Base-T",
+"       103c 12c1  IOX Core Lan 1000Base-T [A7109AX]",
+"       103c 1300  Core LAN/SCSI Combo [A6794A]",
+"       10a9 8010  IO9/IO10 Gigabit Ethernet (Copper)",
+"       10a9 8011  Gigabit Ethernet (Copper)",
+"       10a9 8012  Gigabit Ethernet (Fiber)",
+"       10b7 1004  3C996-SX 1000Base-SX",
+"       10b7 1006  3C996B-T 1000Base-T",
+"       10b7 1007  3C1000-T 1000Base-T",
+"       10b7 1008  3C940-BR01 1000Base-T",
+"       14e4 0001  BCM5701 1000Base-T",
+"       14e4 0005  BCM5701 1000Base-T",
+"       14e4 0006  BCM5701 1000Base-T",
+"       14e4 0007  BCM5701 1000Base-SX",
+"       14e4 0008  BCM5701 1000Base-T",
+"       14e4 8008  BCM5701 1000Base-T",
+"   1646  NetXtreme BCM5702 Gigabit Ethernet",
+"       0e11 00bb  NC7760 1000BaseTX",
+"       1028 0126  Broadcom BCM5702 1000BaseTX",
+"       14e4 8009  BCM5702 1000BaseTX",
+"   1647  NetXtreme BCM5703 Gigabit Ethernet",
+"       0e11 0099  NC7780 1000BaseTX",
+"       0e11 009a  NC7770 1000BaseTX",
+"       10a9 8010  SGI IO9 Gigabit Ethernet (Copper)",
+"       14e4 0009  BCM5703 1000BaseTX",
+"       14e4 000a  BCM5703 1000BaseSX",
+"       14e4 000b  BCM5703 1000BaseTX",
+"       14e4 8009  BCM5703 1000BaseTX",
+"       14e4 800a  BCM5703 1000BaseTX",
+"   1648  NetXtreme BCM5704 Gigabit Ethernet",
+"       0e11 00cf  NC7772 Gigabit Server Adapter (PCI-X, 10,100,1000-T)",
+"       0e11 00d0  NC7782 Gigabit Server Adapter (PCI-X, 10,100,1000-T)",
+"       0e11 00d1  NC7783 Gigabit Server Adapter (PCI-X, 10,100,1000-T)",
+"       10b7 2000  3C998-T Dual Port 10/100/1000 PCI-X",
+"       10b7 3000  3C999-T Quad Port 10/100/1000 PCI-X",
+"       1166 1648  NetXtreme CIOB-E 1000Base-T",
+"       1734 100b  Primergy RX300",
+"   164a  NetXtreme II BCM5706 Gigabit Ethernet",
+"       103c 3101  NC370T MultifuNCtion Gigabit Server Adapter",
+"   164c  NetXtreme II BCM5708 Gigabit Ethernet",
+"   164d  NetXtreme BCM5702FE Gigabit Ethernet",
+"   1653  NetXtreme BCM5705 Gigabit Ethernet",
+"       0e11 00e3  NC7761 Gigabit Server Adapter",
+"   1654  NetXtreme BCM5705_2 Gigabit Ethernet",
+"       0e11 00e3  NC7761 Gigabit Server Adapter",
+"       103c 3100  NC1020 HP ProLiant Gigabit Server Adapter 32 PCI",
+"       103c 3226  NC150T 4-port Gigabit Combo Switch & Adapter",
+"   1659  NetXtreme BCM5721 Gigabit Ethernet PCI Express",
+"       1014 02c6  eServer xSeries server mainboard",
+"       103c 7031  NC320T PCIe Gigabit Server Adapter",
+"       103c 7032  NC320i PCIe Gigabit Server Adapter",
+"       1734 1061  Primergy RX300 S2",
+"   165d  NetXtreme BCM5705M Gigabit Ethernet",
+"       1028 865d  Latitude D400",
+"   165e  NetXtreme BCM5705M_2 Gigabit Ethernet",
+"       103c 088c  NC8000 laptop",
+"       103c 0890  NC6000 laptop",
+"       103c 099c  NX6110/NC6120",
+"   1668  NetXtreme BCM5714 Gigabit Ethernet",
+"       103c 7039  NC324i PCIe Dual Port Gigabit Server Adapter",
+"   1669  NetXtreme 5714S Gigabit Ethernet",
+"   166a  NetXtreme BCM5780 Gigabit Ethernet",
+"   166b  NetXtreme BCM5780S Gigabit Ethernet",
+"   166e  570x 10/100 Integrated Controller",
+"   1672  NetXtreme BCM5754M Gigabit Ethernet PCI Express",
+"   1673  NetXtreme BCM5755M Gigabit Ethernet PCI Express",
+"   1677  NetXtreme BCM5751 Gigabit Ethernet PCI Express",
+"       1028 0179  Optiplex GX280",
+"       1028 0182  Latitude D610",
+"       1028 0187  Precision M70",
+"       1028 01ad  Optiplex GX620",
+"       103c 3006  DC7100 SFF(DX878AV)",
+"       1734 105d  Scenic W620",
+"   1678  NetXtreme BCM5715 Gigabit Ethernet",
+"   1679  NetXtreme 5715S Gigabit Ethernet",
+"       103c 703c  NC326i PCIe Dual Port Gigabit Server Adapter",
+"   167a  NetXtreme BCM5754 Gigabit Ethernet PCI Express",
+"   167b  NetXtreme BCM5755 Gigabit Ethernet PCI Express",
+"   167d  NetXtreme BCM5751M Gigabit Ethernet PCI Express",
+"   167e  NetXtreme BCM5751F Fast Ethernet PCI Express",
+"   1693  NetLink BCM5787M Gigabit Ethernet PCI Express",
+"   1696  NetXtreme BCM5782 Gigabit Ethernet",
+"       103c 12bc  HP d530 CMT (DG746A)",
+"       14e4 000d  NetXtreme BCM5782 1000Base-T",
+"   169b  NetLink BCM5787 Gigabit Ethernet PCI Express",
+"   169c  NetXtreme BCM5788 Gigabit Ethernet",
+"       103c 308b  MX6125",
+"   169d  NetLink BCM5789 Gigabit Ethernet PCI Express",
+"   16a6  NetXtreme BCM5702X Gigabit Ethernet",
+"       0e11 00bb  NC7760 Gigabit Server Adapter (PCI-X, 10/100/1000-T)",
+"       1028 0126  BCM5702 1000Base-T",
+"       14e4 000c  BCM5702 1000Base-T",
+"       14e4 8009  BCM5702 1000Base-T",
+"   16a7  NetXtreme BCM5703X Gigabit Ethernet",
+"       0e11 00ca  NC7771 Gigabit Server Adapter (PCI-X, 10,100,1000-T)",
+"       0e11 00cb  NC7781 Gigabit Server Adapter (PCI-X, 10,100,1000-T)",
+"       14e4 0009  NetXtreme BCM5703 1000Base-T",
+"       14e4 000a  NetXtreme BCM5703 1000Base-SX",
+"       14e4 000b  NetXtreme BCM5703 1000Base-T",
+"       14e4 800a  NetXtreme BCM5703 1000Base-T",
+"   16a8  NetXtreme BCM5704S Gigabit Ethernet",
+"       10b7 2001  3C998-SX Dual Port 1000-SX PCI-X",
+"   16aa  NetXtreme II BCM5706S Gigabit Ethernet",
+"       103c 3102  NC370F MultifuNCtion Gigabit Server Adapter",
+"   16ac  NetXtreme II BCM5708S Gigabit Ethernet",
+"   16c6  NetXtreme BCM5702A3 Gigabit Ethernet",
+"       10b7 1100  3C1000B-T 10/100/1000 PCI",
+"       14e4 000c  BCM5702 1000Base-T",
+"       14e4 8009  BCM5702 1000Base-T",
+"   16c7  NetXtreme BCM5703 Gigabit Ethernet",
+"       0e11 00ca  NC7771 Gigabit Server Adapter (PCI-X, 10,100,1000-T)",
+"       0e11 00cb  NC7781 Gigabit Server Adapter (PCI-X, 10,100,1000-T)",
+"       103c 12c3  Combo FC/GigE-SX [A9782A]",
+"       103c 12ca  Combo FC/GigE-T [A9784A]",
+"       14e4 0009  NetXtreme BCM5703 1000Base-T",
+"       14e4 000a  NetXtreme BCM5703 1000Base-SX",
+"   16dd  NetLink BCM5781 Gigabit Ethernet PCI Express",
+"   16f7  NetXtreme BCM5753 Gigabit Ethernet PCI Express",
+"   16fd  NetXtreme BCM5753M Gigabit Ethernet PCI Express",
+"   16fe  NetXtreme BCM5753F Fast Ethernet PCI Express",
+"   170c  BCM4401-B0 100Base-TX",
+"       1028 0188  Inspiron 6000 laptop",
+"       1028 0196  Inspiron 5160",
+"       103c 099c  NX6110/NC6120",
+"   170d  NetXtreme BCM5901 100Base-TX",
+"       1014 0545  ThinkPad R40e (2684-HVG) builtin ethernet controller",
+"   170e  NetXtreme BCM5901 100Base-TX",
+"   3352  BCM3352",
+"   3360  BCM3360",
+"   4210  BCM4210 iLine10 HomePNA 2.0",
+"   4211  BCM4211 iLine10 HomePNA 2.0 + V.90 56k modem",
+"   4212  BCM4212 v.90 56k modem",
+"   4301  BCM4303 802.11b Wireless LAN Controller",
+"       1028 0407  TrueMobile 1180 Onboard WLAN",
+"       1043 0120  WL-103b Wireless LAN PC Card",
+"   4305  BCM4307 V.90 56k Modem",
+"   4306  BCM4307 Ethernet Controller",
+"   4307  BCM4307 802.11b Wireless LAN Controller",
+"   4310  BCM4310 Chipcommon I/OController",
+"   4312  BCM4310 UART",
+"   4313  BCM4310 Ethernet Controller",
+"   4315  BCM4310 USB Controller",
+"   4318  BCM4318 [AirForce One 54g] 802.11g Wireless LAN Controller",
+"       103c 1356  MX6125",
+"       1043 120f  A6U notebook embedded card",
+"       1468 0311  Aspire 3022WLMi, 5024WLMi",
+"       1468 0312  TravelMate 2410",
+"       14e4 0449  Gateway 7510GX",
+"       14e4 4318  WPC54G version 3 [Wireless-G Notebook Adapter] 802.11g Wireless Lan Controller",
+"       16ec 0119  U.S.Robotics Wireless MAXg PC Card",
+"       1737 0048  WPC54G-EU version 3 [Wireless-G Notebook Adapter]",
+"   4319  Dell Wireless 1470 DualBand WLAN",
+"   4320  BCM4306 802.11b/g Wireless LAN Controller",
+"       1028 0001  TrueMobile 1300 WLAN Mini-PCI Card",
+"       1028 0003  Wireless 1350 WLAN Mini-PCI Card",
+"       103c 12f4  NX9500 Built-in Wireless",
+"       103c 12fa  Presario R3000 802.11b/g",
+"       1043 100f  WL-100G",
+"       1057 7025  WN825G",
+"       106b 004e  AirPort Extreme",
+"       1154 0330  Buffalo WLI2-PCI-G54S High Speed Mode Wireless Desktop Adapter",
+"       144f 7050  eMachines M6805 802.11g Built-in Wireless",
+"       14e4 4320  Linksys WMP54G PCI",
+"       1737 4320  WPC54G",
+"       1799 7001  Belkin F5D7001 High-Speed Mode Wireless G Network Card",
+"       1799 7010  Belkin F5D7010 54g Wireless Network card",
+"       185f 1220  TravelMate 290E WLAN Mini-PCI Card",
+"   4321  BCM4306 802.11a Wireless LAN Controller",
+"   4322  BCM4306 UART",
+"   4324  BCM4309 802.11a/b/g",
+"       1028 0001  Truemobile 1400",
+"       1028 0003  Truemobile 1450 MiniPCI",
+"   4325  BCM43xG 802.11b/g",
+"       1414 0003  Wireless Notebook Adapter MN-720",
+"       1414 0004  Wireless PCI Adapter MN-730",
+"   4326  BCM4307 Chipcommon I/O Controller?",
+"   4401  BCM4401 100Base-T",
+"       1043 80a8  A7V8X motherboard",
+"   4402  BCM4402 Integrated 10/100BaseT",
+"   4403  BCM4402 V.90 56k Modem",
+"   4410  BCM4413 iLine32 HomePNA 2.0",
+"   4411  BCM4413 V.90 56k modem",
+"   4412  BCM4412 10/100BaseT",
+"   4430  BCM44xx CardBus iLine32 HomePNA 2.0",
+"   4432  BCM4432 CardBus 10/100BaseT",
+"   4610  BCM4610 Sentry5 PCI to SB Bridge",
+"   4611  BCM4610 Sentry5 iLine32 HomePNA 1.0",
+"   4612  BCM4610 Sentry5 V.90 56k Modem",
+"   4613  BCM4610 Sentry5 Ethernet Controller",
+"   4614  BCM4610 Sentry5 External Interface",
+"   4615  BCM4610 Sentry5 USB Controller",
+"   4704  BCM4704 PCI to SB Bridge",
+"   4705  BCM4704 Sentry5 802.11b Wireless LAN Controller",
+"   4706  BCM4704 Sentry5 Ethernet Controller",
+"   4707  BCM4704 Sentry5 USB Controller",
+"   4708  BCM4704 Crypto Accelerator",
+"   4710  BCM4710 Sentry5 PCI to SB Bridge",
+"   4711  BCM47xx Sentry5 iLine32 HomePNA 2.0",
+"   4712  BCM47xx V.92 56k modem",
+"   4713  Sentry5 Ethernet Controller",
+"   4714  BCM47xx Sentry5 External Interface",
+"   4715  Sentry5 USB Controller",
+"   4716  BCM47xx Sentry5 USB Host Controller",
+"   4717  BCM47xx Sentry5 USB Device Controller",
+"   4718  Sentry5 Crypto Accelerator",
+"   4719  BCM47xx/53xx RoboSwitch Core",
+"   4720  BCM4712 MIPS CPU",
+"   5365  BCM5365P Sentry5 Host Bridge",
+"   5600  BCM5600 StrataSwitch 24+2 Ethernet Switch Controller",
+"   5605  BCM5605 StrataSwitch 24+2 Ethernet Switch Controller",
+"   5615  BCM5615 StrataSwitch 24+2 Ethernet Switch Controller",
+"   5625  BCM5625 StrataSwitch 24+2 Ethernet Switch Controller",
+"   5645  BCM5645 StrataSwitch 24+2 Ethernet Switch Controller",
+"   5670  BCM5670 8-Port 10GE Ethernet Switch Fabric",
+"   5680  BCM5680 G-Switch 8 Port Gigabit Ethernet Switch Controller",
+"   5690  BCM5690 12-port Multi-Layer Gigabit Ethernet Switch",
+"   5691  BCM5691 GE/10GE 8+2 Gigabit Ethernet Switch Controller",
+"   5692  BCM5692 12-port Multi-Layer Gigabit Ethernet Switch",
+"   5820  BCM5820 Crypto Accelerator",
+"   5821  BCM5821 Crypto Accelerator",
+"   5822  BCM5822 Crypto Accelerator",
+"   5823  BCM5823 Crypto Accelerator",
+"   5824  BCM5824 Crypto Accelerator",
+"   5840  BCM5840 Crypto Accelerator",
+"   5841  BCM5841 Crypto Accelerator",
+"   5850  BCM5850 Crypto Accelerator",
+"14e5  Pixelfusion Ltd",
+"14e6  SHINING Technology Inc",
+"14e7  3CX",
+"14e8  RAYCER Inc",
+"14e9  GARNETS System CO Ltd",
+"14ea  Planex Communications, Inc",
+"   ab06  FNW-3603-TX CardBus Fast Ethernet",
+"   ab07  RTL81xx RealTek Ethernet",
+"   ab08  FNW-3602-TX CardBus Fast Ethernet",
+"14eb  SEIKO EPSON Corp",
+"14ec  ACQIRIS",
+"14ed  DATAKINETICS Ltd",
+"14ee  MASPRO KENKOH Corp",
+"14ef  CARRY Computer ENG. CO Ltd",
+"14f0  CANON RESEACH CENTRE FRANCE",
+"14f1  Conexant",
+"   1002  HCF 56k Modem",
+"   1003  HCF 56k Modem",
+"   1004  HCF 56k Modem",
+"   1005  HCF 56k Modem",
+"   1006  HCF 56k Modem",
+"   1022  HCF 56k Modem",
+"   1023  HCF 56k Modem",
+"   1024  HCF 56k Modem",
+"   1025  HCF 56k Modem",
+"   1026  HCF 56k Modem",
+"   1032  HCF 56k Modem",
+"   1033  HCF 56k Data/Fax Modem",
+"       1033 8077  NEC",
+"       122d 4027  Dell Zeus - MDP3880-W(B) Data Fax Modem",
+"       122d 4030  Dell Mercury - MDP3880-U(B) Data Fax Modem",
+"       122d 4034  Dell Thor - MDP3880-W(U) Data Fax Modem",
+"       13e0 020d  Dell Copper",
+"       13e0 020e  Dell Silver",
+"       13e0 0261  IBM",
+"       13e0 0290  Compaq Goldwing",
+"       13e0 02a0  IBM",
+"       13e0 02b0  IBM",
+"       13e0 02c0  Compaq Scooter",
+"       13e0 02d0  IBM",
+"       144f 1500  IBM P85-DF (1)",
+"       144f 1501  IBM P85-DF (2)",
+"       144f 150a  IBM P85-DF (3)",
+"       144f 150b  IBM P85-DF Low Profile (1)",
+"       144f 1510  IBM P85-DF Low Profile (2)",
+"   1034  HCF 56k Data/Fax/Voice Modem",
+"   1035  HCF 56k Data/Fax/Voice/Spkp (w/Handset) Modem",
+"       10cf 1098  Fujitsu P85-DFSV",
+"   1036  HCF 56k Data/Fax/Voice/Spkp Modem",
+"       104d 8067  HCF 56k Modem",
+"       122d 4029  MDP3880SP-W",
+"       122d 4031  MDP3880SP-U",
+"       13e0 0209  Dell Titanium",
+"       13e0 020a  Dell Graphite",
+"       13e0 0260  Gateway Red Owl",
+"       13e0 0270  Gateway White Horse",
+"   1052  HCF 56k Data/Fax Modem (Worldwide)",
+"   1053  HCF 56k Data/Fax Modem (Worldwide)",
+"   1054  HCF 56k Data/Fax/Voice Modem (Worldwide)",
+"   1055  HCF 56k Data/Fax/Voice/Spkp (w/Handset) Modem (Worldwide)",
+"   1056  HCF 56k Data/Fax/Voice/Spkp Modem (Worldwide)",
+"   1057  HCF 56k Data/Fax/Voice/Spkp Modem (Worldwide)",
+"   1059  HCF 56k Data/Fax/Voice Modem (Worldwide)",
+"   1063  HCF 56k Data/Fax Modem",
+"   1064  HCF 56k Data/Fax/Voice Modem",
+"   1065  HCF 56k Data/Fax/Voice/Spkp (w/Handset) Modem",
+"   1066  HCF 56k Data/Fax/Voice/Spkp Modem",
+"       122d 4033  Dell Athena - MDP3900V-U",
+"   1085  HCF V90 56k Data/Fax/Voice/Spkp PCI Modem",
+"   1433  HCF 56k Data/Fax Modem",
+"   1434  HCF 56k Data/Fax/Voice Modem",
+"   1435  HCF 56k Data/Fax/Voice/Spkp (w/Handset) Modem",
+"   1436  HCF 56k Data/Fax Modem",
+"   1453  HCF 56k Data/Fax Modem",
+"       13e0 0240  IBM",
+"       13e0 0250  IBM",
+"       144f 1502  IBM P95-DF (1)",
+"       144f 1503  IBM P95-DF (2)",
+"   1454  HCF 56k Data/Fax/Voice Modem",
+"   1455  HCF 56k Data/Fax/Voice/Spkp (w/Handset) Modem",
+"   1456  HCF 56k Data/Fax/Voice/Spkp Modem",
+"       122d 4035  Dell Europa - MDP3900V-W",
+"       122d 4302  Dell MP3930V-W(C) MiniPCI",
+"   1610  ADSL AccessRunner PCI Arbitration Device",
+"   1611  AccessRunner PCI ADSL Interface Device",
+"   1620  AccessRunner V2 PCI ADSL Arbitration Device",
+"   1621  AccessRunner V2 PCI ADSL Interface Device",
+"   1622  AccessRunner V2 PCI ADSL Yukon WAN Adapter",
+"   1803  HCF 56k Modem",
+"       0e11 0023  623-LAN Grizzly",
+"       0e11 0043  623-LAN Yogi",
+"   1811  Conextant MiniPCI Network Adapter",
+"   1815  HCF 56k Modem",
+"       0e11 0022  Grizzly",
+"       0e11 0042  Yogi",
+"   2003  HSF 56k Data/Fax Modem",
+"   2004  HSF 56k Data/Fax/Voice Modem",
+"   2005  HSF 56k Data/Fax/Voice/Spkp (w/Handset) Modem",
+"   2006  HSF 56k Data/Fax/Voice/Spkp Modem",
+"   2013  HSF 56k Data/Fax Modem",
+"       0e11 b195  Bear",
+"       0e11 b196  Seminole 1",
+"       0e11 b1be  Seminole 2",
+"       1025 8013  Acer",
+"       1033 809d  NEC",
+"       1033 80bc  NEC",
+"       155d 6793  HP",
+"       155d 8850  E Machines",
+"   2014  HSF 56k Data/Fax/Voice Modem",
+"   2015  HSF 56k Data/Fax/Voice/Spkp (w/Handset) Modem",
+"   2016  HSF 56k Data/Fax/Voice/Spkp Modem",
+"   2043  HSF 56k Data/Fax Modem (WorldW SmartDAA)",
+"   2044  HSF 56k Data/Fax/Voice Modem (WorldW SmartDAA)",
+"   2045  HSF 56k Data/Fax/Voice/Spkp (w/Handset) Modem (WorldW SmartDAA)",
+"       14f1 2045  Generic SoftK56",
+"   2046  HSF 56k Data/Fax/Voice/Spkp Modem (WorldW SmartDAA)",
+"   2063  HSF 56k Data/Fax Modem (SmartDAA)",
+"   2064  HSF 56k Data/Fax/Voice Modem (SmartDAA)",
+"   2065  HSF 56k Data/Fax/Voice/Spkp (w/Handset) Modem (SmartDAA)",
+"   2066  HSF 56k Data/Fax/Voice/Spkp Modem (SmartDAA)",
+"   2093  HSF 56k Modem",
+"       155d 2f07  Legend",
+"   2143  HSF 56k Data/Fax/Cell Modem (Mob WorldW SmartDAA)",
+"   2144  HSF 56k Data/Fax/Voice/Cell Modem (Mob WorldW SmartDAA)",
+"   2145  HSF 56k Data/Fax/Voice/Spkp (w/HS)/Cell Modem (Mob WorldW SmartDAA)",
+"   2146  HSF 56k Data/Fax/Voice/Spkp/Cell Modem (Mob WorldW SmartDAA)",
+"   2163  HSF 56k Data/Fax/Cell Modem (Mob SmartDAA)",
+"   2164  HSF 56k Data/Fax/Voice/Cell Modem (Mob SmartDAA)",
+"   2165  HSF 56k Data/Fax/Voice/Spkp (w/HS)/Cell Modem (Mob SmartDAA)",
+"   2166  HSF 56k Data/Fax/Voice/Spkp/Cell Modem (Mob SmartDAA)",
+"   2343  HSF 56k Data/Fax CardBus Modem (Mob WorldW SmartDAA)",
+"   2344  HSF 56k Data/Fax/Voice CardBus Modem (Mob WorldW SmartDAA)",
+"   2345  HSF 56k Data/Fax/Voice/Spkp (w/HS) CardBus Modem (Mob WorldW SmartDAA)",
+"   2346  HSF 56k Data/Fax/Voice/Spkp CardBus Modem (Mob WorldW SmartDAA)",
+"   2363  HSF 56k Data/Fax CardBus Modem (Mob SmartDAA)",
+"   2364  HSF 56k Data/Fax/Voice CardBus Modem (Mob SmartDAA)",
+"   2365  HSF 56k Data/Fax/Voice/Spkp (w/HS) CardBus Modem (Mob SmartDAA)",
+"   2366  HSF 56k Data/Fax/Voice/Spkp CardBus Modem (Mob SmartDAA)",
+"   2443  HSF 56k Data/Fax Modem (Mob WorldW SmartDAA)",
+"       104d 8075  Modem",
+"       104d 8083  Modem",
+"       104d 8097  Modem",
+"   2444  HSF 56k Data/Fax/Voice Modem (Mob WorldW SmartDAA)",
+"   2445  HSF 56k Data/Fax/Voice/Spkp (w/HS) Modem (Mob WorldW SmartDAA)",
+"   2446  HSF 56k Data/Fax/Voice/Spkp Modem (Mob WorldW SmartDAA)",
+"   2463  HSF 56k Data/Fax Modem (Mob SmartDAA)",
+"   2464  HSF 56k Data/Fax/Voice Modem (Mob SmartDAA)",
+"   2465  HSF 56k Data/Fax/Voice/Spkp (w/HS) Modem (Mob SmartDAA)",
+"   2466  HSF 56k Data/Fax/Voice/Spkp Modem (Mob SmartDAA)",
+"   2bfa  HDAudio Soft Data Fax Modem with SmartCP",
+"   2f00  HSF 56k HSFi Modem",
+"       13e0 8d84  IBM HSFi V.90",
+"       13e0 8d85  Compaq Stinger",
+"       14f1 2004  Dynalink 56PMi",
+"   2f02  HSF 56k HSFi Data/Fax",
+"   2f11  HSF 56k HSFi Modem",
+"   2f20  HSF 56k Data/Fax Modem",
+"   8234  RS8234 ATM SAR Controller [ServiceSAR Plus]",
+"   8800  CX23880/1/2/3 PCI Video and Audio Decoder",
+"       0070 2801  Hauppauge WinTV 28xxx (Roslyn) models",
+"       0070 3401  Hauppauge WinTV 34xxx models",
+"       0070 9001  Nova-T DVB-T",
+"       0070 9200  Nova-SE2 DVB-S",
+"       0070 9202  Nova-S-Plus DVB-S",
+"       0070 9402  WinTV-HVR1100 DVB-T/Hybrid",
+"       0070 9802  WinTV-HVR1100 DVB-T/Hybrid (Low Profile)",
+"       1002 00f8  ATI TV Wonder Pro",
+"       1002 a101  HDTV Wonder",
+"       1043 4823  ASUS PVR-416",
+"       107d 6613  Leadtek Winfast 2000XP Expert",
+"       107d 6620  Leadtek Winfast DV2000",
+"       107d 663c  Leadtek PVR 2000",
+"       107d 665f  WinFast DTV1000-T",
+"       10fc d003  IODATA GV-VCP3/PCI",
+"       10fc d035  IODATA GV/BCTV7E",
+"       1421 0334  Instant TV DVB-T PCI",
+"       1461 000a  AVerTV 303 (M126)",
+"       1461 000b  AverTV Studio 303 (M126)",
+"       1461 8011  UltraTV Media Center PCI 550",
+"       1462 8606  MSI TV-@nywhere Master",
+"       14c7 0107  GDI Black Gold",
+"       14f1 0187  Conexant DVB-T reference design",
+"       14f1 0342  Digital-Logic MICROSPACE Entertainment Center (MEC)",
+"       153b 1166  Cinergy 1400 DVB-T",
+"       1540 2580  Provideo PV259",
+"       1554 4811  PixelView",
+"       1554 4813  Club 3D  ZAP1000 MCE Edition",
+"       17de 08a1  KWorld/VStream XPert DVB-T with cx22702",
+"       17de 08a6  KWorld/VStream XPert DVB-T",
+"       17de 08b2  KWorld DVB-S 100",
+"       17de a8a6  digitalnow DNTV Live! DVB-T",
+"       1822 0025  digitalnow DNTV Live! DVB-T Pro",
+"       18ac d500  FusionHDTV 5 Gold",
+"       18ac d810  FusionHDTV 3 Gold-Q",
+"       18ac d820  FusionHDTV 3 Gold-T",
+"       18ac db00  FusionHDTV DVB-T1",
+"       18ac db11  FusionHDTV DVB-T Plus",
+"       18ac db50  FusionHDTV DVB-T Dual Digital",
+"       7063 3000  pcHDTV HD3000 HDTV",
+"   8801  CX23880/1/2/3 PCI Video and Audio Decoder [Audio Port]",
+"       0070 2801  Hauppauge WinTV 28xxx (Roslyn) models",
+"   8802  CX23880/1/2/3 PCI Video and Audio Decoder [MPEG Port]",
+"       0070 2801  Hauppauge WinTV 28xxx (Roslyn) models",
+"       0070 9002  Nova-T DVB-T Model 909",
+"       1043 4823  ASUS PVR-416",
+"       107d 663c  Leadtek PVR 2000",
+"       14f1 0187  Conexant DVB-T reference design",
+"       17de 08a1  XPert DVB-T PCI BDA DVBT 23880 Transport Stream Capture",
+"       17de 08a6  KWorld/VStream XPert DVB-T",
+"       18ac d500  DViCO FusionHDTV5 Gold",
+"       18ac d810  DViCO FusionHDTV3 Gold-Q",
+"       18ac d820  DViCO FusionHDTV3 Gold-T",
+"       18ac db00  DVICO FusionHDTV DVB-T1",
+"       18ac db10  DVICO FusionHDTV DVB-T Plus",
+"       7063 3000  pcHDTV HD3000 HDTV",
+"   8804  CX23880/1/2/3 PCI Video and Audio Decoder [IR Port]",
+"       0070 9002  Nova-T DVB-T Model 909",
+"   8811  CX23880/1/2/3 PCI Video and Audio Decoder [Audio Port]",
+"       0070 3401  Hauppauge WinTV 34xxx models",
+"       1462 8606  MSI TV-@nywhere Master",
+"       18ac d500  DViCO FusionHDTV5 Gold",
+"       18ac d810  DViCO FusionHDTV3 Gold-Q",
+"       18ac d820  DViCO FusionHDTV3 Gold-T",
+"       18ac db00  DVICO FusionHDTV DVB-T1",
+"14f2  MOBILITY Electronics",
+"   0120  EV1000 bridge",
+"   0121  EV1000 Parallel port",
+"   0122  EV1000 Serial port",
+"   0123  EV1000 Keyboard controller",
+"   0124  EV1000 Mouse controller",
+"14f3  BroadLogic",
+"   2030  2030 DVB-S Satellite Reciever",
+"   2050  2050 DVB-T Terrestrial (Cable) Reciever",
+"   2060  2060 ATSC Terrestrial (Cable) Reciever",
+"14f4  TOKYO Electronic Industry CO Ltd",
+"14f5  SOPAC Ltd",
+"14f6  COYOTE Technologies LLC",
+"14f7  WOLF Technology Inc",
+"14f8  AUDIOCODES Inc",
+"   2077  TP-240 dual span E1 VoIP PCI card",
+"14f9  AG COMMUNICATIONS",
+"14fa  WANDEL & GOLTERMANN",
+"14fb  TRANSAS MARINE (UK) Ltd",
+"14fc  Quadrics Ltd",
+"   0000  QsNet Elan3 Network Adapter",
+"   0001  QsNetII Elan4 Network Adapter",
+"   0002  QsNetIII Elan5 Network Adapter",
+"14fd  JAPAN Computer Industry Inc",
+"14fe  ARCHTEK TELECOM Corp",
+"14ff  TWINHEAD INTERNATIONAL Corp",
+"1500  DELTA Electronics, Inc",
+"   1360  RTL81xx RealTek Ethernet",
+"1501  BANKSOFT CANADA Ltd",
+"1502  MITSUBISHI ELECTRIC LOGISTICS SUPPORT Co Ltd",
+"1503  KAWASAKI LSI USA Inc",
+"1504  KAISER Electronics",
+"1505  ITA INGENIEURBURO FUR TESTAUFGABEN GmbH",
+"1506  CHAMELEON Systems Inc",
+"1507  Motorola ?? / HTEC",
+"   0001  MPC105 [Eagle]",
+"   0002  MPC106 [Grackle]",
+"   0003  MPC8240 [Kahlua]",
+"   0100  MC145575 [HFC-PCI]",
+"   0431  KTI829c 100VG",
+"   4801  Raven",
+"   4802  Falcon",
+"   4803  Hawk",
+"   4806  CPX8216",
+"1508  HONDA CONNECTORS/MHOTRONICS Inc",
+"1509  FIRST INTERNATIONAL Computer Inc",
+"150a  FORVUS RESEARCH Inc",
+"150b  YAMASHITA Systems Corp",
+"150c  KYOPAL CO Ltd",
+"150d  WARPSPPED Inc",
+"150e  C-PORT Corp",
+"150f  INTEC GmbH",
+"1510  BEHAVIOR TECH Computer Corp",
+"1511  CENTILLIUM Technology Corp",
+"1512  ROSUN Technologies Inc",
+"1513  Raychem",
+"1514  TFL LAN Inc",
+"1515  Advent design",
+"1516  MYSON Technology Inc",
+"   0800  MTD-8xx 100/10M Ethernet PCI Adapter",
+"   0803  SURECOM EP-320X-S 100/10M Ethernet PCI Adapter",
+"       1320 10bd  SURECOM EP-320X-S 100/10M Ethernet PCI Adapter",
+"   0891  MTD-8xx 100/10M Ethernet PCI Adapter",
+"1517  ECHOTEK Corp",
+"1518  PEP MODULAR Computers GmbH",
+"1519  TELEFON AKTIEBOLAGET LM Ericsson",
+"151a  Globetek",
+"   1002  PCI-1002",
+"   1004  PCI-1004",
+"   1008  PCI-1008",
+"151b  COMBOX Ltd",
+"151c  DIGITAL AUDIO LABS Inc",
+"   0003  Prodif T 2496",
+"   4000  Prodif 88",
+"151d  Fujitsu Computer Products Of America",
+"151e  MATRIX Corp",
+"151f  TOPIC SEMICONDUCTOR Corp",
+"   0000  TP560 Data/Fax/Voice 56k modem",
+"1520  CHAPLET System Inc",
+"1521  BELL Corp",
+"1522  MainPine Ltd",
+"   0100  PCI <-> IOBus Bridge",
+"       1522 0200  RockForceDUO 2 Port V.92/V.44 Data/Fax/Voice Modem",
+"       1522 0300  RockForceQUATRO 4 Port V.92/V.44 Data/Fax/Voice Modem",
+"       1522 0400  RockForceDUO+ 2 Port V.92/V.44 Data/Fax/Voice Modem",
+"       1522 0500  RockForceQUATRO+ 4 Port V.92/V.44 Data/Fax/Voice Modem",
+"       1522 0600  RockForce+ 2 Port V.90 Data/Fax/Voice Modem",
+"       1522 0700  RockForce+ 4 Port V.90 Data/Fax/Voice Modem",
+"       1522 0800  RockForceOCTO+ 8 Port V.92/V.44 Data/Fax/Voice Modem",
+"       1522 0c00  RockForceDUO+ 2 Port V.92/V.44 Data, V.34 Super-G3 Fax, Voice Modem",
+"       1522 0d00  RockForceQUATRO+ 4 Port V.92/V.44 Data, V.34 Super-G3 Fax, Voice Modem",
+"       1522 1d00  RockForceOCTO+ 8 Port V.92/V.44 Data, V.34 Super-G3 Fax, Voice Modem",
+"       1522 2000  RockForceD1 1 Port V.90 Data Modem",
+"       1522 2100  RockForceF1 1 Port V.34 Super-G3 Fax Modem",
+"       1522 2200  RockForceD2 2 Port V.90 Data Modem",
+"       1522 2300  RockForceF2 2 Port V.34 Super-G3 Fax Modem",
+"       1522 2400  RockForceD4 4 Port V.90 Data Modem",
+"       1522 2500  RockForceF4 4 Port V.34 Super-G3 Fax Modem",
+"       1522 2600  RockForceD8 8 Port V.90 Data Modem",
+"       1522 2700  RockForceF8 8 Port V.34 Super-G3 Fax Modem",
+"1523  MUSIC Semiconductors",
+"1524  ENE Technology Inc",
+"   0510  CB710 Memory Card Reader Controller",
+"       103c 006a  NX9500",
+"   0520  FLASH memory: ENE Technology Inc:",
+"   0530  ENE PCI Memory Stick Card Reader Controller",
+"   0550  ENE PCI Secure Digital Card Reader Controller",
+"   0610  PCI Smart Card Reader Controller",
+"   1211  CB1211 Cardbus Controller",
+"   1225  CB1225 Cardbus Controller",
+"   1410  CB1410 Cardbus Controller",
+"       1025 003c  CL50 motherboard",
+"       1025 005a  TravelMate 290",
+"   1411  CB-710/2/4 Cardbus Controller",
+"       103c 006a  NX9500",
+"   1412  CB-712/4 Cardbus Controller",
+"   1420  CB1420 Cardbus Controller",
+"   1421  CB-720/2/4 Cardbus Controller",
+"   1422  CB-722/4 Cardbus Controller",
+"1525  IMPACT Technologies",
+"1526  ISS, Inc",
+"1527  SOLECTRON",
+"1528  ACKSYS",
+"1529  AMERICAN MICROSystems Inc",
+"152a  QUICKTURN DESIGN Systems",
+"152b  FLYTECH Technology CO Ltd",
+"152c  MACRAIGOR Systems LLC",
+"152d  QUANTA Computer Inc",
+"152e  MELEC Inc",
+"152f  PHILIPS - CRYPTO",
+"1530  ACQIS Technology Inc",
+"1531  CHRYON Corp",
+"1532  ECHELON Corp",
+"   0020  LonWorks PCLTA-20 PCI LonTalk Adapter",
+"1533  BALTIMORE",
+"1534  ROAD Corp",
+"1535  EVERGREEN Technologies Inc",
+"1537  DATALEX COMMUNCATIONS",
+"1538  ARALION Inc",
+"   0303  ARS106S Ultra ATA 133/100/66 Host Controller",
+"1539  ATELIER INFORMATIQUES et ELECTRONIQUE ETUDES S.A.",
+"153a  ONO SOKKI",
+"153b  TERRATEC Electronic GmbH",
+"   1144  Aureon 5.1",
+"   1147  Aureon 5.1 Sky",
+"   1158  Philips Semiconductors SAA7134 (rev 01) [Terratec Cinergy 600 TV]",
+"153c  ANTAL Electronic",
+"153d  FILANET Corp",
+"153e  TECHWELL Inc",
+"153f  MIPS Technologies, Inc.",
+"   0001  SOC-it 101 System Controller",
+"1540  PROVIDEO MULTIMEDIA Co Ltd",
+"1541  MACHONE Communications",
+"1542  Concurrent Computer Corporation",
+"1543  SILICON Laboratories",
+"   3052  Intel 537 [Winmodem]",
+"   4c22  Si3036 MC'97 DAA",
+"1544  DCM DATA Systems",
+"1545  VISIONTEK",
+"1546  IOI Technology Corp",
+"1547  MITUTOYO Corp",
+"1548  JET PROPULSION Laboratory",
+"1549  INTERCONNECT Systems Solutions",
+"154a  MAX Technologies Inc",
+"154b  COMPUTEX Co Ltd",
+"154c  VISUAL Technology Inc",
+"154d  PAN INTERNATIONAL Industrial Corp",
+"154e  SERVOTEST Ltd",
+"154f  STRATABEAM Technology",
+"1550  OPEN NETWORK Co Ltd",
+"1551  SMART Electronic DEVELOPMENT GmBH",
+"1552  RACAL AIRTECH Ltd",
+"1553  CHICONY Electronics Co Ltd",
+"1554  PROLINK Microsystems Corp",
+"1555  GESYTEC GmBH",
+"1556  PLD APPLICATIONS",
+"1557  MEDIASTAR Co Ltd",
+"1558  CLEVO/KAPOK Computer",
+"1559  SI LOGIC Ltd",
+"155a  INNOMEDIA Inc",
+"155b  PROTAC INTERNATIONAL Corp",
+"155c  Cemax-Icon Inc",
+"155d  Mac System Co Ltd",
+"155e  LP Elektronik GmbH",
+"155f  Perle Systems Ltd",
+"1560  Terayon Communications Systems",
+"1561  Viewgraphics Inc",
+"1562  Symbol Technologies",
+"1563  A-Trend Technology Co Ltd",
+"1564  Yamakatsu Electronics Industry Co Ltd",
+"1565  Biostar Microtech Int'l Corp",
+"1566  Ardent Technologies Inc",
+"1567  Jungsoft",
+"1568  DDK Electronics Inc",
+"1569  Palit Microsystems Inc.",
+"156a  Avtec Systems",
+"156b  2wire Inc",
+"156c  Vidac Electronics GmbH",
+"156d  Alpha-Top Corp",
+"156e  Alfa Inc",
+"156f  M-Systems Flash Disk Pioneers Ltd",
+"1570  Lecroy Corp",
+"1571  Contemporary Controls",
+"   a001  CCSI PCI20-485 ARCnet",
+"   a002  CCSI PCI20-485D ARCnet",
+"   a003  CCSI PCI20-485X ARCnet",
+"   a004  CCSI PCI20-CXB ARCnet",
+"   a005  CCSI PCI20-CXS ARCnet",
+"   a006  CCSI PCI20-FOG-SMA ARCnet",
+"   a007  CCSI PCI20-FOG-ST ARCnet",
+"   a008  CCSI PCI20-TB5 ARCnet",
+"   a009  CCSI PCI20-5-485 5Mbit ARCnet",
+"   a00a  CCSI PCI20-5-485D 5Mbit ARCnet",
+"   a00b  CCSI PCI20-5-485X 5Mbit ARCnet",
+"   a00c  CCSI PCI20-5-FOG-ST 5Mbit ARCnet",
+"   a00d  CCSI PCI20-5-FOG-SMA 5Mbit ARCnet",
+"   a201  CCSI PCI22-485 10Mbit ARCnet",
+"   a202  CCSI PCI22-485D 10Mbit ARCnet",
+"   a203  CCSI PCI22-485X 10Mbit ARCnet",
+"   a204  CCSI PCI22-CHB 10Mbit ARCnet",
+"   a205  CCSI PCI22-FOG_ST 10Mbit ARCnet",
+"   a206  CCSI PCI22-THB 10Mbit ARCnet",
+"1572  Otis Elevator Company",
+"1573  Lattice - Vantis",
+"1574  Fairchild Semiconductor",
+"1575  Voltaire Advanced Data Security Ltd",
+"1576  Viewcast COM",
+"1578  HITT",
+"   5615  VPMK3 [Video Processor Mk III]",
+"1579  Dual Technology Corp",
+"157a  Japan Elecronics Ind Inc",
+"157b  Star Multimedia Corp",
+"157c  Eurosoft (UK)",
+"   8001  Fix2000 PCI Y2K Compliance Card",
+"157d  Gemflex Networks",
+"157e  Transition Networks",
+"157f  PX Instruments Technology Ltd",
+"1580  Primex Aerospace Co",
+"1581  SEH Computertechnik GmbH",
+"1582  Cytec Corp",
+"1583  Inet Technologies Inc",
+"1584  Uniwill Computer Corp",
+"1585  Logitron",
+"1586  Lancast Inc",
+"1587  Konica Corp",
+"1588  Solidum Systems Corp",
+"1589  Atlantek Microsystems Pty Ltd",
+"158a  Digalog Systems Inc",
+"158b  Allied Data Technologies",
+"158c  Hitachi Semiconductor & Devices Sales Co Ltd",
+"158d  Point Multimedia Systems",
+"158e  Lara Technology Inc",
+"158f  Ditect Coop",
+"1590  3pardata Inc",
+"1591  ARN",
+"1592  Syba Tech Ltd",
+"   0781  Multi-IO Card",
+"   0782  Parallel Port Card 2xEPP",
+"   0783  Multi-IO Card",
+"   0785  Multi-IO Card",
+"   0786  Multi-IO Card",
+"   0787  Multi-IO Card",
+"   0788  Multi-IO Card",
+"   078a  Multi-IO Card",
+"1593  Bops Inc",
+"1594  Netgame Ltd",
+"1595  Diva Systems Corp",
+"1596  Folsom Research Inc",
+"1597  Memec Design Services",
+"1598  Granite Microsystems",
+"1599  Delta Electronics Inc",
+"159a  General Instrument",
+"159b  Faraday Technology Corp",
+"159c  Stratus Computer Systems",
+"159d  Ningbo Harrison Electronics Co Ltd",
+"159e  A-Max Technology Co Ltd",
+"159f  Galea Network Security",
+"15a0  Compumaster SRL",
+"15a1  Geocast Network Systems",
+"15a2  Catalyst Enterprises Inc",
+"   0001  TA700 PCI Bus Analyzer/Exerciser",
+"15a3  Italtel",
+"15a4  X-Net OY",
+"15a5  Toyota Macs Inc",
+"15a6  Sunlight Ultrasound Technologies Ltd",
+"15a7  SSE Telecom Inc",
+"15a8  Shanghai Communications Technologies Center",
+"15aa  Moreton Bay",
+"15ab  Bluesteel Networks Inc",
+"15ac  North Atlantic Instruments",
+"15ad  VMware Inc",
+"   0405  [VMware SVGA II] PCI Display Adapter",
+"   0710  Virtual SVGA",
+"   0720  VMware High-Speed Virtual NIC [vmxnet]",
+"15ae  Amersham Pharmacia Biotech",
+"15b0  Zoltrix International Ltd",
+"15b1  Source Technology Inc",
+"15b2  Mosaid Technologies Inc",
+"15b3  Mellanox Technologies",
+"   5274  MT21108 InfiniBridge",
+"   5a44  MT23108 InfiniHost",
+"   5a45  MT23108 [Infinihost HCA Flash Recovery]",
+"   5a46  MT23108 PCI Bridge",
+"   5e8d  MT25204 [InfiniHost III Lx HCA Flash Recovery]",
+"   6274  MT25204 [InfiniHost III Lx HCA]",
+"   6278  MT25208 InfiniHost III Ex (Tavor compatibility mode)",
+"   6279  MT25208 [InfiniHost III Ex HCA Flash Recovery]",
+"   6282  MT25208 InfiniHost III Ex",
+"15b4  CCI/TRIAD",
+"15b5  Cimetrics Inc",
+"15b6  Texas Memory Systems Inc",
+"15b7  Sandisk Corp",
+"15b8  ADDI-DATA GmbH",
+"15b9  Maestro Digital Communications",
+"15ba  Impacct Technology Corp",
+"15bb  Portwell Inc",
+"15bc  Agilent Technologies",
+"   1100  E8001-66442 PCI Express CIC",
+"   2922  64 Bit, 133MHz PCI-X Exerciser & Protocol Checker",
+"   2928  64 Bit, 66MHz PCI Exerciser & Analyzer",
+"   2929  64 Bit, 133MHz PCI-X Analyzer & Exerciser",
+"15bd  DFI Inc",
+"15be  Sola Electronics",
+"15bf  High Tech Computer Corp (HTC)",
+"15c0  BVM Ltd",
+"15c1  Quantel",
+"15c2  Newer Technology Inc",
+"15c3  Taiwan Mycomp Co Ltd",
+"15c4  EVSX Inc",
+"15c5  Procomp Informatics Ltd",
+"   8010  1394b - 1394 Firewire 3-Port Host Adapter Card",
+"15c6  Technical University of Budapest",
+"15c7  Tateyama System Laboratory Co Ltd",
+"   0349  Tateyama C-PCI PLC/NC card Rev.01A",
+"15c8  Penta Media Co Ltd",
+"15c9  Serome Technology Inc",
+"15ca  Bitboys OY",
+"15cb  AG Electronics Ltd",
+"15cc  Hotrail Inc",
+"15cd  Dreamtech Co Ltd",
+"15ce  Genrad Inc",
+"15cf  Hilscher GmbH",
+"15d1  Infineon Technologies AG",
+"15d2  FIC (First International Computer Inc)",
+"15d3  NDS Technologies Israel Ltd",
+"15d4  Iwill Corp",
+"15d5  Tatung Co",
+"15d6  Entridia Corp",
+"15d7  Rockwell-Collins Inc",
+"15d8  Cybernetics Technology Co Ltd",
+"15d9  Super Micro Computer Inc",
+"15da  Cyberfirm Inc",
+"15db  Applied Computing Systems Inc",
+"15dc  Litronic Inc",
+"   0001  Argus 300 PCI Cryptography Module",
+"15dd  Sigmatel Inc",
+"15de  Malleable Technologies Inc",
+"15df  Infinilink Corp",
+"15e0  Cacheflow Inc",
+"15e1  Voice Technologies Group Inc",
+"15e2  Quicknet Technologies Inc",
+"15e3  Networth Technologies Inc",
+"15e4  VSN Systemen BV",
+"15e5  Valley technologies Inc",
+"15e6  Agere Inc",
+"15e7  Get Engineering Corp",
+"15e8  National Datacomm Corp",
+"   0130  Wireless PCI Card",
+"15e9  Pacific Digital Corp",
+"   1841  ADMA-100 DiscStaQ ATA Controller",
+"15ea  Tokyo Denshi Sekei K.K.",
+"15eb  Drsearch GmbH",
+"15ec  Beckhoff GmbH",
+"   3101  FC3101 Profibus DP 1 Channel PCI",
+"   5102  FC5102",
+"15ed  Macrolink Inc",
+"15ee  In Win Development Inc",
+"15ef  Intelligent Paradigm Inc",
+"15f0  B-Tree Systems Inc",
+"15f1  Times N Systems Inc",
+"15f2  Diagnostic Instruments Inc",
+"15f3  Digitmedia Corp",
+"15f4  Valuesoft",
+"15f5  Power Micro Research",
+"15f6  Extreme Packet Device Inc",
+"15f7  Banctec",
+"15f8  Koga Electronics Co",
+"15f9  Zenith Electronics Corp",
+"15fa  J.P. Axzam Corp",
+"15fb  Zilog Inc",
+"15fc  Techsan Electronics Co Ltd",
+"15fd  N-CUBED.NET",
+"15fe  Kinpo Electronics Inc",
+"15ff  Fastpoint Technologies Inc",
+"1600  Northrop Grumman - Canada Ltd",
+"1601  Tenta Technology",
+"1602  Prosys-tec Inc",
+"1603  Nokia Wireless Communications",
+"1604  Central System Research Co Ltd",
+"1605  Pairgain Technologies",
+"1606  Europop AG",
+"1607  Lava Semiconductor Manufacturing Inc",
+"1608  Automated Wagering International",
+"1609  Scimetric Instruments Inc",
+"1612  Telesynergy Research Inc.",
+"1619  FarSite Communications Ltd",
+"   0400  FarSync T2P (2 port X.21/V.35/V.24)",
+"   0440  FarSync T4P (4 port X.21/V.35/V.24)",
+"   0610  FarSync T1U (1 port X.21/V.35/V.24)",
+"   0620  FarSync T2U (2 port X.21/V.35/V.24)",
+"   0640  FarSync T4U (4 port X.21/V.35/V.24)",
+"   1610  FarSync TE1 (T1,E1)",
+"   2610  FarSync DSL-S1 (SHDSL)",
+"161f  Rioworks",
+"1626  TDK Semiconductor Corp.",
+"   8410  RTL81xx Fast Ethernet",
+"1629  Kongsberg Spacetec AS",
+"   1003  Format synchronizer v3.0",
+"   2002  Fast Universal Data Output",
+"1637  Linksys",
+"   3874  Linksys 802.11b WMP11 PCI Wireless card",
+"1638  Standard Microsystems Corp [SMC]",
+"   1100  SMC2602W EZConnect / Addtron AWA-100 / Eumitcom PCI WL11000",
+"163c  Smart Link Ltd.",
+"   3052  SmartLink SmartPCI562 56K Modem",
+"   5449  SmartPCI561 Modem",
+"1657  Brocade Communications Systems, Inc.",
+"165a  Epix Inc",
+"   c100  PIXCI(R) CL1 Camera Link Video Capture Board [custom QL5232]",
+"   d200  PIXCI(R) D2X Digital Video Capture Board [custom QL5232]",
+"   d300  PIXCI(R) D3X Digital Video Capture Board [custom QL5232]",
+"165d  Hsing Tech. Enterprise Co., Ltd.",
+"165f  Linux Media Labs, LLC",
+"   1020  LMLM4 MPEG-4 encoder",
+"1661  Worldspace Corp.",
+"1668  Actiontec Electronics Inc",
+"   0100  Mini-PCI bridge",
+"166d  Broadcom Corporation",
+"   0001  SiByte BCM1125/1125H/1250 System-on-a-Chip PCI",
+"   0002  SiByte BCM1125H/1250 System-on-a-Chip HyperTransport",
+"1677  Bernecker + Rainer",
+"   104e  5LS172.6 B&R Dual CAN Interface Card",
+"   12d7  5LS172.61 B&R Dual CAN Interface Card",
+"167b  ZyDAS Technology Corp.",
+"   2102  ZyDAS ZD1202",
+"       187e 3406  ZyAIR B-122 CardBus 11Mbs Wireless LAN Card",
+"1681  Hercules",
+"   0010  Hercules 3d Prophet II Ultra 64MB (350 MHz NV15BR core)",
+"1682  XFX Pine Group Inc.",
+"1688  CastleNet Technology Inc.",
+"   1170  WLAN 802.11b card",
+"168c  Atheros Communications, Inc.",
+"   0007  AR5000 802.11a Wireless Adapter",
+"   0011  AR5210 802.11a NIC",
+"   0012  AR5211 802.11ab NIC",
+"   0013  AR5212 802.11abg NIC",
+"       1113 d301  Philips CPWNA100 Wireless CardBus adapter",
+"       1186 3202  D-link DWL-G650 (Rev B3,B5) Wireless cardbus adapter",
+"       1186 3203  DWL-G520 Wireless PCI Adapter",
+"       1186 3a12  D-Link AirPlus DWL-G650 Wireless Cardbus Adapter(rev.C)",
+"       1186 3a13  D-Link AirPlus DWL-G520 Wireless PCI Adapter(rev.B)",
+"       1186 3a14  D-Link AirPremier DWL-AG530 Wireless PCI Adapter",
+"       1186 3a17  D-Link AirPremier DWL-G680 Wireless Cardbus Adapter",
+"       1186 3a18  D-Link AirPremier DWL-G550 Wireless PCI Adapter",
+"       1186 3a63  D-Link AirPremier DWL-AG660 Wireless Cardbus Adapter",
+"       1186 3a94  C54C Wireless 801.11g cardbus",
+"       1186 3ab0  Allnet ALL0281 Wireless PCI Card",
+"       1385 4d00  Netgear WG311T Wireless PCI Adapter",
+"       1458 e911  Gigabyte GN-WIAG02",
+"       14b7 0a60  8482-WD ORiNOCO 11a/b/g Wireless PCI Adapter",
+"       168c 0013  AirPlus XtremeG DWL-G650 Wireless PCMCIA Adapter",
+"       168c 1025  DWL-G650B2 Wireless CardBus Adapter",
+"       168c 1027  Netgate NL-3054CB ARIES b/g CardBus Adapter",
+"       168c 2026  Netgate 5354MP ARIES a(108Mb turbo)/b/g MiniPCI Adapter",
+"       168c 2041  Netgate 5354MP Plus ARIES2 b/g MiniPCI Adapter",
+"       168c 2042  Netgate 5354MP Plus ARIES2 a/b/g MiniPCI Adapter",
+"       16ab 7302  Trust Speedshare Turbo Pro Wireless PCI Adapter",
+"       185f 2012  Wistron NeWeb WLAN a+b+g model CB9",
+"   001a  AR5005G 802.11abg NIC",
+"       1113 ee20  SMC Wireless CardBus Adapter 802.11g (SMCWCB-G EU)",
+"       1113 ee24  SMC Wireless PCI Card WPCI-G",
+"       1186 3a15  D-Link AirPlus G DWL-G630 Wireless Cardbus Adapter(rev.D)",
+"       1186 3a16  D-Link AirPlus G DWL-G510 Wireless PCI Adapter(rev.B)",
+"       1186 3a23  D-Link AirPlus G DWL-G520+A Wireless PCI Adapter",
+"       1186 3a24  D-Link AirPlus G DWL-G650+A Wireless Cardbus Adapter",
+"       168c 1052  TP-Link TL-WN510G Wireless CardBus Adapter",
+"   001b  AR5006X 802.11abg NIC",
+"       1186 3a19  D-Link AirPremier AG DWL-AG660 Wireless Cardbus Adapter",
+"       1186 3a22  D-Link AirPremier AG DWL-AG530 Wireless PCI Adapter",
+"       168c 2062  EnGenius EMP-8602 (400mw)",
+"       168c 2063  EnGenius EMP-8602 (400mw)",
+"   0020  AR5005VL 802.11bg Wireless NIC",
+"   1014  AR5212 802.11abg NIC",
+"1695  EPoX Computer Co., Ltd.",
+"169c  Netcell Corporation",
+"   0044  Revolution Storage Processing Card",
+"16a5  Tekram Technology Co.,Ltd.",
+"16ab  Global Sun Technology Inc",
+"   1100  GL24110P",
+"   1101  PLX9052 PCMCIA-to-PCI Wireless LAN",
+"   1102  PCMCIA-to-PCI Wireless Network Bridge",
+"   8501  WL-8305 Wireless LAN PCI Adapter",
+"16ae  Safenet Inc",
+"   1141  SafeXcel-1141",
+"16af  SparkLAN Communications, Inc.",
+"16b4  Aspex Semiconductor Ltd",
+"16b8  Sonnet Technologies, Inc.",
+"16be  Creatix Polymedia GmbH",
+"16c6  Micrel-Kendin",
+"   8695  Centaur KS8695 ARM processor",
+"16c8  Octasic Inc.",
+"16c9  EONIC B.V. The Netherlands",
+"16ca  CENATEK Inc",
+"   0001  Rocket Drive DL",
+"16cd  Densitron Technologies",
+"16ce  Roland Corp.",
+"16d5  Acromag, Inc.",
+"   4d4e  PMC482, APC482, AcPC482 Counter Timer Board",
+"16df  PIKA Technologies Inc.",
+"16e3  European Space Agency",
+"   1e0f  LEON2FT Processor",
+"16ec  U.S. Robotics",
+"   00ff  USR997900 10/100 Mbps PCI Network Card",
+"   0116  USR997902 10/100/1000 Mbps PCI Network Card",
+"   3685  Wireless Access PCI Adapter Model 022415",
+"16ed  Sycron N. V.",
+"   1001  UMIO communication card",
+"16f3  Jetway Information Co., Ltd.",
+"16f4  Vweb Corp",
+"   8000  VW2010",
+"16f6  VideoTele.com, Inc.",
+"1702  Internet Machines Corporation (IMC)",
+"1705  Digital First, Inc.",
+"170b  NetOctave",
+"   0100  NSP2000-SSL crypto accelerator",
+"170c  YottaYotta Inc.",
+"1725  Vitesse Semiconductor",
+"   7174  VSC7174 PCI/PCI-X Serial ATA Host Bus Controller",
+"172a  Accelerated Encryption",
+"   13c8  AEP SureWare Runner 1000V3",
+"1734  Fujitsu Siemens Computer GmbH",
+"   1078  Amilo Pro v2010",
+"1737  Linksys",
+"   0013  WMP54G Wireless Pci Card",
+"   0015  WMP54GS Wireless Pci Card",
+"   1032  Gigabit Network Adapter",
+"       1737 0015  EG1032 v2 Instant Gigabit Network Adapter",
+"       1737 0024  EG1032 v3 Instant Gigabit Network Adapter",
+"   1064  Gigabit Network Adapter",
+"       1737 0016  EG1064 v2 Instant Gigabit Network Adapter",
+"   ab08  21x4x DEC-Tulip compatible 10/100 Ethernet",
+"   ab09  21x4x DEC-Tulip compatible 10/100 Ethernet",
+"173b  Altima (nee Broadcom)",
+"   03e8  AC1000 Gigabit Ethernet",
+"   03e9  AC1001 Gigabit Ethernet",
+"   03ea  AC9100 Gigabit Ethernet",
+"       173b 0001  AC1002",
+"   03eb  AC1003 Gigabit Ethernet",
+"1743  Peppercon AG",
+"   8139  ROL/F-100 Fast Ethernet Adapter with ROL",
+"1749  RLX Technologies",
+"174b  PC Partner Limited",
+"174d  WellX Telecom SA",
+"175c  AudioScience Inc",
+"175e  Sanera Systems, Inc.",
+"1775  SBS Technologies",
+"1787  Hightech Information System Ltd.",
+"1796  Research Centre Juelich",
+"   0001  SIS1100 [Gigabit link]",
+"   0002  HOTlink",
+"   0003  Counter Timer",
+"   0004  CAMAC Controller",
+"   0005  PROFIBUS",
+"   0006  AMCC HOTlink",
+"1797  JumpTec h, GMBH",
+"1799  Belkin",
+"   6001  Wireless PCI Card - F5D6001",
+"   6020  Wireless PCMCIA Card - F5D6020",
+"   6060  Wireless PDA Card - F5D6060",
+"   7000  Wireless PCI Card - F5D7000",
+"   7010  BCM4306 802.11b/g Wireless Lan Controller F5D7010",
+"179c  Data Patterns",
+"   0557  DP-PCI-557 [PCI 1553B]",
+"   0566  DP-PCI-566 [Intelligent PCI 1553B]",
+"   5031  DP-CPCI-5031-Synchro Module",
+"   5121  DP-CPCI-5121-IP Carrier",
+"   5211  DP-CPCI-5211-IP Carrier",
+"   5679  AGE Display Module",
+"17a0  Genesys Logic, Inc",
+"   8033  GL880S USB 1.1 controller",
+"   8034  GL880S USB 2.0 controller",
+"17aa  Lenovo",
+"17af  Hightech Information System Ltd.",
+"17b3  Hawking Technologies",
+"   ab08  PN672TX 10/100 Ethernet",
+"17b4  Indra Networks, Inc.",
+"   0011  WebEnhance 100 GZIP Compression Card",
+"17c0  Wistron Corp.",
+"17c2  Newisys, Inc.",
+"17cb  Airgo Networks Inc",
+"17cc  NetChip Technology, Inc",
+"   2280  USB 2.0",
+"17cf  Z-Com, Inc.",
+"17d3  Areca Technology Corp.",
+"   1110  ARC-1110 4-Port PCI-X to SATA RAID Controller",
+"   1120  ARC-1120 8-Port PCI-X to SATA RAID Controller",
+"   1130  ARC-1130 12-Port PCI-X to SATA RAID Controller",
+"   1160  ARC-1160 16-Port PCI-X to SATA RAID Controller",
+"   1210  ARC-1210 4-Port PCI-Express to SATA RAID Controller",
+"   1220  ARC-1220 8-Port PCI-Express to SATA RAID Controller",
+"   1230  ARC-1230 12-Port PCI-Express to SATA RAID Controller",
+"   1260  ARC-1260 16-Port PCI-Express to SATA RAID Controller",
+"17d5  S2io Inc.",
+"   5831  Xframe 10 Gigabit Ethernet PCI-X",
+"       103c 12d5  HP PCI-X 133MHz 10GbE SR Fiber",
+"   5832  Xframe II 10Gbps Ethernet",
+"17de  KWorld Computer Co. Ltd.",
+"17ee  Connect Components Ltd",
+"17f2  Albatron Corp.",
+"17fe  Linksys, A Division of Cisco Systems",
+"   2120  WMP11v4 802.11b PCI card",
+"   2220  [AirConn] INPROCOMM IPN 2220 Wireless LAN Adapter (rev 01)",
+"       17fe 2220  WPC54G ver. 4",
+"17ff  Benq Corporation",
+"1809  Lumanate, Inc.",
+"1813  Ambient Technologies Inc",
+"   4000  HaM controllerless modem",
+"       16be 0001  V9x HAM Data Fax Modem",
+"   4100  HaM plus Data Fax Modem",
+"       16be 0002  V9x HAM 1394",
+"1814  RaLink",
+"   0101  Wireless PCI Adapter RT2400 / RT2460",
+"       1043 0127  WiFi-b add-on Card",
+"       1462 6828  PC11B2 (MS-6828) Wireless 11b PCI Card",
+"   0200  RT2500 802.11g PCI [PC54G2]",
+"   0201  RT2500 802.11g Cardbus/mini-PCI",
+"       1043 130f  WL-130g",
+"       1371 001e  CWC-854 Wireless-G CardBus Adapter",
+"       1371 001f  CWM-854 Wireless-G Mini PCI Adapter",
+"       1371 0020  CWP-854 Wireless-G PCI Adapter",
+"       1458 e381  GN-WMKG 802.11b/g Wireless CardBus Adapter",
+"       1458 e931  GN-WIKG 802.11b/g mini-PCI Adapter",
+"       1462 6835  Wireless 11G CardBus CB54G2",
+"       1737 0032  WMP54G 2.0 PCI Adapter",
+"       1799 700a  F5D7000 Wireless G Desktop Network Card",
+"       1799 701a  F5D7010 Wireless G Notebook Network Card",
+"       185f 22a0  CN-WF513 Wireless Cardbus Adapter",
+"   0301  RT2561/RT61 802.11g PCI",
+"       1186 3c08  DWL-G630 Rev E",
+"       1186 3c09  DWL-G510 Rev C",
+"   0302  RT2561/RT61 rev B 802.11g",
+"       1186 3c08  DWL-G630 Rev E",
+"       1186 3c09  DWL-G510 Rev C",
+"   0401  Ralink RT2600 802.11 MIMO",
+"1820  InfiniCon Systems Inc.",
+"1822  Twinhan Technology Co. Ltd",
+"   4e35  Mantis DTV PCI Bridge Controller [Ver 1.0]",
+"182d  SiteCom Europe BV",
+"   3069  ISDN PCI DC-105V2",
+"   9790  WL-121 Wireless Network Adapter 100g+ [Ver.3]",
+"1830  Credence Systems Corporation",
+"183b  MikroM GmbH",
+"   08a7  MVC100 DVI",
+"   08a8  MVC101 SDI",
+"   08a9  MVC102 DVI+Audio",
+"1849  ASRock Incorporation",
+"1851  Microtune, Inc.",
+"1852  Anritsu Corp.",
+"1853  SMSC Automotive Infotainment System Group",
+"1854  LG Electronics, Inc.",
+"185b  Compro Technology, Inc.",
+"185f  Wistron NeWeb Corp.",
+"1864  SilverBack",
+"   2110  ISNAP 2110",
+"1867  Topspin Communications",
+"   5a44  MT23108 InfiniHost HCA",
+"   5a45  MT23108 InfiniHost HCA flash recovery",
+"   5a46  MT23108 InfiniHost HCA bridge",
+"   6278  MT25208 InfiniHost III Ex (Tavor compatibility mode)",
+"   6282  MT25208 InfiniHost III Ex",
+"187e  ZyXEL Communication Corporation",
+"   3403  ZyAir G-110 802.11g",
+"   340e  M-302 802.11g XtremeMIMO",
+"1888  Varisys Ltd",
+"   0301  VMFX1 FPGA PMC module",
+"   0601  VSM2 dual PMC carrier",
+"   0710  VS14x series PowerPC PCI board",
+"   0720  VS24x series PowerPC PCI board",
+"188a  Ample Communications, Inc",
+"1890  Egenera, Inc.",
+"1894  KNC One",
+"1896  B&B Electronics Manufacturing Company, Inc.",
+"18a1  Astute Networks Inc.",
+"18ac  DViCO Corporation",
+"   d500  FusionHDTV 5",
+"   d810  FusionHDTV 3 Gold",
+"   d820  FusionHDTV 3 Gold-T",
+"18b8  Ammasso",
+"   b001  AMSO 1100 iWARP/RDMA Gigabit Ethernet Coprocessor",
+"18bc  Info-Tek Corp.",
+"18c3  Micronas Semiconductor Holding AG",
+"18c8  Cray Inc",
+"18c9  ARVOO Engineering BV",
+"18ca  XGI - Xabre Graphics Inc",
+"   0020  Volari Z7",
+"   0040  Volari V3XT/V5/V8",
+"18d2  Sitecom",
+"   3069  DC-105v2 ISDN controller",
+"18dd  Artimi Inc",
+"   4c6f  Artimi RTMI-100 UWB adapter",
+"18e6  MPL AG",
+"   0001  OSCI [Octal Serial Communication Interface]",
+"18ec  Cesnet, z.s.p.o.",
+"   c006  COMBO6",
+"       18ec d001  COMBO-4MTX",
+"       18ec d002  COMBO-4SFP",
+"       18ec d003  COMBO-4SFPRO",
+"       18ec d004  COMBO-2XFP",
+"   c045  COMBO6E",
+"   c050  COMBO-PTM",
+"   c058  COMBO6X",
+"       18ec d001  COMBO-4MTX",
+"       18ec d002  COMBO-4SFP",
+"       18ec d003  COMBO-4SFPRO",
+"       18ec d004  COMBO-2XFP",
+"18f7  Commtech, Inc.",
+"   0001  Fastcom ESCC-PCI-335",
+"   0002  Fastcom 422/4-PCI-335",
+"   0004  Fastcom 422/2-PCI-335",
+"   0005  Fastcom IGESCC-PCI-ISO/1",
+"   000a  Fastcom 232/4-PCI-335",
+"18fb  Resilience Corporation",
+"1904  Hangzhou Silan Microelectronics Co., Ltd.",
+"1923  Sangoma Technologies Corp.",
+"   0100  A104d QUAD T1/E1 AFT card",
+"   0400  A104u Quad T1/E1 AFT",
+"1924  Level 5 Networks Inc.",
+"192e  TransDimension",
+"1931  Option N.V.",
+"   000c  Qualcomm MSM6275 UMTS chip",
+"1942  ClearSpeed Technology plc",
+"   e511  CSX600 Advance Accelerator Board",
+"1957  Freescale Semiconductor Inc",
+"   0080  MPC8349E",
+"   0081  MPC8349",
+"   0082  MPC8347E TBGA",
+"   0083  MPC8347 TBGA",
+"   0084  MPC8347E PBGA",
+"   0085  MPC8347 PBGA",
+"   0086  MPC8343E",
+"   0087  MPC8343",
+"1958  Faster Technology, LLC.",
+"1966  Orad Hi-Tec Systems",
+"   1975  DVG64 family",
+"196a  Sensory Networks Inc.",
+"   0101  NodalCore C-1000 Content Classification Accelerator",
+"   0102  NodalCore C-2000 Content Classification Accelerator",
+"197b  JMicron Technologies, Inc.",
+"   2360  JMicron 20360/20363 AHCI Controller",
+"   2361  JMB361 AHCI/IDE",
+"   2363  JMicron 20360/20363 AHCI Controller",
+"   2365  JMB365 AHCI/IDE",
+"   2366  JMB366 AHCI/IDE",
+"1989  Montilio Inc.",
+"   0001  RapidFile Bridge",
+"   8001  RapidFile",
+"1993  Innominate Security Technologies AG",
+"199a  Pulse-LINK, Inc.",
+"19a8  DAQDATA GmbH",
+"19ac  Kasten Chase Applied Research",
+"   0001  ACA2400 Crypto Accelerator",
+"19ae  Progeny Systems Corporation",
+"   0520  4135 HFT Interface Controller",
+"19d4  Quixant Limited",
+"19e2  Vector Informatik GmbH",
+"1a03  ASPEED Technology, Inc.",
+"   2000  AST2000",
+"1a08  Sierra semiconductor",
+"   0000  SC15064",
+"1a1d  GFaI e.V.",
+"1a29  Fortinet, Inc.",
+"1b13  Jaton Corp",
+"1c1c  Symphony",
+"   0001  82C101",
+"1d44  DPT",
+"   a400  PM2x24/PM3224",
+"1de1  Tekram Technology Co.,Ltd.",
+"   0391  TRM-S1040",
+"   2020  DC-390",
+"   690c  690c",
+"   dc29  DC290",
+"1fc0  Tumsan Oy",
+"   0300  E2200 Dual E1/Rawpipe Card",
+"1fc1  PathScale, Inc",
+"   000d  InfiniPath HT-400",
+"   0010  InfiniPath PE-800",
+"1fce  Cognio Inc.",
+"   0001  Spectrum Analyzer PC Card (SAgE)",
+"2000  Smart Link Ltd.",
+"2001  Temporal Research Ltd",
+"2003  Smart Link Ltd.",
+"2004  Smart Link Ltd.",
+"21c3  21st Century Computer Corp.",
+"22b8  Motorola, Inc.",
+"2348  Racore",
+"   2010  8142 100VG/AnyLAN",
+"2646  Kingston Technologies",
+"270b  Xantel Corporation",
+"270f  Chaintech Computer Co. Ltd",
+"2711  AVID Technology Inc.",
+"2a15  3D Vision(???)",
+"3000  Hansol Electronics Inc.",
+"3142  Post Impression Systems.",
+"3388  Hint Corp",
+"   0013  HiNT HC4 PCI to ISDN bridge, Multimedia audio controller",
+"   0014  HiNT HC4 PCI to ISDN bridge, Network controller",
+"   0020  HB6 Universal PCI-PCI bridge (transparent mode)",
+"   0021  HB6 Universal PCI-PCI bridge (non-transparent mode)",
+"       4c53 1050  CT7 mainboard",
+"       4c53 1080  CT8 mainboard",
+"       4c53 1090  Cx9 mainboard",
+"       4c53 10a0  CA3/CR3 mainboard",
+"       4c53 3010  PPCI mezzanine (32-bit PMC)",
+"       4c53 3011  PPCI mezzanine (64-bit PMC)",
+"       4c53 4000  PMCCARR1 carrier board",
+"   0022  HiNT HB4 PCI-PCI Bridge (PCI6150)",
+"   0026  HB2 PCI-PCI Bridge",
+"   101a  E.Band [AudioTrak Inca88]",
+"   101b  E.Band [AudioTrak Inca88]",
+"   8011  VXPro II Chipset",
+"       3388 8011  VXPro II Chipset CPU to PCI Bridge",
+"   8012  VXPro II Chipset",
+"       3388 8012  VXPro II Chipset PCI to ISA Bridge",
+"   8013  VXPro II IDE",
+"       3388 8013  VXPro II Chipset EIDE Controller",
+"3411  Quantum Designs (H.K.) Inc",
+"3513  ARCOM Control Systems Ltd",
+"3842  eVga.com. Corp.",
+"   c370  e-GeFORCE 6600 256 DDR PCI-e",
+"38ef  4Links",
+"3d3d  3DLabs",
+"   0001  GLINT 300SX",
+"   0002  GLINT 500TX",
+"       0000 0000  GLoria L",
+"   0003  GLINT Delta",
+"       0000 0000  GLoria XL",
+"   0004  Permedia",
+"   0005  Permedia",
+"   0006  GLINT MX",
+"       0000 0000  GLoria XL",
+"       1048 0a42  GLoria XXL",
+"   0007  3D Extreme",
+"   0008  GLINT Gamma G1",
+"       1048 0a42  GLoria XXL",
+"   0009  Permedia II 2D+3D",
+"       1040 0011  AccelStar II",
+"       1048 0a42  GLoria XXL",
+"       13e9 1000  6221L-4U",
+"       3d3d 0100  AccelStar II 3D Accelerator",
+"       3d3d 0111  Permedia 3:16",
+"       3d3d 0114  Santa Ana",
+"       3d3d 0116  Oxygen GVX1",
+"       3d3d 0119  Scirocco",
+"       3d3d 0120  Santa Ana PCL",
+"       3d3d 0125  Oxygen VX1",
+"       3d3d 0127  Permedia3 Create!",
+"   000a  GLINT R3",
+"       3d3d 0121  Oxygen VX1",
+"   000c  GLINT R3 [Oxygen VX1]",
+"       3d3d 0144  Oxygen VX1-4X AGP [Permedia 4]",
+"   000d  GLint R4 rev A",
+"   0011  GLint R4 rev B",
+"   0012  GLint R5 rev A",
+"   0013  GLint R5 rev B",
+"   0020  VP10 visual processor",
+"   0022  VP10 visual processor",
+"   0024  VP9 visual processor",
+"   0100  Permedia II 2D+3D",
+"   07a1  Wildcat III 6210",
+"   07a2  Sun XVR-500 Graphics Accelerator",
+"   07a3  Wildcat IV 7210",
+"   1004  Permedia",
+"   3d04  Permedia",
+"   ffff  Glint VGA",
+"4005  Avance Logic Inc.",
+"   0300  ALS300 PCI Audio Device",
+"   0308  ALS300+ PCI Audio Device",
+"   0309  PCI Input Controller",
+"   1064  ALG-2064",
+"   2064  ALG-2064i",
+"   2128  ALG-2364A GUI Accelerator",
+"   2301  ALG-2301",
+"   2302  ALG-2302",
+"   2303  AVG-2302 GUI Accelerator",
+"   2364  ALG-2364A",
+"   2464  ALG-2464",
+"   2501  ALG-2564A/25128A",
+"   4000  ALS4000 Audio Chipset",
+"       4005 4000  ALS4000 Audio Chipset",
+"   4710  ALC200/200P",
+"4033  Addtron Technology Co, Inc.",
+"   1360  RTL8139 Ethernet",
+"4143  Digital Equipment Corp",
+"4144  Alpha Data",
+"   0044  ADM-XRCIIPro",
+"416c  Aladdin Knowledge Systems",
+"   0100  AladdinCARD",
+"   0200  CPC",
+"4321  Tata Power Strategic Electronics Division",
+"4444  Internext Compression Inc",
+"   0016  iTVC16 (CX23416) MPEG-2 Encoder",
+"       0070 0003  WinTV PVR 250",
+"       0070 0009  WinTV PVR 150",
+"       0070 0801  WinTV PVR 150",
+"       0070 0807  WinTV PVR 150",
+"       0070 4001  WinTV PVR 250",
+"       0070 4009  WinTV PVR 250",
+"       0070 4801  WinTV PVR 250",
+"       0070 4803  WinTV PVR 250",
+"       0070 8003  WinTV PVR 150",
+"       0070 8801  WinTV PVR 150",
+"       0070 c801  WinTV PVR 150",
+"       0070 e807  WinTV PVR 500 (1st unit)",
+"       0070 e817  WinTV PVR 500 (2nd unit)",
+"       0070 ff92  WiNTV PVR-550",
+"       0270 0801  WinTV PVR 150",
+"       12ab fff3  MPG600",
+"       12ab ffff  MPG600",
+"       9005 0092  VideOh! AVC-2010",
+"       9005 0093  VideOh! AVC-2410",
+"   0803  iTVC15 MPEG-2 Encoder",
+"       0070 4000  WinTV PVR-350",
+"       0070 4001  WinTV PVR-250",
+"       0070 4800  WinTV PVR-350 (V1)",
+"       12ab 0000  MPG160",
+"       1461 a3ce  M179",
+"       1461 a3cf  M179",
+"4468  Bridgeport machines",
+"4594  Cogetec Informatique Inc",
+"45fb  Baldor Electric Company",
+"4680  Umax Computer Corp",
+"4843  Hercules Computer Technology Inc",
+"4916  RedCreek Communications Inc",
+"   1960  RedCreek PCI adapter",
+"4943  Growth Networks",
+"494f  ACCES I/O Products, Inc.",
+"   10e8  LPCI-COM-8SM",
+"4978  Axil Computer Inc",
+"4a14  NetVin",
+"   5000  NV5000SC",
+"       4a14 5000  RT8029-Based Ethernet Adapter",
+"4b10  Buslogic Inc.",
+"4c48  LUNG HWA Electronics",
+"4c53  SBS Technologies",
+"   0000  PLUSTEST device",
+"       4c53 3000  PLUSTEST card (PC104+)",
+"       4c53 3001  PLUSTEST card (PMC)",
+"   0001  PLUSTEST-MM device",
+"       4c53 3002  PLUSTEST-MM card (PMC)",
+"4ca1  Seanix Technology Inc",
+"4d51  MediaQ Inc.",
+"   0200  MQ-200",
+"4d54  Microtechnica Co Ltd",
+"4ddc  ILC Data Device Corp",
+"   0100  DD-42924I5-300 (ARINC 429 Data Bus)",
+"   0801  BU-65570I1 MIL-STD-1553 Test and Simulation",
+"   0802  BU-65570I2 MIL-STD-1553 Test and Simulation",
+"   0811  BU-65572I1 MIL-STD-1553 Test and Simulation",
+"   0812  BU-65572I2 MIL-STD-1553 Test and Simulation",
+"   0881  BU-65570T1 MIL-STD-1553 Test and Simulation",
+"   0882  BU-65570T2 MIL-STD-1553 Test and Simulation",
+"   0891  BU-65572T1 MIL-STD-1553 Test and Simulation",
+"   0892  BU-65572T2 MIL-STD-1553 Test and Simulation",
+"   0901  BU-65565C1 MIL-STD-1553 Data Bus",
+"   0902  BU-65565C2 MIL-STD-1553 Data Bus",
+"   0903  BU-65565C3 MIL-STD-1553 Data Bus",
+"   0904  BU-65565C4 MIL-STD-1553 Data Bus",
+"   0b01  BU-65569I1 MIL-STD-1553 Data Bus",
+"   0b02  BU-65569I2 MIL-STD-1553 Data Bus",
+"   0b03  BU-65569I3 MIL-STD-1553 Data Bus",
+"   0b04  BU-65569I4 MIL-STD-1553 Data Bus",
+"5046  GemTek Technology Corporation",
+"   1001  PCI Radio",
+"5053  Voyetra Technologies",
+"   2010  Daytona Audio Adapter",
+"5136  S S Technologies",
+"5143  Qualcomm Inc",
+"5145  Ensoniq (Old)",
+"   3031  Concert AudioPCI",
+"5168  Animation Technologies Inc.",
+"   0300  FlyDVB-S",
+"   0301  FlyDVB-T",
+"5301  Alliance Semiconductor Corp.",
+"   0001  ProMotion aT3D",
+"5333  S3 Inc.",
+"   0551  Plato/PX (system)",
+"   5631  86c325 [ViRGE]",
+"   8800  86c866 [Vision 866]",
+"   8801  86c964 [Vision 964]",
+"   8810  86c764_0 [Trio 32 vers 0]",
+"   8811  86c764/765 [Trio32/64/64V+]",
+"   8812  86cM65 [Aurora64V+]",
+"   8813  86c764_3 [Trio 32/64 vers 3]",
+"   8814  86c767 [Trio 64UV+]",
+"   8815  86cM65 [Aurora 128]",
+"   883d  86c988 [ViRGE/VX]",
+"   8870  FireGL",
+"   8880  86c868 [Vision 868 VRAM] vers 0",
+"   8881  86c868 [Vision 868 VRAM] vers 1",
+"   8882  86c868 [Vision 868 VRAM] vers 2",
+"   8883  86c868 [Vision 868 VRAM] vers 3",
+"   88b0  86c928 [Vision 928 VRAM] vers 0",
+"   88b1  86c928 [Vision 928 VRAM] vers 1",
+"   88b2  86c928 [Vision 928 VRAM] vers 2",
+"   88b3  86c928 [Vision 928 VRAM] vers 3",
+"   88c0  86c864 [Vision 864 DRAM] vers 0",
+"   88c1  86c864 [Vision 864 DRAM] vers 1",
+"   88c2  86c864 [Vision 864-P DRAM] vers 2",
+"   88c3  86c864 [Vision 864-P DRAM] vers 3",
+"   88d0  86c964 [Vision 964 VRAM] vers 0",
+"   88d1  86c964 [Vision 964 VRAM] vers 1",
+"   88d2  86c964 [Vision 964-P VRAM] vers 2",
+"   88d3  86c964 [Vision 964-P VRAM] vers 3",
+"   88f0  86c968 [Vision 968 VRAM] rev 0",
+"   88f1  86c968 [Vision 968 VRAM] rev 1",
+"   88f2  86c968 [Vision 968 VRAM] rev 2",
+"   88f3  86c968 [Vision 968 VRAM] rev 3",
+"   8900  86c755 [Trio 64V2/DX]",
+"       5333 8900  86C775 Trio64V2/DX",
+"   8901  86c775/86c785 [Trio 64V2/DX or /GX]",
+"       5333 8901  86C775 Trio64V2/DX, 86C785 Trio64V2/GX",
+"   8902  Plato/PX",
+"   8903  Trio 3D business multimedia",
+"   8904  Trio 64 3D",
+"       1014 00db  Integrated Trio3D",
+"       5333 8904  86C365 Trio3D AGP",
+"   8905  Trio 64V+ family",
+"   8906  Trio 64V+ family",
+"   8907  Trio 64V+ family",
+"   8908  Trio 64V+ family",
+"   8909  Trio 64V+ family",
+"   890a  Trio 64V+ family",
+"   890b  Trio 64V+ family",
+"   890c  Trio 64V+ family",
+"   890d  Trio 64V+ family",
+"   890e  Trio 64V+ family",
+"   890f  Trio 64V+ family",
+"   8a01  ViRGE/DX or /GX",
+"       0e11 b032  ViRGE/GX",
+"       10b4 1617  Nitro 3D",
+"       10b4 1717  Nitro 3D",
+"       5333 8a01  ViRGE/DX",
+"   8a10  ViRGE/GX2",
+"       1092 8a10  Stealth 3D 4000",
+"   8a13  86c368 [Trio 3D/2X]",
+"       5333 8a13  Trio3D/2X",
+"   8a20  86c794 [Savage 3D]",
+"       5333 8a20  86C391 Savage3D",
+"   8a21  86c390 [Savage 3D/MV]",
+"       5333 8a21  86C390 Savage3D/MV",
+"   8a22  Savage 4",
+"       1033 8068  Savage 4",
+"       1033 8069  Savage 4",
+"       1033 8110  Savage 4 LT",
+"       105d 0018  SR9 8Mb SDRAM",
+"       105d 002a  SR9 Pro 16Mb SDRAM",
+"       105d 003a  SR9 Pro 32Mb SDRAM",
+"       105d 092f  SR9 Pro+ 16Mb SGRAM",
+"       1092 4207  Stealth III S540",
+"       1092 4800  Stealth III S540",
+"       1092 4807  SpeedStar A90",
+"       1092 4808  Stealth III S540",
+"       1092 4809  Stealth III S540",
+"       1092 480e  Stealth III S540",
+"       1092 4904  Stealth III S520",
+"       1092 4905  SpeedStar A200",
+"       1092 4a09  Stealth III S540",
+"       1092 4a0b  Stealth III S540 Xtreme",
+"       1092 4a0f  Stealth III S540",
+"       1092 4e01  Stealth III S540",
+"       1102 101d  3d Blaster Savage 4",
+"       1102 101e  3d Blaster Savage 4",
+"       5333 8100  86C394-397 Savage4 SDRAM 100",
+"       5333 8110  86C394-397 Savage4 SDRAM 110",
+"       5333 8125  86C394-397 Savage4 SDRAM 125",
+"       5333 8143  86C394-397 Savage4 SDRAM 143",
+"       5333 8a22  86C394-397 Savage4",
+"       5333 8a2e  86C394-397 Savage4 32bit",
+"       5333 9125  86C394-397 Savage4 SGRAM 125",
+"       5333 9143  86C394-397 Savage4 SGRAM 143",
+"   8a23  Savage 4",
+"   8a25  ProSavage PM133",
+"   8a26  ProSavage KM133",
+"   8c00  ViRGE/M3",
+"   8c01  ViRGE/MX",
+"       1179 0001  ViRGE/MX",
+"   8c02  ViRGE/MX+",
+"   8c03  ViRGE/MX+MV",
+"   8c10  86C270-294 Savage/MX-MV",
+"   8c11  82C270-294 Savage/MX",
+"   8c12  86C270-294 Savage/IX-MV",
+"       1014 017f  Thinkpad T20/T22",
+"       1179 0001  86C584 SuperSavage/IXC Toshiba",
+"   8c13  86C270-294 Savage/IX",
+"       1179 0001  Magnia Z310",
+"   8c22  SuperSavage MX/128",
+"   8c24  SuperSavage MX/64",
+"   8c26  SuperSavage MX/64C",
+"   8c2a  SuperSavage IX/128 SDR",
+"   8c2b  SuperSavage IX/128 DDR",
+"   8c2c  SuperSavage IX/64 SDR",
+"   8c2d  SuperSavage IX/64 DDR",
+"   8c2e  SuperSavage IX/C SDR",
+"       1014 01fc  ThinkPad T23 (2647-4MG)",
+"   8c2f  SuperSavage IX/C DDR",
+"   8d01  86C380 [ProSavageDDR K4M266]",
+"   8d02  VT8636A [ProSavage KN133] AGP4X VGA Controller (TwisterK)",
+"   8d03  VT8751 [ProSavageDDR P4M266]",
+"   8d04  VT8375 [ProSavage8 KM266/KL266]",
+"   9102  86C410 Savage 2000",
+"       1092 5932  Viper II Z200",
+"       1092 5934  Viper II Z200",
+"       1092 5952  Viper II Z200",
+"       1092 5954  Viper II Z200",
+"       1092 5a35  Viper II Z200",
+"       1092 5a37  Viper II Z200",
+"       1092 5a55  Viper II Z200",
+"       1092 5a57  Viper II Z200",
+"   ca00  SonicVibes",
+"544c  Teralogic Inc",
+"   0350  TL880-based HDTV/ATSC tuner",
+"5455  Technische University Berlin",
+"   4458  S5933",
+"5519  Cnet Technologies, Inc.",
+"5544  Dunord Technologies",
+"   0001  I-30xx Scanner Interface",
+"5555  Genroco, Inc",
+"   0003  TURBOstor HFP-832 [HiPPI NIC]",
+"5654  VoiceTronix Pty Ltd",
+"   3132  OpenSwitch12",
+"5700  Netpower",
+"5851  Exacq Technologies",
+"6356  UltraStor",
+"6374  c't Magazin fuer Computertechnik",
+"   6773  GPPCI",
+"6409  Logitec Corp.",
+"6666  Decision Computer International Co.",
+"   0001  PCCOM4",
+"   0002  PCCOM8",
+"   0004  PCCOM2",
+"   0101  PCI 8255/8254 I/O Card",
+"7063  pcHDTV",
+"   2000  HD-2000",
+"   3000  HD-3000",
+"7604  O.N. Electronic Co Ltd.",
+"7bde  MIDAC Corporation",
+"7fed  PowerTV",
+"8008  Quancom Electronic GmbH",
+"   0010  WDOG1 [PCI-Watchdog 1]",
+"   0011  PWDOG2 [PCI-Watchdog 2]",
+"807d  Asustek Computer, Inc.",
+"8086  Intel Corporation",
+"   0007  82379AB",
+"   0008  Extended Express System Support Controller",
+"   0039  21145 Fast Ethernet",
+"   0122  82437FX",
+"   0309  80303 I/O Processor PCI-to-PCI Bridge",
+"   030d  80312 I/O Companion Chip PCI-to-PCI Bridge",
+"   0326  6700/6702PXH I/OxAPIC Interrupt Controller A",
+"   0327  6700PXH I/OxAPIC Interrupt Controller B",
+"   0329  6700PXH PCI Express-to-PCI Bridge A",
+"   032a  6700PXH PCI Express-to-PCI Bridge B",
+"   032c  6702PXH PCI Express-to-PCI Bridge A",
+"   0330  80332 [Dobson] I/O processor (A-Segment Bridge)",
+"   0331  80332 [Dobson] I/O processor (A-Segment IOAPIC)",
+"   0332  80332 [Dobson] I/O processor (B-Segment Bridge)",
+"   0333  80332 [Dobson] I/O processor (B-Segment IOAPIC)",
+"   0334  80332 [Dobson] I/O processor (ATU)",
+"   0335  80331 [Lindsay] I/O processor (PCI-X Bridge)",
+"   0336  80331 [Lindsay] I/O processor (ATU)",
+"   0340  41210 [Lanai] Serial to Parallel PCI Bridge (A-Segment Bridge)",
+"   0341  41210 [Lanai] Serial to Parallel PCI Bridge (B-Segment Bridge)",
+"   0370  80333 Segment-A PCI Express-to-PCI Express Bridge",
+"   0371  80333 A-Bus IOAPIC",
+"   0372  80333 Segment-B PCI Express-to-PCI Express Bridge",
+"   0373  80333 B-Bus IOAPIC",
+"   0374  80333 Address Translation Unit",
+"   0482  82375EB/SB PCI to EISA Bridge",
+"   0483  82424TX/ZX [Saturn] CPU to PCI bridge",
+"   0484  82378ZB/IB, 82379AB (SIO, SIO.A) PCI to ISA Bridge",
+"   0486  82425EX/ZX [Aries] PCIset with ISA bridge",
+"   04a3  82434LX/NX [Mercury/Neptune] Processor to PCI bridge",
+"   04d0  82437FX [Triton FX]",
+"   0500  E8870 Processor bus control",
+"   0501  E8870 Memory controller",
+"   0502  E8870 Scalability Port 0",
+"   0503  E8870 Scalability Port 1",
+"   0510  E8870IO Hub Interface Port 0 registers (8-bit compatibility port)",
+"   0511  E8870IO Hub Interface Port 1 registers",
+"   0512  E8870IO Hub Interface Port 2 registers",
+"   0513  E8870IO Hub Interface Port 3 registers",
+"   0514  E8870IO Hub Interface Port 4 registers",
+"   0515  E8870IO General SIOH registers",
+"   0516  E8870IO RAS registers",
+"   0530  E8870SP Scalability Port 0 registers",
+"   0531  E8870SP Scalability Port 1 registers",
+"   0532  E8870SP Scalability Port 2 registers",
+"   0533  E8870SP Scalability Port 3 registers",
+"   0534  E8870SP Scalability Port 4 registers",
+"   0535  E8870SP Scalability Port 5 registers",
+"   0536  E8870SP Interleave registers 0 and 1",
+"   0537  E8870SP Interleave registers 2 and 3",
+"   0600  RAID Controller",
+"       8086 01af  SRCZCR",
+"       8086 01c1  ICP Vortex GDT8546RZ",
+"       8086 01f7  SCRU32",
+"   061f  80303 I/O Processor",
+"   0960  80960RP [i960 RP Microprocessor/Bridge]",
+"   0962  80960RM [i960RM Bridge]",
+"   0964  80960RP [i960 RP Microprocessor/Bridge]",
+"   1000  82542 Gigabit Ethernet Controller",
+"       0e11 b0df  NC1632 Gigabit Ethernet Adapter (1000-SX)",
+"       0e11 b0e0  NC1633 Gigabit Ethernet Adapter (1000-LX)",
+"       0e11 b123  NC1634 Gigabit Ethernet Adapter (1000-SX)",
+"       1014 0119  Netfinity Gigabit Ethernet SX Adapter",
+"       8086 1000  PRO/1000 Gigabit Server Adapter",
+"   1001  82543GC Gigabit Ethernet Controller (Fiber)",
+"       0e11 004a  NC6136 Gigabit Server Adapter",
+"       1014 01ea  Netfinity Gigabit Ethernet SX Adapter",
+"       8086 1002  PRO/1000 F Server Adapter",
+"       8086 1003  PRO/1000 F Server Adapter",
+"   1002  Pro 100 LAN+Modem 56 Cardbus II",
+"       8086 200e  Pro 100 LAN+Modem 56 Cardbus II",
+"       8086 2013  Pro 100 SR Mobile Combo Adapter",
+"       8086 2017  Pro 100 S Combo Mobile Adapter",
+"   1004  82543GC Gigabit Ethernet Controller (Copper)",
+"       0e11 0049  NC7132 Gigabit Upgrade Module",
+"       0e11 b1a4  NC7131 Gigabit Server Adapter",
+"       1014 10f2  Gigabit Ethernet Server Adapter",
+"       8086 1004  PRO/1000 T Server Adapter",
+"       8086 2004  PRO/1000 T Server Adapter",
+"   1008  82544EI Gigabit Ethernet Controller (Copper)",
+"       1014 0269  iSeries 1000/100/10 Ethernet Adapter",
+"       1028 011c  PRO/1000 XT Network Connection",
+"       8086 1107  PRO/1000 XT Server Adapter",
+"       8086 2107  PRO/1000 XT Server Adapter",
+"       8086 2110  PRO/1000 XT Server Adapter",
+"       8086 3108  PRO/1000 XT Network Connection",
+"   1009  82544EI Gigabit Ethernet Controller (Fiber)",
+"       1014 0268  iSeries Gigabit Ethernet Adapter",
+"       8086 1109  PRO/1000 XF Server Adapter",
+"       8086 2109  PRO/1000 XF Server Adapter",
+"   100a  82540EM Gigabit Ethernet Controller",
+"   100c  82544GC Gigabit Ethernet Controller (Copper)",
+"       8086 1112  PRO/1000 T Desktop Adapter",
+"       8086 2112  PRO/1000 T Desktop Adapter",
+"   100d  82544GC Gigabit Ethernet Controller (LOM)",
+"       1028 0123  PRO/1000 XT Network Connection",
+"       1079 891f  82544GC Based Network Connection",
+"       4c53 1080  CT8 mainboard",
+"       8086 110d  82544GC Based Network Connection",
+"   100e  82540EM Gigabit Ethernet Controller",
+"       1014 0265  PRO/1000 MT Network Connection",
+"       1014 0267  PRO/1000 MT Network Connection",
+"       1014 026a  PRO/1000 MT Network Connection",
+"       1024 0134  Poweredge SC600",
+"       1028 002e  Optiplex GX260",
+"       1028 0151  PRO/1000 MT Network Connection",
+"       107b 8920  PRO/1000 MT Desktop Adapter",
+"       8086 001e  PRO/1000 MT Desktop Adapter",
+"       8086 002e  PRO/1000 MT Desktop Adapter",
+"       8086 1376  PRO/1000 GT Desktop Adapter",
+"       8086 1476  PRO/1000 GT Desktop Adapter",
+"   100f  82545EM Gigabit Ethernet Controller (Copper)",
+"       1014 0269  iSeries 1000/100/10 Ethernet Adapter",
+"       1014 028e  PRO/1000 MT Network Connection",
+"       8086 1000  PRO/1000 MT Network Connection",
+"       8086 1001  PRO/1000 MT Server Adapter",
+"   1010  82546EB Gigabit Ethernet Controller (Copper)",
+"       0e11 00db  NC7170 Gigabit Server Adapter",
+"       1014 027c  PRO/1000 MT Dual Port Network Adapter",
+"       18fb 7872  RESlink-X",
+"       1fc1 0026  Niagara 2260 Bypass Card",
+"       4c53 1080  CT8 mainboard",
+"       4c53 10a0  CA3/CR3 mainboard",
+"       8086 1011  PRO/1000 MT Dual Port Server Adapter",
+"       8086 1012  Primergy RX300",
+"       8086 101a  PRO/1000 MT Dual Port Network Adapter",
+"       8086 3424  SE7501HG2 Mainboard",
+"   1011  82545EM Gigabit Ethernet Controller (Fiber)",
+"       1014 0268  iSeries Gigabit Ethernet Adapter",
+"       8086 1002  PRO/1000 MF Server Adapter",
+"       8086 1003  PRO/1000 MF Server Adapter (LX)",
+"   1012  82546EB Gigabit Ethernet Controller (Fiber)",
+"       0e11 00dc  NC6170 Gigabit Server Adapter",
+"       8086 1012  PRO/1000 MF Dual Port Server Adapter",
+"   1013  82541EI Gigabit Ethernet Controller (Copper)",
+"       8086 0013  PRO/1000 MT Network Connection",
+"       8086 1013  IBM ThinkCentre Network Card",
+"       8086 1113  PRO/1000 MT Desktop Adapter",
+"   1014  82541ER Gigabit Ethernet Controller",
+"   1015  82540EM Gigabit Ethernet Controller (LOM)",
+"   1016  82540EP Gigabit Ethernet Controller (LOM)",
+"       1014 052c  PRO/1000 MT Mobile Connection",
+"       1179 0001  PRO/1000 MT Mobile Connection",
+"       8086 1016  PRO/1000 MT Mobile Connection",
+"   1017  82540EP Gigabit Ethernet Controller (LOM)",
+"       8086 1017  PR0/1000 MT Desktop Connection",
+"   1018  82541EI Gigabit Ethernet Controller",
+"       8086 1018  PRO/1000 MT Desktop Adapter",
+"   1019  82547EI Gigabit Ethernet Controller (LOM)",
+"       1458 1019  GA-8IPE1000 Pro2 motherboard (865PE)",
+"       1458 e000  Intel Gigabit Ethernet (Kenai II)",
+"       8086 1019  PRO/1000 CT Desktop Connection",
+"       8086 301f  D865PERL mainboard",
+"       8086 302c  Intel 82865G Mainboard (D865GBF)",
+"       8086 3427  S875WP1-E mainboard",
+"   101a  82547EI Gigabit Ethernet Controller (Mobile)",
+"   101d  82546EB Gigabit Ethernet Controller",
+"       8086 1000  PRO/1000 MT Quad Port Server Adapter",
+"   101e  82540EP Gigabit Ethernet Controller (Mobile)",
+"       1014 0549  PRO/1000 MT Mobile Connection",
+"       1179 0001  PRO/1000 MT Mobile Connection",
+"       8086 101e  PRO/1000 MT Mobile Connection",
+"   1026  82545GM Gigabit Ethernet Controller",
+"       1028 0169  Precision 470",
+"       8086 1000  PRO/1000 MT Server Connection",
+"       8086 1001  PRO/1000 MT Server Adapter",
+"       8086 1002  PRO/1000 MT Server Adapter",
+"       8086 1026  PRO/1000 MT Server Connection",
+"   1027  82545GM Gigabit Ethernet Controller",
+"       103c 3103  NC310F PCI-X Gigabit Server Adapter",
+"       8086 1001  PRO/1000 MF Server Adapter(LX)",
+"       8086 1002  PRO/1000 MF Server Adapter(LX)",
+"       8086 1003  PRO/1000 MF Server Adapter(LX)",
+"       8086 1027  PRO/1000 MF Server Adapter",
+"   1028  82545GM Gigabit Ethernet Controller",
+"       8086 1028  PRO/1000 MB Server Adapter",
+"   1029  82559 Ethernet Controller",
+"   1030  82559 InBusiness 10/100",
+"   1031  82801CAM (ICH3) PRO/100 VE (LOM) Ethernet Controller",
+"       1014 0209  ThinkPad A/T/X Series",
+"       104d 80e7  Vaio PCG-GR214EP/GR214MP/GR215MP/GR314MP/GR315MP",
+"       104d 813c  Vaio PCG-GRV616G",
+"       107b 5350  EtherExpress PRO/100 VE",
+"       1179 0001  EtherExpress PRO/100 VE",
+"       144d c000  EtherExpress PRO/100 VE",
+"       144d c001  EtherExpress PRO/100 VE",
+"       144d c003  EtherExpress PRO/100 VE",
+"       144d c006  vpr Matrix 170B4",
+"   1032  82801CAM (ICH3) PRO/100 VE Ethernet Controller",
+"   1033  82801CAM (ICH3) PRO/100 VM (LOM) Ethernet Controller",
+"   1034  82801CAM (ICH3) PRO/100 VM Ethernet Controller",
+"   1035  82801CAM (ICH3)/82562EH (LOM)  Ethernet Controller",
+"   1036  82801CAM (ICH3) 82562EH Ethernet Controller",
+"   1037  82801CAM (ICH3) Chipset Ethernet Controller",
+"   1038  82801CAM (ICH3) PRO/100 VM (KM) Ethernet Controller",
+"       0e11 0098  Evo N600c",
+"   1039  82801DB PRO/100 VE (LOM) Ethernet Controller",
+"       1014 0267  NetVista A30p",
+"   103a  82801DB PRO/100 VE (CNR) Ethernet Controller",
+"   103b  82801DB PRO/100 VM (LOM) Ethernet Controller",
+"   103c  82801DB PRO/100 VM (CNR) Ethernet Controller",
+"   103d  82801DB PRO/100 VE (MOB) Ethernet Controller",
+"   103e  82801DB PRO/100 VM (MOB) Ethernet Controller",
+"   1040  536EP Data Fax Modem",
+"       16be 1040  V.9X DSP Data Fax Modem",
+"   1043  PRO/Wireless LAN 2100 3B Mini PCI Adapter",
+"       8086 2527  MIM2000/Centrino",
+"   1048  PRO/10GbE LR Server Adapter",
+"       8086 a01f  PRO/10GbE LR Server Adapter",
+"       8086 a11f  PRO/10GbE LR Server Adapter",
+"   104b  Ethernet Controller",
+"   1050  82562EZ 10/100 Ethernet Controller",
+"       1462 728c  865PE Neo2 (MS-6728)",
+"       1462 758c  MS-6758 (875P Neo)",
+"       8086 3020  D865PERL mainboard",
+"       8086 302f  Desktop Board D865GBF",
+"       8086 3427  S875WP1-E mainboard",
+"   1051  82801EB/ER (ICH5/ICH5R) integrated LAN Controller",
+"   1052  PRO/100 VM Network Connection",
+"   1053  PRO/100 VM Network Connection",
+"   1059  82551QM Ethernet Controller",
+"   105e  82571EB Gigabit Ethernet Controller",
+"       1775 6003  Telum GE-QT",
+"   105f  82571EB Gigabit Ethernet Controller",
+"   1060  82571EB Gigabit Ethernet Controller",
+"   1064  82562ET/EZ/GT/GZ - PRO/100 VE (LOM) Ethernet Controller",
+"       1043 80f8  P5GD1-VW Mainboard",
+"   1065  82562ET/EZ/GT/GZ - PRO/100 VE Ethernet Controller",
+"   1066  82562 EM/EX/GX - PRO/100 VM (LOM) Ethernet Controller",
+"   1067  82562 EM/EX/GX - PRO/100 VM Ethernet Controller",
+"   1068  82562ET/EZ/GT/GZ - PRO/100 VE (LOM) Ethernet Controller Mobile",
+"   1069  82562EM/EX/GX - PRO/100 VM (LOM) Ethernet Controller Mobile",
+"   106a  82562G - PRO/100 VE (LOM) Ethernet Controller",
+"   106b  82562G - PRO/100 VE Ethernet Controller Mobile",
+"   1075  82547GI Gigabit Ethernet Controller",
+"       1028 0165  PowerEdge 750",
+"       8086 0075  PRO/1000 CT Network Connection",
+"       8086 1075  PRO/1000 CT Network Connection",
+"   1076  82541GI/PI Gigabit Ethernet Controller",
+"       1028 0165  PowerEdge 750",
+"       1028 019a  PowerEdge SC1425",
+"       8086 0076  PRO/1000 MT Network Connection",
+"       8086 1076  PRO/1000 MT Network Connection",
+"       8086 1176  PRO/1000 MT Desktop Adapter",
+"       8086 1276  PRO/1000 MT Desktop Adapter",
+"   1077  82541GI Gigabit Ethernet Controller",
+"       1179 0001  PRO/1000 MT Mobile Connection",
+"       8086 0077  PRO/1000 MT Mobile Connection",
+"       8086 1077  PRO/1000 MT Mobile Connection",
+"   1078  82541EI Gigabit Ethernet Controller",
+"       8086 1078  PRO/1000 MT Network Connection",
+"   1079  82546GB Gigabit Ethernet Controller",
+"       103c 12a6  HP Dual Port 1000Base-T [A9900A]",
+"       103c 12cf  HP Core Dual Port 1000Base-T [AB352A]",
+"       1fc1 0027  Niagara 2261 Failover NIC",
+"       4c53 1090  Cx9 / Vx9 mainboard",
+"       4c53 10b0  CL9 mainboard",
+"       8086 0079  PRO/1000 MT Dual Port Network Connection",
+"       8086 1079  PRO/1000 MT Dual Port Network Connection",
+"       8086 1179  PRO/1000 MT Dual Port Network Connection",
+"       8086 117a  PRO/1000 MT Dual Port Server Adapter",
+"   107a  82546GB Gigabit Ethernet Controller",
+"       103c 12a8  HP Dual Port 1000base-SX [A9899A]",
+"       8086 107a  PRO/1000 MF Dual Port Server Adapter",
+"       8086 127a  PRO/1000 MF Dual Port Server Adapter",
+"   107b  82546GB Gigabit Ethernet Controller",
+"       8086 007b  PRO/1000 MB Dual Port Server Connection",
+"       8086 107b  PRO/1000 MB Dual Port Server Connection",
+"   107c  82541PI Gigabit Ethernet Controller",
+"   107d  82572EI Gigabit Ethernet Controller",
+"   107e  82572EI Gigabit Ethernet Controller",
+"   107f  82572EI Gigabit Ethernet Controller",
+"   1080  FA82537EP 56K V.92 Data/Fax Modem PCI",
+"   1081  Enterprise Southbridge LAN Copper",
+"   1082  Enterprise Southbridge LAN fiber",
+"   1083  Enterprise Southbridge LAN SERDES",
+"   1084  Enterprise Southbridge IDE Redirection",
+"   1085  Enterprise Southbridge Serial Port Redirection",
+"   1086  Enterprise Southbridge IPMI/KCS0",
+"   1087  Enterprise Southbridge UHCI Redirection",
+"   1089  Enterprise Southbridge BT",
+"   108a  82546EB Gigabit Ethernet Controller",
+"   108b  82573V Gigabit Ethernet Controller (Copper)",
+"   108c  82573E Gigabit Ethernet Controller (Copper)",
+"   108e  82573E KCS (Active Management)",
+"   108f  Intel(R) Active Management Technology - SOL",
+"   1092  Intel(R) PRO/100 VE Network Connection",
+"   1096  PRO/1000 EB Network Connection with I/O Acceleration",
+"   1097  Enterprise Southbridge DPT LAN fiber",
+"   1098  PRO/1000 EB Backplane Connection with I/O Acceleration",
+"   1099  82546GB Quad Port Server Adapter",
+"   109a  82573L Gigabit Ethernet Controller",
+"       17aa 207e  Thinkpad X60s",
+"   109b  82546GB PRO/1000 GF Quad Port Server Adapter",
+"   10a0  82571EB PRO/1000 AT Quad Port Bypass Adapter",
+"   10a1  82571EB PRO/1000 AF Quad Port Bypass Adapter",
+"   10b0  82573L PRO/1000 PL Network Connection",
+"   10b2  82573V PRO/1000 PM Network Connection",
+"   10b3  82573E PRO/1000 PM Network Connection",
+"   10b4  82573L PRO/1000 PL Network Connection",
+"   10b5  82546GB PRO/1000 GT Quad Port Server Adapter",
+"       103c 3109  NC340T PCI-X Quad-port Gigabit Server Adapter",
+"   1107  PRO/1000 MF Server Adapter (LX)",
+"   1130  82815 815 Chipset Host Bridge and Memory Controller Hub",
+"       1025 1016  Travelmate 612 TX",
+"       1043 8027  TUSL2-C Mainboard",
+"       104d 80df  Vaio PCG-FX403",
+"       8086 4532  D815EEA2 mainboard",
+"       8086 4557  D815EGEW Mainboard",
+"   1131  82815 815 Chipset AGP Bridge",
+"   1132  82815 CGC [Chipset Graphics Controller]",
+"       1025 1016  Travelmate 612 TX",
+"       104d 80df  Vaio PCG-FX403",
+"       8086 4532  D815EEA2 Mainboard",
+"       8086 4541  D815EEA Motherboard",
+"       8086 4557  D815EGEW Mainboard",
+"   1161  82806AA PCI64 Hub Advanced Programmable Interrupt Controller",
+"       8086 1161  82806AA PCI64 Hub APIC",
+"   1162  Xscale 80200 Big Endian Companion Chip",
+"   1200  Intel IXP1200 Network Processor",
+"       172a 0000  AEP SSL Accelerator",
+"   1209  8255xER/82551IT Fast Ethernet Controller",
+"       4c53 1050  CT7 mainboard",
+"       4c53 1051  CE7 mainboard",
+"       4c53 1070  PC6 mainboard",
+"   1221  82092AA PCI to PCMCIA Bridge",
+"   1222  82092AA IDE Controller",
+"   1223  SAA7116",
+"   1225  82452KX/GX [Orion]",
+"   1226  82596 PRO/10 PCI",
+"   1227  82865 EtherExpress PRO/100A",
+"   1228  82556 EtherExpress PRO/100 Smart",
+"   1229  82557/8/9 [Ethernet Pro 100]",
+"       0e11 3001  82559 Fast Ethernet LOM with Alert on LAN*",
+"       0e11 3002  82559 Fast Ethernet LOM with Alert on LAN*",
+"       0e11 3003  82559 Fast Ethernet LOM with Alert on LAN*",
+"       0e11 3004  82559 Fast Ethernet LOM with Alert on LAN*",
+"       0e11 3005  82559 Fast Ethernet LOM with Alert on LAN*",
+"       0e11 3006  82559 Fast Ethernet LOM with Alert on LAN*",
+"       0e11 3007  82559 Fast Ethernet LOM with Alert on LAN*",
+"       0e11 b01e  NC3120 Fast Ethernet NIC",
+"       0e11 b01f  NC3122 Fast Ethernet NIC (dual port)",
+"       0e11 b02f  NC1120 Ethernet NIC",
+"       0e11 b04a  Netelligent 10/100TX NIC with Wake on LAN",
+"       0e11 b0c6  NC3161 Fast Ethernet NIC (embedded, WOL)",
+"       0e11 b0c7  NC3160 Fast Ethernet NIC (embedded)",
+"       0e11 b0d7  NC3121 Fast Ethernet NIC (WOL)",
+"       0e11 b0dd  NC3131 Fast Ethernet NIC (dual port)",
+"       0e11 b0de  NC3132 Fast Ethernet Module (dual port)",
+"       0e11 b0e1  NC3133 Fast Ethernet Module (100-FX)",
+"       0e11 b134  NC3163 Fast Ethernet NIC (embedded, WOL)",
+"       0e11 b13c  NC3162 Fast Ethernet NIC (embedded)",
+"       0e11 b144  NC3123 Fast Ethernet NIC (WOL)",
+"       0e11 b163  NC3134 Fast Ethernet NIC (dual port)",
+"       0e11 b164  NC3135 Fast Ethernet Upgrade Module (dual port)",
+"       0e11 b1a4  NC7131 Gigabit Server Adapter",
+"       1014 005c  82558B Ethernet Pro 10/100",
+"       1014 01bc  82559 Fast Ethernet LAN On Motherboard",
+"       1014 01f1  10/100 Ethernet Server Adapter",
+"       1014 01f2  10/100 Ethernet Server Adapter",
+"       1014 0207  Ethernet Pro/100 S",
+"       1014 0232  10/100 Dual Port Server Adapter",
+"       1014 023a  ThinkPad R30",
+"       1014 105c  Netfinity 10/100",
+"       1014 2205  ThinkPad A22p",
+"       1014 305c  10/100 EtherJet Management Adapter",
+"       1014 405c  10/100 EtherJet Adapter with Alert on LAN",
+"       1014 505c  10/100 EtherJet Secure Management Adapter",
+"       1014 605c  10/100 EtherJet Secure Management Adapter",
+"       1014 705c  10/100 Netfinity 10/100 Ethernet Security Adapter",
+"       1014 805c  10/100 Netfinity 10/100 Ethernet Security Adapter",
+"       1028 009b  PowerEdge 2500/2550",
+"       1028 00ce  PowerEdge 1400",
+"       1033 8000  PC-9821X-B06",
+"       1033 8016  PK-UG-X006",
+"       1033 801f  PK-UG-X006",
+"       1033 8026  PK-UG-X006",
+"       1033 8063  82559-based Fast Ethernet Adapter",
+"       1033 8064  82559-based Fast Ethernet Adapter",
+"       103c 10c0  NetServer 10/100TX",
+"       103c 10c3  NetServer 10/100TX",
+"       103c 10ca  NetServer 10/100TX",
+"       103c 10cb  NetServer 10/100TX",
+"       103c 10e3  NetServer 10/100TX",
+"       103c 10e4  NetServer 10/100TX",
+"       103c 1200  NetServer 10/100TX",
+"       108e 10cf  EtherExpress PRO/100(B)",
+"       10c3 1100  SmartEther100 SC1100",
+"       10cf 1115  8255x-based Ethernet Adapter (10/100)",
+"       10cf 1143  8255x-based Ethernet Adapter (10/100)",
+"       110a 008b  82551QM Fast Ethernet Multifuction PCI/CardBus Controller",
+"       1179 0001  8255x-based Ethernet Adapter (10/100)",
+"       1179 0002  PCI FastEther LAN on Docker",
+"       1179 0003  8255x-based Fast Ethernet",
+"       1259 2560  AT-2560 100",
+"       1259 2561  AT-2560 100 FX Ethernet Adapter",
+"       1266 0001  NE10/100 Adapter",
+"       13e9 1000  6221L-4U",
+"       144d 2501  SEM-2000 MiniPCI LAN Adapter",
+"       144d 2502  SEM-2100IL MiniPCI LAN Adapter",
+"       1668 1100  EtherExpress PRO/100B (TX) (MiniPCI Ethernet+Modem)",
+"       4c53 1080  CT8 mainboard",
+"       4c53 10e0  PSL09 PrPMC",
+"       8086 0001  EtherExpress PRO/100B (TX)",
+"       8086 0002  EtherExpress PRO/100B (T4)",
+"       8086 0003  EtherExpress PRO/10+",
+"       8086 0004  EtherExpress PRO/100 WfM",
+"       8086 0005  82557 10/100",
+"       8086 0006  82557 10/100 with Wake on LAN",
+"       8086 0007  82558 10/100 Adapter",
+"       8086 0008  82558 10/100 with Wake on LAN",
+"       8086 000a  EtherExpress PRO/100+ Management Adapter",
+"       8086 000b  EtherExpress PRO/100+",
+"       8086 000c  EtherExpress PRO/100+ Management Adapter",
+"       8086 000d  EtherExpress PRO/100+ Alert On LAN II* Adapter",
+"       8086 000e  EtherExpress PRO/100+ Management Adapter with Alert On LAN*",
+"       8086 000f  EtherExpress PRO/100 Desktop Adapter",
+"       8086 0010  EtherExpress PRO/100 S Management Adapter",
+"       8086 0011  EtherExpress PRO/100 S Management Adapter",
+"       8086 0012  EtherExpress PRO/100 S Advanced Management Adapter (D)",
+"       8086 0013  EtherExpress PRO/100 S Advanced Management Adapter (E)",
+"       8086 0030  EtherExpress PRO/100  Management Adapter with Alert On LAN* GC",
+"       8086 0031  EtherExpress PRO/100 Desktop Adapter",
+"       8086 0040  EtherExpress PRO/100 S Desktop Adapter",
+"       8086 0041  EtherExpress PRO/100 S Desktop Adapter",
+"       8086 0042  EtherExpress PRO/100 Desktop Adapter",
+"       8086 0050  EtherExpress PRO/100 S Desktop Adapter",
+"       8086 1009  EtherExpress PRO/100+ Server Adapter",
+"       8086 100c  EtherExpress PRO/100+ Server Adapter (PILA8470B)",
+"       8086 1012  EtherExpress PRO/100 S Server Adapter (D)",
+"       8086 1013  EtherExpress PRO/100 S Server Adapter (E)",
+"       8086 1015  EtherExpress PRO/100 S Dual Port Server Adapter",
+"       8086 1017  EtherExpress PRO/100+ Dual Port Server Adapter",
+"       8086 1030  EtherExpress PRO/100+ Management Adapter with Alert On LAN* G Server",
+"       8086 1040  EtherExpress PRO/100 S Server Adapter",
+"       8086 1041  EtherExpress PRO/100 S Server Adapter",
+"       8086 1042  EtherExpress PRO/100 Server Adapter",
+"       8086 1050  EtherExpress PRO/100 S Server Adapter",
+"       8086 1051  EtherExpress PRO/100 Server Adapter",
+"       8086 1052  EtherExpress PRO/100 Server Adapter",
+"       8086 10f0  EtherExpress PRO/100+ Dual Port Adapter",
+"       8086 2009  EtherExpress PRO/100 S Mobile Adapter",
+"       8086 200d  EtherExpress PRO/100 Cardbus",
+"       8086 200e  EtherExpress PRO/100 LAN+V90 Cardbus Modem",
+"       8086 200f  EtherExpress PRO/100 SR Mobile Adapter",
+"       8086 2010  EtherExpress PRO/100 S Mobile Combo Adapter",
+"       8086 2013  EtherExpress PRO/100 SR Mobile Combo Adapter",
+"       8086 2016  EtherExpress PRO/100 S Mobile Adapter",
+"       8086 2017  EtherExpress PRO/100 S Combo Mobile Adapter",
+"       8086 2018  EtherExpress PRO/100 SR Mobile Adapter",
+"       8086 2019  EtherExpress PRO/100 SR Combo Mobile Adapter",
+"       8086 2101  EtherExpress PRO/100 P Mobile Adapter",
+"       8086 2102  EtherExpress PRO/100 SP Mobile Adapter",
+"       8086 2103  EtherExpress PRO/100 SP Mobile Adapter",
+"       8086 2104  EtherExpress PRO/100 SP Mobile Adapter",
+"       8086 2105  EtherExpress PRO/100 SP Mobile Adapter",
+"       8086 2106  EtherExpress PRO/100 P Mobile Adapter",
+"       8086 2107  EtherExpress PRO/100 Network Connection",
+"       8086 2108  EtherExpress PRO/100 Network Connection",
+"       8086 2200  EtherExpress PRO/100 P Mobile Combo Adapter",
+"       8086 2201  EtherExpress PRO/100 P Mobile Combo Adapter",
+"       8086 2202  EtherExpress PRO/100 SP Mobile Combo Adapter",
+"       8086 2203  EtherExpress PRO/100+ MiniPCI",
+"       8086 2204  EtherExpress PRO/100+ MiniPCI",
+"       8086 2205  EtherExpress PRO/100 SP Mobile Combo Adapter",
+"       8086 2206  EtherExpress PRO/100 SP Mobile Combo Adapter",
+"       8086 2207  EtherExpress PRO/100 SP Mobile Combo Adapter",
+"       8086 2208  EtherExpress PRO/100 P Mobile Combo Adapter",
+"       8086 2402  EtherExpress PRO/100+ MiniPCI",
+"       8086 2407  EtherExpress PRO/100+ MiniPCI",
+"       8086 2408  EtherExpress PRO/100+ MiniPCI",
+"       8086 2409  EtherExpress PRO/100+ MiniPCI",
+"       8086 240f  EtherExpress PRO/100+ MiniPCI",
+"       8086 2410  EtherExpress PRO/100+ MiniPCI",
+"       8086 2411  EtherExpress PRO/100+ MiniPCI",
+"       8086 2412  EtherExpress PRO/100+ MiniPCI",
+"       8086 2413  EtherExpress PRO/100+ MiniPCI",
+"       8086 3000  82559 Fast Ethernet LAN on Motherboard",
+"       8086 3001  82559 Fast Ethernet LOM with Basic Alert on LAN*",
+"       8086 3002  82559 Fast Ethernet LOM with Alert on LAN II*",
+"       8086 3006  EtherExpress PRO/100 S Network Connection",
+"       8086 3007  EtherExpress PRO/100 S Network Connection",
+"       8086 3008  EtherExpress PRO/100 Network Connection",
+"       8086 3010  EtherExpress PRO/100 S Network Connection",
+"       8086 3011  EtherExpress PRO/100 S Network Connection",
+"       8086 3012  EtherExpress PRO/100 Network Connection",
+"       8086 3411  SDS2 Mainboard",
+"   122d  430FX - 82437FX TSC [Triton I]",
+"   122e  82371FB PIIX ISA [Triton I]",
+"   1230  82371FB PIIX IDE [Triton I]",
+"   1231  DSVD Modem",
+"   1234  430MX - 82371MX Mobile PCI I/O IDE Xcelerator (MPIIX)",
+"   1235  430MX - 82437MX Mob. System Ctrlr (MTSC) & 82438MX Data Path (MTDP)",
+"   1237  440FX - 82441FX PMC [Natoma]",
+"   1239  82371FB PIIX IDE Interface",
+"   123b  82380PB PCI to PCI Docking Bridge",
+"   123c  82380AB (MISA) Mobile PCI-to-ISA Bridge",
+"   123d  683053 Programmable Interrupt Device",
+"   123e  82466GX (IHPC) Integrated Hot-Plug Controller",
+"   123f  82466GX Integrated Hot-Plug Controller (IHPC)",
+"   1240  82752 (752) AGP Graphics Accelerator",
+"   124b  82380FB (MPCI2) Mobile Docking Controller",
+"   1250  430HX - 82439HX TXC [Triton II]",
+"   1360  82806AA PCI64 Hub PCI Bridge",
+"   1361  82806AA PCI64 Hub Controller (HRes)",
+"       8086 1361  82806AA PCI64 Hub Controller (HRes)",
+"       8086 8000  82806AA PCI64 Hub Controller (HRes)",
+"   1460  82870P2 P64H2 Hub PCI Bridge",
+"   1461  82870P2 P64H2 I/OxAPIC",
+"       15d9 3480  P4DP6",
+"       4c53 1090  Cx9/Vx9 mainboard",
+"   1462  82870P2 P64H2 Hot Plug Controller",
+"   1960  80960RP [i960RP Microprocessor]",
+"       101e 0431  MegaRAID 431 RAID Controller",
+"       101e 0438  MegaRAID 438 Ultra2 LVD RAID Controller",
+"       101e 0466  MegaRAID 466 Express Plus RAID Controller",
+"       101e 0467  MegaRAID 467 Enterprise 1500 RAID Controller",
+"       101e 0490  MegaRAID 490 Express 300 RAID Controller",
+"       101e 0762  MegaRAID 762 Express RAID Controller",
+"       101e 09a0  PowerEdge Expandable RAID Controller 2/SC",
+"       1028 0467  PowerEdge Expandable RAID Controller 2/DC",
+"       1028 1111  PowerEdge Expandable RAID Controller 2/SC",
+"       103c 03a2  MegaRAID",
+"       103c 10c6  MegaRAID 438, HP NetRAID-3Si",
+"       103c 10c7  MegaRAID T5, Integrated HP NetRAID",
+"       103c 10cc  MegaRAID, Integrated HP NetRAID",
+"       103c 10cd  HP NetRAID-1Si",
+"       105a 0000  SuperTrak",
+"       105a 2168  SuperTrak Pro",
+"       105a 5168  SuperTrak66/100",
+"       1111 1111  MegaRAID 466, PowerEdge Expandable RAID Controller 2/SC",
+"       1111 1112  PowerEdge Expandable RAID Controller 2/SC",
+"       113c 03a2  MegaRAID",
+"       e4bf 1010  CG1-RADIO",
+"       e4bf 1020  CU2-QUARTET",
+"       e4bf 1040  CU1-CHORUS",
+"       e4bf 3100  CX1-BAND",
+"   1962  80960RM [i960RM Microprocessor]",
+"       105a 0000  SuperTrak SX6000 I2O CPU",
+"   1a21  82840 840 (Carmel) Chipset Host Bridge (Hub A)",
+"   1a23  82840 840 (Carmel) Chipset AGP Bridge",
+"   1a24  82840 840 (Carmel) Chipset PCI Bridge (Hub B)",
+"   1a30  82845 845 (Brookdale) Chipset Host Bridge",
+"       1028 010e  Optiplex GX240",
+"   1a31  82845 845 (Brookdale) Chipset AGP Bridge",
+"   1a38  Server DMA Engine",
+"   1a48  PRO/10GbE SR Server Adapter",
+"   2410  82801AA ISA Bridge (LPC)",
+"   2411  82801AA IDE",
+"   2412  82801AA USB",
+"   2413  82801AA SMBus",
+"   2415  82801AA AC'97 Audio",
+"       1028 0095  Precision Workstation 220 Integrated Digital Audio",
+"       110a 0051  Activy 2xx",
+"       11d4 0040  SoundMAX Integrated Digital Audio",
+"       11d4 0048  SoundMAX Integrated Digital Audio",
+"       11d4 5340  SoundMAX Integrated Digital Audio",
+"       1734 1025  Activy 3xx",
+"   2416  82801AA AC'97 Modem",
+"   2418  82801AA PCI Bridge",
+"   2420  82801AB ISA Bridge (LPC)",
+"   2421  82801AB IDE",
+"   2422  82801AB USB",
+"   2423  82801AB SMBus",
+"   2425  82801AB AC'97 Audio",
+"       11d4 0040  SoundMAX Integrated Digital Audio",
+"       11d4 0048  SoundMAX Integrated Digital Audio",
+"   2426  82801AB AC'97 Modem",
+"   2428  82801AB PCI Bridge",
+"   2440  82801BA ISA Bridge (LPC)",
+"   2442  82801BA/BAM USB (Hub #1)",
+"       1014 01c6  Netvista A40/A40p",
+"       1025 1016  Travelmate 612 TX",
+"       1028 010e  Optiplex GX240",
+"       1043 8027  TUSL2-C Mainboard",
+"       104d 80df  Vaio PCG-FX403",
+"       147b 0507  TH7II-RAID",
+"       8086 4532  D815EEA2 mainboard",
+"       8086 4557  D815EGEW Mainboard",
+"   2443  82801BA/BAM SMBus",
+"       1014 01c6  Netvista A40/A40p",
+"       1025 1016  Travelmate 612 TX",
+"       1028 010e  Optiplex GX240",
+"       1043 8027  TUSL2-C Mainboard",
+"       104d 80df  Vaio PCG-FX403",
+"       147b 0507  TH7II-RAID",
+"       8086 4532  D815EEA2 mainboard",
+"       8086 4557  D815EGEW Mainboard",
+"   2444  82801BA/BAM USB (Hub #2)",
+"       1025 1016  Travelmate 612 TX",
+"       1028 010e  Optiplex GX240",
+"       1043 8027  TUSL2-C Mainboard",
+"       104d 80df  Vaio PCG-FX403",
+"       147b 0507  TH7II-RAID",
+"       8086 4532  D815EEA2 mainboard",
+"   2445  82801BA/BAM AC'97 Audio",
+"       0e11 0088  Evo D500",
+"       1014 01c6  Netvista A40/A40p",
+"       1025 1016  Travelmate 612 TX",
+"       104d 80df  Vaio PCG-FX403",
+"       1462 3370  STAC9721 AC",
+"       147b 0507  TH7II-RAID",
+"       8086 4557  D815EGEW Mainboard",
+"   2446  82801BA/BAM AC'97 Modem",
+"       1025 1016  Travelmate 612 TX",
+"       104d 80df  Vaio PCG-FX403",
+"   2448  82801 Mobile PCI Bridge",
+"       103c 099c  NX6110/NC6120",
+"       1734 1055  Amilo M1420",
+"   2449  82801BA/BAM/CA/CAM Ethernet Controller",
+"       0e11 0012  EtherExpress PRO/100 VM",
+"       0e11 0091  EtherExpress PRO/100 VE",
+"       1014 01ce  EtherExpress PRO/100 VE",
+"       1014 01dc  EtherExpress PRO/100 VE",
+"       1014 01eb  EtherExpress PRO/100 VE",
+"       1014 01ec  EtherExpress PRO/100 VE",
+"       1014 0202  EtherExpress PRO/100 VE",
+"       1014 0205  EtherExpress PRO/100 VE",
+"       1014 0217  EtherExpress PRO/100 VE",
+"       1014 0234  EtherExpress PRO/100 VE",
+"       1014 023d  EtherExpress PRO/100 VE",
+"       1014 0244  EtherExpress PRO/100 VE",
+"       1014 0245  EtherExpress PRO/100 VE",
+"       1014 0265  PRO/100 VE Desktop Connection",
+"       1014 0267  PRO/100 VE Desktop Connection",
+"       1014 026a  PRO/100 VE Desktop Connection",
+"       109f 315d  EtherExpress PRO/100 VE",
+"       109f 3181  EtherExpress PRO/100 VE",
+"       1179 ff01  PRO/100 VE Network Connection",
+"       1186 7801  EtherExpress PRO/100 VE",
+"       144d 2602  HomePNA 1M CNR",
+"       8086 3010  EtherExpress PRO/100 VE",
+"       8086 3011  EtherExpress PRO/100 VM",
+"       8086 3012  82562EH based Phoneline",
+"       8086 3013  EtherExpress PRO/100 VE",
+"       8086 3014  EtherExpress PRO/100 VM",
+"       8086 3015  82562EH based Phoneline",
+"       8086 3016  EtherExpress PRO/100 P Mobile Combo",
+"       8086 3017  EtherExpress PRO/100 P Mobile",
+"       8086 3018  EtherExpress PRO/100",
+"   244a  82801BAM IDE U100",
+"       1025 1016  Travelmate 612TX",
+"       104d 80df  Vaio PCG-FX403",
+"   244b  82801BA IDE U100",
+"       1014 01c6  Netvista A40/A40p",
+"       1028 010e  Optiplex GX240",
+"       1043 8027  TUSL2-C Mainboard",
+"       147b 0507  TH7II-RAID",
+"       8086 4532  D815EEA2 mainboard",
+"       8086 4557  D815EGEW Mainboard",
+"   244c  82801BAM ISA Bridge (LPC)",
+"   244e  82801 PCI Bridge",
+"       1014 0267  NetVista A30p",
+"   2450  82801E ISA Bridge (LPC)",
+"   2452  82801E USB",
+"   2453  82801E SMBus",
+"   2459  82801E Ethernet Controller 0",
+"   245b  82801E IDE U100",
+"   245d  82801E Ethernet Controller 1",
+"   245e  82801E PCI Bridge",
+"   2480  82801CA LPC Interface Controller",
+"   2482  82801CA/CAM USB (Hub #1)",
+"       0e11 0030  Evo N600c",
+"       1014 0220  ThinkPad A/T/X Series",
+"       104d 80e7  VAIO PCG-GR214EP/GR214MP/GR215MP/GR314MP/GR315MP",
+"       15d9 3480  P4DP6",
+"       8086 1958  vpr Matrix 170B4",
+"       8086 3424  SE7501HG2 Mainboard",
+"       8086 4541  Latitude C640",
+"   2483  82801CA/CAM SMBus Controller",
+"       1014 0220  ThinkPad A/T/X Series",
+"       104d 80e7  VAIO PCG-GR214EP/GR214MP/GR215MP/GR314MP/GR315MP",
+"       15d9 3480  P4DP6",
+"       8086 1958  vpr Matrix 170B4",
+"   2484  82801CA/CAM USB (Hub #2)",
+"       0e11 0030  Evo N600c",
+"       1014 0220  ThinkPad A/T/X Series",
+"       104d 80e7  VAIO PCG-GR214EP/GR214MP/GR215MP/GR314MP/GR315MP",
+"       15d9 3480  P4DP6",
+"       8086 1958  vpr Matrix 170B4",
+"   2485  82801CA/CAM AC'97 Audio Controller",
+"       1013 5959  Crystal WMD Audio Codec",
+"       1014 0222  ThinkPad T23 (2647-4MG) or A30/A30p (2652/2653)",
+"       1014 0508  ThinkPad T30",
+"       1014 051c  ThinkPad A/T/X Series",
+"       104d 80e7  VAIO PCG-GR214EP/GR214MP/GR215MP/GR314MP/GR315MP",
+"       144d c006  vpr Matrix 170B4",
+"   2486  82801CA/CAM AC'97 Modem Controller",
+"       1014 0223  ThinkPad A/T/X Series",
+"       1014 0503  ThinkPad R31 2656BBG",
+"       1014 051a  ThinkPad A/T/X Series",
+"       101f 1025  620 Series",
+"       104d 80e7  VAIO PCG-GR214EP/GR214MP/GR215MP/GR314MP/GR315MP",
+"       134d 4c21  Dell Inspiron 2100 internal modem",
+"       144d 2115  vpr Matrix 170B4 internal modem",
+"       14f1 5421  MD56ORD V.92 MDC Modem",
+"   2487  82801CA/CAM USB (Hub #3)",
+"       0e11 0030  Evo N600c",
+"       1014 0220  ThinkPad A/T/X Series",
+"       104d 80e7  VAIO PCG-GR214EP/GR214MP/GR215MP/GR314MP/GR315MP",
+"       15d9 3480  P4DP6",
+"       8086 1958  vpr Matrix 170B4",
+"   248a  82801CAM IDE U100",
+"       0e11 0030  Evo N600c",
+"       1014 0220  ThinkPad A/T/X Series",
+"       104d 80e7  VAIO PCG-GR214EP/GR214MP/GR215MP/GR314MP/GR315MP",
+"       8086 1958  vpr Matrix 170B4",
+"       8086 4541  Latitude C640",
+"   248b  82801CA Ultra ATA Storage Controller",
+"       15d9 3480  P4DP6",
+"   248c  82801CAM ISA Bridge (LPC)",
+"   24c0  82801DB/DBL (ICH4/ICH4-L) LPC Interface Bridge",
+"       1014 0267  NetVista A30p",
+"       1462 5800  845PE Max (MS-6580)",
+"   24c1  82801DBL (ICH4-L) IDE Controller",
+"   24c2  82801DB/DBL/DBM (ICH4/ICH4-L/ICH4-M) USB UHCI Controller #1",
+"       1014 0267  NetVista A30p",
+"       1025 005a  TravelMate 290",
+"       1028 0126  Optiplex GX260",
+"       1028 0163  Latitude D505",
+"       1028 0196  Inspiron 5160",
+"       103c 088c  NC8000 laptop",
+"       103c 0890  NC6000 laptop",
+"       1071 8160  MIM2000",
+"       1462 5800  845PE Max (MS-6580)",
+"       1509 2990  Averatec 5110H laptop",
+"       1734 1004  D1451 Mainboard (SCENIC N300, i845GV)",
+"       1734 1055  Amilo M1420",
+"       4c53 1090  Cx9 / Vx9 mainboard",
+"       8086 4541  Latitude D400",
+"   24c3  82801DB/DBL/DBM (ICH4/ICH4-L/ICH4-M) SMBus Controller",
+"       1014 0267  NetVista A30p",
+"       1025 005a  TravelMate 290",
+"       1028 0126  Optiplex GX260",
+"       103c 088c  NC8000 laptop",
+"       103c 0890  NC6000 laptop",
+"       1071 8160  MIM2000",
+"       1458 24c2  GA-8PE667 Ultra",
+"       1462 5800  845PE Max (MS-6580)",
+"       1734 1004  D1451 Mainboard (SCENIC N300, i845GV)",
+"       1734 1055  Amilo M1420",
+"       4c53 1090  Cx9 / Vx9 mainboard",
+"   24c4  82801DB/DBL/DBM (ICH4/ICH4-L/ICH4-M) USB UHCI Controller #2",
+"       1014 0267  NetVista A30p",
+"       1025 005a  TravelMate 290",
+"       1028 0126  Optiplex GX260",
+"       1028 0163  Latitude D505",
+"       1028 0196  Inspiron 5160",
+"       103c 088c  NC8000 laptop",
+"       103c 0890  NC6000 laptop",
+"       1071 8160  MIM2000",
+"       1462 5800  845PE Max (MS-6580)",
+"       1509 2990  Averatec 5110H",
+"       1734 1004  D1451 Mainboard (SCENIC N300, i845GV)",
+"       4c53 1090  Cx9 / Vx9 mainboard",
+"       8086 4541  Latitude D400",
+"   24c5  82801DB/DBL/DBM (ICH4/ICH4-L/ICH4-M) AC'97 Audio Controller",
+"       0e11 00b8  Analog Devices Inc. codec [SoundMAX]",
+"       1014 0267  NetVista A30p",
+"       1025 005a  TravelMate 290",
+"       1028 0139  Latitude D400",
+"       1028 0163  Latitude D505",
+"       1028 0196  Inspiron 5160",
+"       103c 088c  NC8000 laptop",
+"       103c 0890  NC6000 laptop",
+"       1071 8160  MIM2000",
+"       1458 a002  GA-8PE667 Ultra",
+"       1462 5800  845PE Max (MS-6580)",
+"       1734 1005  D1451 (SCENIC N300, i845GV) Sigmatel STAC9750T",
+"       1734 1055  Amilo M1420",
+"   24c6  82801DB/DBL/DBM (ICH4/ICH4-L/ICH4-M) AC'97 Modem Controller",
+"       1025 003c  Aspire 2001WLCi (Compal CL50 motherboard) implementation",
+"       1025 005a  TravelMate 290",
+"       1028 0196  Inspiron 5160",
+"       103c 088c  NC8000 laptop",
+"       103c 0890  NC6000 laptop",
+"       1071 8160  MIM2000",
+"   24c7  82801DB/DBL/DBM (ICH4/ICH4-L/ICH4-M) USB UHCI Controller #3",
+"       1014 0267  NetVista A30p",
+"       1025 005a  TravelMate 290",
+"       1028 0126  Optiplex GX260",
+"       1028 0163  Latitude D505",
+"       1028 0196  Inspiron 5160",
+"       103c 088c  NC8000 laptop",
+"       103c 0890  NC6000 laptop",
+"       1071 8160  MIM2000",
+"       1462 5800  845PE Max (MS-6580)",
+"       1509 2990  Averatec 5110H",
+"       1734 1004  D1451 Mainboard (SCENIC N300, i845GV)",
+"       4c53 1090  Cx9 / Vx9 mainboard",
+"       8086 4541  Latitude D400",
+"   24ca  82801DBM (ICH4-M) IDE Controller",
+"       1025 005a  TravelMate 290",
+"       1028 0163  Latitude D505",
+"       1028 0196  Inspiron 5160",
+"       103c 088c  NC8000 laptop",
+"       103c 0890  NC6000 laptop",
+"       1071 8160  MIM2000",
+"       1734 1055  Amilo M1420",
+"       8086 4541  Latitude D400",
+"   24cb  82801DB (ICH4) IDE Controller",
+"       1014 0267  NetVista A30p",
+"       1028 0126  Optiplex GX260",
+"       1458 24c2  GA-8PE667 Ultra",
+"       1462 5800  845PE Max (MS-6580)",
+"       1734 1004  D1451 Mainboard (SCENIC N300, i845GV)",
+"       4c53 1090  Cx9 / Vx9 mainboard",
+"   24cc  82801DBM (ICH4-M) LPC Interface Bridge",
+"       1734 1055  Amilo M1420",
+"   24cd  82801DB/DBM (ICH4/ICH4-M) USB2 EHCI Controller",
+"       1014 0267  NetVista A30p",
+"       1025 005a  TravelMate 290",
+"       1028 011d  Latitude D600",
+"       1028 0126  Optiplex GX260",
+"       1028 0139  Latitude D400",
+"       1028 0163  Latitude D505",
+"       1028 0196  Inspiron 5160",
+"       103c 088c  NC8000 laptop",
+"       103c 0890  NC6000 laptop",
+"       1071 8160  MIM2000",
+"       1462 3981  845PE Max (MS-6580)",
+"       1509 1968  Averatec 5110H",
+"       1734 1004  D1451 Mainboard (SCENIC N300, i845GV)",
+"       1734 1055  Amilo M1420",
+"       4c53 1090  Cx9 / Vx9 mainboard",
+"   24d0  82801EB/ER (ICH5/ICH5R) LPC Interface Bridge",
+"   24d1  82801EB (ICH5) SATA Controller",
+"       1028 0169  Precision 470",
+"       1028 019a  PowerEdge SC1425",
+"       103c 12bc  d530 CMT (DG746A)",
+"       1043 80a6  P4P800 SE Mainboard",
+"       1458 24d1  GA-8IPE1000 Pro2 motherboard (865PE)",
+"       1462 7280  865PE Neo2 (MS-6728)",
+"       15d9 4580  P4SCE Mainboard",
+"       8086 3427  S875WP1-E mainboard",
+"       8086 4246  Desktop Board D865GBF",
+"       8086 524c  D865PERL mainboard",
+"   24d2  82801EB/ER (ICH5/ICH5R) USB UHCI Controller #1",
+"       1014 02ed  xSeries server mainboard",
+"       1028 0169  Precision 470",
+"       1028 0183  PowerEdge 1800",
+"       1028 019a  PowerEdge SC1425",
+"       103c 006a  NX9500",
+"       103c 12bc  d530 CMT (DG746A)",
+"       1043 80a6  P5P800-MX Mainboard",
+"       1458 24d2  GA-8IPE1000/8KNXP motherboard",
+"       1462 7280  865PE Neo2 (MS-6728)",
+"       15d9 4580  P4SCE Mainboard",
+"       1734 101c  Primergy RX300 S2",
+"       8086 3427  S875WP1-E mainboard",
+"       8086 4246  Desktop Board D865GBF",
+"       8086 524c  D865PERL mainboard",
+"   24d3  82801EB/ER (ICH5/ICH5R) SMBus Controller",
+"       1014 02ed  xSeries server mainboard",
+"       1028 0156  Precision 360",
+"       1028 0169  Precision 470",
+"       1043 80a6  P4P800 Mainboard",
+"       1458 24d2  GA-8IPE1000 Pro2 motherboard (865PE)",
+"       1462 7280  865PE Neo2 (MS-6728)",
+"       15d9 4580  P4SCE Mainboard",
+"       1734 101c  Primergy RX300 S2",
+"       8086 3427  S875WP1-E mainboard",
+"       8086 4246  Desktop Board D865GBF",
+"       8086 524c  D865PERL mainboard",
+"   24d4  82801EB/ER (ICH5/ICH5R) USB UHCI Controller #2",
+"       1014 02ed  xSeries server mainboard",
+"       1028 0169  Precision 470",
+"       1028 0183  PowerEdge 1800",
+"       1028 019a  PowerEdge SC1425",
+"       103c 006a  NX9500",
+"       103c 12bc  d530 CMT (DG746A)",
+"       1043 80a6  P5P800-MX Mainboard",
+"       1458 24d2  GA-8IPE1000 Pro2 motherboard (865PE)",
+"       1462 7280  865PE Neo2 (MS-6728)",
+"       15d9 4580  P4SCE Mainboard",
+"       1734 101c  Primergy RX300 S2",
+"       8086 3427  S875WP1-E mainboard",
+"       8086 4246  Desktop Board D865GBF",
+"       8086 524c  D865PERL mainboard",
+"   24d5  82801EB/ER (ICH5/ICH5R) AC'97 Audio Controller",
+"       1028 0169  Precision 470",
+"       103c 006a  NX9500",
+"       103c 12bc  d330 uT",
+"       1043 80f3  P4P800 Mainboard",
+"       1043 810f  P5P800-MX Mainboard",
+"       1458 a002  GA-8IPE1000/8KNXP motherboard",
+"       1462 0080  65PE Neo2-V (MS-6788) mainboard",
+"       1462 7280  865PE Neo2 (MS-6728)",
+"       8086 a000  D865PERL mainboard",
+"       8086 e000  D865PERL mainboard",
+"       8086 e001  Desktop Board D865GBF",
+"   24d6  82801EB/ER (ICH5/ICH5R) AC'97 Modem Controller",
+"       103c 006a  NX9500",
+"   24d7  82801EB/ER (ICH5/ICH5R) USB UHCI Controller #3",
+"       1014 02ed  xSeries server mainboard",
+"       1028 0169  Precision 470",
+"       1028 0183  PowerEdge 1800",
+"       103c 006a  NX9500",
+"       103c 12bc  d530 CMT (DG746A)",
+"       1043 80a6  P5P800-MX Mainboard",
+"       1458 24d2  GA-8IPE1000 Pro2 motherboard (865PE)",
+"       1462 7280  865PE Neo2 (MS-6728)",
+"       15d9 4580  P4SCE Mainboard",
+"       1734 101c  Primergy RX300 S2",
+"       8086 3427  S875WP1-E mainboard",
+"       8086 4246  Desktop Board D865GBF",
+"       8086 524c  D865PERL mainboard",
+"   24db  82801EB/ER (ICH5/ICH5R) IDE Controller",
+"       1014 02ed  xSeries server mainboard",
+"       1028 0169  Precision 470",
+"       1028 019a  PowerEdge SC1425",
+"       103c 006a  NX9500",
+"       103c 12bc  d530 CMT (DG746A)",
+"       1043 80a6  P5P800-MX Mainboard",
+"       1458 24d2  GA-8IPE1000 Pro2 motherboard (865PE)",
+"       1462 7280  865PE Neo2 (MS-6728)",
+"       1462 7580  MSI 875P",
+"       15d9 4580  P4SCE Mainboard",
+"       1734 101c  Primergy RX300 S2",
+"       8086 24db  P4C800 Mainboard",
+"       8086 3427  S875WP1-E mainboard",
+"       8086 4246  Desktop Board D865GBF",
+"       8086 524c  D865PERL mainboard",
+"   24dc  82801EB (ICH5) LPC Interface Bridge",
+"   24dd  82801EB/ER (ICH5/ICH5R) USB2 EHCI Controller",
+"       1014 02ed  xSeries server mainboard",
+"       1028 0169  Precision 470",
+"       1028 0183  PowerEdge 1800",
+"       1028 019a  PowerEdge SC1425",
+"       103c 006a  NX9500",
+"       103c 12bc  d530 CMT (DG746A)",
+"       1043 80a6  P5P800-MX Mainboard",
+"       1458 5006  GA-8IPE1000 Pro2 motherboard (865PE)",
+"       1462 7280  865PE Neo2 (MS-6728)",
+"       8086 3427  S875WP1-E mainboard",
+"       8086 4246  Desktop Board D865GBF",
+"       8086 524c  D865PERL mainboard",
+"   24de  82801EB/ER (ICH5/ICH5R) USB UHCI Controller #4",
+"       1014 02ed  xSeries server mainboard",
+"       1028 0169  Precision 470",
+"       1043 80a6  P5P800-MX Mainboard",
+"       1458 24d2  GA-8IPE1000 Pro2 motherboard (865PE)",
+"       1462 7280  865PE Neo2 (MS-6728)",
+"       15d9 4580  P4SCE Mainboard",
+"       1734 101c  Primergy RX300 S2",
+"       8086 3427  S875WP1-E mainboard",
+"       8086 4246  Desktop Board D865GBF",
+"       8086 524c  D865PERL mainboard",
+"   24df  82801ER (ICH5R) SATA Controller",
+"   2500  82820 820 (Camino) Chipset Host Bridge (MCH)",
+"       1028 0095  Precision Workstation 220 Chipset",
+"       1043 801c  P3C-2000 system chipset",
+"   2501  82820 820 (Camino) Chipset Host Bridge (MCH)",
+"       1043 801c  P3C-2000 system chipset",
+"   250b  82820 820 (Camino) Chipset Host Bridge",
+"   250f  82820 820 (Camino) Chipset AGP Bridge",
+"   2520  82805AA MTH Memory Translator Hub",
+"   2521  82804AA MRH-S Memory Repeater Hub for SDRAM",
+"   2530  82850 850 (Tehama) Chipset Host Bridge (MCH)",
+"       147b 0507  TH7II-RAID",
+"   2531  82860 860 (Wombat) Chipset Host Bridge (MCH)",
+"   2532  82850 850 (Tehama) Chipset AGP Bridge",
+"   2533  82860 860 (Wombat) Chipset AGP Bridge",
+"   2534  82860 860 (Wombat) Chipset PCI Bridge",
+"   2540  E7500 Memory Controller Hub",
+"       15d9 3480  P4DP6",
+"   2541  E7500/E7501 Host RASUM Controller",
+"       15d9 3480  P4DP6",
+"       4c53 1090  Cx9 / Vx9 mainboard",
+"       8086 3424  SE7501HG2 Mainboard",
+"   2543  E7500/E7501 Hub Interface B PCI-to-PCI Bridge",
+"   2544  E7500/E7501 Hub Interface B RASUM Controller",
+"       4c53 1090  Cx9 / Vx9 mainboard",
+"   2545  E7500/E7501 Hub Interface C PCI-to-PCI Bridge",
+"   2546  E7500/E7501 Hub Interface C RASUM Controller",
+"   2547  E7500/E7501 Hub Interface D PCI-to-PCI Bridge",
+"   2548  E7500/E7501 Hub Interface D RASUM Controller",
+"   254c  E7501 Memory Controller Hub",
+"       4c53 1090  Cx9 / Vx9 mainboard",
+"       8086 3424  SE7501HG2 Mainboard",
+"   2550  E7505 Memory Controller Hub",
+"   2551  E7505/E7205 Series RAS Controller",
+"   2552  E7505/E7205 PCI-to-AGP Bridge",
+"   2553  E7505 Hub Interface B PCI-to-PCI Bridge",
+"   2554  E7505 Hub Interface B PCI-to-PCI Bridge RAS Controller",
+"   255d  E7205 Memory Controller Hub",
+"   2560  82845G/GL[Brookdale-G]/GE/PE DRAM Controller/Host-Hub Interface",
+"       1028 0126  Optiplex GX260",
+"       1458 2560  GA-8PE667 Ultra",
+"       1462 5800  845PE Max (MS-6580)",
+"   2561  82845G/GL[Brookdale-G]/GE/PE Host-to-AGP Bridge",
+"   2562  82845G/GL[Brookdale-G]/GE Chipset Integrated Graphics Device",
+"       0e11 00b9  Evo D510 SFF",
+"       1014 0267  NetVista A30p",
+"       1734 1004  D1451 Mainboard (SCENIC N300, i845GV)",
+"   2570  82865G/PE/P DRAM Controller/Host-Hub Interface",
+"       103c 006a  NX9500",
+"       1043 80f2  P5P800-MX Mainboard",
+"       1458 2570  GA-8IPE1000 Pro2 motherboard (865PE)",
+"   2571  82865G/PE/P PCI to AGP Controller",
+"   2572  82865G Integrated Graphics Controller",
+"       1028 019d  Dimension 3000",
+"       103c 12bc  D530 sff(dc578av)",
+"       1043 80a5  P5P800-MX Mainboard",
+"       8086 4246  Desktop Board D865GBF",
+"   2573  82865G/PE/P PCI to CSA Bridge",
+"   2576  82865G/PE/P Processor to I/O Memory Interface",
+"   2578  82875P/E7210 Memory Controller Hub",
+"       1458 2578  GA-8KNXP motherboard (875P)",
+"       1462 7580  MS-6758 (875P Neo)",
+"       15d9 4580  P4SCE Motherboard",
+"   2579  82875P Processor to AGP Controller",
+"   257b  82875P/E7210 Processor to PCI to CSA Bridge",
+"   257e  82875P/E7210 Processor to I/O Memory Interface",
+"   2580  915G/P/GV/GL/PL/910GL Express Memory Controller Hub",
+"       1458 2580  GA-8I915ME-G Mainboard",
+"       1462 7028  915P/G Neo2",
+"       1734 105b  Scenic W620",
+"   2581  915G/P/GV/GL/PL/910GL Express PCI Express Root Port",
+"   2582  82915G/GV/910GL Express Chipset Family Graphics Controller",
+"       1028 1079  Optiplex GX280",
+"       103c 3006  DC7100 SFF(DX878AV)",
+"       1043 2582  P5GD1-VW Mainboard",
+"       1458 2582  GA-8I915ME-G Mainboard",
+"       1734 105b  Scenic W620",
+"   2584  925X/XE Express Memory Controller Hub",
+"   2585  925X/XE Express PCI Express Root Port",
+"   2588  E7220/E7221 Memory Controller Hub",
+"   2589  E7220/E7221 PCI Express Root Port",
+"   258a  E7221 Integrated Graphics Controller",
+"   2590  Mobile 915GM/PM/GMS/910GML Express Processor to DRAM Controller",
+"       1028 0182  Dell Latidude C610",
+"       103c 099c  NX6110/NC6120",
+"       a304 81b7  Vaio VGN-S3XP",
+"   2591  Mobile 915GM/PM Express PCI Express Root Port",
+"   2592  Mobile 915GM/GMS/910GML Express Graphics Controller",
+"       103c 099c  NX6110/NC6120",
+"       103c 308a  NC6220",
+"       1043 1881  GMA 900 915GM Integrated Graphics",
+"   25a1  6300ESB LPC Interface Controller",
+"   25a2  6300ESB PATA Storage Controller",
+"       4c53 10b0  CL9 mainboard",
+"       4c53 10e0  PSL09 PrPMC",
+"   25a3  6300ESB SATA Storage Controller",
+"       4c53 10b0  CL9 mainboard",
+"       4c53 10d0  Telum ASLP10 Processor AMC",
+"       4c53 10e0  PSL09 PrPMC",
+"   25a4  6300ESB SMBus Controller",
+"       4c53 10b0  CL9 mainboard",
+"       4c53 10d0  Telum ASLP10 Processor AMC",
+"       4c53 10e0  PSL09 PrPMC",
+"   25a6  6300ESB AC'97 Audio Controller",
+"       4c53 10b0  CL9 mainboard",
+"   25a7  6300ESB AC'97 Modem Controller",
+"   25a9  6300ESB USB Universal Host Controller",
+"       4c53 10b0  CL9 mainboard",
+"       4c53 10d0  Telum ASLP10 Processor AMC",
+"       4c53 10e0  PSL09 PrPMC",
+"   25aa  6300ESB USB Universal Host Controller",
+"       4c53 10b0  CL9 mainboard",
+"       4c53 10e0  PSL09 PrPMC",
+"   25ab  6300ESB Watchdog Timer",
+"       4c53 10b0  CL9 mainboard",
+"       4c53 10d0  Telum ASLP10 Processor AMC",
+"       4c53 10e0  PSL09 PrPMC",
+"   25ac  6300ESB I/O Advanced Programmable Interrupt Controller",
+"       4c53 10b0  CL9 mainboard",
+"       4c53 10d0  Telum ASLP10 Processor AMC",
+"       4c53 10e0  PSL09 PrPMC",
+"   25ad  6300ESB USB2 Enhanced Host Controller",
+"       4c53 10b0  CL9 mainboard",
+"       4c53 10d0  Telum ASLP10 Processor AMC",
+"       4c53 10e0  PSL09 PrPMC",
+"   25ae  6300ESB 64-bit PCI-X Bridge",
+"   25b0  6300ESB SATA RAID Controller",
+"       4c53 10d0  Telum ASLP10 Processor AMC",
+"       4c53 10e0  PSL09 PrPMC",
+"   25c0  Workstation Memory Controller Hub",
+"   25d0  Server Memory Controller Hub",
+"   25d4  Server Memory Contoller Hub",
+"   25d8  Server Memory Controller Hub",
+"   25e2  Server PCI Express x4 Port 2",
+"   25e3  Server PCI Express x4 Port 3",
+"   25e4  Server PCI Express x4 Port 4",
+"   25e5  Server PCI Express x4 Port 5",
+"   25e6  Server PCI Express x4 Port 6",
+"   25e7  Server PCI Express x4 Port 7",
+"   25e8  Server AMB Memory Mapped Registers",
+"   25f0  Server Error Reporting Registers",
+"   25f1  Reserved Registers",
+"   25f3  Reserved Registers",
+"   25f5  Server FBD Registers",
+"   25f6  Server FBD Registers",
+"   25f7  Server PCI Express x8 Port 2-3",
+"   25f8  Server PCI Express x8 Port 4-5",
+"   25f9  Server PCI Express x8 Port 6-7",
+"   25fa  Server PCI Express x16 Port 4-7",
+"   2600  E8500/E8501 Hub Interface 1.5",
+"   2601  E8500/E8501 PCI Express x4 Port D",
+"   2602  E8500/E8501 PCI Express x4 Port C0",
+"   2603  E8500/E8501 PCI Express x4 Port C1",
+"   2604  E8500/E8501 PCI Express x4 Port B0",
+"   2605  E8500/E8501 PCI Express x4 Port B1",
+"   2606  E8500/E8501 PCI Express x4 Port A0",
+"   2607  E8500/E8501 PCI Express x4 Port A1",
+"   2608  E8500/E8501 PCI Express x8 Port C",
+"   2609  E8500/E8501 PCI Express x8 Port B",
+"   260a  E8500/E8501 PCI Express x8 Port A",
+"   260c  E8500/E8501 IMI Registers",
+"   2610  E8500/E8501 Front Side Bus, Boot, and Interrupt Registers",
+"   2611  E8500/E8501 Address Mapping Registers",
+"   2612  E8500/E8501 RAS Registers",
+"   2613  E8500/E8501 Reserved Registers",
+"   2614  E8500/E8501 Reserved Registers",
+"   2615  E8500/E8501 Miscellaneous Registers",
+"   2617  E8500/E8501 Reserved Registers",
+"   2618  E8500/E8501 Reserved Registers",
+"   2619  E8500/E8501 Reserved Registers",
+"   261a  E8500/E8501 Reserved Registers",
+"   261b  E8500/E8501 Reserved Registers",
+"   261c  E8500/E8501 Reserved Registers",
+"   261d  E8500/E8501 Reserved Registers",
+"   261e  E8500/E8501 Reserved Registers",
+"   2620  E8500/E8501 eXternal Memory Bridge",
+"   2621  E8500/E8501 XMB Miscellaneous Registers",
+"   2622  E8500/E8501 XMB Memory Interleaving Registers",
+"   2623  E8500/E8501 XMB DDR Initialization and Calibration",
+"   2624  E8500/E8501 XMB Reserved Registers",
+"   2625  E8500/E8501 XMB Reserved Registers",
+"   2626  E8500/E8501 XMB Reserved Registers",
+"   2627  E8500/E8501 XMB Reserved Registers",
+"   2640  82801FB/FR (ICH6/ICH6R) LPC Interface Bridge",
+"       1462 7028  915P/G Neo2",
+"       1734 105c  Scenic W620",
+"   2641  82801FBM (ICH6M) LPC Interface Bridge",
+"       103c 099c  NX6110/NC6120",
+"   2642  82801FW/FRW (ICH6W/ICH6RW) LPC Interface Bridge",
+"   2651  82801FB/FW (ICH6/ICH6W) SATA Controller",
+"       1028 0179  Optiplex GX280",
+"       1043 2601  P5GD1-VW Mainboard",
+"       1734 105c  Scenic W620",
+"       8086 4147  D915GAG Motherboard",
+"   2652  82801FR/FRW (ICH6R/ICH6RW) SATA Controller",
+"       1462 7028  915P/G Neo2",
+"   2653  82801FBM (ICH6M) SATA Controller",
+"   2658  82801FB/FBM/FR/FW/FRW (ICH6 Family) USB UHCI #1",
+"       1028 0179  Optiplex GX280",
+"       103c 099c  NX6110/NC6120",
+"       1043 80a6  P5GD1-VW Mainboard",
+"       1458 2558  GA-8I915ME-G Mainboard",
+"       1462 7028  915P/G Neo2",
+"       1734 105c  Scenic W620",
+"   2659  82801FB/FBM/FR/FW/FRW (ICH6 Family) USB UHCI #2",
+"       1028 0179  Optiplex GX280",
+"       103c 099c  NX6110/NC6120",
+"       1043 80a6  P5GD1-VW Mainboard",
+"       1458 2659  GA-8I915ME-G Mainboard",
+"       1462 7028  915P/G Neo2",
+"       1734 105c  Scenic W620",
+"   265a  82801FB/FBM/FR/FW/FRW (ICH6 Family) USB UHCI #3",
+"       1028 0179  Optiplex GX280",
+"       103c 099c  NX6110/NC6120",
+"       1043 80a6  P5GD1-VW Mainboard",
+"       1458 265a  GA-8I915ME-G Mainboard",
+"       1462 7028  915P/G Neo2",
+"       1734 105c  Scenic W620",
+"   265b  82801FB/FBM/FR/FW/FRW (ICH6 Family) USB UHCI #4",
+"       1028 0179  Optiplex GX280",
+"       103c 099c  NX6110/NC6120",
+"       1043 80a6  P5GD1-VW Mainboard",
+"       1458 265a  GA-8I915ME-G Mainboard",
+"       1462 7028  915P/G Neo2",
+"       1734 105c  Scenic W620",
+"   265c  82801FB/FBM/FR/FW/FRW (ICH6 Family) USB2 EHCI Controller",
+"       1028 0179  Optiplex GX280",
+"       103c 099c  NX6110/NC6120",
+"       1043 80a6  P5GD1-VW Mainboard",
+"       1458 5006  GA-8I915ME-G Mainboard",
+"       1462 7028  915P/G Neo2",
+"       1734 105c  Scenic W620",
+"   2660  82801FB/FBM/FR/FW/FRW (ICH6 Family) PCI Express Port 1",
+"       103c 099c  NX6110/NC6120",
+"   2662  82801FB/FBM/FR/FW/FRW (ICH6 Family) PCI Express Port 2",
+"   2664  82801FB/FBM/FR/FW/FRW (ICH6 Family) PCI Express Port 3",
+"   2666  82801FB/FBM/FR/FW/FRW (ICH6 Family) PCI Express Port 4",
+"   2668  82801FB/FBM/FR/FW/FRW (ICH6 Family) High Definition Audio Controller",
+"       1043 814e  P5GD1-VW Mainboard",
+"   266a  82801FB/FBM/FR/FW/FRW (ICH6 Family) SMBus Controller",
+"       1028 0179  Optiplex GX280",
+"       1043 80a6  P5GD1-VW Mainboard",
+"       1458 266a  GA-8I915ME-G Mainboard",
+"       1462 7028  915P/G Neo2",
+"       1734 105c  Scenic W620",
+"   266c  82801FB/FBM/FR/FW/FRW (ICH6 Family) LAN Controller",
+"   266d  82801FB/FBM/FR/FW/FRW (ICH6 Family) AC'97 Modem Controller",
+"       1025 006a  Conexant AC'97 CoDec (in Acer TravelMate 2410 serie laptop)",
+"       103c 099c  NX6110/NC6120",
+"   266e  82801FB/FBM/FR/FW/FRW (ICH6 Family) AC'97 Audio Controller",
+"       1025 006a  Realtek ALC 655 codec (in Acer TravelMate 2410 serie laptop)",
+"       1028 0179  Optiplex GX280",
+"       1028 0182  Latitude D610 Laptop",
+"       1028 0188  Inspiron 6000 laptop",
+"       103c 0944  Compaq NC6220",
+"       103c 099c  NX6110/NC6120",
+"       103c 3006  DC7100 SFF(DX878AV)",
+"       1458 a002  GA-8I915ME-G Mainboard",
+"       152d 0745  Packard Bell A8550 Laptop",
+"       1734 105a  Scenic W620",
+"   266f  82801FB/FBM/FR/FW/FRW (ICH6 Family) IDE Controller",
+"       103c 099c  NX6110/NC6120",
+"       1043 80a6  P5GD1-VW Mainboard",
+"       1458 266f  GA-8I915ME-G Mainboard",
+"       1462 7028  915P/G Neo2",
+"       1734 105c  Scenic W620",
+"   2670  Enterprise Southbridge LPC",
+"   2680  Enterprise Southbridge SATA IDE",
+"   2681  Enterprise Southbridge SATA AHCI",
+"   2682  Enterprise Southbridge SATA RAID",
+"   2683  Enterprise Southbridge SATA RAID",
+"   2688  Enterprise Southbridge UHCI USB #1",
+"   2689  Enterprise Southbridge UHCI USB #2",
+"   268a  Enterprise Southbridge UHCI USB #3",
+"   268b  Enterprise Southbridge UHCI USB #4",
+"   268c  Enterprise Southbridge EHCI USB",
+"   2690  Enterprise Southbridge PCI Express Root Port 1",
+"   2692  Enterprise Southbridge PCI Express Root Port 2",
+"   2694  Enterprise Southbridge PCI Express Root Port 3",
+"   2696  Enterprise Southbridge PCI Express Root Port 4",
+"   2698  Enterprise Southbridge AC '97 Audio",
+"   2699  Enterprise Southbridge AC '97 Modem",
+"   269a  Enterprise Southbridge High Definition Audio",
+"   269b  Enterprise Southbridge SMBus",
+"   269e  Enterprise Southbridge PATA",
+"   2770  945G/GZ/P/PL Express Memory Controller Hub",
+"       8086 544e  DeskTop Board D945GTP",
+"   2771  945G/GZ/P/PL Express PCI Express Root Port",
+"   2772  945G/GZ Express Integrated Graphics Controller",
+"       8086 544e  DeskTop Board D945GTP",
+"   2774  955X Express Memory Controller Hub",
+"   2775  955X Express PCI Express Root Port",
+"   2776  945G/GZ Express Integrated Graphics Controller",
+"   2778  E7230 Memory Controller Hub",
+"   2779  E7230 PCI Express Root Port",
+"   277a  975X Express PCI Express Root Port",
+"   277c  975X Express Memory Controller Hub",
+"   277d  975X Express PCI Express Root Port",
+"   2782  82915G Express Chipset Family Graphics Controller",
+"       1043 2582  P5GD1-VW Mainboard",
+"       1734 105b  Scenic W620",
+"   2792  Mobile 915GM/GMS/910GML Express Graphics Controller",
+"       103c 099c  NX6110/NC6120",
+"       1043 1881  GMA 900 915GM Integrated Graphics",
+"   27a0  Mobile 945GM/PM/GMS/940GML and 945GT Express Memory Controller Hub",
+"   27a1  Mobile 945GM/PM/GMS/940GML and 945GT Express PCI Express Root Port",
+"   27a2  Mobile 945GM/GMS/940GML Express Integrated Graphics Controller",
+"   27a6  Mobile 945GM/GMS/940GML Express Integrated Graphics Controller",
+"   27b0  82801GH (ICH7DH) LPC Interface Bridge",
+"   27b8  82801GB/GR (ICH7 Family) LPC Interface Bridge",
+"       8086 544e  DeskTop Board D945GTP",
+"   27b9  82801GBM (ICH7-M) LPC Interface Bridge",
+"   27bd  82801GHM (ICH7-M DH) LPC Interface Bridge",
+"   27c0  82801GB/GR/GH (ICH7 Family) Serial ATA Storage Controller IDE",
+"       8086 544e  DeskTop Board D945GTP",
+"   27c1  82801GR/GH (ICH7 Family) Serial ATA Storage Controller AHCI",
+"   27c3  82801GR/GH (ICH7 Family) Serial ATA Storage Controller RAID",
+"   27c4  82801GBM/GHM (ICH7 Family) Serial ATA Storage Controller IDE",
+"   27c5  82801GBM/GHM (ICH7 Family) Serial ATA Storage Controller AHCI",
+"   27c6  82801GHM (ICH7-M DH) Serial ATA Storage Controller RAID",
+"   27c8  82801G (ICH7 Family) USB UHCI #1",
+"       8086 544e  DeskTop Board D945GTP",
+"   27c9  82801G (ICH7 Family) USB UHCI #2",
+"       8086 544e  DeskTop Board D945GTP",
+"   27ca  82801G (ICH7 Family) USB UHCI #3",
+"       8086 544e  DeskTop Board D945GTP",
+"   27cb  82801G (ICH7 Family) USB UHCI #4",
+"       8086 544e  DeskTop Board D945GTP",
+"   27cc  82801G (ICH7 Family) USB2 EHCI Controller",
+"       8086 544e  DeskTop Board D945GTP",
+"   27d0  82801G (ICH7 Family) PCI Express Port 1",
+"   27d2  82801G (ICH7 Family) PCI Express Port 2",
+"   27d4  82801G (ICH7 Family) PCI Express Port 3",
+"   27d6  82801G (ICH7 Family) PCI Express Port 4",
+"   27d8  82801G (ICH7 Family) High Definition Audio Controller",
+"   27da  82801G (ICH7 Family) SMBus Controller",
+"       8086 544e  DeskTop Board D945GTP",
+"   27dc  82801G (ICH7 Family) LAN Controller",
+"       8086 308d  DeskTop Board D945GTP",
+"   27dd  82801G (ICH7 Family) AC'97 Modem Controller",
+"   27de  82801G (ICH7 Family) AC'97 Audio Controller",
+"   27df  82801G (ICH7 Family) IDE Controller",
+"       8086 544e  DeskTop Board D945GTP",
+"   27e0  82801GR/GH/GHM (ICH7 Family) PCI Express Port 5",
+"   27e2  82801GR/GH/GHM (ICH7 Family) PCI Express Port 6",
+"   2810  LPC Interface Controller",
+"   2811  Mobile LPC Interface Controller",
+"   2812  LPC Interface Controller",
+"   2814  LPC Interface Controller",
+"   2815  Mobile LPC Interface Controller",
+"   2820  SATA Controller 1 IDE",
+"   2821  SATA Controller AHCI",
+"   2822  SATA Controller RAID",
+"   2824  SATA Controller AHCI",
+"   2825  SATA Controller 2 IDE",
+"   2828  Mobile SATA Controller IDE",
+"   2829  Mobile SATA Controller AHCI",
+"   282a  Mobile SATA Controller RAID",
+"   2830  USB UHCI Controller #1",
+"   2831  USB UHCI Controller #2",
+"   2832  USB UHCI Controller #3",
+"   2834  USB UHCI Controller #4",
+"   2835  USB UHCI Controller #5",
+"   2836  USB2 EHCI Controller #1",
+"   283a  USB2 EHCI Controller #2",
+"   283e  SMBus Controller",
+"   283f  PCI Express Port 1",
+"   2841  PCI Express Port 2",
+"   2843  PCI Express Port 3",
+"   2845  PCI Express Port 4",
+"   2847  PCI Express Port 5",
+"   2849  PCI Express Port 6",
+"   284b  HD Audio Controller",
+"   284f  Thermal Subsystem",
+"   2850  Mobile IDE Controller",
+"   2970  Memory Controller Hub",
+"   2971  PCI Express Root Port",
+"   2972  Integrated Graphics Controller",
+"   2973  Integrated Graphics Controller",
+"   2974  HECI Controller",
+"   2976  PT IDER Controller",
+"   2977  KT Controller",
+"   2990  Memory Controller Hub",
+"   2991  PCI Express Root Port",
+"   2992  Integrated Graphics Controller",
+"   2993  Integrated Graphics Controller",
+"   2994  HECI Controller",
+"   2995  HECI Controller",
+"   2996  PT IDER Controller",
+"   2997  KT Controller",
+"   29a0  Memory Controller Hub",
+"   29a1  PCI Express Root Port",
+"   29a2  Integrated Graphics Controller",
+"   29a3  Integrated Graphics Controller",
+"   29a4  HECI Controller",
+"   29a5  HECI Controller",
+"   29a6  PT IDER Controller",
+"   29a7  KT Controller",
+"   2a00  Mobile Memory Controller Hub",
+"   2a01  Mobile PCI Express Root Port",
+"   2a02  Mobile Integrated Graphics Controller",
+"   2a03  Mobile Integrated Graphics Controller",
+"   3092  Integrated RAID",
+"   3200  GD31244 PCI-X SATA HBA",
+"   3340  82855PM Processor to I/O Controller",
+"       1025 005a  TravelMate 290",
+"       103c 088c  NC8000 laptop",
+"       103c 0890  NC6000 laptop",
+"   3341  82855PM Processor to AGP Controller",
+"   3500  Enterprise Southbridge PCI Express Upstream Port",
+"   3501  Enterprise Southbridge PCI Express Upstream Port",
+"   3504  Enterprise Southbridge IOxAPIC",
+"   3505  Enterprise Southbridge IOxAPIC",
+"   350c  Enterprise Southbridge PCI Express to PCI-X Bridge",
+"   350d  Enterprise Southbridge PCI Express to PCI-X Bridge",
+"   3510  Enterprise Southbridge PCI Express Downstream Port E1",
+"   3511  Enterprise Southbridge PCI Express Downstream Port E1",
+"   3514  Enterprise Southbridge PCI Express Downstream Port E2",
+"   3515  Enterprise Southbridge PCI Express Downstream Port E2",
+"   3518  Enterprise Southbridge PCI Express Downstream Port E3",
+"   3519  Enterprise Southbridge PCI Express Downstream Port E3",
+"   3575  82830 830 Chipset Host Bridge",
+"       0e11 0030  Evo N600c",
+"       1014 021d  ThinkPad A/T/X Series",
+"       104d 80e7  VAIO PCG-GR214EP/GR214MP/GR215MP/GR314MP/GR315MP",
+"   3576  82830 830 Chipset AGP Bridge",
+"   3577  82830 CGC [Chipset Graphics Controller]",
+"       1014 0513  ThinkPad A/T/X Series",
+"   3578  82830 830 Chipset Host Bridge",
+"   3580  82852/82855 GM/GME/PM/GMV Processor to I/O Controller",
+"       1028 0139  Latitude D400",
+"       1028 0163  Latitude D505",
+"       1028 0196  Inspiron 5160",
+"       1734 1055  Amilo M1420",
+"       4c53 10b0  CL9 mainboard",
+"       4c53 10e0  PSL09 PrPMC",
+"   3581  82852/82855 GM/GME/PM/GMV Processor to AGP Controller",
+"       1734 1055  Amilo M1420",
+"   3582  82852/855GM Integrated Graphics Device",
+"       1028 0139  Latitude D400",
+"       1028 0163  Latitude D505",
+"       4c53 10b0  CL9 mainboard",
+"       4c53 10e0  PSL09 PrPMC",
+"   3584  82852/82855 GM/GME/PM/GMV Processor to I/O Controller",
+"       1028 0139  Latitude D400",
+"       1028 0163  Latitude D505",
+"       1028 0196  Inspiron 5160",
+"       1734 1055  Amilo M1420",
+"       4c53 10b0  CL9 mainboard",
+"       4c53 10e0  PSL09 PrPMC",
+"   3585  82852/82855 GM/GME/PM/GMV Processor to I/O Controller",
+"       1028 0139  Latitude D400",
+"       1028 0163  Latitude D505",
+"       1028 0196  Inspiron 5160",
+"       1734 1055  Amilo M1420",
+"       4c53 10b0  CL9 mainboard",
+"       4c53 10e0  PSL09 PrPMC",
+"   3590  E7520 Memory Controller Hub",
+"       1028 019a  PowerEdge SC1425",
+"       1734 103e  Primergy RX300 S2",
+"       4c53 10d0  Telum ASLP10 Processor AMC",
+"   3591  E7525/E7520 Error Reporting Registers",
+"       1028 0169  Precision 470",
+"       4c53 10d0  Telum ASLP10 Processor AMC",
+"   3592  E7320 Memory Controller Hub",
+"   3593  E7320 Error Reporting Registers",
+"   3594  E7520 DMA Controller",
+"       4c53 10d0  Telum ASLP10 Processor AMC",
+"   3595  E7525/E7520/E7320 PCI Express Port A",
+"   3596  E7525/E7520/E7320 PCI Express Port A1",
+"   3597  E7525/E7520 PCI Express Port B",
+"   3598  E7520 PCI Express Port B1",
+"   3599  E7520 PCI Express Port C",
+"   359a  E7520 PCI Express Port C1",
+"   359b  E7525/E7520/E7320 Extended Configuration Registers",
+"   359e  E7525 Memory Controller Hub",
+"       1028 0169  Precision 470",
+"   4220  PRO/Wireless 2200BG Network Connection",
+"   4222  PRO/Wireless 3945ABG Network Connection",
+"       8086 1005  PRO/Wireless 3945BG Network Connection",
+"       8086 1034  PRO/Wireless 3945BG Network Connection",
+"       8086 1044  PRO/Wireless 3945BG Network Connection",
+"   4223  PRO/Wireless 2915ABG Network Connection",
+"       1351 103c  Compaq NC6220",
+"   4224  PRO/Wireless 2915ABG Network Connection",
+"   4227  PRO/Wireless 3945ABG Network Connection",
+"       8086 1011  Thinkpad X60s",
+"       8086 1014  PRO/Wireless 3945BG Network Connection",
+"   5200  EtherExpress PRO/100 Intelligent Server",
+"   5201  EtherExpress PRO/100 Intelligent Server",
+"       8086 0001  EtherExpress PRO/100 Server Ethernet Adapter",
+"   530d  80310 IOP [IO Processor]",
+"   7000  82371SB PIIX3 ISA [Natoma/Triton II]",
+"   7010  82371SB PIIX3 IDE [Natoma/Triton II]",
+"   7020  82371SB PIIX3 USB [Natoma/Triton II]",
+"   7030  430VX - 82437VX TVX [Triton VX]",
+"   7050  Intercast Video Capture Card",
+"   7051  PB 642365-003 (Business Video Conferencing Card)",
+"   7100  430TX - 82439TX MTXC",
+"   7110  82371AB/EB/MB PIIX4 ISA",
+"       15ad 1976  virtualHW v3",
+"   7111  82371AB/EB/MB PIIX4 IDE",
+"       15ad 1976  virtualHW v3",
+"   7112  82371AB/EB/MB PIIX4 USB",
+"       15ad 1976  virtualHW v3",
+"   7113  82371AB/EB/MB PIIX4 ACPI",
+"       15ad 1976  virtualHW v3",
+"   7120  82810 GMCH [Graphics Memory Controller Hub]",
+"       4c53 1040  CL7 mainboard",
+"       4c53 1060  PC7 mainboard",
+"   7121  82810 CGC [Chipset Graphics Controller]",
+"       4c53 1040  CL7 mainboard",
+"       4c53 1060  PC7 mainboard",
+"       8086 4341  Cayman (CA810) Mainboard",
+"   7122  82810 DC-100 GMCH [Graphics Memory Controller Hub]",
+"   7123  82810 DC-100 CGC [Chipset Graphics Controller]",
+"   7124  82810E DC-133 GMCH [Graphics Memory Controller Hub]",
+"   7125  82810E DC-133 CGC [Chipset Graphics Controller]",
+"   7126  82810 DC-133 System and Graphics Controller",
+"   7128  82810-M DC-100 System and Graphics Controller",
+"   712a  82810-M DC-133 System and Graphics Controller",
+"   7180  440LX/EX - 82443LX/EX Host bridge",
+"   7181  440LX/EX - 82443LX/EX AGP bridge",
+"   7190  440BX/ZX/DX - 82443BX/ZX/DX Host bridge",
+"       0e11 0500  Armada 1750 Laptop System Chipset",
+"       0e11 b110  Armada M700/E500",
+"       1028 008e  PowerEdge 1300 mainboard",
+"       1179 0001  Toshiba Tecra 8100 Laptop System Chipset",
+"       15ad 1976  virtualHW v3",
+"       4c53 1050  CT7 mainboard",
+"       4c53 1051  CE7 mainboard",
+"   7191  440BX/ZX/DX - 82443BX/ZX/DX AGP bridge",
+"       1028 008e  PowerEdge 1300 mainboard",
+"   7192  440BX/ZX/DX - 82443BX/ZX/DX Host bridge (AGP disabled)",
+"       0e11 0460  Armada 1700 Laptop System Chipset",
+"       4c53 1000  CC7/CR7/CP7/VC7/VP7/VR7 mainboard",
+"   7194  82440MX Host Bridge",
+"       1033 0000  Versa Note Vxi",
+"       4c53 10a0  CA3/CR3 mainboard",
+"   7195  82440MX AC'97 Audio Controller",
+"       1033 80cc  Versa Note VXi",
+"       10cf 1099  QSound_SigmaTel Stac97 PCI Audio",
+"       11d4 0040  SoundMAX Integrated Digital Audio",
+"       11d4 0048  SoundMAX Integrated Digital Audio",
+"   7196  82440MX AC'97 Modem Controller",
+"   7198  82440MX ISA Bridge",
+"   7199  82440MX EIDE Controller",
+"   719a  82440MX USB Universal Host Controller",
+"   719b  82440MX Power Management Controller",
+"   71a0  440GX - 82443GX Host bridge",
+"       4c53 1050  CT7 mainboard",
+"       4c53 1051  CE7 mainboard",
+"   71a1  440GX - 82443GX AGP bridge",
+"   71a2  440GX - 82443GX Host bridge (AGP disabled)",
+"       4c53 1000  CC7/CR7/CP7/VC7/VP7/VR7 mainboard",
+"   7600  82372FB PIIX5 ISA",
+"   7601  82372FB PIIX5 IDE",
+"   7602  82372FB PIIX5 USB",
+"   7603  82372FB PIIX5 SMBus",
+"   7800  82740 (i740) AGP Graphics Accelerator",
+"       003d 0008  Starfighter AGP",
+"       003d 000b  Starfighter AGP",
+"       1092 0100  Stealth II G460",
+"       10b4 201a  Lightspeed 740",
+"       10b4 202f  Lightspeed 740",
+"       8086 0000  Terminator 2x/i",
+"       8086 0100  Intel740 Graphics Accelerator",
+"   84c4  450KX/GX [Orion] - 82454KX/GX PCI bridge",
+"   84c5  450KX/GX [Orion] - 82453KX/GX Memory controller",
+"   84ca  450NX - 82451NX Memory & I/O Controller",
+"   84cb  450NX - 82454NX/84460GX PCI Expander Bridge",
+"   84e0  460GX - 84460GX System Address Controller (SAC)",
+"   84e1  460GX - 84460GX System Data Controller (SDC)",
+"   84e2  460GX - 84460GX AGP Bridge (GXB function 2)",
+"   84e3  460GX - 84460GX Memory Address Controller (MAC)",
+"   84e4  460GX - 84460GX Memory Data Controller (MDC)",
+"   84e6  460GX - 82466GX Wide and fast PCI eXpander Bridge (WXB)",
+"   84ea  460GX - 84460GX AGP Bridge (GXB function 1)",
+"   8500  IXP4XX Intel Network Processor (IXP420/421/422/425/IXC1100)",
+"       1993 0ded  mGuard-PCI AV#2",
+"       1993 0dee  mGuard-PCI AV#1",
+"       1993 0def  mGuard-PCI AV#0",
+"   9000  IXP2000 Family Network Processor",
+"   9001  IXP2400 Network Processor",
+"   9002  IXP2300 Network Processor",
+"   9004  IXP2800 Network Processor",
+"   9621  Integrated RAID",
+"   9622  Integrated RAID",
+"   9641  Integrated RAID",
+"   96a1  Integrated RAID",
+"   b152  21152 PCI-to-PCI Bridge",
+"   b154  21154 PCI-to-PCI Bridge",
+"   b555  21555 Non transparent PCI-to-PCI Bridge",
+"       12d9 000a  PCI VoIP Gateway",
+"       4c53 1050  CT7 mainboard",
+"       4c53 1051  CE7 mainboard",
+"       e4bf 1000  CC8-1-BLUES",
+"8401  TRENDware International Inc.",
+"8800  Trigem Computer Inc.",
+"   2008  Video assistent component",
+"8866  T-Square Design Inc.",
+"8888  Silicon Magic",
+"8912  TRX",
+"8c4a  Winbond",
+"   1980  W89C940 misprogrammed [ne2k]",
+"8e0e  Computone Corporation",
+"8e2e  KTI",
+"   3000  ET32P2",
+"9004  Adaptec",
+"   0078  AHA-2940U_CN",
+"   1078  AIC-7810",
+"   1160  AIC-1160 [Family Fibre Channel Adapter]",
+"   2178  AIC-7821",
+"   3860  AHA-2930CU",
+"   3b78  AHA-4844W/4844UW",
+"   5075  AIC-755x",
+"   5078  AHA-7850",
+"       9004 7850  AHA-2904/Integrated AIC-7850",
+"   5175  AIC-755x",
+"   5178  AIC-7851",
+"   5275  AIC-755x",
+"   5278  AIC-7852",
+"   5375  AIC-755x",
+"   5378  AIC-7850",
+"   5475  AIC-755x",
+"   5478  AIC-7850",
+"   5575  AVA-2930",
+"   5578  AIC-7855",
+"   5647  ANA-7711 TCP Offload Engine",
+"       9004 7710  ANA-7711F TCP Offload Engine - Optical",
+"       9004 7711  ANA-7711LP TCP Offload Engine - Copper",
+"   5675  AIC-755x",
+"   5678  AIC-7856",
+"   5775  AIC-755x",
+"   5778  AIC-7850",
+"   5800  AIC-5800",
+"   5900  ANA-5910/5930/5940 ATM155 & 25 LAN Adapter",
+"   5905  ANA-5910A/5930A/5940A ATM Adapter",
+"   6038  AIC-3860",
+"   6075  AIC-1480 / APA-1480",
+"       9004 7560  AIC-1480 / APA-1480 Cardbus",
+"   6078  AIC-7860",
+"   6178  AIC-7861",
+"       9004 7861  AHA-2940AU Single",
+"   6278  AIC-7860",
+"   6378  AIC-7860",
+"   6478  AIC-786x",
+"   6578  AIC-786x",
+"   6678  AIC-786x",
+"   6778  AIC-786x",
+"   6915  ANA620xx/ANA69011A",
+"       9004 0008  ANA69011A/TX 10/100",
+"       9004 0009  ANA69011A/TX 10/100",
+"       9004 0010  ANA62022 2-port 10/100",
+"       9004 0018  ANA62044 4-port 10/100",
+"       9004 0019  ANA62044 4-port 10/100",
+"       9004 0020  ANA62022 2-port 10/100",
+"       9004 0028  ANA69011A/TX 10/100",
+"       9004 8008  ANA69011A/TX 64 bit 10/100",
+"       9004 8009  ANA69011A/TX 64 bit 10/100",
+"       9004 8010  ANA62022 2-port 64 bit 10/100",
+"       9004 8018  ANA62044 4-port 64 bit 10/100",
+"       9004 8019  ANA62044 4-port 64 bit 10/100",
+"       9004 8020  ANA62022 2-port 64 bit 10/100",
+"       9004 8028  ANA69011A/TX 64 bit 10/100",
+"   7078  AHA-294x / AIC-7870",
+"   7178  AHA-2940/2940W / AIC-7871",
+"   7278  AHA-3940/3940W / AIC-7872",
+"   7378  AHA-3985 / AIC-7873",
+"   7478  AHA-2944/2944W / AIC-7874",
+"   7578  AHA-3944/3944W / AIC-7875",
+"   7678  AHA-4944W/UW / AIC-7876",
+"   7710  ANA-7711F Network Accelerator Card (NAC) - Optical",
+"   7711  ANA-7711C Network Accelerator Card (NAC) - Copper",
+"   7778  AIC-787x",
+"   7810  AIC-7810",
+"   7815  AIC-7815 RAID+Memory Controller IC",
+"       9004 7815  ARO-1130U2 RAID Controller",
+"       9004 7840  AIC-7815 RAID+Memory Controller IC",
+"   7850  AIC-7850",
+"   7855  AHA-2930",
+"   7860  AIC-7860",
+"   7870  AIC-7870",
+"   7871  AHA-2940",
+"   7872  AHA-3940",
+"   7873  AHA-3980",
+"   7874  AHA-2944",
+"   7880  AIC-7880P",
+"   7890  AIC-7890",
+"   7891  AIC-789x",
+"   7892  AIC-789x",
+"   7893  AIC-789x",
+"   7894  AIC-789x",
+"   7895  AHA-2940U/UW / AHA-39xx / AIC-7895",
+"       9004 7890  AHA-2940U/2940UW Dual AHA-394xAU/AUW/AUWD AIC-7895B",
+"       9004 7891  AHA-2940U/2940UW Dual",
+"       9004 7892  AHA-3940AU/AUW/AUWD/UWD",
+"       9004 7894  AHA-3944AUWD",
+"       9004 7895  AHA-2940U/2940UW Dual AHA-394xAU/AUW/AUWD AIC-7895B",
+"       9004 7896  AHA-2940U/2940UW Dual AHA-394xAU/AUW/AUWD AIC-7895B",
+"       9004 7897  AHA-2940U/2940UW Dual AHA-394xAU/AUW/AUWD AIC-7895B",
+"   7896  AIC-789x",
+"   7897  AIC-789x",
+"   8078  AIC-7880U",
+"       9004 7880  AIC-7880P Ultra/Ultra Wide SCSI Chipset",
+"   8178  AHA-2940U/UW/D / AIC-7881U",
+"       9004 7881  AHA-2940UW SCSI Host Adapter",
+"   8278  AHA-3940U/UW/UWD / AIC-7882U",
+"   8378  AHA-3940U/UW / AIC-7883U",
+"   8478  AHA-2944UW / AIC-7884U",
+"   8578  AHA-3944U/UWD / AIC-7885",
+"   8678  AHA-4944UW / AIC-7886",
+"   8778  AHA-2940UW Pro / AIC-788x",
+"       9004 7887  2940UW Pro Ultra-Wide SCSI Controller",
+"   8878  AHA-2930UW / AIC-7888",
+"       9004 7888  AHA-2930UW SCSI Controller",
+"   8b78  ABA-1030",
+"   ec78  AHA-4944W/UW",
+"9005  Adaptec",
+"   0010  AHA-2940U2/U2W",
+"       9005 2180  AHA-2940U2 SCSI Controller",
+"       9005 8100  AHA-2940U2B SCSI Controller",
+"       9005 a100  AHA-2940U2B SCSI Controller",
+"       9005 a180  AHA-2940U2W SCSI Controller",
+"       9005 e100  AHA-2950U2B SCSI Controller",
+"   0011  AHA-2930U2",
+"   0013  78902",
+"       9005 0003  AAA-131U2 Array1000 1 Channel RAID Controller",
+"       9005 000f  AIC7890_ARO",
+"   001f  AHA-2940U2/U2W / 7890/7891",
+"       9005 000f  2940U2W SCSI Controller",
+"       9005 a180  2940U2W SCSI Controller",
+"   0020  AIC-7890",
+"   002f  AIC-7890",
+"   0030  AIC-7890",
+"   003f  AIC-7890",
+"   0050  AHA-3940U2x/395U2x",
+"       9005 f500  AHA-3950U2B",
+"       9005 ffff  AHA-3950U2B",
+"   0051  AHA-3950U2D",
+"       9005 b500  AHA-3950U2D",
+"   0053  AIC-7896 SCSI Controller",
+"       9005 ffff  AIC-7896 SCSI Controller mainboard implementation",
+"   005f  AIC-7896U2/7897U2",
+"   0080  AIC-7892A U160/m",
+"       0e11 e2a0  Compaq 64-Bit/66MHz Wide Ultra3 SCSI Adapter",
+"       9005 6220  AHA-29160C",
+"       9005 62a0  29160N Ultra160 SCSI Controller",
+"       9005 e220  29160LP Low Profile Ultra160 SCSI Controller",
+"       9005 e2a0  29160 Ultra160 SCSI Controller",
+"   0081  AIC-7892B U160/m",
+"       9005 62a1  19160 Ultra160 SCSI Controller",
+"   0083  AIC-7892D U160/m",
+"   008f  AIC-7892P U160/m",
+"       1179 0001  Magnia Z310",
+"       15d9 9005  Onboard SCSI Host Adapter",
+"   00c0  AHA-3960D / AIC-7899A U160/m",
+"       0e11 f620  Compaq 64-Bit/66MHz Dual Channel Wide Ultra3 SCSI Adapter",
+"       9005 f620  AHA-3960D U160/m",
+"   00c1  AIC-7899B U160/m",
+"   00c3  AIC-7899D U160/m",
+"   00c5  RAID subsystem HBA",
+"       1028 00c5  PowerEdge 2400,2500,2550,4400",
+"   00cf  AIC-7899P U160/m",
+"       1028 00ce  PowerEdge 1400",
+"       1028 00d1  PowerEdge 2550",
+"       1028 00d9  PowerEdge 2500",
+"       10f1 2462  Thunder K7 S2462",
+"       15d9 9005  Onboard SCSI Host Adapter",
+"       8086 3411  SDS2 Mainboard",
+"   0241  Serial ATA II RAID 1420SA",
+"   0250  ServeRAID Controller",
+"       1014 0279  ServeRAID-xx",
+"       1014 028c  ServeRAID-xx",
+"   0279  ServeRAID 6M",
+"   0283  AAC-RAID",
+"       9005 0283  Catapult",
+"   0284  AAC-RAID",
+"       9005 0284  Tomcat",
+"   0285  AAC-RAID",
+"       0e11 0295  SATA 6Ch (Bearcat)",
+"       1014 02f2  ServeRAID 8i",
+"       1028 0287  PowerEdge Expandable RAID Controller 320/DC",
+"       1028 0291  CERC SATA RAID 2 PCI SATA 6ch (DellCorsair)",
+"       103c 3227  AAR-2610SA",
+"       17aa 0286  Legend S220 (Legend Crusader)",
+"       17aa 0287  Legend S230 (Legend Vulcan)",
+"       9005 0285  2200S (Vulcan)",
+"       9005 0286  2120S (Crusader)",
+"       9005 0287  2200S (Vulcan-2m)",
+"       9005 0288  3230S (Harrier)",
+"       9005 0289  3240S (Tornado)",
+"       9005 028a  ASR-2020ZCR",
+"       9005 028b  ASR-2025ZCR (Terminator)",
+"       9005 028e  ASR-2020SA (Skyhawk)",
+"       9005 028f  ASR-2025SA",
+"       9005 0290  AAR-2410SA PCI SATA 4ch (Jaguar II)",
+"       9005 0292  AAR-2810SA PCI SATA 8ch (Corsair-8)",
+"       9005 0293  AAR-21610SA PCI SATA 16ch (Corsair-16)",
+"       9005 0294  ESD SO-DIMM PCI-X SATA ZCR (Prowler)",
+"       9005 0296  ASR-2240S",
+"       9005 0297  ASR-4005SAS",
+"       9005 0298  ASR-4000SAS",
+"       9005 0299  ASR-4800SAS",
+"       9005 029a  4805SAS",
+"   0286  AAC-RAID (Rocket)",
+"       1014 9540  ServeRAID 8k/8k-l4",
+"       1014 9580  ServeRAID 8k/8k-l8",
+"       9005 028c  ASR-2230S + ASR-2230SLP PCI-X (Lancer)",
+"       9005 028d  ASR-2130S",
+"       9005 029b  ASR-2820SA",
+"       9005 029c  ASR-2620SA",
+"       9005 029d  ASR-2420SA",
+"       9005 029e  ICP ICP9024R0",
+"       9005 029f  ICP ICP9014R0",
+"       9005 02a0  ICP ICP9047MA",
+"       9005 02a1  ICP ICP9087MA",
+"       9005 02a2  3800SAS",
+"       9005 02a3  ICP ICP5445AU",
+"       9005 02a4  ICP ICP5085LI",
+"       9005 02a5  ICP ICP5085BR",
+"       9005 02a6  ICP9067MA",
+"       9005 02a7  AAR-2830SA",
+"       9005 02a8  AAR-2430SA",
+"       9005 02a9  ICP5087AU",
+"       9005 02aa  ICP5047AU",
+"       9005 0800  Callisto",
+"   0500  Obsidian chipset SCSI controller",
+"       1014 02c1  PCI-X DDR 3Gb SAS Adapter (572A/572C)",
+"       1014 02c2  PCI-X DDR 3Gb SAS RAID Adapter (572B/572D)",
+"   0503  Scamp chipset SCSI controller",
+"       1014 02bf  Quad Channel PCI-X DDR U320 SCSI RAID Adapter (571E)",
+"       1014 02d5  Quad Channel PCI-X DDR U320 SCSI RAID Adapter (571F)",
+"   0910  AUA-3100B",
+"   091e  AUA-3100B",
+"   8000  ASC-29320A U320",
+"   800f  AIC-7901 U320",
+"   8010  ASC-39320 U320",
+"   8011  ASC-39320D",
+"       0e11 00ac  ASC-39320D U320",
+"       9005 0041  ASC-39320D U320",
+"   8012  ASC-29320 U320",
+"   8013  ASC-29320B U320",
+"   8014  ASC-29320LP U320",
+"   8015  ASC-39320B U320",
+"   8016  ASC-39320A U320",
+"   8017  ASC-29320ALP U320",
+"   801c  ASC-39320D U320",
+"   801d  AIC-7902B U320",
+"   801e  AIC-7901A U320",
+"   801f  AIC-7902 U320",
+"       1734 1011  Primergy RX300",
+"   8080  ASC-29320A U320 w/HostRAID",
+"   808f  AIC-7901 U320 w/HostRAID",
+"   8090  ASC-39320 U320 w/HostRAID",
+"   8091  ASC-39320D U320 w/HostRAID",
+"   8092  ASC-29320 U320 w/HostRAID",
+"   8093  ASC-29320B U320 w/HostRAID",
+"   8094  ASC-29320LP U320 w/HostRAID",
+"   8095  ASC-39320(B) U320 w/HostRAID",
+"   8096  ASC-39320A U320 w/HostRAID",
+"   8097  ASC-29320ALP U320 w/HostRAID",
+"   809c  ASC-39320D(B) U320 w/HostRAID",
+"   809d  AIC-7902(B) U320 w/HostRAID",
+"   809e  AIC-7901A U320 w/HostRAID",
+"   809f  AIC-7902 U320 w/HostRAID",
+"907f  Atronics",
+"   2015  IDE-2015PL",
+"919a  Gigapixel Corp",
+"9412  Holtek",
+"   6565  6565",
+"9699  Omni Media Technology Inc",
+"   6565  6565",
+"9710  NetMos Technology",
+"   7780  USB IRDA-port",
+"   9805  PCI 1 port parallel adapter",
+"   9815  PCI 9815 Multi-I/O Controller",
+"       1000 0020  2P0S (2 port parallel adaptor)",
+"   9835  PCI 9835 Multi-I/O Controller",
+"       1000 0002  2S (16C550 UART)",
+"       1000 0012  1P2S",
+"   9845  PCI 9845 Multi-I/O Controller",
+"       1000 0004  0P4S (4 port 16550A serial card)",
+"       1000 0006  0P6S (6 port 16550a serial card)",
+"   9855  PCI 9855 Multi-I/O Controller",
+"       1000 0014  1P4S",
+"9902  Stargen Inc.",
+"   0001  SG2010 PCI over Starfabric Bridge",
+"   0002  SG2010 PCI to Starfabric Gateway",
+"   0003  SG1010 Starfabric Switch and PCI Bridge",
+"a0a0  AOPEN Inc.",
+"a0f1  UNISYS Corporation",
+"a200  NEC Corporation",
+"a259  Hewlett Packard",
+"a25b  Hewlett Packard GmbH PL24-MKT",
+"a304  Sony",
+"a727  3Com Corporation",
+"   0013  3CRPAG175 Wireless PC Card",
+"aa42  Scitex Digital Video",
+"ac1e  Digital Receiver Technology Inc",
+"ac3d  Actuality Systems",
+"aecb  Adrienne Electronics Corporation",
+"   6250  VITC/LTC Timecode Reader card [PCI-VLTC/RDR]",
+"affe  Sirrix AG security technologies",
+"   dead  Sirrix.PCI4S0 4-port ISDN S0 interface",
+"b1b3  Shiva Europe Limited",
+"bd11  Pinnacle Systems, Inc. (Wrong ID)",
+"c001  TSI Telsys",
+"c0a9  Micron/Crucial Technology",
+"c0de  Motorola",
+"c0fe  Motion Engineering, Inc.",
+"ca50  Varian Australia Pty Ltd",
+"cafe  Chrysalis-ITS",
+"   0003  Luna K3 Hardware Security Module",
+"cccc  Catapult Communications",
+"cddd  Tyzx, Inc.",
+"   0101  DeepSea 1 High Speed Stereo Vision Frame Grabber",
+"   0200  DeepSea 2 High Speed Stereo Vision Frame Grabber",
+"d161  Digium, Inc.",
+"   0205  Wildcard TE205P",
+"   0210  Wildcard TE210P",
+"   0405  Wildcard TE405P Quad-Span togglable E1/T1/J1 card 5.0v",
+"   0406  Wildcard TE406P Quad-Span togglable E1/T1/J1 echo cancellation card 5.0v",
+"   0410  Wildcard TE410P Quad-Span togglable E1/T1/J1 card 3.3v",
+"   0411  Wildcard TE411P Quad-Span togglable E1/T1/J1 echo cancellation card 3.3v",
+"   2400  Wildcard TDM2400P",
+"d4d4  Dy4 Systems Inc",
+"   0601  PCI Mezzanine Card",
+"d531  I+ME ACTIA GmbH",
+"d84d  Exsys",
+"dead  Indigita Corporation",
+"deaf  Middle Digital Inc.",
+"   9050  PC Weasel Virtual VGA",
+"   9051  PC Weasel Serial Port",
+"   9052  PC Weasel Watchdog Timer",
+"e000  Winbond",
+"   e000  W89C940",
+"e159  Tiger Jet Network Inc.",
+"   0001  Tiger3XX Modem/ISDN interface",
+"       0059 0001  128k ISDN-S/T Adapter",
+"       0059 0003  128k ISDN-U Adapter",
+"       00a7 0001  TELES.S0/PCI 2.x ISDN Adapter",
+"       8086 0003  Digium X100P/X101P analogue PSTN FXO interface",
+"   0002  Tiger100APC ISDN chipset",
+"e4bf  EKF Elektronik GmbH",
+"e55e  Essence Technology, Inc.",
+"ea01  Eagle Technology",
+"   000a  PCI-773 Temperature Card",
+"   0032  PCI-730 & PC104P-30 Card",
+"   003e  PCI-762 Opto-Isolator Card",
+"   0041  PCI-763 Reed Relay Card",
+"   0043  PCI-769 Opto-Isolator Reed Relay Combo Card",
+"   0046  PCI-766 Analog Output Card",
+"   0052  PCI-703 Analog I/O Card",
+"   0800  PCI-800 Digital I/O Card",
+"ea60  RME",
+"   9896  Digi32",
+"   9897  Digi32 Pro",
+"   9898  Digi32/8",
+"eabb  Aashima Technology B.V.",
+"eace  Endace Measurement Systems, Ltd",
+"   3100  DAG 3.10 OC-3/OC-12",
+"   3200  DAG 3.2x OC-3/OC-12",
+"   320e  DAG 3.2E Fast Ethernet",
+"   340e  DAG 3.4E Fast Ethernet",
+"   341e  DAG 3.41E Fast Ethernet",
+"   3500  DAG 3.5 OC-3/OC-12",
+"   351c  DAG 3.5ECM Fast Ethernet",
+"   4100  DAG 4.10 OC-48",
+"   4110  DAG 4.11 OC-48",
+"   4220  DAG 4.2 OC-48",
+"   422e  DAG 4.2E Dual Gigabit Ethernet",
+"ec80  Belkin Corporation",
+"   ec00  F5D6000",
+"ecc0  Echo Digital Audio Corporation",
+"edd8  ARK Logic Inc",
+"   a091  1000PV [Stingray]",
+"   a099  2000PV [Stingray]",
+"   a0a1  2000MT",
+"   a0a9  2000MI",
+"f1d0  AJA Video",
+"   c0fe  Xena HS/HD-R",
+"   c0ff  Kona/Xena 2",
+"   cafe  Kona SD",
+"   cfee  Xena LS/SD-22-DA/SD-DA",
+"   dcaf  Kona HD",
+"   dfee  Xena HD-DA",
+"   efac  Xena SD-MM/SD-22-MM",
+"   facd  Xena HD-MM",
+"fa57  Interagon AS",
+"   0001  PMC [Pattern Matching Chip]",
+"fab7  Fabric7 Systems, Inc.",
+"febd  Ultraview Corp.",
+"feda  Broadcom Inc",
+"   a0fa  BCM4210 iLine10 HomePNA 2.0",
+"   a10e  BCM4230 iLine10 HomePNA 2.0",
+"fede  Fedetec Inc.",
+"   0003  TABIC PCI v3",
+"fffd  XenSource, Inc.",
+"   0101  PCI Event Channel Controller",
+"fffe  VMWare Inc",
+"   0405  Virtual SVGA 4.0",
+"   0710  Virtual SVGA",
+"ffff  Illegal Vendor ID",
+"C 00  Unclassified device",
+"   00  Non-VGA unclassified device",
+"   01  VGA compatible unclassified device",
+"C 01  Mass storage controller",
+"   00  SCSI storage controller",
+"   01  IDE interface",
+"   02  Floppy disk controller",
+"   03  IPI bus controller",
+"   04  RAID bus controller",
+"   05  ATA controller",
+"       20  ADMA single stepping",
+"       40  ADMA continuous operation",
+"   06  SATA controller",
+"       00  Vendor specific",
+"       01  AHCI 1.0",
+"   07  Serial Attached SCSI controller",
+"   80  Mass storage controller",
+"C 02  Network controller",
+"   00  Ethernet controller",
+"   01  Token ring network controller",
+"   02  FDDI network controller",
+"   03  ATM network controller",
+"   04  ISDN controller",
+"   80  Network controller",
+"C 03  Display controller",
+"   00  VGA compatible controller",
+"       00  VGA",
+"       01  8514",
+"   01  XGA compatible controller",
+"   02  3D controller",
+"   80  Display controller",
+"C 04  Multimedia controller",
+"   00  Multimedia video controller",
+"   01  Multimedia audio controller",
+"   02  Computer telephony device",
+"   03  Audio device",
+"   80  Multimedia controller",
+"C 05  Memory controller",
+"   00  RAM memory",
+"   01  FLASH memory",
+"   80  Memory controller",
+"C 06  Bridge",
+"   00  Host bridge",
+"   01  ISA bridge",
+"   02  EISA bridge",
+"   03  MicroChannel bridge",
+"   04  PCI bridge",
+"       00  Normal decode",
+"       01  Subtractive decode",
+"   05  PCMCIA bridge",
+"   06  NuBus bridge",
+"   07  CardBus bridge",
+"   08  RACEway bridge",
+"       00  Transparent mode",
+"       01  Endpoint mode",
+"   09  Semi-transparent PCI-to-PCI bridge",
+"       40  Primary bus towards host CPU",
+"       80  Secondary bus towards host CPU",
+"   0a  InfiniBand to PCI host bridge",
+"   80  Bridge",
+"C 07  Communication controller",
+"   00  Serial controller",
+"       00  8250",
+"       01  16450",
+"       02  16550",
+"       03  16650",
+"       04  16750",
+"       05  16850",
+"       06  16950",
+"   01  Parallel controller",
+"       00  SPP",
+"       01  BiDir",
+"       02  ECP",
+"       03  IEEE1284",
+"       fe  IEEE1284 Target",
+"   02  Multiport serial controller",
+"   03  Modem",
+"       00  Generic",
+"       01  Hayes/16450",
+"       02  Hayes/16550",
+"       03  Hayes/16650",
+"       04  Hayes/16750",
+"   80  Communication controller",
+"C 08  Generic system peripheral",
+"   00  PIC",
+"       00  8259",
+"       01  ISA PIC",
+"       02  EISA PIC",
+"       10  IO-APIC",
+"       20  IO(X)-APIC",
+"   01  DMA controller",
+"       00  8237",
+"       01  ISA DMA",
+"       02  EISA DMA",
+"   02  Timer",
+"       00  8254",
+"       01  ISA Timer",
+"       02  EISA Timers",
+"   03  RTC",
+"       00  Generic",
+"       01  ISA RTC",
+"   04  PCI Hot-plug controller",
+"   80  System peripheral",
+"C 09  Input device controller",
+"   00  Keyboard controller",
+"   01  Digitizer Pen",
+"   02  Mouse controller",
+"   03  Scanner controller",
+"   04  Gameport controller",
+"       00  Generic",
+"       10  Extended",
+"   80  Input device controller",
+"C 0a  Docking station",
+"   00  Generic Docking Station",
+"   80  Docking Station",
+"C 0b  Processor",
+"   00  386",
+"   01  486",
+"   02  Pentium",
+"   10  Alpha",
+"   20  Power PC",
+"   30  MIPS",
+"   40  Co-processor",
+"C 0c  Serial bus controller",
+"   00  FireWire (IEEE 1394)",
+"       00  Generic",
+"       10  OHCI",
+"   01  ACCESS Bus",
+"   02  SSA",
+"   03  USB Controller",
+"       00  UHCI",
+"       10  OHCI",
+"       20  EHCI",
+"       80  Unspecified",
+"       fe  USB Device",
+"   04  Fibre Channel",
+"   05  SMBus",
+"   06  InfiniBand",
+"C 0d  Wireless controller",
+"   00  IRDA controller",
+"   01  Consumer IR controller",
+"   10  RF controller",
+"   80  Wireless controller",
+"C 0e  Intelligent controller",
+"   00  I2O",
+"C 0f  Satellite communications controller",
+"   00  Satellite TV controller",
+"   01  Satellite audio communication controller",
+"   03  Satellite voice communication controller",
+"   04  Satellite data communication controller",
+"C 10  Encryption controller",
+"   00  Network and computing encryption device",
+"   10  Entertainment encryption device",
+"   80  Encryption controller",
+"C 11  Signal processing controller",
+"   00  DPIO module",
+"   01  Performance counters",
+"   10  Communication synchronizer",
+"   80  Signal processing controller",
+""
+};

 /tags/0.2.0.2/uspace/pci/libpci/Makefile
 ,0 → 1,29
+# Makefile for The PCI Library
+# (c) 1999 Martin Mares <mj@ucw.cz>
+# Modified and ported to HelenOS by Jakub Jermar
+LIBC_PREFIX=$(shell cd ../../libc; pwd)
+include $(LIBC_PREFIX)/Makefile.toolchain
+LIBS = $(LIBC_PREFIX)/libc.a
+CFLAGS += -I$(LIBC_PREFIX)/include -trigraphs
+OBJS=access.o generic.o names.o
+INCL=internal.h pci.h header.h sysdep.h types.h pci_ids.h
+PCILIB=libpci.a
+OBJS += i386-ports.o
+all: $(PCILIB)
+$(PCILIB): $(OBJS)
+    $(AR) rc $@ $(OBJS)
+%.o: %.c $(INCL)
+    $(CC) $(CFLAGS) -c $< -o $@
+clean:
+    -rm *.o libpci.a

 /tags/0.2.0.2/uspace/pci/COPYING
 ,0 → 1,340
+            GNU GENERAL PUBLIC LICENSE
+               Version 2, June 1991
+ Copyright (C) 1989, 1991 Free Software Foundation, Inc.
+Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ Everyone is permitted to copy and distribute verbatim copies
+ of this license document, but changing it is not allowed.
+                Preamble
+  The licenses for most software are designed to take away your
+freedom to share and change it.  By contrast, the GNU General Public
+License is intended to guarantee your freedom to share and change free
+software--to make sure the software is free for all its users.  This
+General Public License applies to most of the Free Software
+Foundation's software and to any other program whose authors commit to
+using it.  (Some other Free Software Foundation software is covered by
+the GNU Library General Public License instead.)  You can apply it to
+your programs, too.
+  When we speak of free software, we are referring to freedom, not
+price.  Our General Public Licenses are designed to make sure that you
+have the freedom to distribute copies of free software (and charge for
+this service if you wish), that you receive source code or can get it
+if you want it, that you can change the software or use pieces of it
+in new free programs; and that you know you can do these things.
+  To protect your rights, we need to make restrictions that forbid
+anyone to deny you these rights or to ask you to surrender the rights.
+These restrictions translate to certain responsibilities for you if you
+distribute copies of the software, or if you modify it.
+  For example, if you distribute copies of such a program, whether
+gratis or for a fee, you must give the recipients all the rights that
+you have.  You must make sure that they, too, receive or can get the
+source code.  And you must show them these terms so they know their
+rights.
+  We protect your rights with two steps: (1) copyright the software, and
+(2) offer you this license which gives you legal permission to copy,
+distribute and/or modify the software.
+  Also, for each author's protection and ours, we want to make certain
+that everyone understands that there is no warranty for this free
+software.  If the software is modified by someone else and passed on, we
+want its recipients to know that what they have is not the original, so
+that any problems introduced by others will not reflect on the original
+authors' reputations.
+  Finally, any free program is threatened constantly by software
+patents.  We wish to avoid the danger that redistributors of a free
+program will individually obtain patent licenses, in effect making the
+program proprietary.  To prevent this, we have made it clear that any
+patent must be licensed for everyone's free use or not licensed at all.
+  The precise terms and conditions for copying, distribution and
+modification follow.
+            GNU GENERAL PUBLIC LICENSE
+   TERMS AND CONDITIONS FOR COPYING, DISTRIBUTION AND MODIFICATION
+. This License applies to any program or other work which contains
+a notice placed by the copyright holder saying it may be distributed
+under the terms of this General Public License.  The "Program", below,
+refers to any such program or work, and a "work based on the Program"
+means either the Program or any derivative work under copyright law:
+that is to say, a work containing the Program or a portion of it,
+either verbatim or with modifications and/or translated into another
+language.  (Hereinafter, translation is included without limitation in
+the term "modification".)  Each licensee is addressed as "you".
+Activities other than copying, distribution and modification are not
+covered by this License; they are outside its scope.  The act of
+running the Program is not restricted, and the output from the Program
+is covered only if its contents constitute a work based on the
+Program (independent of having been made by running the Program).
+Whether that is true depends on what the Program does.
+. You may copy and distribute verbatim copies of the Program's
+source code as you receive it, in any medium, provided that you
+conspicuously and appropriately publish on each copy an appropriate
+copyright notice and disclaimer of warranty; keep intact all the
+notices that refer to this License and to the absence of any warranty;
+and give any other recipients of the Program a copy of this License
+along with the Program.
+You may charge a fee for the physical act of transferring a copy, and
+you may at your option offer warranty protection in exchange for a fee.
+. You may modify your copy or copies of the Program or any portion
+of it, thus forming a work based on the Program, and copy and
+distribute such modifications or work under the terms of Section 1
+above, provided that you also meet all of these conditions:
+    a) You must cause the modified files to carry prominent notices
+    stating that you changed the files and the date of any change.
+    b) You must cause any work that you distribute or publish, that in
+    whole or in part contains or is derived from the Program or any
+    part thereof, to be licensed as a whole at no charge to all third
+    parties under the terms of this License.
+    c) If the modified program normally reads commands interactively
+    when run, you must cause it, when started running for such
+    interactive use in the most ordinary way, to print or display an
+    announcement including an appropriate copyright notice and a
+    notice that there is no warranty (or else, saying that you provide
+    a warranty) and that users may redistribute the program under
+    these conditions, and telling the user how to view a copy of this
+    License.  (Exception: if the Program itself is interactive but
+    does not normally print such an announcement, your work based on
+    the Program is not required to print an announcement.)
+These requirements apply to the modified work as a whole.  If
+identifiable sections of that work are not derived from the Program,
+and can be reasonably considered independent and separate works in
+themselves, then this License, and its terms, do not apply to those
+sections when you distribute them as separate works.  But when you
+distribute the same sections as part of a whole which is a work based
+on the Program, the distribution of the whole must be on the terms of
+this License, whose permissions for other licensees extend to the
+entire whole, and thus to each and every part regardless of who wrote it.
+Thus, it is not the intent of this section to claim rights or contest
+your rights to work written entirely by you; rather, the intent is to
+exercise the right to control the distribution of derivative or
+collective works based on the Program.
+In addition, mere aggregation of another work not based on the Program
+with the Program (or with a work based on the Program) on a volume of
+a storage or distribution medium does not bring the other work under
+the scope of this License.
+. You may copy and distribute the Program (or a work based on it,
+under Section 2) in object code or executable form under the terms of
+Sections 1 and 2 above provided that you also do one of the following:
+    a) Accompany it with the complete corresponding machine-readable
+    source code, which must be distributed under the terms of Sections
+and 2 above on a medium customarily used for software interchange; or,
+    b) Accompany it with a written offer, valid for at least three
+    years, to give any third party, for a charge no more than your
+    cost of physically performing source distribution, a complete
+    machine-readable copy of the corresponding source code, to be
+    distributed under the terms of Sections 1 and 2 above on a medium
+    customarily used for software interchange; or,
+    c) Accompany it with the information you received as to the offer
+    to distribute corresponding source code.  (This alternative is
+    allowed only for noncommercial distribution and only if you
+    received the program in object code or executable form with such
+    an offer, in accord with Subsection b above.)
+The source code for a work means the preferred form of the work for
+making modifications to it.  For an executable work, complete source
+code means all the source code for all modules it contains, plus any
+associated interface definition files, plus the scripts used to
+control compilation and installation of the executable.  However, as a
+special exception, the source code distributed need not include
+anything that is normally distributed (in either source or binary
+form) with the major components (compiler, kernel, and so on) of the
+operating system on which the executable runs, unless that component
+itself accompanies the executable.
+If distribution of executable or object code is made by offering
+access to copy from a designated place, then offering equivalent
+access to copy the source code from the same place counts as
+distribution of the source code, even though third parties are not
+compelled to copy the source along with the object code.
+. You may not copy, modify, sublicense, or distribute the Program
+except as expressly provided under this License.  Any attempt
+otherwise to copy, modify, sublicense or distribute the Program is
+void, and will automatically terminate your rights under this License.
+However, parties who have received copies, or rights, from you under
+this License will not have their licenses terminated so long as such
+parties remain in full compliance.
+. You are not required to accept this License, since you have not
+signed it.  However, nothing else grants you permission to modify or
+distribute the Program or its derivative works.  These actions are
+prohibited by law if you do not accept this License.  Therefore, by
+modifying or distributing the Program (or any work based on the
+Program), you indicate your acceptance of this License to do so, and
+all its terms and conditions for copying, distributing or modifying
+the Program or works based on it.
+. Each time you redistribute the Program (or any work based on the
+Program), the recipient automatically receives a license from the
+original licensor to copy, distribute or modify the Program subject to
+these terms and conditions.  You may not impose any further
+restrictions on the recipients' exercise of the rights granted herein.
+You are not responsible for enforcing compliance by third parties to
+this License.
+. If, as a consequence of a court judgment or allegation of patent
+infringement or for any other reason (not limited to patent issues),
+conditions are imposed on you (whether by court order, agreement or
+otherwise) that contradict the conditions of this License, they do not
+excuse you from the conditions of this License.  If you cannot
+distribute so as to satisfy simultaneously your obligations under this
+License and any other pertinent obligations, then as a consequence you
+may not distribute the Program at all.  For example, if a patent
+license would not permit royalty-free redistribution of the Program by
+all those who receive copies directly or indirectly through you, then
+the only way you could satisfy both it and this License would be to
+refrain entirely from distribution of the Program.
+If any portion of this section is held invalid or unenforceable under
+any particular circumstance, the balance of the section is intended to
+apply and the section as a whole is intended to apply in other
+circumstances.
+It is not the purpose of this section to induce you to infringe any
+patents or other property right claims or to contest validity of any
+such claims; this section has the sole purpose of protecting the
+integrity of the free software distribution system, which is
+implemented by public license practices.  Many people have made
+generous contributions to the wide range of software distributed
+through that system in reliance on consistent application of that
+system; it is up to the author/donor to decide if he or she is willing
+to distribute software through any other system and a licensee cannot
+impose that choice.
+This section is intended to make thoroughly clear what is believed to
+be a consequence of the rest of this License.
+. If the distribution and/or use of the Program is restricted in
+certain countries either by patents or by copyrighted interfaces, the
+original copyright holder who places the Program under this License
+may add an explicit geographical distribution limitation excluding
+those countries, so that distribution is permitted only in or among
+countries not thus excluded.  In such case, this License incorporates
+the limitation as if written in the body of this License.
+. The Free Software Foundation may publish revised and/or new versions
+of the General Public License from time to time.  Such new versions will
+be similar in spirit to the present version, but may differ in detail to
+address new problems or concerns.
+Each version is given a distinguishing version number.  If the Program
+specifies a version number of this License which applies to it and "any
+later version", you have the option of following the terms and conditions
+either of that version or of any later version published by the Free
+Software Foundation.  If the Program does not specify a version number of
+this License, you may choose any version ever published by the Free Software
+Foundation.
+. If you wish to incorporate parts of the Program into other free
+programs whose distribution conditions are different, write to the author
+to ask for permission.  For software which is copyrighted by the Free
+Software Foundation, write to the Free Software Foundation; we sometimes
+make exceptions for this.  Our decision will be guided by the two goals
+of preserving the free status of all derivatives of our free software and
+of promoting the sharing and reuse of software generally.
+                NO WARRANTY
+. BECAUSE THE PROGRAM IS LICENSED FREE OF CHARGE, THERE IS NO WARRANTY
+FOR THE PROGRAM, TO THE EXTENT PERMITTED BY APPLICABLE LAW.  EXCEPT WHEN
+OTHERWISE STATED IN WRITING THE COPYRIGHT HOLDERS AND/OR OTHER PARTIES
+PROVIDE THE PROGRAM "AS IS" WITHOUT WARRANTY OF ANY KIND, EITHER EXPRESSED
+OR IMPLIED, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.  THE ENTIRE RISK AS
+TO THE QUALITY AND PERFORMANCE OF THE PROGRAM IS WITH YOU.  SHOULD THE
+PROGRAM PROVE DEFECTIVE, YOU ASSUME THE COST OF ALL NECESSARY SERVICING,
+REPAIR OR CORRECTION.
+. IN NO EVENT UNLESS REQUIRED BY APPLICABLE LAW OR AGREED TO IN WRITING
+WILL ANY COPYRIGHT HOLDER, OR ANY OTHER PARTY WHO MAY MODIFY AND/OR
+REDISTRIBUTE THE PROGRAM AS PERMITTED ABOVE, BE LIABLE TO YOU FOR DAMAGES,
+INCLUDING ANY GENERAL, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES ARISING
+OUT OF THE USE OR INABILITY TO USE THE PROGRAM (INCLUDING BUT NOT LIMITED
+TO LOSS OF DATA OR DATA BEING RENDERED INACCURATE OR LOSSES SUSTAINED BY
+YOU OR THIRD PARTIES OR A FAILURE OF THE PROGRAM TO OPERATE WITH ANY OTHER
+PROGRAMS), EVEN IF SUCH HOLDER OR OTHER PARTY HAS BEEN ADVISED OF THE
+POSSIBILITY OF SUCH DAMAGES.
+             END OF TERMS AND CONDITIONS
+        How to Apply These Terms to Your New Programs
+  If you develop a new program, and you want it to be of the greatest
+possible use to the public, the best way to achieve this is to make it
+free software which everyone can redistribute and change under these terms.
+  To do so, attach the following notices to the program.  It is safest
+to attach them to the start of each source file to most effectively
+convey the exclusion of warranty; and each file should have at least
+the "copyright" line and a pointer to where the full notice is found.
+    <one line to give the program's name and a brief idea of what it does.>
+    Copyright (C) <year>  <name of author>
+    This program is free software; you can redistribute it and/or modify
+    it under the terms of the GNU General Public License as published by
+    the Free Software Foundation; either version 2 of the License, or
+    (at your option) any later version.
+    This program is distributed in the hope that it will be useful,
+    but WITHOUT ANY WARRANTY; without even the implied warranty of
+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+    GNU General Public License for more details.
+    You should have received a copy of the GNU General Public License
+    along with this program; if not, write to the Free Software
+    Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+Also add information on how to contact you by electronic and paper mail.
+If the program is interactive, make it output a short notice like this
+when it starts in an interactive mode:
+    Gnomovision version 69, Copyright (C) year  name of author
+    Gnomovision comes with ABSOLUTELY NO WARRANTY; for details type `show w'.
+    This is free software, and you are welcome to redistribute it
+    under certain conditions; type `show c' for details.
+The hypothetical commands `show w' and `show c' should show the appropriate
+parts of the General Public License.  Of course, the commands you use may
+be called something other than `show w' and `show c'; they could even be
+mouse-clicks or menu items--whatever suits your program.
+You should also get your employer (if you work as a programmer) or your
+school, if any, to sign a "copyright disclaimer" for the program, if
+necessary.  Here is a sample; alter the names:
+  Yoyodyne, Inc., hereby disclaims all copyright interest in the program
+  `Gnomovision' (which makes passes at compilers) written by James Hacker.
+  <signature of Ty Coon>, 1 April 1989
+  Ty Coon, President of Vice
+This General Public License does not permit incorporating your program into
+proprietary programs.  If your program is a subroutine library, you may
+consider it more useful to permit linking proprietary applications with the
+library.  If this is what you want to do, use the GNU Library General
+Public License instead of this License.

 /tags/0.2.0.2/uspace/pci/update-ids
 ,0 → 1,16
+#! /bin/bash
+wget http://pciids.sourceforge.net/v2.2/pci.ids
+cat >pci_ids.h <<EOF
+/* DO NOT EDIT, THIS FILE IS AUTOMATICALLY GENERATED */
+char *pci_ids[] = {
+EOF
+cat pci.ids | grep -v '^#.*' | grep -v '^$' | tr \" \' | sed -n 's/\(.*\)/"\1",/p' >>pci_ids.h
+cat >>pci_ids.h <<EOF
+""
+};
+EOF
 Property changes:
 Added: svn:executable
 +*
 \ No newline at end of property

 /tags/0.2.0.2/uspace/Makefile
 ,0 → 1,86
+#
+# Copyright (C) 2005 Martin Decky
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# - Redistributions of source code must retain the above copyright
+#   notice, this list of conditions and the following disclaimer.
+# - Redistributions in binary form must reproduce the above copyright
+#   notice, this list of conditions and the following disclaimer in the
+#   documentation and/or other materials provided with the distribution.
+# - The name of the author may not be used to endorse or promote products
+#   derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+## Include configuration
+#
+-include Makefile.config
+DIRS = \
+    libc \
+    softint \
+    softfloat \
+    init \
+    ns \
+    fb \
+    kbd \
+    console \
+    tetris \
+    ipcc \
+    klog
+ifeq ($(ARCH), amd64)
+    DIRS += pci
+endif
+ifeq ($(ARCH), ia32)
+    DIRS += pci
+endif
+CFLAGS += -DCONFIG_MIPS_FPU
+BUILDS := $(addsuffix .build,$(DIRS))
+CLEANS := $(addsuffix .clean,$(DIRS))
+.PHONY: all config build $(BUILDS) $(CLEANS) clean distclean
+all:
+    tools/config.py default $(NARCH)
+ifdef NARCH
+ ifneq ($(ARCH), $(NARCH))
+    $(MAKE) -C . clean
+ endif
+endif
+    $(MAKE) -C . build
+config:
+    tools/config.py
+build: $(BUILDS)
+clean: $(CLEANS)
+    find $(SOURCES) -name '*.o' -follow -exec rm \{\} \;
+    find libc -name "_link.ld" -exec rm \{\} \;
+distclean: clean
+    -rm Makefile.config
+$(CLEANS):
+    $(MAKE) -C $(basename $@) clean ARCH=$(ARCH)
+$(BUILDS):
+    $(MAKE) -C $(basename $@) all ARCH=$(ARCH) COMPILER=$(COMPILER)

 /tags/0.2.0.2/uspace/ipcc/ipcc.c
 ,0 → 1,280
+/*
+ * Copyright (C) 2006 Ondrej Palkovsky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/** @addtogroup ippc IPC Tester
+ * @brief   IPC tester and task faulter.
+ * @{
+ */
+/**
+ * @file
+ */
+#include <stdio.h>
+#include <async.h>
+#include <ipc/ipc.h>
+#include <ipc/services.h>
+#include <errno.h>
+#define TEST_START       10000
+#define MAXLIST          4
+#define MSG_HANG_ME_UP   2000
+static int connections[50];
+static ipc_callid_t callids[50];
+static int phones[20];
+static int myservice = 0;
+static void client_connection(ipc_callid_t iid, ipc_call_t *icall)
+{
+    ipc_callid_t callid;
+    ipc_call_t call;
+    ipcarg_t phonehash = icall->in_phone_hash;
+    int retval;
+    int i;
+    printf("Connected phone: %P, accepting\n", icall->in_phone_hash);
+    ipc_answer_fast(iid, 0, 0, 0);
+    for (i=0;i < 1024;i++)
+        if (!connections[i]) {
+            connections[i] = phonehash;
+            break;
+        }
+    while (1) {
+        callid = async_get_call(&call);
+        switch (IPC_GET_METHOD(call)) {
+        case IPC_M_PHONE_HUNGUP:
+            printf("Phone (%P) hung up.\n", phonehash);
+            retval = 0;
+            break;
+        default:
+            printf("Received message from %P: %X\n", phonehash,callid);
+            for (i=0; i < 1024; i++)
+                if (!callids[i]) {
+                    callids[i] = callid;
+                    break;
+                }
+            continue;
+        }
+        ipc_answer_fast(callid, retval, 0, 0);
+    }
+}
+static void printhelp(void)
+{
+    printf("? - help\n");
+    printf("c - connect to other service\n");
+    printf("h - hangup connection\n");
+    printf("a - send async message to other service\n");
+    printf("s - send sync message to other service\n");
+    printf("d - answer message that we have received\n");
+    printf("j - jump to endless loop\n");
+    printf("p - page fault\n");
+    printf("u - unaligned read\n");
+}
+static void callback(void *private, int retval, ipc_call_t *data)
+{
+    printf("Received response to msg %d - retval: %d.\n", private,
+           retval);
+}
+static void do_answer_msg(void)
+{
+    int i,cnt, errn = 0;
+    char c;
+    cnt = 0;
+    for (i=0;i < 50;i++) {
+        if (callids[i]) {
+            printf("%d: %P\n", cnt, callids[i]);
+            cnt++;
+        }
+        if (cnt >= 10)
+            break;
+    }
+    if (!cnt)
+        return;
+    printf("Choose message:\n");
+    do {
+        c = getchar();
+    } while (c < '0' || (c-'0') >= cnt);
+    cnt = c - '0' + 1;
+    for (i=0;cnt;i++)
+        if (callids[i])
+            cnt--;
+    i -= 1;
+    printf("Normal (n) or hangup (h) or error(e) message?\n");
+    do {
+        c = getchar();
+    } while (c != 'n' && c != 'h' && c != 'e');
+    if (c == 'n')
+        errn = 0;
+    else if (c == 'h')
+        errn = EHANGUP;
+    else if (c == 'e')
+        errn = ENOENT;
+    printf("Answering %P\n", callids[i]);
+    ipc_answer_fast(callids[i], errn, 0, 0);
+    callids[i] = 0;
+}
+static void do_send_msg(int async)
+{
+    int phoneid;
+    int res;
+    static int msgid = 1;
+    char c;
+    printf("Select phoneid to send msg: 2-9\n");
+    do {
+        c = getchar();
+    } while (c < '2' || c > '9');
+    phoneid = c - '0';
+    if (async) {
+        ipc_call_async(phoneid, 2000, 0, (void *)msgid, callback, 1);
+        printf("Async sent - msg %d\n", msgid);
+        msgid++;
+    } else {
+        printf("Sending msg...");
+        res = ipc_call_sync_2(phoneid, 2000, 0, 0, NULL, NULL);
+        printf("done: %d\n", res);
+    }
+}
+static void do_hangup(void)
+{
+    char c;
+    int res;
+    int phoneid;
+    printf("Select phoneid to hangup: 2-9\n");
+    do {
+        c = getchar();
+    } while (c < '2' || c > '9');
+    phoneid = c - '0';
+    printf("Hanging up...");
+    res = ipc_hangup(phoneid);
+    printf("done: %d\n", phoneid);
+}
+static void do_connect(void)
+{
+    char c;
+    int svc;
+    int phid;
+    printf("Choose one service: 0:10000....9:10009\n");
+    do {
+        c = getchar();
+    } while (c < '0' || c > '9');
+    svc = TEST_START + c - '0';
+    if (svc == myservice) {
+        printf("Currently cannot connect to myself, update test\n");
+        return;
+    }
+    printf("Connecting to %d..", svc);
+    phid = ipc_connect_me_to(PHONE_NS, svc, 0);
+    if (phid > 0) {
+        printf("phoneid: %d\n", phid);
+        phones[phid] = 1;
+    } else
+        printf("error: %d\n", phid);
+}
+int main(void)
+{
+    ipcarg_t phonead;
+    int i;
+    char c;
+    int res;
+    volatile long long var;
+    volatile int var1;
+    printf("********************************\n");
+    printf("***********IPC Tester***********\n");
+    printf("********************************\n");
+    async_set_client_connection(client_connection);
+    for (i=TEST_START;i < TEST_START+10;i++) {
+        res = ipc_connect_to_me(PHONE_NS, i, 0, &phonead);
+        if (!res)
+            break;
+        printf("Failed registering as %d..:%d\n", i, res);
+    }
+    printf("Registered as service: %d\n", i);
+    myservice = i;
+    printhelp();
+    while (1) {
+        c = getchar();
+        switch (c) {
+        case '?':
+            printhelp();
+            break;
+        case 'h':
+            do_hangup();
+            break;
+        case 'c':
+            do_connect();
+            break;
+        case 'a':
+            do_send_msg(1);
+            break;
+        case 's':
+            do_send_msg(0);
+            break;
+        case 'd':
+            do_answer_msg();
+            break;
+        case 'j':
+            while (1)
+                ;
+        case 'p':
+            printf("Doing page fault\n");
+            *((char *)0) = 1;
+            printf("done\n");
+        case 'u':
+            var1=*( (int *) ( ( (char *)(&var) ) + 1 ) );
+            break;
+        }
+    }
+}
+/** @}
+ */

 /tags/0.2.0.2/uspace/ipcc/Makefile
 ,0 → 1,73
+#
+# Copyright (C) 2005 Martin Decky
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# - Redistributions of source code must retain the above copyright
+#   notice, this list of conditions and the following disclaimer.
+# - Redistributions in binary form must reproduce the above copyright
+#   notice, this list of conditions and the following disclaimer in the
+#   documentation and/or other materials provided with the distribution.
+# - The name of the author may not be used to endorse or promote products
+#   derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+## Setup toolchain
+#
+LIBC_PREFIX = ../libc
+SOFTINT_PREFIX = ../softint
+include $(LIBC_PREFIX)/Makefile.toolchain
+CFLAGS += -I../kbd/include
+LIBS = $(LIBC_PREFIX)/libc.a
+## Sources
+#
+OUTPUT = ipcc
+SOURCES = ipcc.c
+OBJECTS := $(addsuffix .o,$(basename $(SOURCES)))
+.PHONY: all clean depend disasm
+all: $(OUTPUT) disasm
+-include Makefile.depend
+clean:
+    -rm -f $(OUTPUT) $(OUTPUT).map $(OUTPUT).disasm Makefile.depend
+depend:
+    $(CC) $(DEFS) $(CFLAGS) -M $(SOURCES) > Makefile.depend
+$(OUTPUT): $(OBJECTS) $(LIBS)
+    $(LD) -T $(LIBC_PREFIX)/arch/$(ARCH)/_link.ld $(OBJECTS) $(LIBS) $(LFLAGS) -o $@ -Map $(OUTPUT).map
+disasm:
+    $(OBJDUMP) -d $(OUTPUT) >$(OUTPUT).disasm
+%.o: %.S
+    $(CC) $(DEFS) $(AFLAGS) $(CFLAGS) -D__ASM__ -c $< -o $@
+%.o: %.s
+    $(AS) $(AFLAGS) $< -o $@
+%.o: %.c
+    $(CC) $(DEFS) $(CFLAGS) -c $< -o $@

/tags/0.2.0.2/boot/trunk/arch/amd64/grub/stage2_eltorito
Cannot display: file marked as a binary type.
svn:mime-type = application/octet-stream
Property changes:
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 /tags/0.2.0.2/boot/tools/ppc32/font-8x16.h
 ,0 → 1,38
+/*
+ * Copyright (C) 2005 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#ifndef __FONT_8X16_H__
+#define __FONT_8X16_H__
+#define FONT_GLIPHS     256
+#define FONT_SCANLINES  16
+#define FONT_WIDTH      8
+extern unsigned char fb_font[FONT_GLIPHS * FONT_SCANLINES];
+#endif

 /tags/0.2.0.2/boot/tools/ppc32/debug.c
 ,0 → 1,68
+#include "font-8x16.h"
+#define FB_REG "r8"
+#define SCAN_REG "r9"
+#define ADDR_REG "r10"
+#define FG_REG "r11"
+#define BG_REG "r12"
+#define FG_COLOR 0xffffffff
+#define BG_COLOR 0x00000000
+#define BPP 4
+void print_macro_init(void) {
+    printf(".macro DEBUG_INIT\n");
+    printf("#ifdef CONFIG_DEBUG\n");
+    printf("\tlis %s, %d\n", FG_REG, FG_COLOR >> 16);
+    printf("\tori %s, %s, %d\n", FG_REG, FG_REG, FG_COLOR & 0xffff);
+    printf("\t\n");
+    printf("\tlis %s, %d\n", BG_REG, BG_COLOR >> 16);
+    printf("\tori %s, %s, %d\n", BG_REG, BG_REG, BG_COLOR & 0xffff);
+    printf("\t\n");
+    printf("\tmr %s, %s\n", ADDR_REG, FB_REG);
+    printf("#endif\n");
+    printf(".endm\n");
+}
+void print_macro(const char *name) {
+    printf(".macro DEBUG_%s\n", name);
+    printf("#ifdef CONFIG_DEBUG\n");
+    unsigned int y;
+    for (y = 0; y < FONT_SCANLINES; y++) {
+        printf("\t\n");
+        if (y > 0)
+            printf("\tadd %s, %s, %s\n", ADDR_REG, ADDR_REG, SCAN_REG);
+        unsigned int i;
+        for (i = 0; name[i] != 0; i++) {
+            char c = name[i];
+            unsigned int x;
+            for (x = 0; x < FONT_WIDTH; x++) {
+                if (((fb_font[c * FONT_SCANLINES + y] >> (FONT_WIDTH - x)) & 1) == 1)
+                    printf("\tstw %s, %d(%s)\n", FG_REG, (i * FONT_WIDTH + x) * BPP, ADDR_REG);
+                else
+                    printf("\tstw %s, %d(%s)\n", BG_REG, (i * FONT_WIDTH + x) * BPP, ADDR_REG);
+            }
+        }
+    }
+    printf("#endif\n");
+    printf(".endm\n");
+}
+int main(int argc, char *argv[]) {
+    print_macro_init();
+    int i;
+    for (i = 1; i < argc; i++) {
+        printf("\n");
+        print_macro(argv[i]);
+    }
+    return 0;
+}

 /tags/0.2.0.2/boot/tools/ppc32/font-8x16.c
 ,0 → 1,4641
+/*
+ * Copyright (C) 2005 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#include "font-8x16.h"
+unsigned char fb_font[FONT_GLIPHS * FONT_SCANLINES] = {
+    /* 0 0x00 '^@' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 1 0x01 '^A' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x7e, /* 01111110 */
+x81, /* 10000001 */
+xa5, /* 10100101 */
+x81, /* 10000001 */
+x81, /* 10000001 */
+xbd, /* 10111101 */
+x99, /* 10011001 */
+x81, /* 10000001 */
+x81, /* 10000001 */
+x7e, /* 01111110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 2 0x02 '^B' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x7e, /* 01111110 */
+xff, /* 11111111 */
+xdb, /* 11011011 */
+xff, /* 11111111 */
+xff, /* 11111111 */
+xc3, /* 11000011 */
+xe7, /* 11100111 */
+xff, /* 11111111 */
+xff, /* 11111111 */
+x7e, /* 01111110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 3 0x03 '^C' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x6c, /* 01101100 */
+xfe, /* 11111110 */
+xfe, /* 11111110 */
+xfe, /* 11111110 */
+xfe, /* 11111110 */
+x7c, /* 01111100 */
+x38, /* 00111000 */
+x10, /* 00010000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 4 0x04 '^D' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x10, /* 00010000 */
+x38, /* 00111000 */
+x7c, /* 01111100 */
+xfe, /* 11111110 */
+x7c, /* 01111100 */
+x38, /* 00111000 */
+x10, /* 00010000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 5 0x05 '^E' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x18, /* 00011000 */
+x3c, /* 00111100 */
+x3c, /* 00111100 */
+xe7, /* 11100111 */
+xe7, /* 11100111 */
+xe7, /* 11100111 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x3c, /* 00111100 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 6 0x06 '^F' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x18, /* 00011000 */
+x3c, /* 00111100 */
+x7e, /* 01111110 */
+xff, /* 11111111 */
+xff, /* 11111111 */
+x7e, /* 01111110 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x3c, /* 00111100 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 7 0x07 '^G' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x18, /* 00011000 */
+x3c, /* 00111100 */
+x3c, /* 00111100 */
+x18, /* 00011000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 8 0x08 '^H' */
+xff, /* 11111111 */
+xff, /* 11111111 */
+xff, /* 11111111 */
+xff, /* 11111111 */
+xff, /* 11111111 */
+xff, /* 11111111 */
+xe7, /* 11100111 */
+xc3, /* 11000011 */
+xc3, /* 11000011 */
+xe7, /* 11100111 */
+xff, /* 11111111 */
+xff, /* 11111111 */
+xff, /* 11111111 */
+xff, /* 11111111 */
+xff, /* 11111111 */
+xff, /* 11111111 */
+    /* 9 0x09 '^I' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x3c, /* 00111100 */
+x66, /* 01100110 */
+x42, /* 01000010 */
+x42, /* 01000010 */
+x66, /* 01100110 */
+x3c, /* 00111100 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 10 0x0a '^J' */
+xff, /* 11111111 */
+xff, /* 11111111 */
+xff, /* 11111111 */
+xff, /* 11111111 */
+xff, /* 11111111 */
+xc3, /* 11000011 */
+x99, /* 10011001 */
+xbd, /* 10111101 */
+xbd, /* 10111101 */
+x99, /* 10011001 */
+xc3, /* 11000011 */
+xff, /* 11111111 */
+xff, /* 11111111 */
+xff, /* 11111111 */
+xff, /* 11111111 */
+xff, /* 11111111 */
+    /* 11 0x0b '^K' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x1e, /* 00011110 */
+x0e, /* 00001110 */
+x1a, /* 00011010 */
+x32, /* 00110010 */
+x78, /* 01111000 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+x78, /* 01111000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 12 0x0c '^L' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x3c, /* 00111100 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+x3c, /* 00111100 */
+x18, /* 00011000 */
+x7e, /* 01111110 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 13 0x0d '^M' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x3f, /* 00111111 */
+x33, /* 00110011 */
+x3f, /* 00111111 */
+x30, /* 00110000 */
+x30, /* 00110000 */
+x30, /* 00110000 */
+x30, /* 00110000 */
+x70, /* 01110000 */
+xf0, /* 11110000 */
+xe0, /* 11100000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 14 0x0e '^N' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x7f, /* 01111111 */
+x63, /* 01100011 */
+x7f, /* 01111111 */
+x63, /* 01100011 */
+x63, /* 01100011 */
+x63, /* 01100011 */
+x63, /* 01100011 */
+x67, /* 01100111 */
+xe7, /* 11100111 */
+xe6, /* 11100110 */
+xc0, /* 11000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 15 0x0f '^O' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+xdb, /* 11011011 */
+x3c, /* 00111100 */
+xe7, /* 11100111 */
+x3c, /* 00111100 */
+xdb, /* 11011011 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 16 0x10 '^P' */
+x00, /* 00000000 */
+x80, /* 10000000 */
+xc0, /* 11000000 */
+xe0, /* 11100000 */
+xf0, /* 11110000 */
+xf8, /* 11111000 */
+xfe, /* 11111110 */
+xf8, /* 11111000 */
+xf0, /* 11110000 */
+xe0, /* 11100000 */
+xc0, /* 11000000 */
+x80, /* 10000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 17 0x11 '^Q' */
+x00, /* 00000000 */
+x02, /* 00000010 */
+x06, /* 00000110 */
+x0e, /* 00001110 */
+x1e, /* 00011110 */
+x3e, /* 00111110 */
+xfe, /* 11111110 */
+x3e, /* 00111110 */
+x1e, /* 00011110 */
+x0e, /* 00001110 */
+x06, /* 00000110 */
+x02, /* 00000010 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 18 0x12 '^R' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x18, /* 00011000 */
+x3c, /* 00111100 */
+x7e, /* 01111110 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x7e, /* 01111110 */
+x3c, /* 00111100 */
+x18, /* 00011000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 19 0x13 '^S' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+x00, /* 00000000 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 20 0x14 '^T' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x7f, /* 01111111 */
+xdb, /* 11011011 */
+xdb, /* 11011011 */
+xdb, /* 11011011 */
+x7b, /* 01111011 */
+x1b, /* 00011011 */
+x1b, /* 00011011 */
+x1b, /* 00011011 */
+x1b, /* 00011011 */
+x1b, /* 00011011 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 21 0x15 '^U' */
+x00, /* 00000000 */
+x7c, /* 01111100 */
+xc6, /* 11000110 */
+x60, /* 01100000 */
+x38, /* 00111000 */
+x6c, /* 01101100 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+x6c, /* 01101100 */
+x38, /* 00111000 */
+x0c, /* 00001100 */
+xc6, /* 11000110 */
+x7c, /* 01111100 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 22 0x16 '^V' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xfe, /* 11111110 */
+xfe, /* 11111110 */
+xfe, /* 11111110 */
+xfe, /* 11111110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 23 0x17 '^W' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x18, /* 00011000 */
+x3c, /* 00111100 */
+x7e, /* 01111110 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x7e, /* 01111110 */
+x3c, /* 00111100 */
+x18, /* 00011000 */
+x7e, /* 01111110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 24 0x18 '^X' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x18, /* 00011000 */
+x3c, /* 00111100 */
+x7e, /* 01111110 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 25 0x19 '^Y' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x7e, /* 01111110 */
+x3c, /* 00111100 */
+x18, /* 00011000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 26 0x1a '^Z' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x18, /* 00011000 */
+x0c, /* 00001100 */
+xfe, /* 11111110 */
+x0c, /* 00001100 */
+x18, /* 00011000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 27 0x1b '^[' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x30, /* 00110000 */
+x60, /* 01100000 */
+xfe, /* 11111110 */
+x60, /* 01100000 */
+x30, /* 00110000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 28 0x1c '^\' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xc0, /* 11000000 */
+xc0, /* 11000000 */
+xc0, /* 11000000 */
+xfe, /* 11111110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 29 0x1d '^]' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x28, /* 00101000 */
+x6c, /* 01101100 */
+xfe, /* 11111110 */
+x6c, /* 01101100 */
+x28, /* 00101000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 30 0x1e '^^' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x10, /* 00010000 */
+x38, /* 00111000 */
+x38, /* 00111000 */
+x7c, /* 01111100 */
+x7c, /* 01111100 */
+xfe, /* 11111110 */
+xfe, /* 11111110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 31 0x1f '^_' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xfe, /* 11111110 */
+xfe, /* 11111110 */
+x7c, /* 01111100 */
+x7c, /* 01111100 */
+x38, /* 00111000 */
+x38, /* 00111000 */
+x10, /* 00010000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 32 0x20 ' ' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 33 0x21 '!' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x18, /* 00011000 */
+x3c, /* 00111100 */
+x3c, /* 00111100 */
+x3c, /* 00111100 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x00, /* 00000000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 34 0x22 '"' */
+x00, /* 00000000 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+x24, /* 00100100 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 35 0x23 '#' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x6c, /* 01101100 */
+x6c, /* 01101100 */
+xfe, /* 11111110 */
+x6c, /* 01101100 */
+x6c, /* 01101100 */
+x6c, /* 01101100 */
+xfe, /* 11111110 */
+x6c, /* 01101100 */
+x6c, /* 01101100 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 36 0x24 '$' */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x7c, /* 01111100 */
+xc6, /* 11000110 */
+xc2, /* 11000010 */
+xc0, /* 11000000 */
+x7c, /* 01111100 */
+x06, /* 00000110 */
+x06, /* 00000110 */
+x86, /* 10000110 */
+xc6, /* 11000110 */
+x7c, /* 01111100 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 37 0x25 '%' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xc2, /* 11000010 */
+xc6, /* 11000110 */
+x0c, /* 00001100 */
+x18, /* 00011000 */
+x30, /* 00110000 */
+x60, /* 01100000 */
+xc6, /* 11000110 */
+x86, /* 10000110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 38 0x26 '&' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x38, /* 00111000 */
+x6c, /* 01101100 */
+x6c, /* 01101100 */
+x38, /* 00111000 */
+x76, /* 01110110 */
+xdc, /* 11011100 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+x76, /* 01110110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 39 0x27 ''' */
+x00, /* 00000000 */
+x30, /* 00110000 */
+x30, /* 00110000 */
+x30, /* 00110000 */
+x60, /* 01100000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 40 0x28 '(' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x0c, /* 00001100 */
+x18, /* 00011000 */
+x30, /* 00110000 */
+x30, /* 00110000 */
+x30, /* 00110000 */
+x30, /* 00110000 */
+x30, /* 00110000 */
+x30, /* 00110000 */
+x18, /* 00011000 */
+x0c, /* 00001100 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 41 0x29 ')' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x30, /* 00110000 */
+x18, /* 00011000 */
+x0c, /* 00001100 */
+x0c, /* 00001100 */
+x0c, /* 00001100 */
+x0c, /* 00001100 */
+x0c, /* 00001100 */
+x0c, /* 00001100 */
+x18, /* 00011000 */
+x30, /* 00110000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 42 0x2a '*' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x66, /* 01100110 */
+x3c, /* 00111100 */
+xff, /* 11111111 */
+x3c, /* 00111100 */
+x66, /* 01100110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 43 0x2b '+' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x7e, /* 01111110 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 44 0x2c ',' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x30, /* 00110000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 45 0x2d '-' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xfe, /* 11111110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 46 0x2e '.' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 47 0x2f '/' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x02, /* 00000010 */
+x06, /* 00000110 */
+x0c, /* 00001100 */
+x18, /* 00011000 */
+x30, /* 00110000 */
+x60, /* 01100000 */
+xc0, /* 11000000 */
+x80, /* 10000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 48 0x30 '0' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x38, /* 00111000 */
+x6c, /* 01101100 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xd6, /* 11010110 */
+xd6, /* 11010110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+x6c, /* 01101100 */
+x38, /* 00111000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 49 0x31 '1' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x18, /* 00011000 */
+x38, /* 00111000 */
+x78, /* 01111000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x7e, /* 01111110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 50 0x32 '2' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x7c, /* 01111100 */
+xc6, /* 11000110 */
+x06, /* 00000110 */
+x0c, /* 00001100 */
+x18, /* 00011000 */
+x30, /* 00110000 */
+x60, /* 01100000 */
+xc0, /* 11000000 */
+xc6, /* 11000110 */
+xfe, /* 11111110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 51 0x33 '3' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x7c, /* 01111100 */
+xc6, /* 11000110 */
+x06, /* 00000110 */
+x06, /* 00000110 */
+x3c, /* 00111100 */
+x06, /* 00000110 */
+x06, /* 00000110 */
+x06, /* 00000110 */
+xc6, /* 11000110 */
+x7c, /* 01111100 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 52 0x34 '4' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x0c, /* 00001100 */
+x1c, /* 00011100 */
+x3c, /* 00111100 */
+x6c, /* 01101100 */
+xcc, /* 11001100 */
+xfe, /* 11111110 */
+x0c, /* 00001100 */
+x0c, /* 00001100 */
+x0c, /* 00001100 */
+x1e, /* 00011110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 53 0x35 '5' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xfe, /* 11111110 */
+xc0, /* 11000000 */
+xc0, /* 11000000 */
+xc0, /* 11000000 */
+xfc, /* 11111100 */
+x06, /* 00000110 */
+x06, /* 00000110 */
+x06, /* 00000110 */
+xc6, /* 11000110 */
+x7c, /* 01111100 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 54 0x36 '6' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x38, /* 00111000 */
+x60, /* 01100000 */
+xc0, /* 11000000 */
+xc0, /* 11000000 */
+xfc, /* 11111100 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+x7c, /* 01111100 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 55 0x37 '7' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xfe, /* 11111110 */
+xc6, /* 11000110 */
+x06, /* 00000110 */
+x06, /* 00000110 */
+x0c, /* 00001100 */
+x18, /* 00011000 */
+x30, /* 00110000 */
+x30, /* 00110000 */
+x30, /* 00110000 */
+x30, /* 00110000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 56 0x38 '8' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x7c, /* 01111100 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+x7c, /* 01111100 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+x7c, /* 01111100 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 57 0x39 '9' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x7c, /* 01111100 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+x7e, /* 01111110 */
+x06, /* 00000110 */
+x06, /* 00000110 */
+x06, /* 00000110 */
+x0c, /* 00001100 */
+x78, /* 01111000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 58 0x3a ':' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 59 0x3b ';' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x30, /* 00110000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 60 0x3c '<' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x06, /* 00000110 */
+x0c, /* 00001100 */
+x18, /* 00011000 */
+x30, /* 00110000 */
+x60, /* 01100000 */
+x30, /* 00110000 */
+x18, /* 00011000 */
+x0c, /* 00001100 */
+x06, /* 00000110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 61 0x3d '=' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x7e, /* 01111110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x7e, /* 01111110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 62 0x3e '>' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x60, /* 01100000 */
+x30, /* 00110000 */
+x18, /* 00011000 */
+x0c, /* 00001100 */
+x06, /* 00000110 */
+x0c, /* 00001100 */
+x18, /* 00011000 */
+x30, /* 00110000 */
+x60, /* 01100000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 63 0x3f '?' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x7c, /* 01111100 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+x0c, /* 00001100 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x00, /* 00000000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 64 0x40 '@' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x7c, /* 01111100 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xde, /* 11011110 */
+xde, /* 11011110 */
+xde, /* 11011110 */
+xdc, /* 11011100 */
+xc0, /* 11000000 */
+x7c, /* 01111100 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 65 0x41 'A' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x10, /* 00010000 */
+x38, /* 00111000 */
+x6c, /* 01101100 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xfe, /* 11111110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 66 0x42 'B' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xfc, /* 11111100 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+x7c, /* 01111100 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+xfc, /* 11111100 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 67 0x43 'C' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x3c, /* 00111100 */
+x66, /* 01100110 */
+xc2, /* 11000010 */
+xc0, /* 11000000 */
+xc0, /* 11000000 */
+xc0, /* 11000000 */
+xc0, /* 11000000 */
+xc2, /* 11000010 */
+x66, /* 01100110 */
+x3c, /* 00111100 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 68 0x44 'D' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xf8, /* 11111000 */
+x6c, /* 01101100 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+x6c, /* 01101100 */
+xf8, /* 11111000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 69 0x45 'E' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xfe, /* 11111110 */
+x66, /* 01100110 */
+x62, /* 01100010 */
+x68, /* 01101000 */
+x78, /* 01111000 */
+x68, /* 01101000 */
+x60, /* 01100000 */
+x62, /* 01100010 */
+x66, /* 01100110 */
+xfe, /* 11111110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 70 0x46 'F' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xfe, /* 11111110 */
+x66, /* 01100110 */
+x62, /* 01100010 */
+x68, /* 01101000 */
+x78, /* 01111000 */
+x68, /* 01101000 */
+x60, /* 01100000 */
+x60, /* 01100000 */
+x60, /* 01100000 */
+xf0, /* 11110000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 71 0x47 'G' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x3c, /* 00111100 */
+x66, /* 01100110 */
+xc2, /* 11000010 */
+xc0, /* 11000000 */
+xc0, /* 11000000 */
+xde, /* 11011110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+x66, /* 01100110 */
+x3a, /* 00111010 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 72 0x48 'H' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xfe, /* 11111110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 73 0x49 'I' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x3c, /* 00111100 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x3c, /* 00111100 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 74 0x4a 'J' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x1e, /* 00011110 */
+x0c, /* 00001100 */
+x0c, /* 00001100 */
+x0c, /* 00001100 */
+x0c, /* 00001100 */
+x0c, /* 00001100 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+x78, /* 01111000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 75 0x4b 'K' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xe6, /* 11100110 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+x6c, /* 01101100 */
+x78, /* 01111000 */
+x78, /* 01111000 */
+x6c, /* 01101100 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+xe6, /* 11100110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 76 0x4c 'L' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xf0, /* 11110000 */
+x60, /* 01100000 */
+x60, /* 01100000 */
+x60, /* 01100000 */
+x60, /* 01100000 */
+x60, /* 01100000 */
+x60, /* 01100000 */
+x62, /* 01100010 */
+x66, /* 01100110 */
+xfe, /* 11111110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 77 0x4d 'M' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xc6, /* 11000110 */
+xee, /* 11101110 */
+xfe, /* 11111110 */
+xfe, /* 11111110 */
+xd6, /* 11010110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 78 0x4e 'N' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xc6, /* 11000110 */
+xe6, /* 11100110 */
+xf6, /* 11110110 */
+xfe, /* 11111110 */
+xde, /* 11011110 */
+xce, /* 11001110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 79 0x4f 'O' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x7c, /* 01111100 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+x7c, /* 01111100 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 80 0x50 'P' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xfc, /* 11111100 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+x7c, /* 01111100 */
+x60, /* 01100000 */
+x60, /* 01100000 */
+x60, /* 01100000 */
+x60, /* 01100000 */
+xf0, /* 11110000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 81 0x51 'Q' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x7c, /* 01111100 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xd6, /* 11010110 */
+xde, /* 11011110 */
+x7c, /* 01111100 */
+x0c, /* 00001100 */
+x0e, /* 00001110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 82 0x52 'R' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xfc, /* 11111100 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+x7c, /* 01111100 */
+x6c, /* 01101100 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+xe6, /* 11100110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 83 0x53 'S' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x7c, /* 01111100 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+x60, /* 01100000 */
+x38, /* 00111000 */
+x0c, /* 00001100 */
+x06, /* 00000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+x7c, /* 01111100 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 84 0x54 'T' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x7e, /* 01111110 */
+x7e, /* 01111110 */
+x5a, /* 01011010 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x3c, /* 00111100 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 85 0x55 'U' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+x7c, /* 01111100 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 86 0x56 'V' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+x6c, /* 01101100 */
+x38, /* 00111000 */
+x10, /* 00010000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 87 0x57 'W' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xd6, /* 11010110 */
+xd6, /* 11010110 */
+xd6, /* 11010110 */
+xfe, /* 11111110 */
+xee, /* 11101110 */
+x6c, /* 01101100 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 88 0x58 'X' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+x6c, /* 01101100 */
+x7c, /* 01111100 */
+x38, /* 00111000 */
+x38, /* 00111000 */
+x7c, /* 01111100 */
+x6c, /* 01101100 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 89 0x59 'Y' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+x3c, /* 00111100 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x3c, /* 00111100 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 90 0x5a 'Z' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xfe, /* 11111110 */
+xc6, /* 11000110 */
+x86, /* 10000110 */
+x0c, /* 00001100 */
+x18, /* 00011000 */
+x30, /* 00110000 */
+x60, /* 01100000 */
+xc2, /* 11000010 */
+xc6, /* 11000110 */
+xfe, /* 11111110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 91 0x5b '[' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x3c, /* 00111100 */
+x30, /* 00110000 */
+x30, /* 00110000 */
+x30, /* 00110000 */
+x30, /* 00110000 */
+x30, /* 00110000 */
+x30, /* 00110000 */
+x30, /* 00110000 */
+x30, /* 00110000 */
+x3c, /* 00111100 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 92 0x5c '\' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x80, /* 10000000 */
+xc0, /* 11000000 */
+xe0, /* 11100000 */
+x70, /* 01110000 */
+x38, /* 00111000 */
+x1c, /* 00011100 */
+x0e, /* 00001110 */
+x06, /* 00000110 */
+x02, /* 00000010 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 93 0x5d ']' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x3c, /* 00111100 */
+x0c, /* 00001100 */
+x0c, /* 00001100 */
+x0c, /* 00001100 */
+x0c, /* 00001100 */
+x0c, /* 00001100 */
+x0c, /* 00001100 */
+x0c, /* 00001100 */
+x0c, /* 00001100 */
+x3c, /* 00111100 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 94 0x5e '^' */
+x10, /* 00010000 */
+x38, /* 00111000 */
+x6c, /* 01101100 */
+xc6, /* 11000110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 95 0x5f '_' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xff, /* 11111111 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 96 0x60 '`' */
+x00, /* 00000000 */
+x30, /* 00110000 */
+x18, /* 00011000 */
+x0c, /* 00001100 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 97 0x61 'a' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x78, /* 01111000 */
+x0c, /* 00001100 */
+x7c, /* 01111100 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+x76, /* 01110110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 98 0x62 'b' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xe0, /* 11100000 */
+x60, /* 01100000 */
+x60, /* 01100000 */
+x78, /* 01111000 */
+x6c, /* 01101100 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+x7c, /* 01111100 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 99 0x63 'c' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x7c, /* 01111100 */
+xc6, /* 11000110 */
+xc0, /* 11000000 */
+xc0, /* 11000000 */
+xc0, /* 11000000 */
+xc6, /* 11000110 */
+x7c, /* 01111100 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 100 0x64 'd' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x1c, /* 00011100 */
+x0c, /* 00001100 */
+x0c, /* 00001100 */
+x3c, /* 00111100 */
+x6c, /* 01101100 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+x76, /* 01110110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 101 0x65 'e' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x7c, /* 01111100 */
+xc6, /* 11000110 */
+xfe, /* 11111110 */
+xc0, /* 11000000 */
+xc0, /* 11000000 */
+xc6, /* 11000110 */
+x7c, /* 01111100 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 102 0x66 'f' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x1c, /* 00011100 */
+x36, /* 00110110 */
+x32, /* 00110010 */
+x30, /* 00110000 */
+x78, /* 01111000 */
+x30, /* 00110000 */
+x30, /* 00110000 */
+x30, /* 00110000 */
+x30, /* 00110000 */
+x78, /* 01111000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 103 0x67 'g' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x76, /* 01110110 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+x7c, /* 01111100 */
+x0c, /* 00001100 */
+xcc, /* 11001100 */
+x78, /* 01111000 */
+x00, /* 00000000 */
+    /* 104 0x68 'h' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xe0, /* 11100000 */
+x60, /* 01100000 */
+x60, /* 01100000 */
+x6c, /* 01101100 */
+x76, /* 01110110 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+xe6, /* 11100110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 105 0x69 'i' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x00, /* 00000000 */
+x38, /* 00111000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x3c, /* 00111100 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 106 0x6a 'j' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x06, /* 00000110 */
+x06, /* 00000110 */
+x00, /* 00000000 */
+x0e, /* 00001110 */
+x06, /* 00000110 */
+x06, /* 00000110 */
+x06, /* 00000110 */
+x06, /* 00000110 */
+x06, /* 00000110 */
+x06, /* 00000110 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+x3c, /* 00111100 */
+x00, /* 00000000 */
+    /* 107 0x6b 'k' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xe0, /* 11100000 */
+x60, /* 01100000 */
+x60, /* 01100000 */
+x66, /* 01100110 */
+x6c, /* 01101100 */
+x78, /* 01111000 */
+x78, /* 01111000 */
+x6c, /* 01101100 */
+x66, /* 01100110 */
+xe6, /* 11100110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 108 0x6c 'l' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x38, /* 00111000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x3c, /* 00111100 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 109 0x6d 'm' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xec, /* 11101100 */
+xfe, /* 11111110 */
+xd6, /* 11010110 */
+xd6, /* 11010110 */
+xd6, /* 11010110 */
+xd6, /* 11010110 */
+xc6, /* 11000110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 110 0x6e 'n' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xdc, /* 11011100 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 111 0x6f 'o' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x7c, /* 01111100 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+x7c, /* 01111100 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 112 0x70 'p' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xdc, /* 11011100 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+x7c, /* 01111100 */
+x60, /* 01100000 */
+x60, /* 01100000 */
+xf0, /* 11110000 */
+x00, /* 00000000 */
+    /* 113 0x71 'q' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x76, /* 01110110 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+x7c, /* 01111100 */
+x0c, /* 00001100 */
+x0c, /* 00001100 */
+x1e, /* 00011110 */
+x00, /* 00000000 */
+    /* 114 0x72 'r' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xdc, /* 11011100 */
+x76, /* 01110110 */
+x66, /* 01100110 */
+x60, /* 01100000 */
+x60, /* 01100000 */
+x60, /* 01100000 */
+xf0, /* 11110000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 115 0x73 's' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x7c, /* 01111100 */
+xc6, /* 11000110 */
+x60, /* 01100000 */
+x38, /* 00111000 */
+x0c, /* 00001100 */
+xc6, /* 11000110 */
+x7c, /* 01111100 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 116 0x74 't' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x10, /* 00010000 */
+x30, /* 00110000 */
+x30, /* 00110000 */
+xfc, /* 11111100 */
+x30, /* 00110000 */
+x30, /* 00110000 */
+x30, /* 00110000 */
+x30, /* 00110000 */
+x36, /* 00110110 */
+x1c, /* 00011100 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 117 0x75 'u' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+x76, /* 01110110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 118 0x76 'v' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+x6c, /* 01101100 */
+x38, /* 00111000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 119 0x77 'w' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xd6, /* 11010110 */
+xd6, /* 11010110 */
+xd6, /* 11010110 */
+xfe, /* 11111110 */
+x6c, /* 01101100 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 120 0x78 'x' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xc6, /* 11000110 */
+x6c, /* 01101100 */
+x38, /* 00111000 */
+x38, /* 00111000 */
+x38, /* 00111000 */
+x6c, /* 01101100 */
+xc6, /* 11000110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 121 0x79 'y' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+x7e, /* 01111110 */
+x06, /* 00000110 */
+x0c, /* 00001100 */
+xf8, /* 11111000 */
+x00, /* 00000000 */
+    /* 122 0x7a 'z' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xfe, /* 11111110 */
+xcc, /* 11001100 */
+x18, /* 00011000 */
+x30, /* 00110000 */
+x60, /* 01100000 */
+xc6, /* 11000110 */
+xfe, /* 11111110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 123 0x7b '{' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x0e, /* 00001110 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x70, /* 01110000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x0e, /* 00001110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 124 0x7c '|' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 125 0x7d '}' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x70, /* 01110000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x0e, /* 00001110 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x70, /* 01110000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 126 0x7e '~' */
+x00, /* 00000000 */
+x76, /* 01110110 */
+xdc, /* 11011100 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 127 0x7f '' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x10, /* 00010000 */
+x38, /* 00111000 */
+x6c, /* 01101100 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xfe, /* 11111110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 128 0x80 '€' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x3c, /* 00111100 */
+x66, /* 01100110 */
+xc2, /* 11000010 */
+xc0, /* 11000000 */
+xc0, /* 11000000 */
+xc0, /* 11000000 */
+xc0, /* 11000000 */
+xc2, /* 11000010 */
+x66, /* 01100110 */
+x3c, /* 00111100 */
+x18, /* 00011000 */
+x70, /* 01110000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 129 0x81 '' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xcc, /* 11001100 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+x76, /* 01110110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 130 0x82 '‚' */
+x00, /* 00000000 */
+x0c, /* 00001100 */
+x18, /* 00011000 */
+x30, /* 00110000 */
+x00, /* 00000000 */
+x7c, /* 01111100 */
+xc6, /* 11000110 */
+xfe, /* 11111110 */
+xc0, /* 11000000 */
+xc0, /* 11000000 */
+xc6, /* 11000110 */
+x7c, /* 01111100 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 131 0x83 'ƒ' */
+x00, /* 00000000 */
+x10, /* 00010000 */
+x38, /* 00111000 */
+x6c, /* 01101100 */
+x00, /* 00000000 */
+x78, /* 01111000 */
+x0c, /* 00001100 */
+x7c, /* 01111100 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+x76, /* 01110110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 132 0x84 '„' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xcc, /* 11001100 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x78, /* 01111000 */
+x0c, /* 00001100 */
+x7c, /* 01111100 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+x76, /* 01110110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 133 0x85 '…' */
+x00, /* 00000000 */
+x60, /* 01100000 */
+x30, /* 00110000 */
+x18, /* 00011000 */
+x00, /* 00000000 */
+x78, /* 01111000 */
+x0c, /* 00001100 */
+x7c, /* 01111100 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+x76, /* 01110110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 134 0x86 '†' */
+x00, /* 00000000 */
+x38, /* 00111000 */
+x6c, /* 01101100 */
+x38, /* 00111000 */
+x00, /* 00000000 */
+x78, /* 01111000 */
+x0c, /* 00001100 */
+x7c, /* 01111100 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+x76, /* 01110110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 135 0x87 '‡' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x7c, /* 01111100 */
+xc6, /* 11000110 */
+xc0, /* 11000000 */
+xc0, /* 11000000 */
+xc0, /* 11000000 */
+xc6, /* 11000110 */
+x7c, /* 01111100 */
+x18, /* 00011000 */
+x70, /* 01110000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 136 0x88 'ˆ' */
+x00, /* 00000000 */
+x10, /* 00010000 */
+x38, /* 00111000 */
+x6c, /* 01101100 */
+x00, /* 00000000 */
+x7c, /* 01111100 */
+xc6, /* 11000110 */
+xfe, /* 11111110 */
+xc0, /* 11000000 */
+xc0, /* 11000000 */
+xc6, /* 11000110 */
+x7c, /* 01111100 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 137 0x89 '‰' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xc6, /* 11000110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x7c, /* 01111100 */
+xc6, /* 11000110 */
+xfe, /* 11111110 */
+xc0, /* 11000000 */
+xc0, /* 11000000 */
+xc6, /* 11000110 */
+x7c, /* 01111100 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 138 0x8a 'Š' */
+x00, /* 00000000 */
+x60, /* 01100000 */
+x30, /* 00110000 */
+x18, /* 00011000 */
+x00, /* 00000000 */
+x7c, /* 01111100 */
+xc6, /* 11000110 */
+xfe, /* 11111110 */
+xc0, /* 11000000 */
+xc0, /* 11000000 */
+xc6, /* 11000110 */
+x7c, /* 01111100 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 139 0x8b '‹' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x66, /* 01100110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x38, /* 00111000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x3c, /* 00111100 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 140 0x8c 'Œ' */
+x00, /* 00000000 */
+x18, /* 00011000 */
+x3c, /* 00111100 */
+x66, /* 01100110 */
+x00, /* 00000000 */
+x38, /* 00111000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x3c, /* 00111100 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 141 0x8d '' */
+x00, /* 00000000 */
+x60, /* 01100000 */
+x30, /* 00110000 */
+x18, /* 00011000 */
+x00, /* 00000000 */
+x38, /* 00111000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x3c, /* 00111100 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 142 0x8e 'Ž' */
+x00, /* 00000000 */
+xc6, /* 11000110 */
+x00, /* 00000000 */
+x10, /* 00010000 */
+x38, /* 00111000 */
+x6c, /* 01101100 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xfe, /* 11111110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 143 0x8f '' */
+x38, /* 00111000 */
+x6c, /* 01101100 */
+x38, /* 00111000 */
+x10, /* 00010000 */
+x38, /* 00111000 */
+x6c, /* 01101100 */
+xc6, /* 11000110 */
+xfe, /* 11111110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 144 0x90 '' */
+x0c, /* 00001100 */
+x18, /* 00011000 */
+x00, /* 00000000 */
+xfe, /* 11111110 */
+x66, /* 01100110 */
+x62, /* 01100010 */
+x68, /* 01101000 */
+x78, /* 01111000 */
+x68, /* 01101000 */
+x62, /* 01100010 */
+x66, /* 01100110 */
+xfe, /* 11111110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 145 0x91 '‘' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xec, /* 11101100 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x7e, /* 01111110 */
+xd8, /* 11011000 */
+xd8, /* 11011000 */
+x6e, /* 01101110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 146 0x92 '’' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x3e, /* 00111110 */
+x6c, /* 01101100 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+xfe, /* 11111110 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+xce, /* 11001110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 147 0x93 '“' */
+x00, /* 00000000 */
+x10, /* 00010000 */
+x38, /* 00111000 */
+x6c, /* 01101100 */
+x00, /* 00000000 */
+x7c, /* 01111100 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+x7c, /* 01111100 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 148 0x94 '”' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xc6, /* 11000110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x7c, /* 01111100 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+x7c, /* 01111100 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 149 0x95 '•' */
+x00, /* 00000000 */
+x60, /* 01100000 */
+x30, /* 00110000 */
+x18, /* 00011000 */
+x00, /* 00000000 */
+x7c, /* 01111100 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+x7c, /* 01111100 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 150 0x96 '–' */
+x00, /* 00000000 */
+x30, /* 00110000 */
+x78, /* 01111000 */
+xcc, /* 11001100 */
+x00, /* 00000000 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+x76, /* 01110110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 151 0x97 '—' */
+x00, /* 00000000 */
+x60, /* 01100000 */
+x30, /* 00110000 */
+x18, /* 00011000 */
+x00, /* 00000000 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+x76, /* 01110110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 152 0x98 '˜' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xc6, /* 11000110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+x7e, /* 01111110 */
+x06, /* 00000110 */
+x0c, /* 00001100 */
+x78, /* 01111000 */
+x00, /* 00000000 */
+    /* 153 0x99 '™' */
+x00, /* 00000000 */
+xc6, /* 11000110 */
+x00, /* 00000000 */
+x7c, /* 01111100 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+x7c, /* 01111100 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 154 0x9a 'š' */
+x00, /* 00000000 */
+xc6, /* 11000110 */
+x00, /* 00000000 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+x7c, /* 01111100 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 155 0x9b '›' */
+x00, /* 00000000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x7c, /* 01111100 */
+xc6, /* 11000110 */
+xc0, /* 11000000 */
+xc0, /* 11000000 */
+xc0, /* 11000000 */
+xc6, /* 11000110 */
+x7c, /* 01111100 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 156 0x9c 'œ' */
+x00, /* 00000000 */
+x38, /* 00111000 */
+x6c, /* 01101100 */
+x64, /* 01100100 */
+x60, /* 01100000 */
+xf0, /* 11110000 */
+x60, /* 01100000 */
+x60, /* 01100000 */
+x60, /* 01100000 */
+x60, /* 01100000 */
+xe6, /* 11100110 */
+xfc, /* 11111100 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 157 0x9d '' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+x3c, /* 00111100 */
+x18, /* 00011000 */
+x7e, /* 01111110 */
+x18, /* 00011000 */
+x7e, /* 01111110 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 158 0x9e 'ž' */
+x00, /* 00000000 */
+xf8, /* 11111000 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+xf8, /* 11111000 */
+xc4, /* 11000100 */
+xcc, /* 11001100 */
+xde, /* 11011110 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+xc6, /* 11000110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 159 0x9f 'Ÿ' */
+x00, /* 00000000 */
+x0e, /* 00001110 */
+x1b, /* 00011011 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x7e, /* 01111110 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+xd8, /* 11011000 */
+x70, /* 01110000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 160 0xa0 ' ' */
+x00, /* 00000000 */
+x18, /* 00011000 */
+x30, /* 00110000 */
+x60, /* 01100000 */
+x00, /* 00000000 */
+x78, /* 01111000 */
+x0c, /* 00001100 */
+x7c, /* 01111100 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+x76, /* 01110110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 161 0xa1 '¡' */
+x00, /* 00000000 */
+x0c, /* 00001100 */
+x18, /* 00011000 */
+x30, /* 00110000 */
+x00, /* 00000000 */
+x38, /* 00111000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x3c, /* 00111100 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 162 0xa2 '¢' */
+x00, /* 00000000 */
+x18, /* 00011000 */
+x30, /* 00110000 */
+x60, /* 01100000 */
+x00, /* 00000000 */
+x7c, /* 01111100 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+x7c, /* 01111100 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 163 0xa3 '£' */
+x00, /* 00000000 */
+x18, /* 00011000 */
+x30, /* 00110000 */
+x60, /* 01100000 */
+x00, /* 00000000 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+x76, /* 01110110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 164 0xa4 '¤' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x76, /* 01110110 */
+xdc, /* 11011100 */
+x00, /* 00000000 */
+xdc, /* 11011100 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 165 0xa5 '¥' */
+x76, /* 01110110 */
+xdc, /* 11011100 */
+x00, /* 00000000 */
+xc6, /* 11000110 */
+xe6, /* 11100110 */
+xf6, /* 11110110 */
+xfe, /* 11111110 */
+xde, /* 11011110 */
+xce, /* 11001110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 166 0xa6 '¦' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x3c, /* 00111100 */
+x6c, /* 01101100 */
+x6c, /* 01101100 */
+x3e, /* 00111110 */
+x00, /* 00000000 */
+x7e, /* 01111110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 167 0xa7 '§' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x38, /* 00111000 */
+x6c, /* 01101100 */
+x6c, /* 01101100 */
+x38, /* 00111000 */
+x00, /* 00000000 */
+x7c, /* 01111100 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 168 0xa8 '¨' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x30, /* 00110000 */
+x30, /* 00110000 */
+x00, /* 00000000 */
+x30, /* 00110000 */
+x30, /* 00110000 */
+x60, /* 01100000 */
+xc0, /* 11000000 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+x7c, /* 01111100 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 169 0xa9 '©' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xfe, /* 11111110 */
+xc0, /* 11000000 */
+xc0, /* 11000000 */
+xc0, /* 11000000 */
+xc0, /* 11000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 170 0xaa 'ª' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xfe, /* 11111110 */
+x06, /* 00000110 */
+x06, /* 00000110 */
+x06, /* 00000110 */
+x06, /* 00000110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 171 0xab '«' */
+x00, /* 00000000 */
+x60, /* 01100000 */
+xe0, /* 11100000 */
+x62, /* 01100010 */
+x66, /* 01100110 */
+x6c, /* 01101100 */
+x18, /* 00011000 */
+x30, /* 00110000 */
+x60, /* 01100000 */
+xdc, /* 11011100 */
+x86, /* 10000110 */
+x0c, /* 00001100 */
+x18, /* 00011000 */
+x3e, /* 00111110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 172 0xac '¬' */
+x00, /* 00000000 */
+x60, /* 01100000 */
+xe0, /* 11100000 */
+x62, /* 01100010 */
+x66, /* 01100110 */
+x6c, /* 01101100 */
+x18, /* 00011000 */
+x30, /* 00110000 */
+x66, /* 01100110 */
+xce, /* 11001110 */
+x9a, /* 10011010 */
+x3f, /* 00111111 */
+x06, /* 00000110 */
+x06, /* 00000110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 173 0xad '' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x00, /* 00000000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x3c, /* 00111100 */
+x3c, /* 00111100 */
+x3c, /* 00111100 */
+x18, /* 00011000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 174 0xae '®' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x36, /* 00110110 */
+x6c, /* 01101100 */
+xd8, /* 11011000 */
+x6c, /* 01101100 */
+x36, /* 00110110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 175 0xaf '¯' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xd8, /* 11011000 */
+x6c, /* 01101100 */
+x36, /* 00110110 */
+x6c, /* 01101100 */
+xd8, /* 11011000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 176 0xb0 '°' */
+x11, /* 00010001 */
+x44, /* 01000100 */
+x11, /* 00010001 */
+x44, /* 01000100 */
+x11, /* 00010001 */
+x44, /* 01000100 */
+x11, /* 00010001 */
+x44, /* 01000100 */
+x11, /* 00010001 */
+x44, /* 01000100 */
+x11, /* 00010001 */
+x44, /* 01000100 */
+x11, /* 00010001 */
+x44, /* 01000100 */
+x11, /* 00010001 */
+x44, /* 01000100 */
+    /* 177 0xb1 '±' */
+x55, /* 01010101 */
+xaa, /* 10101010 */
+x55, /* 01010101 */
+xaa, /* 10101010 */
+x55, /* 01010101 */
+xaa, /* 10101010 */
+x55, /* 01010101 */
+xaa, /* 10101010 */
+x55, /* 01010101 */
+xaa, /* 10101010 */
+x55, /* 01010101 */
+xaa, /* 10101010 */
+x55, /* 01010101 */
+xaa, /* 10101010 */
+x55, /* 01010101 */
+xaa, /* 10101010 */
+    /* 178 0xb2 '²' */
+xdd, /* 11011101 */
+x77, /* 01110111 */
+xdd, /* 11011101 */
+x77, /* 01110111 */
+xdd, /* 11011101 */
+x77, /* 01110111 */
+xdd, /* 11011101 */
+x77, /* 01110111 */
+xdd, /* 11011101 */
+x77, /* 01110111 */
+xdd, /* 11011101 */
+x77, /* 01110111 */
+xdd, /* 11011101 */
+x77, /* 01110111 */
+xdd, /* 11011101 */
+x77, /* 01110111 */
+    /* 179 0xb3 '³' */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+    /* 180 0xb4 '´' */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+xf8, /* 11111000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+    /* 181 0xb5 'µ' */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+xf8, /* 11111000 */
+x18, /* 00011000 */
+xf8, /* 11111000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+    /* 182 0xb6 '¶' */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+xf6, /* 11110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+    /* 183 0xb7 '·' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xfe, /* 11111110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+    /* 184 0xb8 '¸' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xf8, /* 11111000 */
+x18, /* 00011000 */
+xf8, /* 11111000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+    /* 185 0xb9 '¹' */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+xf6, /* 11110110 */
+x06, /* 00000110 */
+xf6, /* 11110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+    /* 186 0xba 'º' */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+    /* 187 0xbb '»' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xfe, /* 11111110 */
+x06, /* 00000110 */
+xf6, /* 11110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+    /* 188 0xbc '¼' */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+xf6, /* 11110110 */
+x06, /* 00000110 */
+xfe, /* 11111110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 189 0xbd '½' */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+xfe, /* 11111110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 190 0xbe '¾' */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+xf8, /* 11111000 */
+x18, /* 00011000 */
+xf8, /* 11111000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 191 0xbf '¿' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xf8, /* 11111000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+    /* 192 0xc0 'À' */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x1f, /* 00011111 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 193 0xc1 'Á' */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+xff, /* 11111111 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 194 0xc2 'Â' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xff, /* 11111111 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+    /* 195 0xc3 'Ã' */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x1f, /* 00011111 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+    /* 196 0xc4 'Ä' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xff, /* 11111111 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 197 0xc5 'Å' */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+xff, /* 11111111 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+    /* 198 0xc6 'Æ' */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x1f, /* 00011111 */
+x18, /* 00011000 */
+x1f, /* 00011111 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+    /* 199 0xc7 'Ç' */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x37, /* 00110111 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+    /* 200 0xc8 'È' */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x37, /* 00110111 */
+x30, /* 00110000 */
+x3f, /* 00111111 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 201 0xc9 'É' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x3f, /* 00111111 */
+x30, /* 00110000 */
+x37, /* 00110111 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+    /* 202 0xca 'Ê' */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+xf7, /* 11110111 */
+x00, /* 00000000 */
+xff, /* 11111111 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 203 0xcb 'Ë' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xff, /* 11111111 */
+x00, /* 00000000 */
+xf7, /* 11110111 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+    /* 204 0xcc 'Ì' */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x37, /* 00110111 */
+x30, /* 00110000 */
+x37, /* 00110111 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+    /* 205 0xcd 'Í' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xff, /* 11111111 */
+x00, /* 00000000 */
+xff, /* 11111111 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 206 0xce 'Î' */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+xf7, /* 11110111 */
+x00, /* 00000000 */
+xf7, /* 11110111 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+    /* 207 0xcf 'Ï' */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+xff, /* 11111111 */
+x00, /* 00000000 */
+xff, /* 11111111 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 208 0xd0 'Ð' */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+xff, /* 11111111 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 209 0xd1 'Ñ' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xff, /* 11111111 */
+x00, /* 00000000 */
+xff, /* 11111111 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+    /* 210 0xd2 'Ò' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xff, /* 11111111 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+    /* 211 0xd3 'Ó' */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x3f, /* 00111111 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 212 0xd4 'Ô' */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x1f, /* 00011111 */
+x18, /* 00011000 */
+x1f, /* 00011111 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 213 0xd5 'Õ' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x1f, /* 00011111 */
+x18, /* 00011000 */
+x1f, /* 00011111 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+    /* 214 0xd6 'Ö' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x3f, /* 00111111 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+    /* 215 0xd7 '×' */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+xff, /* 11111111 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+    /* 216 0xd8 'Ø' */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+xff, /* 11111111 */
+x18, /* 00011000 */
+xff, /* 11111111 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+    /* 217 0xd9 'Ù' */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+xf8, /* 11111000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 218 0xda 'Ú' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x1f, /* 00011111 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+    /* 219 0xdb 'Û' */
+xff, /* 11111111 */
+xff, /* 11111111 */
+xff, /* 11111111 */
+xff, /* 11111111 */
+xff, /* 11111111 */
+xff, /* 11111111 */
+xff, /* 11111111 */
+xff, /* 11111111 */
+xff, /* 11111111 */
+xff, /* 11111111 */
+xff, /* 11111111 */
+xff, /* 11111111 */
+xff, /* 11111111 */
+xff, /* 11111111 */
+xff, /* 11111111 */
+xff, /* 11111111 */
+    /* 220 0xdc 'Ü' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xff, /* 11111111 */
+xff, /* 11111111 */
+xff, /* 11111111 */
+xff, /* 11111111 */
+xff, /* 11111111 */
+xff, /* 11111111 */
+xff, /* 11111111 */
+xff, /* 11111111 */
+xff, /* 11111111 */
+    /* 221 0xdd 'Ý' */
+xf0, /* 11110000 */
+xf0, /* 11110000 */
+xf0, /* 11110000 */
+xf0, /* 11110000 */
+xf0, /* 11110000 */
+xf0, /* 11110000 */
+xf0, /* 11110000 */
+xf0, /* 11110000 */
+xf0, /* 11110000 */
+xf0, /* 11110000 */
+xf0, /* 11110000 */
+xf0, /* 11110000 */
+xf0, /* 11110000 */
+xf0, /* 11110000 */
+xf0, /* 11110000 */
+xf0, /* 11110000 */
+    /* 222 0xde 'Þ' */
+x0f, /* 00001111 */
+x0f, /* 00001111 */
+x0f, /* 00001111 */
+x0f, /* 00001111 */
+x0f, /* 00001111 */
+x0f, /* 00001111 */
+x0f, /* 00001111 */
+x0f, /* 00001111 */
+x0f, /* 00001111 */
+x0f, /* 00001111 */
+x0f, /* 00001111 */
+x0f, /* 00001111 */
+x0f, /* 00001111 */
+x0f, /* 00001111 */
+x0f, /* 00001111 */
+x0f, /* 00001111 */
+    /* 223 0xdf 'ß' */
+xff, /* 11111111 */
+xff, /* 11111111 */
+xff, /* 11111111 */
+xff, /* 11111111 */
+xff, /* 11111111 */
+xff, /* 11111111 */
+xff, /* 11111111 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 224 0xe0 'à' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x76, /* 01110110 */
+xdc, /* 11011100 */
+xd8, /* 11011000 */
+xd8, /* 11011000 */
+xd8, /* 11011000 */
+xdc, /* 11011100 */
+x76, /* 01110110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 225 0xe1 'á' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x78, /* 01111000 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+xcc, /* 11001100 */
+xd8, /* 11011000 */
+xcc, /* 11001100 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xcc, /* 11001100 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 226 0xe2 'â' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xfe, /* 11111110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc0, /* 11000000 */
+xc0, /* 11000000 */
+xc0, /* 11000000 */
+xc0, /* 11000000 */
+xc0, /* 11000000 */
+xc0, /* 11000000 */
+xc0, /* 11000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 227 0xe3 'ã' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xfe, /* 11111110 */
+x6c, /* 01101100 */
+x6c, /* 01101100 */
+x6c, /* 01101100 */
+x6c, /* 01101100 */
+x6c, /* 01101100 */
+x6c, /* 01101100 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 228 0xe4 'ä' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xfe, /* 11111110 */
+xc6, /* 11000110 */
+x60, /* 01100000 */
+x30, /* 00110000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x30, /* 00110000 */
+x60, /* 01100000 */
+xc6, /* 11000110 */
+xfe, /* 11111110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 229 0xe5 'å' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x7e, /* 01111110 */
+xd8, /* 11011000 */
+xd8, /* 11011000 */
+xd8, /* 11011000 */
+xd8, /* 11011000 */
+xd8, /* 11011000 */
+x70, /* 01110000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 230 0xe6 'æ' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+x7c, /* 01111100 */
+x60, /* 01100000 */
+x60, /* 01100000 */
+xc0, /* 11000000 */
+x00, /* 00000000 */
+    /* 231 0xe7 'ç' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x76, /* 01110110 */
+xdc, /* 11011100 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 232 0xe8 'è' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x7e, /* 01111110 */
+x18, /* 00011000 */
+x3c, /* 00111100 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+x3c, /* 00111100 */
+x18, /* 00011000 */
+x7e, /* 01111110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 233 0xe9 'é' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x38, /* 00111000 */
+x6c, /* 01101100 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xfe, /* 11111110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+x6c, /* 01101100 */
+x38, /* 00111000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 234 0xea 'ê' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x38, /* 00111000 */
+x6c, /* 01101100 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+x6c, /* 01101100 */
+x6c, /* 01101100 */
+x6c, /* 01101100 */
+x6c, /* 01101100 */
+xee, /* 11101110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 235 0xeb 'ë' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x1e, /* 00011110 */
+x30, /* 00110000 */
+x18, /* 00011000 */
+x0c, /* 00001100 */
+x3e, /* 00111110 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+x66, /* 01100110 */
+x3c, /* 00111100 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 236 0xec 'ì' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x7e, /* 01111110 */
+xdb, /* 11011011 */
+xdb, /* 11011011 */
+xdb, /* 11011011 */
+x7e, /* 01111110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 237 0xed 'í' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x03, /* 00000011 */
+x06, /* 00000110 */
+x7e, /* 01111110 */
+xdb, /* 11011011 */
+xdb, /* 11011011 */
+xf3, /* 11110011 */
+x7e, /* 01111110 */
+x60, /* 01100000 */
+xc0, /* 11000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 238 0xee 'î' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x1c, /* 00011100 */
+x30, /* 00110000 */
+x60, /* 01100000 */
+x60, /* 01100000 */
+x7c, /* 01111100 */
+x60, /* 01100000 */
+x60, /* 01100000 */
+x60, /* 01100000 */
+x30, /* 00110000 */
+x1c, /* 00011100 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 239 0xef 'ï' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x7c, /* 01111100 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+xc6, /* 11000110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 240 0xf0 'ð' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xfe, /* 11111110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xfe, /* 11111110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+xfe, /* 11111110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 241 0xf1 'ñ' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x7e, /* 01111110 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x7e, /* 01111110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 242 0xf2 'ò' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x30, /* 00110000 */
+x18, /* 00011000 */
+x0c, /* 00001100 */
+x06, /* 00000110 */
+x0c, /* 00001100 */
+x18, /* 00011000 */
+x30, /* 00110000 */
+x00, /* 00000000 */
+x7e, /* 01111110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 243 0xf3 'ó' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x0c, /* 00001100 */
+x18, /* 00011000 */
+x30, /* 00110000 */
+x60, /* 01100000 */
+x30, /* 00110000 */
+x18, /* 00011000 */
+x0c, /* 00001100 */
+x00, /* 00000000 */
+x7e, /* 01111110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 244 0xf4 'ô' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x0e, /* 00001110 */
+x1b, /* 00011011 */
+x1b, /* 00011011 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+    /* 245 0xf5 'õ' */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+xd8, /* 11011000 */
+xd8, /* 11011000 */
+xd8, /* 11011000 */
+x70, /* 01110000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 246 0xf6 'ö' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x18, /* 00011000 */
+x00, /* 00000000 */
+x7e, /* 01111110 */
+x00, /* 00000000 */
+x18, /* 00011000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 247 0xf7 '÷' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x76, /* 01110110 */
+xdc, /* 11011100 */
+x00, /* 00000000 */
+x76, /* 01110110 */
+xdc, /* 11011100 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 248 0xf8 'ø' */
+x00, /* 00000000 */
+x38, /* 00111000 */
+x6c, /* 01101100 */
+x6c, /* 01101100 */
+x38, /* 00111000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 249 0xf9 'ù' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x18, /* 00011000 */
+x18, /* 00011000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 250 0xfa 'ú' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x18, /* 00011000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 251 0xfb 'û' */
+x00, /* 00000000 */
+x0f, /* 00001111 */
+x0c, /* 00001100 */
+x0c, /* 00001100 */
+x0c, /* 00001100 */
+x0c, /* 00001100 */
+x0c, /* 00001100 */
+xec, /* 11101100 */
+x6c, /* 01101100 */
+x6c, /* 01101100 */
+x3c, /* 00111100 */
+x1c, /* 00011100 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 252 0xfc 'ü' */
+x00, /* 00000000 */
+x6c, /* 01101100 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x36, /* 00110110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 253 0xfd 'ý' */
+x00, /* 00000000 */
+x3c, /* 00111100 */
+x66, /* 01100110 */
+x0c, /* 00001100 */
+x18, /* 00011000 */
+x32, /* 00110010 */
+x7e, /* 01111110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 254 0xfe 'þ' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x7e, /* 01111110 */
+x7e, /* 01111110 */
+x7e, /* 01111110 */
+x7e, /* 01111110 */
+x7e, /* 01111110 */
+x7e, /* 01111110 */
+x7e, /* 01111110 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+    /* 255 0xff 'ÿ' */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+x00, /* 00000000 */
+};

 /tags/0.2.0.2/boot/tools/ppc32/Makefile
 ,0 → 1,8
+debug: debug.o font-8x16.o
+    gcc -o debug debug.o font-8x16.o
+debug.o: debug.c font-8x16.h
+    gcc -c -o debug.o debug.c
+font-8x16.o: font-8x16.c font-8x16.h
+    gcc -c -o font-8x16.o font-8x16.c

 /tags/0.2.0.2/boot/tools/config.py
 ,0 → 1,494
+#!/usr/bin/env python
+"""
+Boot configuration script
+"""
+import sys
+import os
+import re
+import commands
+INPUT = 'boot.config'
+OUTPUT = 'Makefile.config'
+TMPOUTPUT = 'Makefile.config.tmp'
+class DefaultDialog:
+    "Wrapper dialog that tries to return default values"
+    def __init__(self, dlg):
+        self.dlg = dlg
+    def set_title(self,text):
+        self.dlg.set_title(text)
+    def yesno(self, text, default=None):
+        if default is not None:
+            return default
+        return self.dlg.yesno(text, default)
+    def noyes(self, text, default=None):
+        if default is not None:
+            return default
+        return self.dlg.noyes(text, default)
+    def choice(self, text, choices, defopt=None):
+        if defopt is not None:
+            return choices[defopt][0]
+        return self.dlg.choice(text, choices, defopt)
+class NoDialog:
+    def __init__(self):
+        self.printed = None
+        self.title = 'HelenOS Configuration'
+    def print_title(self):
+        if not self.printed:
+            sys.stdout.write("\n*** %s ***\n" % self.title)
+            self.printed = True
+    def set_title(self, text):
+        self.title = text
+        self.printed = False
+    def noyes(self, text, default=None):
+        if not default:
+            default = 'n'
+        return self.yesno(text, default)
+    def yesno(self, text, default=None):
+        self.print_title()
+        if default != 'n':
+            default = 'y'
+        while 1:
+            sys.stdout.write("%s (y/n)[%s]: " % (text,default))
+            inp = sys.stdin.readline()
+            if not inp:
+                raise EOFError
+            inp = inp.strip().lower()
+            if not inp:
+                return default
+            if inp == 'y':
+                return 'y'
+            elif inp == 'n':
+                return 'n'
+    def _print_choice(self, text, choices, defopt):
+        sys.stdout.write('%s:\n' % text)
+        for i,(text,descr) in enumerate(choices):
+            sys.stdout.write('\t%2d. %s\n' % (i, descr))
+        if defopt is not None:
+            sys.stdout.write('Enter choice number[%d]: ' % defopt)
+        else:
+            sys.stdout.write('Enter choice number: ')
+    def menu(self, text, choices, button, defopt=None):
+        self.title = 'Main menu'
+        menu = []
+        for key, descr in choices:
+            txt = key + (45-len(key))*' ' + ': ' + descr
+            menu.append((key, txt))
+        return self.choice(text, [button] + menu)
+    def choice(self, text, choices, defopt=None):
+        self.print_title()
+        while 1:
+            self._print_choice(text, choices, defopt)
+            inp = sys.stdin.readline()
+            if not inp:
+                raise EOFError
+            if not inp.strip():
+                if defopt is not None:
+                    return choices[defopt][0]
+                continue
+            try:
+                number = int(inp.strip())
+            except ValueError:
+                continue
+            if number < 0 or number >= len(choices):
+                continue
+            return choices[number][0]
+def eof_checker(fnc):
+    def wrapper(self, *args, **kw):
+        try:
+            return fnc(self, *args, **kw)
+        except EOFError:
+            return getattr(self.bckdialog,fnc.func_name)(*args, **kw)
+    return wrapper
+class Dialog(NoDialog):
+    def __init__(self):
+        NoDialog.__init__(self)
+        self.dlgcmd = os.environ.get('DIALOG','dialog')
+        self.title = ''
+        self.backtitle = 'HelenOS Kernel Configuration'
+        if os.system('%s --print-maxsize >/dev/null 2>&1' % self.dlgcmd) != 0:
+            raise NotImplementedError
+        self.bckdialog = NoDialog()
+    def set_title(self,text):
+        self.title = text
+        self.bckdialog.set_title(text)
+    def calldlg(self,*args,**kw):
+        "Wrapper for calling 'dialog' program"
+        indesc, outdesc = os.pipe()
+        pid = os.fork()
+        if not pid:
+            os.close(2)
+            os.dup(outdesc)
+            os.close(indesc)
+            dlgargs = [self.dlgcmd,'--title',self.title,
+                       '--backtitle', self.backtitle]
+            for key,val in kw.items():
+                dlgargs.append('--'+key)
+                dlgargs.append(val)
+            dlgargs += args
+            os.execlp(self.dlgcmd,*dlgargs)
+        os.close(outdesc)
+        try:
+            errout = os.fdopen(indesc,'r')
+            data = errout.read()
+            errout.close()
+            pid,status = os.wait()
+        except:
+            os.system('reset') # Reset terminal
+            raise
+        if not os.WIFEXITED(status):
+            os.system('reset') # Reset terminal
+            raise EOFError
+        status = os.WEXITSTATUS(status)
+        if status == 255:
+            raise EOFError
+        return status,data
+    def yesno(self, text, default=None):
+        if text[-1] not in ('?',':'):
+            text = text + ':'
+        width = '50'
+        height = '5'
+        if len(text) < 48:
+            text = ' '*int(((48-len(text))/2)) + text
+        else:
+            width = '0'
+            height = '0'
+        if default == 'n':
+            res,data = self.calldlg('--defaultno','--yesno',text,height,width)
+        else:
+            res,data = self.calldlg('--yesno',text,height,width)
+        if res == 0:
+            return 'y'
+        return 'n'
+    yesno = eof_checker(yesno)
+    def menu(self, text, choices, button, defopt=None):
+        self.title = 'Main menu'
+        text = text + ':'
+        width = '70'
+        height = str(8 + len(choices))
+        args = []
+        for key,val in choices:
+            args.append(key)
+            args.append(val)
+        kw = {}
+        if defopt:
+            kw['default-item'] = choices[defopt][0]
+        res,data = self.calldlg('--ok-label','Change',
+                                '--extra-label',button[1],
+                                '--extra-button',
+                                '--menu',text,height,width,
+                                str(len(choices)),*args,**kw)
+        if res == 3:
+            return button[0]
+        if res == 1: # Cancel
+            sys.exit(1)
+        elif res:
+            print data
+            raise EOFError
+        return data
+    menu = eof_checker(menu)
+    def choice(self, text, choices, defopt=None):
+        text = text + ':'
+        width = '50'
+        height = str(8 + len(choices))
+        args = []
+        for key,val in choices:
+            args.append(key)
+            args.append(val)
+        kw = {}
+        if defopt:
+            kw['default-item'] = choices[defopt][0]
+        res,data = self.calldlg('--nocancel','--menu',text,height,width,
+                                str(len(choices)),*args, **kw)
+        if res:
+            print data
+            raise EOFError
+        return data
+    choice = eof_checker(choice)
+def read_defaults(fname,defaults):
+    "Read saved values from last configuration run"
+    f = file(fname,'r')
+    for line in f:
+        res = re.match(r'^(?:#!# )?([^#]\w*)\s*=\s*(.*?)\s*$', line)
+        if res:
+            defaults[res.group(1)] = res.group(2)
+    f.close()
+def check_condition(text, defaults, asked_names):
+    seen_vars = [ x[0] for x in asked_names ]
+    ctype = 'cnf'
+    if ')|' in text or '|(' in text:
+        ctype = 'dnf'
+    if ctype == 'cnf':
+        conds = text.split('&')
+    else:
+        conds = text.split('|')
+    for cond in conds:
+        if cond.startswith('(') and cond.endswith(')'):
+            cond = cond[1:-1]
+        inside = check_inside(cond, defaults, ctype, seen_vars)
+        if ctype == 'cnf' and not inside:
+            return False
+        if ctype == 'dnf' and inside:
+            return True
+    if ctype == 'cnf':
+        return True
+    return False
+def check_inside(text, defaults, ctype, seen_vars):
+    """
+    Check that the condition specified on input line is True
+    only CNF is supported
+    """
+    if ctype == 'cnf':
+        conds = text.split('|')
+    else:
+        conds = text.split('&')
+    for cond in conds:
+        res = re.match(r'^(.*?)(!?=)(.*)$', cond)
+        if not res:
+            raise RuntimeError("Invalid condition: %s" % cond)
+        condname = res.group(1)
+        oper = res.group(2)
+        condval = res.group(3)
+        if condname not in seen_vars:
+            varval = ''
+##             raise RuntimeError("Variable %s not defined before being asked." %\
+##                                condname)
+        elif not defaults.has_key(condname):
+            raise RuntimeError("Condition var %s does not exist: %s" % \
+                               (condname,text))
+        else:
+            varval = defaults[condname]
+        if ctype == 'cnf':
+            if oper == '=' and  condval == varval:
+                return True
+            if oper == '!=' and condval != varval:
+                return True
+        else:
+            if oper== '=' and condval != varval:
+                return False
+            if oper== '!=' and condval == varval:
+                return False
+    if ctype=='cnf':
+        return False
+    return True
+def parse_config(input, output, dlg, defaults={}, askonly=None):
+    "Parse configuration file and create Makefile.config on the fly"
+    def ask_the_question(dialog):
+        "Ask question based on the type of variables to ask"
+        # This is quite a hack, this thingy is written just to
+        # have access to local variables..
+        if vartype == 'y/n':
+            return dialog.yesno(comment, default)
+        elif vartype == 'n/y':
+            return dialog.noyes(comment, default)
+        elif vartype == 'choice':
+            defopt = None
+            if default is not None:
+                for i,(key,val) in enumerate(choices):
+                    if key == default:
+                        defopt = i
+                        break
+            return dialog.choice(comment, choices, defopt)
+        else:
+            raise RuntimeError("Bad method: %s" % vartype)
+    f = file(input, 'r')
+    outf = file(output, 'w')
+    outf.write('#########################################\n')
+    outf.write('## AUTO-GENERATED FILE, DO NOT EDIT!!! ##\n')
+    outf.write('#########################################\n\n')
+    asked_names = []
+    comment = ''
+    default = None
+    choices = []
+    for line in f:
+        if line.startswith('%'):
+            res = re.match(r'^%\s*(?:\[(.*?)\])?\s*(.*)$', line)
+            if not res:
+                raise RuntimeError('Invalid command: %s' % line)
+            if res.group(1):
+                if not check_condition(res.group(1), defaults,
+                                       asked_names):
+                    continue
+            args = res.group(2).strip().split(' ')
+            cmd = args[0].lower()
+            args = args[1:]
+            if cmd == 'saveas':
+                outf.write('%s = %s\n' % (args[1],defaults[args[0]]))
+            elif cmd == 'shellcmd':
+                varname = args[0]
+                args = args[1:]
+                for i,arg in enumerate(args):
+                    if arg.startswith('$'):
+                        args[i] = defaults[arg[1:]]
+                data,status = commands.getstatusoutput(' '.join(args))
+                if status:
+                    raise RuntimeError('Error running: %s' % ' '.join(args))
+                outf.write('%s = %s\n' % (varname,data.strip()))
+            continue
+        if line.startswith('!'):
+            # Ask a question
+            res = re.search(r'!\s*(?:\[(.*?)\])?\s*([^\s]+)\s*\((.*)\)\s*$', line)
+            if not res:
+                raise RuntimeError("Weird line: %s" % line)
+            varname = res.group(2)
+            vartype = res.group(3)
+            default = defaults.get(varname,None)
+            if res.group(1):
+                if not check_condition(res.group(1), defaults,
+                                       asked_names):
+                    if default is not None:
+                        outf.write('#!# %s = %s\n' % (varname, default))
+                    # Clear cumulated values
+                    comment = ''
+                    default = None
+                    choices = []
+                    continue
+            asked_names.append((varname,comment))
+            if default is None or not askonly or askonly == varname:
+                default = ask_the_question(dlg)
+            else:
+                default = ask_the_question(DefaultDialog(dlg))
+            outf.write('%s = %s\n' % (varname, default))
+            # Remeber the selected value
+            defaults[varname] = default
+            # Clear cumulated values
+            comment = ''
+            default = None
+            choices = []
+            continue
+        if line.startswith('@'):
+            # Add new line into the 'choice array'
+            res = re.match(r'@\s*(?:\[(.*?)\])?\s*"(.*?)"\s*(.*)$', line)
+            if not res:
+                raise RuntimeError("Bad line: %s" % line)
+            if res.group(1):
+                if not check_condition(res.group(1),defaults,
+                                       asked_names):
+                    continue
+            choices.append((res.group(2), res.group(3)))
+            continue
+        # All other things print to output file
+        outf.write(line)
+        if re.match(r'^#[^#]', line):
+            # Last comment before question will be displayed to the user
+            comment = line[1:].strip()
+        elif line.startswith('## '):
+            # Set title of the dialog window
+            dlg.set_title(line[2:].strip())
+    outf.write('\n')
+    outf.write('REVISION = %s\n' % commands.getoutput('svnversion . 2> /dev/null'))
+    outf.write('TIMESTAMP = %s\n' % commands.getoutput('date "+%Y-%m-%d %H:%M:%S"'))
+    outf.close()
+    f.close()
+    return asked_names
+def main():
+    defaults = {}
+    try:
+        dlg = Dialog()
+    except NotImplementedError:
+        dlg = NoDialog()
+    if len(sys.argv) >= 2 and sys.argv[1]=='default':
+        defmode = True
+    else:
+        defmode = False
+    # Default run will update the configuration file
+    # with newest options
+    if os.path.exists(OUTPUT):
+        read_defaults(OUTPUT, defaults)
+    # Get ARCH from command line if specified
+    if len(sys.argv) >= 3:
+        defaults['ARCH'] = sys.argv[2]
+    # Dry run only with defaults
+    varnames = parse_config(INPUT, TMPOUTPUT, DefaultDialog(dlg), defaults)
+    # If not in default mode, present selection of all possibilities
+    if not defmode:
+        defopt = 0
+        while 1:
+            # varnames contains variable names that were in the
+            # last question set
+            choices = [ (x[1],defaults[x[0]]) for x in varnames ]
+            res = dlg.menu('Configuration',choices,('save','Save'),defopt)
+            if res == 'save':
+                parse_config(INPUT, TMPOUTPUT, DefaultDialog(dlg), defaults)
+                break
+            # transfer description back to varname
+            for i,(vname,descr) in enumerate(varnames):
+                if res == descr:
+                    defopt = i
+                    break
+            # Ask the user a simple question, produce output
+            # as if the user answered all the other questions
+            # with default answer
+            varnames = parse_config(INPUT, TMPOUTPUT, dlg, defaults,
+                                    askonly=varnames[i][0])
+    if os.path.exists(OUTPUT):
+        os.unlink(OUTPUT)
+    os.rename(TMPOUTPUT, OUTPUT)
+    if not defmode and dlg.yesno('Rebuild everything?') == 'y':
+        os.execlp('make','make','clean','build')
+if __name__ == '__main__':
+    main()
 Property changes:
 Added: svn:executable
 +*
 \ No newline at end of property

 /tags/0.2.0.2/boot/boot.config
 ,0 → 1,40
+## General configuration directives
+# Architecture
+@ "amd64" AMD64/Intel EM64T
+@ "ia32" Intel IA-32
+@ "ia64" Intel IA-64
+@ "mips32" MIPS 32-bit
+@ "ppc32" PowerPC 32-bit
+@ "ppc64" PowerPC 64-bit
+@ "sparc64" Sun UltraSPARC
+! ARCH (choice)
+# PPC32 Compiler
+@ "cross" Cross-compiler
+@ "native" Native
+! [ARCH=ppc32] PPC32_COMPILER (choice)
+% [ARCH=ppc32] SAVEAS PPC32_COMPILER COMPILER
+# PPC64 Compiler
+@ "cross" Cross-compiler
+@ "native" Native
+! [ARCH=ppc64] PPC64_COMPILER (choice)
+% [ARCH=ppc64] SAVEAS PPC64_COMPILER COMPILER
+# MIPS32 Compiler
+@ "cross" Cross-compiler
+@ "native" Native
+! [ARCH=mips32] MIPS32_COMPILER (choice)
+% [ARCH=mips32] SAVEAS MIPS32_COMPILER COMPILER
+# Debug bootloader
+! [ARCH=ppc32] CONFIG_DEBUG (n/y)
+# Use Block Address Translation
+! [ARCH=ppc32] CONFIG_BAT (y/n)
+# Target image
+@ "binary" Binary image (MSIM)
+@ "ecoff" Ecoff image (GXEmul)
+! [ARCH=mips32] CONFIG_IMAGE (choice)

 /tags/0.2.0.2/boot/Makefile
 ,0 → 1,82
+#
+# Copyright (C) 2006 Martin Decky
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# - Redistributions of source code must retain the above copyright
+#   notice, this list of conditions and the following disclaimer.
+# - Redistributions in binary form must reproduce the above copyright
+#   notice, this list of conditions and the following disclaimer in the
+#   documentation and/or other materials provided with the distribution.
+# - The name of the author may not be used to endorse or promote products
+#   derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+## Include configuration
+#
+-include Makefile.config
+## Common flags
+#
+BASE = ..
+KERNELDIR = $(BASE)/kernel
+USPACEDIR = $(BASE)/uspace
+## Setup arch configuration
+#
+-include arch/$(ARCH)/Makefile.inc
+ifeq ($(CONFIG_DEBUG),y)
+    DEFS += -DCONFIG_DEBUG
+endif
+ifeq ($(CONFIG_BAT),y)
+    DEFS += -DCONFIG_BAT
+endif
+.PHONY: all build config distclean arch_distclean clean kernel uspace clean_kernel clean_uspace distclean_kernel distclean_uspace
+all:
+    tools/config.py default
+    $(MAKE) -C . build $(ARCH)
+config:
+    tools/config.py
+distclean: clean arch_distclean
+    -rm Makefile.config
+kernel:
+    $(MAKE) -C $(KERNELDIR) NARCH=$(ARCH)
+uspace:
+    $(MAKE) -C $(USPACEDIR) NARCH=$(ARCH)
+clean_kernel:
+    $(MAKE) -C $(KERNELDIR) clean ARCH=$(ARCH)
+clean_uspace:
+    $(MAKE) -C $(USPACEDIR) clean ARCH=$(ARCH)
+distclean_kernel:
+    $(MAKE) -C $(KERNELDIR) distclean ARCH=$(ARCH)
+distclean_uspace:
+    $(MAKE) -C $(USPACEDIR) distclean ARCH=$(ARCH)

 /tags/0.2.0.2/boot/arch/mips32/loader/pack
 ,0 → 1,126
+#! /bin/sh
+#
+# Copyright (C) 2006 Martin Decky
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# - Redistributions of source code must retain the above copyright
+#   notice, this list of conditions and the following disclaimer.
+# - Redistributions in binary form must reproduce the above copyright
+#   notice, this list of conditions and the following disclaimer in the
+#   documentation and/or other materials provided with the distribution.
+# - The name of the author may not be used to endorse or promote products
+#   derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+[ "$#" -lt 1 ] && exit 1
+case "$1" in
+    "binary")
+        BFD="binary"
+        ;;
+    "ecoff")
+        BFD="ecoff-littlemips"
+        ;;
+    *)
+        echo "Undefined image format" >&1
+        exit 1
+        ;;
+esac
+OBJCOPY="$2"
+LINK="_link.ld"
+HEADER="_components.h"
+shift 2
+echo "OUTPUT_FORMAT(\"${BFD}\")
+ENTRY(start)
+SECTIONS {
+    .boot 0xbfc00000: AT (0) {
+        *(BOOTSTRAP);
+        *(.text);
+        *(.rodata);
+        *(.rodata.*);
+        *(.data);       /* initialized data */
+        *(.sdata);
+        *(.sdata2);
+        *(.sbss);
+        *(.scommon);
+        *(.bss);        /* uninitialized static variables */
+        *(COMMON);      /* global variables */
+        *(.reginfo);" > "$LINK"
+echo '#ifndef ___COMPONENTS_H__
+#define ___COMPONENTS_H__
+typedef struct {
+    char *name;
+    void *start;
+    void *end;
+    unsigned int size;
+} component_t;' > "$HEADER"
+COUNT="0"
+DATA=""
+for TASK in "$@" ; do
+    BASENAME="`basename "$TASK" | sed 's/^\(.*\)\.[^.]*$/\1/'`"
+    OBJECT="${BASENAME}.o"
+    SYMBOL="`echo "_binary_$TASK" | tr "./" "__"`"
+    MACRO="`echo "$BASENAME" | tr [:lower:] [:upper:]`"
+    echo "$TASK -> $OBJECT"
+    echo "
+        . = ALIGN(4096);
+        *(.${BASENAME}_image);" >> "$LINK"
+    echo "
+extern int ${SYMBOL}_start;
+extern int ${SYMBOL}_end;
+#define ${MACRO}_START ((void *) &${SYMBOL}_start)
+#define ${MACRO}_END ((void *) &${SYMBOL}_end)
+#define ${MACRO}_SIZE ((unsigned int) ${MACRO}_END - (unsigned int) ${MACRO}_START)" >> "$HEADER"
+    "$OBJCOPY" -I binary -O elf32-tradlittlemips -B mips --rename-section ".data=.${BASENAME}_image" "$TASK" "$OBJECT"
+    DATA="${DATA}
+    components[$COUNT].name = \"${BASENAME}\";
+    components[$COUNT].start = ${MACRO}_START;
+    components[$COUNT].end = ${MACRO}_END;
+    components[$COUNT].size = ${MACRO}_SIZE;";
+    COUNT="`expr "$COUNT" + 1`"
+done
+echo '  }
+}' >> "$LINK"
+echo "
+#define COMPONENTS $COUNT
+static void init_components(component_t components[])
+{
+$DATA
+}
+#endif
+" >> "$HEADER"
 Property changes:
 Added: svn:executable
 +*
 \ No newline at end of property

 /tags/0.2.0.2/boot/arch/mips32/loader/Makefile
 ,0 → 1,95
+#
+# Copyright (C) 2006 Martin Decky
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# - Redistributions of source code must retain the above copyright
+#   notice, this list of conditions and the following disclaimer.
+# - Redistributions in binary form must reproduce the above copyright
+#   notice, this list of conditions and the following disclaimer in the
+#   documentation and/or other materials provided with the distribution.
+# - The name of the author may not be used to endorse or promote products
+#   derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+## Toolchain configuration
+#
+TARGET = mipsel-linux-gnu
+TOOLCHAIN_DIR = /usr/local/mipsel/bin
+ifeq ($(COMPILER),native)
+    CC = gcc
+    AS = as
+    LD = ld
+    OBJCOPY = objcopy
+    OBJDUMP = objdump
+else
+    CC = $(TOOLCHAIN_DIR)/$(TARGET)-gcc
+    AS = $(TOOLCHAIN_DIR)/$(TARGET)-as
+    LD = $(TOOLCHAIN_DIR)/$(TARGET)-ld
+    OBJCOPY = $(TOOLCHAIN_DIR)/$(TARGET)-objcopy
+    OBJDUMP = $(TOOLCHAIN_DIR)/$(TARGET)-objdump
+endif
+CFLAGS = -nostdinc -nostdlib -fno-builtin -Werror-implicit-function-declaration -Wmissing-prototypes -Werror -O3 -mno-abicalls -G 0 -fno-zero-initialized-in-bss -mhard-float -mips3
+DEFS =
+SOURCES = \
+    main.c \
+    msim.c \
+    printf.c \
+    asm.S \
+    boot.S
+COMPONENTS = \
+    $(KERNELDIR)/kernel.bin \
+    $(USPACEDIR)/ns/ns \
+    $(USPACEDIR)/init/init \
+    $(USPACEDIR)/fb/fb \
+    $(USPACEDIR)/kbd/kbd \
+    $(USPACEDIR)/console/console \
+    $(USPACEDIR)/tetris/tetris \
+    $(USPACEDIR)/ipcc/ipcc \
+    $(USPACEDIR)/klog/klog
+OBJECTS := $(addsuffix .o,$(basename $(SOURCES)))
+COMPONENT_OBJECTS := $(addsuffix .o,$(basename $(notdir $(COMPONENTS))))
+.PHONY: all clean depend
+all: image.boot
+-include Makefile.depend
+image.boot: depend _components.h _link.ld $(COMPONENT_OBJECTS) $(OBJECTS) kernel.o
+    $(LD) -no-check-sections -N -T _link.ld $(COMPONENT_OBJECTS) $(OBJECTS) -o $@
+depend:
+    -makedepend $(DEFS) $(CFLAGS) -f - $(SOURCES) > Makefile.depend 2> /dev/null
+clean:
+    -rm -f _components.h _link.ld $(COMPONENT_OBJECTS) $(OBJECTS) image.boot Makefile.depend
+_components.h _link.ld $(COMPONENT_OBJECTS): $(COMPONENTS)
+    ./pack $(IMAGE) $(OBJCOPY) $(COMPONENTS)
+%.o: %.S
+    $(CC) $(DEFS) $(CFLAGS) -D__ASM__ -c $< -o $@
+%.o: %.c
+    $(CC) $(DEFS) $(CFLAGS) -c $< -o $@

 /tags/0.2.0.2/boot/arch/mips32/loader/boot.S
 ,0 → 1,45
+#
+# Copyright (C) 2006 Martin Decky
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# - Redistributions of source code must retain the above copyright
+#   notice, this list of conditions and the following disclaimer.
+# - Redistributions in binary form must reproduce the above copyright
+#   notice, this list of conditions and the following disclaimer in the
+#   documentation and/or other materials provided with the distribution.
+# - The name of the author may not be used to endorse or promote products
+#   derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+#include "regname.h"
+#define INITIAL_STACK 0x80040000
+.set noat
+.set noreorder
+.set nomacro
+.section BOOTSTRAP
+.global start
+start:
+    lui $sp, INITIAL_STACK >> 16
+    ori $sp, $sp, INITIAL_STACK & 0xffff
+    j bootstrap
+    nop

 /tags/0.2.0.2/boot/arch/mips32/loader/asm.S
 ,0 → 1,111
+#
+# Copyright (C) 2006 Martin Decky
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# - Redistributions of source code must retain the above copyright
+#   notice, this list of conditions and the following disclaimer.
+# - Redistributions in binary form must reproduce the above copyright
+#   notice, this list of conditions and the following disclaimer in the
+#   documentation and/or other materials provided with the distribution.
+# - The name of the author may not be used to endorse or promote products
+#   derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+#include "regname.h"
+.set noat
+.set noreorder
+.set nomacro
+.text
+.global halt
+.global memcpy
+.global jump_to_kernel
+halt:
+    b halt
+    nop
+memcpy:
+    addiu   $v0,$a1,3
+    li  $v1,-4          # 0xfffffffffffffffc
+    and $v0,$v0,$v1
+    beq $a1,$v0,3f
+    move    $t0,$a0
+:
+    beq $a2,$zero,2f
+    move    $a3,$zero
+:
+    addu    $v0,$a1,$a3
+    lbu $a0,0($v0)
+    addu    $v1,$t0,$a3
+    addiu   $a3,$a3,1
+    bne $a3,$a2,1b
+    sb  $a0,0($v1)
+:
+    jr  $ra
+    move    $v0,$a1
+:
+    addiu   $v0,$a0,3
+    and $v0,$v0,$v1
+    bne $a0,$v0,0b
+    srl $t1,$a2,2
+    beq $t1,$zero,5f
+    move    $a3,$zero
+    move    $a3,$zero
+    move    $a0,$zero
+:
+    addu    $v0,$a1,$a0
+    lw  $v1,0($v0)
+    addiu   $a3,$a3,1
+    addu    $v0,$t0,$a0
+    sw  $v1,0($v0)
+    bne $a3,$t1,4b
+    addiu   $a0,$a0,4
+:
+    andi    $a2,$a2,0x3
+    beq $a2,$zero,2b
+    nop
+    sll $v0,$a3,2
+    addu    $t1,$v0,$t0
+    move    $a3,$zero
+    addu    $t0,$v0,$a1
+:
+    addu    $v0,$t0,$a3
+    lbu $a0,0($v0)
+    addu    $v1,$t1,$a3
+    addiu   $a3,$a3,1
+    bne $a3,$a2,6b
+    sb  $a0,0($v1)
+    jr  $ra
+    move    $v0,$a1
+jump_to_kernel:
+#   .word 0x39
+    j $a0
+    nop

 /tags/0.2.0.2/boot/arch/mips32/loader/main.c
 ,0 → 1,71
+/*
+ * Copyright (C) 2005 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#include "main.h"
+#include "printf.h"
+#include "msim.h"
+#include "asm.h"
+#include "_components.h"
+#define KERNEL_VIRTUAL_ADDRESS 0x80100000
+void bootstrap(void)
+{
+    printf("HelenOS MIPS Bootloader\n");
+    component_t components[COMPONENTS];
+    bootinfo_t bootinfo;
+    init_components(components);
+    printf("\nMemory statistics\n");
+    printf(" kernel entry point at %L\n", KERNEL_VIRTUAL_ADDRESS);
+    printf(" %L: boot info structure\n", &bootinfo);
+    unsigned int i;
+    for (i = 0; i < COMPONENTS; i++)
+        printf(" %L: %s image (size %d bytes)\n", components[i].start, components[i].name, components[i].size);
+    printf("\nCopying components\n");
+    unsigned int top = 0;
+    bootinfo.cnt = 0;
+    for (i = 0; i < COMPONENTS; i++) {
+        printf(" %s...", components[i].name);
+        top = ALIGN_UP(top, PAGE_SIZE);
+        memcpy(((void *) KERNEL_VIRTUAL_ADDRESS) + top, components[i].start, components[i].size);
+        if (i > 0) {
+            bootinfo.tasks[bootinfo.cnt].addr = ((void *) KERNEL_VIRTUAL_ADDRESS) + top;
+            bootinfo.tasks[bootinfo.cnt].size = components[i].size;
+            bootinfo.cnt++;
+        }
+        top += components[i].size;
+        printf("done.\n");
+    }
+    printf("\nBooting the kernel...\n");
+    jump_to_kernel((void *) KERNEL_VIRTUAL_ADDRESS, &bootinfo, sizeof(bootinfo));
+}

 /tags/0.2.0.2/boot/arch/mips32/loader/asm.h
 ,0 → 1,39
+/*
+ * Copyright (C) 2006 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#ifndef __ASM_H__
+#define __ASM_H__
+#define PAGE_SIZE 16384
+#define PAGE_WIDTH 14
+#define memcpy(dst, src, cnt)  __builtin_memcpy((dst), (src), (cnt))
+void jump_to_kernel(void *entry, void *bootinfo, unsigned int bootinfo_size) __attribute__((noreturn));
+#endif

 /tags/0.2.0.2/boot/arch/mips32/loader/printf.h
 ,0 → 1,52
+/*
+ * Copyright (C) 2006 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#ifndef __PRINTF_H__
+#define __PRINTF_H__
+#define INT8    1
+#define INT16   2
+#define INT32   4
+#define INT64   8
+typedef signed char __s8;
+typedef unsigned char __u8;
+typedef unsigned short __u16;
+typedef unsigned int __u32;
+typedef unsigned long long __u64;
+typedef __u32 __address;
+typedef __u32 __native;
+typedef char *char_ptr;
+void puts(const char *str);
+void printf(const char *fmt, ...);
+#endif

 /tags/0.2.0.2/boot/arch/mips32/loader/main.h
 ,0 → 1,54
+/*
+ * Copyright (C) 2005 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#ifndef __MAIN_H__
+#define __MAIN_H__
+/** Align to the nearest higher address.
+ *
+ * @param addr  Address or size to be aligned.
+ * @param align Size of alignment, must be power of 2.
+ */
+#define ALIGN_UP(addr, align) (((addr) + ((align) - 1)) & ~((align) - 1))
+#define TASKMAP_MAX_RECORDS 32
+typedef struct {
+    void *addr;
+    unsigned int size;
+} task_t;
+typedef struct {
+    unsigned int cnt;
+    task_t tasks[TASKMAP_MAX_RECORDS];
+} bootinfo_t;
+extern void start(void);
+extern void bootstrap(void);
+#endif

 /tags/0.2.0.2/boot/arch/mips32/loader/printf.c
 ,0 → 1,241
+/*
+ * Copyright (C) 2006 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#include "printf.h"
+#include "msim.h"
+static char digits[] = "0123456789abcdef";  /**< Hexadecimal characters */
+void puts(const char *str)
+{
+    int len = 0;
+    while (str[len] != 0)
+        len++;
+    write(str, len);
+}
+/** Print hexadecimal digits
+ *
+ * Print fixed count of hexadecimal digits from
+ * the number num. The digits are printed in
+ * natural left-to-right order starting with
+ * the width-th digit.
+ *
+ * @param num   Number containing digits.
+ * @param width Count of digits to print.
+ *
+ */
+static void print_fixed_hex(const __u64 num, const int width)
+{
+    int i;
+    for (i = width * 8 - 4; i >= 0; i -= 4)
+        write(digits + ((num >> i) & 0xf), 1);
+}
+/** Print number in given base
+ *
+ * Print significant digits of a number in given
+ * base.
+ *
+ * @param num  Number to print.
+ * @param base Base to print the number in (should
+ *             be in range 2 .. 16).
+ *
+ */
+static void print_number(const __native num, const unsigned int base)
+{
+    int val = num;
+    char d[sizeof(__native) * 8 + 1];       /* this is good enough even for base == 2 */
+    int i = sizeof(__native) * 8 - 1;
+    do {
+        d[i--] = digits[val % base];
+    } while (val /= base);
+    d[sizeof(__native) * 8] = 0;
+    puts(&d[i + 1]);
+}
+/** General formatted text print
+ *
+ * Print text formatted according the fmt parameter
+ * and variant arguments. Each formatting directive
+ * begins with \% (percentage) character and one of the
+ * following character:
+ *
+ * \%    Prints the percentage character.
+ *
+ * s    The next variant argument is treated as char*
+ *      and printed as a NULL terminated string.
+ *
+ * c    The next variant argument is treated as a single char.
+ *
+ * p    The next variant argument is treated as a maximum
+ *      bit-width integer with respect to architecture
+ *      and printed in full hexadecimal width.
+ *
+ * P    As with 'p', but '0x' is prefixed.
+ *
+ * q    The next variant argument is treated as a 64b integer
+ *      and printed in full hexadecimal width.
+ *
+ * Q    As with 'q', but '0x' is prefixed.
+ *
+ * l    The next variant argument is treated as a 32b integer
+ *      and printed in full hexadecimal width.
+ *
+ * L    As with 'l', but '0x' is prefixed.
+ *
+ * w    The next variant argument is treated as a 16b integer
+ *      and printed in full hexadecimal width.
+ *
+ * W    As with 'w', but '0x' is prefixed.
+ *
+ * b    The next variant argument is treated as a 8b integer
+ *      and printed in full hexadecimal width.
+ *
+ * B    As with 'b', but '0x' is prefixed.
+ *
+ * d    The next variant argument is treated as integer
+ *      and printed in standard decimal format (only significant
+ *      digits).
+ *
+ * x    The next variant argument is treated as integer
+ *      and printed in standard hexadecimal format (only significant
+ *      digits).
+ *
+ * X    As with 'x', but '0x' is prefixed.
+ *
+ * All other characters from fmt except the formatting directives
+ * are printed in verbatim.
+ *
+ * @param fmt Formatting NULL terminated string.
+ */
+void printf(const char *fmt, ...)
+{
+    int i = 0;
+    va_list ap;
+    char c;
+    va_start(ap, fmt);
+    while ((c = fmt[i++])) {
+        switch (c) {
+            /* control character */
+            case '%':
+                switch (c = fmt[i++]) {
+                    /* percentile itself */
+                    case '%':
+                        break;
+                    /*
+                     * String and character conversions.
+                     */
+                    case 's':
+                        puts(va_arg(ap, char_ptr));
+                        goto loop;
+                    case 'c':
+                        c = (char) va_arg(ap, int);
+                        break;
+                    /*
+                     * Hexadecimal conversions with fixed width.
+                     */
+                    case 'P':
+                        puts("0x");
+                    case 'p':
+                        print_fixed_hex(va_arg(ap, __native), sizeof(__native));
+                        goto loop;
+                    case 'Q':
+                        puts("0x");
+                    case 'q':
+                        print_fixed_hex(va_arg(ap, __u64), INT64);
+                        goto loop;
+                    case 'L':
+                        puts("0x");
+                    case 'l':
+                        print_fixed_hex(va_arg(ap, __native), INT32);
+                        goto loop;
+                    case 'W':
+                        puts("0x");
+                    case 'w':
+                        print_fixed_hex(va_arg(ap, __native), INT16);
+                        goto loop;
+                    case 'B':
+                        puts("0x");
+                    case 'b':
+                        print_fixed_hex(va_arg(ap, __native), INT8);
+                        goto loop;
+                    /*
+                     * Decimal and hexadecimal conversions.
+                     */
+                    case 'd':
+                        print_number(va_arg(ap, __native), 10);
+                        goto loop;
+                    case 'X':
+                        puts("0x");
+                    case 'x':
+                        print_number(va_arg(ap, __native), 16);
+                        goto loop;
+                    /*
+                     * Bad formatting.
+                     */
+                    default:
+                        goto out;
+            }
+            default:
+                write(&c, 1);
+        }
+loop:
+        ;
+    }
+out:
+    va_end(ap);
+}

 /tags/0.2.0.2/boot/arch/mips32/loader/regname.h
 ,0 → 1,89
+/*
+ * Copyright (C) 2005 Ondrej Palkovsky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#ifndef __mips32_REGNAME_H_
+#define __mips32_REGNAME_H_
+#define zero    0
+#define at      1
+#define v0      2
+#define v1      3
+#define a0      4
+#define a1      5
+#define a2      6
+#define a3      7
+#define t0      8
+#define t1      9
+#define t2      10
+#define t3      11
+#define t4      12
+#define t5      13
+#define t6      14
+#define t7      15
+#define s0      16
+#define s1      17
+#define s2      18
+#define s3      19
+#define s4      20
+#define s5      21
+#define s6      22
+#define s7      23
+#define t8      24
+#define t9      25
+#define k0      26
+#define k1      27
+#define gp      28
+#define sp      29
+#define s8      30
+#define ra      31
+#define rindex      0
+#define rrandom     1
+#define entrylo0    2
+#define entrylo1    3
+#define context     4
+#define pagemask    5
+#define wired       6
+#define badvaddr    8
+#define count       9
+#define entryhi     10
+#define compare     11
+#define status      12
+#define cause       13
+#define epc     14
+#define rconfig     16
+#define lladdr      17
+#define watchlo     18
+#define watchhi     19
+#define xcontext    20
+#define rdebug      23
+#define depc        24
+#define eepc        30
+#endif /* _REGNAME_H_ */

 /tags/0.2.0.2/boot/arch/mips32/loader/msim.c
 ,0 → 1,42
+/*
+ * Copyright (C) 2006 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#include "msim.h"
+#include "printf.h"
+#define MSIM_VIDEORAM            0xB0000000
+void write(const char *str, const int len)
+{
+    int i;
+    for (i = 0; i < len; i++)
+        *((char *) MSIM_VIDEORAM) = str[i];
+}

 /tags/0.2.0.2/boot/arch/mips32/loader/msim.h
 ,0 → 1,48
+/*
+ * Copyright (C) 2006 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#ifndef __MSIM_H__
+#define __MSIM_H__
+#define NULL 0
+#define false 0
+#define true 1
+typedef __builtin_va_list va_list;
+#define va_start(ap, last)      __builtin_va_start(ap, last)
+#define va_arg(ap, type)        __builtin_va_arg(ap, type)
+#define va_end(ap)          __builtin_va_end(ap)
+extern void init(void);
+extern void halt(void);
+extern void write(const char *str, const int len);
+extern void *translate(void *addr);
+#endif

 /tags/0.2.0.2/boot/arch/mips32/Makefile.inc
 ,0 → 1,39
+#
+# Copyright (C) 2006 Martin Decky
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# - Redistributions of source code must retain the above copyright
+#   notice, this list of conditions and the following disclaimer.
+# - Redistributions in binary form must reproduce the above copyright
+#   notice, this list of conditions and the following disclaimer in the
+#   documentation and/or other materials provided with the distribution.
+# - The name of the author may not be used to endorse or promote products
+#   derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+build: image.boot
+image.boot: kernel uspace
+    make -C arch/$(ARCH)/loader COMPILER=$(COMPILER) KERNELDIR=../../../$(KERNELDIR) USPACEDIR=../../../$(USPACEDIR) IMAGE=$(CONFIG_IMAGE)
+    cp arch/$(ARCH)/loader/image.boot image.boot
+clean: clean_kernel clean_uspace
+    make -C arch/$(ARCH)/loader clean
+    -rm -f image.boot
+arch_distclean: distclean_kernel distclean_uspace

 /tags/0.2.0.2/boot/arch/ppc32/loader/asm.S
 ,0 → 1,383
+#
+# Copyright (C) 2006 Martin Decky
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# - Redistributions of source code must retain the above copyright
+#   notice, this list of conditions and the following disclaimer.
+# - Redistributions in binary form must reproduce the above copyright
+#   notice, this list of conditions and the following disclaimer in the
+#   documentation and/or other materials provided with the distribution.
+# - The name of the author may not be used to endorse or promote products
+#   derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+#include "asm.h"
+#include "regname.h"
+#include "debug.inc"
+.text
+.global halt
+.global memcpy
+.global jump_to_kernel
+halt:
+    b halt
+memcpy:
+    srwi. r7, r5, 3
+    addi r6, r3, -4
+    addi r4, r4, -4
+    beq 2f
+    andi. r0, r6, 3
+    mtctr r7
+    bne 5f
+:
+    lwz r7, 4(r4)
+    lwzu r8, 8(r4)
+    stw r7, 4(r6)
+    stwu r8, 8(r6)
+    bdnz 1b
+    andi. r5, r5, 7
+:
+    cmplwi 0, r5, 4
+    blt 3f
+    lwzu r0, 4(r4)
+    addi r5, r5, -4
+    stwu r0, 4(r6)
+:
+    cmpwi 0, r5, 0
+    beqlr
+    mtctr r5
+    addi r4, r4, 3
+    addi r6, r6, 3
+:
+    lbzu r0, 1(r4)
+    stbu r0, 1(r6)
+    bdnz 4b
+    blr
+:
+    subfic r0, r0, 4
+    mtctr r0
+:
+    lbz r7, 4(r4)
+    addi r4, r4, 1
+    stb r7, 4(r6)
+    addi r6, r6, 1
+    bdnz 6b
+    subf r5, r0, r5
+    rlwinm. r7, r5, 32-3, 3, 31
+    beq 2b
+    mtctr r7
+    b 1b
+jump_to_kernel:
+    # r3 = bootinfo (pa)
+    # r4 = bootinfo_size
+    # r5 = trans (pa)
+    # r6 = bytes to copy
+    # r7 = real_mode (pa)
+    # r8 = framebuffer (pa)
+    # r9 = scanline
+    # disable interrupts
+    mfmsr r31
+    rlwinm r31, r31, 0, 17, 15
+    mtmsr r31
+    # set real_mode meeting point address
+    mtspr srr0, r7
+    # jumps to real_mode
+    mfmsr r31
+    lis r30, ~0@h
+    ori r30, r30, ~(msr_ir | msr_dr | msr_ee)@l
+    and r31, r31, r30
+    mtspr srr1, r31
+    sync
+    isync
+    rfi
+.section REALMODE, "ax"
+.align PAGE_WIDTH
+.global real_mode
+real_mode:
+    DEBUG_INIT
+    DEBUG_real_mode
+    # copy kernel to proper location
+    #
+    # r5 = trans (pa)
+    # r6 = bytes to copy
+    # r8 = framebuffer (pa)
+    # r9 = scanline
+    li r31, PAGE_SIZE >> 2
+    li r30, 0
+    page_copy:
+        cmpwi r6, 0
+        beq copy_end
+        # copy page
+        mtctr r31
+        lwz r29, 0(r5)
+        DEBUG_INIT
+        DEBUG_copy_loop
+        copy_loop:
+            lwz r28, 0(r29)
+            stw r28, 0(r30)
+            addi r29, r29, 4
+            addi r30, r30, 4
+            subi r6, r6, 4
+            cmpwi r6, 0
+            beq copy_end
+            bdnz copy_loop
+            DEBUG_end_copy_loop
+        addi r5, r5, 4
+        b page_copy
+    copy_end:
+    DEBUG_segments
+    # initially fill segment registers
+    li r31, 0
+    li r29, 8
+    mtctr r29
+    li r30, 0                     # ASID 0 (VSIDs 0 .. 7)
+    seg_fill_uspace:
+        mtsrin r30, r31
+        addi r30, r30, 1
+        addis r31, r31, 0x1000    # move to next SR
+        bdnz seg_fill_uspace
+    li r29, 8
+    mtctr r29
+    lis r30, 0x4000               # priviledged access only
+    ori r30, r30, 8               # ASID 0 (VSIDs 8 .. 15)
+    seg_fill_kernel:
+        mtsrin r30, r31
+        addi r30, r30, 1
+        addis r31, r31, 0x1000    # move to next SR
+        bdnz seg_fill_kernel
+    # invalidate block address translation registers
+    DEBUG_bat
+    li r30, 0
+    mtspr ibat0u, r30
+    mtspr ibat0l, r30
+    mtspr ibat1u, r30
+    mtspr ibat1l, r30
+    mtspr ibat2u, r30
+    mtspr ibat2l, r30
+    mtspr ibat3u, r30
+    mtspr ibat3l, r30
+    mtspr dbat0u, r30
+    mtspr dbat0l, r30
+    mtspr dbat1u, r30
+    mtspr dbat1l, r30
+    mtspr dbat2u, r30
+    mtspr dbat2l, r30
+    mtspr dbat3u, r30
+    mtspr dbat3l, r30
+    # create empty Page Hash Table
+    # on top of memory, size 64 KB
+    DEBUG_pht
+    lwz r31, 0(r3)                # r31 = memory size
+    lis r30, 65536@h
+    ori r30, r30, 65536@l         # r30 = 65536
+    subi r29, r30, 1              # r29 = 65535
+    sub r31, r31, r30
+    andc r31, r31, r29            # pht = ALIGN_DOWN(memory_size - 65536, 65536)
+    mtsdr1 r31
+    li r29, 2
+    srw r30, r30, r29             # r30 = 16384
+    li r29, 0
+    pht_clear:
+        # write zeroes
+        stw r29, 0(r31)
+        addi r31, r31, 4
+        subi r30, r30, 4
+        cmpwi r30, 0
+        beq clear_end
+        bdnz pht_clear
+        DEBUG_end_pht_clear
+    clear_end:
+#ifdef CONFIG_BAT
+    # create BAT identity mapping
+    DEBUG_mapping
+    lwz r31, 0(r3)                # r31 = memory size
+    lis r29, 0x0002
+    cmpw r31, r29
+    blt no_bat                    # less than 128 KB -> no BAT
+    li r29, 18
+    srw r31, r31, r29             # r31 = total >> 18
+    # create Block Length mask by replicating
+    # the leading logical one 14 times
+    li r29, 14
+    mtctr r31
+    li r29, 1
+    bat_mask:
+        srw r30, r31, r29         # r30 = mask >> 1
+        or r31, r31, r30          # mask = mask | r30
+        bdnz bat_mask
+    DEBUG_bat_mask
+    andi. r31, r31, 0x07ff        # mask = mask & 0x07ff (BAT can map up to 256 MB)
+    li r29, 2
+    slw r31, r31, r29             # mask = mask << 2
+    ori r31, r31, 0x0002          # mask = mask | 0x0002 (priviledged access only)
+    lis r29, 0x8000
+    or r29, r29, r31
+    lis r30, 0x0000
+    ori r30, r30, 0x0002
+    mtspr ibat0u, r29
+    mtspr ibat0l, r30
+    mtspr dbat0u, r29
+    mtspr dbat0l, r30
+    no_bat:
+#endif
+    DEBUG_tlb
+    tlbia
+    tlbsync
+    DEBUG_prepare
+    # start the kernel
+    #
+    # pc = KERNEL_START_ADDR
+    # r3 = bootinfo (pa)
+    # sprg0 = KA2PA(KERNEL_START_ADDR)
+    # sprg3 = physical memory size
+    # sp = 0 (pa)
+    lis r31, KERNEL_START_ADDR@ha
+    addi r31, r31, KERNEL_START_ADDR@l
+    mtspr srr0, r31
+    subis r31, r31, 0x8000
+    mtsprg0 r31
+    lwz r31, 0(r3)
+    mtsprg3 r31
+    li sp, 0
+    mfmsr r31
+    ori r31, r31, (msr_ir | msr_dr)@l
+    mtspr srr1, r31
+    sync
+    isync
+    DEBUG_rfi
+    rfi
+.align PAGE_WIDTH
+.global trans
+trans:
+    .space (TRANS_SIZE * TRANS_ITEM_SIZE)

 /tags/0.2.0.2/boot/arch/ppc32/loader/debug.inc
 ,0 → 1,11479
+#
+# Copyright (C) 2006 Martin Decky
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# - Redistributions of source code must retain the above copyright
+#   notice, this list of conditions and the following disclaimer.
+# - Redistributions in binary form must reproduce the above copyright
+#   notice, this list of conditions and the following disclaimer in the
+#   documentation and/or other materials provided with the distribution.
+# - The name of the author may not be used to endorse or promote products
+#   derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+.macro DEBUG_INIT
+#ifdef CONFIG_DEBUG
+    lis r11, 65535
+    ori r11, r11, 65535
+    lis r12, 0
+    ori r12, r12, 0
+    mr r10, r8
+#endif
+.endm
+.macro DEBUG_real_mode
+#ifdef CONFIG_DEBUG
+    stw r12, 0(r10)
+    stw r12, 4(r10)
+    stw r12, 8(r10)
+    stw r12, 12(r10)
+    stw r12, 16(r10)
+    stw r12, 20(r10)
+    stw r12, 24(r10)
+    stw r12, 28(r10)
+    stw r12, 32(r10)
+    stw r12, 36(r10)
+    stw r12, 40(r10)
+    stw r12, 44(r10)
+    stw r12, 48(r10)
+    stw r12, 52(r10)
+    stw r12, 56(r10)
+    stw r12, 60(r10)
+    stw r12, 64(r10)
+    stw r12, 68(r10)
+    stw r12, 72(r10)
+    stw r12, 76(r10)
+    stw r12, 80(r10)
+    stw r12, 84(r10)
+    stw r12, 88(r10)
+    stw r12, 92(r10)
+    stw r12, 96(r10)
+    stw r12, 100(r10)
+    stw r12, 104(r10)
+    stw r12, 108(r10)
+    stw r12, 112(r10)
+    stw r12, 116(r10)
+    stw r12, 120(r10)
+    stw r12, 124(r10)
+    stw r12, 128(r10)
+    stw r12, 132(r10)
+    stw r12, 136(r10)
+    stw r12, 140(r10)
+    stw r12, 144(r10)
+    stw r12, 148(r10)
+    stw r12, 152(r10)
+    stw r12, 156(r10)
+    stw r12, 160(r10)
+    stw r12, 164(r10)
+    stw r12, 168(r10)
+    stw r12, 172(r10)
+    stw r12, 176(r10)
+    stw r12, 180(r10)
+    stw r12, 184(r10)
+    stw r12, 188(r10)
+    stw r12, 192(r10)
+    stw r12, 196(r10)
+    stw r12, 200(r10)
+    stw r12, 204(r10)
+    stw r12, 208(r10)
+    stw r12, 212(r10)
+    stw r12, 216(r10)
+    stw r12, 220(r10)
+    stw r12, 224(r10)
+    stw r12, 228(r10)
+    stw r12, 232(r10)
+    stw r12, 236(r10)
+    stw r12, 240(r10)
+    stw r12, 244(r10)
+    stw r12, 248(r10)
+    stw r12, 252(r10)
+    stw r12, 256(r10)
+    stw r12, 260(r10)
+    stw r12, 264(r10)
+    stw r12, 268(r10)
+    stw r12, 272(r10)
+    stw r12, 276(r10)
+    stw r12, 280(r10)
+    stw r12, 284(r10)
+    add r10, r10, r9
+    stw r12, 0(r10)
+    stw r12, 4(r10)
+    stw r12, 8(r10)
+    stw r12, 12(r10)
+    stw r12, 16(r10)
+    stw r12, 20(r10)
+    stw r12, 24(r10)
+    stw r12, 28(r10)
+    stw r12, 32(r10)
+    stw r12, 36(r10)
+    stw r12, 40(r10)
+    stw r12, 44(r10)
+    stw r12, 48(r10)
+    stw r12, 52(r10)
+    stw r12, 56(r10)
+    stw r12, 60(r10)
+    stw r12, 64(r10)
+    stw r12, 68(r10)
+    stw r12, 72(r10)
+    stw r12, 76(r10)
+    stw r12, 80(r10)
+    stw r12, 84(r10)
+    stw r12, 88(r10)
+    stw r12, 92(r10)
+    stw r12, 96(r10)
+    stw r12, 100(r10)
+    stw r12, 104(r10)
+    stw r12, 108(r10)
+    stw r12, 112(r10)
+    stw r12, 116(r10)
+    stw r12, 120(r10)
+    stw r12, 124(r10)
+    stw r12, 128(r10)
+    stw r12, 132(r10)
+    stw r12, 136(r10)
+    stw r12, 140(r10)
+    stw r12, 144(r10)
+    stw r12, 148(r10)
+    stw r12, 152(r10)
+    stw r12, 156(r10)
+    stw r12, 160(r10)
+    stw r12, 164(r10)
+    stw r12, 168(r10)
+    stw r12, 172(r10)
+    stw r12, 176(r10)
+    stw r12, 180(r10)
+    stw r12, 184(r10)
+    stw r12, 188(r10)
+    stw r12, 192(r10)
+    stw r12, 196(r10)
+    stw r12, 200(r10)
+    stw r12, 204(r10)
+    stw r12, 208(r10)
+    stw r12, 212(r10)
+    stw r12, 216(r10)
+    stw r12, 220(r10)
+    stw r12, 224(r10)
+    stw r12, 228(r10)
+    stw r12, 232(r10)
+    stw r12, 236(r10)
+    stw r12, 240(r10)
+    stw r12, 244(r10)
+    stw r12, 248(r10)
+    stw r12, 252(r10)
+    stw r12, 256(r10)
+    stw r12, 260(r10)
+    stw r12, 264(r10)
+    stw r12, 268(r10)
+    stw r12, 272(r10)
+    stw r12, 276(r10)
+    stw r12, 280(r10)
+    stw r12, 284(r10)
+    add r10, r10, r9
+    stw r12, 0(r10)
+    stw r12, 4(r10)
+    stw r12, 8(r10)
+    stw r12, 12(r10)
+    stw r12, 16(r10)
+    stw r12, 20(r10)
+    stw r12, 24(r10)
+    stw r12, 28(r10)
+    stw r12, 32(r10)
+    stw r12, 36(r10)
+    stw r12, 40(r10)
+    stw r12, 44(r10)
+    stw r12, 48(r10)
+    stw r12, 52(r10)
+    stw r12, 56(r10)
+    stw r12, 60(r10)
+    stw r12, 64(r10)
+    stw r12, 68(r10)
+    stw r12, 72(r10)
+    stw r12, 76(r10)
+    stw r12, 80(r10)
+    stw r12, 84(r10)
+    stw r12, 88(r10)
+    stw r12, 92(r10)
+    stw r12, 96(r10)
+    stw r12, 100(r10)
+    stw r12, 104(r10)
+    stw r11, 108(r10)
+    stw r11, 112(r10)
+    stw r11, 116(r10)
+    stw r12, 120(r10)
+    stw r12, 124(r10)
+    stw r12, 128(r10)
+    stw r12, 132(r10)
+    stw r12, 136(r10)
+    stw r12, 140(r10)
+    stw r12, 144(r10)
+    stw r12, 148(r10)
+    stw r12, 152(r10)
+    stw r12, 156(r10)
+    stw r12, 160(r10)
+    stw r12, 164(r10)
+    stw r12, 168(r10)
+    stw r12, 172(r10)
+    stw r12, 176(r10)
+    stw r12, 180(r10)
+    stw r12, 184(r10)
+    stw r12, 188(r10)
+    stw r12, 192(r10)
+    stw r12, 196(r10)
+    stw r12, 200(r10)
+    stw r12, 204(r10)
+    stw r12, 208(r10)
+    stw r12, 212(r10)
+    stw r12, 216(r10)
+    stw r12, 220(r10)
+    stw r12, 224(r10)
+    stw r12, 228(r10)
+    stw r12, 232(r10)
+    stw r12, 236(r10)
+    stw r11, 240(r10)
+    stw r11, 244(r10)
+    stw r11, 248(r10)
+    stw r12, 252(r10)
+    stw r12, 256(r10)
+    stw r12, 260(r10)
+    stw r12, 264(r10)
+    stw r12, 268(r10)
+    stw r12, 272(r10)
+    stw r12, 276(r10)
+    stw r12, 280(r10)
+    stw r12, 284(r10)
+    add r10, r10, r9
+    stw r12, 0(r10)
+    stw r12, 4(r10)
+    stw r12, 8(r10)
+    stw r12, 12(r10)
+    stw r12, 16(r10)
+    stw r12, 20(r10)
+    stw r12, 24(r10)
+    stw r12, 28(r10)
+    stw r12, 32(r10)
+    stw r12, 36(r10)
+    stw r12, 40(r10)
+    stw r12, 44(r10)
+    stw r12, 48(r10)
+    stw r12, 52(r10)
+    stw r12, 56(r10)
+    stw r12, 60(r10)
+    stw r12, 64(r10)
+    stw r12, 68(r10)
+    stw r12, 72(r10)
+    stw r12, 76(r10)
+    stw r12, 80(r10)
+    stw r12, 84(r10)
+    stw r12, 88(r10)
+    stw r12, 92(r10)
+    stw r12, 96(r10)
+    stw r12, 100(r10)
+    stw r12, 104(r10)
+    stw r12, 108(r10)
+    stw r11, 112(r10)
+    stw r11, 116(r10)
+    stw r12, 120(r10)
+    stw r12, 124(r10)
+    stw r12, 128(r10)
+    stw r12, 132(r10)
+    stw r12, 136(r10)
+    stw r12, 140(r10)
+    stw r12, 144(r10)
+    stw r12, 148(r10)
+    stw r12, 152(r10)
+    stw r12, 156(r10)
+    stw r12, 160(r10)
+    stw r12, 164(r10)
+    stw r12, 168(r10)
+    stw r12, 172(r10)
+    stw r12, 176(r10)
+    stw r12, 180(r10)
+    stw r12, 184(r10)
+    stw r12, 188(r10)
+    stw r12, 192(r10)
+    stw r12, 196(r10)
+    stw r12, 200(r10)
+    stw r12, 204(r10)
+    stw r12, 208(r10)
+    stw r12, 212(r10)
+    stw r12, 216(r10)
+    stw r12, 220(r10)
+    stw r12, 224(r10)
+    stw r12, 228(r10)
+    stw r12, 232(r10)
+    stw r12, 236(r10)
+    stw r12, 240(r10)
+    stw r11, 244(r10)
+    stw r11, 248(r10)
+    stw r12, 252(r10)
+    stw r12, 256(r10)
+    stw r12, 260(r10)
+    stw r12, 264(r10)
+    stw r12, 268(r10)
+    stw r12, 272(r10)
+    stw r12, 276(r10)
+    stw r12, 280(r10)
+    stw r12, 284(r10)
+    add r10, r10, r9
+    stw r12, 0(r10)
+    stw r12, 4(r10)
+    stw r12, 8(r10)
+    stw r12, 12(r10)
+    stw r12, 16(r10)
+    stw r12, 20(r10)
+    stw r12, 24(r10)
+    stw r12, 28(r10)
+    stw r12, 32(r10)
+    stw r12, 36(r10)
+    stw r12, 40(r10)
+    stw r12, 44(r10)
+    stw r12, 48(r10)
+    stw r12, 52(r10)
+    stw r12, 56(r10)
+    stw r12, 60(r10)
+    stw r12, 64(r10)
+    stw r12, 68(r10)
+    stw r12, 72(r10)
+    stw r12, 76(r10)
+    stw r12, 80(r10)
+    stw r12, 84(r10)
+    stw r12, 88(r10)
+    stw r12, 92(r10)
+    stw r12, 96(r10)
+    stw r12, 100(r10)
+    stw r12, 104(r10)
+    stw r12, 108(r10)
+    stw r11, 112(r10)
+    stw r11, 116(r10)
+    stw r12, 120(r10)
+    stw r12, 124(r10)
+    stw r12, 128(r10)
+    stw r12, 132(r10)
+    stw r12, 136(r10)
+    stw r12, 140(r10)
+    stw r12, 144(r10)
+    stw r12, 148(r10)
+    stw r12, 152(r10)
+    stw r12, 156(r10)
+    stw r12, 160(r10)
+    stw r12, 164(r10)
+    stw r12, 168(r10)
+    stw r12, 172(r10)
+    stw r12, 176(r10)
+    stw r12, 180(r10)
+    stw r12, 184(r10)
+    stw r12, 188(r10)
+    stw r12, 192(r10)
+    stw r12, 196(r10)
+    stw r12, 200(r10)
+    stw r12, 204(r10)
+    stw r12, 208(r10)
+    stw r12, 212(r10)
+    stw r12, 216(r10)
+    stw r12, 220(r10)
+    stw r12, 224(r10)
+    stw r12, 228(r10)
+    stw r12, 232(r10)
+    stw r12, 236(r10)
+    stw r12, 240(r10)
+    stw r11, 244(r10)
+    stw r11, 248(r10)
+    stw r12, 252(r10)
+    stw r12, 256(r10)
+    stw r12, 260(r10)
+    stw r12, 264(r10)
+    stw r12, 268(r10)
+    stw r12, 272(r10)
+    stw r12, 276(r10)
+    stw r12, 280(r10)
+    stw r12, 284(r10)
+    add r10, r10, r9
+    stw r12, 0(r10)
+    stw r11, 4(r10)
+    stw r11, 8(r10)
+    stw r12, 12(r10)
+    stw r11, 16(r10)
+    stw r11, 20(r10)
+    stw r11, 24(r10)
+    stw r12, 28(r10)
+    stw r12, 32(r10)
+    stw r12, 36(r10)
+    stw r11, 40(r10)
+    stw r11, 44(r10)
+    stw r11, 48(r10)
+    stw r11, 52(r10)
+    stw r11, 56(r10)
+    stw r12, 60(r10)
+    stw r12, 64(r10)
+    stw r12, 68(r10)
+    stw r11, 72(r10)
+    stw r11, 76(r10)
+    stw r11, 80(r10)
+    stw r11, 84(r10)
+    stw r12, 88(r10)
+    stw r12, 92(r10)
+    stw r12, 96(r10)
+    stw r12, 100(r10)
+    stw r12, 104(r10)
+    stw r12, 108(r10)
+    stw r11, 112(r10)
+    stw r11, 116(r10)
+    stw r12, 120(r10)
+    stw r12, 124(r10)
+    stw r12, 128(r10)
+    stw r12, 132(r10)
+    stw r12, 136(r10)
+    stw r12, 140(r10)
+    stw r12, 144(r10)
+    stw r12, 148(r10)
+    stw r12, 152(r10)
+    stw r12, 156(r10)
+    stw r12, 160(r10)
+    stw r11, 164(r10)
+    stw r11, 168(r10)
+    stw r11, 172(r10)
+    stw r12, 176(r10)
+    stw r11, 180(r10)
+    stw r11, 184(r10)
+    stw r12, 188(r10)
+    stw r12, 192(r10)
+    stw r12, 196(r10)
+    stw r11, 200(r10)
+    stw r11, 204(r10)
+    stw r11, 208(r10)
+    stw r11, 212(r10)
+    stw r11, 216(r10)
+    stw r12, 220(r10)
+    stw r12, 224(r10)
+    stw r12, 228(r10)
+    stw r12, 232(r10)
+    stw r11, 236(r10)
+    stw r11, 240(r10)
+    stw r11, 244(r10)
+    stw r11, 248(r10)
+    stw r12, 252(r10)
+    stw r12, 256(r10)
+    stw r12, 260(r10)
+    stw r11, 264(r10)
+    stw r11, 268(r10)
+    stw r11, 272(r10)
+    stw r11, 276(r10)
+    stw r11, 280(r10)
+    stw r12, 284(r10)
+    add r10, r10, r9
+    stw r12, 0(r10)
+    stw r12, 4(r10)
+    stw r11, 8(r10)
+    stw r11, 12(r10)
+    stw r11, 16(r10)
+    stw r12, 20(r10)
+    stw r11, 24(r10)
+    stw r11, 28(r10)
+    stw r12, 32(r10)
+    stw r11, 36(r10)
+    stw r11, 40(r10)
+    stw r12, 44(r10)
+    stw r12, 48(r10)
+    stw r12, 52(r10)
+    stw r11, 56(r10)
+    stw r11, 60(r10)
+    stw r12, 64(r10)
+    stw r12, 68(r10)
+    stw r12, 72(r10)
+    stw r12, 76(r10)
+    stw r12, 80(r10)
+    stw r11, 84(r10)
+    stw r11, 88(r10)
+    stw r12, 92(r10)
+    stw r12, 96(r10)
+    stw r12, 100(r10)
+    stw r12, 104(r10)
+    stw r12, 108(r10)
+    stw r11, 112(r10)
+    stw r11, 116(r10)
+    stw r12, 120(r10)
+    stw r12, 124(r10)
+    stw r12, 128(r10)
+    stw r12, 132(r10)
+    stw r12, 136(r10)
+    stw r12, 140(r10)
+    stw r12, 144(r10)
+    stw r12, 148(r10)
+    stw r12, 152(r10)
+    stw r12, 156(r10)
+    stw r12, 160(r10)
+    stw r11, 164(r10)
+    stw r11, 168(r10)
+    stw r11, 172(r10)
+    stw r11, 176(r10)
+    stw r11, 180(r10)
+    stw r11, 184(r10)
+    stw r11, 188(r10)
+    stw r12, 192(r10)
+    stw r11, 196(r10)
+    stw r11, 200(r10)
+    stw r12, 204(r10)
+    stw r12, 208(r10)
+    stw r12, 212(r10)
+    stw r11, 216(r10)
+    stw r11, 220(r10)
+    stw r12, 224(r10)
+    stw r12, 228(r10)
+    stw r11, 232(r10)
+    stw r11, 236(r10)
+    stw r12, 240(r10)
+    stw r11, 244(r10)
+    stw r11, 248(r10)
+    stw r12, 252(r10)
+    stw r12, 256(r10)
+    stw r11, 260(r10)
+    stw r11, 264(r10)
+    stw r12, 268(r10)
+    stw r12, 272(r10)
+    stw r12, 276(r10)
+    stw r11, 280(r10)
+    stw r11, 284(r10)
+    add r10, r10, r9
+    stw r12, 0(r10)
+    stw r12, 4(r10)
+    stw r11, 8(r10)
+    stw r11, 12(r10)
+    stw r12, 16(r10)
+    stw r12, 20(r10)
+    stw r11, 24(r10)
+    stw r11, 28(r10)
+    stw r12, 32(r10)
+    stw r11, 36(r10)
+    stw r11, 40(r10)
+    stw r11, 44(r10)
+    stw r11, 48(r10)
+    stw r11, 52(r10)
+    stw r11, 56(r10)
+    stw r11, 60(r10)
+    stw r12, 64(r10)
+    stw r12, 68(r10)
+    stw r11, 72(r10)
+    stw r11, 76(r10)
+    stw r11, 80(r10)
+    stw r11, 84(r10)
+    stw r11, 88(r10)
+    stw r12, 92(r10)
+    stw r12, 96(r10)
+    stw r12, 100(r10)
+    stw r12, 104(r10)
+    stw r12, 108(r10)
+    stw r11, 112(r10)
+    stw r11, 116(r10)
+    stw r12, 120(r10)
+    stw r12, 124(r10)
+    stw r12, 128(r10)
+    stw r12, 132(r10)
+    stw r12, 136(r10)
+    stw r12, 140(r10)
+    stw r12, 144(r10)
+    stw r12, 148(r10)
+    stw r12, 152(r10)
+    stw r12, 156(r10)
+    stw r12, 160(r10)
+    stw r11, 164(r10)
+    stw r11, 168(r10)
+    stw r12, 172(r10)
+    stw r11, 176(r10)
+    stw r12, 180(r10)
+    stw r11, 184(r10)
+    stw r11, 188(r10)
+    stw r12, 192(r10)
+    stw r11, 196(r10)
+    stw r11, 200(r10)
+    stw r12, 204(r10)
+    stw r12, 208(r10)
+    stw r12, 212(r10)
+    stw r11, 216(r10)
+    stw r11, 220(r10)
+    stw r12, 224(r10)
+    stw r11, 228(r10)
+    stw r11, 232(r10)
+    stw r12, 236(r10)
+    stw r12, 240(r10)
+    stw r11, 244(r10)
+    stw r11, 248(r10)
+    stw r12, 252(r10)
+    stw r12, 256(r10)
+    stw r11, 260(r10)
+    stw r11, 264(r10)
+    stw r11, 268(r10)
+    stw r11, 272(r10)
+    stw r11, 276(r10)
+    stw r11, 280(r10)
+    stw r11, 284(r10)
+    add r10, r10, r9
+    stw r12, 0(r10)
+    stw r12, 4(r10)
+    stw r11, 8(r10)
+    stw r11, 12(r10)
+    stw r12, 16(r10)
+    stw r12, 20(r10)
+    stw r12, 24(r10)
+    stw r12, 28(r10)
+    stw r12, 32(r10)
+    stw r11, 36(r10)
+    stw r11, 40(r10)
+    stw r12, 44(r10)
+    stw r12, 48(r10)
+    stw r12, 52(r10)
+    stw r12, 56(r10)
+    stw r12, 60(r10)
+    stw r12, 64(r10)
+    stw r11, 68(r10)
+    stw r11, 72(r10)
+    stw r12, 76(r10)
+    stw r12, 80(r10)
+    stw r11, 84(r10)
+    stw r11, 88(r10)
+    stw r12, 92(r10)
+    stw r12, 96(r10)
+    stw r12, 100(r10)
+    stw r12, 104(r10)
+    stw r12, 108(r10)
+    stw r11, 112(r10)
+    stw r11, 116(r10)
+    stw r12, 120(r10)
+    stw r12, 124(r10)
+    stw r12, 128(r10)
+    stw r12, 132(r10)
+    stw r12, 136(r10)
+    stw r12, 140(r10)
+    stw r12, 144(r10)
+    stw r12, 148(r10)
+    stw r12, 152(r10)
+    stw r12, 156(r10)
+    stw r12, 160(r10)
+    stw r11, 164(r10)
+    stw r11, 168(r10)
+    stw r12, 172(r10)
+    stw r11, 176(r10)
+    stw r12, 180(r10)
+    stw r11, 184(r10)
+    stw r11, 188(r10)
+    stw r12, 192(r10)
+    stw r11, 196(r10)
+    stw r11, 200(r10)
+    stw r12, 204(r10)
+    stw r12, 208(r10)
+    stw r12, 212(r10)
+    stw r11, 216(r10)
+    stw r11, 220(r10)
+    stw r12, 224(r10)
+    stw r11, 228(r10)
+    stw r11, 232(r10)
+    stw r12, 236(r10)
+    stw r12, 240(r10)
+    stw r11, 244(r10)
+    stw r11, 248(r10)
+    stw r12, 252(r10)
+    stw r12, 256(r10)
+    stw r11, 260(r10)
+    stw r11, 264(r10)
+    stw r12, 268(r10)
+    stw r12, 272(r10)
+    stw r12, 276(r10)
+    stw r12, 280(r10)
+    stw r12, 284(r10)
+    add r10, r10, r9
+    stw r12, 0(r10)
+    stw r12, 4(r10)
+    stw r11, 8(r10)
+    stw r11, 12(r10)
+    stw r12, 16(r10)
+    stw r12, 20(r10)
+    stw r12, 24(r10)
+    stw r12, 28(r10)
+    stw r12, 32(r10)
+    stw r11, 36(r10)
+    stw r11, 40(r10)
+    stw r12, 44(r10)
+    stw r12, 48(r10)
+    stw r12, 52(r10)
+    stw r12, 56(r10)
+    stw r12, 60(r10)
+    stw r12, 64(r10)
+    stw r11, 68(r10)
+    stw r11, 72(r10)
+    stw r12, 76(r10)
+    stw r12, 80(r10)
+    stw r11, 84(r10)
+    stw r11, 88(r10)
+    stw r12, 92(r10)
+    stw r12, 96(r10)
+    stw r12, 100(r10)
+    stw r12, 104(r10)
+    stw r12, 108(r10)
+    stw r11, 112(r10)
+    stw r11, 116(r10)
+    stw r12, 120(r10)
+    stw r12, 124(r10)
+    stw r12, 128(r10)
+    stw r12, 132(r10)
+    stw r12, 136(r10)
+    stw r12, 140(r10)
+    stw r12, 144(r10)
+    stw r12, 148(r10)
+    stw r12, 152(r10)
+    stw r12, 156(r10)
+    stw r12, 160(r10)
+    stw r11, 164(r10)
+    stw r11, 168(r10)
+    stw r12, 172(r10)
+    stw r11, 176(r10)
+    stw r12, 180(r10)
+    stw r11, 184(r10)
+    stw r11, 188(r10)
+    stw r12, 192(r10)
+    stw r11, 196(r10)
+    stw r11, 200(r10)
+    stw r12, 204(r10)
+    stw r12, 208(r10)
+    stw r12, 212(r10)
+    stw r11, 216(r10)
+    stw r11, 220(r10)
+    stw r12, 224(r10)
+    stw r11, 228(r10)
+    stw r11, 232(r10)
+    stw r12, 236(r10)
+    stw r12, 240(r10)
+    stw r11, 244(r10)
+    stw r11, 248(r10)
+    stw r12, 252(r10)
+    stw r12, 256(r10)
+    stw r11, 260(r10)
+    stw r11, 264(r10)
+    stw r12, 268(r10)
+    stw r12, 272(r10)
+    stw r12, 276(r10)
+    stw r12, 280(r10)
+    stw r12, 284(r10)
+    add r10, r10, r9
+    stw r12, 0(r10)
+    stw r12, 4(r10)
+    stw r11, 8(r10)
+    stw r11, 12(r10)
+    stw r12, 16(r10)
+    stw r12, 20(r10)
+    stw r12, 24(r10)
+    stw r12, 28(r10)
+    stw r12, 32(r10)
+    stw r11, 36(r10)
+    stw r11, 40(r10)
+    stw r12, 44(r10)
+    stw r12, 48(r10)
+    stw r12, 52(r10)
+    stw r11, 56(r10)
+    stw r11, 60(r10)
+    stw r12, 64(r10)
+    stw r11, 68(r10)
+    stw r11, 72(r10)
+    stw r12, 76(r10)
+    stw r12, 80(r10)
+    stw r11, 84(r10)
+    stw r11, 88(r10)
+    stw r12, 92(r10)
+    stw r12, 96(r10)
+    stw r12, 100(r10)
+    stw r12, 104(r10)
+    stw r12, 108(r10)
+    stw r11, 112(r10)
+    stw r11, 116(r10)
+    stw r12, 120(r10)
+    stw r12, 124(r10)
+    stw r12, 128(r10)
+    stw r12, 132(r10)
+    stw r12, 136(r10)
+    stw r12, 140(r10)
+    stw r12, 144(r10)
+    stw r12, 148(r10)
+    stw r12, 152(r10)
+    stw r12, 156(r10)
+    stw r12, 160(r10)
+    stw r11, 164(r10)
+    stw r11, 168(r10)
+    stw r12, 172(r10)
+    stw r11, 176(r10)
+    stw r12, 180(r10)
+    stw r11, 184(r10)
+    stw r11, 188(r10)
+    stw r12, 192(r10)
+    stw r11, 196(r10)
+    stw r11, 200(r10)
+    stw r12, 204(r10)
+    stw r12, 208(r10)
+    stw r12, 212(r10)
+    stw r11, 216(r10)
+    stw r11, 220(r10)
+    stw r12, 224(r10)
+    stw r11, 228(r10)
+    stw r11, 232(r10)
+    stw r12, 236(r10)
+    stw r12, 240(r10)
+    stw r11, 244(r10)
+    stw r11, 248(r10)
+    stw r12, 252(r10)
+    stw r12, 256(r10)
+    stw r11, 260(r10)
+    stw r11, 264(r10)
+    stw r12, 268(r10)
+    stw r12, 272(r10)
+    stw r12, 276(r10)
+    stw r11, 280(r10)
+    stw r11, 284(r10)
+    add r10, r10, r9
+    stw r12, 0(r10)
+    stw r11, 4(r10)
+    stw r11, 8(r10)
+    stw r11, 12(r10)
+    stw r11, 16(r10)
+    stw r12, 20(r10)
+    stw r12, 24(r10)
+    stw r12, 28(r10)
+    stw r12, 32(r10)
+    stw r12, 36(r10)
+    stw r11, 40(r10)
+    stw r11, 44(r10)
+    stw r11, 48(r10)
+    stw r11, 52(r10)
+    stw r11, 56(r10)
+    stw r12, 60(r10)
+    stw r12, 64(r10)
+    stw r12, 68(r10)
+    stw r11, 72(r10)
+    stw r11, 76(r10)
+    stw r11, 80(r10)
+    stw r12, 84(r10)
+    stw r11, 88(r10)
+    stw r11, 92(r10)
+    stw r12, 96(r10)
+    stw r12, 100(r10)
+    stw r12, 104(r10)
+    stw r11, 108(r10)
+    stw r11, 112(r10)
+    stw r11, 116(r10)
+    stw r11, 120(r10)
+    stw r12, 124(r10)
+    stw r12, 128(r10)
+    stw r12, 132(r10)
+    stw r12, 136(r10)
+    stw r12, 140(r10)
+    stw r12, 144(r10)
+    stw r12, 148(r10)
+    stw r12, 152(r10)
+    stw r12, 156(r10)
+    stw r12, 160(r10)
+    stw r11, 164(r10)
+    stw r11, 168(r10)
+    stw r12, 172(r10)
+    stw r12, 176(r10)
+    stw r12, 180(r10)
+    stw r11, 184(r10)
+    stw r11, 188(r10)
+    stw r12, 192(r10)
+    stw r12, 196(r10)
+    stw r11, 200(r10)
+    stw r11, 204(r10)
+    stw r11, 208(r10)
+    stw r11, 212(r10)
+    stw r11, 216(r10)
+    stw r12, 220(r10)
+    stw r12, 224(r10)
+    stw r12, 228(r10)
+    stw r11, 232(r10)
+    stw r11, 236(r10)
+    stw r11, 240(r10)
+    stw r12, 244(r10)
+    stw r11, 248(r10)
+    stw r11, 252(r10)
+    stw r12, 256(r10)
+    stw r12, 260(r10)
+    stw r11, 264(r10)
+    stw r11, 268(r10)
+    stw r11, 272(r10)
+    stw r11, 276(r10)
+    stw r11, 280(r10)
+    stw r12, 284(r10)
+    add r10, r10, r9
+    stw r12, 0(r10)
+    stw r12, 4(r10)
+    stw r12, 8(r10)
+    stw r12, 12(r10)
+    stw r12, 16(r10)
+    stw r12, 20(r10)
+    stw r12, 24(r10)
+    stw r12, 28(r10)
+    stw r12, 32(r10)
+    stw r12, 36(r10)
+    stw r12, 40(r10)
+    stw r12, 44(r10)
+    stw r12, 48(r10)
+    stw r12, 52(r10)
+    stw r12, 56(r10)
+    stw r12, 60(r10)
+    stw r12, 64(r10)
+    stw r12, 68(r10)
+    stw r12, 72(r10)
+    stw r12, 76(r10)
+    stw r12, 80(r10)
+    stw r12, 84(r10)
+    stw r12, 88(r10)
+    stw r12, 92(r10)
+    stw r12, 96(r10)
+    stw r12, 100(r10)
+    stw r12, 104(r10)
+    stw r12, 108(r10)
+    stw r12, 112(r10)
+    stw r12, 116(r10)
+    stw r12, 120(r10)
+    stw r12, 124(r10)
+    stw r12, 128(r10)
+    stw r12, 132(r10)
+    stw r12, 136(r10)
+    stw r12, 140(r10)
+    stw r12, 144(r10)
+    stw r12, 148(r10)
+    stw r12, 152(r10)
+    stw r12, 156(r10)
+    stw r12, 160(r10)
+    stw r12, 164(r10)
+    stw r12, 168(r10)
+    stw r12, 172(r10)
+    stw r12, 176(r10)
+    stw r12, 180(r10)
+    stw r12, 184(r10)
+    stw r12, 188(r10)
+    stw r12, 192(r10)
+    stw r12, 196(r10)
+    stw r12, 200(r10)
+    stw r12, 204(r10)
+    stw r12, 208(r10)
+    stw r12, 212(r10)
+    stw r12, 216(r10)
+    stw r12, 220(r10)
+    stw r12, 224(r10)
+    stw r12, 228(r10)
+    stw r12, 232(r10)
+    stw r12, 236(r10)
+    stw r12, 240(r10)
+    stw r12, 244(r10)
+    stw r12, 248(r10)
+    stw r12, 252(r10)
+    stw r12, 256(r10)
+    stw r12, 260(r10)
+    stw r12, 264(r10)
+    stw r12, 268(r10)
+    stw r12, 272(r10)
+    stw r12, 276(r10)
+    stw r12, 280(r10)
+    stw r12, 284(r10)
+    add r10, r10, r9
+    stw r12, 0(r10)
+    stw r12, 4(r10)
+    stw r12, 8(r10)
+    stw r12, 12(r10)
+    stw r12, 16(r10)
+    stw r12, 20(r10)
+    stw r12, 24(r10)
+    stw r12, 28(r10)
+    stw r12, 32(r10)
+    stw r12, 36(r10)
+    stw r12, 40(r10)
+    stw r12, 44(r10)
+    stw r12, 48(r10)
+    stw r12, 52(r10)
+    stw r12, 56(r10)
+    stw r12, 60(r10)
+    stw r12, 64(r10)
+    stw r12, 68(r10)
+    stw r12, 72(r10)
+    stw r12, 76(r10)
+    stw r12, 80(r10)
+    stw r12, 84(r10)
+    stw r12, 88(r10)
+    stw r12, 92(r10)
+    stw r12, 96(r10)
+    stw r12, 100(r10)
+    stw r12, 104(r10)
+    stw r12, 108(r10)
+    stw r12, 112(r10)
+    stw r12, 116(r10)
+    stw r12, 120(r10)
+    stw r12, 124(r10)
+    stw r12, 128(r10)
+    stw r11, 132(r10)
+    stw r11, 136(r10)
+    stw r11, 140(r10)
+    stw r11, 144(r10)
+    stw r11, 148(r10)
+    stw r11, 152(r10)
+    stw r11, 156(r10)
+    stw r12, 160(r10)
+    stw r12, 164(r10)
+    stw r12, 168(r10)
+    stw r12, 172(r10)
+    stw r12, 176(r10)
+    stw r12, 180(r10)
+    stw r12, 184(r10)
+    stw r12, 188(r10)
+    stw r12, 192(r10)
+    stw r12, 196(r10)
+    stw r12, 200(r10)
+    stw r12, 204(r10)
+    stw r12, 208(r10)
+    stw r12, 212(r10)
+    stw r12, 216(r10)
+    stw r12, 220(r10)
+    stw r12, 224(r10)
+    stw r12, 228(r10)
+    stw r12, 232(r10)
+    stw r12, 236(r10)
+    stw r12, 240(r10)
+    stw r12, 244(r10)
+    stw r12, 248(r10)
+    stw r12, 252(r10)
+    stw r12, 256(r10)
+    stw r12, 260(r10)
+    stw r12, 264(r10)
+    stw r12, 268(r10)
+    stw r12, 272(r10)
+    stw r12, 276(r10)
+    stw r12, 280(r10)
+    stw r12, 284(r10)
+    add r10, r10, r9
+    stw r12, 0(r10)
+    stw r12, 4(r10)
+    stw r12, 8(r10)
+    stw r12, 12(r10)
+    stw r12, 16(r10)
+    stw r12, 20(r10)
+    stw r12, 24(r10)
+    stw r12, 28(r10)
+    stw r12, 32(r10)
+    stw r12, 36(r10)
+    stw r12, 40(r10)
+    stw r12, 44(r10)
+    stw r12, 48(r10)
+    stw r12, 52(r10)
+    stw r12, 56(r10)
+    stw r12, 60(r10)
+    stw r12, 64(r10)
+    stw r12, 68(r10)
+    stw r12, 72(r10)
+    stw r12, 76(r10)
+    stw r12, 80(r10)
+    stw r12, 84(r10)
+    stw r12, 88(r10)
+    stw r12, 92(r10)
+    stw r12, 96(r10)
+    stw r12, 100(r10)
+    stw r12, 104(r10)
+    stw r12, 108(r10)
+    stw r12, 112(r10)
+    stw r12, 116(r10)
+    stw r12, 120(r10)
+    stw r12, 124(r10)
+    stw r12, 128(r10)
+    stw r12, 132(r10)
+    stw r12, 136(r10)
+    stw r12, 140(r10)
+    stw r12, 144(r10)
+    stw r12, 148(r10)
+    stw r12, 152(r10)
+    stw r12, 156(r10)
+    stw r12, 160(r10)
+    stw r12, 164(r10)
+    stw r12, 168(r10)
+    stw r12, 172(r10)
+    stw r12, 176(r10)
+    stw r12, 180(r10)
+    stw r12, 184(r10)
+    stw r12, 188(r10)
+    stw r12, 192(r10)
+    stw r12, 196(r10)
+    stw r12, 200(r10)
+    stw r12, 204(r10)
+    stw r12, 208(r10)
+    stw r12, 212(r10)
+    stw r12, 216(r10)
+    stw r12, 220(r10)
+    stw r12, 224(r10)
+    stw r12, 228(r10)
+    stw r12, 232(r10)
+    stw r12, 236(r10)
+    stw r12, 240(r10)
+    stw r12, 244(r10)
+    stw r12, 248(r10)
+    stw r12, 252(r10)
+    stw r12, 256(r10)
+    stw r12, 260(r10)
+    stw r12, 264(r10)
+    stw r12, 268(r10)
+    stw r12, 272(r10)
+    stw r12, 276(r10)
+    stw r12, 280(r10)
+    stw r12, 284(r10)
+    add r10, r10, r9
+    stw r12, 0(r10)
+    stw r12, 4(r10)
+    stw r12, 8(r10)
+    stw r12, 12(r10)
+    stw r12, 16(r10)
+    stw r12, 20(r10)
+    stw r12, 24(r10)
+    stw r12, 28(r10)
+    stw r12, 32(r10)
+    stw r12, 36(r10)
+    stw r12, 40(r10)
+    stw r12, 44(r10)
+    stw r12, 48(r10)
+    stw r12, 52(r10)
+    stw r12, 56(r10)
+    stw r12, 60(r10)
+    stw r12, 64(r10)
+    stw r12, 68(r10)
+    stw r12, 72(r10)
+    stw r12, 76(r10)
+    stw r12, 80(r10)
+    stw r12, 84(r10)
+    stw r12, 88(r10)
+    stw r12, 92(r10)
+    stw r12, 96(r10)
+    stw r12, 100(r10)
+    stw r12, 104(r10)
+    stw r12, 108(r10)
+    stw r12, 112(r10)
+    stw r12, 116(r10)
+    stw r12, 120(r10)
+    stw r12, 124(r10)
+    stw r12, 128(r10)
+    stw r12, 132(r10)
+    stw r12, 136(r10)
+    stw r12, 140(r10)
+    stw r12, 144(r10)
+    stw r12, 148(r10)
+    stw r12, 152(r10)
+    stw r12, 156(r10)
+    stw r12, 160(r10)
+    stw r12, 164(r10)
+    stw r12, 168(r10)
+    stw r12, 172(r10)
+    stw r12, 176(r10)
+    stw r12, 180(r10)
+    stw r12, 184(r10)
+    stw r12, 188(r10)
+    stw r12, 192(r10)
+    stw r12, 196(r10)
+    stw r12, 200(r10)
+    stw r12, 204(r10)
+    stw r12, 208(r10)
+    stw r12, 212(r10)
+    stw r12, 216(r10)
+    stw r12, 220(r10)
+    stw r12, 224(r10)
+    stw r12, 228(r10)
+    stw r12, 232(r10)
+    stw r12, 236(r10)
+    stw r12, 240(r10)
+    stw r12, 244(r10)
+    stw r12, 248(r10)
+    stw r12, 252(r10)
+    stw r12, 256(r10)
+    stw r12, 260(r10)
+    stw r12, 264(r10)
+    stw r12, 268(r10)
+    stw r12, 272(r10)
+    stw r12, 276(r10)
+    stw r12, 280(r10)
+    stw r12, 284(r10)
+#endif
+.endm
+.macro DEBUG_copy_loop
+#ifdef CONFIG_DEBUG
+    stw r12, 0(r10)
+    stw r12, 4(r10)
+    stw r12, 8(r10)
+    stw r12, 12(r10)
+    stw r12, 16(r10)
+    stw r12, 20(r10)
+    stw r12, 24(r10)
+    stw r12, 28(r10)
+    stw r12, 32(r10)
+    stw r12, 36(r10)
+    stw r12, 40(r10)
+    stw r12, 44(r10)
+    stw r12, 48(r10)
+    stw r12, 52(r10)
+    stw r12, 56(r10)
+    stw r12, 60(r10)
+    stw r12, 64(r10)
+    stw r12, 68(r10)
+    stw r12, 72(r10)
+    stw r12, 76(r10)
+    stw r12, 80(r10)
+    stw r12, 84(r10)
+    stw r12, 88(r10)
+    stw r12, 92(r10)
+    stw r12, 96(r10)
+    stw r12, 100(r10)
+    stw r12, 104(r10)
+    stw r12, 108(r10)
+    stw r12, 112(r10)
+    stw r12, 116(r10)
+    stw r12, 120(r10)
+    stw r12, 124(r10)
+    stw r12, 128(r10)
+    stw r12, 132(r10)
+    stw r12, 136(r10)
+    stw r12, 140(r10)
+    stw r12, 144(r10)
+    stw r12, 148(r10)
+    stw r12, 152(r10)
+    stw r12, 156(r10)
+    stw r12, 160(r10)
+    stw r12, 164(r10)
+    stw r12, 168(r10)
+    stw r12, 172(r10)
+    stw r12, 176(r10)
+    stw r12, 180(r10)
+    stw r12, 184(r10)
+    stw r12, 188(r10)
+    stw r12, 192(r10)
+    stw r12, 196(r10)
+    stw r12, 200(r10)
+    stw r12, 204(r10)
+    stw r12, 208(r10)
+    stw r12, 212(r10)
+    stw r12, 216(r10)
+    stw r12, 220(r10)
+    stw r12, 224(r10)
+    stw r12, 228(r10)
+    stw r12, 232(r10)
+    stw r12, 236(r10)
+    stw r12, 240(r10)
+    stw r12, 244(r10)
+    stw r12, 248(r10)
+    stw r12, 252(r10)
+    stw r12, 256(r10)
+    stw r12, 260(r10)
+    stw r12, 264(r10)
+    stw r12, 268(r10)
+    stw r12, 272(r10)
+    stw r12, 276(r10)
+    stw r12, 280(r10)
+    stw r12, 284(r10)
+    add r10, r10, r9
+    stw r12, 0(r10)
+    stw r12, 4(r10)
+    stw r12, 8(r10)
+    stw r12, 12(r10)
+    stw r12, 16(r10)
+    stw r12, 20(r10)
+    stw r12, 24(r10)
+    stw r12, 28(r10)
+    stw r12, 32(r10)
+    stw r12, 36(r10)
+    stw r12, 40(r10)
+    stw r12, 44(r10)
+    stw r12, 48(r10)
+    stw r12, 52(r10)
+    stw r12, 56(r10)
+    stw r12, 60(r10)
+    stw r12, 64(r10)
+    stw r12, 68(r10)
+    stw r12, 72(r10)
+    stw r12, 76(r10)
+    stw r12, 80(r10)
+    stw r12, 84(r10)
+    stw r12, 88(r10)
+    stw r12, 92(r10)
+    stw r12, 96(r10)
+    stw r12, 100(r10)
+    stw r12, 104(r10)
+    stw r12, 108(r10)
+    stw r12, 112(r10)
+    stw r12, 116(r10)
+    stw r12, 120(r10)
+    stw r12, 124(r10)
+    stw r12, 128(r10)
+    stw r12, 132(r10)
+    stw r12, 136(r10)
+    stw r12, 140(r10)
+    stw r12, 144(r10)
+    stw r12, 148(r10)
+    stw r12, 152(r10)
+    stw r12, 156(r10)
+    stw r12, 160(r10)
+    stw r12, 164(r10)
+    stw r12, 168(r10)
+    stw r12, 172(r10)
+    stw r12, 176(r10)
+    stw r12, 180(r10)
+    stw r12, 184(r10)
+    stw r12, 188(r10)
+    stw r12, 192(r10)
+    stw r12, 196(r10)
+    stw r12, 200(r10)
+    stw r12, 204(r10)
+    stw r12, 208(r10)
+    stw r12, 212(r10)
+    stw r12, 216(r10)
+    stw r12, 220(r10)
+    stw r12, 224(r10)
+    stw r12, 228(r10)
+    stw r12, 232(r10)
+    stw r12, 236(r10)
+    stw r12, 240(r10)
+    stw r12, 244(r10)
+    stw r12, 248(r10)
+    stw r12, 252(r10)
+    stw r12, 256(r10)
+    stw r12, 260(r10)
+    stw r12, 264(r10)
+    stw r12, 268(r10)
+    stw r12, 272(r10)
+    stw r12, 276(r10)
+    stw r12, 280(r10)
+    stw r12, 284(r10)
+    add r10, r10, r9
+    stw r12, 0(r10)
+    stw r12, 4(r10)
+    stw r12, 8(r10)
+    stw r12, 12(r10)
+    stw r12, 16(r10)
+    stw r12, 20(r10)
+    stw r12, 24(r10)
+    stw r12, 28(r10)
+    stw r12, 32(r10)
+    stw r12, 36(r10)
+    stw r12, 40(r10)
+    stw r12, 44(r10)
+    stw r12, 48(r10)
+    stw r12, 52(r10)
+    stw r12, 56(r10)
+    stw r12, 60(r10)
+    stw r12, 64(r10)
+    stw r12, 68(r10)
+    stw r12, 72(r10)
+    stw r12, 76(r10)
+    stw r12, 80(r10)
+    stw r12, 84(r10)
+    stw r12, 88(r10)
+    stw r12, 92(r10)
+    stw r12, 96(r10)
+    stw r12, 100(r10)
+    stw r12, 104(r10)
+    stw r12, 108(r10)
+    stw r12, 112(r10)
+    stw r12, 116(r10)
+    stw r12, 120(r10)
+    stw r12, 124(r10)
+    stw r12, 128(r10)
+    stw r12, 132(r10)
+    stw r12, 136(r10)
+    stw r12, 140(r10)
+    stw r12, 144(r10)
+    stw r12, 148(r10)
+    stw r12, 152(r10)
+    stw r12, 156(r10)
+    stw r12, 160(r10)
+    stw r12, 164(r10)
+    stw r12, 168(r10)
+    stw r11, 172(r10)
+    stw r11, 176(r10)
+    stw r11, 180(r10)
+    stw r12, 184(r10)
+    stw r12, 188(r10)
+    stw r12, 192(r10)
+    stw r12, 196(r10)
+    stw r12, 200(r10)
+    stw r12, 204(r10)
+    stw r12, 208(r10)
+    stw r12, 212(r10)
+    stw r12, 216(r10)
+    stw r12, 220(r10)
+    stw r12, 224(r10)
+    stw r12, 228(r10)
+    stw r12, 232(r10)
+    stw r12, 236(r10)
+    stw r12, 240(r10)
+    stw r12, 244(r10)
+    stw r12, 248(r10)
+    stw r12, 252(r10)
+    stw r12, 256(r10)
+    stw r12, 260(r10)
+    stw r12, 264(r10)
+    stw r12, 268(r10)
+    stw r12, 272(r10)
+    stw r12, 276(r10)
+    stw r12, 280(r10)
+    stw r12, 284(r10)
+    add r10, r10, r9
+    stw r12, 0(r10)
+    stw r12, 4(r10)
+    stw r12, 8(r10)
+    stw r12, 12(r10)
+    stw r12, 16(r10)
+    stw r12, 20(r10)
+    stw r12, 24(r10)
+    stw r12, 28(r10)
+    stw r12, 32(r10)
+    stw r12, 36(r10)
+    stw r12, 40(r10)
+    stw r12, 44(r10)
+    stw r12, 48(r10)
+    stw r12, 52(r10)
+    stw r12, 56(r10)
+    stw r12, 60(r10)
+    stw r12, 64(r10)
+    stw r12, 68(r10)
+    stw r12, 72(r10)
+    stw r12, 76(r10)
+    stw r12, 80(r10)
+    stw r12, 84(r10)
+    stw r12, 88(r10)
+    stw r12, 92(r10)
+    stw r12, 96(r10)
+    stw r12, 100(r10)
+    stw r12, 104(r10)
+    stw r12, 108(r10)
+    stw r12, 112(r10)
+    stw r12, 116(r10)
+    stw r12, 120(r10)
+    stw r12, 124(r10)
+    stw r12, 128(r10)
+    stw r12, 132(r10)
+    stw r12, 136(r10)
+    stw r12, 140(r10)
+    stw r12, 144(r10)
+    stw r12, 148(r10)
+    stw r12, 152(r10)
+    stw r12, 156(r10)
+    stw r12, 160(r10)
+    stw r12, 164(r10)
+    stw r12, 168(r10)
+    stw r12, 172(r10)
+    stw r11, 176(r10)
+    stw r11, 180(r10)
+    stw r12, 184(r10)
+    stw r12, 188(r10)
+    stw r12, 192(r10)
+    stw r12, 196(r10)
+    stw r12, 200(r10)
+    stw r12, 204(r10)
+    stw r12, 208(r10)
+    stw r12, 212(r10)
+    stw r12, 216(r10)
+    stw r12, 220(r10)
+    stw r12, 224(r10)
+    stw r12, 228(r10)
+    stw r12, 232(r10)
+    stw r12, 236(r10)
+    stw r12, 240(r10)
+    stw r12, 244(r10)
+    stw r12, 248(r10)
+    stw r12, 252(r10)
+    stw r12, 256(r10)
+    stw r12, 260(r10)
+    stw r12, 264(r10)
+    stw r12, 268(r10)
+    stw r12, 272(r10)
+    stw r12, 276(r10)
+    stw r12, 280(r10)
+    stw r12, 284(r10)
+    add r10, r10, r9
+    stw r12, 0(r10)
+    stw r12, 4(r10)
+    stw r12, 8(r10)
+    stw r12, 12(r10)
+    stw r12, 16(r10)
+    stw r12, 20(r10)
+    stw r12, 24(r10)
+    stw r12, 28(r10)
+    stw r12, 32(r10)
+    stw r12, 36(r10)
+    stw r12, 40(r10)
+    stw r12, 44(r10)
+    stw r12, 48(r10)
+    stw r12, 52(r10)
+    stw r12, 56(r10)
+    stw r12, 60(r10)
+    stw r12, 64(r10)
+    stw r12, 68(r10)
+    stw r12, 72(r10)
+    stw r12, 76(r10)
+    stw r12, 80(r10)
+    stw r12, 84(r10)
+    stw r12, 88(r10)
+    stw r12, 92(r10)
+    stw r12, 96(r10)
+    stw r12, 100(r10)
+    stw r12, 104(r10)
+    stw r12, 108(r10)
+    stw r12, 112(r10)
+    stw r12, 116(r10)
+    stw r12, 120(r10)
+    stw r12, 124(r10)
+    stw r12, 128(r10)
+    stw r12, 132(r10)
+    stw r12, 136(r10)
+    stw r12, 140(r10)
+    stw r12, 144(r10)
+    stw r12, 148(r10)
+    stw r12, 152(r10)
+    stw r12, 156(r10)
+    stw r12, 160(r10)
+    stw r12, 164(r10)
+    stw r12, 168(r10)
+    stw r12, 172(r10)
+    stw r11, 176(r10)
+    stw r11, 180(r10)
+    stw r12, 184(r10)
+    stw r12, 188(r10)
+    stw r12, 192(r10)
+    stw r12, 196(r10)
+    stw r12, 200(r10)
+    stw r12, 204(r10)
+    stw r12, 208(r10)
+    stw r12, 212(r10)
+    stw r12, 216(r10)
+    stw r12, 220(r10)
+    stw r12, 224(r10)
+    stw r12, 228(r10)
+    stw r12, 232(r10)
+    stw r12, 236(r10)
+    stw r12, 240(r10)
+    stw r12, 244(r10)
+    stw r12, 248(r10)
+    stw r12, 252(r10)
+    stw r12, 256(r10)
+    stw r12, 260(r10)
+    stw r12, 264(r10)
+    stw r12, 268(r10)
+    stw r12, 272(r10)
+    stw r12, 276(r10)
+    stw r12, 280(r10)
+    stw r12, 284(r10)
+    add r10, r10, r9
+    stw r12, 0(r10)
+    stw r12, 4(r10)
+    stw r11, 8(r10)
+    stw r11, 12(r10)
+    stw r11, 16(r10)
+    stw r11, 20(r10)
+    stw r11, 24(r10)
+    stw r12, 28(r10)
+    stw r12, 32(r10)
+    stw r12, 36(r10)
+    stw r11, 40(r10)
+    stw r11, 44(r10)
+    stw r11, 48(r10)
+    stw r11, 52(r10)
+    stw r11, 56(r10)
+    stw r12, 60(r10)
+    stw r12, 64(r10)
+    stw r11, 68(r10)
+    stw r11, 72(r10)
+    stw r12, 76(r10)
+    stw r11, 80(r10)
+    stw r11, 84(r10)
+    stw r11, 88(r10)
+    stw r12, 92(r10)
+    stw r12, 96(r10)
+    stw r11, 100(r10)
+    stw r11, 104(r10)
+    stw r12, 108(r10)
+    stw r12, 112(r10)
+    stw r12, 116(r10)
+    stw r11, 120(r10)
+    stw r11, 124(r10)
+    stw r12, 128(r10)
+    stw r12, 132(r10)
+    stw r12, 136(r10)
+    stw r12, 140(r10)
+    stw r12, 144(r10)
+    stw r12, 148(r10)
+    stw r12, 152(r10)
+    stw r12, 156(r10)
+    stw r12, 160(r10)
+    stw r12, 164(r10)
+    stw r12, 168(r10)
+    stw r12, 172(r10)
+    stw r11, 176(r10)
+    stw r11, 180(r10)
+    stw r12, 184(r10)
+    stw r12, 188(r10)
+    stw r12, 192(r10)
+    stw r12, 196(r10)
+    stw r11, 200(r10)
+    stw r11, 204(r10)
+    stw r11, 208(r10)
+    stw r11, 212(r10)
+    stw r11, 216(r10)
+    stw r12, 220(r10)
+    stw r12, 224(r10)
+    stw r12, 228(r10)
+    stw r11, 232(r10)
+    stw r11, 236(r10)
+    stw r11, 240(r10)
+    stw r11, 244(r10)
+    stw r11, 248(r10)
+    stw r12, 252(r10)
+    stw r12, 256(r10)
+    stw r11, 260(r10)
+    stw r11, 264(r10)
+    stw r12, 268(r10)
+    stw r11, 272(r10)
+    stw r11, 276(r10)
+    stw r11, 280(r10)
+    stw r12, 284(r10)
+    add r10, r10, r9
+    stw r12, 0(r10)
+    stw r11, 4(r10)
+    stw r11, 8(r10)
+    stw r12, 12(r10)
+    stw r12, 16(r10)
+    stw r12, 20(r10)
+    stw r11, 24(r10)
+    stw r11, 28(r10)
+    stw r12, 32(r10)
+    stw r11, 36(r10)
+    stw r11, 40(r10)
+    stw r12, 44(r10)
+    stw r12, 48(r10)
+    stw r12, 52(r10)
+    stw r11, 56(r10)
+    stw r11, 60(r10)
+    stw r12, 64(r10)
+    stw r12, 68(r10)
+    stw r11, 72(r10)
+    stw r11, 76(r10)
+    stw r12, 80(r10)
+    stw r12, 84(r10)
+    stw r11, 88(r10)
+    stw r11, 92(r10)
+    stw r12, 96(r10)
+    stw r11, 100(r10)
+    stw r11, 104(r10)
+    stw r12, 108(r10)
+    stw r12, 112(r10)
+    stw r12, 116(r10)
+    stw r11, 120(r10)
+    stw r11, 124(r10)
+    stw r12, 128(r10)
+    stw r12, 132(r10)
+    stw r12, 136(r10)
+    stw r12, 140(r10)
+    stw r12, 144(r10)
+    stw r12, 148(r10)
+    stw r12, 152(r10)
+    stw r12, 156(r10)
+    stw r12, 160(r10)
+    stw r12, 164(r10)
+    stw r12, 168(r10)
+    stw r12, 172(r10)
+    stw r11, 176(r10)
+    stw r11, 180(r10)
+    stw r12, 184(r10)
+    stw r12, 188(r10)
+    stw r12, 192(r10)
+    stw r11, 196(r10)
+    stw r11, 200(r10)
+    stw r12, 204(r10)
+    stw r12, 208(r10)
+    stw r12, 212(r10)
+    stw r11, 216(r10)
+    stw r11, 220(r10)
+    stw r12, 224(r10)
+    stw r11, 228(r10)
+    stw r11, 232(r10)
+    stw r12, 236(r10)
+    stw r12, 240(r10)
+    stw r12, 244(r10)
+    stw r11, 248(r10)
+    stw r11, 252(r10)
+    stw r12, 256(r10)
+    stw r12, 260(r10)
+    stw r11, 264(r10)
+    stw r11, 268(r10)
+    stw r12, 272(r10)
+    stw r12, 276(r10)
+    stw r11, 280(r10)
+    stw r11, 284(r10)
+    add r10, r10, r9
+    stw r12, 0(r10)
+    stw r11, 4(r10)
+    stw r11, 8(r10)
+    stw r12, 12(r10)
+    stw r12, 16(r10)
+    stw r12, 20(r10)
+    stw r12, 24(r10)
+    stw r12, 28(r10)
+    stw r12, 32(r10)
+    stw r11, 36(r10)
+    stw r11, 40(r10)
+    stw r12, 44(r10)
+    stw r12, 48(r10)
+    stw r12, 52(r10)
+    stw r11, 56(r10)
+    stw r11, 60(r10)
+    stw r12, 64(r10)
+    stw r12, 68(r10)
+    stw r11, 72(r10)
+    stw r11, 76(r10)
+    stw r12, 80(r10)
+    stw r12, 84(r10)
+    stw r11, 88(r10)
+    stw r11, 92(r10)
+    stw r12, 96(r10)
+    stw r11, 100(r10)
+    stw r11, 104(r10)
+    stw r12, 108(r10)
+    stw r12, 112(r10)
+    stw r12, 116(r10)
+    stw r11, 120(r10)
+    stw r11, 124(r10)
+    stw r12, 128(r10)
+    stw r12, 132(r10)
+    stw r12, 136(r10)
+    stw r12, 140(r10)
+    stw r12, 144(r10)
+    stw r12, 148(r10)
+    stw r12, 152(r10)
+    stw r12, 156(r10)
+    stw r12, 160(r10)
+    stw r12, 164(r10)
+    stw r12, 168(r10)
+    stw r12, 172(r10)
+    stw r11, 176(r10)
+    stw r11, 180(r10)
+    stw r12, 184(r10)
+    stw r12, 188(r10)
+    stw r12, 192(r10)
+    stw r11, 196(r10)
+    stw r11, 200(r10)
+    stw r12, 204(r10)
+    stw r12, 208(r10)
+    stw r12, 212(r10)
+    stw r11, 216(r10)
+    stw r11, 220(r10)
+    stw r12, 224(r10)
+    stw r11, 228(r10)
+    stw r11, 232(r10)
+    stw r12, 236(r10)
+    stw r12, 240(r10)
+    stw r12, 244(r10)
+    stw r11, 248(r10)
+    stw r11, 252(r10)
+    stw r12, 256(r10)
+    stw r12, 260(r10)
+    stw r11, 264(r10)
+    stw r11, 268(r10)
+    stw r12, 272(r10)
+    stw r12, 276(r10)
+    stw r11, 280(r10)
+    stw r11, 284(r10)
+    add r10, r10, r9
+    stw r12, 0(r10)
+    stw r11, 4(r10)
+    stw r11, 8(r10)
+    stw r12, 12(r10)
+    stw r12, 16(r10)
+    stw r12, 20(r10)
+    stw r12, 24(r10)
+    stw r12, 28(r10)
+    stw r12, 32(r10)
+    stw r11, 36(r10)
+    stw r11, 40(r10)
+    stw r12, 44(r10)
+    stw r12, 48(r10)
+    stw r12, 52(r10)
+    stw r11, 56(r10)
+    stw r11, 60(r10)
+    stw r12, 64(r10)
+    stw r12, 68(r10)
+    stw r11, 72(r10)
+    stw r11, 76(r10)
+    stw r12, 80(r10)
+    stw r12, 84(r10)
+    stw r11, 88(r10)
+    stw r11, 92(r10)
+    stw r12, 96(r10)
+    stw r11, 100(r10)
+    stw r11, 104(r10)
+    stw r12, 108(r10)
+    stw r12, 112(r10)
+    stw r12, 116(r10)
+    stw r11, 120(r10)
+    stw r11, 124(r10)
+    stw r12, 128(r10)
+    stw r12, 132(r10)
+    stw r12, 136(r10)
+    stw r12, 140(r10)
+    stw r12, 144(r10)
+    stw r12, 148(r10)
+    stw r12, 152(r10)
+    stw r12, 156(r10)
+    stw r12, 160(r10)
+    stw r12, 164(r10)
+    stw r12, 168(r10)
+    stw r12, 172(r10)
+    stw r11, 176(r10)
+    stw r11, 180(r10)
+    stw r12, 184(r10)
+    stw r12, 188(r10)
+    stw r12, 192(r10)
+    stw r11, 196(r10)
+    stw r11, 200(r10)
+    stw r12, 204(r10)
+    stw r12, 208(r10)
+    stw r12, 212(r10)
+    stw r11, 216(r10)
+    stw r11, 220(r10)
+    stw r12, 224(r10)
+    stw r11, 228(r10)
+    stw r11, 232(r10)
+    stw r12, 236(r10)
+    stw r12, 240(r10)
+    stw r12, 244(r10)
+    stw r11, 248(r10)
+    stw r11, 252(r10)
+    stw r12, 256(r10)
+    stw r12, 260(r10)
+    stw r11, 264(r10)
+    stw r11, 268(r10)
+    stw r12, 272(r10)
+    stw r12, 276(r10)
+    stw r11, 280(r10)
+    stw r11, 284(r10)
+    add r10, r10, r9
+    stw r12, 0(r10)
+    stw r11, 4(r10)
+    stw r11, 8(r10)
+    stw r12, 12(r10)
+    stw r12, 16(r10)
+    stw r12, 20(r10)
+    stw r12, 24(r10)
+    stw r12, 28(r10)
+    stw r12, 32(r10)
+    stw r11, 36(r10)
+    stw r11, 40(r10)
+    stw r12, 44(r10)
+    stw r12, 48(r10)
+    stw r12, 52(r10)
+    stw r11, 56(r10)
+    stw r11, 60(r10)
+    stw r12, 64(r10)
+    stw r12, 68(r10)
+    stw r11, 72(r10)
+    stw r11, 76(r10)
+    stw r12, 80(r10)
+    stw r12, 84(r10)
+    stw r11, 88(r10)
+    stw r11, 92(r10)
+    stw r12, 96(r10)
+    stw r11, 100(r10)
+    stw r11, 104(r10)
+    stw r12, 108(r10)
+    stw r12, 112(r10)
+    stw r12, 116(r10)
+    stw r11, 120(r10)
+    stw r11, 124(r10)
+    stw r12, 128(r10)
+    stw r12, 132(r10)
+    stw r12, 136(r10)
+    stw r12, 140(r10)
+    stw r12, 144(r10)
+    stw r12, 148(r10)
+    stw r12, 152(r10)
+    stw r12, 156(r10)
+    stw r12, 160(r10)
+    stw r12, 164(r10)
+    stw r12, 168(r10)
+    stw r12, 172(r10)
+    stw r11, 176(r10)
+    stw r11, 180(r10)
+    stw r12, 184(r10)
+    stw r12, 188(r10)
+    stw r12, 192(r10)
+    stw r11, 196(r10)
+    stw r11, 200(r10)
+    stw r12, 204(r10)
+    stw r12, 208(r10)
+    stw r12, 212(r10)
+    stw r11, 216(r10)
+    stw r11, 220(r10)
+    stw r12, 224(r10)
+    stw r11, 228(r10)
+    stw r11, 232(r10)
+    stw r12, 236(r10)
+    stw r12, 240(r10)
+    stw r12, 244(r10)
+    stw r11, 248(r10)
+    stw r11, 252(r10)
+    stw r12, 256(r10)
+    stw r12, 260(r10)
+    stw r11, 264(r10)
+    stw r11, 268(r10)
+    stw r12, 272(r10)
+    stw r12, 276(r10)
+    stw r11, 280(r10)
+    stw r11, 284(r10)
+    add r10, r10, r9
+    stw r12, 0(r10)
+    stw r11, 4(r10)
+    stw r11, 8(r10)
+    stw r12, 12(r10)
+    stw r12, 16(r10)
+    stw r12, 20(r10)
+    stw r11, 24(r10)
+    stw r11, 28(r10)
+    stw r12, 32(r10)
+    stw r11, 36(r10)
+    stw r11, 40(r10)
+    stw r12, 44(r10)
+    stw r12, 48(r10)
+    stw r12, 52(r10)
+    stw r11, 56(r10)
+    stw r11, 60(r10)
+    stw r12, 64(r10)
+    stw r12, 68(r10)
+    stw r11, 72(r10)
+    stw r11, 76(r10)
+    stw r12, 80(r10)
+    stw r12, 84(r10)
+    stw r11, 88(r10)
+    stw r11, 92(r10)
+    stw r12, 96(r10)
+    stw r11, 100(r10)
+    stw r11, 104(r10)
+    stw r12, 108(r10)
+    stw r12, 112(r10)
+    stw r12, 116(r10)
+    stw r11, 120(r10)
+    stw r11, 124(r10)
+    stw r12, 128(r10)
+    stw r12, 132(r10)
+    stw r12, 136(r10)
+    stw r12, 140(r10)
+    stw r12, 144(r10)
+    stw r12, 148(r10)
+    stw r12, 152(r10)
+    stw r12, 156(r10)
+    stw r12, 160(r10)
+    stw r12, 164(r10)
+    stw r12, 168(r10)
+    stw r12, 172(r10)
+    stw r11, 176(r10)
+    stw r11, 180(r10)
+    stw r12, 184(r10)
+    stw r12, 188(r10)
+    stw r12, 192(r10)
+    stw r11, 196(r10)
+    stw r11, 200(r10)
+    stw r12, 204(r10)
+    stw r12, 208(r10)
+    stw r12, 212(r10)
+    stw r11, 216(r10)
+    stw r11, 220(r10)
+    stw r12, 224(r10)
+    stw r11, 228(r10)
+    stw r11, 232(r10)
+    stw r12, 236(r10)
+    stw r12, 240(r10)
+    stw r12, 244(r10)
+    stw r11, 248(r10)
+    stw r11, 252(r10)
+    stw r12, 256(r10)
+    stw r12, 260(r10)
+    stw r11, 264(r10)
+    stw r11, 268(r10)
+    stw r12, 272(r10)
+    stw r12, 276(r10)
+    stw r11, 280(r10)
+    stw r11, 284(r10)
+    add r10, r10, r9
+    stw r12, 0(r10)
+    stw r12, 4(r10)
+    stw r11, 8(r10)
+    stw r11, 12(r10)
+    stw r11, 16(r10)
+    stw r11, 20(r10)
+    stw r11, 24(r10)
+    stw r12, 28(r10)
+    stw r12, 32(r10)
+    stw r12, 36(r10)
+    stw r11, 40(r10)
+    stw r11, 44(r10)
+    stw r11, 48(r10)
+    stw r11, 52(r10)
+    stw r11, 56(r10)
+    stw r12, 60(r10)
+    stw r12, 64(r10)
+    stw r12, 68(r10)
+    stw r11, 72(r10)
+    stw r11, 76(r10)
+    stw r11, 80(r10)
+    stw r11, 84(r10)
+    stw r11, 88(r10)
+    stw r12, 92(r10)
+    stw r12, 96(r10)
+    stw r12, 100(r10)
+    stw r11, 104(r10)
+    stw r11, 108(r10)
+    stw r11, 112(r10)
+    stw r11, 116(r10)
+    stw r11, 120(r10)
+    stw r11, 124(r10)
+    stw r12, 128(r10)
+    stw r12, 132(r10)
+    stw r12, 136(r10)
+    stw r12, 140(r10)
+    stw r12, 144(r10)
+    stw r12, 148(r10)
+    stw r12, 152(r10)
+    stw r12, 156(r10)
+    stw r12, 160(r10)
+    stw r12, 164(r10)
+    stw r12, 168(r10)
+    stw r11, 172(r10)
+    stw r11, 176(r10)
+    stw r11, 180(r10)
+    stw r11, 184(r10)
+    stw r12, 188(r10)
+    stw r12, 192(r10)
+    stw r12, 196(r10)
+    stw r11, 200(r10)
+    stw r11, 204(r10)
+    stw r11, 208(r10)
+    stw r11, 212(r10)
+    stw r11, 216(r10)
+    stw r12, 220(r10)
+    stw r12, 224(r10)
+    stw r12, 228(r10)
+    stw r11, 232(r10)
+    stw r11, 236(r10)
+    stw r11, 240(r10)
+    stw r11, 244(r10)
+    stw r11, 248(r10)
+    stw r12, 252(r10)
+    stw r12, 256(r10)
+    stw r12, 260(r10)
+    stw r11, 264(r10)
+    stw r11, 268(r10)
+    stw r11, 272(r10)
+    stw r11, 276(r10)
+    stw r11, 280(r10)
+    stw r12, 284(r10)
+    add r10, r10, r9
+    stw r12, 0(r10)
+    stw r12, 4(r10)
+    stw r12, 8(r10)
+    stw r12, 12(r10)
+    stw r12, 16(r10)
+    stw r12, 20(r10)
+    stw r12, 24(r10)
+    stw r12, 28(r10)
+    stw r12, 32(r10)
+    stw r12, 36(r10)
+    stw r12, 40(r10)
+    stw r12, 44(r10)
+    stw r12, 48(r10)
+    stw r12, 52(r10)
+    stw r12, 56(r10)
+    stw r12, 60(r10)
+    stw r12, 64(r10)
+    stw r12, 68(r10)
+    stw r11, 72(r10)
+    stw r11, 76(r10)
+    stw r12, 80(r10)
+    stw r12, 84(r10)
+    stw r12, 88(r10)
+    stw r12, 92(r10)
+    stw r12, 96(r10)
+    stw r12, 100(r10)
+    stw r12, 104(r10)
+    stw r12, 108(r10)
+    stw r12, 112(r10)
+    stw r12, 116(r10)
+    stw r11, 120(r10)
+    stw r11, 124(r10)
+    stw r12, 128(r10)
+    stw r12, 132(r10)
+    stw r12, 136(r10)
+    stw r12, 140(r10)
+    stw r12, 144(r10)
+    stw r12, 148(r10)
+    stw r12, 152(r10)
+    stw r12, 156(r10)
+    stw r12, 160(r10)
+    stw r12, 164(r10)
+    stw r12, 168(r10)
+    stw r12, 172(r10)
+    stw r12, 176(r10)
+    stw r12, 180(r10)
+    stw r12, 184(r10)
+    stw r12, 188(r10)
+    stw r12, 192(r10)
+    stw r12, 196(r10)
+    stw r12, 200(r10)
+    stw r12, 204(r10)
+    stw r12, 208(r10)
+    stw r12, 212(r10)
+    stw r12, 216(r10)
+    stw r12, 220(r10)
+    stw r12, 224(r10)
+    stw r12, 228(r10)
+    stw r12, 232(r10)
+    stw r12, 236(r10)
+    stw r12, 240(r10)
+    stw r12, 244(r10)
+    stw r12, 248(r10)
+    stw r12, 252(r10)
+    stw r12, 256(r10)
+    stw r12, 260(r10)
+    stw r11, 264(r10)
+    stw r11, 268(r10)
+    stw r12, 272(r10)
+    stw r12, 276(r10)
+    stw r12, 280(r10)
+    stw r12, 284(r10)
+    add r10, r10, r9
+    stw r12, 0(r10)
+    stw r12, 4(r10)
+    stw r12, 8(r10)
+    stw r12, 12(r10)
+    stw r12, 16(r10)
+    stw r12, 20(r10)
+    stw r12, 24(r10)
+    stw r12, 28(r10)
+    stw r12, 32(r10)
+    stw r12, 36(r10)
+    stw r12, 40(r10)
+    stw r12, 44(r10)
+    stw r12, 48(r10)
+    stw r12, 52(r10)
+    stw r12, 56(r10)
+    stw r12, 60(r10)
+    stw r12, 64(r10)
+    stw r12, 68(r10)
+    stw r11, 72(r10)
+    stw r11, 76(r10)
+    stw r12, 80(r10)
+    stw r12, 84(r10)
+    stw r12, 88(r10)
+    stw r12, 92(r10)
+    stw r12, 96(r10)
+    stw r12, 100(r10)
+    stw r12, 104(r10)
+    stw r12, 108(r10)
+    stw r12, 112(r10)
+    stw r11, 116(r10)
+    stw r11, 120(r10)
+    stw r12, 124(r10)
+    stw r12, 128(r10)
+    stw r11, 132(r10)
+    stw r11, 136(r10)
+    stw r11, 140(r10)
+    stw r11, 144(r10)
+    stw r11, 148(r10)
+    stw r11, 152(r10)
+    stw r11, 156(r10)
+    stw r12, 160(r10)
+    stw r12, 164(r10)
+    stw r12, 168(r10)
+    stw r12, 172(r10)
+    stw r12, 176(r10)
+    stw r12, 180(r10)
+    stw r12, 184(r10)
+    stw r12, 188(r10)
+    stw r12, 192(r10)
+    stw r12, 196(r10)
+    stw r12, 200(r10)
+    stw r12, 204(r10)
+    stw r12, 208(r10)
+    stw r12, 212(r10)
+    stw r12, 216(r10)
+    stw r12, 220(r10)
+    stw r12, 224(r10)
+    stw r12, 228(r10)
+    stw r12, 232(r10)
+    stw r12, 236(r10)
+    stw r12, 240(r10)
+    stw r12, 244(r10)
+    stw r12, 248(r10)
+    stw r12, 252(r10)
+    stw r12, 256(r10)
+    stw r12, 260(r10)
+    stw r11, 264(r10)
+    stw r11, 268(r10)
+    stw r12, 272(r10)
+    stw r12, 276(r10)
+    stw r12, 280(r10)
+    stw r12, 284(r10)
+    add r10, r10, r9
+    stw r12, 0(r10)
+    stw r12, 4(r10)
+    stw r12, 8(r10)
+    stw r12, 12(r10)
+    stw r12, 16(r10)
+    stw r12, 20(r10)
+    stw r12, 24(r10)
+    stw r12, 28(r10)
+    stw r12, 32(r10)
+    stw r12, 36(r10)
+    stw r12, 40(r10)
+    stw r12, 44(r10)
+    stw r12, 48(r10)
+    stw r12, 52(r10)
+    stw r12, 56(r10)
+    stw r12, 60(r10)
+    stw r12, 64(r10)
+    stw r11, 68(r10)
+    stw r11, 72(r10)
+    stw r11, 76(r10)
+    stw r11, 80(r10)
+    stw r12, 84(r10)
+    stw r12, 88(r10)
+    stw r12, 92(r10)
+    stw r12, 96(r10)
+    stw r11, 100(r10)
+    stw r11, 104(r10)
+    stw r11, 108(r10)
+    stw r11, 112(r10)
+    stw r11, 116(r10)
+    stw r12, 120(r10)
+    stw r12, 124(r10)
+    stw r12, 128(r10)
+    stw r12, 132(r10)
+    stw r12, 136(r10)
+    stw r12, 140(r10)
+    stw r12, 144(r10)
+    stw r12, 148(r10)
+    stw r12, 152(r10)
+    stw r12, 156(r10)
+    stw r12, 160(r10)
+    stw r12, 164(r10)
+    stw r12, 168(r10)
+    stw r12, 172(r10)
+    stw r12, 176(r10)
+    stw r12, 180(r10)
+    stw r12, 184(r10)
+    stw r12, 188(r10)
+    stw r12, 192(r10)
+    stw r12, 196(r10)
+    stw r12, 200(r10)
+    stw r12, 204(r10)
+    stw r12, 208(r10)
+    stw r12, 212(r10)
+    stw r12, 216(r10)
+    stw r12, 220(r10)
+    stw r12, 224(r10)
+    stw r12, 228(r10)
+    stw r12, 232(r10)
+    stw r12, 236(r10)
+    stw r12, 240(r10)
+    stw r12, 244(r10)
+    stw r12, 248(r10)
+    stw r12, 252(r10)
+    stw r12, 256(r10)
+    stw r11, 260(r10)
+    stw r11, 264(r10)
+    stw r11, 268(r10)
+    stw r11, 272(r10)
+    stw r12, 276(r10)
+    stw r12, 280(r10)
+    stw r12, 284(r10)
+    add r10, r10, r9
+    stw r12, 0(r10)
+    stw r12, 4(r10)
+    stw r12, 8(r10)
+    stw r12, 12(r10)
+    stw r12, 16(r10)
+    stw r12, 20(r10)
+    stw r12, 24(r10)
+    stw r12, 28(r10)
+    stw r12, 32(r10)
+    stw r12, 36(r10)
+    stw r12, 40(r10)
+    stw r12, 44(r10)
+    stw r12, 48(r10)
+    stw r12, 52(r10)
+    stw r12, 56(r10)
+    stw r12, 60(r10)
+    stw r12, 64(r10)
+    stw r12, 68(r10)
+    stw r12, 72(r10)
+    stw r12, 76(r10)
+    stw r12, 80(r10)
+    stw r12, 84(r10)
+    stw r12, 88(r10)
+    stw r12, 92(r10)
+    stw r12, 96(r10)
+    stw r12, 100(r10)
+    stw r12, 104(r10)
+    stw r12, 108(r10)
+    stw r12, 112(r10)
+    stw r12, 116(r10)
+    stw r12, 120(r10)
+    stw r12, 124(r10)
+    stw r12, 128(r10)
+    stw r12, 132(r10)
+    stw r12, 136(r10)
+    stw r12, 140(r10)
+    stw r12, 144(r10)
+    stw r12, 148(r10)
+    stw r12, 152(r10)
+    stw r12, 156(r10)
+    stw r12, 160(r10)
+    stw r12, 164(r10)
+    stw r12, 168(r10)
+    stw r12, 172(r10)
+    stw r12, 176(r10)
+    stw r12, 180(r10)
+    stw r12, 184(r10)
+    stw r12, 188(r10)
+    stw r12, 192(r10)
+    stw r12, 196(r10)
+    stw r12, 200(r10)
+    stw r12, 204(r10)
+    stw r12, 208(r10)
+    stw r12, 212(r10)
+    stw r12, 216(r10)
+    stw r12, 220(r10)
+    stw r12, 224(r10)
+    stw r12, 228(r10)
+    stw r12, 232(r10)
+    stw r12, 236(r10)
+    stw r12, 240(r10)
+    stw r12, 244(r10)
+    stw r12, 248(r10)
+    stw r12, 252(r10)
+    stw r12, 256(r10)
+    stw r12, 260(r10)
+    stw r12, 264(r10)
+    stw r12, 268(r10)
+    stw r12, 272(r10)
+    stw r12, 276(r10)
+    stw r12, 280(r10)
+    stw r12, 284(r10)
+#endif
+.endm
+.macro DEBUG_end_copy_loop
+#ifdef CONFIG_DEBUG
+    stw r12, 0(r10)
+    stw r12, 4(r10)
+    stw r12, 8(r10)
+    stw r12, 12(r10)
+    stw r12, 16(r10)
+    stw r12, 20(r10)
+    stw r12, 24(r10)
+    stw r12, 28(r10)
+    stw r12, 32(r10)
+    stw r12, 36(r10)
+    stw r12, 40(r10)
+    stw r12, 44(r10)
+    stw r12, 48(r10)
+    stw r12, 52(r10)
+    stw r12, 56(r10)
+    stw r12, 60(r10)
+    stw r12, 64(r10)
+    stw r12, 68(r10)
+    stw r12, 72(r10)
+    stw r12, 76(r10)
+    stw r12, 80(r10)
+    stw r12, 84(r10)
+    stw r12, 88(r10)
+    stw r12, 92(r10)
+    stw r12, 96(r10)
+    stw r12, 100(r10)
+    stw r12, 104(r10)
+    stw r12, 108(r10)
+    stw r12, 112(r10)
+    stw r12, 116(r10)
+    stw r12, 120(r10)
+    stw r12, 124(r10)
+    stw r12, 128(r10)
+    stw r12, 132(r10)
+    stw r12, 136(r10)
+    stw r12, 140(r10)
+    stw r12, 144(r10)
+    stw r12, 148(r10)
+    stw r12, 152(r10)
+    stw r12, 156(r10)
+    stw r12, 160(r10)
+    stw r12, 164(r10)
+    stw r12, 168(r10)
+    stw r12, 172(r10)
+    stw r12, 176(r10)
+    stw r12, 180(r10)
+    stw r12, 184(r10)
+    stw r12, 188(r10)
+    stw r12, 192(r10)
+    stw r12, 196(r10)
+    stw r12, 200(r10)
+    stw r12, 204(r10)
+    stw r12, 208(r10)
+    stw r12, 212(r10)
+    stw r12, 216(r10)
+    stw r12, 220(r10)
+    stw r12, 224(r10)
+    stw r12, 228(r10)
+    stw r12, 232(r10)
+    stw r12, 236(r10)
+    stw r12, 240(r10)
+    stw r12, 244(r10)
+    stw r12, 248(r10)
+    stw r12, 252(r10)
+    stw r12, 256(r10)
+    stw r12, 260(r10)
+    stw r12, 264(r10)
+    stw r12, 268(r10)
+    stw r12, 272(r10)
+    stw r12, 276(r10)
+    stw r12, 280(r10)
+    stw r12, 284(r10)
+    stw r12, 288(r10)
+    stw r12, 292(r10)
+    stw r12, 296(r10)
+    stw r12, 300(r10)
+    stw r12, 304(r10)
+    stw r12, 308(r10)
+    stw r12, 312(r10)
+    stw r12, 316(r10)
+    stw r12, 320(r10)
+    stw r12, 324(r10)
+    stw r12, 328(r10)
+    stw r12, 332(r10)
+    stw r12, 336(r10)
+    stw r12, 340(r10)
+    stw r12, 344(r10)
+    stw r12, 348(r10)
+    stw r12, 352(r10)
+    stw r12, 356(r10)
+    stw r12, 360(r10)
+    stw r12, 364(r10)
+    stw r12, 368(r10)
+    stw r12, 372(r10)
+    stw r12, 376(r10)
+    stw r12, 380(r10)
+    stw r12, 384(r10)
+    stw r12, 388(r10)
+    stw r12, 392(r10)
+    stw r12, 396(r10)
+    stw r12, 400(r10)
+    stw r12, 404(r10)
+    stw r12, 408(r10)
+    stw r12, 412(r10)
+    add r10, r10, r9
+    stw r12, 0(r10)
+    stw r12, 4(r10)
+    stw r12, 8(r10)
+    stw r12, 12(r10)
+    stw r12, 16(r10)
+    stw r12, 20(r10)
+    stw r12, 24(r10)
+    stw r12, 28(r10)
+    stw r12, 32(r10)
+    stw r12, 36(r10)
+    stw r12, 40(r10)
+    stw r12, 44(r10)
+    stw r12, 48(r10)
+    stw r12, 52(r10)
+    stw r12, 56(r10)
+    stw r12, 60(r10)
+    stw r12, 64(r10)
+    stw r12, 68(r10)
+    stw r12, 72(r10)
+    stw r12, 76(r10)
+    stw r12, 80(r10)
+    stw r12, 84(r10)
+    stw r12, 88(r10)
+    stw r12, 92(r10)
+    stw r12, 96(r10)
+    stw r12, 100(r10)
+    stw r12, 104(r10)
+    stw r12, 108(r10)
+    stw r12, 112(r10)
+    stw r12, 116(r10)
+    stw r12, 120(r10)
+    stw r12, 124(r10)
+    stw r12, 128(r10)
+    stw r12, 132(r10)
+    stw r12, 136(r10)
+    stw r12, 140(r10)
+    stw r12, 144(r10)
+    stw r12, 148(r10)
+    stw r12, 152(r10)
+    stw r12, 156(r10)
+    stw r12, 160(r10)
+    stw r12, 164(r10)
+    stw r12, 168(r10)
+    stw r12, 172(r10)
+    stw r12, 176(r10)
+    stw r12, 180(r10)
+    stw r12, 184(r10)
+    stw r12, 188(r10)
+    stw r12, 192(r10)
+    stw r12, 196(r10)
+    stw r12, 200(r10)
+    stw r12, 204(r10)
+    stw r12, 208(r10)
+    stw r12, 212(r10)
+    stw r12, 216(r10)
+    stw r12, 220(r10)
+    stw r12, 224(r10)
+    stw r12, 228(r10)
+    stw r12, 232(r10)
+    stw r12, 236(r10)
+    stw r12, 240(r10)
+    stw r12, 244(r10)
+    stw r12, 248(r10)
+    stw r12, 252(r10)
+    stw r12, 256(r10)
+    stw r12, 260(r10)
+    stw r12, 264(r10)
+    stw r12, 268(r10)
+    stw r12, 272(r10)
+    stw r12, 276(r10)
+    stw r12, 280(r10)
+    stw r12, 284(r10)
+    stw r12, 288(r10)
+    stw r12, 292(r10)
+    stw r12, 296(r10)
+    stw r12, 300(r10)
+    stw r12, 304(r10)
+    stw r12, 308(r10)
+    stw r12, 312(r10)
+    stw r12, 316(r10)
+    stw r12, 320(r10)
+    stw r12, 324(r10)
+    stw r12, 328(r10)
+    stw r12, 332(r10)
+    stw r12, 336(r10)
+    stw r12, 340(r10)
+    stw r12, 344(r10)
+    stw r12, 348(r10)
+    stw r12, 352(r10)
+    stw r12, 356(r10)
+    stw r12, 360(r10)
+    stw r12, 364(r10)
+    stw r12, 368(r10)
+    stw r12, 372(r10)
+    stw r12, 376(r10)
+    stw r12, 380(r10)
+    stw r12, 384(r10)
+    stw r12, 388(r10)
+    stw r12, 392(r10)
+    stw r12, 396(r10)
+    stw r12, 400(r10)
+    stw r12, 404(r10)
+    stw r12, 408(r10)
+    stw r12, 412(r10)
+    add r10, r10, r9
+    stw r12, 0(r10)
+    stw r12, 4(r10)
+    stw r12, 8(r10)
+    stw r12, 12(r10)
+    stw r12, 16(r10)
+    stw r12, 20(r10)
+    stw r12, 24(r10)
+    stw r12, 28(r10)
+    stw r12, 32(r10)
+    stw r12, 36(r10)
+    stw r12, 40(r10)
+    stw r12, 44(r10)
+    stw r12, 48(r10)
+    stw r12, 52(r10)
+    stw r12, 56(r10)
+    stw r12, 60(r10)
+    stw r12, 64(r10)
+    stw r12, 68(r10)
+    stw r12, 72(r10)
+    stw r12, 76(r10)
+    stw r11, 80(r10)
+    stw r11, 84(r10)
+    stw r11, 88(r10)
+    stw r12, 92(r10)
+    stw r12, 96(r10)
+    stw r12, 100(r10)
+    stw r12, 104(r10)
+    stw r12, 108(r10)
+    stw r12, 112(r10)
+    stw r12, 116(r10)
+    stw r12, 120(r10)
+    stw r12, 124(r10)
+    stw r12, 128(r10)
+    stw r12, 132(r10)
+    stw r12, 136(r10)
+    stw r12, 140(r10)
+    stw r12, 144(r10)
+    stw r12, 148(r10)
+    stw r12, 152(r10)
+    stw r12, 156(r10)
+    stw r12, 160(r10)
+    stw r12, 164(r10)
+    stw r12, 168(r10)
+    stw r12, 172(r10)
+    stw r12, 176(r10)
+    stw r12, 180(r10)
+    stw r12, 184(r10)
+    stw r12, 188(r10)
+    stw r12, 192(r10)
+    stw r12, 196(r10)
+    stw r12, 200(r10)
+    stw r12, 204(r10)
+    stw r12, 208(r10)
+    stw r12, 212(r10)
+    stw r12, 216(r10)
+    stw r12, 220(r10)
+    stw r12, 224(r10)
+    stw r12, 228(r10)
+    stw r12, 232(r10)
+    stw r12, 236(r10)
+    stw r12, 240(r10)
+    stw r12, 244(r10)
+    stw r12, 248(r10)
+    stw r12, 252(r10)
+    stw r12, 256(r10)
+    stw r12, 260(r10)
+    stw r12, 264(r10)
+    stw r12, 268(r10)
+    stw r12, 272(r10)
+    stw r12, 276(r10)
+    stw r12, 280(r10)
+    stw r12, 284(r10)
+    stw r12, 288(r10)
+    stw r12, 292(r10)
+    stw r12, 296(r10)
+    stw r11, 300(r10)
+    stw r11, 304(r10)
+    stw r11, 308(r10)
+    stw r12, 312(r10)
+    stw r12, 316(r10)
+    stw r12, 320(r10)
+    stw r12, 324(r10)
+    stw r12, 328(r10)
+    stw r12, 332(r10)
+    stw r12, 336(r10)
+    stw r12, 340(r10)
+    stw r12, 344(r10)
+    stw r12, 348(r10)
+    stw r12, 352(r10)
+    stw r12, 356(r10)
+    stw r12, 360(r10)
+    stw r12, 364(r10)
+    stw r12, 368(r10)
+    stw r12, 372(r10)
+    stw r12, 376(r10)
+    stw r12, 380(r10)
+    stw r12, 384(r10)
+    stw r12, 388(r10)
+    stw r12, 392(r10)
+    stw r12, 396(r10)
+    stw r12, 400(r10)
+    stw r12, 404(r10)
+    stw r12, 408(r10)
+    stw r12, 412(r10)
+    add r10, r10, r9
+    stw r12, 0(r10)
+    stw r12, 4(r10)
+    stw r12, 8(r10)
+    stw r12, 12(r10)
+    stw r12, 16(r10)
+    stw r12, 20(r10)
+    stw r12, 24(r10)
+    stw r12, 28(r10)
+    stw r12, 32(r10)
+    stw r12, 36(r10)
+    stw r12, 40(r10)
+    stw r12, 44(r10)
+    stw r12, 48(r10)
+    stw r12, 52(r10)
+    stw r12, 56(r10)
+    stw r12, 60(r10)
+    stw r12, 64(r10)
+    stw r12, 68(r10)
+    stw r12, 72(r10)
+    stw r12, 76(r10)
+    stw r12, 80(r10)
+    stw r11, 84(r10)
+    stw r11, 88(r10)
+    stw r12, 92(r10)
+    stw r12, 96(r10)
+    stw r12, 100(r10)
+    stw r12, 104(r10)
+    stw r12, 108(r10)
+    stw r12, 112(r10)
+    stw r12, 116(r10)
+    stw r12, 120(r10)
+    stw r12, 124(r10)
+    stw r12, 128(r10)
+    stw r12, 132(r10)
+    stw r12, 136(r10)
+    stw r12, 140(r10)
+    stw r12, 144(r10)
+    stw r12, 148(r10)
+    stw r12, 152(r10)
+    stw r12, 156(r10)
+    stw r12, 160(r10)
+    stw r12, 164(r10)
+    stw r12, 168(r10)
+    stw r12, 172(r10)
+    stw r12, 176(r10)
+    stw r12, 180(r10)
+    stw r12, 184(r10)
+    stw r12, 188(r10)
+    stw r12, 192(r10)
+    stw r12, 196(r10)
+    stw r12, 200(r10)
+    stw r12, 204(r10)
+    stw r12, 208(r10)
+    stw r12, 212(r10)
+    stw r12, 216(r10)
+    stw r12, 220(r10)
+    stw r12, 224(r10)
+    stw r12, 228(r10)
+    stw r12, 232(r10)
+    stw r12, 236(r10)
+    stw r12, 240(r10)
+    stw r12, 244(r10)
+    stw r12, 248(r10)
+    stw r12, 252(r10)
+    stw r12, 256(r10)
+    stw r12, 260(r10)
+    stw r12, 264(r10)
+    stw r12, 268(r10)
+    stw r12, 272(r10)
+    stw r12, 276(r10)
+    stw r12, 280(r10)
+    stw r12, 284(r10)
+    stw r12, 288(r10)
+    stw r12, 292(r10)
+    stw r12, 296(r10)
+    stw r12, 300(r10)
+    stw r11, 304(r10)
+    stw r11, 308(r10)
+    stw r12, 312(r10)
+    stw r12, 316(r10)
+    stw r12, 320(r10)
+    stw r12, 324(r10)
+    stw r12, 328(r10)
+    stw r12, 332(r10)
+    stw r12, 336(r10)
+    stw r12, 340(r10)
+    stw r12, 344(r10)
+    stw r12, 348(r10)
+    stw r12, 352(r10)
+    stw r12, 356(r10)
+    stw r12, 360(r10)
+    stw r12, 364(r10)
+    stw r12, 368(r10)
+    stw r12, 372(r10)
+    stw r12, 376(r10)
+    stw r12, 380(r10)
+    stw r12, 384(r10)
+    stw r12, 388(r10)
+    stw r12, 392(r10)
+    stw r12, 396(r10)
+    stw r12, 400(r10)
+    stw r12, 404(r10)
+    stw r12, 408(r10)
+    stw r12, 412(r10)
+    add r10, r10, r9
+    stw r12, 0(r10)
+    stw r12, 4(r10)
+    stw r12, 8(r10)
+    stw r12, 12(r10)
+    stw r12, 16(r10)
+    stw r12, 20(r10)
+    stw r12, 24(r10)
+    stw r12, 28(r10)
+    stw r12, 32(r10)
+    stw r12, 36(r10)
+    stw r12, 40(r10)
+    stw r12, 44(r10)
+    stw r12, 48(r10)
+    stw r12, 52(r10)
+    stw r12, 56(r10)
+    stw r12, 60(r10)
+    stw r12, 64(r10)
+    stw r12, 68(r10)
+    stw r12, 72(r10)
+    stw r12, 76(r10)
+    stw r12, 80(r10)
+    stw r11, 84(r10)
+    stw r11, 88(r10)
+    stw r12, 92(r10)
+    stw r12, 96(r10)
+    stw r12, 100(r10)
+    stw r12, 104(r10)
+    stw r12, 108(r10)
+    stw r12, 112(r10)
+    stw r12, 116(r10)
+    stw r12, 120(r10)
+    stw r12, 124(r10)
+    stw r12, 128(r10)
+    stw r12, 132(r10)
+    stw r12, 136(r10)
+    stw r12, 140(r10)
+    stw r12, 144(r10)
+    stw r12, 148(r10)
+    stw r12, 152(r10)
+    stw r12, 156(r10)
+    stw r12, 160(r10)
+    stw r12, 164(r10)
+    stw r12, 168(r10)
+    stw r12, 172(r10)
+    stw r12, 176(r10)
+    stw r12, 180(r10)
+    stw r12, 184(r10)
+    stw r12, 188(r10)
+    stw r12, 192(r10)
+    stw r12, 196(r10)
+    stw r12, 200(r10)
+    stw r12, 204(r10)
+    stw r12, 208(r10)
+    stw r12, 212(r10)
+    stw r12, 216(r10)
+    stw r12, 220(r10)
+    stw r12, 224(r10)
+    stw r12, 228(r10)
+    stw r12, 232(r10)
+    stw r12, 236(r10)
+    stw r12, 240(r10)
+    stw r12, 244(r10)
+    stw r12, 248(r10)
+    stw r12, 252(r10)
+    stw r12, 256(r10)
+    stw r12, 260(r10)
+    stw r12, 264(r10)
+    stw r12, 268(r10)
+    stw r12, 272(r10)
+    stw r12, 276(r10)
+    stw r12, 280(r10)
+    stw r12, 284(r10)
+    stw r12, 288(r10)
+    stw r12, 292(r10)
+    stw r12, 296(r10)
+    stw r12, 300(r10)
+    stw r11, 304(r10)
+    stw r11, 308(r10)
+    stw r12, 312(r10)
+    stw r12, 316(r10)
+    stw r12, 320(r10)
+    stw r12, 324(r10)
+    stw r12, 328(r10)
+    stw r12, 332(r10)
+    stw r12, 336(r10)
+    stw r12, 340(r10)
+    stw r12, 344(r10)
+    stw r12, 348(r10)
+    stw r12, 352(r10)
+    stw r12, 356(r10)
+    stw r12, 360(r10)
+    stw r12, 364(r10)
+    stw r12, 368(r10)
+    stw r12, 372(r10)
+    stw r12, 376(r10)
+    stw r12, 380(r10)
+    stw r12, 384(r10)
+    stw r12, 388(r10)
+    stw r12, 392(r10)
+    stw r12, 396(r10)
+    stw r12, 400(r10)
+    stw r12, 404(r10)
+    stw r12, 408(r10)
+    stw r12, 412(r10)
+    add r10, r10, r9
+    stw r12, 0(r10)
+    stw r12, 4(r10)
+    stw r11, 8(r10)
+    stw r11, 12(r10)
+    stw r11, 16(r10)
+    stw r11, 20(r10)
+    stw r11, 24(r10)
+    stw r12, 28(r10)
+    stw r12, 32(r10)
+    stw r11, 36(r10)
+    stw r11, 40(r10)
+    stw r12, 44(r10)
+    stw r11, 48(r10)
+    stw r11, 52(r10)
+    stw r11, 56(r10)
+    stw r12, 60(r10)
+    stw r12, 64(r10)
+    stw r12, 68(r10)
+    stw r12, 72(r10)
+    stw r11, 76(r10)
+    stw r11, 80(r10)
+    stw r11, 84(r10)
+    stw r11, 88(r10)
+    stw r12, 92(r10)
+    stw r12, 96(r10)
+    stw r12, 100(r10)
+    stw r12, 104(r10)
+    stw r12, 108(r10)
+    stw r12, 112(r10)
+    stw r12, 116(r10)
+    stw r12, 120(r10)
+    stw r12, 124(r10)
+    stw r12, 128(r10)
+    stw r12, 132(r10)
+    stw r11, 136(r10)
+    stw r11, 140(r10)
+    stw r11, 144(r10)
+    stw r11, 148(r10)
+    stw r11, 152(r10)
+    stw r12, 156(r10)
+    stw r12, 160(r10)
+    stw r12, 164(r10)
+    stw r11, 168(r10)
+    stw r11, 172(r10)
+    stw r11, 176(r10)
+    stw r11, 180(r10)
+    stw r11, 184(r10)
+    stw r12, 188(r10)
+    stw r12, 192(r10)
+    stw r11, 196(r10)
+    stw r11, 200(r10)
+    stw r12, 204(r10)
+    stw r11, 208(r10)
+    stw r11, 212(r10)
+    stw r11, 216(r10)
+    stw r12, 220(r10)
+    stw r12, 224(r10)
+    stw r11, 228(r10)
+    stw r11, 232(r10)
+    stw r12, 236(r10)
+    stw r12, 240(r10)
+    stw r12, 244(r10)
+    stw r11, 248(r10)
+    stw r11, 252(r10)
+    stw r12, 256(r10)
+    stw r12, 260(r10)
+    stw r12, 264(r10)
+    stw r12, 268(r10)
+    stw r12, 272(r10)
+    stw r12, 276(r10)
+    stw r12, 280(r10)
+    stw r12, 284(r10)
+    stw r12, 288(r10)
+    stw r12, 292(r10)
+    stw r12, 296(r10)
+    stw r12, 300(r10)
+    stw r11, 304(r10)
+    stw r11, 308(r10)
+    stw r12, 312(r10)
+    stw r12, 316(r10)
+    stw r12, 320(r10)
+    stw r12, 324(r10)
+    stw r11, 328(r10)
+    stw r11, 332(r10)
+    stw r11, 336(r10)
+    stw r11, 340(r10)
+    stw r11, 344(r10)
+    stw r12, 348(r10)
+    stw r12, 352(r10)
+    stw r12, 356(r10)
+    stw r11, 360(r10)
+    stw r11, 364(r10)
+    stw r11, 368(r10)
+    stw r11, 372(r10)
+    stw r11, 376(r10)
+    stw r12, 380(r10)
+    stw r12, 384(r10)
+    stw r11, 388(r10)
+    stw r11, 392(r10)
+    stw r12, 396(r10)
+    stw r11, 400(r10)
+    stw r11, 404(r10)
+    stw r11, 408(r10)
+    stw r12, 412(r10)
+    add r10, r10, r9
+    stw r12, 0(r10)
+    stw r11, 4(r10)
+    stw r11, 8(r10)
+    stw r12, 12(r10)
+    stw r12, 16(r10)
+    stw r12, 20(r10)
+    stw r11, 24(r10)
+    stw r11, 28(r10)
+    stw r12, 32(r10)
+    stw r12, 36(r10)
+    stw r11, 40(r10)
+    stw r11, 44(r10)
+    stw r12, 48(r10)
+    stw r12, 52(r10)
+    stw r11, 56(r10)
+    stw r11, 60(r10)
+    stw r12, 64(r10)
+    stw r12, 68(r10)
+    stw r11, 72(r10)
+    stw r11, 76(r10)
+    stw r12, 80(r10)
+    stw r11, 84(r10)
+    stw r11, 88(r10)
+    stw r12, 92(r10)
+    stw r12, 96(r10)
+    stw r12, 100(r10)
+    stw r12, 104(r10)
+    stw r12, 108(r10)
+    stw r12, 112(r10)
+    stw r12, 116(r10)
+    stw r12, 120(r10)
+    stw r12, 124(r10)
+    stw r12, 128(r10)
+    stw r11, 132(r10)
+    stw r11, 136(r10)
+    stw r12, 140(r10)
+    stw r12, 144(r10)
+    stw r12, 148(r10)
+    stw r11, 152(r10)
+    stw r11, 156(r10)
+    stw r12, 160(r10)
+    stw r11, 164(r10)
+    stw r11, 168(r10)
+    stw r12, 172(r10)
+    stw r12, 176(r10)
+    stw r12, 180(r10)
+    stw r11, 184(r10)
+    stw r11, 188(r10)
+    stw r12, 192(r10)
+    stw r12, 196(r10)
+    stw r11, 200(r10)
+    stw r11, 204(r10)
+    stw r12, 208(r10)
+    stw r12, 212(r10)
+    stw r11, 216(r10)
+    stw r11, 220(r10)
+    stw r12, 224(r10)
+    stw r11, 228(r10)
+    stw r11, 232(r10)
+    stw r12, 236(r10)
+    stw r12, 240(r10)
+    stw r12, 244(r10)
+    stw r11, 248(r10)
+    stw r11, 252(r10)
+    stw r12, 256(r10)
+    stw r12, 260(r10)
+    stw r12, 264(r10)
+    stw r12, 268(r10)
+    stw r12, 272(r10)
+    stw r12, 276(r10)
+    stw r12, 280(r10)
+    stw r12, 284(r10)
+    stw r12, 288(r10)
+    stw r12, 292(r10)
+    stw r12, 296(r10)
+    stw r12, 300(r10)
+    stw r11, 304(r10)
+    stw r11, 308(r10)
+    stw r12, 312(r10)
+    stw r12, 316(r10)
+    stw r12, 320(r10)
+    stw r11, 324(r10)
+    stw r11, 328(r10)
+    stw r12, 332(r10)
+    stw r12, 336(r10)
+    stw r12, 340(r10)
+    stw r11, 344(r10)
+    stw r11, 348(r10)
+    stw r12, 352(r10)
+    stw r11, 356(r10)
+    stw r11, 360(r10)
+    stw r12, 364(r10)
+    stw r12, 368(r10)
+    stw r12, 372(r10)
+    stw r11, 376(r10)
+    stw r11, 380(r10)
+    stw r12, 384(r10)
+    stw r12, 388(r10)
+    stw r11, 392(r10)
+    stw r11, 396(r10)
+    stw r12, 400(r10)
+    stw r12, 404(r10)
+    stw r11, 408(r10)
+    stw r11, 412(r10)
+    add r10, r10, r9
+    stw r12, 0(r10)
+    stw r11, 4(r10)
+    stw r11, 8(r10)
+    stw r11, 12(r10)
+    stw r11, 16(r10)
+    stw r11, 20(r10)
+    stw r11, 24(r10)
+    stw r11, 28(r10)
+    stw r12, 32(r10)
+    stw r12, 36(r10)
+    stw r11, 40(r10)
+    stw r11, 44(r10)
+    stw r12, 48(r10)
+    stw r12, 52(r10)
+    stw r11, 56(r10)
+    stw r11, 60(r10)
+    stw r12, 64(r10)
+    stw r11, 68(r10)
+    stw r11, 72(r10)
+    stw r12, 76(r10)
+    stw r12, 80(r10)
+    stw r11, 84(r10)
+    stw r11, 88(r10)
+    stw r12, 92(r10)
+    stw r12, 96(r10)
+    stw r12, 100(r10)
+    stw r12, 104(r10)
+    stw r12, 108(r10)
+    stw r12, 112(r10)
+    stw r12, 116(r10)
+    stw r12, 120(r10)
+    stw r12, 124(r10)
+    stw r12, 128(r10)
+    stw r11, 132(r10)
+    stw r11, 136(r10)
+    stw r12, 140(r10)
+    stw r12, 144(r10)
+    stw r12, 148(r10)
+    stw r12, 152(r10)
+    stw r12, 156(r10)
+    stw r12, 160(r10)
+    stw r11, 164(r10)
+    stw r11, 168(r10)
+    stw r12, 172(r10)
+    stw r12, 176(r10)
+    stw r12, 180(r10)
+    stw r11, 184(r10)
+    stw r11, 188(r10)
+    stw r12, 192(r10)
+    stw r12, 196(r10)
+    stw r11, 200(r10)
+    stw r11, 204(r10)
+    stw r12, 208(r10)
+    stw r12, 212(r10)
+    stw r11, 216(r10)
+    stw r11, 220(r10)
+    stw r12, 224(r10)
+    stw r11, 228(r10)
+    stw r11, 232(r10)
+    stw r12, 236(r10)
+    stw r12, 240(r10)
+    stw r12, 244(r10)
+    stw r11, 248(r10)
+    stw r11, 252(r10)
+    stw r12, 256(r10)
+    stw r12, 260(r10)
+    stw r12, 264(r10)
+    stw r12, 268(r10)
+    stw r12, 272(r10)
+    stw r12, 276(r10)
+    stw r12, 280(r10)
+    stw r12, 284(r10)
+    stw r12, 288(r10)
+    stw r12, 292(r10)
+    stw r12, 296(r10)
+    stw r12, 300(r10)
+    stw r11, 304(r10)
+    stw r11, 308(r10)
+    stw r12, 312(r10)
+    stw r12, 316(r10)
+    stw r12, 320(r10)
+    stw r11, 324(r10)
+    stw r11, 328(r10)
+    stw r12, 332(r10)
+    stw r12, 336(r10)
+    stw r12, 340(r10)
+    stw r11, 344(r10)
+    stw r11, 348(r10)
+    stw r12, 352(r10)
+    stw r11, 356(r10)
+    stw r11, 360(r10)
+    stw r12, 364(r10)
+    stw r12, 368(r10)
+    stw r12, 372(r10)
+    stw r11, 376(r10)
+    stw r11, 380(r10)
+    stw r12, 384(r10)
+    stw r12, 388(r10)
+    stw r11, 392(r10)
+    stw r11, 396(r10)
+    stw r12, 400(r10)
+    stw r12, 404(r10)
+    stw r11, 408(r10)
+    stw r11, 412(r10)
+    add r10, r10, r9
+    stw r12, 0(r10)
+    stw r11, 4(r10)
+    stw r11, 8(r10)
+    stw r12, 12(r10)
+    stw r12, 16(r10)
+    stw r12, 20(r10)
+    stw r12, 24(r10)
+    stw r12, 28(r10)
+    stw r12, 32(r10)
+    stw r12, 36(r10)
+    stw r11, 40(r10)
+    stw r11, 44(r10)
+    stw r12, 48(r10)
+    stw r12, 52(r10)
+    stw r11, 56(r10)
+    stw r11, 60(r10)
+    stw r12, 64(r10)
+    stw r11, 68(r10)
+    stw r11, 72(r10)
+    stw r12, 76(r10)
+    stw r12, 80(r10)
+    stw r11, 84(r10)
+    stw r11, 88(r10)
+    stw r12, 92(r10)
+    stw r12, 96(r10)
+    stw r12, 100(r10)
+    stw r12, 104(r10)
+    stw r12, 108(r10)
+    stw r12, 112(r10)
+    stw r12, 116(r10)
+    stw r12, 120(r10)
+    stw r12, 124(r10)
+    stw r12, 128(r10)
+    stw r11, 132(r10)
+    stw r11, 136(r10)
+    stw r12, 140(r10)
+    stw r12, 144(r10)
+    stw r12, 148(r10)
+    stw r12, 152(r10)
+    stw r12, 156(r10)
+    stw r12, 160(r10)
+    stw r11, 164(r10)
+    stw r11, 168(r10)
+    stw r12, 172(r10)
+    stw r12, 176(r10)
+    stw r12, 180(r10)
+    stw r11, 184(r10)
+    stw r11, 188(r10)
+    stw r12, 192(r10)
+    stw r12, 196(r10)
+    stw r11, 200(r10)
+    stw r11, 204(r10)
+    stw r12, 208(r10)
+    stw r12, 212(r10)
+    stw r11, 216(r10)
+    stw r11, 220(r10)
+    stw r12, 224(r10)
+    stw r11, 228(r10)
+    stw r11, 232(r10)
+    stw r12, 236(r10)
+    stw r12, 240(r10)
+    stw r12, 244(r10)
+    stw r11, 248(r10)
+    stw r11, 252(r10)
+    stw r12, 256(r10)
+    stw r12, 260(r10)
+    stw r12, 264(r10)
+    stw r12, 268(r10)
+    stw r12, 272(r10)
+    stw r12, 276(r10)
+    stw r12, 280(r10)
+    stw r12, 284(r10)
+    stw r12, 288(r10)
+    stw r12, 292(r10)
+    stw r12, 296(r10)
+    stw r12, 300(r10)
+    stw r11, 304(r10)
+    stw r11, 308(r10)
+    stw r12, 312(r10)
+    stw r12, 316(r10)
+    stw r12, 320(r10)
+    stw r11, 324(r10)
+    stw r11, 328(r10)
+    stw r12, 332(r10)
+    stw r12, 336(r10)
+    stw r12, 340(r10)
+    stw r11, 344(r10)
+    stw r11, 348(r10)
+    stw r12, 352(r10)
+    stw r11, 356(r10)
+    stw r11, 360(r10)
+    stw r12, 364(r10)
+    stw r12, 368(r10)
+    stw r12, 372(r10)
+    stw r11, 376(r10)
+    stw r11, 380(r10)
+    stw r12, 384(r10)
+    stw r12, 388(r10)
+    stw r11, 392(r10)
+    stw r11, 396(r10)
+    stw r12, 400(r10)
+    stw r12, 404(r10)
+    stw r11, 408(r10)
+    stw r11, 412(r10)
+    add r10, r10, r9
+    stw r12, 0(r10)
+    stw r11, 4(r10)
+    stw r11, 8(r10)
+    stw r12, 12(r10)
+    stw r12, 16(r10)
+    stw r12, 20(r10)
+    stw r12, 24(r10)
+    stw r12, 28(r10)
+    stw r12, 32(r10)
+    stw r12, 36(r10)
+    stw r11, 40(r10)
+    stw r11, 44(r10)
+    stw r12, 48(r10)
+    stw r12, 52(r10)
+    stw r11, 56(r10)
+    stw r11, 60(r10)
+    stw r12, 64(r10)
+    stw r11, 68(r10)
+    stw r11, 72(r10)
+    stw r12, 76(r10)
+    stw r12, 80(r10)
+    stw r11, 84(r10)
+    stw r11, 88(r10)
+    stw r12, 92(r10)
+    stw r12, 96(r10)
+    stw r12, 100(r10)
+    stw r12, 104(r10)
+    stw r12, 108(r10)
+    stw r12, 112(r10)
+    stw r12, 116(r10)
+    stw r12, 120(r10)
+    stw r12, 124(r10)
+    stw r12, 128(r10)
+    stw r11, 132(r10)
+    stw r11, 136(r10)
+    stw r12, 140(r10)
+    stw r12, 144(r10)
+    stw r12, 148(r10)
+    stw r12, 152(r10)
+    stw r12, 156(r10)
+    stw r12, 160(r10)
+    stw r11, 164(r10)
+    stw r11, 168(r10)
+    stw r12, 172(r10)
+    stw r12, 176(r10)
+    stw r12, 180(r10)
+    stw r11, 184(r10)
+    stw r11, 188(r10)
+    stw r12, 192(r10)
+    stw r12, 196(r10)
+    stw r11, 200(r10)
+    stw r11, 204(r10)
+    stw r12, 208(r10)
+    stw r12, 212(r10)
+    stw r11, 216(r10)
+    stw r11, 220(r10)
+    stw r12, 224(r10)
+    stw r11, 228(r10)
+    stw r11, 232(r10)
+    stw r12, 236(r10)
+    stw r12, 240(r10)
+    stw r12, 244(r10)
+    stw r11, 248(r10)
+    stw r11, 252(r10)
+    stw r12, 256(r10)
+    stw r12, 260(r10)
+    stw r12, 264(r10)
+    stw r12, 268(r10)
+    stw r12, 272(r10)
+    stw r12, 276(r10)
+    stw r12, 280(r10)
+    stw r12, 284(r10)
+    stw r12, 288(r10)
+    stw r12, 292(r10)
+    stw r12, 296(r10)
+    stw r12, 300(r10)
+    stw r11, 304(r10)
+    stw r11, 308(r10)
+    stw r12, 312(r10)
+    stw r12, 316(r10)
+    stw r12, 320(r10)
+    stw r11, 324(r10)
+    stw r11, 328(r10)
+    stw r12, 332(r10)
+    stw r12, 336(r10)
+    stw r12, 340(r10)
+    stw r11, 344(r10)
+    stw r11, 348(r10)
+    stw r12, 352(r10)
+    stw r11, 356(r10)
+    stw r11, 360(r10)
+    stw r12, 364(r10)
+    stw r12, 368(r10)
+    stw r12, 372(r10)
+    stw r11, 376(r10)
+    stw r11, 380(r10)
+    stw r12, 384(r10)
+    stw r12, 388(r10)
+    stw r11, 392(r10)
+    stw r11, 396(r10)
+    stw r12, 400(r10)
+    stw r12, 404(r10)
+    stw r11, 408(r10)
+    stw r11, 412(r10)
+    add r10, r10, r9
+    stw r12, 0(r10)
+    stw r11, 4(r10)
+    stw r11, 8(r10)
+    stw r12, 12(r10)
+    stw r12, 16(r10)
+    stw r12, 20(r10)
+    stw r11, 24(r10)
+    stw r11, 28(r10)
+    stw r12, 32(r10)
+    stw r12, 36(r10)
+    stw r11, 40(r10)
+    stw r11, 44(r10)
+    stw r12, 48(r10)
+    stw r12, 52(r10)
+    stw r11, 56(r10)
+    stw r11, 60(r10)
+    stw r12, 64(r10)
+    stw r11, 68(r10)
+    stw r11, 72(r10)
+    stw r12, 76(r10)
+    stw r12, 80(r10)
+    stw r11, 84(r10)
+    stw r11, 88(r10)
+    stw r12, 92(r10)
+    stw r12, 96(r10)
+    stw r12, 100(r10)
+    stw r12, 104(r10)
+    stw r12, 108(r10)
+    stw r12, 112(r10)
+    stw r12, 116(r10)
+    stw r12, 120(r10)
+    stw r12, 124(r10)
+    stw r12, 128(r10)
+    stw r11, 132(r10)
+    stw r11, 136(r10)
+    stw r12, 140(r10)
+    stw r12, 144(r10)
+    stw r12, 148(r10)
+    stw r11, 152(r10)
+    stw r11, 156(r10)
+    stw r12, 160(r10)
+    stw r11, 164(r10)
+    stw r11, 168(r10)
+    stw r12, 172(r10)
+    stw r12, 176(r10)
+    stw r12, 180(r10)
+    stw r11, 184(r10)
+    stw r11, 188(r10)
+    stw r12, 192(r10)
+    stw r12, 196(r10)
+    stw r11, 200(r10)
+    stw r11, 204(r10)
+    stw r12, 208(r10)
+    stw r12, 212(r10)
+    stw r11, 216(r10)
+    stw r11, 220(r10)
+    stw r12, 224(r10)
+    stw r11, 228(r10)
+    stw r11, 232(r10)
+    stw r12, 236(r10)
+    stw r12, 240(r10)
+    stw r12, 244(r10)
+    stw r11, 248(r10)
+    stw r11, 252(r10)
+    stw r12, 256(r10)
+    stw r12, 260(r10)
+    stw r12, 264(r10)
+    stw r12, 268(r10)
+    stw r12, 272(r10)
+    stw r12, 276(r10)
+    stw r12, 280(r10)
+    stw r12, 284(r10)
+    stw r12, 288(r10)
+    stw r12, 292(r10)
+    stw r12, 296(r10)
+    stw r12, 300(r10)
+    stw r11, 304(r10)
+    stw r11, 308(r10)
+    stw r12, 312(r10)
+    stw r12, 316(r10)
+    stw r12, 320(r10)
+    stw r11, 324(r10)
+    stw r11, 328(r10)
+    stw r12, 332(r10)
+    stw r12, 336(r10)
+    stw r12, 340(r10)
+    stw r11, 344(r10)
+    stw r11, 348(r10)
+    stw r12, 352(r10)
+    stw r11, 356(r10)
+    stw r11, 360(r10)
+    stw r12, 364(r10)
+    stw r12, 368(r10)
+    stw r12, 372(r10)
+    stw r11, 376(r10)
+    stw r11, 380(r10)
+    stw r12, 384(r10)
+    stw r12, 388(r10)
+    stw r11, 392(r10)
+    stw r11, 396(r10)
+    stw r12, 400(r10)
+    stw r12, 404(r10)
+    stw r11, 408(r10)
+    stw r11, 412(r10)
+    add r10, r10, r9
+    stw r12, 0(r10)
+    stw r12, 4(r10)
+    stw r11, 8(r10)
+    stw r11, 12(r10)
+    stw r11, 16(r10)
+    stw r11, 20(r10)
+    stw r11, 24(r10)
+    stw r12, 28(r10)
+    stw r12, 32(r10)
+    stw r12, 36(r10)
+    stw r11, 40(r10)
+    stw r11, 44(r10)
+    stw r12, 48(r10)
+    stw r12, 52(r10)
+    stw r11, 56(r10)
+    stw r11, 60(r10)
+    stw r12, 64(r10)
+    stw r12, 68(r10)
+    stw r11, 72(r10)
+    stw r11, 76(r10)
+    stw r11, 80(r10)
+    stw r12, 84(r10)
+    stw r11, 88(r10)
+    stw r11, 92(r10)
+    stw r12, 96(r10)
+    stw r12, 100(r10)
+    stw r12, 104(r10)
+    stw r12, 108(r10)
+    stw r12, 112(r10)
+    stw r12, 116(r10)
+    stw r12, 120(r10)
+    stw r12, 124(r10)
+    stw r12, 128(r10)
+    stw r12, 132(r10)
+    stw r11, 136(r10)
+    stw r11, 140(r10)
+    stw r11, 144(r10)
+    stw r11, 148(r10)
+    stw r11, 152(r10)
+    stw r12, 156(r10)
+    stw r12, 160(r10)
+    stw r12, 164(r10)
+    stw r11, 168(r10)
+    stw r11, 172(r10)
+    stw r11, 176(r10)
+    stw r11, 180(r10)
+    stw r11, 184(r10)
+    stw r12, 188(r10)
+    stw r12, 192(r10)
+    stw r12, 196(r10)
+    stw r11, 200(r10)
+    stw r11, 204(r10)
+    stw r11, 208(r10)
+    stw r11, 212(r10)
+    stw r11, 216(r10)
+    stw r12, 220(r10)
+    stw r12, 224(r10)
+    stw r12, 228(r10)
+    stw r11, 232(r10)
+    stw r11, 236(r10)
+    stw r11, 240(r10)
+    stw r11, 244(r10)
+    stw r11, 248(r10)
+    stw r11, 252(r10)
+    stw r12, 256(r10)
+    stw r12, 260(r10)
+    stw r12, 264(r10)
+    stw r12, 268(r10)
+    stw r12, 272(r10)
+    stw r12, 276(r10)
+    stw r12, 280(r10)
+    stw r12, 284(r10)
+    stw r12, 288(r10)
+    stw r12, 292(r10)
+    stw r12, 296(r10)
+    stw r11, 300(r10)
+    stw r11, 304(r10)
+    stw r11, 308(r10)
+    stw r11, 312(r10)
+    stw r12, 316(r10)
+    stw r12, 320(r10)
+    stw r12, 324(r10)
+    stw r11, 328(r10)
+    stw r11, 332(r10)
+    stw r11, 336(r10)
+    stw r11, 340(r10)
+    stw r11, 344(r10)
+    stw r12, 348(r10)
+    stw r12, 352(r10)
+    stw r12, 356(r10)
+    stw r11, 360(r10)
+    stw r11, 364(r10)
+    stw r11, 368(r10)
+    stw r11, 372(r10)
+    stw r11, 376(r10)
+    stw r12, 380(r10)
+    stw r12, 384(r10)
+    stw r12, 388(r10)
+    stw r11, 392(r10)
+    stw r11, 396(r10)
+    stw r11, 400(r10)
+    stw r11, 404(r10)
+    stw r11, 408(r10)
+    stw r12, 412(r10)
+    add r10, r10, r9
+    stw r12, 0(r10)
+    stw r12, 4(r10)
+    stw r12, 8(r10)
+    stw r12, 12(r10)
+    stw r12, 16(r10)
+    stw r12, 20(r10)
+    stw r12, 24(r10)
+    stw r12, 28(r10)
+    stw r12, 32(r10)
+    stw r12, 36(r10)
+    stw r12, 40(r10)
+    stw r12, 44(r10)
+    stw r12, 48(r10)
+    stw r12, 52(r10)
+    stw r12, 56(r10)
+    stw r12, 60(r10)
+    stw r12, 64(r10)
+    stw r12, 68(r10)
+    stw r12, 72(r10)
+    stw r12, 76(r10)
+    stw r12, 80(r10)
+    stw r12, 84(r10)
+    stw r12, 88(r10)
+    stw r12, 92(r10)
+    stw r12, 96(r10)
+    stw r12, 100(r10)
+    stw r12, 104(r10)
+    stw r12, 108(r10)
+    stw r12, 112(r10)
+    stw r12, 116(r10)
+    stw r12, 120(r10)
+    stw r12, 124(r10)
+    stw r12, 128(r10)
+    stw r12, 132(r10)
+    stw r12, 136(r10)
+    stw r12, 140(r10)
+    stw r12, 144(r10)
+    stw r12, 148(r10)
+    stw r12, 152(r10)
+    stw r12, 156(r10)
+    stw r12, 160(r10)
+    stw r12, 164(r10)
+    stw r12, 168(r10)
+    stw r12, 172(r10)
+    stw r12, 176(r10)
+    stw r12, 180(r10)
+    stw r12, 184(r10)
+    stw r12, 188(r10)
+    stw r12, 192(r10)
+    stw r12, 196(r10)
+    stw r11, 200(r10)
+    stw r11, 204(r10)
+    stw r12, 208(r10)
+    stw r12, 212(r10)
+    stw r12, 216(r10)
+    stw r12, 220(r10)
+    stw r12, 224(r10)
+    stw r12, 228(r10)
+    stw r12, 232(r10)
+    stw r12, 236(r10)
+    stw r12, 240(r10)
+    stw r12, 244(r10)
+    stw r11, 248(r10)
+    stw r11, 252(r10)
+    stw r12, 256(r10)
+    stw r12, 260(r10)
+    stw r12, 264(r10)
+    stw r12, 268(r10)
+    stw r12, 272(r10)
+    stw r12, 276(r10)
+    stw r12, 280(r10)
+    stw r12, 284(r10)
+    stw r12, 288(r10)
+    stw r12, 292(r10)
+    stw r12, 296(r10)
+    stw r12, 300(r10)
+    stw r12, 304(r10)
+    stw r12, 308(r10)
+    stw r12, 312(r10)
+    stw r12, 316(r10)
+    stw r12, 320(r10)
+    stw r12, 324(r10)
+    stw r12, 328(r10)
+    stw r12, 332(r10)
+    stw r12, 336(r10)
+    stw r12, 340(r10)
+    stw r12, 344(r10)
+    stw r12, 348(r10)
+    stw r12, 352(r10)
+    stw r12, 356(r10)
+    stw r12, 360(r10)
+    stw r12, 364(r10)
+    stw r12, 368(r10)
+    stw r12, 372(r10)
+    stw r12, 376(r10)
+    stw r12, 380(r10)
+    stw r12, 384(r10)
+    stw r12, 388(r10)
+    stw r11, 392(r10)
+    stw r11, 396(r10)
+    stw r12, 400(r10)
+    stw r12, 404(r10)
+    stw r12, 408(r10)
+    stw r12, 412(r10)
+    add r10, r10, r9
+    stw r12, 0(r10)
+    stw r12, 4(r10)
+    stw r12, 8(r10)
+    stw r12, 12(r10)
+    stw r12, 16(r10)
+    stw r12, 20(r10)
+    stw r12, 24(r10)
+    stw r12, 28(r10)
+    stw r12, 32(r10)
+    stw r12, 36(r10)
+    stw r12, 40(r10)
+    stw r12, 44(r10)
+    stw r12, 48(r10)
+    stw r12, 52(r10)
+    stw r12, 56(r10)
+    stw r12, 60(r10)
+    stw r12, 64(r10)
+    stw r12, 68(r10)
+    stw r12, 72(r10)
+    stw r12, 76(r10)
+    stw r12, 80(r10)
+    stw r12, 84(r10)
+    stw r12, 88(r10)
+    stw r12, 92(r10)
+    stw r12, 96(r10)
+    stw r11, 100(r10)
+    stw r11, 104(r10)
+    stw r11, 108(r10)
+    stw r11, 112(r10)
+    stw r11, 116(r10)
+    stw r11, 120(r10)
+    stw r11, 124(r10)
+    stw r12, 128(r10)
+    stw r12, 132(r10)
+    stw r12, 136(r10)
+    stw r12, 140(r10)
+    stw r12, 144(r10)
+    stw r12, 148(r10)
+    stw r12, 152(r10)
+    stw r12, 156(r10)
+    stw r12, 160(r10)
+    stw r12, 164(r10)
+    stw r12, 168(r10)
+    stw r12, 172(r10)
+    stw r12, 176(r10)
+    stw r12, 180(r10)
+    stw r12, 184(r10)
+    stw r12, 188(r10)
+    stw r12, 192(r10)
+    stw r12, 196(r10)
+    stw r11, 200(r10)
+    stw r11, 204(r10)
+    stw r12, 208(r10)
+    stw r12, 212(r10)
+    stw r12, 216(r10)
+    stw r12, 220(r10)
+    stw r12, 224(r10)
+    stw r12, 228(r10)
+    stw r12, 232(r10)
+    stw r12, 236(r10)
+    stw r12, 240(r10)
+    stw r11, 244(r10)
+    stw r11, 248(r10)
+    stw r12, 252(r10)
+    stw r12, 256(r10)
+    stw r11, 260(r10)
+    stw r11, 264(r10)
+    stw r11, 268(r10)
+    stw r11, 272(r10)
+    stw r11, 276(r10)
+    stw r11, 280(r10)
+    stw r11, 284(r10)
+    stw r12, 288(r10)
+    stw r12, 292(r10)
+    stw r12, 296(r10)
+    stw r12, 300(r10)
+    stw r12, 304(r10)
+    stw r12, 308(r10)
+    stw r12, 312(r10)
+    stw r12, 316(r10)
+    stw r12, 320(r10)
+    stw r12, 324(r10)
+    stw r12, 328(r10)
+    stw r12, 332(r10)
+    stw r12, 336(r10)
+    stw r12, 340(r10)
+    stw r12, 344(r10)
+    stw r12, 348(r10)
+    stw r12, 352(r10)
+    stw r12, 356(r10)
+    stw r12, 360(r10)
+    stw r12, 364(r10)
+    stw r12, 368(r10)
+    stw r12, 372(r10)
+    stw r12, 376(r10)
+    stw r12, 380(r10)
+    stw r12, 384(r10)
+    stw r12, 388(r10)
+    stw r11, 392(r10)
+    stw r11, 396(r10)
+    stw r12, 400(r10)
+    stw r12, 404(r10)
+    stw r12, 408(r10)
+    stw r12, 412(r10)
+    add r10, r10, r9
+    stw r12, 0(r10)
+    stw r12, 4(r10)
+    stw r12, 8(r10)
+    stw r12, 12(r10)
+    stw r12, 16(r10)
+    stw r12, 20(r10)
+    stw r12, 24(r10)
+    stw r12, 28(r10)
+    stw r12, 32(r10)
+    stw r12, 36(r10)
+    stw r12, 40(r10)
+    stw r12, 44(r10)
+    stw r12, 48(r10)
+    stw r12, 52(r10)
+    stw r12, 56(r10)
+    stw r12, 60(r10)
+    stw r12, 64(r10)
+    stw r12, 68(r10)
+    stw r12, 72(r10)
+    stw r12, 76(r10)
+    stw r12, 80(r10)
+    stw r12, 84(r10)
+    stw r12, 88(r10)
+    stw r12, 92(r10)
+    stw r12, 96(r10)
+    stw r12, 100(r10)
+    stw r12, 104(r10)
+    stw r12, 108(r10)
+    stw r12, 112(r10)
+    stw r12, 116(r10)
+    stw r12, 120(r10)
+    stw r12, 124(r10)
+    stw r12, 128(r10)
+    stw r12, 132(r10)
+    stw r12, 136(r10)
+    stw r12, 140(r10)
+    stw r12, 144(r10)
+    stw r12, 148(r10)
+    stw r12, 152(r10)
+    stw r12, 156(r10)
+    stw r12, 160(r10)
+    stw r12, 164(r10)
+    stw r12, 168(r10)
+    stw r12, 172(r10)
+    stw r12, 176(r10)
+    stw r12, 180(r10)
+    stw r12, 184(r10)
+    stw r12, 188(r10)
+    stw r12, 192(r10)
+    stw r11, 196(r10)
+    stw r11, 200(r10)
+    stw r11, 204(r10)
+    stw r11, 208(r10)
+    stw r12, 212(r10)
+    stw r12, 216(r10)
+    stw r12, 220(r10)
+    stw r12, 224(r10)
+    stw r11, 228(r10)
+    stw r11, 232(r10)
+    stw r11, 236(r10)
+    stw r11, 240(r10)
+    stw r11, 244(r10)
+    stw r12, 248(r10)
+    stw r12, 252(r10)
+    stw r12, 256(r10)
+    stw r12, 260(r10)
+    stw r12, 264(r10)
+    stw r12, 268(r10)
+    stw r12, 272(r10)
+    stw r12, 276(r10)
+    stw r12, 280(r10)
+    stw r12, 284(r10)
+    stw r12, 288(r10)
+    stw r12, 292(r10)
+    stw r12, 296(r10)
+    stw r12, 300(r10)
+    stw r12, 304(r10)
+    stw r12, 308(r10)
+    stw r12, 312(r10)
+    stw r12, 316(r10)
+    stw r12, 320(r10)
+    stw r12, 324(r10)
+    stw r12, 328(r10)
+    stw r12, 332(r10)
+    stw r12, 336(r10)
+    stw r12, 340(r10)
+    stw r12, 344(r10)
+    stw r12, 348(r10)
+    stw r12, 352(r10)
+    stw r12, 356(r10)
+    stw r12, 360(r10)
+    stw r12, 364(r10)
+    stw r12, 368(r10)
+    stw r12, 372(r10)
+    stw r12, 376(r10)
+    stw r12, 380(r10)
+    stw r12, 384(r10)
+    stw r11, 388(r10)
+    stw r11, 392(r10)
+    stw r11, 396(r10)
+    stw r11, 400(r10)
+    stw r12, 404(r10)
+    stw r12, 408(r10)
+    stw r12, 412(r10)
+    add r10, r10, r9
+    stw r12, 0(r10)
+    stw r12, 4(r10)
+    stw r12, 8(r10)
+    stw r12, 12(r10)
+    stw r12, 16(r10)
+    stw r12, 20(r10)
+    stw r12, 24(r10)
+    stw r12, 28(r10)
+    stw r12, 32(r10)
+    stw r12, 36(r10)
+    stw r12, 40(r10)
+    stw r12, 44(r10)
+    stw r12, 48(r10)
+    stw r12, 52(r10)
+    stw r12, 56(r10)
+    stw r12, 60(r10)
+    stw r12, 64(r10)
+    stw r12, 68(r10)
+    stw r12, 72(r10)
+    stw r12, 76(r10)
+    stw r12, 80(r10)
+    stw r12, 84(r10)
+    stw r12, 88(r10)
+    stw r12, 92(r10)
+    stw r12, 96(r10)
+    stw r12, 100(r10)
+    stw r12, 104(r10)
+    stw r12, 108(r10)
+    stw r12, 112(r10)
+    stw r12, 116(r10)
+    stw r12, 120(r10)
+    stw r12, 124(r10)
+    stw r12, 128(r10)
+    stw r12, 132(r10)
+    stw r12, 136(r10)
+    stw r12, 140(r10)
+    stw r12, 144(r10)
+    stw r12, 148(r10)
+    stw r12, 152(r10)
+    stw r12, 156(r10)
+    stw r12, 160(r10)
+    stw r12, 164(r10)
+    stw r12, 168(r10)
+    stw r12, 172(r10)
+    stw r12, 176(r10)
+    stw r12, 180(r10)
+    stw r12, 184(r10)
+    stw r12, 188(r10)
+    stw r12, 192(r10)
+    stw r12, 196(r10)
+    stw r12, 200(r10)
+    stw r12, 204(r10)
+    stw r12, 208(r10)
+    stw r12, 212(r10)
+    stw r12, 216(r10)
+    stw r12, 220(r10)
+    stw r12, 224(r10)
+    stw r12, 228(r10)
+    stw r12, 232(r10)
+    stw r12, 236(r10)
+    stw r12, 240(r10)
+    stw r12, 244(r10)
+    stw r12, 248(r10)
+    stw r12, 252(r10)
+    stw r12, 256(r10)
+    stw r12, 260(r10)
+    stw r12, 264(r10)
+    stw r12, 268(r10)
+    stw r12, 272(r10)
+    stw r12, 276(r10)
+    stw r12, 280(r10)
+    stw r12, 284(r10)
+    stw r12, 288(r10)
+    stw r12, 292(r10)
+    stw r12, 296(r10)
+    stw r12, 300(r10)
+    stw r12, 304(r10)
+    stw r12, 308(r10)
+    stw r12, 312(r10)
+    stw r12, 316(r10)
+    stw r12, 320(r10)
+    stw r12, 324(r10)
+    stw r12, 328(r10)
+    stw r12, 332(r10)
+    stw r12, 336(r10)
+    stw r12, 340(r10)
+    stw r12, 344(r10)
+    stw r12, 348(r10)
+    stw r12, 352(r10)
+    stw r12, 356(r10)
+    stw r12, 360(r10)
+    stw r12, 364(r10)
+    stw r12, 368(r10)
+    stw r12, 372(r10)
+    stw r12, 376(r10)
+    stw r12, 380(r10)
+    stw r12, 384(r10)
+    stw r12, 388(r10)
+    stw r12, 392(r10)
+    stw r12, 396(r10)
+    stw r12, 400(r10)
+    stw r12, 404(r10)
+    stw r12, 408(r10)
+    stw r12, 412(r10)
+#endif
+.endm
+.macro DEBUG_segments
+#ifdef CONFIG_DEBUG
+    stw r12, 0(r10)
+    stw r12, 4(r10)
+    stw r12, 8(r10)
+    stw r12, 12(r10)
+    stw r12, 16(r10)
+    stw r12, 20(r10)
+    stw r12, 24(r10)
+    stw r12, 28(r10)
+    stw r12, 32(r10)
+    stw r12, 36(r10)
+    stw r12, 40(r10)
+    stw r12, 44(r10)
+    stw r12, 48(r10)
+    stw r12, 52(r10)
+    stw r12, 56(r10)
+    stw r12, 60(r10)
+    stw r12, 64(r10)
+    stw r12, 68(r10)
+    stw r12, 72(r10)
+    stw r12, 76(r10)
+    stw r12, 80(r10)
+    stw r12, 84(r10)
+    stw r12, 88(r10)
+    stw r12, 92(r10)
+    stw r12, 96(r10)
+    stw r12, 100(r10)
+    stw r12, 104(r10)
+    stw r12, 108(r10)
+    stw r12, 112(r10)
+    stw r12, 116(r10)
+    stw r12, 120(r10)
+    stw r12, 124(r10)
+    stw r12, 128(r10)
+    stw r12, 132(r10)
+    stw r12, 136(r10)
+    stw r12, 140(r10)
+    stw r12, 144(r10)
+    stw r12, 148(r10)
+    stw r12, 152(r10)
+    stw r12, 156(r10)
+    stw r12, 160(r10)
+    stw r12, 164(r10)
+    stw r12, 168(r10)
+    stw r12, 172(r10)
+    stw r12, 176(r10)
+    stw r12, 180(r10)
+    stw r12, 184(r10)
+    stw r12, 188(r10)
+    stw r12, 192(r10)
+    stw r12, 196(r10)
+    stw r12, 200(r10)
+    stw r12, 204(r10)
+    stw r12, 208(r10)
+    stw r12, 212(r10)
+    stw r12, 216(r10)
+    stw r12, 220(r10)
+    stw r12, 224(r10)
+    stw r12, 228(r10)
+    stw r12, 232(r10)
+    stw r12, 236(r10)
+    stw r12, 240(r10)
+    stw r12, 244(r10)
+    stw r12, 248(r10)
+    stw r12, 252(r10)
+    add r10, r10, r9
+    stw r12, 0(r10)
+    stw r12, 4(r10)
+    stw r12, 8(r10)
+    stw r12, 12(r10)
+    stw r12, 16(r10)
+    stw r12, 20(r10)
+    stw r12, 24(r10)
+    stw r12, 28(r10)
+    stw r12, 32(r10)
+    stw r12, 36(r10)
+    stw r12, 40(r10)
+    stw r12, 44(r10)
+    stw r12, 48(r10)
+    stw r12, 52(r10)
+    stw r12, 56(r10)
+    stw r12, 60(r10)
+    stw r12, 64(r10)
+    stw r12, 68(r10)
+    stw r12, 72(r10)
+    stw r12, 76(r10)
+    stw r12, 80(r10)
+    stw r12, 84(r10)
+    stw r12, 88(r10)
+    stw r12, 92(r10)
+    stw r12, 96(r10)
+    stw r12, 100(r10)
+    stw r12, 104(r10)
+    stw r12, 108(r10)
+    stw r12, 112(r10)
+    stw r12, 116(r10)
+    stw r12, 120(r10)
+    stw r12, 124(r10)
+    stw r12, 128(r10)
+    stw r12, 132(r10)
+    stw r12, 136(r10)
+    stw r12, 140(r10)
+    stw r12, 144(r10)
+    stw r12, 148(r10)
+    stw r12, 152(r10)
+    stw r12, 156(r10)
+    stw r12, 160(r10)
+    stw r12, 164(r10)
+    stw r12, 168(r10)
+    stw r12, 172(r10)
+    stw r12, 176(r10)
+    stw r12, 180(r10)
+    stw r12, 184(r10)
+    stw r12, 188(r10)
+    stw r12, 192(r10)
+    stw r12, 196(r10)
+    stw r12, 200(r10)
+    stw r12, 204(r10)
+    stw r12, 208(r10)
+    stw r12, 212(r10)
+    stw r12, 216(r10)
+    stw r12, 220(r10)
+    stw r12, 224(r10)
+    stw r12, 228(r10)
+    stw r12, 232(r10)
+    stw r12, 236(r10)
+    stw r12, 240(r10)
+    stw r12, 244(r10)
+    stw r12, 248(r10)
+    stw r12, 252(r10)
+    add r10, r10, r9
+    stw r12, 0(r10)
+    stw r12, 4(r10)
+    stw r12, 8(r10)
+    stw r12, 12(r10)
+    stw r12, 16(r10)
+    stw r12, 20(r10)
+    stw r12, 24(r10)
+    stw r12, 28(r10)
+    stw r12, 32(r10)
+    stw r12, 36(r10)
+    stw r12, 40(r10)
+    stw r12, 44(r10)
+    stw r12, 48(r10)
+    stw r12, 52(r10)
+    stw r12, 56(r10)
+    stw r12, 60(r10)
+    stw r12, 64(r10)
+    stw r12, 68(r10)
+    stw r12, 72(r10)
+    stw r12, 76(r10)
+    stw r12, 80(r10)
+    stw r12, 84(r10)
+    stw r12, 88(r10)
+    stw r12, 92(r10)
+    stw r12, 96(r10)
+    stw r12, 100(r10)
+    stw r12, 104(r10)
+    stw r12, 108(r10)
+    stw r12, 112(r10)
+    stw r12, 116(r10)
+    stw r12, 120(r10)
+    stw r12, 124(r10)
+    stw r12, 128(r10)
+    stw r12, 132(r10)
+    stw r12, 136(r10)
+    stw r12, 140(r10)
+    stw r12, 144(r10)
+    stw r12, 148(r10)
+    stw r12, 152(r10)
+    stw r12, 156(r10)
+    stw r12, 160(r10)
+    stw r12, 164(r10)
+    stw r12, 168(r10)
+    stw r12, 172(r10)
+    stw r12, 176(r10)
+    stw r12, 180(r10)
+    stw r12, 184(r10)
+    stw r12, 188(r10)
+    stw r12, 192(r10)
+    stw r12, 196(r10)
+    stw r12, 200(r10)
+    stw r12, 204(r10)
+    stw r11, 208(r10)
+    stw r12, 212(r10)
+    stw r12, 216(r10)
+    stw r12, 220(r10)
+    stw r12, 224(r10)
+    stw r12, 228(r10)
+    stw r12, 232(r10)
+    stw r12, 236(r10)
+    stw r12, 240(r10)
+    stw r12, 244(r10)
+    stw r12, 248(r10)
+    stw r12, 252(r10)
+    add r10, r10, r9
+    stw r12, 0(r10)
+    stw r12, 4(r10)
+    stw r12, 8(r10)
+    stw r12, 12(r10)
+    stw r12, 16(r10)
+    stw r12, 20(r10)
+    stw r12, 24(r10)
+    stw r12, 28(r10)
+    stw r12, 32(r10)
+    stw r12, 36(r10)
+    stw r12, 40(r10)
+    stw r12, 44(r10)
+    stw r12, 48(r10)
+    stw r12, 52(r10)
+    stw r12, 56(r10)
+    stw r12, 60(r10)
+    stw r12, 64(r10)
+    stw r12, 68(r10)
+    stw r12, 72(r10)
+    stw r12, 76(r10)
+    stw r12, 80(r10)
+    stw r12, 84(r10)
+    stw r12, 88(r10)
+    stw r12, 92(r10)
+    stw r12, 96(r10)
+    stw r12, 100(r10)
+    stw r12, 104(r10)
+    stw r12, 108(r10)
+    stw r12, 112(r10)
+    stw r12, 116(r10)
+    stw r12, 120(r10)
+    stw r12, 124(r10)
+    stw r12, 128(r10)
+    stw r12, 132(r10)
+    stw r12, 136(r10)
+    stw r12, 140(r10)
+    stw r12, 144(r10)
+    stw r12, 148(r10)
+    stw r12, 152(r10)
+    stw r12, 156(r10)
+    stw r12, 160(r10)
+    stw r12, 164(r10)
+    stw r12, 168(r10)
+    stw r12, 172(r10)
+    stw r12, 176(r10)
+    stw r12, 180(r10)
+    stw r12, 184(r10)
+    stw r12, 188(r10)
+    stw r12, 192(r10)
+    stw r12, 196(r10)
+    stw r12, 200(r10)
+    stw r11, 204(r10)
+    stw r11, 208(r10)
+    stw r12, 212(r10)
+    stw r12, 216(r10)
+    stw r12, 220(r10)
+    stw r12, 224(r10)
+    stw r12, 228(r10)
+    stw r12, 232(r10)
+    stw r12, 236(r10)
+    stw r12, 240(r10)
+    stw r12, 244(r10)
+    stw r12, 248(r10)
+    stw r12, 252(r10)
+    add r10, r10, r9
+    stw r12, 0(r10)
+    stw r12, 4(r10)
+    stw r12, 8(r10)
+    stw r12, 12(r10)
+    stw r12, 16(r10)
+    stw r12, 20(r10)
+    stw r12, 24(r10)
+    stw r12, 28(r10)
+    stw r12, 32(r10)
+    stw r12, 36(r10)
+    stw r12, 40(r10)
+    stw r12, 44(r10)
+    stw r12, 48(r10)
+    stw r12, 52(r10)
+    stw r12, 56(r10)
+    stw r12, 60(r10)
+    stw r12, 64(r10)
+    stw r12, 68(r10)
+    stw r12, 72(r10)
+    stw r12, 76(r10)
+    stw r12, 80(r10)
+    stw r12, 84(r10)
+    stw r12, 88(r10)
+    stw r12, 92(r10)
+    stw r12, 96(r10)
+    stw r12, 100(r10)
+    stw r12, 104(r10)
+    stw r12, 108(r10)
+    stw r12, 112(r10)
+    stw r12, 116(r10)
+    stw r12, 120(r10)
+    stw r12, 124(r10)
+    stw r12, 128(r10)
+    stw r12, 132(r10)
+    stw r12, 136(r10)
+    stw r12, 140(r10)
+    stw r12, 144(r10)
+    stw r12, 148(r10)
+    stw r12, 152(r10)
+    stw r12, 156(r10)
+    stw r12, 160(r10)
+    stw r12, 164(r10)
+    stw r12, 168(r10)
+    stw r12, 172(r10)
+    stw r12, 176(r10)
+    stw r12, 180(r10)
+    stw r12, 184(r10)
+    stw r12, 188(r10)
+    stw r12, 192(r10)
+    stw r12, 196(r10)
+    stw r12, 200(r10)
+    stw r11, 204(r10)
+    stw r11, 208(r10)
+    stw r12, 212(r10)
+    stw r12, 216(r10)
+    stw r12, 220(r10)
+    stw r12, 224(r10)
+    stw r12, 228(r10)
+    stw r12, 232(r10)
+    stw r12, 236(r10)
+    stw r12, 240(r10)
+    stw r12, 244(r10)
+    stw r12, 248(r10)
+    stw r12, 252(r10)
+    add r10, r10, r9
+    stw r12, 0(r10)
+    stw r12, 4(r10)
+    stw r11, 8(r10)
+    stw r11, 12(r10)
+    stw r11, 16(r10)
+    stw r11, 20(r10)
+    stw r11, 24(r10)
+    stw r12, 28(r10)
+    stw r12, 32(r10)
+    stw r12, 36(r10)
+    stw r11, 40(r10)
+    stw r11, 44(r10)
+    stw r11, 48(r10)
+    stw r11, 52(r10)
+    stw r11, 56(r10)
+    stw r12, 60(r10)
+    stw r12, 64(r10)
+    stw r12, 68(r10)
+    stw r11, 72(r10)
+    stw r11, 76(r10)
+    stw r11, 80(r10)
+    stw r12, 84(r10)
+    stw r11, 88(r10)
+    stw r11, 92(r10)
+    stw r12, 96(r10)
+    stw r11, 100(r10)
+    stw r11, 104(r10)
+    stw r11, 108(r10)
+    stw r12, 112(r10)
+    stw r11, 116(r10)
+    stw r11, 120(r10)
+    stw r12, 124(r10)
+    stw r12, 128(r10)
+    stw r12, 132(r10)
+    stw r11, 136(r10)
+    stw r11, 140(r10)
+    stw r11, 144(r10)
+    stw r11, 148(r10)
+    stw r11, 152(r10)
+    stw r12, 156(r10)
+    stw r12, 160(r10)
+    stw r11, 164(r10)
+    stw r11, 168(r10)
+    stw r12, 172(r10)
+    stw r11, 176(r10)
+    stw r11, 180(r10)
+    stw r11, 184(r10)
+    stw r12, 188(r10)
+    stw r12, 192(r10)
+    stw r11, 196(r10)
+    stw r11, 200(r10)
+    stw r11, 204(r10)
+    stw r11, 208(r10)
+    stw r11, 212(r10)
+    stw r11, 216(r10)
+    stw r12, 220(r10)
+    stw r12, 224(r10)
+    stw r12, 228(r10)
+    stw r11, 232(r10)
+    stw r11, 236(r10)
+    stw r11, 240(r10)
+    stw r11, 244(r10)
+    stw r11, 248(r10)
+    stw r12, 252(r10)
+    add r10, r10, r9
+    stw r12, 0(r10)
+    stw r11, 4(r10)
+    stw r11, 8(r10)
+    stw r12, 12(r10)
+    stw r12, 16(r10)
+    stw r12, 20(r10)
+    stw r11, 24(r10)
+    stw r11, 28(r10)
+    stw r12, 32(r10)
+    stw r11, 36(r10)
+    stw r11, 40(r10)
+    stw r12, 44(r10)
+    stw r12, 48(r10)
+    stw r12, 52(r10)
+    stw r11, 56(r10)
+    stw r11, 60(r10)
+    stw r12, 64(r10)
+    stw r11, 68(r10)
+    stw r11, 72(r10)
+    stw r12, 76(r10)
+    stw r12, 80(r10)
+    stw r11, 84(r10)
+    stw r11, 88(r10)
+    stw r12, 92(r10)
+    stw r12, 96(r10)
+    stw r11, 100(r10)
+    stw r11, 104(r10)
+    stw r11, 108(r10)
+    stw r11, 112(r10)
+    stw r11, 116(r10)
+    stw r11, 120(r10)
+    stw r11, 124(r10)
+    stw r12, 128(r10)
+    stw r11, 132(r10)
+    stw r11, 136(r10)
+    stw r12, 140(r10)
+    stw r12, 144(r10)
+    stw r12, 148(r10)
+    stw r11, 152(r10)
+    stw r11, 156(r10)
+    stw r12, 160(r10)
+    stw r12, 164(r10)
+    stw r11, 168(r10)
+    stw r11, 172(r10)
+    stw r12, 176(r10)
+    stw r12, 180(r10)
+    stw r11, 184(r10)
+    stw r11, 188(r10)
+    stw r12, 192(r10)
+    stw r12, 196(r10)
+    stw r12, 200(r10)
+    stw r11, 204(r10)
+    stw r11, 208(r10)
+    stw r12, 212(r10)
+    stw r12, 216(r10)
+    stw r12, 220(r10)
+    stw r12, 224(r10)
+    stw r11, 228(r10)
+    stw r11, 232(r10)
+    stw r12, 236(r10)
+    stw r12, 240(r10)
+    stw r12, 244(r10)
+    stw r11, 248(r10)
+    stw r11, 252(r10)
+    add r10, r10, r9
+    stw r12, 0(r10)
+    stw r12, 4(r10)
+    stw r11, 8(r10)
+    stw r11, 12(r10)
+    stw r12, 16(r10)
+    stw r12, 20(r10)
+    stw r12, 24(r10)
+    stw r12, 28(r10)
+    stw r12, 32(r10)
+    stw r11, 36(r10)
+    stw r11, 40(r10)
+    stw r11, 44(r10)
+    stw r11, 48(r10)
+    stw r11, 52(r10)
+    stw r11, 56(r10)
+    stw r11, 60(r10)
+    stw r12, 64(r10)
+    stw r11, 68(r10)
+    stw r11, 72(r10)
+    stw r12, 76(r10)
+    stw r12, 80(r10)
+    stw r11, 84(r10)
+    stw r11, 88(r10)
+    stw r12, 92(r10)
+    stw r12, 96(r10)
+    stw r11, 100(r10)
+    stw r11, 104(r10)
+    stw r12, 108(r10)
+    stw r11, 112(r10)
+    stw r12, 116(r10)
+    stw r11, 120(r10)
+    stw r11, 124(r10)
+    stw r12, 128(r10)
+    stw r11, 132(r10)
+    stw r11, 136(r10)
+    stw r11, 140(r10)
+    stw r11, 144(r10)
+    stw r11, 148(r10)
+    stw r11, 152(r10)
+    stw r11, 156(r10)
+    stw r12, 160(r10)
+    stw r12, 164(r10)
+    stw r11, 168(r10)
+    stw r11, 172(r10)
+    stw r12, 176(r10)
+    stw r12, 180(r10)
+    stw r11, 184(r10)
+    stw r11, 188(r10)
+    stw r12, 192(r10)
+    stw r12, 196(r10)
+    stw r12, 200(r10)
+    stw r11, 204(r10)
+    stw r11, 208(r10)
+    stw r12, 212(r10)
+    stw r12, 216(r10)
+    stw r12, 220(r10)
+    stw r12, 224(r10)
+    stw r12, 228(r10)
+    stw r11, 232(r10)
+    stw r11, 236(r10)
+    stw r12, 240(r10)
+    stw r12, 244(r10)
+    stw r12, 248(r10)
+    stw r12, 252(r10)
+    add r10, r10, r9
+    stw r12, 0(r10)
+    stw r12, 4(r10)
+    stw r12, 8(r10)
+    stw r11, 12(r10)
+    stw r11, 16(r10)
+    stw r11, 20(r10)
+    stw r12, 24(r10)
+    stw r12, 28(r10)
+    stw r12, 32(r10)
+    stw r11, 36(r10)
+    stw r11, 40(r10)
+    stw r12, 44(r10)
+    stw r12, 48(r10)
+    stw r12, 52(r10)
+    stw r12, 56(r10)
+    stw r12, 60(r10)
+    stw r12, 64(r10)
+    stw r11, 68(r10)
+    stw r11, 72(r10)
+    stw r12, 76(r10)
+    stw r12, 80(r10)
+    stw r11, 84(r10)
+    stw r11, 88(r10)
+    stw r12, 92(r10)
+    stw r12, 96(r10)
+    stw r11, 100(r10)
+    stw r11, 104(r10)
+    stw r12, 108(r10)
+    stw r11, 112(r10)
+    stw r12, 116(r10)
+    stw r11, 120(r10)
+    stw r11, 124(r10)
+    stw r12, 128(r10)
+    stw r11, 132(r10)
+    stw r11, 136(r10)
+    stw r12, 140(r10)
+    stw r12, 144(r10)
+    stw r12, 148(r10)
+    stw r12, 152(r10)
+    stw r12, 156(r10)
+    stw r12, 160(r10)
+    stw r12, 164(r10)
+    stw r11, 168(r10)
+    stw r11, 172(r10)
+    stw r12, 176(r10)
+    stw r12, 180(r10)
+    stw r11, 184(r10)
+    stw r11, 188(r10)
+    stw r12, 192(r10)
+    stw r12, 196(r10)
+    stw r12, 200(r10)
+    stw r11, 204(r10)
+    stw r11, 208(r10)
+    stw r12, 212(r10)
+    stw r12, 216(r10)
+    stw r12, 220(r10)
+    stw r12, 224(r10)
+    stw r12, 228(r10)
+    stw r12, 232(r10)
+    stw r11, 236(r10)
+    stw r11, 240(r10)
+    stw r11, 244(r10)
+    stw r12, 248(r10)
+    stw r12, 252(r10)
+    add r10, r10, r9
+    stw r12, 0(r10)
+    stw r12, 4(r10)
+    stw r12, 8(r10)
+    stw r12, 12(r10)
+    stw r12, 16(r10)
+    stw r11, 20(r10)
+    stw r11, 24(r10)
+    stw r12, 28(r10)
+    stw r12, 32(r10)
+    stw r11, 36(r10)
+    stw r11, 40(r10)
+    stw r12, 44(r10)
+    stw r12, 48(r10)
+    stw r12, 52(r10)
+    stw r12, 56(r10)
+    stw r12, 60(r10)
+    stw r12, 64(r10)
+    stw r11, 68(r10)
+    stw r11, 72(r10)
+    stw r12, 76(r10)
+    stw r12, 80(r10)
+    stw r11, 84(r10)
+    stw r11, 88(r10)
+    stw r12, 92(r10)
+    stw r12, 96(r10)
+    stw r11, 100(r10)
+    stw r11, 104(r10)
+    stw r12, 108(r10)
+    stw r11, 112(r10)
+    stw r12, 116(r10)
+    stw r11, 120(r10)
+    stw r11, 124(r10)
+    stw r12, 128(r10)
+    stw r11, 132(r10)
+    stw r11, 136(r10)
+    stw r12, 140(r10)
+    stw r12, 144(r10)
+    stw r12, 148(r10)
+    stw r12, 152(r10)
+    stw r12, 156(r10)
+    stw r12, 160(r10)
+    stw r12, 164(r10)
+    stw r11, 168(r10)
+    stw r11, 172(r10)
+    stw r12, 176(r10)
+    stw r12, 180(r10)
+    stw r11, 184(r10)
+    stw r11, 188(r10)
+    stw r12, 192(r10)
+    stw r12, 196(r10)
+    stw r12, 200(r10)
+    stw r11, 204(r10)
+    stw r11, 208(r10)
+    stw r12, 212(r10)
+    stw r12, 216(r10)
+    stw r12, 220(r10)
+    stw r12, 224(r10)
+    stw r12, 228(r10)
+    stw r12, 232(r10)
+    stw r12, 236(r10)
+    stw r12, 240(r10)
+    stw r11, 244(r10)
+    stw r11, 248(r10)
+    stw r12, 252(r10)
+    add r10, r10, r9
+    stw r12, 0(r10)
+    stw r11, 4(r10)
+    stw r11, 8(r10)
+    stw r12, 12(r10)
+    stw r12, 16(r10)
+    stw r12, 20(r10)
+    stw r11, 24(r10)
+    stw r11, 28(r10)
+    stw r12, 32(r10)
+    stw r11, 36(r10)
+    stw r11, 40(r10)
+    stw r12, 44(r10)
+    stw r12, 48(r10)
+    stw r12, 52(r10)
+    stw r11, 56(r10)
+    stw r11, 60(r10)
+    stw r12, 64(r10)
+    stw r11, 68(r10)
+    stw r11, 72(r10)
+    stw r12, 76(r10)
+    stw r12, 80(r10)
+    stw r11, 84(r10)
+    stw r11, 88(r10)
+    stw r12, 92(r10)
+    stw r12, 96(r10)
+    stw r11, 100(r10)
+    stw r11, 104(r10)
+    stw r12, 108(r10)
+    stw r11, 112(r10)
+    stw r12, 116(r10)
+    stw r11, 120(r10)
+    stw r11, 124(r10)
+    stw r12, 128(r10)
+    stw r11, 132(r10)
+    stw r11, 136(r10)
+    stw r12, 140(r10)
+    stw r12, 144(r10)
+    stw r12, 148(r10)
+    stw r11, 152(r10)
+    stw r11, 156(r10)
+    stw r12, 160(r10)
+    stw r12, 164(r10)
+    stw r11, 168(r10)
+    stw r11, 172(r10)
+    stw r12, 176(r10)
+    stw r12, 180(r10)
+    stw r11, 184(r10)
+    stw r11, 188(r10)
+    stw r12, 192(r10)
+    stw r12, 196(r10)
+    stw r12, 200(r10)
+    stw r11, 204(r10)
+    stw r11, 208(r10)
+    stw r12, 212(r10)
+    stw r11, 216(r10)
+    stw r11, 220(r10)
+    stw r12, 224(r10)
+    stw r11, 228(r10)
+    stw r11, 232(r10)
+    stw r12, 236(r10)
+    stw r12, 240(r10)
+    stw r12, 244(r10)
+    stw r11, 248(r10)
+    stw r11, 252(r10)
+    add r10, r10, r9
+    stw r12, 0(r10)
+    stw r12, 4(r10)
+    stw r11, 8(r10)
+    stw r11, 12(r10)
+    stw r11, 16(r10)
+    stw r11, 20(r10)
+    stw r11, 24(r10)
+    stw r12, 28(r10)
+    stw r12, 32(r10)
+    stw r12, 36(r10)
+    stw r11, 40(r10)
+    stw r11, 44(r10)
+    stw r11, 48(r10)
+    stw r11, 52(r10)
+    stw r11, 56(r10)
+    stw r12, 60(r10)
+    stw r12, 64(r10)
+    stw r12, 68(r10)
+    stw r11, 72(r10)
+    stw r11, 76(r10)
+    stw r11, 80(r10)
+    stw r11, 84(r10)
+    stw r11, 88(r10)
+    stw r12, 92(r10)
+    stw r12, 96(r10)
+    stw r11, 100(r10)
+    stw r11, 104(r10)
+    stw r12, 108(r10)
+    stw r12, 112(r10)
+    stw r12, 116(r10)
+    stw r11, 120(r10)
+    stw r11, 124(r10)
+    stw r12, 128(r10)
+    stw r12, 132(r10)
+    stw r11, 136(r10)
+    stw r11, 140(r10)
+    stw r11, 144(r10)
+    stw r11, 148(r10)
+    stw r11, 152(r10)
+    stw r12, 156(r10)
+    stw r12, 160(r10)
+    stw r12, 164(r10)
+    stw r11, 168(r10)
+    stw r11, 172(r10)
+    stw r12, 176(r10)
+    stw r12, 180(r10)
+    stw r11, 184(r10)
+    stw r11, 188(r10)
+    stw r12, 192(r10)
+    stw r12, 196(r10)
+    stw r12, 200(r10)
+    stw r12, 204(r10)
+    stw r11, 208(r10)
+    stw r11, 212(r10)
+    stw r11, 216(r10)
+    stw r12, 220(r10)
+    stw r12, 224(r10)
+    stw r12, 228(r10)
+    stw r11, 232(r10)
+    stw r11, 236(r10)
+    stw r11, 240(r10)
+    stw r11, 244(r10)
+    stw r11, 248(r10)
+    stw r12, 252(r10)
+    add r10, r10, r9
+    stw r12, 0(r10)
+    stw r12, 4(r10)
+    stw r12, 8(r10)
+    stw r12, 12(r10)
+    stw r12, 16(r10)
+    stw r12, 20(r10)
+    stw r12, 24(r10)
+    stw r12, 28(r10)
+    stw r12, 32(r10)
+    stw r12, 36(r10)
+    stw r12, 40(r10)
+    stw r12, 44(r10)
+    stw r12, 48(r10)
+    stw r12, 52(r10)
+    stw r12, 56(r10)
+    stw r12, 60(r10)
+    stw r12, 64(r10)
+    stw r12, 68(r10)
+    stw r12, 72(r10)
+    stw r12, 76(r10)
+    stw r12, 80(r10)
+    stw r11, 84(r10)
+    stw r11, 88(r10)
+    stw r12, 92(r10)
+    stw r12, 96(r10)
+    stw r12, 100(r10)
+    stw r12, 104(r10)
+    stw r12, 108(r10)
+    stw r12, 112(r10)
+    stw r12, 116(r10)
+    stw r12, 120(r10)
+    stw r12, 124(r10)
+    stw r12, 128(r10)
+    stw r12, 132(r10)
+    stw r12, 136(r10)
+    stw r12, 140(r10)
+    stw r12, 144(r10)
+    stw r12, 148(r10)
+    stw r12, 152(r10)
+    stw r12, 156(r10)
+    stw r12, 160(r10)
+    stw r12, 164(r10)
+    stw r12, 168(r10)
+    stw r12, 172(r10)
+    stw r12, 176(r10)
+    stw r12, 180(r10)
+    stw r12, 184(r10)
+    stw r12, 188(r10)
+    stw r12, 192(r10)
+    stw r12, 196(r10)
+    stw r12, 200(r10)
+    stw r12, 204(r10)
+    stw r12, 208(r10)
+    stw r12, 212(r10)
+    stw r12, 216(r10)
+    stw r12, 220(r10)
+    stw r12, 224(r10)
+    stw r12, 228(r10)
+    stw r12, 232(r10)
+    stw r12, 236(r10)
+    stw r12, 240(r10)
+    stw r12, 244(r10)
+    stw r12, 248(r10)
+    stw r12, 252(r10)
+    add r10, r10, r9
+    stw r12, 0(r10)
+    stw r12, 4(r10)
+    stw r12, 8(r10)
+    stw r12, 12(r10)
+    stw r12, 16(r10)
+    stw r12, 20(r10)
+    stw r12, 24(r10)
+    stw r12, 28(r10)
+    stw r12, 32(r10)
+    stw r12, 36(r10)
+    stw r12, 40(r10)
+    stw r12, 44(r10)
+    stw r12, 48(r10)
+    stw r12, 52(r10)
+    stw r12, 56(r10)
+    stw r12, 60(r10)
+    stw r12, 64(r10)
+    stw r11, 68(r10)
+    stw r11, 72(r10)
+    stw r12, 76(r10)
+    stw r12, 80(r10)
+    stw r11, 84(r10)
+    stw r11, 88(r10)
+    stw r12, 92(r10)
+    stw r12, 96(r10)
+    stw r12, 100(r10)
+    stw r12, 104(r10)
+    stw r12, 108(r10)
+    stw r12, 112(r10)
+    stw r12, 116(r10)
+    stw r12, 120(r10)
+    stw r12, 124(r10)
+    stw r12, 128(r10)
+    stw r12, 132(r10)
+    stw r12, 136(r10)
+    stw r12, 140(r10)
+    stw r12, 144(r10)
+    stw r12, 148(r10)
+    stw r12, 152(r10)
+    stw r12, 156(r10)
+    stw r12, 160(r10)
+    stw r12, 164(r10)
+    stw r12, 168(r10)
+    stw r12, 172(r10)
+    stw r12, 176(r10)
+    stw r12, 180(r10)
+    stw r12, 184(r10)
+    stw r12, 188(r10)
+    stw r12, 192(r10)
+    stw r12, 196(r10)
+    stw r12, 200(r10)
+    stw r12, 204(r10)
+    stw r12, 208(r10)
+    stw r12, 212(r10)
+    stw r12, 216(r10)
+    stw r12, 220(r10)
+    stw r12, 224(r10)
+    stw r12, 228(r10)
+    stw r12, 232(r10)
+    stw r12, 236(r10)
+    stw r12, 240(r10)
+    stw r12, 244(r10)
+    stw r12, 248(r10)
+    stw r12, 252(r10)
+    add r10, r10, r9
+    stw r12, 0(r10)
+    stw r12, 4(r10)
+    stw r12, 8(r10)
+    stw r12, 12(r10)
+    stw r12, 16(r10)
+    stw r12, 20(r10)
+    stw r12, 24(r10)
+    stw r12, 28(r10)
+    stw r12, 32(r10)
+    stw r12, 36(r10)
+    stw r12, 40(r10)
+    stw r12, 44(r10)
+    stw r12, 48(r10)
+    stw r12, 52(r10)
+    stw r12, 56(r10)
+    stw r12, 60(r10)
+    stw r12, 64(r10)
+    stw r12, 68(r10)
+    stw r11, 72(r10)
+    stw r11, 76(r10)
+    stw r11, 80(r10)
+    stw r11, 84(r10)
+    stw r12, 88(r10)
+    stw r12, 92(r10)
+    stw r12, 96(r10)
+    stw r12, 100(r10)
+    stw r12, 104(r10)
+    stw r12, 108(r10)
+    stw r12, 112(r10)
+    stw r12, 116(r10)
+    stw r12, 120(r10)
+    stw r12, 124(r10)
+    stw r12, 128(r10)
+    stw r12, 132(r10)
+    stw r12, 136(r10)
+    stw r12, 140(r10)
+    stw r12, 144(r10)
+    stw r12, 148(r10)
+    stw r12, 152(r10)
+    stw r12, 156(r10)
+    stw r12, 160(r10)
+    stw r12, 164(r10)
+    stw r12, 168(r10)
+    stw r12, 172(r10)
+    stw r12, 176(r10)
+    stw r12, 180(r10)
+    stw r12, 184(r10)
+    stw r12, 188(r10)
+    stw r12, 192(r10)
+    stw r12, 196(r10)
+    stw r12, 200(r10)
+    stw r12, 204(r10)
+    stw r12, 208(r10)
+    stw r12, 212(r10)
+    stw r12, 216(r10)
+    stw r12, 220(r10)
+    stw r12, 224(r10)
+    stw r12, 228(r10)
+    stw r12, 232(r10)
+    stw r12, 236(r10)
+    stw r12, 240(r10)
+    stw r12, 244(r10)
+    stw r12, 248(r10)
+    stw r12, 252(r10)
+    add r10, r10, r9
+    stw r12, 0(r10)
+    stw r12, 4(r10)
+    stw r12, 8(r10)
+    stw r12, 12(r10)
+    stw r12, 16(r10)
+    stw r12, 20(r10)
+    stw r12, 24(r10)
+    stw r12, 28(r10)
+    stw r12, 32(r10)
+    stw r12, 36(r10)
+    stw r12, 40(r10)
+    stw r12, 44(r10)
+    stw r12, 48(r10)
+    stw r12, 52(r10)
+    stw r12, 56(r10)
+    stw r12, 60(r10)
+    stw r12, 64(r10)
+    stw r12, 68(r10)
+    stw r12, 72(r10)
+    stw r12, 76(r10)
+    stw r12, 80(r10)
+    stw r12, 84(r10)
+    stw r12, 88(r10)
+    stw r12, 92(r10)
+    stw r12, 96(r10)
+    stw r12, 100(r10)
+    stw r12, 104(r10)
+    stw r12, 108(r10)
+    stw r12, 112(r10)
+    stw r12, 116(r10)
+    stw r12, 120(r10)
+    stw r12, 124(r10)
+    stw r12, 128(r10)
+    stw r12, 132(r10)
+    stw r12, 136(r10)
+    stw r12, 140(r10)
+    stw r12, 144(r10)
+    stw r12, 148(r10)
+    stw r12, 152(r10)
+    stw r12, 156(r10)
+    stw r12, 160(r10)
+    stw r12, 164(r10)
+    stw r12, 168(r10)
+    stw r12, 172(r10)
+    stw r12, 176(r10)
+    stw r12, 180(r10)
+    stw r12, 184(r10)
+    stw r12, 188(r10)
+    stw r12, 192(r10)
+    stw r12, 196(r10)
+    stw r12, 200(r10)
+    stw r12, 204(r10)
+    stw r12, 208(r10)
+    stw r12, 212(r10)
+    stw r12, 216(r10)
+    stw r12, 220(r10)
+    stw r12, 224(r10)
+    stw r12, 228(r10)
+    stw r12, 232(r10)
+    stw r12, 236(r10)
+    stw r12, 240(r10)
+    stw r12, 244(r10)
+    stw r12, 248(r10)
+    stw r12, 252(r10)
+#endif
+.endm
+.macro DEBUG_bat
+#ifdef CONFIG_DEBUG
+    stw r12, 0(r10)
+    stw r12, 4(r10)
+    stw r12, 8(r10)
+    stw r12, 12(r10)
+    stw r12, 16(r10)
+    stw r12, 20(r10)
+    stw r12, 24(r10)
+    stw r12, 28(r10)
+    stw r12, 32(r10)
+    stw r12, 36(r10)
+    stw r12, 40(r10)
+    stw r12, 44(r10)
+    stw r12, 48(r10)
+    stw r12, 52(r10)
+    stw r12, 56(r10)
+    stw r12, 60(r10)
+    stw r12, 64(r10)
+    stw r12, 68(r10)
+    stw r12, 72(r10)
+    stw r12, 76(r10)
+    stw r12, 80(r10)
+    stw r12, 84(r10)
+    stw r12, 88(r10)
+    stw r12, 92(r10)
+    add r10, r10, r9
+    stw r12, 0(r10)
+    stw r12, 4(r10)
+    stw r12, 8(r10)
+    stw r12, 12(r10)
+    stw r12, 16(r10)
+    stw r12, 20(r10)
+    stw r12, 24(r10)
+    stw r12, 28(r10)
+    stw r12, 32(r10)
+    stw r12, 36(r10)
+    stw r12, 40(r10)
+    stw r12, 44(r10)
+    stw r12, 48(r10)
+    stw r12, 52(r10)
+    stw r12, 56(r10)
+    stw r12, 60(r10)
+    stw r12, 64(r10)
+    stw r12, 68(r10)
+    stw r12, 72(r10)
+    stw r12, 76(r10)
+    stw r12, 80(r10)
+    stw r12, 84(r10)
+    stw r12, 88(r10)
+    stw r12, 92(r10)
+    add r10, r10, r9
+    stw r12, 0(r10)
+    stw r11, 4(r10)
+    stw r11, 8(r10)
+    stw r11, 12(r10)
+    stw r12, 16(r10)
+    stw r12, 20(r10)
+    stw r12, 24(r10)
+    stw r12, 28(r10)
+    stw r12, 32(r10)
+    stw r12, 36(r10)
+    stw r12, 40(r10)
+    stw r12, 44(r10)
+    stw r12, 48(r10)
+    stw r12, 52(r10)
+    stw r12, 56(r10)
+    stw r12, 60(r10)
+    stw r12, 64(r10)
+    stw r12, 68(r10)
+    stw r12, 72(r10)
+    stw r12, 76(r10)
+    stw r11, 80(r10)
+    stw r12, 84(r10)
+    stw r12, 88(r10)
+    stw r12, 92(r10)
+    add r10, r10, r9
+    stw r12, 0(r10)
+    stw r12, 4(r10)
+    stw r11, 8(r10)
+    stw r11, 12(r10)
+    stw r12, 16(r10)
+    stw r12, 20(r10)
+    stw r12, 24(r10)
+    stw r12, 28(r10)
+    stw r12, 32(r10)
+    stw r12, 36(r10)
+    stw r12, 40(r10)
+    stw r12, 44(r10)
+    stw r12, 48(r10)
+    stw r12, 52(r10)
+    stw r12, 56(r10)
+    stw r12, 60(r10)
+    stw r12, 64(r10)
+    stw r12, 68(r10)
+    stw r12, 72(r10)
+    stw r11, 76(r10)
+    stw r11, 80(r10)
+    stw r12, 84(r10)
+    stw r12, 88(r10)
+    stw r12, 92(r10)
+    add r10, r10, r9
+    stw r12, 0(r10)
+    stw r12, 4(r10)
+    stw r11, 8(r10)
+    stw r11, 12(r10)
+    stw r12, 16(r10)
+    stw r12, 20(r10)
+    stw r12, 24(r10)
+    stw r12, 28(r10)
+    stw r12, 32(r10)
+    stw r12, 36(r10)
+    stw r12, 40(r10)
+    stw r12, 44(r10)
+    stw r12, 48(r10)
+    stw r12, 52(r10)
+    stw r12, 56(r10)
+    stw r12, 60(r10)
+    stw r12, 64(r10)
+    stw r12, 68(r10)
+    stw r12, 72(r10)
+    stw r11, 76(r10)
+    stw r11, 80(r10)
+    stw r12, 84(r10)
+    stw r12, 88(r10)
+    stw r12, 92(r10)
+    add r10, r10, r9
+    stw r12, 0(r10)
+    stw r12, 4(r10)
+    stw r11, 8(r10)
+    stw r11, 12(r10)
+    stw r11, 16(r10)
+    stw r11, 20(r10)
+    stw r12, 24(r10)
+    stw r12, 28(r10)
+    stw r12, 32(r10)
+    stw r12, 36(r10)
+    stw r11, 40(r10)
+    stw r11, 44(r10)
+    stw r11, 48(r10)
+    stw r11, 52(r10)
+    stw r12, 56(r10)
+    stw r12, 60(r10)
+    stw r12, 64(r10)
+    stw r11, 68(r10)
+    stw r11, 72(r10)
+    stw r11, 76(r10)
+    stw r11, 80(r10)
+    stw r11, 84(r10)
+    stw r11, 88(r10)
+    stw r12, 92(r10)
+    add r10, r10, r9
+    stw r12, 0(r10)
+    stw r12, 4(r10)
+    stw r11, 8(r10)
+    stw r11, 12(r10)
+    stw r12, 16(r10)
+    stw r11, 20(r10)
+    stw r11, 24(r10)
+    stw r12, 28(r10)
+    stw r12, 32(r10)
+    stw r12, 36(r10)
+    stw r12, 40(r10)
+    stw r12, 44(r10)
+    stw r12, 48(r10)
+    stw r11, 52(r10)
+    stw r11, 56(r10)
+    stw r12, 60(r10)
+    stw r12, 64(r10)
+    stw r12, 68(r10)
+    stw r12, 72(r10)
+    stw r11, 76(r10)
+    stw r11, 80(r10)
+    stw r12, 84(r10)
+    stw r12, 88(r10)
+    stw r12, 92(r10)
+    add r10, r10, r9
+    stw r12, 0(r10)
+    stw r12, 4(r10)
+    stw r11, 8(r10)
+    stw r11, 12(r10)
+    stw r12, 16(r10)
+    stw r12, 20(r10)
+    stw r11, 24(r10)
+    stw r11, 28(r10)
+    stw r12, 32(r10)
+    stw r12, 36(r10)
+    stw r11, 40(r10)
+    stw r11, 44(r10)
+    stw r11, 48(r10)
+    stw r11, 52(r10)
+    stw r11, 56(r10)
+    stw r12, 60(r10)
+    stw r12, 64(r10)
+    stw r12, 68(r10)
+    stw r12, 72(r10)
+    stw r11, 76(r10)
+    stw r11, 80(r10)
+    stw r12, 84(r10)
+    stw r12, 88(r10)
+    stw r12, 92(r10)
+    add r10, r10, r9
+    stw r12, 0(r10)
+    stw r12, 4(r10)
+    stw r11, 8(r10)
+    stw r11, 12(r10)
+    stw r12, 16(r10)
+    stw r12, 20(r10)
+    stw r11, 24(r10)
+    stw r11, 28(r10)
+    stw r12, 32(r10)
+    stw r11, 36(r10)
+    stw r11, 40(r10)
+    stw r12, 44(r10)
+    stw r12, 48(r10)
+    stw r11, 52(r10)
+    stw r11, 56(r10)
+    stw r12, 60(r10)
+    stw r12, 64(r10)
+    stw r12, 68(r10)
+    stw r12, 72(r10)
+    stw r11, 76(r10)
+    stw r11, 80(r10)
+    stw r12, 84(r10)
+    stw r12, 88(r10)
+    stw r12, 92(r10)
+    add r10, r10, r9
+    stw r12, 0(r10)
+    stw r12, 4(r10)
+    stw r11, 8(r10)
+    stw r11, 12(r10)
+    stw r12, 16(r10)
+    stw r12, 20(r10)
+    stw r11, 24(r10)
+    stw r11, 28(r10)
+    stw r12, 32(r10)
+    stw r11, 36(r10)
+    stw r11, 40(r10)
+    stw r12, 44(r10)
+    stw r12, 48(r10)
+    stw r11, 52(r10)
+    stw r11, 56(r10)
+    stw r12, 60(r10)
+    stw r12, 64(r10)
+    stw r12, 68(r10)
+    stw r12, 72(r10)
+    stw r11, 76(r10)
+    stw r11, 80(r10)
+    stw r12, 84(r10)
+    stw r12, 88(r10)
+    stw r12, 92(r10)
+    add r10, r10, r9
+    stw r12, 0(r10)
+    stw r12, 4(r10)
+    stw r11, 8(r10)
+    stw r11, 12(r10)
+    stw r12, 16(r10)
+    stw r12, 20(r10)
+    stw r11, 24(r10)
+    stw r11, 28(r10)
+    stw r12, 32(r10)
+    stw r11, 36(r10)
+    stw r11, 40(r10)
+    stw r12, 44(r10)
+    stw r12, 48(r10)
+    stw r11, 52(r10)
+    stw r11, 56(r10)
+    stw r12, 60(r10)
+    stw r12, 64(r10)
+    stw r12, 68(r10)
+    stw r12, 72(r10)
+    stw r11, 76(r10)
+    stw r11, 80(r10)
+    stw r12, 84(r10)
+    stw r11, 88(r10)
+    stw r11, 92(r10)
+    add r10, r10, r9
+    stw r12, 0(r10)
+    stw r12, 4(r10)
+    stw r11, 8(r10)
+    stw r11, 12(r10)
+    stw r11, 16(r10)
+    stw r11, 20(r10)
+    stw r11, 24(r10)
+    stw r12, 28(r10)
+    stw r12, 32(r10)
+    stw r12, 36(r10)
+    stw r11, 40(r10)
+    stw r11, 44(r10)
+    stw r11, 48(r10)
+    stw r12, 52(r10)
+    stw r11, 56(r10)
+    stw r11, 60(r10)
+    stw r12, 64(r10)
+    stw r12, 68(r10)
+    stw r12, 72(r10)
+    stw r12, 76(r10)
+    stw r11, 80(r10)
+    stw r11, 84(r10)
+    stw r11, 88(r10)
+    stw r12, 92(r10)
+    add r10, r10, r9
+    stw r12, 0(r10)
+    stw r12, 4(r10)
+    stw r12, 8(r10)
+    stw r12, 12(r10)
+    stw r12, 16(r10)
+    stw r12, 20(r10)
+    stw r12, 24(r10)
+    stw r12, 28(r10)
+    stw r12, 32(r10)
+    stw r12, 36(r10)
+    stw r12, 40(r10)
+    stw r12, 44(r10)
+    stw r12, 48(r10)
+    stw r12, 52(r10)
+    stw r12, 56(r10)
+    stw r12, 60(r10)
+    stw r12, 64(r10)
+    stw r12, 68(r10)
+    stw r12, 72(r10)
+    stw r12, 76(r10)
+    stw r12, 80(r10)
+    stw r12, 84(r10)
+    stw r12, 88(r10)
+    stw r12, 92(r10)
+    add r10, r10, r9
+    stw r12, 0(r10)
+    stw r12, 4(r10)
+    stw r12, 8(r10)
+    stw r12, 12(r10)
+    stw r12, 16(r10)
+    stw r12, 20(r10)
+    stw r12, 24(r10)
+    stw r12, 28(r10)
+    stw r12, 32(r10)
+    stw r12, 36(r10)
+    stw r12, 40(r10)
+    stw r12, 44(r10)
+    stw r12, 48(r10)
+    stw r12, 52(r10)
+    stw r12, 56(r10)
+    stw r12, 60(r10)
+    stw r12, 64(r10)
+    stw r12, 68(r10)
+    stw r12, 72(r10)
+    stw r12, 76(r10)
+    stw r12, 80(r10)
+    stw r12, 84(r10)
+    stw r12, 88(r10)
+    stw r12, 92(r10)
+    add r10, r10, r9
+    stw r12, 0(r10)
+    stw r12, 4(r10)
+    stw r12, 8(r10)
+    stw r12, 12(r10)
+    stw r12, 16(r10)
+    stw r12, 20(r10)
+    stw r12, 24(r10)
+    stw r12, 28(r10)
+    stw r12, 32(r10)
+    stw r12, 36(r10)
+    stw r12, 40(r10)
+    stw r12, 44(r10)
+    stw r12, 48(r10)
+    stw r12, 52(r10)
+    stw r12, 56(r10)
+    stw r12, 60(r10)
+    stw r12, 64(r10)
+    stw r12, 68(r10)
+    stw r12, 72(r10)
+    stw r12, 76(r10)
+    stw r12, 80(r10)
+    stw r12, 84(r10)
+    stw r12, 88(r10)
+    stw r12, 92(r10)
+    add r10, r10, r9
+    stw r12, 0(r10)
+    stw r12, 4(r10)
+    stw r12, 8(r10)
+    stw r12, 12(r10)
+    stw r12, 16(r10)
+    stw r12, 20(r10)
+    stw r12, 24(r10)
+    stw r12, 28(r10)
+    stw r12, 32(r10)
+    stw r12, 36(r10)
+    stw r12, 40(r10)
+    stw r12, 44(r10)
+    stw r12, 48(r10)
+    stw r12, 52(r10)
+    stw r12, 56(r10)
+    stw r12, 60(r10)
+    stw r12, 64(r10)
+    stw r12, 68(r10)
+    stw r12, 72(r10)
+    stw r12, 76(r10)
+    stw r12, 80(r10)
+    stw r12, 84(r10)
+    stw r12, 88(r10)
+    stw r12, 92(r10)
+#endif
+.endm
+.macro DEBUG_mapping
+#ifdef CONFIG_DEBUG
+    stw r12, 0(r10)
+    stw r12, 4(r10)
+    stw r12, 8(r10)
+    stw r12, 12(r10)
+    stw r12, 16(r10)
+    stw r12, 20(r10)
+    stw r12, 24(r10)
+    stw r12, 28(r10)
+    stw r12, 32(r10)
+    stw r12, 36(r10)
+    stw r12, 40(r10)
+    stw r12, 44(r10)
+    stw r12, 48(r10)
+    stw r12, 52(r10)
+    stw r12, 56(r10)
+    stw r12, 60(r10)
+    stw r12, 64(r10)
+    stw r12, 68(r10)
+    stw r12, 72(r10)
+    stw r12, 76(r10)
+    stw r12, 80(r10)
+    stw r12, 84(r10)
+    stw r12, 88(r10)
+    stw r12, 92(r10)
+    stw r12, 96(r10)
+    stw r12, 100(r10)
+    stw r12, 104(r10)
+    stw r12, 108(r10)
+    stw r12, 112(r10)
+    stw r12, 116(r10)
+    stw r12, 120(r10)
+    stw r12, 124(r10)
+    stw r12, 128(r10)
+    stw r12, 132(r10)
+    stw r12, 136(r10)
+    stw r12, 140(r10)
+    stw r12, 144(r10)
+    stw r12, 148(r10)
+    stw r12, 152(r10)
+    stw r12, 156(r10)
+    stw r12, 160(r10)
+    stw r12, 164(r10)
+    stw r12, 168(r10)
+    stw r12, 172(r10)
+    stw r12, 176(r10)
+    stw r12, 180(r10)
+    stw r12, 184(r10)
+    stw r12, 188(r10)
+    stw r12, 192(r10)
+    stw r12, 196(r10)
+    stw r12, 200(r10)
+    stw r12, 204(r10)
+    stw r12, 208(r10)
+    stw r12, 212(r10)
+    stw r12, 216(r10)
+    stw r12, 220(r10)
+    add r10, r10, r9
+    stw r12, 0(r10)
+    stw r12, 4(r10)
+    stw r12, 8(r10)
+    stw r12, 12(r10)
+    stw r12, 16(r10)
+    stw r12, 20(r10)
+    stw r12, 24(r10)
+    stw r12, 28(r10)
+    stw r12, 32(r10)
+    stw r12, 36(r10)
+    stw r12, 40(r10)
+    stw r12, 44(r10)
+    stw r12, 48(r10)
+    stw r12, 52(r10)
+    stw r12, 56(r10)
+    stw r12, 60(r10)
+    stw r12, 64(r10)
+    stw r12, 68(r10)
+    stw r12, 72(r10)
+    stw r12, 76(r10)
+    stw r12, 80(r10)
+    stw r12, 84(r10)
+    stw r12, 88(r10)
+    stw r12, 92(r10)
+    stw r12, 96(r10)
+    stw r12, 100(r10)
+    stw r12, 104(r10)
+    stw r12, 108(r10)
+    stw r12, 112(r10)
+    stw r12, 116(r10)
+    stw r12, 120(r10)
+    stw r12, 124(r10)
+    stw r12, 128(r10)
+    stw r12, 132(r10)
+    stw r12, 136(r10)
+    stw r12, 140(r10)
+    stw r12, 144(r10)
+    stw r12, 148(r10)
+    stw r12, 152(r10)
+    stw r12, 156(r10)
+    stw r12, 160(r10)
+    stw r12, 164(r10)
+    stw r12, 168(r10)
+    stw r12, 172(r10)
+    stw r12, 176(r10)
+    stw r12, 180(r10)
+    stw r12, 184(r10)
+    stw r12, 188(r10)
+    stw r12, 192(r10)
+    stw r12, 196(r10)
+    stw r12, 200(r10)
+    stw r12, 204(r10)
+    stw r12, 208(r10)
+    stw r12, 212(r10)
+    stw r12, 216(r10)
+    stw r12, 220(r10)
+    add r10, r10, r9
+    stw r12, 0(r10)
+    stw r12, 4(r10)
+    stw r12, 8(r10)
+    stw r12, 12(r10)
+    stw r12, 16(r10)
+    stw r12, 20(r10)
+    stw r12, 24(r10)
+    stw r12, 28(r10)
+    stw r12, 32(r10)
+    stw r12, 36(r10)
+    stw r12, 40(r10)
+    stw r12, 44(r10)
+    stw r12, 48(r10)
+    stw r12, 52(r10)
+    stw r12, 56(r10)
+    stw r12, 60(r10)
+    stw r12, 64(r10)
+    stw r12, 68(r10)
+    stw r12, 72(r10)
+    stw r12, 76(r10)
+    stw r12, 80(r10)
+    stw r12, 84(r10)
+    stw r12, 88(r10)
+    stw r12, 92(r10)
+    stw r12, 96(r10)
+    stw r12, 100(r10)
+    stw r12, 104(r10)
+    stw r12, 108(r10)
+    stw r12, 112(r10)
+    stw r12, 116(r10)
+    stw r12, 120(r10)
+    stw r12, 124(r10)
+    stw r12, 128(r10)
+    stw r12, 132(r10)
+    stw r12, 136(r10)
+    stw r12, 140(r10)
+    stw r11, 144(r10)
+    stw r11, 148(r10)
+    stw r12, 152(r10)
+    stw r12, 156(r10)
+    stw r12, 160(r10)
+    stw r12, 164(r10)
+    stw r12, 168(r10)
+    stw r12, 172(r10)
+    stw r12, 176(r10)
+    stw r12, 180(r10)
+    stw r12, 184(r10)
+    stw r12, 188(r10)
+    stw r12, 192(r10)
+    stw r12, 196(r10)
+    stw r12, 200(r10)
+    stw r12, 204(r10)
+    stw r12, 208(r10)
+    stw r12, 212(r10)
+    stw r12, 216(r10)
+    stw r12, 220(r10)
+    add r10, r10, r9
+    stw r12, 0(r10)
+    stw r12, 4(r10)
+    stw r12, 8(r10)
+    stw r12, 12(r10)
+    stw r12, 16(r10)
+    stw r12, 20(r10)
+    stw r12, 24(r10)
+    stw r12, 28(r10)
+    stw r12, 32(r10)
+    stw r12, 36(r10)
+    stw r12, 40(r10)
+    stw r12, 44(r10)
+    stw r12, 48(r10)
+    stw r12, 52(r10)
+    stw r12, 56(r10)
+    stw r12, 60(r10)
+    stw r12, 64(r10)
+    stw r12, 68(r10)
+    stw r12, 72(r10)
+    stw r12, 76(r10)
+    stw r12, 80(r10)
+    stw r12, 84(r10)
+    stw r12, 88(r10)
+    stw r12, 92(r10)
+    stw r12, 96(r10)
+    stw r12, 100(r10)
+    stw r12, 104(r10)
+    stw r12, 108(r10)
+    stw r12, 112(r10)
+    stw r12, 116(r10)
+    stw r12, 120(r10)
+    stw r12, 124(r10)
+    stw r12, 128(r10)
+    stw r12, 132(r10)
+    stw r12, 136(r10)
+    stw r12, 140(r10)
+    stw r11, 144(r10)
+    stw r11, 148(r10)
+    stw r12, 152(r10)
+    stw r12, 156(r10)
+    stw r12, 160(r10)
+    stw r12, 164(r10)
+    stw r12, 168(r10)
+    stw r12, 172(r10)
+    stw r12, 176(r10)
+    stw r12, 180(r10)
+    stw r12, 184(r10)
+    stw r12, 188(r10)
+    stw r12, 192(r10)
+    stw r12, 196(r10)
+    stw r12, 200(r10)
+    stw r12, 204(r10)
+    stw r12, 208(r10)
+    stw r12, 212(r10)
+    stw r12, 216(r10)
+    stw r12, 220(r10)
+    add r10, r10, r9
+    stw r12, 0(r10)
+    stw r12, 4(r10)
+    stw r12, 8(r10)
+    stw r12, 12(r10)
+    stw r12, 16(r10)
+    stw r12, 20(r10)
+    stw r12, 24(r10)
+    stw r12, 28(r10)
+    stw r12, 32(r10)
+    stw r12, 36(r10)
+    stw r12, 40(r10)
+    stw r12, 44(r10)
+    stw r12, 48(r10)
+    stw r12, 52(r10)
+    stw r12, 56(r10)
+    stw r12, 60(r10)
+    stw r12, 64(r10)
+    stw r12, 68(r10)
+    stw r12, 72(r10)
+    stw r12, 76(r10)
+    stw r12, 80(r10)
+    stw r12, 84(r10)
+    stw r12, 88(r10)
+    stw r12, 92(r10)
+    stw r12, 96(r10)
+    stw r12, 100(r10)
+    stw r12, 104(r10)
+    stw r12, 108(r10)
+    stw r12, 112(r10)
+    stw r12, 116(r10)
+    stw r12, 120(r10)
+    stw r12, 124(r10)
+    stw r12, 128(r10)
+    stw r12, 132(r10)
+    stw r12, 136(r10)
+    stw r12, 140(r10)
+    stw r12, 144(r10)
+    stw r12, 148(r10)
+    stw r12, 152(r10)
+    stw r12, 156(r10)
+    stw r12, 160(r10)
+    stw r12, 164(r10)
+    stw r12, 168(r10)
+    stw r12, 172(r10)
+    stw r12, 176(r10)
+    stw r12, 180(r10)
+    stw r12, 184(r10)
+    stw r12, 188(r10)
+    stw r12, 192(r10)
+    stw r12, 196(r10)
+    stw r12, 200(r10)
+    stw r12, 204(r10)
+    stw r12, 208(r10)
+    stw r12, 212(r10)
+    stw r12, 216(r10)
+    stw r12, 220(r10)
+    add r10, r10, r9
+    stw r12, 0(r10)
+    stw r11, 4(r10)
+    stw r11, 8(r10)
+    stw r11, 12(r10)
+    stw r12, 16(r10)
+    stw r11, 20(r10)
+    stw r11, 24(r10)
+    stw r12, 28(r10)
+    stw r12, 32(r10)
+    stw r12, 36(r10)
+    stw r11, 40(r10)
+    stw r11, 44(r10)
+    stw r11, 48(r10)
+    stw r11, 52(r10)
+    stw r12, 56(r10)
+    stw r12, 60(r10)
+    stw r12, 64(r10)
+    stw r11, 68(r10)
+    stw r11, 72(r10)
+    stw r12, 76(r10)
+    stw r11, 80(r10)
+    stw r11, 84(r10)
+    stw r11, 88(r10)
+    stw r12, 92(r10)
+    stw r12, 96(r10)
+    stw r11, 100(r10)
+    stw r11, 104(r10)
+    stw r12, 108(r10)
+    stw r11, 112(r10)
+    stw r11, 116(r10)
+    stw r11, 120(r10)
+    stw r12, 124(r10)
+    stw r12, 128(r10)
+    stw r12, 132(r10)
+    stw r12, 136(r10)
+    stw r11, 140(r10)
+    stw r11, 144(r10)
+    stw r11, 148(r10)
+    stw r12, 152(r10)
+    stw r12, 156(r10)
+    stw r12, 160(r10)
+    stw r11, 164(r10)
+    stw r11, 168(r10)
+    stw r12, 172(r10)
+    stw r11, 176(r10)
+    stw r11, 180(r10)
+    stw r11, 184(r10)
+    stw r12, 188(r10)
+    stw r12, 192(r10)
+    stw r12, 196(r10)
+    stw r11, 200(r10)
+    stw r11, 204(r10)
+    stw r11, 208(r10)
+    stw r12, 212(r10)
+    stw r11, 216(r10)
+    stw r11, 220(r10)
+    add r10, r10, r9
+    stw r12, 0(r10)
+    stw r11, 4(r10)
+    stw r11, 8(r10)
+    stw r11, 12(r10)
+    stw r11, 16(r10)
+    stw r11, 20(r10)
+    stw r11, 24(r10)
+    stw r11, 28(r10)
+    stw r12, 32(r10)
+    stw r12, 36(r10)
+    stw r12, 40(r10)
+    stw r12, 44(r10)
+    stw r12, 48(r10)
+    stw r11, 52(r10)
+    stw r11, 56(r10)
+    stw r12, 60(r10)
+    stw r12, 64(r10)
+    stw r12, 68(r10)
+    stw r11, 72(r10)
+    stw r11, 76(r10)
+    stw r12, 80(r10)
+    stw r12, 84(r10)
+    stw r11, 88(r10)
+    stw r11, 92(r10)
+    stw r12, 96(r10)
+    stw r12, 100(r10)
+    stw r11, 104(r10)
+    stw r11, 108(r10)
+    stw r12, 112(r10)
+    stw r12, 116(r10)
+    stw r11, 120(r10)
+    stw r11, 124(r10)
+    stw r12, 128(r10)
+    stw r12, 132(r10)
+    stw r12, 136(r10)
+    stw r12, 140(r10)
+    stw r11, 144(r10)
+    stw r11, 148(r10)
+    stw r12, 152(r10)
+    stw r12, 156(r10)
+    stw r12, 160(r10)
+    stw r12, 164(r10)
+    stw r11, 168(r10)
+    stw r11, 172(r10)
+    stw r12, 176(r10)
+    stw r12, 180(r10)
+    stw r11, 184(r10)
+    stw r11, 188(r10)
+    stw r12, 192(r10)
+    stw r11, 196(r10)
+    stw r11, 200(r10)
+    stw r12, 204(r10)
+    stw r12, 208(r10)
+    stw r11, 212(r10)
+    stw r11, 216(r10)
+    stw r12, 220(r10)
+    add r10, r10, r9
+    stw r12, 0(r10)
+    stw r11, 4(r10)
+    stw r11, 8(r10)
+    stw r12, 12(r10)
+    stw r11, 16(r10)
+    stw r12, 20(r10)
+    stw r11, 24(r10)
+    stw r11, 28(r10)
+    stw r12, 32(r10)
+    stw r12, 36(r10)
+    stw r11, 40(r10)
+    stw r11, 44(r10)
+    stw r11, 48(r10)
+    stw r11, 52(r10)
+    stw r11, 56(r10)
+    stw r12, 60(r10)
+    stw r12, 64(r10)
+    stw r12, 68(r10)
+    stw r11, 72(r10)
+    stw r11, 76(r10)
+    stw r12, 80(r10)
+    stw r12, 84(r10)
+    stw r11, 88(r10)
+    stw r11, 92(r10)
+    stw r12, 96(r10)
+    stw r12, 100(r10)
+    stw r11, 104(r10)
+    stw r11, 108(r10)
+    stw r12, 112(r10)
+    stw r12, 116(r10)
+    stw r11, 120(r10)
+    stw r11, 124(r10)
+    stw r12, 128(r10)
+    stw r12, 132(r10)
+    stw r12, 136(r10)
+    stw r12, 140(r10)
+    stw r11, 144(r10)
+    stw r11, 148(r10)
+    stw r12, 152(r10)
+    stw r12, 156(r10)
+    stw r12, 160(r10)
+    stw r12, 164(r10)
+    stw r11, 168(r10)
+    stw r11, 172(r10)
+    stw r12, 176(r10)
+    stw r12, 180(r10)
+    stw r11, 184(r10)
+    stw r11, 188(r10)
+    stw r12, 192(r10)
+    stw r11, 196(r10)
+    stw r11, 200(r10)
+    stw r12, 204(r10)
+    stw r12, 208(r10)
+    stw r11, 212(r10)
+    stw r11, 216(r10)
+    stw r12, 220(r10)
+    add r10, r10, r9
+    stw r12, 0(r10)
+    stw r11, 4(r10)
+    stw r11, 8(r10)
+    stw r12, 12(r10)
+    stw r11, 16(r10)
+    stw r12, 20(r10)
+    stw r11, 24(r10)
+    stw r11, 28(r10)
+    stw r12, 32(r10)
+    stw r11, 36(r10)
+    stw r11, 40(r10)
+    stw r12, 44(r10)
+    stw r12, 48(r10)
+    stw r11, 52(r10)
+    stw r11, 56(r10)
+    stw r12, 60(r10)
+    stw r12, 64(r10)
+    stw r12, 68(r10)
+    stw r11, 72(r10)
+    stw r11, 76(r10)
+    stw r12, 80(r10)
+    stw r12, 84(r10)
+    stw r11, 88(r10)
+    stw r11, 92(r10)
+    stw r12, 96(r10)
+    stw r12, 100(r10)
+    stw r11, 104(r10)
+    stw r11, 108(r10)
+    stw r12, 112(r10)
+    stw r12, 116(r10)
+    stw r11, 120(r10)
+    stw r11, 124(r10)
+    stw r12, 128(r10)
+    stw r12, 132(r10)
+    stw r12, 136(r10)
+    stw r12, 140(r10)
+    stw r11, 144(r10)
+    stw r11, 148(r10)
+    stw r12, 152(r10)
+    stw r12, 156(r10)
+    stw r12, 160(r10)
+    stw r12, 164(r10)
+    stw r11, 168(r10)
+    stw r11, 172(r10)
+    stw r12, 176(r10)
+    stw r12, 180(r10)
+    stw r11, 184(r10)
+    stw r11, 188(r10)
+    stw r12, 192(r10)
+    stw r11, 196(r10)
+    stw r11, 200(r10)
+    stw r12, 204(r10)
+    stw r12, 208(r10)
+    stw r11, 212(r10)
+    stw r11, 216(r10)
+    stw r12, 220(r10)
+    add r10, r10, r9
+    stw r12, 0(r10)
+    stw r11, 4(r10)
+    stw r11, 8(r10)
+    stw r12, 12(r10)
+    stw r11, 16(r10)
+    stw r12, 20(r10)
+    stw r11, 24(r10)
+    stw r11, 28(r10)
+    stw r12, 32(r10)
+    stw r11, 36(r10)
+    stw r11, 40(r10)
+    stw r12, 44(r10)
+    stw r12, 48(r10)
+    stw r11, 52(r10)
+    stw r11, 56(r10)
+    stw r12, 60(r10)
+    stw r12, 64(r10)
+    stw r12, 68(r10)
+    stw r11, 72(r10)
+    stw r11, 76(r10)
+    stw r12, 80(r10)
+    stw r12, 84(r10)
+    stw r11, 88(r10)
+    stw r11, 92(r10)
+    stw r12, 96(r10)
+    stw r12, 100(r10)
+    stw r11, 104(r10)
+    stw r11, 108(r10)
+    stw r12, 112(r10)
+    stw r12, 116(r10)
+    stw r11, 120(r10)
+    stw r11, 124(r10)
+    stw r12, 128(r10)
+    stw r12, 132(r10)
+    stw r12, 136(r10)
+    stw r12, 140(r10)
+    stw r11, 144(r10)
+    stw r11, 148(r10)
+    stw r12, 152(r10)
+    stw r12, 156(r10)
+    stw r12, 160(r10)
+    stw r12, 164(r10)
+    stw r11, 168(r10)
+    stw r11, 172(r10)
+    stw r12, 176(r10)
+    stw r12, 180(r10)
+    stw r11, 184(r10)
+    stw r11, 188(r10)
+    stw r12, 192(r10)
+    stw r11, 196(r10)
+    stw r11, 200(r10)
+    stw r12, 204(r10)
+    stw r12, 208(r10)
+    stw r11, 212(r10)
+    stw r11, 216(r10)
+    stw r12, 220(r10)
+    add r10, r10, r9
+    stw r12, 0(r10)
+    stw r11, 4(r10)
+    stw r11, 8(r10)
+    stw r12, 12(r10)
+    stw r11, 16(r10)
+    stw r12, 20(r10)
+    stw r11, 24(r10)
+    stw r11, 28(r10)
+    stw r12, 32(r10)
+    stw r11, 36(r10)
+    stw r11, 40(r10)
+    stw r12, 44(r10)
+    stw r12, 48(r10)
+    stw r11, 52(r10)
+    stw r11, 56(r10)
+    stw r12, 60(r10)
+    stw r12, 64(r10)
+    stw r12, 68(r10)
+    stw r11, 72(r10)
+    stw r11, 76(r10)
+    stw r12, 80(r10)
+    stw r12, 84(r10)
+    stw r11, 88(r10)
+    stw r11, 92(r10)
+    stw r12, 96(r10)
+    stw r12, 100(r10)
+    stw r11, 104(r10)
+    stw r11, 108(r10)
+    stw r12, 112(r10)
+    stw r12, 116(r10)
+    stw r11, 120(r10)
+    stw r11, 124(r10)
+    stw r12, 128(r10)
+    stw r12, 132(r10)
+    stw r12, 136(r10)
+    stw r12, 140(r10)
+    stw r11, 144(r10)
+    stw r11, 148(r10)
+    stw r12, 152(r10)
+    stw r12, 156(r10)
+    stw r12, 160(r10)
+    stw r12, 164(r10)
+    stw r11, 168(r10)
+    stw r11, 172(r10)
+    stw r12, 176(r10)
+    stw r12, 180(r10)
+    stw r11, 184(r10)
+    stw r11, 188(r10)
+    stw r12, 192(r10)
+    stw r11, 196(r10)
+    stw r11, 200(r10)
+    stw r12, 204(r10)
+    stw r12, 208(r10)
+    stw r11, 212(r10)
+    stw r11, 216(r10)
+    stw r12, 220(r10)
+    add r10, r10, r9
+    stw r12, 0(r10)
+    stw r11, 4(r10)
+    stw r11, 8(r10)
+    stw r12, 12(r10)
+    stw r12, 16(r10)
+    stw r12, 20(r10)
+    stw r11, 24(r10)
+    stw r11, 28(r10)
+    stw r12, 32(r10)
+    stw r12, 36(r10)
+    stw r11, 40(r10)
+    stw r11, 44(r10)
+    stw r11, 48(r10)
+    stw r12, 52(r10)
+    stw r11, 56(r10)
+    stw r11, 60(r10)
+    stw r12, 64(r10)
+    stw r12, 68(r10)
+    stw r11, 72(r10)
+    stw r11, 76(r10)
+    stw r11, 80(r10)
+    stw r11, 84(r10)
+    stw r11, 88(r10)
+    stw r12, 92(r10)
+    stw r12, 96(r10)
+    stw r12, 100(r10)
+    stw r11, 104(r10)
+    stw r11, 108(r10)
+    stw r11, 112(r10)
+    stw r11, 116(r10)
+    stw r11, 120(r10)
+    stw r12, 124(r10)
+    stw r12, 128(r10)
+    stw r12, 132(r10)
+    stw r12, 136(r10)
+    stw r11, 140(r10)
+    stw r11, 144(r10)
+    stw r11, 148(r10)
+    stw r11, 152(r10)
+    stw r12, 156(r10)
+    stw r12, 160(r10)
+    stw r12, 164(r10)
+    stw r11, 168(r10)
+    stw r11, 172(r10)
+    stw r12, 176(r10)
+    stw r12, 180(r10)
+    stw r11, 184(r10)
+    stw r11, 188(r10)
+    stw r12, 192(r10)
+    stw r12, 196(r10)
+    stw r11, 200(r10)
+    stw r11, 204(r10)
+    stw r11, 208(r10)
+    stw r11, 212(r10)
+    stw r11, 216(r10)
+    stw r12, 220(r10)
+    add r10, r10, r9
+    stw r12, 0(r10)
+    stw r12, 4(r10)
+    stw r12, 8(r10)
+    stw r12, 12(r10)
+    stw r12, 16(r10)
+    stw r12, 20(r10)
+    stw r12, 24(r10)
+    stw r12, 28(r10)
+    stw r12, 32(r10)
+    stw r12, 36(r10)
+    stw r12, 40(r10)
+    stw r12, 44(r10)
+    stw r12, 48(r10)
+    stw r12, 52(r10)
+    stw r12, 56(r10)
+    stw r12, 60(r10)
+    stw r12, 64(r10)
+    stw r12, 68(r10)
+    stw r11, 72(r10)
+    stw r11, 76(r10)
+    stw r12, 80(r10)
+    stw r12, 84(r10)
+    stw r12, 88(r10)
+    stw r12, 92(r10)
+    stw r12, 96(r10)
+    stw r12, 100(r10)
+    stw r11, 104(r10)
+    stw r11, 108(r10)
+    stw r12, 112(r10)
+    stw r12, 116(r10)
+    stw r12, 120(r10)
+    stw r12, 124(r10)
+    stw r12, 128(r10)
+    stw r12, 132(r10)
+    stw r12, 136(r10)
+    stw r12, 140(r10)
+    stw r12, 144(r10)
+    stw r12, 148(r10)
+    stw r12, 152(r10)
+    stw r12, 156(r10)
+    stw r12, 160(r10)
+    stw r12, 164(r10)
+    stw r12, 168(r10)
+    stw r12, 172(r10)
+    stw r12, 176(r10)
+    stw r12, 180(r10)
+    stw r12, 184(r10)
+    stw r12, 188(r10)
+    stw r12, 192(r10)
+    stw r12, 196(r10)
+    stw r12, 200(r10)
+    stw r12, 204(r10)
+    stw r12, 208(r10)
+    stw r11, 212(r10)
+    stw r11, 216(r10)
+    stw r12, 220(r10)
+    add r10, r10, r9
+    stw r12, 0(r10)
+    stw r12, 4(r10)
+    stw r12, 8(r10)
+    stw r12, 12(r10)
+    stw r12, 16(r10)
+    stw r12, 20(r10)
+    stw r12, 24(r10)
+    stw r12, 28(r10)
+    stw r12, 32(r10)
+    stw r12, 36(r10)
+    stw r12, 40(r10)
+    stw r12, 44(r10)
+    stw r12, 48(r10)
+    stw r12, 52(r10)
+    stw r12, 56(r10)
+    stw r12, 60(r10)
+    stw r12, 64(r10)
+    stw r12, 68(r10)
+    stw r11, 72(r10)
+    stw r11, 76(r10)
+    stw r12, 80(r10)
+    stw r12, 84(r10)
+    stw r12, 88(r10)
+    stw r12, 92(r10)
+    stw r12, 96(r10)
+    stw r12, 100(r10)
+    stw r11, 104(r10)
+    stw r11, 108(r10)
+    stw r12, 112(r10)
+    stw r12, 116(r10)
+    stw r12, 120(r10)
+    stw r12, 124(r10)
+    stw r12, 128(r10)
+    stw r12, 132(r10)
+    stw r12, 136(r10)
+    stw r12, 140(r10)
+    stw r12, 144(r10)
+    stw r12, 148(r10)
+    stw r12, 152(r10)
+    stw r12, 156(r10)
+    stw r12, 160(r10)
+    stw r12, 164(r10)
+    stw r12, 168(r10)
+    stw r12, 172(r10)
+    stw r12, 176(r10)
+    stw r12, 180(r10)
+    stw r12, 184(r10)
+    stw r12, 188(r10)
+    stw r12, 192(r10)
+    stw r11, 196(r10)
+    stw r11, 200(r10)
+    stw r12, 204(r10)
+    stw r12, 208(r10)
+    stw r11, 212(r10)
+    stw r11, 216(r10)
+    stw r12, 220(r10)
+    add r10, r10, r9
+    stw r12, 0(r10)
+    stw r12, 4(r10)
+    stw r12, 8(r10)
+    stw r12, 12(r10)
+    stw r12, 16(r10)
+    stw r12, 20(r10)
+    stw r12, 24(r10)
+    stw r12, 28(r10)
+    stw r12, 32(r10)
+    stw r12, 36(r10)
+    stw r12, 40(r10)
+    stw r12, 44(r10)
+    stw r12, 48(r10)
+    stw r12, 52(r10)
+    stw r12, 56(r10)
+    stw r12, 60(r10)
+    stw r12, 64(r10)
+    stw r11, 68(r10)
+    stw r11, 72(r10)
+    stw r11, 76(r10)
+    stw r11, 80(r10)
+    stw r12, 84(r10)
+    stw r12, 88(r10)
+    stw r12, 92(r10)
+    stw r12, 96(r10)
+    stw r11, 100(r10)
+    stw r11, 104(r10)
+    stw r11, 108(r10)
+    stw r11, 112(r10)
+    stw r12, 116(r10)
+    stw r12, 120(r10)
+    stw r12, 124(r10)
+    stw r12, 128(r10)
+    stw r12, 132(r10)
+    stw r12, 136(r10)
+    stw r12, 140(r10)
+    stw r12, 144(r10)
+    stw r12, 148(r10)
+    stw r12, 152(r10)
+    stw r12, 156(r10)
+    stw r12, 160(r10)
+    stw r12, 164(r10)
+    stw r12, 168(r10)
+    stw r12, 172(r10)
+    stw r12, 176(r10)
+    stw r12, 180(r10)
+    stw r12, 184(r10)
+    stw r12, 188(r10)
+    stw r12, 192(r10)
+    stw r12, 196(r10)
+    stw r11, 200(r10)
+    stw r11, 204(r10)
+    stw r11, 208(r10)
+    stw r11, 212(r10)
+    stw r12, 216(r10)
+    stw r12, 220(r10)
+    add r10, r10, r9
+    stw r12, 0(r10)
+    stw r12, 4(r10)
+    stw r12, 8(r10)
+    stw r12, 12(r10)
+    stw r12, 16(r10)
+    stw r12, 20(r10)
+    stw r12, 24(r10)
+    stw r12, 28(r10)
+    stw r12, 32(r10)
+    stw r12, 36(r10)
+    stw r12, 40(r10)
+    stw r12, 44(r10)
+    stw r12, 48(r10)
+    stw r12, 52(r10)
+    stw r12, 56(r10)
+    stw r12, 60(r10)
+    stw r12, 64(r10)
+    stw r12, 68(r10)
+    stw r12, 72(r10)
+    stw r12, 76(r10)
+    stw r12, 80(r10)
+    stw r12, 84(r10)
+    stw r12, 88(r10)
+    stw r12, 92(r10)
+    stw r12, 96(r10)
+    stw r12, 100(r10)
+    stw r12, 104(r10)
+    stw r12, 108(r10)
+    stw r12, 112(r10)
+    stw r12, 116(r10)
+    stw r12, 120(r10)
+    stw r12, 124(r10)
+    stw r12, 128(r10)
+    stw r12, 132(r10)
+    stw r12, 136(r10)
+    stw r12, 140(r10)
+    stw r12, 144(r10)
+    stw r12, 148(r10)
+    stw r12, 152(r10)
+    stw r12, 156(r10)
+    stw r12, 160(r10)
+    stw r12, 164(r10)
+    stw r12, 168(r10)
+    stw r12, 172(r10)
+    stw r12, 176(r10)
+    stw r12, 180(r10)
+    stw r12, 184(r10)
+    stw r12, 188(r10)
+    stw r12, 192(r10)
+    stw r12, 196(r10)
+    stw r12, 200(r10)
+    stw r12, 204(r10)
+    stw r12, 208(r10)
+    stw r12, 212(r10)
+    stw r12, 216(r10)
+    stw r12, 220(r10)
+#endif
+.endm
+.macro DEBUG_tlb
+#ifdef CONFIG_DEBUG
+    stw r12, 0(r10)
+    stw r12, 4(r10)
+    stw r12, 8(r10)
+    stw r12, 12(r10)
+    stw r12, 16(r10)
+    stw r12, 20(r10)
+    stw r12, 24(r10)
+    stw r12, 28(r10)
+    stw r12, 32(r10)
+    stw r12, 36(r10)
+    stw r12, 40(r10)
+    stw r12, 44(r10)
+    stw r12, 48(r10)
+    stw r12, 52(r10)
+    stw r12, 56(r10)
+    stw r12, 60(r10)
+    stw r12, 64(r10)
+    stw r12, 68(r10)
+    stw r12, 72(r10)
+    stw r12, 76(r10)
+    stw r12, 80(r10)
+    stw r12, 84(r10)
+    stw r12, 88(r10)
+    stw r12, 92(r10)
+    add r10, r10, r9
+    stw r12, 0(r10)
+    stw r12, 4(r10)
+    stw r12, 8(r10)
+    stw r12, 12(r10)
+    stw r12, 16(r10)
+    stw r12, 20(r10)
+    stw r12, 24(r10)
+    stw r12, 28(r10)
+    stw r12, 32(r10)
+    stw r12, 36(r10)
+    stw r12, 40(r10)
+    stw r12, 44(r10)
+    stw r12, 48(r10)
+    stw r12, 52(r10)
+    stw r12, 56(r10)
+    stw r12, 60(r10)
+    stw r12, 64(r10)
+    stw r12, 68(r10)
+    stw r12, 72(r10)
+    stw r12, 76(r10)
+    stw r12, 80(r10)
+    stw r12, 84(r10)
+    stw r12, 88(r10)
+    stw r12, 92(r10)
+    add r10, r10, r9
+    stw r12, 0(r10)
+    stw r12, 4(r10)
+    stw r12, 8(r10)
+    stw r12, 12(r10)
+    stw r11, 16(r10)
+    stw r12, 20(r10)
+    stw r12, 24(r10)
+    stw r12, 28(r10)
+    stw r12, 32(r10)
+    stw r12, 36(r10)
+    stw r12, 40(r10)
+    stw r11, 44(r10)
+    stw r11, 48(r10)
+    stw r11, 52(r10)
+    stw r12, 56(r10)
+    stw r12, 60(r10)
+    stw r12, 64(r10)
+    stw r11, 68(r10)
+    stw r11, 72(r10)
+    stw r11, 76(r10)
+    stw r12, 80(r10)
+    stw r12, 84(r10)
+    stw r12, 88(r10)
+    stw r12, 92(r10)
+    add r10, r10, r9
+    stw r12, 0(r10)
+    stw r12, 4(r10)
+    stw r12, 8(r10)
+    stw r11, 12(r10)
+    stw r11, 16(r10)
+    stw r12, 20(r10)
+    stw r12, 24(r10)
+    stw r12, 28(r10)
+    stw r12, 32(r10)
+    stw r12, 36(r10)
+    stw r12, 40(r10)
+    stw r12, 44(r10)
+    stw r11, 48(r10)
+    stw r11, 52(r10)
+    stw r12, 56(r10)
+    stw r12, 60(r10)
+    stw r12, 64(r10)
+    stw r12, 68(r10)
+    stw r11, 72(r10)
+    stw r11, 76(r10)
+    stw r12, 80(r10)
+    stw r12, 84(r10)
+    stw r12, 88(r10)
+    stw r12, 92(r10)
+    add r10, r10, r9
+    stw r12, 0(r10)
+    stw r12, 4(r10)
+    stw r12, 8(r10)
+    stw r11, 12(r10)
+    stw r11, 16(r10)
+    stw r12, 20(r10)
+    stw r12, 24(r10)
+    stw r12, 28(r10)
+    stw r12, 32(r10)
+    stw r12, 36(r10)
+    stw r12, 40(r10)
+    stw r12, 44(r10)
+    stw r11, 48(r10)
+    stw r11, 52(r10)
+    stw r12, 56(r10)
+    stw r12, 60(r10)
+    stw r12, 64(r10)
+    stw r12, 68(r10)
+    stw r11, 72(r10)
+    stw r11, 76(r10)
+    stw r12, 80(r10)
+    stw r12, 84(r10)
+    stw r12, 88(r10)
+    stw r12, 92(r10)
+    add r10, r10, r9
+    stw r12, 0(r10)
+    stw r11, 4(r10)
+    stw r11, 8(r10)
+    stw r11, 12(r10)
+    stw r11, 16(r10)
+    stw r11, 20(r10)
+    stw r11, 24(r10)
+    stw r12, 28(r10)
+    stw r12, 32(r10)
+    stw r12, 36(r10)
+    stw r12, 40(r10)
+    stw r12, 44(r10)
+    stw r11, 48(r10)
+    stw r11, 52(r10)
+    stw r12, 56(r10)
+    stw r12, 60(r10)
+    stw r12, 64(r10)
+    stw r12, 68(r10)
+    stw r11, 72(r10)
+    stw r11, 76(r10)
+    stw r11, 80(r10)
+    stw r11, 84(r10)
+    stw r12, 88(r10)
+    stw r12, 92(r10)
+    add r10, r10, r9
+    stw r12, 0(r10)
+    stw r12, 4(r10)
+    stw r12, 8(r10)
+    stw r11, 12(r10)
+    stw r11, 16(r10)
+    stw r12, 20(r10)
+    stw r12, 24(r10)
+    stw r12, 28(r10)
+    stw r12, 32(r10)
+    stw r12, 36(r10)
+    stw r12, 40(r10)
+    stw r12, 44(r10)
+    stw r11, 48(r10)
+    stw r11, 52(r10)
+    stw r12, 56(r10)
+    stw r12, 60(r10)
+    stw r12, 64(r10)
+    stw r12, 68(r10)
+    stw r11, 72(r10)
+    stw r11, 76(r10)
+    stw r12, 80(r10)
+    stw r11, 84(r10)
+    stw r11, 88(r10)
+    stw r12, 92(r10)
+    add r10, r10, r9
+    stw r12, 0(r10)
+    stw r12, 4(r10)
+    stw r12, 8(r10)
+    stw r11, 12(r10)
+    stw r11, 16(r10)
+    stw r12, 20(r10)
+    stw r12, 24(r10)
+    stw r12, 28(r10)
+    stw r12, 32(r10)
+    stw r12, 36(r10)
+    stw r12, 40(r10)
+    stw r12, 44(r10)
+    stw r11, 48(r10)
+    stw r11, 52(r10)
+    stw r12, 56(r10)
+    stw r12, 60(r10)
+    stw r12, 64(r10)
+    stw r12, 68(r10)
+    stw r11, 72(r10)
+    stw r11, 76(r10)
+    stw r12, 80(r10)
+    stw r12, 84(r10)
+    stw r11, 88(r10)
+    stw r11, 92(r10)
+    add r10, r10, r9
+    stw r12, 0(r10)
+    stw r12, 4(r10)
+    stw r12, 8(r10)
+    stw r11, 12(r10)
+    stw r11, 16(r10)
+    stw r12, 20(r10)
+    stw r12, 24(r10)
+    stw r12, 28(r10)
+    stw r12, 32(r10)
+    stw r12, 36(r10)
+    stw r12, 40(r10)
+    stw r12, 44(r10)
+    stw r11, 48(r10)
+    stw r11, 52(r10)
+    stw r12, 56(r10)
+    stw r12, 60(r10)
+    stw r12, 64(r10)
+    stw r12, 68(r10)
+    stw r11, 72(r10)
+    stw r11, 76(r10)
+    stw r12, 80(r10)
+    stw r12, 84(r10)
+    stw r11, 88(r10)
+    stw r11, 92(r10)
+    add r10, r10, r9
+    stw r12, 0(r10)
+    stw r12, 4(r10)
+    stw r12, 8(r10)
+    stw r11, 12(r10)
+    stw r11, 16(r10)
+    stw r12, 20(r10)
+    stw r12, 24(r10)
+    stw r12, 28(r10)
+    stw r12, 32(r10)
+    stw r12, 36(r10)
+    stw r12, 40(r10)
+    stw r12, 44(r10)
+    stw r11, 48(r10)
+    stw r11, 52(r10)
+    stw r12, 56(r10)
+    stw r12, 60(r10)
+    stw r12, 64(r10)
+    stw r12, 68(r10)
+    stw r11, 72(r10)
+    stw r11, 76(r10)
+    stw r12, 80(r10)
+    stw r12, 84(r10)
+    stw r11, 88(r10)
+    stw r11, 92(r10)
+    add r10, r10, r9
+    stw r12, 0(r10)
+    stw r12, 4(r10)
+    stw r12, 8(r10)
+    stw r11, 12(r10)
+    stw r11, 16(r10)
+    stw r12, 20(r10)
+    stw r11, 24(r10)
+    stw r11, 28(r10)
+    stw r12, 32(r10)
+    stw r12, 36(r10)
+    stw r12, 40(r10)
+    stw r12, 44(r10)
+    stw r11, 48(r10)
+    stw r11, 52(r10)
+    stw r12, 56(r10)
+    stw r12, 60(r10)
+    stw r12, 64(r10)
+    stw r12, 68(r10)
+    stw r11, 72(r10)
+    stw r11, 76(r10)
+    stw r12, 80(r10)
+    stw r12, 84(r10)
+    stw r11, 88(r10)
+    stw r11, 92(r10)
+    add r10, r10, r9
+    stw r12, 0(r10)
+    stw r12, 4(r10)
+    stw r12, 8(r10)
+    stw r12, 12(r10)
+    stw r11, 16(r10)
+    stw r11, 20(r10)
+    stw r11, 24(r10)
+    stw r12, 28(r10)
+    stw r12, 32(r10)
+    stw r12, 36(r10)
+    stw r12, 40(r10)
+    stw r11, 44(r10)
+    stw r11, 48(r10)
+    stw r11, 52(r10)
+    stw r11, 56(r10)
+    stw r12, 60(r10)
+    stw r12, 64(r10)
+    stw r12, 68(r10)
+    stw r11, 72(r10)
+    stw r11, 76(r10)
+    stw r11, 80(r10)
+    stw r11, 84(r10)
+    stw r11, 88(r10)
+    stw r12, 92(r10)
+    add r10, r10, r9
+    stw r12, 0(r10)
+    stw r12, 4(r10)
+    stw r12, 8(r10)
+    stw r12, 12(r10)
+    stw r12, 16(r10)
+    stw r12, 20(r10)
+    stw r12, 24(r10)
+    stw r12, 28(r10)
+    stw r12, 32(r10)
+    stw r12, 36(r10)
+    stw r12, 40(r10)
+    stw r12, 44(r10)
+    stw r12, 48(r10)
+    stw r12, 52(r10)
+    stw r12, 56(r10)
+    stw r12, 60(r10)
+    stw r12, 64(r10)
+    stw r12, 68(r10)
+    stw r12, 72(r10)
+    stw r12, 76(r10)
+    stw r12, 80(r10)
+    stw r12, 84(r10)
+    stw r12, 88(r10)
+    stw r12, 92(r10)
+    add r10, r10, r9
+    stw r12, 0(r10)
+    stw r12, 4(r10)
+    stw r12, 8(r10)
+    stw r12, 12(r10)
+    stw r12, 16(r10)
+    stw r12, 20(r10)
+    stw r12, 24(r10)
+    stw r12, 28(r10)
+    stw r12, 32(r10)
+    stw r12, 36(r10)
+    stw r12, 40(r10)
+    stw r12, 44(r10)
+    stw r12, 48(r10)
+    stw r12, 52(r10)
+    stw r12, 56(r10)
+    stw r12, 60(r10)
+    stw r12, 64(r10)
+    stw r12, 68(r10)
+    stw r12, 72(r10)
+    stw r12, 76(r10)
+    stw r12, 80(r10)
+    stw r12, 84(r10)
+    stw r12, 88(r10)
+    stw r12, 92(r10)
+    add r10, r10, r9
+    stw r12, 0(r10)
+    stw r12, 4(r10)
+    stw r12, 8(r10)
+    stw r12, 12(r10)
+    stw r12, 16(r10)
+    stw r12, 20(r10)
+    stw r12, 24(r10)
+    stw r12, 28(r10)
+    stw r12, 32(r10)
+    stw r12, 36(r10)
+    stw r12, 40(r10)
+    stw r12, 44(r10)
+    stw r12, 48(r10)
+    stw r12, 52(r10)
+    stw r12, 56(r10)
+    stw r12, 60(r10)
+    stw r12, 64(r10)
+    stw r12, 68(r10)
+    stw r12, 72(r10)
+    stw r12, 76(r10)
+    stw r12, 80(r10)
+    stw r12, 84(r10)
+    stw r12, 88(r10)
+    stw r12, 92(r10)
+    add r10, r10, r9
+    stw r12, 0(r10)
+    stw r12, 4(r10)
+    stw r12, 8(r10)
+    stw r12, 12(r10)
+    stw r12, 16(r10)
+    stw r12, 20(r10)
+    stw r12, 24(r10)
+    stw r12, 28(r10)
+    stw r12, 32(r10)
+    stw r12, 36(r10)
+    stw r12, 40(r10)
+    stw r12, 44(r10)
+    stw r12, 48(r10)
+    stw r12, 52(r10)
+    stw r12, 56(r10)
+    stw r12, 60(r10)
+    stw r12, 64(r10)
+    stw r12, 68(r10)
+    stw r12, 72(r10)
+    stw r12, 76(r10)
+    stw r12, 80(r10)
+    stw r12, 84(r10)
+    stw r12, 88(r10)
+    stw r12, 92(r10)
+#endif
+.endm
+.macro DEBUG_prepare
+#ifdef CONFIG_DEBUG
+    stw r12, 0(r10)
+    stw r12, 4(r10)
+    stw r12, 8(r10)
+    stw r12, 12(r10)
+    stw r12, 16(r10)
+    stw r12, 20(r10)
+    stw r12, 24(r10)
+    stw r12, 28(r10)
+    stw r12, 32(r10)
+    stw r12, 36(r10)
+    stw r12, 40(r10)
+    stw r12, 44(r10)
+    stw r12, 48(r10)
+    stw r12, 52(r10)
+    stw r12, 56(r10)
+    stw r12, 60(r10)
+    stw r12, 64(r10)
+    stw r12, 68(r10)
+    stw r12, 72(r10)
+    stw r12, 76(r10)
+    stw r12, 80(r10)
+    stw r12, 84(r10)
+    stw r12, 88(r10)
+    stw r12, 92(r10)
+    stw r12, 96(r10)
+    stw r12, 100(r10)
+    stw r12, 104(r10)
+    stw r12, 108(r10)
+    stw r12, 112(r10)
+    stw r12, 116(r10)
+    stw r12, 120(r10)
+    stw r12, 124(r10)
+    stw r12, 128(r10)
+    stw r12, 132(r10)
+    stw r12, 136(r10)
+    stw r12, 140(r10)
+    stw r12, 144(r10)
+    stw r12, 148(r10)
+    stw r12, 152(r10)
+    stw r12, 156(r10)
+    stw r12, 160(r10)
+    stw r12, 164(r10)
+    stw r12, 168(r10)
+    stw r12, 172(r10)
+    stw r12, 176(r10)
+    stw r12, 180(r10)
+    stw r12, 184(r10)
+    stw r12, 188(r10)
+    stw r12, 192(r10)
+    stw r12, 196(r10)
+    stw r12, 200(r10)
+    stw r12, 204(r10)
+    stw r12, 208(r10)
+    stw r12, 212(r10)
+    stw r12, 216(r10)
+    stw r12, 220(r10)
+    add r10, r10, r9
+    stw r12, 0(r10)
+    stw r12, 4(r10)
+    stw r12, 8(r10)
+    stw r12, 12(r10)
+    stw r12, 16(r10)
+    stw r12, 20(r10)
+    stw r12, 24(r10)
+    stw r12, 28(r10)
+    stw r12, 32(r10)
+    stw r12, 36(r10)
+    stw r12, 40(r10)
+    stw r12, 44(r10)
+    stw r12, 48(r10)
+    stw r12, 52(r10)
+    stw r12, 56(r10)
+    stw r12, 60(r10)
+    stw r12, 64(r10)
+    stw r12, 68(r10)
+    stw r12, 72(r10)
+    stw r12, 76(r10)
+    stw r12, 80(r10)
+    stw r12, 84(r10)
+    stw r12, 88(r10)
+    stw r12, 92(r10)
+    stw r12, 96(r10)
+    stw r12, 100(r10)
+    stw r12, 104(r10)
+    stw r12, 108(r10)
+    stw r12, 112(r10)
+    stw r12, 116(r10)
+    stw r12, 120(r10)
+    stw r12, 124(r10)
+    stw r12, 128(r10)
+    stw r12, 132(r10)
+    stw r12, 136(r10)
+    stw r12, 140(r10)
+    stw r12, 144(r10)
+    stw r12, 148(r10)
+    stw r12, 152(r10)
+    stw r12, 156(r10)
+    stw r12, 160(r10)
+    stw r12, 164(r10)
+    stw r12, 168(r10)
+    stw r12, 172(r10)
+    stw r12, 176(r10)
+    stw r12, 180(r10)
+    stw r12, 184(r10)
+    stw r12, 188(r10)
+    stw r12, 192(r10)
+    stw r12, 196(r10)
+    stw r12, 200(r10)
+    stw r12, 204(r10)
+    stw r12, 208(r10)
+    stw r12, 212(r10)
+    stw r12, 216(r10)
+    stw r12, 220(r10)
+    add r10, r10, r9
+    stw r12, 0(r10)
+    stw r12, 4(r10)
+    stw r12, 8(r10)
+    stw r12, 12(r10)
+    stw r12, 16(r10)
+    stw r12, 20(r10)
+    stw r12, 24(r10)
+    stw r12, 28(r10)
+    stw r12, 32(r10)
+    stw r12, 36(r10)
+    stw r12, 40(r10)
+    stw r12, 44(r10)
+    stw r12, 48(r10)
+    stw r12, 52(r10)
+    stw r12, 56(r10)
+    stw r12, 60(r10)
+    stw r12, 64(r10)
+    stw r12, 68(r10)
+    stw r12, 72(r10)
+    stw r12, 76(r10)
+    stw r12, 80(r10)
+    stw r12, 84(r10)
+    stw r12, 88(r10)
+    stw r12, 92(r10)
+    stw r12, 96(r10)
+    stw r12, 100(r10)
+    stw r12, 104(r10)
+    stw r12, 108(r10)
+    stw r12, 112(r10)
+    stw r12, 116(r10)
+    stw r12, 120(r10)
+    stw r12, 124(r10)
+    stw r12, 128(r10)
+    stw r12, 132(r10)
+    stw r12, 136(r10)
+    stw r12, 140(r10)
+    stw r12, 144(r10)
+    stw r12, 148(r10)
+    stw r12, 152(r10)
+    stw r12, 156(r10)
+    stw r12, 160(r10)
+    stw r12, 164(r10)
+    stw r12, 168(r10)
+    stw r12, 172(r10)
+    stw r12, 176(r10)
+    stw r12, 180(r10)
+    stw r12, 184(r10)
+    stw r12, 188(r10)
+    stw r12, 192(r10)
+    stw r12, 196(r10)
+    stw r12, 200(r10)
+    stw r12, 204(r10)
+    stw r12, 208(r10)
+    stw r12, 212(r10)
+    stw r12, 216(r10)
+    stw r12, 220(r10)
+    add r10, r10, r9
+    stw r12, 0(r10)
+    stw r12, 4(r10)
+    stw r12, 8(r10)
+    stw r12, 12(r10)
+    stw r12, 16(r10)
+    stw r12, 20(r10)
+    stw r12, 24(r10)
+    stw r12, 28(r10)
+    stw r12, 32(r10)
+    stw r12, 36(r10)
+    stw r12, 40(r10)
+    stw r12, 44(r10)
+    stw r12, 48(r10)
+    stw r12, 52(r10)
+    stw r12, 56(r10)
+    stw r12, 60(r10)
+    stw r12, 64(r10)
+    stw r12, 68(r10)
+    stw r12, 72(r10)
+    stw r12, 76(r10)
+    stw r12, 80(r10)
+    stw r12, 84(r10)
+    stw r12, 88(r10)
+    stw r12, 92(r10)
+    stw r12, 96(r10)
+    stw r12, 100(r10)
+    stw r12, 104(r10)
+    stw r12, 108(r10)
+    stw r12, 112(r10)
+    stw r12, 116(r10)
+    stw r12, 120(r10)
+    stw r12, 124(r10)
+    stw r12, 128(r10)
+    stw r12, 132(r10)
+    stw r12, 136(r10)
+    stw r12, 140(r10)
+    stw r12, 144(r10)
+    stw r12, 148(r10)
+    stw r12, 152(r10)
+    stw r12, 156(r10)
+    stw r12, 160(r10)
+    stw r12, 164(r10)
+    stw r12, 168(r10)
+    stw r12, 172(r10)
+    stw r12, 176(r10)
+    stw r12, 180(r10)
+    stw r12, 184(r10)
+    stw r12, 188(r10)
+    stw r12, 192(r10)
+    stw r12, 196(r10)
+    stw r12, 200(r10)
+    stw r12, 204(r10)
+    stw r12, 208(r10)
+    stw r12, 212(r10)
+    stw r12, 216(r10)
+    stw r12, 220(r10)
+    add r10, r10, r9
+    stw r12, 0(r10)
+    stw r12, 4(r10)
+    stw r12, 8(r10)
+    stw r12, 12(r10)
+    stw r12, 16(r10)
+    stw r12, 20(r10)
+    stw r12, 24(r10)
+    stw r12, 28(r10)
+    stw r12, 32(r10)
+    stw r12, 36(r10)
+    stw r12, 40(r10)
+    stw r12, 44(r10)
+    stw r12, 48(r10)
+    stw r12, 52(r10)
+    stw r12, 56(r10)
+    stw r12, 60(r10)
+    stw r12, 64(r10)
+    stw r12, 68(r10)
+    stw r12, 72(r10)
+    stw r12, 76(r10)
+    stw r12, 80(r10)
+    stw r12, 84(r10)
+    stw r12, 88(r10)
+    stw r12, 92(r10)
+    stw r12, 96(r10)
+    stw r12, 100(r10)
+    stw r12, 104(r10)
+    stw r12, 108(r10)
+    stw r12, 112(r10)
+    stw r12, 116(r10)
+    stw r12, 120(r10)
+    stw r12, 124(r10)
+    stw r12, 128(r10)
+    stw r12, 132(r10)
+    stw r12, 136(r10)
+    stw r12, 140(r10)
+    stw r12, 144(r10)
+    stw r12, 148(r10)
+    stw r12, 152(r10)
+    stw r12, 156(r10)
+    stw r12, 160(r10)
+    stw r12, 164(r10)
+    stw r12, 168(r10)
+    stw r12, 172(r10)
+    stw r12, 176(r10)
+    stw r12, 180(r10)
+    stw r12, 184(r10)
+    stw r12, 188(r10)
+    stw r12, 192(r10)
+    stw r12, 196(r10)
+    stw r12, 200(r10)
+    stw r12, 204(r10)
+    stw r12, 208(r10)
+    stw r12, 212(r10)
+    stw r12, 216(r10)
+    stw r12, 220(r10)
+    add r10, r10, r9
+    stw r12, 0(r10)
+    stw r11, 4(r10)
+    stw r11, 8(r10)
+    stw r12, 12(r10)
+    stw r11, 16(r10)
+    stw r11, 20(r10)
+    stw r11, 24(r10)
+    stw r12, 28(r10)
+    stw r12, 32(r10)
+    stw r11, 36(r10)
+    stw r11, 40(r10)
+    stw r12, 44(r10)
+    stw r11, 48(r10)
+    stw r11, 52(r10)
+    stw r11, 56(r10)
+    stw r12, 60(r10)
+    stw r12, 64(r10)
+    stw r12, 68(r10)
+    stw r11, 72(r10)
+    stw r11, 76(r10)
+    stw r11, 80(r10)
+    stw r11, 84(r10)
+    stw r11, 88(r10)
+    stw r12, 92(r10)
+    stw r12, 96(r10)
+    stw r11, 100(r10)
+    stw r11, 104(r10)
+    stw r12, 108(r10)
+    stw r11, 112(r10)
+    stw r11, 116(r10)
+    stw r11, 120(r10)
+    stw r12, 124(r10)
+    stw r12, 128(r10)
+    stw r12, 132(r10)
+    stw r11, 136(r10)
+    stw r11, 140(r10)
+    stw r11, 144(r10)
+    stw r11, 148(r10)
+    stw r12, 152(r10)
+    stw r12, 156(r10)
+    stw r12, 160(r10)
+    stw r11, 164(r10)
+    stw r11, 168(r10)
+    stw r12, 172(r10)
+    stw r11, 176(r10)
+    stw r11, 180(r10)
+    stw r11, 184(r10)
+    stw r12, 188(r10)
+    stw r12, 192(r10)
+    stw r12, 196(r10)
+    stw r11, 200(r10)
+    stw r11, 204(r10)
+    stw r11, 208(r10)
+    stw r11, 212(r10)
+    stw r11, 216(r10)
+    stw r12, 220(r10)
+    add r10, r10, r9
+    stw r12, 0(r10)
+    stw r12, 4(r10)
+    stw r11, 8(r10)
+    stw r11, 12(r10)
+    stw r12, 16(r10)
+    stw r12, 20(r10)
+    stw r11, 24(r10)
+    stw r11, 28(r10)
+    stw r12, 32(r10)
+    stw r12, 36(r10)
+    stw r11, 40(r10)
+    stw r11, 44(r10)
+    stw r11, 48(r10)
+    stw r12, 52(r10)
+    stw r11, 56(r10)
+    stw r11, 60(r10)
+    stw r12, 64(r10)
+    stw r11, 68(r10)
+    stw r11, 72(r10)
+    stw r12, 76(r10)
+    stw r12, 80(r10)
+    stw r12, 84(r10)
+    stw r11, 88(r10)
+    stw r11, 92(r10)
+    stw r12, 96(r10)
+    stw r12, 100(r10)
+    stw r11, 104(r10)
+    stw r11, 108(r10)
+    stw r12, 112(r10)
+    stw r12, 116(r10)
+    stw r11, 120(r10)
+    stw r11, 124(r10)
+    stw r12, 128(r10)
+    stw r12, 132(r10)
+    stw r12, 136(r10)
+    stw r12, 140(r10)
+    stw r12, 144(r10)
+    stw r11, 148(r10)
+    stw r11, 152(r10)
+    stw r12, 156(r10)
+    stw r12, 160(r10)
+    stw r12, 164(r10)
+    stw r11, 168(r10)
+    stw r11, 172(r10)
+    stw r11, 176(r10)
+    stw r12, 180(r10)
+    stw r11, 184(r10)
+    stw r11, 188(r10)
+    stw r12, 192(r10)
+    stw r11, 196(r10)
+    stw r11, 200(r10)
+    stw r12, 204(r10)
+    stw r12, 208(r10)
+    stw r12, 212(r10)
+    stw r11, 216(r10)
+    stw r11, 220(r10)
+    add r10, r10, r9
+    stw r12, 0(r10)
+    stw r12, 4(r10)
+    stw r11, 8(r10)
+    stw r11, 12(r10)
+    stw r12, 16(r10)
+    stw r12, 20(r10)
+    stw r11, 24(r10)
+    stw r11, 28(r10)
+    stw r12, 32(r10)
+    stw r12, 36(r10)
+    stw r11, 40(r10)
+    stw r11, 44(r10)
+    stw r12, 48(r10)
+    stw r12, 52(r10)
+    stw r11, 56(r10)
+    stw r11, 60(r10)
+    stw r12, 64(r10)
+    stw r11, 68(r10)
+    stw r11, 72(r10)
+    stw r11, 76(r10)
+    stw r11, 80(r10)
+    stw r11, 84(r10)
+    stw r11, 88(r10)
+    stw r11, 92(r10)
+    stw r12, 96(r10)
+    stw r12, 100(r10)
+    stw r11, 104(r10)
+    stw r11, 108(r10)
+    stw r12, 112(r10)
+    stw r12, 116(r10)
+    stw r11, 120(r10)
+    stw r11, 124(r10)
+    stw r12, 128(r10)
+    stw r12, 132(r10)
+    stw r11, 136(r10)
+    stw r11, 140(r10)
+    stw r11, 144(r10)
+    stw r11, 148(r10)
+    stw r11, 152(r10)
+    stw r12, 156(r10)
+    stw r12, 160(r10)
+    stw r12, 164(r10)
+    stw r11, 168(r10)
+    stw r11, 172(r10)
+    stw r12, 176(r10)
+    stw r12, 180(r10)
+    stw r11, 184(r10)
+    stw r11, 188(r10)
+    stw r12, 192(r10)
+    stw r11, 196(r10)
+    stw r11, 200(r10)
+    stw r11, 204(r10)
+    stw r11, 208(r10)
+    stw r11, 212(r10)
+    stw r11, 216(r10)
+    stw r11, 220(r10)
+    add r10, r10, r9
+    stw r12, 0(r10)
+    stw r12, 4(r10)
+    stw r11, 8(r10)
+    stw r11, 12(r10)
+    stw r12, 16(r10)
+    stw r12, 20(r10)
+    stw r11, 24(r10)
+    stw r11, 28(r10)
+    stw r12, 32(r10)
+    stw r12, 36(r10)
+    stw r11, 40(r10)
+    stw r11, 44(r10)
+    stw r12, 48(r10)
+    stw r12, 52(r10)
+    stw r12, 56(r10)
+    stw r12, 60(r10)
+    stw r12, 64(r10)
+    stw r11, 68(r10)
+    stw r11, 72(r10)
+    stw r12, 76(r10)
+    stw r12, 80(r10)
+    stw r12, 84(r10)
+    stw r12, 88(r10)
+    stw r12, 92(r10)
+    stw r12, 96(r10)
+    stw r12, 100(r10)
+    stw r11, 104(r10)
+    stw r11, 108(r10)
+    stw r12, 112(r10)
+    stw r12, 116(r10)
+    stw r11, 120(r10)
+    stw r11, 124(r10)
+    stw r12, 128(r10)
+    stw r11, 132(r10)
+    stw r11, 136(r10)
+    stw r12, 140(r10)
+    stw r12, 144(r10)
+    stw r11, 148(r10)
+    stw r11, 152(r10)
+    stw r12, 156(r10)
+    stw r12, 160(r10)
+    stw r12, 164(r10)
+    stw r11, 168(r10)
+    stw r11, 172(r10)
+    stw r12, 176(r10)
+    stw r12, 180(r10)
+    stw r12, 184(r10)
+    stw r12, 188(r10)
+    stw r12, 192(r10)
+    stw r11, 196(r10)
+    stw r11, 200(r10)
+    stw r12, 204(r10)
+    stw r12, 208(r10)
+    stw r12, 212(r10)
+    stw r12, 216(r10)
+    stw r12, 220(r10)
+    add r10, r10, r9
+    stw r12, 0(r10)
+    stw r12, 4(r10)
+    stw r11, 8(r10)
+    stw r11, 12(r10)
+    stw r12, 16(r10)
+    stw r12, 20(r10)
+    stw r11, 24(r10)
+    stw r11, 28(r10)
+    stw r12, 32(r10)
+    stw r12, 36(r10)
+    stw r11, 40(r10)
+    stw r11, 44(r10)
+    stw r12, 48(r10)
+    stw r12, 52(r10)
+    stw r12, 56(r10)
+    stw r12, 60(r10)
+    stw r12, 64(r10)
+    stw r11, 68(r10)
+    stw r11, 72(r10)
+    stw r12, 76(r10)
+    stw r12, 80(r10)
+    stw r12, 84(r10)
+    stw r12, 88(r10)
+    stw r12, 92(r10)
+    stw r12, 96(r10)
+    stw r12, 100(r10)
+    stw r11, 104(r10)
+    stw r11, 108(r10)
+    stw r12, 112(r10)
+    stw r12, 116(r10)
+    stw r11, 120(r10)
+    stw r11, 124(r10)
+    stw r12, 128(r10)
+    stw r11, 132(r10)
+    stw r11, 136(r10)
+    stw r12, 140(r10)
+    stw r12, 144(r10)
+    stw r11, 148(r10)
+    stw r11, 152(r10)
+    stw r12, 156(r10)
+    stw r12, 160(r10)
+    stw r12, 164(r10)
+    stw r11, 168(r10)
+    stw r11, 172(r10)
+    stw r12, 176(r10)
+    stw r12, 180(r10)
+    stw r12, 184(r10)
+    stw r12, 188(r10)
+    stw r12, 192(r10)
+    stw r11, 196(r10)
+    stw r11, 200(r10)
+    stw r12, 204(r10)
+    stw r12, 208(r10)
+    stw r12, 212(r10)
+    stw r12, 216(r10)
+    stw r12, 220(r10)
+    add r10, r10, r9
+    stw r12, 0(r10)
+    stw r12, 4(r10)
+    stw r11, 8(r10)
+    stw r11, 12(r10)
+    stw r12, 16(r10)
+    stw r12, 20(r10)
+    stw r11, 24(r10)
+    stw r11, 28(r10)
+    stw r12, 32(r10)
+    stw r12, 36(r10)
+    stw r11, 40(r10)
+    stw r11, 44(r10)
+    stw r12, 48(r10)
+    stw r12, 52(r10)
+    stw r12, 56(r10)
+    stw r12, 60(r10)
+    stw r12, 64(r10)
+    stw r11, 68(r10)
+    stw r11, 72(r10)
+    stw r12, 76(r10)
+    stw r12, 80(r10)
+    stw r12, 84(r10)
+    stw r11, 88(r10)
+    stw r11, 92(r10)
+    stw r12, 96(r10)
+    stw r12, 100(r10)
+    stw r11, 104(r10)
+    stw r11, 108(r10)
+    stw r12, 112(r10)
+    stw r12, 116(r10)
+    stw r11, 120(r10)
+    stw r11, 124(r10)
+    stw r12, 128(r10)
+    stw r11, 132(r10)
+    stw r11, 136(r10)
+    stw r12, 140(r10)
+    stw r12, 144(r10)
+    stw r11, 148(r10)
+    stw r11, 152(r10)
+    stw r12, 156(r10)
+    stw r12, 160(r10)
+    stw r12, 164(r10)
+    stw r11, 168(r10)
+    stw r11, 172(r10)
+    stw r12, 176(r10)
+    stw r12, 180(r10)
+    stw r12, 184(r10)
+    stw r12, 188(r10)
+    stw r12, 192(r10)
+    stw r11, 196(r10)
+    stw r11, 200(r10)
+    stw r12, 204(r10)
+    stw r12, 208(r10)
+    stw r12, 212(r10)
+    stw r11, 216(r10)
+    stw r11, 220(r10)
+    add r10, r10, r9
+    stw r12, 0(r10)
+    stw r12, 4(r10)
+    stw r11, 8(r10)
+    stw r11, 12(r10)
+    stw r11, 16(r10)
+    stw r11, 20(r10)
+    stw r11, 24(r10)
+    stw r12, 28(r10)
+    stw r12, 32(r10)
+    stw r11, 36(r10)
+    stw r11, 40(r10)
+    stw r11, 44(r10)
+    stw r11, 48(r10)
+    stw r12, 52(r10)
+    stw r12, 56(r10)
+    stw r12, 60(r10)
+    stw r12, 64(r10)
+    stw r12, 68(r10)
+    stw r11, 72(r10)
+    stw r11, 76(r10)
+    stw r11, 80(r10)
+    stw r11, 84(r10)
+    stw r11, 88(r10)
+    stw r12, 92(r10)
+    stw r12, 96(r10)
+    stw r12, 100(r10)
+    stw r11, 104(r10)
+    stw r11, 108(r10)
+    stw r11, 112(r10)
+    stw r11, 116(r10)
+    stw r11, 120(r10)
+    stw r12, 124(r10)
+    stw r12, 128(r10)
+    stw r12, 132(r10)
+    stw r11, 136(r10)
+    stw r11, 140(r10)
+    stw r11, 144(r10)
+    stw r12, 148(r10)
+    stw r11, 152(r10)
+    stw r11, 156(r10)
+    stw r12, 160(r10)
+    stw r11, 164(r10)
+    stw r11, 168(r10)
+    stw r11, 172(r10)
+    stw r11, 176(r10)
+    stw r12, 180(r10)
+    stw r12, 184(r10)
+    stw r12, 188(r10)
+    stw r12, 192(r10)
+    stw r12, 196(r10)
+    stw r11, 200(r10)
+    stw r11, 204(r10)
+    stw r11, 208(r10)
+    stw r11, 212(r10)
+    stw r11, 216(r10)
+    stw r12, 220(r10)
+    add r10, r10, r9
+    stw r12, 0(r10)
+    stw r12, 4(r10)
+    stw r11, 8(r10)
+    stw r11, 12(r10)
+    stw r12, 16(r10)
+    stw r12, 20(r10)
+    stw r12, 24(r10)
+    stw r12, 28(r10)
+    stw r12, 32(r10)
+    stw r12, 36(r10)
+    stw r12, 40(r10)
+    stw r12, 44(r10)
+    stw r12, 48(r10)
+    stw r12, 52(r10)
+    stw r12, 56(r10)
+    stw r12, 60(r10)
+    stw r12, 64(r10)
+    stw r12, 68(r10)
+    stw r12, 72(r10)
+    stw r12, 76(r10)
+    stw r12, 80(r10)
+    stw r12, 84(r10)
+    stw r12, 88(r10)
+    stw r12, 92(r10)
+    stw r12, 96(r10)
+    stw r12, 100(r10)
+    stw r11, 104(r10)
+    stw r11, 108(r10)
+    stw r12, 112(r10)
+    stw r12, 116(r10)
+    stw r12, 120(r10)
+    stw r12, 124(r10)
+    stw r12, 128(r10)
+    stw r12, 132(r10)
+    stw r12, 136(r10)
+    stw r12, 140(r10)
+    stw r12, 144(r10)
+    stw r12, 148(r10)
+    stw r12, 152(r10)
+    stw r12, 156(r10)
+    stw r12, 160(r10)
+    stw r12, 164(r10)
+    stw r12, 168(r10)
+    stw r12, 172(r10)
+    stw r12, 176(r10)
+    stw r12, 180(r10)
+    stw r12, 184(r10)
+    stw r12, 188(r10)
+    stw r12, 192(r10)
+    stw r12, 196(r10)
+    stw r12, 200(r10)
+    stw r12, 204(r10)
+    stw r12, 208(r10)
+    stw r12, 212(r10)
+    stw r12, 216(r10)
+    stw r12, 220(r10)
+    add r10, r10, r9
+    stw r12, 0(r10)
+    stw r12, 4(r10)
+    stw r11, 8(r10)
+    stw r11, 12(r10)
+    stw r12, 16(r10)
+    stw r12, 20(r10)
+    stw r12, 24(r10)
+    stw r12, 28(r10)
+    stw r12, 32(r10)
+    stw r12, 36(r10)
+    stw r12, 40(r10)
+    stw r12, 44(r10)
+    stw r12, 48(r10)
+    stw r12, 52(r10)
+    stw r12, 56(r10)
+    stw r12, 60(r10)
+    stw r12, 64(r10)
+    stw r12, 68(r10)
+    stw r12, 72(r10)
+    stw r12, 76(r10)
+    stw r12, 80(r10)
+    stw r12, 84(r10)
+    stw r12, 88(r10)
+    stw r12, 92(r10)
+    stw r12, 96(r10)
+    stw r12, 100(r10)
+    stw r11, 104(r10)
+    stw r11, 108(r10)
+    stw r12, 112(r10)
+    stw r12, 116(r10)
+    stw r12, 120(r10)
+    stw r12, 124(r10)
+    stw r12, 128(r10)
+    stw r12, 132(r10)
+    stw r12, 136(r10)
+    stw r12, 140(r10)
+    stw r12, 144(r10)
+    stw r12, 148(r10)
+    stw r12, 152(r10)
+    stw r12, 156(r10)
+    stw r12, 160(r10)
+    stw r12, 164(r10)
+    stw r12, 168(r10)
+    stw r12, 172(r10)
+    stw r12, 176(r10)
+    stw r12, 180(r10)
+    stw r12, 184(r10)
+    stw r12, 188(r10)
+    stw r12, 192(r10)
+    stw r12, 196(r10)
+    stw r12, 200(r10)
+    stw r12, 204(r10)
+    stw r12, 208(r10)
+    stw r12, 212(r10)
+    stw r12, 216(r10)
+    stw r12, 220(r10)
+    add r10, r10, r9
+    stw r12, 0(r10)
+    stw r11, 4(r10)
+    stw r11, 8(r10)
+    stw r11, 12(r10)
+    stw r11, 16(r10)
+    stw r12, 20(r10)
+    stw r12, 24(r10)
+    stw r12, 28(r10)
+    stw r12, 32(r10)
+    stw r12, 36(r10)
+    stw r12, 40(r10)
+    stw r12, 44(r10)
+    stw r12, 48(r10)
+    stw r12, 52(r10)
+    stw r12, 56(r10)
+    stw r12, 60(r10)
+    stw r12, 64(r10)
+    stw r12, 68(r10)
+    stw r12, 72(r10)
+    stw r12, 76(r10)
+    stw r12, 80(r10)
+    stw r12, 84(r10)
+    stw r12, 88(r10)
+    stw r12, 92(r10)
+    stw r12, 96(r10)
+    stw r11, 100(r10)
+    stw r11, 104(r10)
+    stw r11, 108(r10)
+    stw r11, 112(r10)
+    stw r12, 116(r10)
+    stw r12, 120(r10)
+    stw r12, 124(r10)
+    stw r12, 128(r10)
+    stw r12, 132(r10)
+    stw r12, 136(r10)
+    stw r12, 140(r10)
+    stw r12, 144(r10)
+    stw r12, 148(r10)
+    stw r12, 152(r10)
+    stw r12, 156(r10)
+    stw r12, 160(r10)
+    stw r12, 164(r10)
+    stw r12, 168(r10)
+    stw r12, 172(r10)
+    stw r12, 176(r10)
+    stw r12, 180(r10)
+    stw r12, 184(r10)
+    stw r12, 188(r10)
+    stw r12, 192(r10)
+    stw r12, 196(r10)
+    stw r12, 200(r10)
+    stw r12, 204(r10)
+    stw r12, 208(r10)
+    stw r12, 212(r10)
+    stw r12, 216(r10)
+    stw r12, 220(r10)
+    add r10, r10, r9
+    stw r12, 0(r10)
+    stw r12, 4(r10)
+    stw r12, 8(r10)
+    stw r12, 12(r10)
+    stw r12, 16(r10)
+    stw r12, 20(r10)
+    stw r12, 24(r10)
+    stw r12, 28(r10)
+    stw r12, 32(r10)
+    stw r12, 36(r10)
+    stw r12, 40(r10)
+    stw r12, 44(r10)
+    stw r12, 48(r10)
+    stw r12, 52(r10)
+    stw r12, 56(r10)
+    stw r12, 60(r10)
+    stw r12, 64(r10)
+    stw r12, 68(r10)
+    stw r12, 72(r10)
+    stw r12, 76(r10)
+    stw r12, 80(r10)
+    stw r12, 84(r10)
+    stw r12, 88(r10)
+    stw r12, 92(r10)
+    stw r12, 96(r10)
+    stw r12, 100(r10)
+    stw r12, 104(r10)
+    stw r12, 108(r10)
+    stw r12, 112(r10)
+    stw r12, 116(r10)
+    stw r12, 120(r10)
+    stw r12, 124(r10)
+    stw r12, 128(r10)
+    stw r12, 132(r10)
+    stw r12, 136(r10)
+    stw r12, 140(r10)
+    stw r12, 144(r10)
+    stw r12, 148(r10)
+    stw r12, 152(r10)
+    stw r12, 156(r10)
+    stw r12, 160(r10)
+    stw r12, 164(r10)
+    stw r12, 168(r10)
+    stw r12, 172(r10)
+    stw r12, 176(r10)
+    stw r12, 180(r10)
+    stw r12, 184(r10)
+    stw r12, 188(r10)
+    stw r12, 192(r10)
+    stw r12, 196(r10)
+    stw r12, 200(r10)
+    stw r12, 204(r10)
+    stw r12, 208(r10)
+    stw r12, 212(r10)
+    stw r12, 216(r10)
+    stw r12, 220(r10)
+#endif
+.endm
+.macro DEBUG_rfi
+#ifdef CONFIG_DEBUG
+    stw r12, 0(r10)
+    stw r12, 4(r10)
+    stw r12, 8(r10)
+    stw r12, 12(r10)
+    stw r12, 16(r10)
+    stw r12, 20(r10)
+    stw r12, 24(r10)
+    stw r12, 28(r10)
+    stw r12, 32(r10)
+    stw r12, 36(r10)
+    stw r12, 40(r10)
+    stw r12, 44(r10)
+    stw r12, 48(r10)
+    stw r12, 52(r10)
+    stw r12, 56(r10)
+    stw r12, 60(r10)
+    stw r12, 64(r10)
+    stw r12, 68(r10)
+    stw r12, 72(r10)
+    stw r12, 76(r10)
+    stw r12, 80(r10)
+    stw r12, 84(r10)
+    stw r12, 88(r10)
+    stw r12, 92(r10)
+    add r10, r10, r9
+    stw r12, 0(r10)
+    stw r12, 4(r10)
+    stw r12, 8(r10)
+    stw r12, 12(r10)
+    stw r12, 16(r10)
+    stw r12, 20(r10)
+    stw r12, 24(r10)
+    stw r12, 28(r10)
+    stw r12, 32(r10)
+    stw r12, 36(r10)
+    stw r12, 40(r10)
+    stw r12, 44(r10)
+    stw r12, 48(r10)
+    stw r12, 52(r10)
+    stw r12, 56(r10)
+    stw r12, 60(r10)
+    stw r12, 64(r10)
+    stw r12, 68(r10)
+    stw r12, 72(r10)
+    stw r12, 76(r10)
+    stw r12, 80(r10)
+    stw r12, 84(r10)
+    stw r12, 88(r10)
+    stw r12, 92(r10)
+    add r10, r10, r9
+    stw r12, 0(r10)
+    stw r12, 4(r10)
+    stw r12, 8(r10)
+    stw r12, 12(r10)
+    stw r12, 16(r10)
+    stw r12, 20(r10)
+    stw r12, 24(r10)
+    stw r12, 28(r10)
+    stw r12, 32(r10)
+    stw r12, 36(r10)
+    stw r12, 40(r10)
+    stw r12, 44(r10)
+    stw r11, 48(r10)
+    stw r11, 52(r10)
+    stw r11, 56(r10)
+    stw r12, 60(r10)
+    stw r12, 64(r10)
+    stw r12, 68(r10)
+    stw r12, 72(r10)
+    stw r12, 76(r10)
+    stw r11, 80(r10)
+    stw r11, 84(r10)
+    stw r12, 88(r10)
+    stw r12, 92(r10)
+    add r10, r10, r9
+    stw r12, 0(r10)
+    stw r12, 4(r10)
+    stw r12, 8(r10)
+    stw r12, 12(r10)
+    stw r12, 16(r10)
+    stw r12, 20(r10)
+    stw r12, 24(r10)
+    stw r12, 28(r10)
+    stw r12, 32(r10)
+    stw r12, 36(r10)
+    stw r12, 40(r10)
+    stw r11, 44(r10)
+    stw r11, 48(r10)
+    stw r12, 52(r10)
+    stw r11, 56(r10)
+    stw r11, 60(r10)
+    stw r12, 64(r10)
+    stw r12, 68(r10)
+    stw r12, 72(r10)
+    stw r12, 76(r10)
+    stw r11, 80(r10)
+    stw r11, 84(r10)
+    stw r12, 88(r10)
+    stw r12, 92(r10)
+    add r10, r10, r9
+    stw r12, 0(r10)
+    stw r12, 4(r10)
+    stw r12, 8(r10)
+    stw r12, 12(r10)
+    stw r12, 16(r10)
+    stw r12, 20(r10)
+    stw r12, 24(r10)
+    stw r12, 28(r10)
+    stw r12, 32(r10)
+    stw r12, 36(r10)
+    stw r12, 40(r10)
+    stw r11, 44(r10)
+    stw r11, 48(r10)
+    stw r12, 52(r10)
+    stw r12, 56(r10)
+    stw r11, 60(r10)
+    stw r12, 64(r10)
+    stw r12, 68(r10)
+    stw r12, 72(r10)
+    stw r12, 76(r10)
+    stw r12, 80(r10)
+    stw r12, 84(r10)
+    stw r12, 88(r10)
+    stw r12, 92(r10)
+    add r10, r10, r9
+    stw r12, 0(r10)
+    stw r11, 4(r10)
+    stw r11, 8(r10)
+    stw r12, 12(r10)
+    stw r11, 16(r10)
+    stw r11, 20(r10)
+    stw r11, 24(r10)
+    stw r12, 28(r10)
+    stw r12, 32(r10)
+    stw r12, 36(r10)
+    stw r12, 40(r10)
+    stw r11, 44(r10)
+    stw r11, 48(r10)
+    stw r12, 52(r10)
+    stw r12, 56(r10)
+    stw r12, 60(r10)
+    stw r12, 64(r10)
+    stw r12, 68(r10)
+    stw r12, 72(r10)
+    stw r11, 76(r10)
+    stw r11, 80(r10)
+    stw r11, 84(r10)
+    stw r12, 88(r10)
+    stw r12, 92(r10)
+    add r10, r10, r9
+    stw r12, 0(r10)
+    stw r12, 4(r10)
+    stw r11, 8(r10)
+    stw r11, 12(r10)
+    stw r11, 16(r10)
+    stw r12, 20(r10)
+    stw r11, 24(r10)
+    stw r11, 28(r10)
+    stw r12, 32(r10)
+    stw r12, 36(r10)
+    stw r11, 40(r10)
+    stw r11, 44(r10)
+    stw r11, 48(r10)
+    stw r11, 52(r10)
+    stw r12, 56(r10)
+    stw r12, 60(r10)
+    stw r12, 64(r10)
+    stw r12, 68(r10)
+    stw r12, 72(r10)
+    stw r12, 76(r10)
+    stw r11, 80(r10)
+    stw r11, 84(r10)
+    stw r12, 88(r10)
+    stw r12, 92(r10)
+    add r10, r10, r9
+    stw r12, 0(r10)
+    stw r12, 4(r10)
+    stw r11, 8(r10)
+    stw r11, 12(r10)
+    stw r12, 16(r10)
+    stw r12, 20(r10)
+    stw r11, 24(r10)
+    stw r11, 28(r10)
+    stw r12, 32(r10)
+    stw r12, 36(r10)
+    stw r12, 40(r10)
+    stw r11, 44(r10)
+    stw r11, 48(r10)
+    stw r12, 52(r10)
+    stw r12, 56(r10)
+    stw r12, 60(r10)
+    stw r12, 64(r10)
+    stw r12, 68(r10)
+    stw r12, 72(r10)
+    stw r12, 76(r10)
+    stw r11, 80(r10)
+    stw r11, 84(r10)
+    stw r12, 88(r10)
+    stw r12, 92(r10)
+    add r10, r10, r9
+    stw r12, 0(r10)
+    stw r12, 4(r10)
+    stw r11, 8(r10)
+    stw r11, 12(r10)
+    stw r12, 16(r10)
+    stw r12, 20(r10)
+    stw r12, 24(r10)
+    stw r12, 28(r10)
+    stw r12, 32(r10)
+    stw r12, 36(r10)
+    stw r12, 40(r10)
+    stw r11, 44(r10)
+    stw r11, 48(r10)
+    stw r12, 52(r10)
+    stw r12, 56(r10)
+    stw r12, 60(r10)
+    stw r12, 64(r10)
+    stw r12, 68(r10)
+    stw r12, 72(r10)
+    stw r12, 76(r10)
+    stw r11, 80(r10)
+    stw r11, 84(r10)
+    stw r12, 88(r10)
+    stw r12, 92(r10)
+    add r10, r10, r9
+    stw r12, 0(r10)
+    stw r12, 4(r10)
+    stw r11, 8(r10)
+    stw r11, 12(r10)
+    stw r12, 16(r10)
+    stw r12, 20(r10)
+    stw r12, 24(r10)
+    stw r12, 28(r10)
+    stw r12, 32(r10)
+    stw r12, 36(r10)
+    stw r12, 40(r10)
+    stw r11, 44(r10)
+    stw r11, 48(r10)
+    stw r12, 52(r10)
+    stw r12, 56(r10)
+    stw r12, 60(r10)
+    stw r12, 64(r10)
+    stw r12, 68(r10)
+    stw r12, 72(r10)
+    stw r12, 76(r10)
+    stw r11, 80(r10)
+    stw r11, 84(r10)
+    stw r12, 88(r10)
+    stw r12, 92(r10)
+    add r10, r10, r9
+    stw r12, 0(r10)
+    stw r12, 4(r10)
+    stw r11, 8(r10)
+    stw r11, 12(r10)
+    stw r12, 16(r10)
+    stw r12, 20(r10)
+    stw r12, 24(r10)
+    stw r12, 28(r10)
+    stw r12, 32(r10)
+    stw r12, 36(r10)
+    stw r12, 40(r10)
+    stw r11, 44(r10)
+    stw r11, 48(r10)
+    stw r12, 52(r10)
+    stw r12, 56(r10)
+    stw r12, 60(r10)
+    stw r12, 64(r10)
+    stw r12, 68(r10)
+    stw r12, 72(r10)
+    stw r12, 76(r10)
+    stw r11, 80(r10)
+    stw r11, 84(r10)
+    stw r12, 88(r10)
+    stw r12, 92(r10)
+    add r10, r10, r9
+    stw r12, 0(r10)
+    stw r11, 4(r10)
+    stw r11, 8(r10)
+    stw r11, 12(r10)
+    stw r11, 16(r10)
+    stw r12, 20(r10)
+    stw r12, 24(r10)
+    stw r12, 28(r10)
+    stw r12, 32(r10)
+    stw r12, 36(r10)
+    stw r11, 40(r10)
+    stw r11, 44(r10)
+    stw r11, 48(r10)
+    stw r11, 52(r10)
+    stw r12, 56(r10)
+    stw r12, 60(r10)
+    stw r12, 64(r10)
+    stw r12, 68(r10)
+    stw r12, 72(r10)
+    stw r11, 76(r10)
+    stw r11, 80(r10)
+    stw r11, 84(r10)
+    stw r11, 88(r10)
+    stw r12, 92(r10)
+    add r10, r10, r9
+    stw r12, 0(r10)
+    stw r12, 4(r10)
+    stw r12, 8(r10)
+    stw r12, 12(r10)
+    stw r12, 16(r10)
+    stw r12, 20(r10)
+    stw r12, 24(r10)
+    stw r12, 28(r10)
+    stw r12, 32(r10)
+    stw r12, 36(r10)
+    stw r12, 40(r10)
+    stw r12, 44(r10)
+    stw r12, 48(r10)
+    stw r12, 52(r10)
+    stw r12, 56(r10)
+    stw r12, 60(r10)
+    stw r12, 64(r10)
+    stw r12, 68(r10)
+    stw r12, 72(r10)
+    stw r12, 76(r10)
+    stw r12, 80(r10)
+    stw r12, 84(r10)
+    stw r12, 88(r10)
+    stw r12, 92(r10)
+    add r10, r10, r9
+    stw r12, 0(r10)
+    stw r12, 4(r10)
+    stw r12, 8(r10)
+    stw r12, 12(r10)
+    stw r12, 16(r10)
+    stw r12, 20(r10)
+    stw r12, 24(r10)
+    stw r12, 28(r10)
+    stw r12, 32(r10)
+    stw r12, 36(r10)
+    stw r12, 40(r10)
+    stw r12, 44(r10)
+    stw r12, 48(r10)
+    stw r12, 52(r10)
+    stw r12, 56(r10)
+    stw r12, 60(r10)
+    stw r12, 64(r10)
+    stw r12, 68(r10)
+    stw r12, 72(r10)
+    stw r12, 76(r10)
+    stw r12, 80(r10)
+    stw r12, 84(r10)
+    stw r12, 88(r10)
+    stw r12, 92(r10)
+    add r10, r10, r9
+    stw r12, 0(r10)
+    stw r12, 4(r10)
+    stw r12, 8(r10)
+    stw r12, 12(r10)
+    stw r12, 16(r10)
+    stw r12, 20(r10)
+    stw r12, 24(r10)
+    stw r12, 28(r10)
+    stw r12, 32(r10)
+    stw r12, 36(r10)
+    stw r12, 40(r10)
+    stw r12, 44(r10)
+    stw r12, 48(r10)
+    stw r12, 52(r10)
+    stw r12, 56(r10)
+    stw r12, 60(r10)
+    stw r12, 64(r10)
+    stw r12, 68(r10)
+    stw r12, 72(r10)
+    stw r12, 76(r10)
+    stw r12, 80(r10)
+    stw r12, 84(r10)
+    stw r12, 88(r10)
+    stw r12, 92(r10)
+    add r10, r10, r9
+    stw r12, 0(r10)
+    stw r12, 4(r10)
+    stw r12, 8(r10)
+    stw r12, 12(r10)
+    stw r12, 16(r10)
+    stw r12, 20(r10)
+    stw r12, 24(r10)
+    stw r12, 28(r10)
+    stw r12, 32(r10)
+    stw r12, 36(r10)
+    stw r12, 40(r10)
+    stw r12, 44(r10)
+    stw r12, 48(r10)
+    stw r12, 52(r10)
+    stw r12, 56(r10)
+    stw r12, 60(r10)
+    stw r12, 64(r10)
+    stw r12, 68(r10)
+    stw r12, 72(r10)
+    stw r12, 76(r10)
+    stw r12, 80(r10)
+    stw r12, 84(r10)
+    stw r12, 88(r10)
+    stw r12, 92(r10)
+#endif
+.endm
+.macro DEBUG_pht
+#ifdef CONFIG_DEBUG
+    stw r12, 0(r10)
+    stw r12, 4(r10)
+    stw r12, 8(r10)
+    stw r12, 12(r10)
+    stw r12, 16(r10)
+    stw r12, 20(r10)
+    stw r12, 24(r10)
+    stw r12, 28(r10)
+    stw r12, 32(r10)
+    stw r12, 36(r10)
+    stw r12, 40(r10)
+    stw r12, 44(r10)
+    stw r12, 48(r10)
+    stw r12, 52(r10)
+    stw r12, 56(r10)
+    stw r12, 60(r10)
+    stw r12, 64(r10)
+    stw r12, 68(r10)
+    stw r12, 72(r10)
+    stw r12, 76(r10)
+    stw r12, 80(r10)
+    stw r12, 84(r10)
+    stw r12, 88(r10)
+    stw r12, 92(r10)
+    add r10, r10, r9
+    stw r12, 0(r10)
+    stw r12, 4(r10)
+    stw r12, 8(r10)
+    stw r12, 12(r10)
+    stw r12, 16(r10)
+    stw r12, 20(r10)
+    stw r12, 24(r10)
+    stw r12, 28(r10)
+    stw r12, 32(r10)
+    stw r12, 36(r10)
+    stw r12, 40(r10)
+    stw r12, 44(r10)
+    stw r12, 48(r10)
+    stw r12, 52(r10)
+    stw r12, 56(r10)
+    stw r12, 60(r10)
+    stw r12, 64(r10)
+    stw r12, 68(r10)
+    stw r12, 72(r10)
+    stw r12, 76(r10)
+    stw r12, 80(r10)
+    stw r12, 84(r10)
+    stw r12, 88(r10)
+    stw r12, 92(r10)
+    add r10, r10, r9
+    stw r12, 0(r10)
+    stw r12, 4(r10)
+    stw r12, 8(r10)
+    stw r12, 12(r10)
+    stw r12, 16(r10)
+    stw r12, 20(r10)
+    stw r12, 24(r10)
+    stw r12, 28(r10)
+    stw r12, 32(r10)
+    stw r11, 36(r10)
+    stw r11, 40(r10)
+    stw r11, 44(r10)
+    stw r12, 48(r10)
+    stw r12, 52(r10)
+    stw r12, 56(r10)
+    stw r12, 60(r10)
+    stw r12, 64(r10)
+    stw r12, 68(r10)
+    stw r12, 72(r10)
+    stw r12, 76(r10)
+    stw r11, 80(r10)
+    stw r12, 84(r10)
+    stw r12, 88(r10)
+    stw r12, 92(r10)
+    add r10, r10, r9
+    stw r12, 0(r10)
+    stw r12, 4(r10)
+    stw r12, 8(r10)
+    stw r12, 12(r10)
+    stw r12, 16(r10)
+    stw r12, 20(r10)
+    stw r12, 24(r10)
+    stw r12, 28(r10)
+    stw r12, 32(r10)
+    stw r12, 36(r10)
+    stw r11, 40(r10)
+    stw r11, 44(r10)
+    stw r12, 48(r10)
+    stw r12, 52(r10)
+    stw r12, 56(r10)
+    stw r12, 60(r10)
+    stw r12, 64(r10)
+    stw r12, 68(r10)
+    stw r12, 72(r10)
+    stw r11, 76(r10)
+    stw r11, 80(r10)
+    stw r12, 84(r10)
+    stw r12, 88(r10)
+    stw r12, 92(r10)
+    add r10, r10, r9
+    stw r12, 0(r10)
+    stw r12, 4(r10)
+    stw r12, 8(r10)
+    stw r12, 12(r10)
+    stw r12, 16(r10)
+    stw r12, 20(r10)
+    stw r12, 24(r10)
+    stw r12, 28(r10)
+    stw r12, 32(r10)
+    stw r12, 36(r10)
+    stw r11, 40(r10)
+    stw r11, 44(r10)
+    stw r12, 48(r10)
+    stw r12, 52(r10)
+    stw r12, 56(r10)
+    stw r12, 60(r10)
+    stw r12, 64(r10)
+    stw r12, 68(r10)
+    stw r12, 72(r10)
+    stw r11, 76(r10)
+    stw r11, 80(r10)
+    stw r12, 84(r10)
+    stw r12, 88(r10)
+    stw r12, 92(r10)
+    add r10, r10, r9
+    stw r12, 0(r10)
+    stw r11, 4(r10)
+    stw r11, 8(r10)
+    stw r12, 12(r10)
+    stw r11, 16(r10)
+    stw r11, 20(r10)
+    stw r11, 24(r10)
+    stw r12, 28(r10)
+    stw r12, 32(r10)
+    stw r12, 36(r10)
+    stw r11, 40(r10)
+    stw r11, 44(r10)
+    stw r12, 48(r10)
+    stw r11, 52(r10)
+    stw r11, 56(r10)
+    stw r12, 60(r10)
+    stw r12, 64(r10)
+    stw r11, 68(r10)
+    stw r11, 72(r10)
+    stw r11, 76(r10)
+    stw r11, 80(r10)
+    stw r11, 84(r10)
+    stw r11, 88(r10)
+    stw r12, 92(r10)
+    add r10, r10, r9
+    stw r12, 0(r10)
+    stw r12, 4(r10)
+    stw r11, 8(r10)
+    stw r11, 12(r10)
+    stw r12, 16(r10)
+    stw r12, 20(r10)
+    stw r11, 24(r10)
+    stw r11, 28(r10)
+    stw r12, 32(r10)
+    stw r12, 36(r10)
+    stw r11, 40(r10)
+    stw r11, 44(r10)
+    stw r11, 48(r10)
+    stw r12, 52(r10)
+    stw r11, 56(r10)
+    stw r11, 60(r10)
+    stw r12, 64(r10)
+    stw r12, 68(r10)
+    stw r12, 72(r10)
+    stw r11, 76(r10)
+    stw r11, 80(r10)
+    stw r12, 84(r10)
+    stw r12, 88(r10)
+    stw r12, 92(r10)
+    add r10, r10, r9
+    stw r12, 0(r10)
+    stw r12, 4(r10)
+    stw r11, 8(r10)
+    stw r11, 12(r10)
+    stw r12, 16(r10)
+    stw r12, 20(r10)
+    stw r11, 24(r10)
+    stw r11, 28(r10)
+    stw r12, 32(r10)
+    stw r12, 36(r10)
+    stw r11, 40(r10)
+    stw r11, 44(r10)
+    stw r12, 48(r10)
+    stw r12, 52(r10)
+    stw r11, 56(r10)
+    stw r11, 60(r10)
+    stw r12, 64(r10)
+    stw r12, 68(r10)
+    stw r12, 72(r10)
+    stw r11, 76(r10)
+    stw r11, 80(r10)
+    stw r12, 84(r10)
+    stw r12, 88(r10)
+    stw r12, 92(r10)
+    add r10, r10, r9
+    stw r12, 0(r10)
+    stw r12, 4(r10)
+    stw r11, 8(r10)
+    stw r11, 12(r10)
+    stw r12, 16(r10)
+    stw r12, 20(r10)
+    stw r11, 24(r10)
+    stw r11, 28(r10)
+    stw r12, 32(r10)
+    stw r12, 36(r10)
+    stw r11, 40(r10)
+    stw r11, 44(r10)
+    stw r12, 48(r10)
+    stw r12, 52(r10)
+    stw r11, 56(r10)
+    stw r11, 60(r10)
+    stw r12, 64(r10)
+    stw r12, 68(r10)
+    stw r12, 72(r10)
+    stw r11, 76(r10)
+    stw r11, 80(r10)
+    stw r12, 84(r10)
+    stw r12, 88(r10)
+    stw r12, 92(r10)
+    add r10, r10, r9
+    stw r12, 0(r10)
+    stw r12, 4(r10)
+    stw r11, 8(r10)
+    stw r11, 12(r10)
+    stw r12, 16(r10)
+    stw r12, 20(r10)
+    stw r11, 24(r10)
+    stw r11, 28(r10)
+    stw r12, 32(r10)
+    stw r12, 36(r10)
+    stw r11, 40(r10)
+    stw r11, 44(r10)
+    stw r12, 48(r10)
+    stw r12, 52(r10)
+    stw r11, 56(r10)
+    stw r11, 60(r10)
+    stw r12, 64(r10)
+    stw r12, 68(r10)
+    stw r12, 72(r10)
+    stw r11, 76(r10)
+    stw r11, 80(r10)
+    stw r12, 84(r10)
+    stw r12, 88(r10)
+    stw r12, 92(r10)
+    add r10, r10, r9
+    stw r12, 0(r10)
+    stw r12, 4(r10)
+    stw r11, 8(r10)
+    stw r11, 12(r10)
+    stw r12, 16(r10)
+    stw r12, 20(r10)
+    stw r11, 24(r10)
+    stw r11, 28(r10)
+    stw r12, 32(r10)
+    stw r12, 36(r10)
+    stw r11, 40(r10)
+    stw r11, 44(r10)
+    stw r12, 48(r10)
+    stw r12, 52(r10)
+    stw r11, 56(r10)
+    stw r11, 60(r10)
+    stw r12, 64(r10)
+    stw r12, 68(r10)
+    stw r12, 72(r10)
+    stw r11, 76(r10)
+    stw r11, 80(r10)
+    stw r12, 84(r10)
+    stw r11, 88(r10)
+    stw r11, 92(r10)
+    add r10, r10, r9
+    stw r12, 0(r10)
+    stw r12, 4(r10)
+    stw r11, 8(r10)
+    stw r11, 12(r10)
+    stw r11, 16(r10)
+    stw r11, 20(r10)
+    stw r11, 24(r10)
+    stw r12, 28(r10)
+    stw r12, 32(r10)
+    stw r11, 36(r10)
+    stw r11, 40(r10)
+    stw r11, 44(r10)
+    stw r12, 48(r10)
+    stw r12, 52(r10)
+    stw r11, 56(r10)
+    stw r11, 60(r10)
+    stw r12, 64(r10)
+    stw r12, 68(r10)
+    stw r12, 72(r10)
+    stw r12, 76(r10)
+    stw r11, 80(r10)
+    stw r11, 84(r10)
+    stw r11, 88(r10)
+    stw r12, 92(r10)
+    add r10, r10, r9
+    stw r12, 0(r10)
+    stw r12, 4(r10)
+    stw r11, 8(r10)
+    stw r11, 12(r10)
+    stw r12, 16(r10)
+    stw r12, 20(r10)
+    stw r12, 24(r10)
+    stw r12, 28(r10)
+    stw r12, 32(r10)
+    stw r12, 36(r10)
+    stw r12, 40(r10)
+    stw r12, 44(r10)
+    stw r12, 48(r10)
+    stw r12, 52(r10)
+    stw r12, 56(r10)
+    stw r12, 60(r10)
+    stw r12, 64(r10)
+    stw r12, 68(r10)
+    stw r12, 72(r10)
+    stw r12, 76(r10)
+    stw r12, 80(r10)
+    stw r12, 84(r10)
+    stw r12, 88(r10)
+    stw r12, 92(r10)
+    add r10, r10, r9
+    stw r12, 0(r10)
+    stw r12, 4(r10)
+    stw r11, 8(r10)
+    stw r11, 12(r10)
+    stw r12, 16(r10)
+    stw r12, 20(r10)
+    stw r12, 24(r10)
+    stw r12, 28(r10)
+    stw r12, 32(r10)
+    stw r12, 36(r10)
+    stw r12, 40(r10)
+    stw r12, 44(r10)
+    stw r12, 48(r10)
+    stw r12, 52(r10)
+    stw r12, 56(r10)
+    stw r12, 60(r10)
+    stw r12, 64(r10)
+    stw r12, 68(r10)
+    stw r12, 72(r10)
+    stw r12, 76(r10)
+    stw r12, 80(r10)
+    stw r12, 84(r10)
+    stw r12, 88(r10)
+    stw r12, 92(r10)
+    add r10, r10, r9
+    stw r12, 0(r10)
+    stw r11, 4(r10)
+    stw r11, 8(r10)
+    stw r11, 12(r10)
+    stw r11, 16(r10)
+    stw r12, 20(r10)
+    stw r12, 24(r10)
+    stw r12, 28(r10)
+    stw r12, 32(r10)
+    stw r12, 36(r10)
+    stw r12, 40(r10)
+    stw r12, 44(r10)
+    stw r12, 48(r10)
+    stw r12, 52(r10)
+    stw r12, 56(r10)
+    stw r12, 60(r10)
+    stw r12, 64(r10)
+    stw r12, 68(r10)
+    stw r12, 72(r10)
+    stw r12, 76(r10)
+    stw r12, 80(r10)
+    stw r12, 84(r10)
+    stw r12, 88(r10)
+    stw r12, 92(r10)
+    add r10, r10, r9
+    stw r12, 0(r10)
+    stw r12, 4(r10)
+    stw r12, 8(r10)
+    stw r12, 12(r10)
+    stw r12, 16(r10)
+    stw r12, 20(r10)
+    stw r12, 24(r10)
+    stw r12, 28(r10)
+    stw r12, 32(r10)
+    stw r12, 36(r10)
+    stw r12, 40(r10)
+    stw r12, 44(r10)
+    stw r12, 48(r10)
+    stw r12, 52(r10)
+    stw r12, 56(r10)
+    stw r12, 60(r10)
+    stw r12, 64(r10)
+    stw r12, 68(r10)
+    stw r12, 72(r10)
+    stw r12, 76(r10)
+    stw r12, 80(r10)
+    stw r12, 84(r10)
+    stw r12, 88(r10)
+    stw r12, 92(r10)
+#endif
+.endm
+.macro DEBUG_end_pht_clear
+#ifdef CONFIG_DEBUG
+    stw r12, 0(r10)
+    stw r12, 4(r10)
+    stw r12, 8(r10)
+    stw r12, 12(r10)
+    stw r12, 16(r10)
+    stw r12, 20(r10)
+    stw r12, 24(r10)
+    stw r12, 28(r10)
+    stw r12, 32(r10)
+    stw r12, 36(r10)
+    stw r12, 40(r10)
+    stw r12, 44(r10)
+    stw r12, 48(r10)
+    stw r12, 52(r10)
+    stw r12, 56(r10)
+    stw r12, 60(r10)
+    stw r12, 64(r10)
+    stw r12, 68(r10)
+    stw r12, 72(r10)
+    stw r12, 76(r10)
+    stw r12, 80(r10)
+    stw r12, 84(r10)
+    stw r12, 88(r10)
+    stw r12, 92(r10)
+    stw r12, 96(r10)
+    stw r12, 100(r10)
+    stw r12, 104(r10)
+    stw r12, 108(r10)
+    stw r12, 112(r10)
+    stw r12, 116(r10)
+    stw r12, 120(r10)
+    stw r12, 124(r10)
+    stw r12, 128(r10)
+    stw r12, 132(r10)
+    stw r12, 136(r10)
+    stw r12, 140(r10)
+    stw r12, 144(r10)
+    stw r12, 148(r10)
+    stw r12, 152(r10)
+    stw r12, 156(r10)
+    stw r12, 160(r10)
+    stw r12, 164(r10)
+    stw r12, 168(r10)
+    stw r12, 172(r10)
+    stw r12, 176(r10)
+    stw r12, 180(r10)
+    stw r12, 184(r10)
+    stw r12, 188(r10)
+    stw r12, 192(r10)
+    stw r12, 196(r10)
+    stw r12, 200(r10)
+    stw r12, 204(r10)
+    stw r12, 208(r10)
+    stw r12, 212(r10)
+    stw r12, 216(r10)
+    stw r12, 220(r10)
+    stw r12, 224(r10)
+    stw r12, 228(r10)
+    stw r12, 232(r10)
+    stw r12, 236(r10)
+    stw r12, 240(r10)
+    stw r12, 244(r10)
+    stw r12, 248(r10)
+    stw r12, 252(r10)
+    stw r12, 256(r10)
+    stw r12, 260(r10)
+    stw r12, 264(r10)
+    stw r12, 268(r10)
+    stw r12, 272(r10)
+    stw r12, 276(r10)
+    stw r12, 280(r10)
+    stw r12, 284(r10)
+    stw r12, 288(r10)
+    stw r12, 292(r10)
+    stw r12, 296(r10)
+    stw r12, 300(r10)
+    stw r12, 304(r10)
+    stw r12, 308(r10)
+    stw r12, 312(r10)
+    stw r12, 316(r10)
+    stw r12, 320(r10)
+    stw r12, 324(r10)
+    stw r12, 328(r10)
+    stw r12, 332(r10)
+    stw r12, 336(r10)
+    stw r12, 340(r10)
+    stw r12, 344(r10)
+    stw r12, 348(r10)
+    stw r12, 352(r10)
+    stw r12, 356(r10)
+    stw r12, 360(r10)
+    stw r12, 364(r10)
+    stw r12, 368(r10)
+    stw r12, 372(r10)
+    stw r12, 376(r10)
+    stw r12, 380(r10)
+    stw r12, 384(r10)
+    stw r12, 388(r10)
+    stw r12, 392(r10)
+    stw r12, 396(r10)
+    stw r12, 400(r10)
+    stw r12, 404(r10)
+    stw r12, 408(r10)
+    stw r12, 412(r10)
+    add r10, r10, r9
+    stw r12, 0(r10)
+    stw r12, 4(r10)
+    stw r12, 8(r10)
+    stw r12, 12(r10)
+    stw r12, 16(r10)
+    stw r12, 20(r10)
+    stw r12, 24(r10)
+    stw r12, 28(r10)
+    stw r12, 32(r10)
+    stw r12, 36(r10)
+    stw r12, 40(r10)
+    stw r12, 44(r10)
+    stw r12, 48(r10)
+    stw r12, 52(r10)
+    stw r12, 56(r10)
+    stw r12, 60(r10)
+    stw r12, 64(r10)
+    stw r12, 68(r10)
+    stw r12, 72(r10)
+    stw r12, 76(r10)
+    stw r12, 80(r10)
+    stw r12, 84(r10)
+    stw r12, 88(r10)
+    stw r12, 92(r10)
+    stw r12, 96(r10)
+    stw r12, 100(r10)
+    stw r12, 104(r10)
+    stw r12, 108(r10)
+    stw r12, 112(r10)
+    stw r12, 116(r10)
+    stw r12, 120(r10)
+    stw r12, 124(r10)
+    stw r12, 128(r10)
+    stw r12, 132(r10)
+    stw r12, 136(r10)
+    stw r12, 140(r10)
+    stw r12, 144(r10)
+    stw r12, 148(r10)
+    stw r12, 152(r10)
+    stw r12, 156(r10)
+    stw r12, 160(r10)
+    stw r12, 164(r10)
+    stw r12, 168(r10)
+    stw r12, 172(r10)
+    stw r12, 176(r10)
+    stw r12, 180(r10)
+    stw r12, 184(r10)
+    stw r12, 188(r10)
+    stw r12, 192(r10)
+    stw r12, 196(r10)
+    stw r12, 200(r10)
+    stw r12, 204(r10)
+    stw r12, 208(r10)
+    stw r12, 212(r10)
+    stw r12, 216(r10)
+    stw r12, 220(r10)
+    stw r12, 224(r10)
+    stw r12, 228(r10)
+    stw r12, 232(r10)
+    stw r12, 236(r10)
+    stw r12, 240(r10)
+    stw r12, 244(r10)
+    stw r12, 248(r10)
+    stw r12, 252(r10)
+    stw r12, 256(r10)
+    stw r12, 260(r10)
+    stw r12, 264(r10)
+    stw r12, 268(r10)
+    stw r12, 272(r10)
+    stw r12, 276(r10)
+    stw r12, 280(r10)
+    stw r12, 284(r10)
+    stw r12, 288(r10)
+    stw r12, 292(r10)
+    stw r12, 296(r10)
+    stw r12, 300(r10)
+    stw r12, 304(r10)
+    stw r12, 308(r10)
+    stw r12, 312(r10)
+    stw r12, 316(r10)
+    stw r12, 320(r10)
+    stw r12, 324(r10)
+    stw r12, 328(r10)
+    stw r12, 332(r10)
+    stw r12, 336(r10)
+    stw r12, 340(r10)
+    stw r12, 344(r10)
+    stw r12, 348(r10)
+    stw r12, 352(r10)
+    stw r12, 356(r10)
+    stw r12, 360(r10)
+    stw r12, 364(r10)
+    stw r12, 368(r10)
+    stw r12, 372(r10)
+    stw r12, 376(r10)
+    stw r12, 380(r10)
+    stw r12, 384(r10)
+    stw r12, 388(r10)
+    stw r12, 392(r10)
+    stw r12, 396(r10)
+    stw r12, 400(r10)
+    stw r12, 404(r10)
+    stw r12, 408(r10)
+    stw r12, 412(r10)
+    add r10, r10, r9
+    stw r12, 0(r10)
+    stw r12, 4(r10)
+    stw r12, 8(r10)
+    stw r12, 12(r10)
+    stw r12, 16(r10)
+    stw r12, 20(r10)
+    stw r12, 24(r10)
+    stw r12, 28(r10)
+    stw r12, 32(r10)
+    stw r12, 36(r10)
+    stw r12, 40(r10)
+    stw r12, 44(r10)
+    stw r12, 48(r10)
+    stw r12, 52(r10)
+    stw r12, 56(r10)
+    stw r12, 60(r10)
+    stw r12, 64(r10)
+    stw r12, 68(r10)
+    stw r12, 72(r10)
+    stw r12, 76(r10)
+    stw r11, 80(r10)
+    stw r11, 84(r10)
+    stw r11, 88(r10)
+    stw r12, 92(r10)
+    stw r12, 96(r10)
+    stw r12, 100(r10)
+    stw r12, 104(r10)
+    stw r12, 108(r10)
+    stw r12, 112(r10)
+    stw r12, 116(r10)
+    stw r12, 120(r10)
+    stw r12, 124(r10)
+    stw r12, 128(r10)
+    stw r12, 132(r10)
+    stw r12, 136(r10)
+    stw r12, 140(r10)
+    stw r12, 144(r10)
+    stw r12, 148(r10)
+    stw r12, 152(r10)
+    stw r12, 156(r10)
+    stw r12, 160(r10)
+    stw r11, 164(r10)
+    stw r11, 168(r10)
+    stw r11, 172(r10)
+    stw r12, 176(r10)
+    stw r12, 180(r10)
+    stw r12, 184(r10)
+    stw r12, 188(r10)
+    stw r12, 192(r10)
+    stw r12, 196(r10)
+    stw r12, 200(r10)
+    stw r12, 204(r10)
+    stw r11, 208(r10)
+    stw r12, 212(r10)
+    stw r12, 216(r10)
+    stw r12, 220(r10)
+    stw r12, 224(r10)
+    stw r12, 228(r10)
+    stw r12, 232(r10)
+    stw r12, 236(r10)
+    stw r12, 240(r10)
+    stw r12, 244(r10)
+    stw r12, 248(r10)
+    stw r12, 252(r10)
+    stw r12, 256(r10)
+    stw r12, 260(r10)
+    stw r12, 264(r10)
+    stw r12, 268(r10)
+    stw r12, 272(r10)
+    stw r12, 276(r10)
+    stw r12, 280(r10)
+    stw r12, 284(r10)
+    stw r12, 288(r10)
+    stw r12, 292(r10)
+    stw r12, 296(r10)
+    stw r11, 300(r10)
+    stw r11, 304(r10)
+    stw r11, 308(r10)
+    stw r12, 312(r10)
+    stw r12, 316(r10)
+    stw r12, 320(r10)
+    stw r12, 324(r10)
+    stw r12, 328(r10)
+    stw r12, 332(r10)
+    stw r12, 336(r10)
+    stw r12, 340(r10)
+    stw r12, 344(r10)
+    stw r12, 348(r10)
+    stw r12, 352(r10)
+    stw r12, 356(r10)
+    stw r12, 360(r10)
+    stw r12, 364(r10)
+    stw r12, 368(r10)
+    stw r12, 372(r10)
+    stw r12, 376(r10)
+    stw r12, 380(r10)
+    stw r12, 384(r10)
+    stw r12, 388(r10)
+    stw r12, 392(r10)
+    stw r12, 396(r10)
+    stw r12, 400(r10)
+    stw r12, 404(r10)
+    stw r12, 408(r10)
+    stw r12, 412(r10)
+    add r10, r10, r9
+    stw r12, 0(r10)
+    stw r12, 4(r10)
+    stw r12, 8(r10)
+    stw r12, 12(r10)
+    stw r12, 16(r10)
+    stw r12, 20(r10)
+    stw r12, 24(r10)
+    stw r12, 28(r10)
+    stw r12, 32(r10)
+    stw r12, 36(r10)
+    stw r12, 40(r10)
+    stw r12, 44(r10)
+    stw r12, 48(r10)
+    stw r12, 52(r10)
+    stw r12, 56(r10)
+    stw r12, 60(r10)
+    stw r12, 64(r10)
+    stw r12, 68(r10)
+    stw r12, 72(r10)
+    stw r12, 76(r10)
+    stw r12, 80(r10)
+    stw r11, 84(r10)
+    stw r11, 88(r10)
+    stw r12, 92(r10)
+    stw r12, 96(r10)
+    stw r12, 100(r10)
+    stw r12, 104(r10)
+    stw r12, 108(r10)
+    stw r12, 112(r10)
+    stw r12, 116(r10)
+    stw r12, 120(r10)
+    stw r12, 124(r10)
+    stw r12, 128(r10)
+    stw r12, 132(r10)
+    stw r12, 136(r10)
+    stw r12, 140(r10)
+    stw r12, 144(r10)
+    stw r12, 148(r10)
+    stw r12, 152(r10)
+    stw r12, 156(r10)
+    stw r12, 160(r10)
+    stw r12, 164(r10)
+    stw r11, 168(r10)
+    stw r11, 172(r10)
+    stw r12, 176(r10)
+    stw r12, 180(r10)
+    stw r12, 184(r10)
+    stw r12, 188(r10)
+    stw r12, 192(r10)
+    stw r12, 196(r10)
+    stw r12, 200(r10)
+    stw r11, 204(r10)
+    stw r11, 208(r10)
+    stw r12, 212(r10)
+    stw r12, 216(r10)
+    stw r12, 220(r10)
+    stw r12, 224(r10)
+    stw r12, 228(r10)
+    stw r12, 232(r10)
+    stw r12, 236(r10)
+    stw r12, 240(r10)
+    stw r12, 244(r10)
+    stw r12, 248(r10)
+    stw r12, 252(r10)
+    stw r12, 256(r10)
+    stw r12, 260(r10)
+    stw r12, 264(r10)
+    stw r12, 268(r10)
+    stw r12, 272(r10)
+    stw r12, 276(r10)
+    stw r12, 280(r10)
+    stw r12, 284(r10)
+    stw r12, 288(r10)
+    stw r12, 292(r10)
+    stw r12, 296(r10)
+    stw r12, 300(r10)
+    stw r11, 304(r10)
+    stw r11, 308(r10)
+    stw r12, 312(r10)
+    stw r12, 316(r10)
+    stw r12, 320(r10)
+    stw r12, 324(r10)
+    stw r12, 328(r10)
+    stw r12, 332(r10)
+    stw r12, 336(r10)
+    stw r12, 340(r10)
+    stw r12, 344(r10)
+    stw r12, 348(r10)
+    stw r12, 352(r10)
+    stw r12, 356(r10)
+    stw r12, 360(r10)
+    stw r12, 364(r10)
+    stw r12, 368(r10)
+    stw r12, 372(r10)
+    stw r12, 376(r10)
+    stw r12, 380(r10)
+    stw r12, 384(r10)
+    stw r12, 388(r10)
+    stw r12, 392(r10)
+    stw r12, 396(r10)
+    stw r12, 400(r10)
+    stw r12, 404(r10)
+    stw r12, 408(r10)
+    stw r12, 412(r10)
+    add r10, r10, r9
+    stw r12, 0(r10)
+    stw r12, 4(r10)
+    stw r12, 8(r10)
+    stw r12, 12(r10)
+    stw r12, 16(r10)
+    stw r12, 20(r10)
+    stw r12, 24(r10)
+    stw r12, 28(r10)
+    stw r12, 32(r10)
+    stw r12, 36(r10)
+    stw r12, 40(r10)
+    stw r12, 44(r10)
+    stw r12, 48(r10)
+    stw r12, 52(r10)
+    stw r12, 56(r10)
+    stw r12, 60(r10)
+    stw r12, 64(r10)
+    stw r12, 68(r10)
+    stw r12, 72(r10)
+    stw r12, 76(r10)
+    stw r12, 80(r10)
+    stw r11, 84(r10)
+    stw r11, 88(r10)
+    stw r12, 92(r10)
+    stw r12, 96(r10)
+    stw r12, 100(r10)
+    stw r12, 104(r10)
+    stw r12, 108(r10)
+    stw r12, 112(r10)
+    stw r12, 116(r10)
+    stw r12, 120(r10)
+    stw r12, 124(r10)
+    stw r12, 128(r10)
+    stw r12, 132(r10)
+    stw r12, 136(r10)
+    stw r12, 140(r10)
+    stw r12, 144(r10)
+    stw r12, 148(r10)
+    stw r12, 152(r10)
+    stw r12, 156(r10)
+    stw r12, 160(r10)
+    stw r12, 164(r10)
+    stw r11, 168(r10)
+    stw r11, 172(r10)
+    stw r12, 176(r10)
+    stw r12, 180(r10)
+    stw r12, 184(r10)
+    stw r12, 188(r10)
+    stw r12, 192(r10)
+    stw r12, 196(r10)
+    stw r12, 200(r10)
+    stw r11, 204(r10)
+    stw r11, 208(r10)
+    stw r12, 212(r10)
+    stw r12, 216(r10)
+    stw r12, 220(r10)
+    stw r12, 224(r10)
+    stw r12, 228(r10)
+    stw r12, 232(r10)
+    stw r12, 236(r10)
+    stw r12, 240(r10)
+    stw r12, 244(r10)
+    stw r12, 248(r10)
+    stw r12, 252(r10)
+    stw r12, 256(r10)
+    stw r12, 260(r10)
+    stw r12, 264(r10)
+    stw r12, 268(r10)
+    stw r12, 272(r10)
+    stw r12, 276(r10)
+    stw r12, 280(r10)
+    stw r12, 284(r10)
+    stw r12, 288(r10)
+    stw r12, 292(r10)
+    stw r12, 296(r10)
+    stw r12, 300(r10)
+    stw r11, 304(r10)
+    stw r11, 308(r10)
+    stw r12, 312(r10)
+    stw r12, 316(r10)
+    stw r12, 320(r10)
+    stw r12, 324(r10)
+    stw r12, 328(r10)
+    stw r12, 332(r10)
+    stw r12, 336(r10)
+    stw r12, 340(r10)
+    stw r12, 344(r10)
+    stw r12, 348(r10)
+    stw r12, 352(r10)
+    stw r12, 356(r10)
+    stw r12, 360(r10)
+    stw r12, 364(r10)
+    stw r12, 368(r10)
+    stw r12, 372(r10)
+    stw r12, 376(r10)
+    stw r12, 380(r10)
+    stw r12, 384(r10)
+    stw r12, 388(r10)
+    stw r12, 392(r10)
+    stw r12, 396(r10)
+    stw r12, 400(r10)
+    stw r12, 404(r10)
+    stw r12, 408(r10)
+    stw r12, 412(r10)
+    add r10, r10, r9
+    stw r12, 0(r10)
+    stw r12, 4(r10)
+    stw r11, 8(r10)
+    stw r11, 12(r10)
+    stw r11, 16(r10)
+    stw r11, 20(r10)
+    stw r11, 24(r10)
+    stw r12, 28(r10)
+    stw r12, 32(r10)
+    stw r11, 36(r10)
+    stw r11, 40(r10)
+    stw r12, 44(r10)
+    stw r11, 48(r10)
+    stw r11, 52(r10)
+    stw r11, 56(r10)
+    stw r12, 60(r10)
+    stw r12, 64(r10)
+    stw r12, 68(r10)
+    stw r12, 72(r10)
+    stw r11, 76(r10)
+    stw r11, 80(r10)
+    stw r11, 84(r10)
+    stw r11, 88(r10)
+    stw r12, 92(r10)
+    stw r12, 96(r10)
+    stw r12, 100(r10)
+    stw r12, 104(r10)
+    stw r12, 108(r10)
+    stw r12, 112(r10)
+    stw r12, 116(r10)
+    stw r12, 120(r10)
+    stw r12, 124(r10)
+    stw r12, 128(r10)
+    stw r11, 132(r10)
+    stw r11, 136(r10)
+    stw r12, 140(r10)
+    stw r11, 144(r10)
+    stw r11, 148(r10)
+    stw r11, 152(r10)
+    stw r12, 156(r10)
+    stw r12, 160(r10)
+    stw r12, 164(r10)
+    stw r11, 168(r10)
+    stw r11, 172(r10)
+    stw r12, 176(r10)
+    stw r11, 180(r10)
+    stw r11, 184(r10)
+    stw r12, 188(r10)
+    stw r12, 192(r10)
+    stw r11, 196(r10)
+    stw r11, 200(r10)
+    stw r11, 204(r10)
+    stw r11, 208(r10)
+    stw r11, 212(r10)
+    stw r11, 216(r10)
+    stw r12, 220(r10)
+    stw r12, 224(r10)
+    stw r12, 228(r10)
+    stw r12, 232(r10)
+    stw r12, 236(r10)
+    stw r12, 240(r10)
+    stw r12, 244(r10)
+    stw r12, 248(r10)
+    stw r12, 252(r10)
+    stw r12, 256(r10)
+    stw r12, 260(r10)
+    stw r11, 264(r10)
+    stw r11, 268(r10)
+    stw r11, 272(r10)
+    stw r11, 276(r10)
+    stw r11, 280(r10)
+    stw r12, 284(r10)
+    stw r12, 288(r10)
+    stw r12, 292(r10)
+    stw r12, 296(r10)
+    stw r12, 300(r10)
+    stw r11, 304(r10)
+    stw r11, 308(r10)
+    stw r12, 312(r10)
+    stw r12, 316(r10)
+    stw r12, 320(r10)
+    stw r12, 324(r10)
+    stw r11, 328(r10)
+    stw r11, 332(r10)
+    stw r11, 336(r10)
+    stw r11, 340(r10)
+    stw r11, 344(r10)
+    stw r12, 348(r10)
+    stw r12, 352(r10)
+    stw r12, 356(r10)
+    stw r11, 360(r10)
+    stw r11, 364(r10)
+    stw r11, 368(r10)
+    stw r11, 372(r10)
+    stw r12, 376(r10)
+    stw r12, 380(r10)
+    stw r12, 384(r10)
+    stw r11, 388(r10)
+    stw r11, 392(r10)
+    stw r12, 396(r10)
+    stw r11, 400(r10)
+    stw r11, 404(r10)
+    stw r11, 408(r10)
+    stw r12, 412(r10)
+    add r10, r10, r9
+    stw r12, 0(r10)
+    stw r11, 4(r10)
+    stw r11, 8(r10)
+    stw r12, 12(r10)
+    stw r12, 16(r10)
+    stw r12, 20(r10)
+    stw r11, 24(r10)
+    stw r11, 28(r10)
+    stw r12, 32(r10)
+    stw r12, 36(r10)
+    stw r11, 40(r10)
+    stw r11, 44(r10)
+    stw r12, 48(r10)
+    stw r12, 52(r10)
+    stw r11, 56(r10)
+    stw r11, 60(r10)
+    stw r12, 64(r10)
+    stw r12, 68(r10)
+    stw r11, 72(r10)
+    stw r11, 76(r10)
+    stw r12, 80(r10)
+    stw r11, 84(r10)
+    stw r11, 88(r10)
+    stw r12, 92(r10)
+    stw r12, 96(r10)
+    stw r12, 100(r10)
+    stw r12, 104(r10)
+    stw r12, 108(r10)
+    stw r12, 112(r10)
+    stw r12, 116(r10)
+    stw r12, 120(r10)
+    stw r12, 124(r10)
+    stw r12, 128(r10)
+    stw r12, 132(r10)
+    stw r11, 136(r10)
+    stw r11, 140(r10)
+    stw r12, 144(r10)
+    stw r12, 148(r10)
+    stw r11, 152(r10)
+    stw r11, 156(r10)
+    stw r12, 160(r10)
+    stw r12, 164(r10)
+    stw r11, 168(r10)
+    stw r11, 172(r10)
+    stw r11, 176(r10)
+    stw r12, 180(r10)
+    stw r11, 184(r10)
+    stw r11, 188(r10)
+    stw r12, 192(r10)
+    stw r12, 196(r10)
+    stw r12, 200(r10)
+    stw r11, 204(r10)
+    stw r11, 208(r10)
+    stw r12, 212(r10)
+    stw r12, 216(r10)
+    stw r12, 220(r10)
+    stw r12, 224(r10)
+    stw r12, 228(r10)
+    stw r12, 232(r10)
+    stw r12, 236(r10)
+    stw r12, 240(r10)
+    stw r12, 244(r10)
+    stw r12, 248(r10)
+    stw r12, 252(r10)
+    stw r12, 256(r10)
+    stw r11, 260(r10)
+    stw r11, 264(r10)
+    stw r12, 268(r10)
+    stw r12, 272(r10)
+    stw r12, 276(r10)
+    stw r11, 280(r10)
+    stw r11, 284(r10)
+    stw r12, 288(r10)
+    stw r12, 292(r10)
+    stw r12, 296(r10)
+    stw r12, 300(r10)
+    stw r11, 304(r10)
+    stw r11, 308(r10)
+    stw r12, 312(r10)
+    stw r12, 316(r10)
+    stw r12, 320(r10)
+    stw r11, 324(r10)
+    stw r11, 328(r10)
+    stw r12, 332(r10)
+    stw r12, 336(r10)
+    stw r12, 340(r10)
+    stw r11, 344(r10)
+    stw r11, 348(r10)
+    stw r12, 352(r10)
+    stw r12, 356(r10)
+    stw r12, 360(r10)
+    stw r12, 364(r10)
+    stw r12, 368(r10)
+    stw r11, 372(r10)
+    stw r11, 376(r10)
+    stw r12, 380(r10)
+    stw r12, 384(r10)
+    stw r12, 388(r10)
+    stw r11, 392(r10)
+    stw r11, 396(r10)
+    stw r11, 400(r10)
+    stw r12, 404(r10)
+    stw r11, 408(r10)
+    stw r11, 412(r10)
+    add r10, r10, r9
+    stw r12, 0(r10)
+    stw r11, 4(r10)
+    stw r11, 8(r10)
+    stw r11, 12(r10)
+    stw r11, 16(r10)
+    stw r11, 20(r10)
+    stw r11, 24(r10)
+    stw r11, 28(r10)
+    stw r12, 32(r10)
+    stw r12, 36(r10)
+    stw r11, 40(r10)
+    stw r11, 44(r10)
+    stw r12, 48(r10)
+    stw r12, 52(r10)
+    stw r11, 56(r10)
+    stw r11, 60(r10)
+    stw r12, 64(r10)
+    stw r11, 68(r10)
+    stw r11, 72(r10)
+    stw r12, 76(r10)
+    stw r12, 80(r10)
+    stw r11, 84(r10)
+    stw r11, 88(r10)
+    stw r12, 92(r10)
+    stw r12, 96(r10)
+    stw r12, 100(r10)
+    stw r12, 104(r10)
+    stw r12, 108(r10)
+    stw r12, 112(r10)
+    stw r12, 116(r10)
+    stw r12, 120(r10)
+    stw r12, 124(r10)
+    stw r12, 128(r10)
+    stw r12, 132(r10)
+    stw r11, 136(r10)
+    stw r11, 140(r10)
+    stw r12, 144(r10)
+    stw r12, 148(r10)
+    stw r11, 152(r10)
+    stw r11, 156(r10)
+    stw r12, 160(r10)
+    stw r12, 164(r10)
+    stw r11, 168(r10)
+    stw r11, 172(r10)
+    stw r12, 176(r10)
+    stw r12, 180(r10)
+    stw r11, 184(r10)
+    stw r11, 188(r10)
+    stw r12, 192(r10)
+    stw r12, 196(r10)
+    stw r12, 200(r10)
+    stw r11, 204(r10)
+    stw r11, 208(r10)
+    stw r12, 212(r10)
+    stw r12, 216(r10)
+    stw r12, 220(r10)
+    stw r12, 224(r10)
+    stw r12, 228(r10)
+    stw r12, 232(r10)
+    stw r12, 236(r10)
+    stw r12, 240(r10)
+    stw r12, 244(r10)
+    stw r12, 248(r10)
+    stw r12, 252(r10)
+    stw r12, 256(r10)
+    stw r11, 260(r10)
+    stw r11, 264(r10)
+    stw r12, 268(r10)
+    stw r12, 272(r10)
+    stw r12, 276(r10)
+    stw r12, 280(r10)
+    stw r12, 284(r10)
+    stw r12, 288(r10)
+    stw r12, 292(r10)
+    stw r12, 296(r10)
+    stw r12, 300(r10)
+    stw r11, 304(r10)
+    stw r11, 308(r10)
+    stw r12, 312(r10)
+    stw r12, 316(r10)
+    stw r12, 320(r10)
+    stw r11, 324(r10)
+    stw r11, 328(r10)
+    stw r11, 332(r10)
+    stw r11, 336(r10)
+    stw r11, 340(r10)
+    stw r11, 344(r10)
+    stw r11, 348(r10)
+    stw r12, 352(r10)
+    stw r12, 356(r10)
+    stw r11, 360(r10)
+    stw r11, 364(r10)
+    stw r11, 368(r10)
+    stw r11, 372(r10)
+    stw r11, 376(r10)
+    stw r12, 380(r10)
+    stw r12, 384(r10)
+    stw r12, 388(r10)
+    stw r11, 392(r10)
+    stw r11, 396(r10)
+    stw r12, 400(r10)
+    stw r12, 404(r10)
+    stw r11, 408(r10)
+    stw r11, 412(r10)
+    add r10, r10, r9
+    stw r12, 0(r10)
+    stw r11, 4(r10)
+    stw r11, 8(r10)
+    stw r12, 12(r10)
+    stw r12, 16(r10)
+    stw r12, 20(r10)
+    stw r12, 24(r10)
+    stw r12, 28(r10)
+    stw r12, 32(r10)
+    stw r12, 36(r10)
+    stw r11, 40(r10)
+    stw r11, 44(r10)
+    stw r12, 48(r10)
+    stw r12, 52(r10)
+    stw r11, 56(r10)
+    stw r11, 60(r10)
+    stw r12, 64(r10)
+    stw r11, 68(r10)
+    stw r11, 72(r10)
+    stw r12, 76(r10)
+    stw r12, 80(r10)
+    stw r11, 84(r10)
+    stw r11, 88(r10)
+    stw r12, 92(r10)
+    stw r12, 96(r10)
+    stw r12, 100(r10)
+    stw r12, 104(r10)
+    stw r12, 108(r10)
+    stw r12, 112(r10)
+    stw r12, 116(r10)
+    stw r12, 120(r10)
+    stw r12, 124(r10)
+    stw r12, 128(r10)
+    stw r12, 132(r10)
+    stw r11, 136(r10)
+    stw r11, 140(r10)
+    stw r12, 144(r10)
+    stw r12, 148(r10)
+    stw r11, 152(r10)
+    stw r11, 156(r10)
+    stw r12, 160(r10)
+    stw r12, 164(r10)
+    stw r11, 168(r10)
+    stw r11, 172(r10)
+    stw r12, 176(r10)
+    stw r12, 180(r10)
+    stw r11, 184(r10)
+    stw r11, 188(r10)
+    stw r12, 192(r10)
+    stw r12, 196(r10)
+    stw r12, 200(r10)
+    stw r11, 204(r10)
+    stw r11, 208(r10)
+    stw r12, 212(r10)
+    stw r12, 216(r10)
+    stw r12, 220(r10)
+    stw r12, 224(r10)
+    stw r12, 228(r10)
+    stw r12, 232(r10)
+    stw r12, 236(r10)
+    stw r12, 240(r10)
+    stw r12, 244(r10)
+    stw r12, 248(r10)
+    stw r12, 252(r10)
+    stw r12, 256(r10)
+    stw r11, 260(r10)
+    stw r11, 264(r10)
+    stw r12, 268(r10)
+    stw r12, 272(r10)
+    stw r12, 276(r10)
+    stw r12, 280(r10)
+    stw r12, 284(r10)
+    stw r12, 288(r10)
+    stw r12, 292(r10)
+    stw r12, 296(r10)
+    stw r12, 300(r10)
+    stw r11, 304(r10)
+    stw r11, 308(r10)
+    stw r12, 312(r10)
+    stw r12, 316(r10)
+    stw r12, 320(r10)
+    stw r11, 324(r10)
+    stw r11, 328(r10)
+    stw r12, 332(r10)
+    stw r12, 336(r10)
+    stw r12, 340(r10)
+    stw r12, 344(r10)
+    stw r12, 348(r10)
+    stw r12, 352(r10)
+    stw r11, 356(r10)
+    stw r11, 360(r10)
+    stw r12, 364(r10)
+    stw r12, 368(r10)
+    stw r11, 372(r10)
+    stw r11, 376(r10)
+    stw r12, 380(r10)
+    stw r12, 384(r10)
+    stw r12, 388(r10)
+    stw r11, 392(r10)
+    stw r11, 396(r10)
+    stw r12, 400(r10)
+    stw r12, 404(r10)
+    stw r12, 408(r10)
+    stw r12, 412(r10)
+    add r10, r10, r9
+    stw r12, 0(r10)
+    stw r11, 4(r10)
+    stw r11, 8(r10)
+    stw r12, 12(r10)
+    stw r12, 16(r10)
+    stw r12, 20(r10)
+    stw r12, 24(r10)
+    stw r12, 28(r10)
+    stw r12, 32(r10)
+    stw r12, 36(r10)
+    stw r11, 40(r10)
+    stw r11, 44(r10)
+    stw r12, 48(r10)
+    stw r12, 52(r10)
+    stw r11, 56(r10)
+    stw r11, 60(r10)
+    stw r12, 64(r10)
+    stw r11, 68(r10)
+    stw r11, 72(r10)
+    stw r12, 76(r10)
+    stw r12, 80(r10)
+    stw r11, 84(r10)
+    stw r11, 88(r10)
+    stw r12, 92(r10)
+    stw r12, 96(r10)
+    stw r12, 100(r10)
+    stw r12, 104(r10)
+    stw r12, 108(r10)
+    stw r12, 112(r10)
+    stw r12, 116(r10)
+    stw r12, 120(r10)
+    stw r12, 124(r10)
+    stw r12, 128(r10)
+    stw r12, 132(r10)
+    stw r11, 136(r10)
+    stw r11, 140(r10)
+    stw r12, 144(r10)
+    stw r12, 148(r10)
+    stw r11, 152(r10)
+    stw r11, 156(r10)
+    stw r12, 160(r10)
+    stw r12, 164(r10)
+    stw r11, 168(r10)
+    stw r11, 172(r10)
+    stw r12, 176(r10)
+    stw r12, 180(r10)
+    stw r11, 184(r10)
+    stw r11, 188(r10)
+    stw r12, 192(r10)
+    stw r12, 196(r10)
+    stw r12, 200(r10)
+    stw r11, 204(r10)
+    stw r11, 208(r10)
+    stw r12, 212(r10)
+    stw r12, 216(r10)
+    stw r12, 220(r10)
+    stw r12, 224(r10)
+    stw r12, 228(r10)
+    stw r12, 232(r10)
+    stw r12, 236(r10)
+    stw r12, 240(r10)
+    stw r12, 244(r10)
+    stw r12, 248(r10)
+    stw r12, 252(r10)
+    stw r12, 256(r10)
+    stw r11, 260(r10)
+    stw r11, 264(r10)
+    stw r12, 268(r10)
+    stw r12, 272(r10)
+    stw r12, 276(r10)
+    stw r12, 280(r10)
+    stw r12, 284(r10)
+    stw r12, 288(r10)
+    stw r12, 292(r10)
+    stw r12, 296(r10)
+    stw r12, 300(r10)
+    stw r11, 304(r10)
+    stw r11, 308(r10)
+    stw r12, 312(r10)
+    stw r12, 316(r10)
+    stw r12, 320(r10)
+    stw r11, 324(r10)
+    stw r11, 328(r10)
+    stw r12, 332(r10)
+    stw r12, 336(r10)
+    stw r12, 340(r10)
+    stw r12, 344(r10)
+    stw r12, 348(r10)
+    stw r12, 352(r10)
+    stw r11, 356(r10)
+    stw r11, 360(r10)
+    stw r12, 364(r10)
+    stw r12, 368(r10)
+    stw r11, 372(r10)
+    stw r11, 376(r10)
+    stw r12, 380(r10)
+    stw r12, 384(r10)
+    stw r12, 388(r10)
+    stw r11, 392(r10)
+    stw r11, 396(r10)
+    stw r12, 400(r10)
+    stw r12, 404(r10)
+    stw r12, 408(r10)
+    stw r12, 412(r10)
+    add r10, r10, r9
+    stw r12, 0(r10)
+    stw r11, 4(r10)
+    stw r11, 8(r10)
+    stw r12, 12(r10)
+    stw r12, 16(r10)
+    stw r12, 20(r10)
+    stw r11, 24(r10)
+    stw r11, 28(r10)
+    stw r12, 32(r10)
+    stw r12, 36(r10)
+    stw r11, 40(r10)
+    stw r11, 44(r10)
+    stw r12, 48(r10)
+    stw r12, 52(r10)
+    stw r11, 56(r10)
+    stw r11, 60(r10)
+    stw r12, 64(r10)
+    stw r11, 68(r10)
+    stw r11, 72(r10)
+    stw r12, 76(r10)
+    stw r12, 80(r10)
+    stw r11, 84(r10)
+    stw r11, 88(r10)
+    stw r12, 92(r10)
+    stw r12, 96(r10)
+    stw r12, 100(r10)
+    stw r12, 104(r10)
+    stw r12, 108(r10)
+    stw r12, 112(r10)
+    stw r12, 116(r10)
+    stw r12, 120(r10)
+    stw r12, 124(r10)
+    stw r12, 128(r10)
+    stw r12, 132(r10)
+    stw r11, 136(r10)
+    stw r11, 140(r10)
+    stw r12, 144(r10)
+    stw r12, 148(r10)
+    stw r11, 152(r10)
+    stw r11, 156(r10)
+    stw r12, 160(r10)
+    stw r12, 164(r10)
+    stw r11, 168(r10)
+    stw r11, 172(r10)
+    stw r12, 176(r10)
+    stw r12, 180(r10)
+    stw r11, 184(r10)
+    stw r11, 188(r10)
+    stw r12, 192(r10)
+    stw r12, 196(r10)
+    stw r12, 200(r10)
+    stw r11, 204(r10)
+    stw r11, 208(r10)
+    stw r12, 212(r10)
+    stw r11, 216(r10)
+    stw r11, 220(r10)
+    stw r12, 224(r10)
+    stw r12, 228(r10)
+    stw r12, 232(r10)
+    stw r12, 236(r10)
+    stw r12, 240(r10)
+    stw r12, 244(r10)
+    stw r12, 248(r10)
+    stw r12, 252(r10)
+    stw r12, 256(r10)
+    stw r11, 260(r10)
+    stw r11, 264(r10)
+    stw r12, 268(r10)
+    stw r12, 272(r10)
+    stw r12, 276(r10)
+    stw r11, 280(r10)
+    stw r11, 284(r10)
+    stw r12, 288(r10)
+    stw r12, 292(r10)
+    stw r12, 296(r10)
+    stw r12, 300(r10)
+    stw r11, 304(r10)
+    stw r11, 308(r10)
+    stw r12, 312(r10)
+    stw r12, 316(r10)
+    stw r12, 320(r10)
+    stw r11, 324(r10)
+    stw r11, 328(r10)
+    stw r12, 332(r10)
+    stw r12, 336(r10)
+    stw r12, 340(r10)
+    stw r11, 344(r10)
+    stw r11, 348(r10)
+    stw r12, 352(r10)
+    stw r11, 356(r10)
+    stw r11, 360(r10)
+    stw r12, 364(r10)
+    stw r12, 368(r10)
+    stw r11, 372(r10)
+    stw r11, 376(r10)
+    stw r12, 380(r10)
+    stw r12, 384(r10)
+    stw r12, 388(r10)
+    stw r11, 392(r10)
+    stw r11, 396(r10)
+    stw r12, 400(r10)
+    stw r12, 404(r10)
+    stw r12, 408(r10)
+    stw r12, 412(r10)
+    add r10, r10, r9
+    stw r12, 0(r10)
+    stw r12, 4(r10)
+    stw r11, 8(r10)
+    stw r11, 12(r10)
+    stw r11, 16(r10)
+    stw r11, 20(r10)
+    stw r11, 24(r10)
+    stw r12, 28(r10)
+    stw r12, 32(r10)
+    stw r12, 36(r10)
+    stw r11, 40(r10)
+    stw r11, 44(r10)
+    stw r12, 48(r10)
+    stw r12, 52(r10)
+    stw r11, 56(r10)
+    stw r11, 60(r10)
+    stw r12, 64(r10)
+    stw r12, 68(r10)
+    stw r11, 72(r10)
+    stw r11, 76(r10)
+    stw r11, 80(r10)
+    stw r12, 84(r10)
+    stw r11, 88(r10)
+    stw r11, 92(r10)
+    stw r12, 96(r10)
+    stw r12, 100(r10)
+    stw r12, 104(r10)
+    stw r12, 108(r10)
+    stw r12, 112(r10)
+    stw r12, 116(r10)
+    stw r12, 120(r10)
+    stw r12, 124(r10)
+    stw r12, 128(r10)
+    stw r12, 132(r10)
+    stw r11, 136(r10)
+    stw r11, 140(r10)
+    stw r11, 144(r10)
+    stw r11, 148(r10)
+    stw r11, 152(r10)
+    stw r12, 156(r10)
+    stw r12, 160(r10)
+    stw r11, 164(r10)
+    stw r11, 168(r10)
+    stw r11, 172(r10)
+    stw r12, 176(r10)
+    stw r12, 180(r10)
+    stw r11, 184(r10)
+    stw r11, 188(r10)
+    stw r12, 192(r10)
+    stw r12, 196(r10)
+    stw r12, 200(r10)
+    stw r12, 204(r10)
+    stw r11, 208(r10)
+    stw r11, 212(r10)
+    stw r11, 216(r10)
+    stw r12, 220(r10)
+    stw r12, 224(r10)
+    stw r12, 228(r10)
+    stw r12, 232(r10)
+    stw r12, 236(r10)
+    stw r12, 240(r10)
+    stw r12, 244(r10)
+    stw r12, 248(r10)
+    stw r12, 252(r10)
+    stw r12, 256(r10)
+    stw r12, 260(r10)
+    stw r11, 264(r10)
+    stw r11, 268(r10)
+    stw r11, 272(r10)
+    stw r11, 276(r10)
+    stw r11, 280(r10)
+    stw r12, 284(r10)
+    stw r12, 288(r10)
+    stw r12, 292(r10)
+    stw r12, 296(r10)
+    stw r11, 300(r10)
+    stw r11, 304(r10)
+    stw r11, 308(r10)
+    stw r11, 312(r10)
+    stw r12, 316(r10)
+    stw r12, 320(r10)
+    stw r12, 324(r10)
+    stw r11, 328(r10)
+    stw r11, 332(r10)
+    stw r11, 336(r10)
+    stw r11, 340(r10)
+    stw r11, 344(r10)
+    stw r12, 348(r10)
+    stw r12, 352(r10)
+    stw r12, 356(r10)
+    stw r11, 360(r10)
+    stw r11, 364(r10)
+    stw r11, 368(r10)
+    stw r12, 372(r10)
+    stw r11, 376(r10)
+    stw r11, 380(r10)
+    stw r12, 384(r10)
+    stw r11, 388(r10)
+    stw r11, 392(r10)
+    stw r11, 396(r10)
+    stw r11, 400(r10)
+    stw r12, 404(r10)
+    stw r12, 408(r10)
+    stw r12, 412(r10)
+    add r10, r10, r9
+    stw r12, 0(r10)
+    stw r12, 4(r10)
+    stw r12, 8(r10)
+    stw r12, 12(r10)
+    stw r12, 16(r10)
+    stw r12, 20(r10)
+    stw r12, 24(r10)
+    stw r12, 28(r10)
+    stw r12, 32(r10)
+    stw r12, 36(r10)
+    stw r12, 40(r10)
+    stw r12, 44(r10)
+    stw r12, 48(r10)
+    stw r12, 52(r10)
+    stw r12, 56(r10)
+    stw r12, 60(r10)
+    stw r12, 64(r10)
+    stw r12, 68(r10)
+    stw r12, 72(r10)
+    stw r12, 76(r10)
+    stw r12, 80(r10)
+    stw r12, 84(r10)
+    stw r12, 88(r10)
+    stw r12, 92(r10)
+    stw r12, 96(r10)
+    stw r12, 100(r10)
+    stw r12, 104(r10)
+    stw r12, 108(r10)
+    stw r12, 112(r10)
+    stw r12, 116(r10)
+    stw r12, 120(r10)
+    stw r12, 124(r10)
+    stw r12, 128(r10)
+    stw r12, 132(r10)
+    stw r11, 136(r10)
+    stw r11, 140(r10)
+    stw r12, 144(r10)
+    stw r12, 148(r10)
+    stw r12, 152(r10)
+    stw r12, 156(r10)
+    stw r12, 160(r10)
+    stw r12, 164(r10)
+    stw r12, 168(r10)
+    stw r12, 172(r10)
+    stw r12, 176(r10)
+    stw r12, 180(r10)
+    stw r12, 184(r10)
+    stw r12, 188(r10)
+    stw r12, 192(r10)
+    stw r12, 196(r10)
+    stw r12, 200(r10)
+    stw r12, 204(r10)
+    stw r12, 208(r10)
+    stw r12, 212(r10)
+    stw r12, 216(r10)
+    stw r12, 220(r10)
+    stw r12, 224(r10)
+    stw r12, 228(r10)
+    stw r12, 232(r10)
+    stw r12, 236(r10)
+    stw r12, 240(r10)
+    stw r12, 244(r10)
+    stw r12, 248(r10)
+    stw r12, 252(r10)
+    stw r12, 256(r10)
+    stw r12, 260(r10)
+    stw r12, 264(r10)
+    stw r12, 268(r10)
+    stw r12, 272(r10)
+    stw r12, 276(r10)
+    stw r12, 280(r10)
+    stw r12, 284(r10)
+    stw r12, 288(r10)
+    stw r12, 292(r10)
+    stw r12, 296(r10)
+    stw r12, 300(r10)
+    stw r12, 304(r10)
+    stw r12, 308(r10)
+    stw r12, 312(r10)
+    stw r12, 316(r10)
+    stw r12, 320(r10)
+    stw r12, 324(r10)
+    stw r12, 328(r10)
+    stw r12, 332(r10)
+    stw r12, 336(r10)
+    stw r12, 340(r10)
+    stw r12, 344(r10)
+    stw r12, 348(r10)
+    stw r12, 352(r10)
+    stw r12, 356(r10)
+    stw r12, 360(r10)
+    stw r12, 364(r10)
+    stw r12, 368(r10)
+    stw r12, 372(r10)
+    stw r12, 376(r10)
+    stw r12, 380(r10)
+    stw r12, 384(r10)
+    stw r12, 388(r10)
+    stw r12, 392(r10)
+    stw r12, 396(r10)
+    stw r12, 400(r10)
+    stw r12, 404(r10)
+    stw r12, 408(r10)
+    stw r12, 412(r10)
+    add r10, r10, r9
+    stw r12, 0(r10)
+    stw r12, 4(r10)
+    stw r12, 8(r10)
+    stw r12, 12(r10)
+    stw r12, 16(r10)
+    stw r12, 20(r10)
+    stw r12, 24(r10)
+    stw r12, 28(r10)
+    stw r12, 32(r10)
+    stw r12, 36(r10)
+    stw r12, 40(r10)
+    stw r12, 44(r10)
+    stw r12, 48(r10)
+    stw r12, 52(r10)
+    stw r12, 56(r10)
+    stw r12, 60(r10)
+    stw r12, 64(r10)
+    stw r12, 68(r10)
+    stw r12, 72(r10)
+    stw r12, 76(r10)
+    stw r12, 80(r10)
+    stw r12, 84(r10)
+    stw r12, 88(r10)
+    stw r12, 92(r10)
+    stw r12, 96(r10)
+    stw r11, 100(r10)
+    stw r11, 104(r10)
+    stw r11, 108(r10)
+    stw r11, 112(r10)
+    stw r11, 116(r10)
+    stw r11, 120(r10)
+    stw r11, 124(r10)
+    stw r12, 128(r10)
+    stw r12, 132(r10)
+    stw r11, 136(r10)
+    stw r11, 140(r10)
+    stw r12, 144(r10)
+    stw r12, 148(r10)
+    stw r12, 152(r10)
+    stw r12, 156(r10)
+    stw r12, 160(r10)
+    stw r12, 164(r10)
+    stw r12, 168(r10)
+    stw r12, 172(r10)
+    stw r12, 176(r10)
+    stw r12, 180(r10)
+    stw r12, 184(r10)
+    stw r12, 188(r10)
+    stw r12, 192(r10)
+    stw r12, 196(r10)
+    stw r12, 200(r10)
+    stw r12, 204(r10)
+    stw r12, 208(r10)
+    stw r12, 212(r10)
+    stw r12, 216(r10)
+    stw r12, 220(r10)
+    stw r12, 224(r10)
+    stw r11, 228(r10)
+    stw r11, 232(r10)
+    stw r11, 236(r10)
+    stw r11, 240(r10)
+    stw r11, 244(r10)
+    stw r11, 248(r10)
+    stw r11, 252(r10)
+    stw r12, 256(r10)
+    stw r12, 260(r10)
+    stw r12, 264(r10)
+    stw r12, 268(r10)
+    stw r12, 272(r10)
+    stw r12, 276(r10)
+    stw r12, 280(r10)
+    stw r12, 284(r10)
+    stw r12, 288(r10)
+    stw r12, 292(r10)
+    stw r12, 296(r10)
+    stw r12, 300(r10)
+    stw r12, 304(r10)
+    stw r12, 308(r10)
+    stw r12, 312(r10)
+    stw r12, 316(r10)
+    stw r12, 320(r10)
+    stw r12, 324(r10)
+    stw r12, 328(r10)
+    stw r12, 332(r10)
+    stw r12, 336(r10)
+    stw r12, 340(r10)
+    stw r12, 344(r10)
+    stw r12, 348(r10)
+    stw r12, 352(r10)
+    stw r12, 356(r10)
+    stw r12, 360(r10)
+    stw r12, 364(r10)
+    stw r12, 368(r10)
+    stw r12, 372(r10)
+    stw r12, 376(r10)
+    stw r12, 380(r10)
+    stw r12, 384(r10)
+    stw r12, 388(r10)
+    stw r12, 392(r10)
+    stw r12, 396(r10)
+    stw r12, 400(r10)
+    stw r12, 404(r10)
+    stw r12, 408(r10)
+    stw r12, 412(r10)
+    add r10, r10, r9
+    stw r12, 0(r10)
+    stw r12, 4(r10)
+    stw r12, 8(r10)
+    stw r12, 12(r10)
+    stw r12, 16(r10)
+    stw r12, 20(r10)
+    stw r12, 24(r10)
+    stw r12, 28(r10)
+    stw r12, 32(r10)
+    stw r12, 36(r10)
+    stw r12, 40(r10)
+    stw r12, 44(r10)
+    stw r12, 48(r10)
+    stw r12, 52(r10)
+    stw r12, 56(r10)
+    stw r12, 60(r10)
+    stw r12, 64(r10)
+    stw r12, 68(r10)
+    stw r12, 72(r10)
+    stw r12, 76(r10)
+    stw r12, 80(r10)
+    stw r12, 84(r10)
+    stw r12, 88(r10)
+    stw r12, 92(r10)
+    stw r12, 96(r10)
+    stw r12, 100(r10)
+    stw r12, 104(r10)
+    stw r12, 108(r10)
+    stw r12, 112(r10)
+    stw r12, 116(r10)
+    stw r12, 120(r10)
+    stw r12, 124(r10)
+    stw r12, 128(r10)
+    stw r11, 132(r10)
+    stw r11, 136(r10)
+    stw r11, 140(r10)
+    stw r11, 144(r10)
+    stw r12, 148(r10)
+    stw r12, 152(r10)
+    stw r12, 156(r10)
+    stw r12, 160(r10)
+    stw r12, 164(r10)
+    stw r12, 168(r10)
+    stw r12, 172(r10)
+    stw r12, 176(r10)
+    stw r12, 180(r10)
+    stw r12, 184(r10)
+    stw r12, 188(r10)
+    stw r12, 192(r10)
+    stw r12, 196(r10)
+    stw r12, 200(r10)
+    stw r12, 204(r10)
+    stw r12, 208(r10)
+    stw r12, 212(r10)
+    stw r12, 216(r10)
+    stw r12, 220(r10)
+    stw r12, 224(r10)
+    stw r12, 228(r10)
+    stw r12, 232(r10)
+    stw r12, 236(r10)
+    stw r12, 240(r10)
+    stw r12, 244(r10)
+    stw r12, 248(r10)
+    stw r12, 252(r10)
+    stw r12, 256(r10)
+    stw r12, 260(r10)
+    stw r12, 264(r10)
+    stw r12, 268(r10)
+    stw r12, 272(r10)
+    stw r12, 276(r10)
+    stw r12, 280(r10)
+    stw r12, 284(r10)
+    stw r12, 288(r10)
+    stw r12, 292(r10)
+    stw r12, 296(r10)
+    stw r12, 300(r10)
+    stw r12, 304(r10)
+    stw r12, 308(r10)
+    stw r12, 312(r10)
+    stw r12, 316(r10)
+    stw r12, 320(r10)
+    stw r12, 324(r10)
+    stw r12, 328(r10)
+    stw r12, 332(r10)
+    stw r12, 336(r10)
+    stw r12, 340(r10)
+    stw r12, 344(r10)
+    stw r12, 348(r10)
+    stw r12, 352(r10)
+    stw r12, 356(r10)
+    stw r12, 360(r10)
+    stw r12, 364(r10)
+    stw r12, 368(r10)
+    stw r12, 372(r10)
+    stw r12, 376(r10)
+    stw r12, 380(r10)
+    stw r12, 384(r10)
+    stw r12, 388(r10)
+    stw r12, 392(r10)
+    stw r12, 396(r10)
+    stw r12, 400(r10)
+    stw r12, 404(r10)
+    stw r12, 408(r10)
+    stw r12, 412(r10)
+    add r10, r10, r9
+    stw r12, 0(r10)
+    stw r12, 4(r10)
+    stw r12, 8(r10)
+    stw r12, 12(r10)
+    stw r12, 16(r10)
+    stw r12, 20(r10)
+    stw r12, 24(r10)
+    stw r12, 28(r10)
+    stw r12, 32(r10)
+    stw r12, 36(r10)
+    stw r12, 40(r10)
+    stw r12, 44(r10)
+    stw r12, 48(r10)
+    stw r12, 52(r10)
+    stw r12, 56(r10)
+    stw r12, 60(r10)
+    stw r12, 64(r10)
+    stw r12, 68(r10)
+    stw r12, 72(r10)
+    stw r12, 76(r10)
+    stw r12, 80(r10)
+    stw r12, 84(r10)
+    stw r12, 88(r10)
+    stw r12, 92(r10)
+    stw r12, 96(r10)
+    stw r12, 100(r10)
+    stw r12, 104(r10)
+    stw r12, 108(r10)
+    stw r12, 112(r10)
+    stw r12, 116(r10)
+    stw r12, 120(r10)
+    stw r12, 124(r10)
+    stw r12, 128(r10)
+    stw r12, 132(r10)
+    stw r12, 136(r10)
+    stw r12, 140(r10)
+    stw r12, 144(r10)
+    stw r12, 148(r10)
+    stw r12, 152(r10)
+    stw r12, 156(r10)
+    stw r12, 160(r10)
+    stw r12, 164(r10)
+    stw r12, 168(r10)
+    stw r12, 172(r10)
+    stw r12, 176(r10)
+    stw r12, 180(r10)
+    stw r12, 184(r10)
+    stw r12, 188(r10)
+    stw r12, 192(r10)
+    stw r12, 196(r10)
+    stw r12, 200(r10)
+    stw r12, 204(r10)
+    stw r12, 208(r10)
+    stw r12, 212(r10)
+    stw r12, 216(r10)
+    stw r12, 220(r10)
+    stw r12, 224(r10)
+    stw r12, 228(r10)
+    stw r12, 232(r10)
+    stw r12, 236(r10)
+    stw r12, 240(r10)
+    stw r12, 244(r10)
+    stw r12, 248(r10)
+    stw r12, 252(r10)
+    stw r12, 256(r10)
+    stw r12, 260(r10)
+    stw r12, 264(r10)
+    stw r12, 268(r10)
+    stw r12, 272(r10)
+    stw r12, 276(r10)
+    stw r12, 280(r10)
+    stw r12, 284(r10)
+    stw r12, 288(r10)
+    stw r12, 292(r10)
+    stw r12, 296(r10)
+    stw r12, 300(r10)
+    stw r12, 304(r10)
+    stw r12, 308(r10)
+    stw r12, 312(r10)
+    stw r12, 316(r10)
+    stw r12, 320(r10)
+    stw r12, 324(r10)
+    stw r12, 328(r10)
+    stw r12, 332(r10)
+    stw r12, 336(r10)
+    stw r12, 340(r10)
+    stw r12, 344(r10)
+    stw r12, 348(r10)
+    stw r12, 352(r10)
+    stw r12, 356(r10)
+    stw r12, 360(r10)
+    stw r12, 364(r10)
+    stw r12, 368(r10)
+    stw r12, 372(r10)
+    stw r12, 376(r10)
+    stw r12, 380(r10)
+    stw r12, 384(r10)
+    stw r12, 388(r10)
+    stw r12, 392(r10)
+    stw r12, 396(r10)
+    stw r12, 400(r10)
+    stw r12, 404(r10)
+    stw r12, 408(r10)
+    stw r12, 412(r10)
+#endif
+.endm
+.macro DEBUG_bat_mask
+#ifdef CONFIG_DEBUG
+    stw r12, 0(r10)
+    stw r12, 4(r10)
+    stw r12, 8(r10)
+    stw r12, 12(r10)
+    stw r12, 16(r10)
+    stw r12, 20(r10)
+    stw r12, 24(r10)
+    stw r12, 28(r10)
+    stw r12, 32(r10)
+    stw r12, 36(r10)
+    stw r12, 40(r10)
+    stw r12, 44(r10)
+    stw r12, 48(r10)
+    stw r12, 52(r10)
+    stw r12, 56(r10)
+    stw r12, 60(r10)
+    stw r12, 64(r10)
+    stw r12, 68(r10)
+    stw r12, 72(r10)
+    stw r12, 76(r10)
+    stw r12, 80(r10)
+    stw r12, 84(r10)
+    stw r12, 88(r10)
+    stw r12, 92(r10)
+    stw r12, 96(r10)
+    stw r12, 100(r10)
+    stw r12, 104(r10)
+    stw r12, 108(r10)
+    stw r12, 112(r10)
+    stw r12, 116(r10)
+    stw r12, 120(r10)
+    stw r12, 124(r10)
+    stw r12, 128(r10)
+    stw r12, 132(r10)
+    stw r12, 136(r10)
+    stw r12, 140(r10)
+    stw r12, 144(r10)
+    stw r12, 148(r10)
+    stw r12, 152(r10)
+    stw r12, 156(r10)
+    stw r12, 160(r10)
+    stw r12, 164(r10)
+    stw r12, 168(r10)
+    stw r12, 172(r10)
+    stw r12, 176(r10)
+    stw r12, 180(r10)
+    stw r12, 184(r10)
+    stw r12, 188(r10)
+    stw r12, 192(r10)
+    stw r12, 196(r10)
+    stw r12, 200(r10)
+    stw r12, 204(r10)
+    stw r12, 208(r10)
+    stw r12, 212(r10)
+    stw r12, 216(r10)
+    stw r12, 220(r10)
+    stw r12, 224(r10)
+    stw r12, 228(r10)
+    stw r12, 232(r10)
+    stw r12, 236(r10)
+    stw r12, 240(r10)
+    stw r12, 244(r10)
+    stw r12, 248(r10)
+    stw r12, 252(r10)
+    add r10, r10, r9
+    stw r12, 0(r10)
+    stw r12, 4(r10)
+    stw r12, 8(r10)
+    stw r12, 12(r10)
+    stw r12, 16(r10)
+    stw r12, 20(r10)
+    stw r12, 24(r10)
+    stw r12, 28(r10)
+    stw r12, 32(r10)
+    stw r12, 36(r10)
+    stw r12, 40(r10)
+    stw r12, 44(r10)
+    stw r12, 48(r10)
+    stw r12, 52(r10)
+    stw r12, 56(r10)
+    stw r12, 60(r10)
+    stw r12, 64(r10)
+    stw r12, 68(r10)
+    stw r12, 72(r10)
+    stw r12, 76(r10)
+    stw r12, 80(r10)
+    stw r12, 84(r10)
+    stw r12, 88(r10)
+    stw r12, 92(r10)
+    stw r12, 96(r10)
+    stw r12, 100(r10)
+    stw r12, 104(r10)
+    stw r12, 108(r10)
+    stw r12, 112(r10)
+    stw r12, 116(r10)
+    stw r12, 120(r10)
+    stw r12, 124(r10)
+    stw r12, 128(r10)
+    stw r12, 132(r10)
+    stw r12, 136(r10)
+    stw r12, 140(r10)
+    stw r12, 144(r10)
+    stw r12, 148(r10)
+    stw r12, 152(r10)
+    stw r12, 156(r10)
+    stw r12, 160(r10)
+    stw r12, 164(r10)
+    stw r12, 168(r10)
+    stw r12, 172(r10)
+    stw r12, 176(r10)
+    stw r12, 180(r10)
+    stw r12, 184(r10)
+    stw r12, 188(r10)
+    stw r12, 192(r10)
+    stw r12, 196(r10)
+    stw r12, 200(r10)
+    stw r12, 204(r10)
+    stw r12, 208(r10)
+    stw r12, 212(r10)
+    stw r12, 216(r10)
+    stw r12, 220(r10)
+    stw r12, 224(r10)
+    stw r12, 228(r10)
+    stw r12, 232(r10)
+    stw r12, 236(r10)
+    stw r12, 240(r10)
+    stw r12, 244(r10)
+    stw r12, 248(r10)
+    stw r12, 252(r10)
+    add r10, r10, r9
+    stw r12, 0(r10)
+    stw r11, 4(r10)
+    stw r11, 8(r10)
+    stw r11, 12(r10)
+    stw r12, 16(r10)
+    stw r12, 20(r10)
+    stw r12, 24(r10)
+    stw r12, 28(r10)
+    stw r12, 32(r10)
+    stw r12, 36(r10)
+    stw r12, 40(r10)
+    stw r12, 44(r10)
+    stw r12, 48(r10)
+    stw r12, 52(r10)
+    stw r12, 56(r10)
+    stw r12, 60(r10)
+    stw r12, 64(r10)
+    stw r12, 68(r10)
+    stw r12, 72(r10)
+    stw r12, 76(r10)
+    stw r11, 80(r10)
+    stw r12, 84(r10)
+    stw r12, 88(r10)
+    stw r12, 92(r10)
+    stw r12, 96(r10)
+    stw r12, 100(r10)
+    stw r12, 104(r10)
+    stw r12, 108(r10)
+    stw r12, 112(r10)
+    stw r12, 116(r10)
+    stw r12, 120(r10)
+    stw r12, 124(r10)
+    stw r12, 128(r10)
+    stw r12, 132(r10)
+    stw r12, 136(r10)
+    stw r12, 140(r10)
+    stw r12, 144(r10)
+    stw r12, 148(r10)
+    stw r12, 152(r10)
+    stw r12, 156(r10)
+    stw r12, 160(r10)
+    stw r12, 164(r10)
+    stw r12, 168(r10)
+    stw r12, 172(r10)
+    stw r12, 176(r10)
+    stw r12, 180(r10)
+    stw r12, 184(r10)
+    stw r12, 188(r10)
+    stw r12, 192(r10)
+    stw r12, 196(r10)
+    stw r12, 200(r10)
+    stw r12, 204(r10)
+    stw r12, 208(r10)
+    stw r12, 212(r10)
+    stw r12, 216(r10)
+    stw r12, 220(r10)
+    stw r12, 224(r10)
+    stw r11, 228(r10)
+    stw r11, 232(r10)
+    stw r11, 236(r10)
+    stw r12, 240(r10)
+    stw r12, 244(r10)
+    stw r12, 248(r10)
+    stw r12, 252(r10)
+    add r10, r10, r9
+    stw r12, 0(r10)
+    stw r12, 4(r10)
+    stw r11, 8(r10)
+    stw r11, 12(r10)
+    stw r12, 16(r10)
+    stw r12, 20(r10)
+    stw r12, 24(r10)
+    stw r12, 28(r10)
+    stw r12, 32(r10)
+    stw r12, 36(r10)
+    stw r12, 40(r10)
+    stw r12, 44(r10)
+    stw r12, 48(r10)
+    stw r12, 52(r10)
+    stw r12, 56(r10)
+    stw r12, 60(r10)
+    stw r12, 64(r10)
+    stw r12, 68(r10)
+    stw r12, 72(r10)
+    stw r11, 76(r10)
+    stw r11, 80(r10)
+    stw r12, 84(r10)
+    stw r12, 88(r10)
+    stw r12, 92(r10)
+    stw r12, 96(r10)
+    stw r12, 100(r10)
+    stw r12, 104(r10)
+    stw r12, 108(r10)
+    stw r12, 112(r10)
+    stw r12, 116(r10)
+    stw r12, 120(r10)
+    stw r12, 124(r10)
+    stw r12, 128(r10)
+    stw r12, 132(r10)
+    stw r12, 136(r10)
+    stw r12, 140(r10)
+    stw r12, 144(r10)
+    stw r12, 148(r10)
+    stw r12, 152(r10)
+    stw r12, 156(r10)
+    stw r12, 160(r10)
+    stw r12, 164(r10)
+    stw r12, 168(r10)
+    stw r12, 172(r10)
+    stw r12, 176(r10)
+    stw r12, 180(r10)
+    stw r12, 184(r10)
+    stw r12, 188(r10)
+    stw r12, 192(r10)
+    stw r12, 196(r10)
+    stw r12, 200(r10)
+    stw r12, 204(r10)
+    stw r12, 208(r10)
+    stw r12, 212(r10)
+    stw r12, 216(r10)
+    stw r12, 220(r10)
+    stw r12, 224(r10)
+    stw r12, 228(r10)
+    stw r11, 232(r10)
+    stw r11, 236(r10)
+    stw r12, 240(r10)
+    stw r12, 244(r10)
+    stw r12, 248(r10)
+    stw r12, 252(r10)
+    add r10, r10, r9
+    stw r12, 0(r10)
+    stw r12, 4(r10)
+    stw r11, 8(r10)
+    stw r11, 12(r10)
+    stw r12, 16(r10)
+    stw r12, 20(r10)
+    stw r12, 24(r10)
+    stw r12, 28(r10)
+    stw r12, 32(r10)
+    stw r12, 36(r10)
+    stw r12, 40(r10)
+    stw r12, 44(r10)
+    stw r12, 48(r10)
+    stw r12, 52(r10)
+    stw r12, 56(r10)
+    stw r12, 60(r10)
+    stw r12, 64(r10)
+    stw r12, 68(r10)
+    stw r12, 72(r10)
+    stw r11, 76(r10)
+    stw r11, 80(r10)
+    stw r12, 84(r10)
+    stw r12, 88(r10)
+    stw r12, 92(r10)
+    stw r12, 96(r10)
+    stw r12, 100(r10)
+    stw r12, 104(r10)
+    stw r12, 108(r10)
+    stw r12, 112(r10)
+    stw r12, 116(r10)
+    stw r12, 120(r10)
+    stw r12, 124(r10)
+    stw r12, 128(r10)
+    stw r12, 132(r10)
+    stw r12, 136(r10)
+    stw r12, 140(r10)
+    stw r12, 144(r10)
+    stw r12, 148(r10)
+    stw r12, 152(r10)
+    stw r12, 156(r10)
+    stw r12, 160(r10)
+    stw r12, 164(r10)
+    stw r12, 168(r10)
+    stw r12, 172(r10)
+    stw r12, 176(r10)
+    stw r12, 180(r10)
+    stw r12, 184(r10)
+    stw r12, 188(r10)
+    stw r12, 192(r10)
+    stw r12, 196(r10)
+    stw r12, 200(r10)
+    stw r12, 204(r10)
+    stw r12, 208(r10)
+    stw r12, 212(r10)
+    stw r12, 216(r10)
+    stw r12, 220(r10)
+    stw r12, 224(r10)
+    stw r12, 228(r10)
+    stw r11, 232(r10)
+    stw r11, 236(r10)
+    stw r12, 240(r10)
+    stw r12, 244(r10)
+    stw r12, 248(r10)
+    stw r12, 252(r10)
+    add r10, r10, r9
+    stw r12, 0(r10)
+    stw r12, 4(r10)
+    stw r11, 8(r10)
+    stw r11, 12(r10)
+    stw r11, 16(r10)
+    stw r11, 20(r10)
+    stw r12, 24(r10)
+    stw r12, 28(r10)
+    stw r12, 32(r10)
+    stw r12, 36(r10)
+    stw r11, 40(r10)
+    stw r11, 44(r10)
+    stw r11, 48(r10)
+    stw r11, 52(r10)
+    stw r12, 56(r10)
+    stw r12, 60(r10)
+    stw r12, 64(r10)
+    stw r11, 68(r10)
+    stw r11, 72(r10)
+    stw r11, 76(r10)
+    stw r11, 80(r10)
+    stw r11, 84(r10)
+    stw r11, 88(r10)
+    stw r12, 92(r10)
+    stw r12, 96(r10)
+    stw r12, 100(r10)
+    stw r12, 104(r10)
+    stw r12, 108(r10)
+    stw r12, 112(r10)
+    stw r12, 116(r10)
+    stw r12, 120(r10)
+    stw r12, 124(r10)
+    stw r12, 128(r10)
+    stw r11, 132(r10)
+    stw r11, 136(r10)
+    stw r11, 140(r10)
+    stw r12, 144(r10)
+    stw r11, 148(r10)
+    stw r11, 152(r10)
+    stw r12, 156(r10)
+    stw r12, 160(r10)
+    stw r12, 164(r10)
+    stw r11, 168(r10)
+    stw r11, 172(r10)
+    stw r11, 176(r10)
+    stw r11, 180(r10)
+    stw r12, 184(r10)
+    stw r12, 188(r10)
+    stw r12, 192(r10)
+    stw r12, 196(r10)
+    stw r11, 200(r10)
+    stw r11, 204(r10)
+    stw r11, 208(r10)
+    stw r11, 212(r10)
+    stw r11, 216(r10)
+    stw r12, 220(r10)
+    stw r12, 224(r10)
+    stw r12, 228(r10)
+    stw r11, 232(r10)
+    stw r11, 236(r10)
+    stw r12, 240(r10)
+    stw r12, 244(r10)
+    stw r11, 248(r10)
+    stw r11, 252(r10)
+    add r10, r10, r9
+    stw r12, 0(r10)
+    stw r12, 4(r10)
+    stw r11, 8(r10)
+    stw r11, 12(r10)
+    stw r12, 16(r10)
+    stw r11, 20(r10)
+    stw r11, 24(r10)
+    stw r12, 28(r10)
+    stw r12, 32(r10)
+    stw r12, 36(r10)
+    stw r12, 40(r10)
+    stw r12, 44(r10)
+    stw r12, 48(r10)
+    stw r11, 52(r10)
+    stw r11, 56(r10)
+    stw r12, 60(r10)
+    stw r12, 64(r10)
+    stw r12, 68(r10)
+    stw r12, 72(r10)
+    stw r11, 76(r10)
+    stw r11, 80(r10)
+    stw r12, 84(r10)
+    stw r12, 88(r10)
+    stw r12, 92(r10)
+    stw r12, 96(r10)
+    stw r12, 100(r10)
+    stw r12, 104(r10)
+    stw r12, 108(r10)
+    stw r12, 112(r10)
+    stw r12, 116(r10)
+    stw r12, 120(r10)
+    stw r12, 124(r10)
+    stw r12, 128(r10)
+    stw r11, 132(r10)
+    stw r11, 136(r10)
+    stw r11, 140(r10)
+    stw r11, 144(r10)
+    stw r11, 148(r10)
+    stw r11, 152(r10)
+    stw r11, 156(r10)
+    stw r12, 160(r10)
+    stw r12, 164(r10)
+    stw r12, 168(r10)
+    stw r12, 172(r10)
+    stw r12, 176(r10)
+    stw r11, 180(r10)
+    stw r11, 184(r10)
+    stw r12, 188(r10)
+    stw r12, 192(r10)
+    stw r11, 196(r10)
+    stw r11, 200(r10)
+    stw r12, 204(r10)
+    stw r12, 208(r10)
+    stw r12, 212(r10)
+    stw r11, 216(r10)
+    stw r11, 220(r10)
+    stw r12, 224(r10)
+    stw r12, 228(r10)
+    stw r11, 232(r10)
+    stw r11, 236(r10)
+    stw r12, 240(r10)
+    stw r11, 244(r10)
+    stw r11, 248(r10)
+    stw r12, 252(r10)
+    add r10, r10, r9
+    stw r12, 0(r10)
+    stw r12, 4(r10)
+    stw r11, 8(r10)
+    stw r11, 12(r10)
+    stw r12, 16(r10)
+    stw r12, 20(r10)
+    stw r11, 24(r10)
+    stw r11, 28(r10)
+    stw r12, 32(r10)
+    stw r12, 36(r10)
+    stw r11, 40(r10)
+    stw r11, 44(r10)
+    stw r11, 48(r10)
+    stw r11, 52(r10)
+    stw r11, 56(r10)
+    stw r12, 60(r10)
+    stw r12, 64(r10)
+    stw r12, 68(r10)
+    stw r12, 72(r10)
+    stw r11, 76(r10)
+    stw r11, 80(r10)
+    stw r12, 84(r10)
+    stw r12, 88(r10)
+    stw r12, 92(r10)
+    stw r12, 96(r10)
+    stw r12, 100(r10)
+    stw r12, 104(r10)
+    stw r12, 108(r10)
+    stw r12, 112(r10)
+    stw r12, 116(r10)
+    stw r12, 120(r10)
+    stw r12, 124(r10)
+    stw r12, 128(r10)
+    stw r11, 132(r10)
+    stw r11, 136(r10)
+    stw r12, 140(r10)
+    stw r11, 144(r10)
+    stw r12, 148(r10)
+    stw r11, 152(r10)
+    stw r11, 156(r10)
+    stw r12, 160(r10)
+    stw r12, 164(r10)
+    stw r11, 168(r10)
+    stw r11, 172(r10)
+    stw r11, 176(r10)
+    stw r11, 180(r10)
+    stw r11, 184(r10)
+    stw r12, 188(r10)
+    stw r12, 192(r10)
+    stw r12, 196(r10)
+    stw r11, 200(r10)
+    stw r11, 204(r10)
+    stw r12, 208(r10)
+    stw r12, 212(r10)
+    stw r12, 216(r10)
+    stw r12, 220(r10)
+    stw r12, 224(r10)
+    stw r12, 228(r10)
+    stw r11, 232(r10)
+    stw r11, 236(r10)
+    stw r11, 240(r10)
+    stw r11, 244(r10)
+    stw r12, 248(r10)
+    stw r12, 252(r10)
+    add r10, r10, r9
+    stw r12, 0(r10)
+    stw r12, 4(r10)
+    stw r11, 8(r10)
+    stw r11, 12(r10)
+    stw r12, 16(r10)
+    stw r12, 20(r10)
+    stw r11, 24(r10)
+    stw r11, 28(r10)
+    stw r12, 32(r10)
+    stw r11, 36(r10)
+    stw r11, 40(r10)
+    stw r12, 44(r10)
+    stw r12, 48(r10)
+    stw r11, 52(r10)
+    stw r11, 56(r10)
+    stw r12, 60(r10)
+    stw r12, 64(r10)
+    stw r12, 68(r10)
+    stw r12, 72(r10)
+    stw r11, 76(r10)
+    stw r11, 80(r10)
+    stw r12, 84(r10)
+    stw r12, 88(r10)
+    stw r12, 92(r10)
+    stw r12, 96(r10)
+    stw r12, 100(r10)
+    stw r12, 104(r10)
+    stw r12, 108(r10)
+    stw r12, 112(r10)
+    stw r12, 116(r10)
+    stw r12, 120(r10)
+    stw r12, 124(r10)
+    stw r12, 128(r10)
+    stw r11, 132(r10)
+    stw r11, 136(r10)
+    stw r12, 140(r10)
+    stw r11, 144(r10)
+    stw r12, 148(r10)
+    stw r11, 152(r10)
+    stw r11, 156(r10)
+    stw r12, 160(r10)
+    stw r11, 164(r10)
+    stw r11, 168(r10)
+    stw r12, 172(r10)
+    stw r12, 176(r10)
+    stw r11, 180(r10)
+    stw r11, 184(r10)
+    stw r12, 188(r10)
+    stw r12, 192(r10)
+    stw r12, 196(r10)
+    stw r12, 200(r10)
+    stw r11, 204(r10)
+    stw r11, 208(r10)
+    stw r11, 212(r10)
+    stw r12, 216(r10)
+    stw r12, 220(r10)
+    stw r12, 224(r10)
+    stw r12, 228(r10)
+    stw r11, 232(r10)
+    stw r11, 236(r10)
+    stw r11, 240(r10)
+    stw r11, 244(r10)
+    stw r12, 248(r10)
+    stw r12, 252(r10)
+    add r10, r10, r9
+    stw r12, 0(r10)
+    stw r12, 4(r10)
+    stw r11, 8(r10)
+    stw r11, 12(r10)
+    stw r12, 16(r10)
+    stw r12, 20(r10)
+    stw r11, 24(r10)
+    stw r11, 28(r10)
+    stw r12, 32(r10)
+    stw r11, 36(r10)
+    stw r11, 40(r10)
+    stw r12, 44(r10)
+    stw r12, 48(r10)
+    stw r11, 52(r10)
+    stw r11, 56(r10)
+    stw r12, 60(r10)
+    stw r12, 64(r10)
+    stw r12, 68(r10)
+    stw r12, 72(r10)
+    stw r11, 76(r10)
+    stw r11, 80(r10)
+    stw r12, 84(r10)
+    stw r12, 88(r10)
+    stw r12, 92(r10)
+    stw r12, 96(r10)
+    stw r12, 100(r10)
+    stw r12, 104(r10)
+    stw r12, 108(r10)
+    stw r12, 112(r10)
+    stw r12, 116(r10)
+    stw r12, 120(r10)
+    stw r12, 124(r10)
+    stw r12, 128(r10)
+    stw r11, 132(r10)
+    stw r11, 136(r10)
+    stw r12, 140(r10)
+    stw r11, 144(r10)
+    stw r12, 148(r10)
+    stw r11, 152(r10)
+    stw r11, 156(r10)
+    stw r12, 160(r10)
+    stw r11, 164(r10)
+    stw r11, 168(r10)
+    stw r12, 172(r10)
+    stw r12, 176(r10)
+    stw r11, 180(r10)
+    stw r11, 184(r10)
+    stw r12, 188(r10)
+    stw r12, 192(r10)
+    stw r12, 196(r10)
+    stw r12, 200(r10)
+    stw r12, 204(r10)
+    stw r12, 208(r10)
+    stw r11, 212(r10)
+    stw r11, 216(r10)
+    stw r12, 220(r10)
+    stw r12, 224(r10)
+    stw r12, 228(r10)
+    stw r11, 232(r10)
+    stw r11, 236(r10)
+    stw r12, 240(r10)
+    stw r11, 244(r10)
+    stw r11, 248(r10)
+    stw r12, 252(r10)
+    add r10, r10, r9
+    stw r12, 0(r10)
+    stw r12, 4(r10)
+    stw r11, 8(r10)
+    stw r11, 12(r10)
+    stw r12, 16(r10)
+    stw r12, 20(r10)
+    stw r11, 24(r10)
+    stw r11, 28(r10)
+    stw r12, 32(r10)
+    stw r11, 36(r10)
+    stw r11, 40(r10)
+    stw r12, 44(r10)
+    stw r12, 48(r10)
+    stw r11, 52(r10)
+    stw r11, 56(r10)
+    stw r12, 60(r10)
+    stw r12, 64(r10)
+    stw r12, 68(r10)
+    stw r12, 72(r10)
+    stw r11, 76(r10)
+    stw r11, 80(r10)
+    stw r12, 84(r10)
+    stw r11, 88(r10)
+    stw r11, 92(r10)
+    stw r12, 96(r10)
+    stw r12, 100(r10)
+    stw r12, 104(r10)
+    stw r12, 108(r10)
+    stw r12, 112(r10)
+    stw r12, 116(r10)
+    stw r12, 120(r10)
+    stw r12, 124(r10)
+    stw r12, 128(r10)
+    stw r11, 132(r10)
+    stw r11, 136(r10)
+    stw r12, 140(r10)
+    stw r11, 144(r10)
+    stw r12, 148(r10)
+    stw r11, 152(r10)
+    stw r11, 156(r10)
+    stw r12, 160(r10)
+    stw r11, 164(r10)
+    stw r11, 168(r10)
+    stw r12, 172(r10)
+    stw r12, 176(r10)
+    stw r11, 180(r10)
+    stw r11, 184(r10)
+    stw r12, 188(r10)
+    stw r12, 192(r10)
+    stw r11, 196(r10)
+    stw r11, 200(r10)
+    stw r12, 204(r10)
+    stw r12, 208(r10)
+    stw r12, 212(r10)
+    stw r11, 216(r10)
+    stw r11, 220(r10)
+    stw r12, 224(r10)
+    stw r12, 228(r10)
+    stw r11, 232(r10)
+    stw r11, 236(r10)
+    stw r12, 240(r10)
+    stw r12, 244(r10)
+    stw r11, 248(r10)
+    stw r11, 252(r10)
+    add r10, r10, r9
+    stw r12, 0(r10)
+    stw r12, 4(r10)
+    stw r11, 8(r10)
+    stw r11, 12(r10)
+    stw r11, 16(r10)
+    stw r11, 20(r10)
+    stw r11, 24(r10)
+    stw r12, 28(r10)
+    stw r12, 32(r10)
+    stw r12, 36(r10)
+    stw r11, 40(r10)
+    stw r11, 44(r10)
+    stw r11, 48(r10)
+    stw r12, 52(r10)
+    stw r11, 56(r10)
+    stw r11, 60(r10)
+    stw r12, 64(r10)
+    stw r12, 68(r10)
+    stw r12, 72(r10)
+    stw r12, 76(r10)
+    stw r11, 80(r10)
+    stw r11, 84(r10)
+    stw r11, 88(r10)
+    stw r12, 92(r10)
+    stw r12, 96(r10)
+    stw r12, 100(r10)
+    stw r12, 104(r10)
+    stw r12, 108(r10)
+    stw r12, 112(r10)
+    stw r12, 116(r10)
+    stw r12, 120(r10)
+    stw r12, 124(r10)
+    stw r12, 128(r10)
+    stw r11, 132(r10)
+    stw r11, 136(r10)
+    stw r12, 140(r10)
+    stw r12, 144(r10)
+    stw r12, 148(r10)
+    stw r11, 152(r10)
+    stw r11, 156(r10)
+    stw r12, 160(r10)
+    stw r12, 164(r10)
+    stw r11, 168(r10)
+    stw r11, 172(r10)
+    stw r11, 176(r10)
+    stw r12, 180(r10)
+    stw r11, 184(r10)
+    stw r11, 188(r10)
+    stw r12, 192(r10)
+    stw r12, 196(r10)
+    stw r11, 200(r10)
+    stw r11, 204(r10)
+    stw r11, 208(r10)
+    stw r11, 212(r10)
+    stw r11, 216(r10)
+    stw r12, 220(r10)
+    stw r12, 224(r10)
+    stw r11, 228(r10)
+    stw r11, 232(r10)
+    stw r11, 236(r10)
+    stw r12, 240(r10)
+    stw r12, 244(r10)
+    stw r11, 248(r10)
+    stw r11, 252(r10)
+    add r10, r10, r9
+    stw r12, 0(r10)
+    stw r12, 4(r10)
+    stw r12, 8(r10)
+    stw r12, 12(r10)
+    stw r12, 16(r10)
+    stw r12, 20(r10)
+    stw r12, 24(r10)
+    stw r12, 28(r10)
+    stw r12, 32(r10)
+    stw r12, 36(r10)
+    stw r12, 40(r10)
+    stw r12, 44(r10)
+    stw r12, 48(r10)
+    stw r12, 52(r10)
+    stw r12, 56(r10)
+    stw r12, 60(r10)
+    stw r12, 64(r10)
+    stw r12, 68(r10)
+    stw r12, 72(r10)
+    stw r12, 76(r10)
+    stw r12, 80(r10)
+    stw r12, 84(r10)
+    stw r12, 88(r10)
+    stw r12, 92(r10)
+    stw r12, 96(r10)
+    stw r12, 100(r10)
+    stw r12, 104(r10)
+    stw r12, 108(r10)
+    stw r12, 112(r10)
+    stw r12, 116(r10)
+    stw r12, 120(r10)
+    stw r12, 124(r10)
+    stw r12, 128(r10)
+    stw r12, 132(r10)
+    stw r12, 136(r10)
+    stw r12, 140(r10)
+    stw r12, 144(r10)
+    stw r12, 148(r10)
+    stw r12, 152(r10)
+    stw r12, 156(r10)
+    stw r12, 160(r10)
+    stw r12, 164(r10)
+    stw r12, 168(r10)
+    stw r12, 172(r10)
+    stw r12, 176(r10)
+    stw r12, 180(r10)
+    stw r12, 184(r10)
+    stw r12, 188(r10)
+    stw r12, 192(r10)
+    stw r12, 196(r10)
+    stw r12, 200(r10)
+    stw r12, 204(r10)
+    stw r12, 208(r10)
+    stw r12, 212(r10)
+    stw r12, 216(r10)
+    stw r12, 220(r10)
+    stw r12, 224(r10)
+    stw r12, 228(r10)
+    stw r12, 232(r10)
+    stw r12, 236(r10)
+    stw r12, 240(r10)
+    stw r12, 244(r10)
+    stw r12, 248(r10)
+    stw r12, 252(r10)
+    add r10, r10, r9
+    stw r12, 0(r10)
+    stw r12, 4(r10)
+    stw r12, 8(r10)
+    stw r12, 12(r10)
+    stw r12, 16(r10)
+    stw r12, 20(r10)
+    stw r12, 24(r10)
+    stw r12, 28(r10)
+    stw r12, 32(r10)
+    stw r12, 36(r10)
+    stw r12, 40(r10)
+    stw r12, 44(r10)
+    stw r12, 48(r10)
+    stw r12, 52(r10)
+    stw r12, 56(r10)
+    stw r12, 60(r10)
+    stw r12, 64(r10)
+    stw r12, 68(r10)
+    stw r12, 72(r10)
+    stw r12, 76(r10)
+    stw r12, 80(r10)
+    stw r12, 84(r10)
+    stw r12, 88(r10)
+    stw r12, 92(r10)
+    stw r12, 96(r10)
+    stw r11, 100(r10)
+    stw r11, 104(r10)
+    stw r11, 108(r10)
+    stw r11, 112(r10)
+    stw r11, 116(r10)
+    stw r11, 120(r10)
+    stw r11, 124(r10)
+    stw r12, 128(r10)
+    stw r12, 132(r10)
+    stw r12, 136(r10)
+    stw r12, 140(r10)
+    stw r12, 144(r10)
+    stw r12, 148(r10)
+    stw r12, 152(r10)
+    stw r12, 156(r10)
+    stw r12, 160(r10)
+    stw r12, 164(r10)
+    stw r12, 168(r10)
+    stw r12, 172(r10)
+    stw r12, 176(r10)
+    stw r12, 180(r10)
+    stw r12, 184(r10)
+    stw r12, 188(r10)
+    stw r12, 192(r10)
+    stw r12, 196(r10)
+    stw r12, 200(r10)
+    stw r12, 204(r10)
+    stw r12, 208(r10)
+    stw r12, 212(r10)
+    stw r12, 216(r10)
+    stw r12, 220(r10)
+    stw r12, 224(r10)
+    stw r12, 228(r10)
+    stw r12, 232(r10)
+    stw r12, 236(r10)
+    stw r12, 240(r10)
+    stw r12, 244(r10)
+    stw r12, 248(r10)
+    stw r12, 252(r10)
+    add r10, r10, r9
+    stw r12, 0(r10)
+    stw r12, 4(r10)
+    stw r12, 8(r10)
+    stw r12, 12(r10)
+    stw r12, 16(r10)
+    stw r12, 20(r10)
+    stw r12, 24(r10)
+    stw r12, 28(r10)
+    stw r12, 32(r10)
+    stw r12, 36(r10)
+    stw r12, 40(r10)
+    stw r12, 44(r10)
+    stw r12, 48(r10)
+    stw r12, 52(r10)
+    stw r12, 56(r10)
+    stw r12, 60(r10)
+    stw r12, 64(r10)
+    stw r12, 68(r10)
+    stw r12, 72(r10)
+    stw r12, 76(r10)
+    stw r12, 80(r10)
+    stw r12, 84(r10)
+    stw r12, 88(r10)
+    stw r12, 92(r10)
+    stw r12, 96(r10)
+    stw r12, 100(r10)
+    stw r12, 104(r10)
+    stw r12, 108(r10)
+    stw r12, 112(r10)
+    stw r12, 116(r10)
+    stw r12, 120(r10)
+    stw r12, 124(r10)
+    stw r12, 128(r10)
+    stw r12, 132(r10)
+    stw r12, 136(r10)
+    stw r12, 140(r10)
+    stw r12, 144(r10)
+    stw r12, 148(r10)
+    stw r12, 152(r10)
+    stw r12, 156(r10)
+    stw r12, 160(r10)
+    stw r12, 164(r10)
+    stw r12, 168(r10)
+    stw r12, 172(r10)
+    stw r12, 176(r10)
+    stw r12, 180(r10)
+    stw r12, 184(r10)
+    stw r12, 188(r10)
+    stw r12, 192(r10)
+    stw r12, 196(r10)
+    stw r12, 200(r10)
+    stw r12, 204(r10)
+    stw r12, 208(r10)
+    stw r12, 212(r10)
+    stw r12, 216(r10)
+    stw r12, 220(r10)
+    stw r12, 224(r10)
+    stw r12, 228(r10)
+    stw r12, 232(r10)
+    stw r12, 236(r10)
+    stw r12, 240(r10)
+    stw r12, 244(r10)
+    stw r12, 248(r10)
+    stw r12, 252(r10)
+    add r10, r10, r9
+    stw r12, 0(r10)
+    stw r12, 4(r10)
+    stw r12, 8(r10)
+    stw r12, 12(r10)
+    stw r12, 16(r10)
+    stw r12, 20(r10)
+    stw r12, 24(r10)
+    stw r12, 28(r10)
+    stw r12, 32(r10)
+    stw r12, 36(r10)
+    stw r12, 40(r10)
+    stw r12, 44(r10)
+    stw r12, 48(r10)
+    stw r12, 52(r10)
+    stw r12, 56(r10)
+    stw r12, 60(r10)
+    stw r12, 64(r10)
+    stw r12, 68(r10)
+    stw r12, 72(r10)
+    stw r12, 76(r10)
+    stw r12, 80(r10)
+    stw r12, 84(r10)
+    stw r12, 88(r10)
+    stw r12, 92(r10)
+    stw r12, 96(r10)
+    stw r12, 100(r10)
+    stw r12, 104(r10)
+    stw r12, 108(r10)
+    stw r12, 112(r10)
+    stw r12, 116(r10)
+    stw r12, 120(r10)
+    stw r12, 124(r10)
+    stw r12, 128(r10)
+    stw r12, 132(r10)
+    stw r12, 136(r10)
+    stw r12, 140(r10)
+    stw r12, 144(r10)
+    stw r12, 148(r10)
+    stw r12, 152(r10)
+    stw r12, 156(r10)
+    stw r12, 160(r10)
+    stw r12, 164(r10)
+    stw r12, 168(r10)
+    stw r12, 172(r10)
+    stw r12, 176(r10)
+    stw r12, 180(r10)
+    stw r12, 184(r10)
+    stw r12, 188(r10)
+    stw r12, 192(r10)
+    stw r12, 196(r10)
+    stw r12, 200(r10)
+    stw r12, 204(r10)
+    stw r12, 208(r10)
+    stw r12, 212(r10)
+    stw r12, 216(r10)
+    stw r12, 220(r10)
+    stw r12, 224(r10)
+    stw r12, 228(r10)
+    stw r12, 232(r10)
+    stw r12, 236(r10)
+    stw r12, 240(r10)
+    stw r12, 244(r10)
+    stw r12, 248(r10)
+    stw r12, 252(r10)
+#endif
+.endm

 /tags/0.2.0.2/boot/arch/ppc32/loader/main.h
 ,0 → 1,65
+/*
+ * Copyright (C) 2005 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#ifndef __MAIN_H__
+#define __MAIN_H__
+#include "ofw.h"
+/** Align to the nearest higher address.
+ *
+ * @param addr  Address or size to be aligned.
+ * @param align Size of alignment, must be power of 2.
+ */
+#define ALIGN_UP(addr, align) (((addr) + ((align) - 1)) & ~((align) - 1))
+#define TASKMAP_MAX_RECORDS 32
+typedef struct {
+    void *addr;
+    unsigned int size;
+} task_t;
+typedef struct {
+    unsigned int count;
+    task_t tasks[TASKMAP_MAX_RECORDS];
+} taskmap_t;
+typedef struct {
+    memmap_t memmap;
+    taskmap_t taskmap;
+    screen_t screen;
+    keyboard_t keyboard;
+} bootinfo_t;
+extern void start(void);
+extern void bootstrap(void);
+extern memmap_t memmap;
+#endif

 /tags/0.2.0.2/boot/arch/ppc32/loader/asm.h
 ,0 → 1,52
+/*
+ * Copyright (C) 2006 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#ifndef __ASM_H__
+#define __ASM_H__
+#define PAGE_SIZE 4096
+#define PAGE_WIDTH 12
+#define TRANS_SIZE 1024
+#define TRANS_ITEM_SIZE 4
+#define KERNEL_START_ADDR 0x80008000
+#ifndef __ASM__
+#define memcpy(dst, src, cnt)  __builtin_memcpy((dst), (src), (cnt))
+extern void *trans[TRANS_SIZE];
+extern void halt();
+extern void jump_to_kernel(void *bootinfo, unsigned int bootinfo_size, void *trans, unsigned int kernel_size, void *real_mode, void *fb, unsigned int scanline) __attribute__((noreturn));
+extern void real_mode();
+#endif
+#endif

 /tags/0.2.0.2/boot/arch/ppc32/loader/pack
 ,0 → 1,115
+#! /bin/sh
+#
+# Copyright (C) 2006 Martin Decky
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# - Redistributions of source code must retain the above copyright
+#   notice, this list of conditions and the following disclaimer.
+# - Redistributions in binary form must reproduce the above copyright
+#   notice, this list of conditions and the following disclaimer in the
+#   documentation and/or other materials provided with the distribution.
+# - The name of the author may not be used to endorse or promote products
+#   derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+[ "$#" -lt 1 ] && exit 1
+OBJCOPY="$1"
+LINK="_link.ld"
+HEADER="_components.h"
+shift
+echo 'OUTPUT_FORMAT("elf32-powerpc")
+OUTPUT_ARCH(powerpc:common)
+ENTRY(start)
+SECTIONS {
+    .boot 0x10000000: AT (0) {
+        *(BOOTSTRAP);
+        *(REALMODE);
+        *(.text);
+        *(.rodata);
+        *(.rodata.*);
+        *(.data);       /* initialized data */
+        *(.sdata);
+        *(.sdata2);
+        *(.sbss);
+        *(.bss);        /* uninitialized static variables */
+        *(COMMON);      /* global variables */' > "$LINK"
+echo '#ifndef ___COMPONENTS_H__
+#define ___COMPONENTS_H__
+typedef struct {
+    char *name;
+    void *start;
+    void *end;
+    unsigned int size;
+} component_t;' > "$HEADER"
+COUNT="0"
+DATA=""
+for TASK in "$@" ; do
+    BASENAME="`basename "$TASK" | sed 's/^\(.*\)\.[^.]*$/\1/'`"
+    OBJECT="${BASENAME}.o"
+    SYMBOL="`echo "_binary_$TASK" | tr "./" "__"`"
+    MACRO="`echo "$BASENAME" | tr [:lower:] [:upper:]`"
+    echo "$TASK -> $OBJECT"
+    echo "
+        . = ALIGN(4096);
+        *(.${BASENAME}_image);" >> "$LINK"
+    echo "
+extern int ${SYMBOL}_start;
+extern int ${SYMBOL}_end;
+#define ${MACRO}_START ((void *) &${SYMBOL}_start)
+#define ${MACRO}_END ((void *) &${SYMBOL}_end)
+#define ${MACRO}_SIZE ((unsigned int) ${MACRO}_END - (unsigned int) ${MACRO}_START)" >> "$HEADER"
+    "$OBJCOPY" -I binary -O elf32-powerpc -B powerpc:common --rename-section ".data=.${BASENAME}_image" "$TASK" "$OBJECT"
+    DATA="${DATA}
+    components[$COUNT].name = \"${BASENAME}\";
+    components[$COUNT].start = ${MACRO}_START;
+    components[$COUNT].end = ${MACRO}_END;
+    components[$COUNT].size = ${MACRO}_SIZE;";
+    COUNT="`expr "$COUNT" + 1`"
+done
+echo '  }
+}' >> "$LINK"
+echo "
+#define COMPONENTS $COUNT
+component_t components[COMPONENTS];
+static void init_components(void)
+{
+$DATA
+}
+#endif
+" >> "$HEADER"
 Property changes:
 Added: svn:executable
 +*
 \ No newline at end of property

 /tags/0.2.0.2/boot/arch/ppc32/loader/ofw.h
 ,0 → 1,77
+/*
+ * Copyright (C) 2005 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#ifndef __OFW_H__
+#define __OFW_H__
+#define NULL 0
+#define MEMMAP_MAX_RECORDS 32
+#define false 0
+#define true 1
+typedef __builtin_va_list va_list;
+#define va_start(ap, last)      __builtin_va_start(ap, last)
+#define va_arg(ap, type)        __builtin_va_arg(ap, type)
+#define va_end(ap)          __builtin_va_end(ap)
+typedef struct {
+    void *start;
+    unsigned int size;
+} memzone_t;
+typedef struct {
+    unsigned int total;
+    unsigned int count;
+    memzone_t zones[MEMMAP_MAX_RECORDS];
+} memmap_t;
+typedef struct {
+    void *addr;
+    unsigned int width;
+    unsigned int height;
+    unsigned int bpp;
+    unsigned int scanline;
+} screen_t;
+typedef struct {
+    void *addr;
+    unsigned int size;
+} keyboard_t;
+extern void init(void);
+extern void ofw_write(const char *str, const int len);
+extern void *ofw_translate(const void *virt);
+extern int ofw_map(const void *phys, const void *virt, const int size, const int mode);
+extern int ofw_memmap(memmap_t *map);
+extern int ofw_screen(screen_t *screen);
+extern int ofw_keyboard(keyboard_t *keyboard);
+#endif

 /tags/0.2.0.2/boot/arch/ppc32/loader/main.c
 ,0 → 1,160
+/*
+ * Copyright (C) 2005 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#include "main.h"
+#include "printf.h"
+#include "asm.h"
+#include "_components.h"
+#define HEAP_GAP 1024000
+bootinfo_t bootinfo;
+static void check_align(const void *addr, const char *desc)
+{
+    if ((unsigned int) addr % PAGE_SIZE != 0) {
+        printf("Error: %s not on page boundary, halting.\n", desc);
+        halt();
+    }
+}
+static void fix_overlap(void *va, void **pa, const char *desc, unsigned int *top)
+{
+    if ((unsigned int) *pa + PAGE_SIZE < *top) {
+        printf("Warning: %s overlaps kernel physical area\n", desc);
+        void *new_va = (void *) (ALIGN_UP((unsigned int) KERNEL_END + HEAP_GAP, PAGE_SIZE) + *top);
+        void *new_pa = (void *) (HEAP_GAP + *top);
+        *top += PAGE_SIZE;
+        if (ofw_map(new_pa, new_va, PAGE_SIZE, 0) != 0) {
+            printf("Error: Unable to map page aligned memory at %L (physical %L), halting.\n", new_va, new_pa);
+            halt();
+        }
+        if ((unsigned int) new_pa + PAGE_SIZE < KERNEL_SIZE) {
+            printf("Error: %s cannot be relocated, halting.\n", desc);
+            halt();
+        }
+        printf("Relocating %L -> %L (physical %L -> %L)\n", va, new_va, *pa, new_pa);
+        *pa = new_pa;
+        memcpy(new_va, va, PAGE_SIZE);
+    }
+}
+void bootstrap(void)
+{
+    printf("\nHelenOS PPC Bootloader\n");
+    init_components();
+    unsigned int i;
+    for (i = 0; i < COMPONENTS; i++)
+        check_align(components[i].start, components[i].name);
+    check_align(&real_mode, "bootstrap trampoline");
+    check_align(&trans, "translation table");
+    if (!ofw_memmap(&bootinfo.memmap)) {
+        printf("Error: unable to get memory map, halting.\n");
+        halt();
+    }
+    if (bootinfo.memmap.total == 0) {
+        printf("Error: no memory detected, halting.\n");
+        halt();
+    }
+    if (!ofw_screen(&bootinfo.screen)) {
+        printf("Error: unable to get screen properties, halting.\n");
+        halt();
+    }
+    if (!ofw_keyboard(&bootinfo.keyboard)) {
+        printf("Error: unable to get keyboard properties, halting.\n");
+        halt();
+    }
+    printf("\nDevice statistics\n");
+    printf(" screen at %L, resolution %dx%d, %d bpp (scanline %d bytes)\n", bootinfo.screen.addr, bootinfo.screen.width, bootinfo.screen.height, bootinfo.screen.bpp, bootinfo.screen.scanline);
+    printf(" keyboard at %L (size %d bytes)\n", bootinfo.keyboard.addr, bootinfo.keyboard.size);
+    void *real_mode_pa = ofw_translate(&real_mode);
+    void *trans_pa = ofw_translate(&trans);
+    void *bootinfo_pa = ofw_translate(&bootinfo);
+    printf("\nMemory statistics (total %d MB)\n", bootinfo.memmap.total >> 20);
+    printf(" %L: boot info structure (physical %L)\n", &bootinfo, bootinfo_pa);
+    printf(" %L: bootstrap trampoline (physical %L)\n", &real_mode, real_mode_pa);
+    printf(" %L: translation table (physical %L)\n", &trans, trans_pa);
+    for (i = 0; i < COMPONENTS; i++)
+        printf(" %L: %s image (size %d bytes)\n", components[i].start, components[i].name, components[i].size);
+    unsigned int top = 0;
+    for (i = 0; i < COMPONENTS; i++)
+        top += ALIGN_UP(components[i].size, PAGE_SIZE);
+    unsigned int pages = ALIGN_UP(KERNEL_SIZE, PAGE_SIZE) >> PAGE_WIDTH;
+    for (i = 0; i < pages; i++) {
+        void *pa = ofw_translate(KERNEL_START + (i << PAGE_WIDTH));
+        fix_overlap(KERNEL_START + (i << PAGE_WIDTH), &pa, "kernel", &top);
+        trans[i] = pa;
+    }
+    bootinfo.taskmap.count = 0;
+    for (i = 1; i < COMPONENTS; i++) {
+        unsigned int component_pages = ALIGN_UP(components[i].size, PAGE_SIZE) >> PAGE_WIDTH;
+        unsigned int j;
+        for (j = 0; j < component_pages; j++) {
+            void *pa = ofw_translate(components[i].start + (j << PAGE_WIDTH));
+            fix_overlap(components[i].start + (j << PAGE_WIDTH), &pa, components[i].name, &top);
+            trans[pages + j] = pa;
+            if (j == 0) {
+                bootinfo.taskmap.tasks[bootinfo.taskmap.count].addr = (void *) (pages << PAGE_WIDTH);
+                bootinfo.taskmap.tasks[bootinfo.taskmap.count].size = components[i].size;
+                bootinfo.taskmap.count++;
+            }
+        }
+        pages += component_pages;
+    }
+    fix_overlap(&real_mode, &real_mode_pa, "bootstrap trampoline", &top);
+    fix_overlap(&trans, &trans_pa, "translation table", &top);
+    fix_overlap(&bootinfo, &bootinfo_pa, "boot info", &top);
+    printf("\nBooting the kernel...\n");
+    jump_to_kernel(bootinfo_pa, sizeof(bootinfo), trans_pa, pages << PAGE_WIDTH, real_mode_pa, bootinfo.screen.addr, bootinfo.screen.scanline);
+}

 /tags/0.2.0.2/boot/arch/ppc32/loader/ofw.c
 ,0 → 1,266
+/*
+ * Copyright (C) 2005 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#include "ofw.h"
+#include "asm.h"
+#include "printf.h"
+#define MAX_OFW_ARGS    10
+#define BUF_SIZE        1024
+typedef unsigned int ofw_arg_t;
+typedef unsigned int ihandle;
+typedef unsigned int phandle;
+/** OpenFirmware command structure
+ *
+ */
+typedef struct {
+    const char *service;          /**< Command name */
+    unsigned int nargs;           /**< Number of in arguments */
+    unsigned int nret;            /**< Number of out arguments */
+    ofw_arg_t args[MAX_OFW_ARGS]; /**< List of arguments */
+} ofw_args_t;
+typedef void (*ofw_entry)(ofw_args_t *);
+ofw_entry ofw;
+phandle ofw_chosen;
+ihandle ofw_stdout;
+phandle ofw_root;
+ihandle ofw_mmu;
+phandle ofw_memory;
+phandle ofw_aliases;
+static int ofw_call(const char *service, const int nargs, const int nret, ofw_arg_t *rets, ...)
+{
+    va_list list;
+    ofw_args_t args;
+    int i;
+    args.service = service;
+    args.nargs = nargs;
+    args.nret = nret;
+    va_start(list, rets);
+    for (i = 0; i < nargs; i++)
+        args.args[i] = va_arg(list, ofw_arg_t);
+    va_end(list);
+    for (i = 0; i < nret; i++)
+        args.args[i + nargs] = 0;
+    ofw(&args);
+    for (i = 1; i < nret; i++)
+        rets[i - 1] = args.args[i + nargs];
+    return args.args[nargs];
+}
+static phandle ofw_find_device(const char *name)
+{
+    return ofw_call("finddevice", 1, 1, NULL, name);
+}
+static int ofw_get_property(const phandle device, const char *name, const void *buf, const int buflen)
+{
+    return ofw_call("getprop", 4, 1, NULL, device, name, buf, buflen);
+}
+static unsigned int ofw_get_address_cells(const phandle device)
+{
+    unsigned int ret;
+    if (ofw_get_property(device, "#address-cells", &ret, sizeof(ret)) <= 0)
+        if (ofw_get_property(ofw_root, "#address-cells", &ret, sizeof(ret)) <= 0)
+            ret = 1;
+    return ret;
+}
+static unsigned int ofw_get_size_cells(const phandle device)
+{
+    unsigned int ret;
+    if (ofw_get_property(device, "#size-cells", &ret, sizeof(ret)) <= 0)
+        if (ofw_get_property(ofw_root, "#size-cells", &ret, sizeof(ret)) <= 0)
+            ret = 1;
+    return ret;
+}
+static ihandle ofw_open(const char *name)
+{
+    return ofw_call("open", 1, 1, NULL, name);
+}
+void init(void)
+{
+    ofw_chosen = ofw_find_device("/chosen");
+    if (ofw_chosen == -1)
+        halt();
+    if (ofw_get_property(ofw_chosen, "stdout",  &ofw_stdout, sizeof(ofw_stdout)) <= 0)
+        ofw_stdout = 0;
+    ofw_root = ofw_find_device("/");
+    if (ofw_root == -1) {
+        puts("\r\nError: Unable to find / device, halted.\r\n");
+        halt();
+    }
+    if (ofw_get_property(ofw_chosen, "mmu",  &ofw_mmu, sizeof(ofw_mmu)) <= 0) {
+        puts("\r\nError: Unable to get mmu property, halted.\r\n");
+        halt();
+    }
+    ofw_memory = ofw_find_device("/memory");
+    if (ofw_memory == -1) {
+        puts("\r\nError: Unable to find /memory device, halted.\r\n");
+        halt();
+    }
+    ofw_aliases = ofw_find_device("/aliases");
+    if (ofw_aliases == -1) {
+        puts("\r\nError: Unable to find /aliases device, halted.\r\n");
+        halt();
+    }
+}
+void ofw_write(const char *str, const int len)
+{
+    if (ofw_stdout == 0)
+        return;
+    ofw_call("write", 3, 1, NULL, ofw_stdout, str, len);
+}
+void *ofw_translate(const void *virt)
+{
+    ofw_arg_t result[3];
+    if (ofw_call("call-method", 4, 4, result, "translate", ofw_mmu, virt, 1) != 0) {
+        puts("Error: MMU method translate() failed, halting.\n");
+        halt();
+    }
+    return (void *) result[2];
+}
+int ofw_map(const void *phys, const void *virt, const int size, const int mode)
+{
+    return ofw_call("call-method", 6, 1, NULL, "map", ofw_mmu, mode, size, virt, phys);
+}
+int ofw_memmap(memmap_t *map)
+{
+    unsigned int buf[BUF_SIZE];
+    int ret = ofw_get_property(ofw_memory, "reg", buf, sizeof(unsigned int) * BUF_SIZE);
+    if (ret <= 0)
+        return false;
+    unsigned int ac = ofw_get_address_cells(ofw_memory);
+    unsigned int sc = ofw_get_size_cells(ofw_memory);
+    int pos;
+    map->total = 0;
+    map->count = 0;
+    for (pos = 0; (pos < ret / sizeof(unsigned int)) && (map->count < MEMMAP_MAX_RECORDS); pos += ac + sc) {
+        void * start = (void *) buf[pos + ac - 1];
+        unsigned int size = buf[pos + ac + sc - 1];
+        if (size > 0) {
+            map->zones[map->count].start = start;
+            map->zones[map->count].size = size;
+            map->count++;
+            map->total += size;
+        }
+    }
+}
+int ofw_screen(screen_t *screen)
+{
+    char device_name[BUF_SIZE];
+    if (ofw_get_property(ofw_aliases, "screen", device_name, sizeof(char) * BUF_SIZE) <= 0)
+        return false;
+    phandle device = ofw_find_device(device_name);
+    if (device == -1)
+        return false;
+    if (ofw_get_property(device, "address", &screen->addr, sizeof(screen->addr)) <= 0)
+        return false;
+    if (ofw_get_property(device, "width", &screen->width, sizeof(screen->width)) <= 0)
+        return false;
+    if (ofw_get_property(device, "height", &screen->height, sizeof(screen->height)) <= 0)
+        return false;
+    if (ofw_get_property(device, "depth", &screen->bpp, sizeof(screen->bpp)) <= 0)
+        return false;
+    if (ofw_get_property(device, "linebytes", &screen->scanline, sizeof(screen->scanline)) <= 0)
+        return false;
+    return true;
+}
+int ofw_keyboard(keyboard_t *keyboard)
+{
+    char device_name[BUF_SIZE];
+    if (ofw_get_property(ofw_aliases, "macio", device_name, sizeof(char) * BUF_SIZE) <= 0)
+        return false;
+    phandle device = ofw_find_device(device_name);
+    if (device == -1)
+        return false;
+    // FIXME
+    keyboard->addr = (void *) 0x80816000;
+    keyboard->size = 7680;
+    return true;
+}

 /tags/0.2.0.2/boot/arch/ppc32/loader/Makefile
 ,0 → 1,94
+#
+# Copyright (C) 2006 Martin Decky
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# - Redistributions of source code must retain the above copyright
+#   notice, this list of conditions and the following disclaimer.
+# - Redistributions in binary form must reproduce the above copyright
+#   notice, this list of conditions and the following disclaimer in the
+#   documentation and/or other materials provided with the distribution.
+# - The name of the author may not be used to endorse or promote products
+#   derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+## Toolchain configuration
+#
+TARGET = ppc-linux-gnu
+TOOLCHAIN_DIR = /usr/local/ppc/bin
+ifeq ($(COMPILER),native)
+    CC = gcc
+    AS = as
+    LD = ld
+    OBJCOPY = objcopy
+    OBJDUMP = objdump
+else
+    CC = $(TOOLCHAIN_DIR)/$(TARGET)-gcc
+    AS = $(TOOLCHAIN_DIR)/$(TARGET)-as
+    LD = $(TOOLCHAIN_DIR)/$(TARGET)-ld
+    OBJCOPY = $(TOOLCHAIN_DIR)/$(TARGET)-objcopy
+    OBJDUMP = $(TOOLCHAIN_DIR)/$(TARGET)-objdump
+endif
+CFLAGS = -nostdinc -nostdlib -fno-builtin -Werror-implicit-function-declaration -Wmissing-prototypes -Werror -O3 -mcpu=powerpc -msoft-float -m32
+SOURCES = \
+    main.c \
+    ofw.c \
+    printf.c \
+    asm.S \
+    boot.S
+COMPONENTS = \
+    $(KERNELDIR)/kernel.bin \
+    $(USPACEDIR)/ns/ns \
+    $(USPACEDIR)/init/init \
+    $(USPACEDIR)/fb/fb \
+    $(USPACEDIR)/kbd/kbd \
+    $(USPACEDIR)/console/console \
+    $(USPACEDIR)/tetris/tetris \
+    $(USPACEDIR)/ipcc/ipcc \
+    $(USPACEDIR)/klog/klog
+OBJECTS := $(addsuffix .o,$(basename $(SOURCES)))
+COMPONENT_OBJECTS := $(addsuffix .o,$(basename $(notdir $(COMPONENTS))))
+.PHONY: all clean depend
+all: image.boot
+-include Makefile.depend
+image.boot: depend _components.h _link.ld $(COMPONENT_OBJECTS) $(OBJECTS) kernel.o
+    $(LD) -no-check-sections -N -T _link.ld $(COMPONENT_OBJECTS) $(OBJECTS) -o $@
+depend:
+    -makedepend $(DEFS) $(CFLAGS) -f - $(SOURCES) > Makefile.depend 2> /dev/null
+clean:
+    -rm -f _components.h _link.ld $(COMPONENT_OBJECTS) $(OBJECTS) image.boot Makefile.depend
+_components.h _link.ld $(COMPONENT_OBJECTS): $(COMPONENTS)
+    ./pack $(OBJCOPY) $(COMPONENTS)
+%.o: %.S
+    $(CC) $(DEFS) $(CFLAGS) -D__ASM__ -c $< -o $@
+%.o: %.c
+    $(CC) $(DEFS) $(CFLAGS) -c $< -o $@

 /tags/0.2.0.2/boot/arch/ppc32/loader/regname.h
 ,0 → 1,221
+/*
+ * Copyright (C) 2005 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#ifndef __ppc32_REGNAME_H__
+#define __ppc32_REGNAME_H__
+/* Condition Register Bit Fields */
+#define cr0 0
+#define cr1 1
+#define cr2 2
+#define cr3 3
+#define cr4 4
+#define cr5 5
+#define cr6 6
+#define cr7 7
+/* General Purpose Registers (GPRs) */
+#define r0  0
+#define r1  1
+#define r2  2
+#define r3  3
+#define r4  4
+#define r5  5
+#define r6  6
+#define r7  7
+#define r8  8
+#define r9  9
+#define r10 10
+#define r11 11
+#define r12 12
+#define r13 13
+#define r14 14
+#define r15 15
+#define r16 16
+#define r17 17
+#define r18 18
+#define r19 19
+#define r20 20
+#define r21 21
+#define r22 22
+#define r23 23
+#define r24 24
+#define r25 25
+#define r26 26
+#define r27 27
+#define r28 28
+#define r29 29
+#define r30 30
+#define r31 31
+/* GPR Aliases */
+#define sp  1
+/* Floating Point Registers (FPRs) */
+#define fr0     0
+#define fr1     1
+#define fr2     2
+#define fr3     3
+#define fr4     4
+#define fr5     5
+#define fr6     6
+#define fr7     7
+#define fr8     8
+#define fr9     9
+#define fr10    10
+#define fr11    11
+#define fr12    12
+#define fr13    13
+#define fr14    14
+#define fr15    15
+#define fr16    16
+#define fr17    17
+#define fr18    18
+#define fr19    19
+#define fr20    20
+#define fr21    21
+#define fr22    22
+#define fr23    23
+#define fr24    24
+#define fr25    25
+#define fr26    26
+#define fr27    27
+#define fr28    28
+#define fr29    29
+#define fr30    30
+#define fr31    31
+#define vr0     0
+#define vr1     1
+#define vr2     2
+#define vr3     3
+#define vr4     4
+#define vr5     5
+#define vr6     6
+#define vr7     7
+#define vr8     8
+#define vr9     9
+#define vr10    10
+#define vr11    11
+#define vr12    12
+#define vr13    13
+#define vr14    14
+#define vr15    15
+#define vr16    16
+#define vr17    17
+#define vr18    18
+#define vr19    19
+#define vr20    20
+#define vr21    21
+#define vr22    22
+#define vr23    23
+#define vr24    24
+#define vr25    25
+#define vr26    26
+#define vr27    27
+#define vr28    28
+#define vr29    29
+#define vr30    30
+#define vr31    31
+#define evr0    0
+#define evr1    1
+#define evr2    2
+#define evr3    3
+#define evr4    4
+#define evr5    5
+#define evr6    6
+#define evr7    7
+#define evr8    8
+#define evr9    9
+#define evr10   10
+#define evr11   11
+#define evr12   12
+#define evr13   13
+#define evr14   14
+#define evr15   15
+#define evr16   16
+#define evr17   17
+#define evr18   18
+#define evr19   19
+#define evr20   20
+#define evr21   21
+#define evr22   22
+#define evr23   23
+#define evr24   24
+#define evr25   25
+#define evr26   26
+#define evr27   27
+#define evr28   28
+#define evr29   29
+#define evr30   30
+#define evr31   31
+/* Special Purpose Registers (SPRs) */
+#define xer     1
+#define lr      8
+#define ctr     9
+#define dec     22
+#define sdr1    25
+#define srr0    26
+#define srr1    27
+#define sprg0   272
+#define sprg1   273
+#define sprg2   274
+#define sprg3   275
+#define prv     287
+#define ibat0u  528
+#define ibat0l  529
+#define ibat1u  530
+#define ibat1l  531
+#define ibat2u  532
+#define ibat2l  533
+#define ibat3u  534
+#define ibat3l  535
+#define dbat0u  536
+#define dbat0l  537
+#define dbat1u  538
+#define dbat1l  539
+#define dbat2u  540
+#define dbat2l  541
+#define dbat3u  542
+#define dbat3l  543
+#define hid0    1008
+/* MSR bits */
+#define msr_ir  (1 << 4)
+#define msr_dr  (1 << 5)
+#define msr_ee  (1 << 15)
+/* HID0 bits */
+#define hid0_ice    (1 << 15)
+#define hid0_dce    (1 << 14)
+#define hid0_icfi   (1 << 11)
+#define hid0_dci    (1 << 10)
+#endif

 /tags/0.2.0.2/boot/arch/ppc32/loader/boot.S
 ,0 → 1,42
+#
+# Copyright (C) 2006 Martin Decky
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# - Redistributions of source code must retain the above copyright
+#   notice, this list of conditions and the following disclaimer.
+# - Redistributions in binary form must reproduce the above copyright
+#   notice, this list of conditions and the following disclaimer in the
+#   documentation and/or other materials provided with the distribution.
+# - The name of the author may not be used to endorse or promote products
+#   derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+#include "regname.h"
+.section BOOTSTRAP, "ax"
+.global start
+start:
+    lis r4, ofw@ha
+    addi r4, r4, ofw@l
+    stw r5, 0(r4)
+    bl init
+    b bootstrap

 /tags/0.2.0.2/boot/arch/ppc32/loader/printf.h
 ,0 → 1,52
+/*
+ * Copyright (C) 2006 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#ifndef __PRINTF_H__
+#define __PRINTF_H__
+#define INT8    1
+#define INT16   2
+#define INT32   4
+#define INT64   8
+typedef signed char __s8;
+typedef unsigned char __u8;
+typedef unsigned short __u16;
+typedef unsigned int __u32;
+typedef unsigned long long __u64;
+typedef __u32 __address;
+typedef __u32 __native;
+typedef char *char_ptr;
+void puts(const char *str);
+void printf(const char *fmt, ...);
+#endif

 /tags/0.2.0.2/boot/arch/ppc32/loader/printf.c
 ,0 → 1,243
+/*
+ * Copyright (C) 2006 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#include "printf.h"
+#include "ofw.h"
+static char digits[] = "0123456789abcdef";  /**< Hexadecimal characters */
+void puts(const char *str)
+{
+    int len = 0;
+    while (str[len] != 0)
+        len++;
+    ofw_write(str, len);
+}
+/** Print hexadecimal digits
+ *
+ * Print fixed count of hexadecimal digits from
+ * the number num. The digits are printed in
+ * natural left-to-right order starting with
+ * the width-th digit.
+ *
+ * @param num   Number containing digits.
+ * @param width Count of digits to print.
+ *
+ */
+static void print_fixed_hex(const __u64 num, const int width)
+{
+    int i;
+    for (i = width * 8 - 4; i >= 0; i -= 4)
+        ofw_write(digits + ((num >> i) & 0xf), 1);
+}
+/** Print number in given base
+ *
+ * Print significant digits of a number in given
+ * base.
+ *
+ * @param num  Number to print.
+ * @param base Base to print the number in (should
+ *             be in range 2 .. 16).
+ *
+ */
+static void print_number(const __native num, const unsigned int base)
+{
+    int val = num;
+    char d[sizeof(__native) * 8 + 1];       /* this is good enough even for base == 2 */
+    int i = sizeof(__native) * 8 - 1;
+    do {
+        d[i--] = digits[val % base];
+    } while (val /= base);
+    d[sizeof(__native) * 8] = 0;
+    puts(&d[i + 1]);
+}
+/** General formatted text print
+ *
+ * Print text formatted according the fmt parameter
+ * and variant arguments. Each formatting directive
+ * begins with \% (percentage) character and one of the
+ * following character:
+ *
+ * \%    Prints the percentage character.
+ *
+ * s    The next variant argument is treated as char*
+ *      and printed as a NULL terminated string.
+ *
+ * c    The next variant argument is treated as a single char.
+ *
+ * p    The next variant argument is treated as a maximum
+ *      bit-width integer with respect to architecture
+ *      and printed in full hexadecimal width.
+ *
+ * P    As with 'p', but '0x' is prefixed.
+ *
+ * q    The next variant argument is treated as a 64b integer
+ *      and printed in full hexadecimal width.
+ *
+ * Q    As with 'q', but '0x' is prefixed.
+ *
+ * l    The next variant argument is treated as a 32b integer
+ *      and printed in full hexadecimal width.
+ *
+ * L    As with 'l', but '0x' is prefixed.
+ *
+ * w    The next variant argument is treated as a 16b integer
+ *      and printed in full hexadecimal width.
+ *
+ * W    As with 'w', but '0x' is prefixed.
+ *
+ * b    The next variant argument is treated as a 8b integer
+ *      and printed in full hexadecimal width.
+ *
+ * B    As with 'b', but '0x' is prefixed.
+ *
+ * d    The next variant argument is treated as integer
+ *      and printed in standard decimal format (only significant
+ *      digits).
+ *
+ * x    The next variant argument is treated as integer
+ *      and printed in standard hexadecimal format (only significant
+ *      digits).
+ *
+ * X    As with 'x', but '0x' is prefixed.
+ *
+ * All other characters from fmt except the formatting directives
+ * are printed in verbatim.
+ *
+ * @param fmt Formatting NULL terminated string.
+ */
+void printf(const char *fmt, ...)
+{
+    int i = 0;
+    va_list ap;
+    char c;
+    va_start(ap, fmt);
+    while ((c = fmt[i++])) {
+        switch (c) {
+            /* control character */
+            case '%':
+                switch (c = fmt[i++]) {
+                    /* percentile itself */
+                    case '%':
+                        break;
+                    /*
+                     * String and character conversions.
+                     */
+                    case 's':
+                        puts(va_arg(ap, char_ptr));
+                        goto loop;
+                    case 'c':
+                        c = (char) va_arg(ap, int);
+                        break;
+                    /*
+                     * Hexadecimal conversions with fixed width.
+                     */
+                    case 'P':
+                        puts("0x");
+                    case 'p':
+                        print_fixed_hex(va_arg(ap, __native), sizeof(__native));
+                        goto loop;
+                    case 'Q':
+                        puts("0x");
+                    case 'q':
+                        print_fixed_hex(va_arg(ap, __u64), INT64);
+                        goto loop;
+                    case 'L':
+                        puts("0x");
+                    case 'l':
+                        print_fixed_hex(va_arg(ap, __native), INT32);
+                        goto loop;
+                    case 'W':
+                        puts("0x");
+                    case 'w':
+                        print_fixed_hex(va_arg(ap, __native), INT16);
+                        goto loop;
+                    case 'B':
+                        puts("0x");
+                    case 'b':
+                        print_fixed_hex(va_arg(ap, __native), INT8);
+                        goto loop;
+                    /*
+                     * Decimal and hexadecimal conversions.
+                     */
+                    case 'd':
+                        print_number(va_arg(ap, __native), 10);
+                        goto loop;
+                    case 'X':
+                        puts("0x");
+                    case 'x':
+                        print_number(va_arg(ap, __native), 16);
+                        goto loop;
+                    /*
+                     * Bad formatting.
+                     */
+                    default:
+                        goto out;
+            }
+            default:
+                if (c == '\n')
+                    ofw_write("\r", 1);
+                ofw_write(&c, 1);
+        }
+loop:
+        ;
+    }
+out:
+    va_end(ap);
+}

 /tags/0.2.0.2/boot/arch/ppc32/Makefile.inc
 ,0 → 1,39
+#
+# Copyright (C) 2006 Martin Decky
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# - Redistributions of source code must retain the above copyright
+#   notice, this list of conditions and the following disclaimer.
+# - Redistributions in binary form must reproduce the above copyright
+#   notice, this list of conditions and the following disclaimer in the
+#   documentation and/or other materials provided with the distribution.
+# - The name of the author may not be used to endorse or promote products
+#   derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+build: image.boot
+image.boot: kernel uspace
+    make -C arch/$(ARCH)/loader COMPILER=$(COMPILER) KERNELDIR=../../../$(KERNELDIR) USPACEDIR=../../../$(USPACEDIR) "DEFS=$(DEFS)"
+    cp arch/$(ARCH)/loader/image.boot image.boot
+clean: clean_kernel clean_uspace
+    make -C arch/$(ARCH)/loader clean KERNELDIR=../../../$(KERNELDIR) USPACEDIR=../../../$(USPACEDIR)
+    -rm -f image.boot
+arch_distclean: distclean_kernel distclean_uspace

 /tags/0.2.0.2/boot/arch/amd64/grub/menu.lst
 ,0 → 1,15
+default 0
+timeout 10
+title=HelenOS
+root (cd)
+kernel /boot/kernel.bin
+module /boot/ns
+module /boot/init
+module /boot/pci
+module /boot/fb
+module /boot/kbd
+module /boot/console
+module /boot/tetris
+module /boot/ipcc
+module /boot/klog

/tags/0.2.0.2/boot/arch/amd64/grub/stage2_eltorito
Cannot display: file marked as a binary type.
svn:mime-type = application/octet-stream
Property changes:
Added: svn:mime-type
+application/octet-stream
\ No newline at end of property

 /tags/0.2.0.2/boot/arch/amd64/grub/COPYING
 ,0 → 1,340
+            GNU GENERAL PUBLIC LICENSE
+               Version 2, June 1991
+ Copyright (C) 1989, 1991 Free Software Foundation, Inc.
+Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ Everyone is permitted to copy and distribute verbatim copies
+ of this license document, but changing it is not allowed.
+                Preamble
+  The licenses for most software are designed to take away your
+freedom to share and change it.  By contrast, the GNU General Public
+License is intended to guarantee your freedom to share and change free
+software--to make sure the software is free for all its users.  This
+General Public License applies to most of the Free Software
+Foundation's software and to any other program whose authors commit to
+using it.  (Some other Free Software Foundation software is covered by
+the GNU Library General Public License instead.)  You can apply it to
+your programs, too.
+  When we speak of free software, we are referring to freedom, not
+price.  Our General Public Licenses are designed to make sure that you
+have the freedom to distribute copies of free software (and charge for
+this service if you wish), that you receive source code or can get it
+if you want it, that you can change the software or use pieces of it
+in new free programs; and that you know you can do these things.
+  To protect your rights, we need to make restrictions that forbid
+anyone to deny you these rights or to ask you to surrender the rights.
+These restrictions translate to certain responsibilities for you if you
+distribute copies of the software, or if you modify it.
+  For example, if you distribute copies of such a program, whether
+gratis or for a fee, you must give the recipients all the rights that
+you have.  You must make sure that they, too, receive or can get the
+source code.  And you must show them these terms so they know their
+rights.
+  We protect your rights with two steps: (1) copyright the software, and
+(2) offer you this license which gives you legal permission to copy,
+distribute and/or modify the software.
+  Also, for each author's protection and ours, we want to make certain
+that everyone understands that there is no warranty for this free
+software.  If the software is modified by someone else and passed on, we
+want its recipients to know that what they have is not the original, so
+that any problems introduced by others will not reflect on the original
+authors' reputations.
+  Finally, any free program is threatened constantly by software
+patents.  We wish to avoid the danger that redistributors of a free
+program will individually obtain patent licenses, in effect making the
+program proprietary.  To prevent this, we have made it clear that any
+patent must be licensed for everyone's free use or not licensed at all.
+  The precise terms and conditions for copying, distribution and
+modification follow.
+            GNU GENERAL PUBLIC LICENSE
+   TERMS AND CONDITIONS FOR COPYING, DISTRIBUTION AND MODIFICATION
+. This License applies to any program or other work which contains
+a notice placed by the copyright holder saying it may be distributed
+under the terms of this General Public License.  The "Program", below,
+refers to any such program or work, and a "work based on the Program"
+means either the Program or any derivative work under copyright law:
+that is to say, a work containing the Program or a portion of it,
+either verbatim or with modifications and/or translated into another
+language.  (Hereinafter, translation is included without limitation in
+the term "modification".)  Each licensee is addressed as "you".
+Activities other than copying, distribution and modification are not
+covered by this License; they are outside its scope.  The act of
+running the Program is not restricted, and the output from the Program
+is covered only if its contents constitute a work based on the
+Program (independent of having been made by running the Program).
+Whether that is true depends on what the Program does.
+. You may copy and distribute verbatim copies of the Program's
+source code as you receive it, in any medium, provided that you
+conspicuously and appropriately publish on each copy an appropriate
+copyright notice and disclaimer of warranty; keep intact all the
+notices that refer to this License and to the absence of any warranty;
+and give any other recipients of the Program a copy of this License
+along with the Program.
+You may charge a fee for the physical act of transferring a copy, and
+you may at your option offer warranty protection in exchange for a fee.
+. You may modify your copy or copies of the Program or any portion
+of it, thus forming a work based on the Program, and copy and
+distribute such modifications or work under the terms of Section 1
+above, provided that you also meet all of these conditions:
+    a) You must cause the modified files to carry prominent notices
+    stating that you changed the files and the date of any change.
+    b) You must cause any work that you distribute or publish, that in
+    whole or in part contains or is derived from the Program or any
+    part thereof, to be licensed as a whole at no charge to all third
+    parties under the terms of this License.
+    c) If the modified program normally reads commands interactively
+    when run, you must cause it, when started running for such
+    interactive use in the most ordinary way, to print or display an
+    announcement including an appropriate copyright notice and a
+    notice that there is no warranty (or else, saying that you provide
+    a warranty) and that users may redistribute the program under
+    these conditions, and telling the user how to view a copy of this
+    License.  (Exception: if the Program itself is interactive but
+    does not normally print such an announcement, your work based on
+    the Program is not required to print an announcement.)
+These requirements apply to the modified work as a whole.  If
+identifiable sections of that work are not derived from the Program,
+and can be reasonably considered independent and separate works in
+themselves, then this License, and its terms, do not apply to those
+sections when you distribute them as separate works.  But when you
+distribute the same sections as part of a whole which is a work based
+on the Program, the distribution of the whole must be on the terms of
+this License, whose permissions for other licensees extend to the
+entire whole, and thus to each and every part regardless of who wrote it.
+Thus, it is not the intent of this section to claim rights or contest
+your rights to work written entirely by you; rather, the intent is to
+exercise the right to control the distribution of derivative or
+collective works based on the Program.
+In addition, mere aggregation of another work not based on the Program
+with the Program (or with a work based on the Program) on a volume of
+a storage or distribution medium does not bring the other work under
+the scope of this License.
+. You may copy and distribute the Program (or a work based on it,
+under Section 2) in object code or executable form under the terms of
+Sections 1 and 2 above provided that you also do one of the following:
+    a) Accompany it with the complete corresponding machine-readable
+    source code, which must be distributed under the terms of Sections
+and 2 above on a medium customarily used for software interchange; or,
+    b) Accompany it with a written offer, valid for at least three
+    years, to give any third party, for a charge no more than your
+    cost of physically performing source distribution, a complete
+    machine-readable copy of the corresponding source code, to be
+    distributed under the terms of Sections 1 and 2 above on a medium
+    customarily used for software interchange; or,
+    c) Accompany it with the information you received as to the offer
+    to distribute corresponding source code.  (This alternative is
+    allowed only for noncommercial distribution and only if you
+    received the program in object code or executable form with such
+    an offer, in accord with Subsection b above.)
+The source code for a work means the preferred form of the work for
+making modifications to it.  For an executable work, complete source
+code means all the source code for all modules it contains, plus any
+associated interface definition files, plus the scripts used to
+control compilation and installation of the executable.  However, as a
+special exception, the source code distributed need not include
+anything that is normally distributed (in either source or binary
+form) with the major components (compiler, kernel, and so on) of the
+operating system on which the executable runs, unless that component
+itself accompanies the executable.
+If distribution of executable or object code is made by offering
+access to copy from a designated place, then offering equivalent
+access to copy the source code from the same place counts as
+distribution of the source code, even though third parties are not
+compelled to copy the source along with the object code.
+. You may not copy, modify, sublicense, or distribute the Program
+except as expressly provided under this License.  Any attempt
+otherwise to copy, modify, sublicense or distribute the Program is
+void, and will automatically terminate your rights under this License.
+However, parties who have received copies, or rights, from you under
+this License will not have their licenses terminated so long as such
+parties remain in full compliance.
+. You are not required to accept this License, since you have not
+signed it.  However, nothing else grants you permission to modify or
+distribute the Program or its derivative works.  These actions are
+prohibited by law if you do not accept this License.  Therefore, by
+modifying or distributing the Program (or any work based on the
+Program), you indicate your acceptance of this License to do so, and
+all its terms and conditions for copying, distributing or modifying
+the Program or works based on it.
+. Each time you redistribute the Program (or any work based on the
+Program), the recipient automatically receives a license from the
+original licensor to copy, distribute or modify the Program subject to
+these terms and conditions.  You may not impose any further
+restrictions on the recipients' exercise of the rights granted herein.
+You are not responsible for enforcing compliance by third parties to
+this License.
+. If, as a consequence of a court judgment or allegation of patent
+infringement or for any other reason (not limited to patent issues),
+conditions are imposed on you (whether by court order, agreement or
+otherwise) that contradict the conditions of this License, they do not
+excuse you from the conditions of this License.  If you cannot
+distribute so as to satisfy simultaneously your obligations under this
+License and any other pertinent obligations, then as a consequence you
+may not distribute the Program at all.  For example, if a patent
+license would not permit royalty-free redistribution of the Program by
+all those who receive copies directly or indirectly through you, then
+the only way you could satisfy both it and this License would be to
+refrain entirely from distribution of the Program.
+If any portion of this section is held invalid or unenforceable under
+any particular circumstance, the balance of the section is intended to
+apply and the section as a whole is intended to apply in other
+circumstances.
+It is not the purpose of this section to induce you to infringe any
+patents or other property right claims or to contest validity of any
+such claims; this section has the sole purpose of protecting the
+integrity of the free software distribution system, which is
+implemented by public license practices.  Many people have made
+generous contributions to the wide range of software distributed
+through that system in reliance on consistent application of that
+system; it is up to the author/donor to decide if he or she is willing
+to distribute software through any other system and a licensee cannot
+impose that choice.
+This section is intended to make thoroughly clear what is believed to
+be a consequence of the rest of this License.
+. If the distribution and/or use of the Program is restricted in
+certain countries either by patents or by copyrighted interfaces, the
+original copyright holder who places the Program under this License
+may add an explicit geographical distribution limitation excluding
+those countries, so that distribution is permitted only in or among
+countries not thus excluded.  In such case, this License incorporates
+the limitation as if written in the body of this License.
+. The Free Software Foundation may publish revised and/or new versions
+of the General Public License from time to time.  Such new versions will
+be similar in spirit to the present version, but may differ in detail to
+address new problems or concerns.
+Each version is given a distinguishing version number.  If the Program
+specifies a version number of this License which applies to it and "any
+later version", you have the option of following the terms and conditions
+either of that version or of any later version published by the Free
+Software Foundation.  If the Program does not specify a version number of
+this License, you may choose any version ever published by the Free Software
+Foundation.
+. If you wish to incorporate parts of the Program into other free
+programs whose distribution conditions are different, write to the author
+to ask for permission.  For software which is copyrighted by the Free
+Software Foundation, write to the Free Software Foundation; we sometimes
+make exceptions for this.  Our decision will be guided by the two goals
+of preserving the free status of all derivatives of our free software and
+of promoting the sharing and reuse of software generally.
+                NO WARRANTY
+. BECAUSE THE PROGRAM IS LICENSED FREE OF CHARGE, THERE IS NO WARRANTY
+FOR THE PROGRAM, TO THE EXTENT PERMITTED BY APPLICABLE LAW.  EXCEPT WHEN
+OTHERWISE STATED IN WRITING THE COPYRIGHT HOLDERS AND/OR OTHER PARTIES
+PROVIDE THE PROGRAM "AS IS" WITHOUT WARRANTY OF ANY KIND, EITHER EXPRESSED
+OR IMPLIED, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.  THE ENTIRE RISK AS
+TO THE QUALITY AND PERFORMANCE OF THE PROGRAM IS WITH YOU.  SHOULD THE
+PROGRAM PROVE DEFECTIVE, YOU ASSUME THE COST OF ALL NECESSARY SERVICING,
+REPAIR OR CORRECTION.
+. IN NO EVENT UNLESS REQUIRED BY APPLICABLE LAW OR AGREED TO IN WRITING
+WILL ANY COPYRIGHT HOLDER, OR ANY OTHER PARTY WHO MAY MODIFY AND/OR
+REDISTRIBUTE THE PROGRAM AS PERMITTED ABOVE, BE LIABLE TO YOU FOR DAMAGES,
+INCLUDING ANY GENERAL, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES ARISING
+OUT OF THE USE OR INABILITY TO USE THE PROGRAM (INCLUDING BUT NOT LIMITED
+TO LOSS OF DATA OR DATA BEING RENDERED INACCURATE OR LOSSES SUSTAINED BY
+YOU OR THIRD PARTIES OR A FAILURE OF THE PROGRAM TO OPERATE WITH ANY OTHER
+PROGRAMS), EVEN IF SUCH HOLDER OR OTHER PARTY HAS BEEN ADVISED OF THE
+POSSIBILITY OF SUCH DAMAGES.
+             END OF TERMS AND CONDITIONS
+        How to Apply These Terms to Your New Programs
+  If you develop a new program, and you want it to be of the greatest
+possible use to the public, the best way to achieve this is to make it
+free software which everyone can redistribute and change under these terms.
+  To do so, attach the following notices to the program.  It is safest
+to attach them to the start of each source file to most effectively
+convey the exclusion of warranty; and each file should have at least
+the "copyright" line and a pointer to where the full notice is found.
+    <one line to give the program's name and a brief idea of what it does.>
+    Copyright (C) <year>  <name of author>
+    This program is free software; you can redistribute it and/or modify
+    it under the terms of the GNU General Public License as published by
+    the Free Software Foundation; either version 2 of the License, or
+    (at your option) any later version.
+    This program is distributed in the hope that it will be useful,
+    but WITHOUT ANY WARRANTY; without even the implied warranty of
+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+    GNU General Public License for more details.
+    You should have received a copy of the GNU General Public License
+    along with this program; if not, write to the Free Software
+    Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+Also add information on how to contact you by electronic and paper mail.
+If the program is interactive, make it output a short notice like this
+when it starts in an interactive mode:
+    Gnomovision version 69, Copyright (C) year  name of author
+    Gnomovision comes with ABSOLUTELY NO WARRANTY; for details type `show w'.
+    This is free software, and you are welcome to redistribute it
+    under certain conditions; type `show c' for details.
+The hypothetical commands `show w' and `show c' should show the appropriate
+parts of the General Public License.  Of course, the commands you use may
+be called something other than `show w' and `show c'; they could even be
+mouse-clicks or menu items--whatever suits your program.
+You should also get your employer (if you work as a programmer) or your
+school, if any, to sign a "copyright disclaimer" for the program, if
+necessary.  Here is a sample; alter the names:
+  Yoyodyne, Inc., hereby disclaims all copyright interest in the program
+  `Gnomovision' (which makes passes at compilers) written by James Hacker.
+  <signature of Ty Coon>, 1 April 1989
+  Ty Coon, President of Vice
+This General Public License does not permit incorporating your program into
+proprietary programs.  If your program is a subroutine library, you may
+consider it more useful to permit linking proprietary applications with the
+library.  If this is what you want to do, use the GNU Library General
+Public License instead of this License.

/tags/0.2.0.2/boot/arch/amd64/grub/README
0,0 → 1,5
For licensing terms of GRUB boot loader see the file COPYING contained
in this directory. Full version of GRUB, including its source code,
can be downloaded from GRUB's project page:

http://www.gnu.org/software/grub/

 /tags/0.2.0.2/boot/arch/amd64/Makefile.inc
 ,0 → 1,51
+#
+# Copyright (C) 2006 Martin Decky
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# - Redistributions of source code must retain the above copyright
+#   notice, this list of conditions and the following disclaimer.
+# - Redistributions in binary form must reproduce the above copyright
+#   notice, this list of conditions and the following disclaimer in the
+#   documentation and/or other materials provided with the distribution.
+# - The name of the author may not be used to endorse or promote products
+#   derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+build: image.iso
+image.iso: kernel uspace
+    mkdir -p arch/$(ARCH)/iso/boot/grub
+    cp arch/$(ARCH)/grub/stage2_eltorito arch/$(ARCH)/iso/boot/grub/
+    cp arch/$(ARCH)/grub/menu.lst arch/$(ARCH)/iso/boot/grub/
+    cp $(KERNELDIR)/kernel.bin arch/$(ARCH)/iso/boot/
+    cp $(USPACEDIR)/init/init arch/$(ARCH)/iso/boot/
+    cp $(USPACEDIR)/ns/ns arch/$(ARCH)/iso/boot/
+    cp $(USPACEDIR)/pci/pci arch/$(ARCH)/iso/boot/
+    cp $(USPACEDIR)/fb/fb arch/$(ARCH)/iso/boot/
+    cp $(USPACEDIR)/kbd/kbd arch/$(ARCH)/iso/boot/
+    cp $(USPACEDIR)/console/console arch/$(ARCH)/iso/boot/
+    cp $(USPACEDIR)/tetris/tetris arch/$(ARCH)/iso/boot/
+    cp $(USPACEDIR)/ipcc/ipcc arch/$(ARCH)/iso/boot/
+    cp $(USPACEDIR)/klog/klog arch/$(ARCH)/iso/boot/
+    mkisofs -J -r -b boot/grub/stage2_eltorito -no-emul-boot -boot-load-size 4 -boot-info-table -o image.iso arch/$(ARCH)/iso/
+clean: clean_kernel clean_uspace
+    -rm -fr arch/$(ARCH)/iso
+    -rm -f image.iso
+arch_distclean: distclean_kernel distclean_uspace

 /tags/0.2.0.2/boot/arch/ia32/grub/menu.lst
 ,0 → 1,15
+default 0
+timeout 10
+title=HelenOS
+root (cd)
+kernel /boot/kernel.bin
+module /boot/ns
+module /boot/init
+module /boot/pci
+module /boot/fb
+module /boot/kbd
+module /boot/console
+module /boot/tetris
+module /boot/ipcc
+module /boot/klog

/tags/0.2.0.2/boot/arch/ia32/grub/stage2_eltorito
Cannot display: file marked as a binary type.
svn:mime-type = application/octet-stream
Property changes:
Added: svn:mime-type
+application/octet-stream
\ No newline at end of property

 /tags/0.2.0.2/boot/arch/ia32/grub/COPYING
 ,0 → 1,340
+            GNU GENERAL PUBLIC LICENSE
+               Version 2, June 1991
+ Copyright (C) 1989, 1991 Free Software Foundation, Inc.
+Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ Everyone is permitted to copy and distribute verbatim copies
+ of this license document, but changing it is not allowed.
+                Preamble
+  The licenses for most software are designed to take away your
+freedom to share and change it.  By contrast, the GNU General Public
+License is intended to guarantee your freedom to share and change free
+software--to make sure the software is free for all its users.  This
+General Public License applies to most of the Free Software
+Foundation's software and to any other program whose authors commit to
+using it.  (Some other Free Software Foundation software is covered by
+the GNU Library General Public License instead.)  You can apply it to
+your programs, too.
+  When we speak of free software, we are referring to freedom, not
+price.  Our General Public Licenses are designed to make sure that you
+have the freedom to distribute copies of free software (and charge for
+this service if you wish), that you receive source code or can get it
+if you want it, that you can change the software or use pieces of it
+in new free programs; and that you know you can do these things.
+  To protect your rights, we need to make restrictions that forbid
+anyone to deny you these rights or to ask you to surrender the rights.
+These restrictions translate to certain responsibilities for you if you
+distribute copies of the software, or if you modify it.
+  For example, if you distribute copies of such a program, whether
+gratis or for a fee, you must give the recipients all the rights that
+you have.  You must make sure that they, too, receive or can get the
+source code.  And you must show them these terms so they know their
+rights.
+  We protect your rights with two steps: (1) copyright the software, and
+(2) offer you this license which gives you legal permission to copy,
+distribute and/or modify the software.
+  Also, for each author's protection and ours, we want to make certain
+that everyone understands that there is no warranty for this free
+software.  If the software is modified by someone else and passed on, we
+want its recipients to know that what they have is not the original, so
+that any problems introduced by others will not reflect on the original
+authors' reputations.
+  Finally, any free program is threatened constantly by software
+patents.  We wish to avoid the danger that redistributors of a free
+program will individually obtain patent licenses, in effect making the
+program proprietary.  To prevent this, we have made it clear that any
+patent must be licensed for everyone's free use or not licensed at all.
+  The precise terms and conditions for copying, distribution and
+modification follow.
+            GNU GENERAL PUBLIC LICENSE
+   TERMS AND CONDITIONS FOR COPYING, DISTRIBUTION AND MODIFICATION
+. This License applies to any program or other work which contains
+a notice placed by the copyright holder saying it may be distributed
+under the terms of this General Public License.  The "Program", below,
+refers to any such program or work, and a "work based on the Program"
+means either the Program or any derivative work under copyright law:
+that is to say, a work containing the Program or a portion of it,
+either verbatim or with modifications and/or translated into another
+language.  (Hereinafter, translation is included without limitation in
+the term "modification".)  Each licensee is addressed as "you".
+Activities other than copying, distribution and modification are not
+covered by this License; they are outside its scope.  The act of
+running the Program is not restricted, and the output from the Program
+is covered only if its contents constitute a work based on the
+Program (independent of having been made by running the Program).
+Whether that is true depends on what the Program does.
+. You may copy and distribute verbatim copies of the Program's
+source code as you receive it, in any medium, provided that you
+conspicuously and appropriately publish on each copy an appropriate
+copyright notice and disclaimer of warranty; keep intact all the
+notices that refer to this License and to the absence of any warranty;
+and give any other recipients of the Program a copy of this License
+along with the Program.
+You may charge a fee for the physical act of transferring a copy, and
+you may at your option offer warranty protection in exchange for a fee.
+. You may modify your copy or copies of the Program or any portion
+of it, thus forming a work based on the Program, and copy and
+distribute such modifications or work under the terms of Section 1
+above, provided that you also meet all of these conditions:
+    a) You must cause the modified files to carry prominent notices
+    stating that you changed the files and the date of any change.
+    b) You must cause any work that you distribute or publish, that in
+    whole or in part contains or is derived from the Program or any
+    part thereof, to be licensed as a whole at no charge to all third
+    parties under the terms of this License.
+    c) If the modified program normally reads commands interactively
+    when run, you must cause it, when started running for such
+    interactive use in the most ordinary way, to print or display an
+    announcement including an appropriate copyright notice and a
+    notice that there is no warranty (or else, saying that you provide
+    a warranty) and that users may redistribute the program under
+    these conditions, and telling the user how to view a copy of this
+    License.  (Exception: if the Program itself is interactive but
+    does not normally print such an announcement, your work based on
+    the Program is not required to print an announcement.)
+These requirements apply to the modified work as a whole.  If
+identifiable sections of that work are not derived from the Program,
+and can be reasonably considered independent and separate works in
+themselves, then this License, and its terms, do not apply to those
+sections when you distribute them as separate works.  But when you
+distribute the same sections as part of a whole which is a work based
+on the Program, the distribution of the whole must be on the terms of
+this License, whose permissions for other licensees extend to the
+entire whole, and thus to each and every part regardless of who wrote it.
+Thus, it is not the intent of this section to claim rights or contest
+your rights to work written entirely by you; rather, the intent is to
+exercise the right to control the distribution of derivative or
+collective works based on the Program.
+In addition, mere aggregation of another work not based on the Program
+with the Program (or with a work based on the Program) on a volume of
+a storage or distribution medium does not bring the other work under
+the scope of this License.
+. You may copy and distribute the Program (or a work based on it,
+under Section 2) in object code or executable form under the terms of
+Sections 1 and 2 above provided that you also do one of the following:
+    a) Accompany it with the complete corresponding machine-readable
+    source code, which must be distributed under the terms of Sections
+and 2 above on a medium customarily used for software interchange; or,
+    b) Accompany it with a written offer, valid for at least three
+    years, to give any third party, for a charge no more than your
+    cost of physically performing source distribution, a complete
+    machine-readable copy of the corresponding source code, to be
+    distributed under the terms of Sections 1 and 2 above on a medium
+    customarily used for software interchange; or,
+    c) Accompany it with the information you received as to the offer
+    to distribute corresponding source code.  (This alternative is
+    allowed only for noncommercial distribution and only if you
+    received the program in object code or executable form with such
+    an offer, in accord with Subsection b above.)
+The source code for a work means the preferred form of the work for
+making modifications to it.  For an executable work, complete source
+code means all the source code for all modules it contains, plus any
+associated interface definition files, plus the scripts used to
+control compilation and installation of the executable.  However, as a
+special exception, the source code distributed need not include
+anything that is normally distributed (in either source or binary
+form) with the major components (compiler, kernel, and so on) of the
+operating system on which the executable runs, unless that component
+itself accompanies the executable.
+If distribution of executable or object code is made by offering
+access to copy from a designated place, then offering equivalent
+access to copy the source code from the same place counts as
+distribution of the source code, even though third parties are not
+compelled to copy the source along with the object code.
+. You may not copy, modify, sublicense, or distribute the Program
+except as expressly provided under this License.  Any attempt
+otherwise to copy, modify, sublicense or distribute the Program is
+void, and will automatically terminate your rights under this License.
+However, parties who have received copies, or rights, from you under
+this License will not have their licenses terminated so long as such
+parties remain in full compliance.
+. You are not required to accept this License, since you have not
+signed it.  However, nothing else grants you permission to modify or
+distribute the Program or its derivative works.  These actions are
+prohibited by law if you do not accept this License.  Therefore, by
+modifying or distributing the Program (or any work based on the
+Program), you indicate your acceptance of this License to do so, and
+all its terms and conditions for copying, distributing or modifying
+the Program or works based on it.
+. Each time you redistribute the Program (or any work based on the
+Program), the recipient automatically receives a license from the
+original licensor to copy, distribute or modify the Program subject to
+these terms and conditions.  You may not impose any further
+restrictions on the recipients' exercise of the rights granted herein.
+You are not responsible for enforcing compliance by third parties to
+this License.
+. If, as a consequence of a court judgment or allegation of patent
+infringement or for any other reason (not limited to patent issues),
+conditions are imposed on you (whether by court order, agreement or
+otherwise) that contradict the conditions of this License, they do not
+excuse you from the conditions of this License.  If you cannot
+distribute so as to satisfy simultaneously your obligations under this
+License and any other pertinent obligations, then as a consequence you
+may not distribute the Program at all.  For example, if a patent
+license would not permit royalty-free redistribution of the Program by
+all those who receive copies directly or indirectly through you, then
+the only way you could satisfy both it and this License would be to
+refrain entirely from distribution of the Program.
+If any portion of this section is held invalid or unenforceable under
+any particular circumstance, the balance of the section is intended to
+apply and the section as a whole is intended to apply in other
+circumstances.
+It is not the purpose of this section to induce you to infringe any
+patents or other property right claims or to contest validity of any
+such claims; this section has the sole purpose of protecting the
+integrity of the free software distribution system, which is
+implemented by public license practices.  Many people have made
+generous contributions to the wide range of software distributed
+through that system in reliance on consistent application of that
+system; it is up to the author/donor to decide if he or she is willing
+to distribute software through any other system and a licensee cannot
+impose that choice.
+This section is intended to make thoroughly clear what is believed to
+be a consequence of the rest of this License.
+. If the distribution and/or use of the Program is restricted in
+certain countries either by patents or by copyrighted interfaces, the
+original copyright holder who places the Program under this License
+may add an explicit geographical distribution limitation excluding
+those countries, so that distribution is permitted only in or among
+countries not thus excluded.  In such case, this License incorporates
+the limitation as if written in the body of this License.
+. The Free Software Foundation may publish revised and/or new versions
+of the General Public License from time to time.  Such new versions will
+be similar in spirit to the present version, but may differ in detail to
+address new problems or concerns.
+Each version is given a distinguishing version number.  If the Program
+specifies a version number of this License which applies to it and "any
+later version", you have the option of following the terms and conditions
+either of that version or of any later version published by the Free
+Software Foundation.  If the Program does not specify a version number of
+this License, you may choose any version ever published by the Free Software
+Foundation.
+. If you wish to incorporate parts of the Program into other free
+programs whose distribution conditions are different, write to the author
+to ask for permission.  For software which is copyrighted by the Free
+Software Foundation, write to the Free Software Foundation; we sometimes
+make exceptions for this.  Our decision will be guided by the two goals
+of preserving the free status of all derivatives of our free software and
+of promoting the sharing and reuse of software generally.
+                NO WARRANTY
+. BECAUSE THE PROGRAM IS LICENSED FREE OF CHARGE, THERE IS NO WARRANTY
+FOR THE PROGRAM, TO THE EXTENT PERMITTED BY APPLICABLE LAW.  EXCEPT WHEN
+OTHERWISE STATED IN WRITING THE COPYRIGHT HOLDERS AND/OR OTHER PARTIES
+PROVIDE THE PROGRAM "AS IS" WITHOUT WARRANTY OF ANY KIND, EITHER EXPRESSED
+OR IMPLIED, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.  THE ENTIRE RISK AS
+TO THE QUALITY AND PERFORMANCE OF THE PROGRAM IS WITH YOU.  SHOULD THE
+PROGRAM PROVE DEFECTIVE, YOU ASSUME THE COST OF ALL NECESSARY SERVICING,
+REPAIR OR CORRECTION.
+. IN NO EVENT UNLESS REQUIRED BY APPLICABLE LAW OR AGREED TO IN WRITING
+WILL ANY COPYRIGHT HOLDER, OR ANY OTHER PARTY WHO MAY MODIFY AND/OR
+REDISTRIBUTE THE PROGRAM AS PERMITTED ABOVE, BE LIABLE TO YOU FOR DAMAGES,
+INCLUDING ANY GENERAL, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES ARISING
+OUT OF THE USE OR INABILITY TO USE THE PROGRAM (INCLUDING BUT NOT LIMITED
+TO LOSS OF DATA OR DATA BEING RENDERED INACCURATE OR LOSSES SUSTAINED BY
+YOU OR THIRD PARTIES OR A FAILURE OF THE PROGRAM TO OPERATE WITH ANY OTHER
+PROGRAMS), EVEN IF SUCH HOLDER OR OTHER PARTY HAS BEEN ADVISED OF THE
+POSSIBILITY OF SUCH DAMAGES.
+             END OF TERMS AND CONDITIONS
+        How to Apply These Terms to Your New Programs
+  If you develop a new program, and you want it to be of the greatest
+possible use to the public, the best way to achieve this is to make it
+free software which everyone can redistribute and change under these terms.
+  To do so, attach the following notices to the program.  It is safest
+to attach them to the start of each source file to most effectively
+convey the exclusion of warranty; and each file should have at least
+the "copyright" line and a pointer to where the full notice is found.
+    <one line to give the program's name and a brief idea of what it does.>
+    Copyright (C) <year>  <name of author>
+    This program is free software; you can redistribute it and/or modify
+    it under the terms of the GNU General Public License as published by
+    the Free Software Foundation; either version 2 of the License, or
+    (at your option) any later version.
+    This program is distributed in the hope that it will be useful,
+    but WITHOUT ANY WARRANTY; without even the implied warranty of
+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+    GNU General Public License for more details.
+    You should have received a copy of the GNU General Public License
+    along with this program; if not, write to the Free Software
+    Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+Also add information on how to contact you by electronic and paper mail.
+If the program is interactive, make it output a short notice like this
+when it starts in an interactive mode:
+    Gnomovision version 69, Copyright (C) year  name of author
+    Gnomovision comes with ABSOLUTELY NO WARRANTY; for details type `show w'.
+    This is free software, and you are welcome to redistribute it
+    under certain conditions; type `show c' for details.
+The hypothetical commands `show w' and `show c' should show the appropriate
+parts of the General Public License.  Of course, the commands you use may
+be called something other than `show w' and `show c'; they could even be
+mouse-clicks or menu items--whatever suits your program.
+You should also get your employer (if you work as a programmer) or your
+school, if any, to sign a "copyright disclaimer" for the program, if
+necessary.  Here is a sample; alter the names:
+  Yoyodyne, Inc., hereby disclaims all copyright interest in the program
+  `Gnomovision' (which makes passes at compilers) written by James Hacker.
+  <signature of Ty Coon>, 1 April 1989
+  Ty Coon, President of Vice
+This General Public License does not permit incorporating your program into
+proprietary programs.  If your program is a subroutine library, you may
+consider it more useful to permit linking proprietary applications with the
+library.  If this is what you want to do, use the GNU Library General
+Public License instead of this License.

/tags/0.2.0.2/boot/arch/ia32/grub/README
0,0 → 1,5
For licensing terms of GRUB boot loader see the file COPYING contained
in this directory. Full version of GRUB, including its source code,
can be downloaded from GRUB's project page:

http://www.gnu.org/software/grub/

 /tags/0.2.0.2/boot/arch/ia32/Makefile.inc
 ,0 → 1,51
+#
+# Copyright (C) 2006 Martin Decky
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# - Redistributions of source code must retain the above copyright
+#   notice, this list of conditions and the following disclaimer.
+# - Redistributions in binary form must reproduce the above copyright
+#   notice, this list of conditions and the following disclaimer in the
+#   documentation and/or other materials provided with the distribution.
+# - The name of the author may not be used to endorse or promote products
+#   derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+build: image.iso
+image.iso: kernel uspace
+    mkdir -p arch/$(ARCH)/iso/boot/grub
+    cp arch/$(ARCH)/grub/stage2_eltorito arch/$(ARCH)/iso/boot/grub/
+    cp arch/$(ARCH)/grub/menu.lst arch/$(ARCH)/iso/boot/grub/
+    cp $(KERNELDIR)/kernel.bin arch/$(ARCH)/iso/boot/
+    cp $(USPACEDIR)/init/init arch/$(ARCH)/iso/boot/
+    cp $(USPACEDIR)/ns/ns arch/$(ARCH)/iso/boot/
+    cp $(USPACEDIR)/pci/pci arch/$(ARCH)/iso/boot/
+    cp $(USPACEDIR)/fb/fb arch/$(ARCH)/iso/boot/
+    cp $(USPACEDIR)/kbd/kbd arch/$(ARCH)/iso/boot/
+    cp $(USPACEDIR)/console/console arch/$(ARCH)/iso/boot/
+    cp $(USPACEDIR)/tetris/tetris arch/$(ARCH)/iso/boot/
+    cp $(USPACEDIR)/ipcc/ipcc arch/$(ARCH)/iso/boot/
+    cp $(USPACEDIR)/klog/klog arch/$(ARCH)/iso/boot/
+    mkisofs -J -r -b boot/grub/stage2_eltorito -no-emul-boot -boot-load-size 4 -boot-info-table -o image.iso arch/$(ARCH)/iso/
+clean: clean_kernel clean_uspace
+    -rm -fr arch/$(ARCH)/iso
+    -rm -f image.iso
+arch_distclean: distclean_kernel distclean_uspace

 /tags/0.2.0.2/boot/arch/ppc64/loader/ofw.c
 ,0 → 1,247
+/*
+ * Copyright (C) 2005 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#include "ofw.h"
+#include "asm.h"
+#include "printf.h"
+#define MAX_OFW_ARGS    10
+#define BUF_SIZE        1024
+typedef unsigned int ofw_arg_t;
+typedef unsigned int ihandle;
+typedef unsigned int phandle;
+/** OpenFirmware command structure
+ *
+ */
+typedef struct {
+    const char *service;          /**< Command name */
+    unsigned int nargs;           /**< Number of in arguments */
+    unsigned int nret;            /**< Number of out arguments */
+    ofw_arg_t args[MAX_OFW_ARGS]; /**< List of arguments */
+} ofw_args_t;
+typedef void (*ofw_entry)(ofw_args_t *);
+ofw_entry ofw;
+phandle ofw_chosen;
+ihandle ofw_stdout;
+phandle ofw_root;
+ihandle ofw_mmu;
+phandle ofw_memory;
+phandle ofw_aliases;
+static int ofw_call(const char *service, const int nargs, const int nret, ofw_arg_t *rets, ...)
+{
+    va_list list;
+    ofw_args_t args;
+    int i;
+    args.service = service;
+    args.nargs = nargs;
+    args.nret = nret;
+    va_start(list, rets);
+    for (i = 0; i < nargs; i++)
+        args.args[i] = va_arg(list, ofw_arg_t);
+    va_end(list);
+    for (i = 0; i < nret; i++)
+        args.args[i + nargs] = 0;
+    ofw(&args);
+    for (i = 1; i < nret; i++)
+        rets[i - 1] = args.args[i + nargs];
+    return args.args[nargs];
+}
+static phandle ofw_find_device(const char *name)
+{
+    return ofw_call("finddevice", 1, 1, NULL, name);
+}
+static int ofw_get_property(const phandle device, const char *name, const void *buf, const int buflen)
+{
+    return ofw_call("getprop", 4, 1, NULL, device, name, buf, buflen);
+}
+static unsigned int ofw_get_address_cells(const phandle device)
+{
+    unsigned int ret;
+    if (ofw_get_property(device, "#address-cells", &ret, sizeof(ret)) <= 0)
+        if (ofw_get_property(ofw_root, "#address-cells", &ret, sizeof(ret)) <= 0)
+            ret = 1;
+    return ret;
+}
+static unsigned int ofw_get_size_cells(const phandle device)
+{
+    unsigned int ret;
+    if (ofw_get_property(device, "#size-cells", &ret, sizeof(ret)) <= 0)
+        if (ofw_get_property(ofw_root, "#size-cells", &ret, sizeof(ret)) <= 0)
+            ret = 1;
+    return ret;
+}
+static ihandle ofw_open(const char *name)
+{
+    return ofw_call("open", 1, 1, NULL, name);
+}
+void init(void)
+{
+    ofw_chosen = ofw_find_device("/chosen");
+    if (ofw_chosen == -1)
+        halt();
+    if (ofw_get_property(ofw_chosen, "stdout",  &ofw_stdout, sizeof(ofw_stdout)) <= 0)
+        ofw_stdout = 0;
+    ofw_root = ofw_find_device("/");
+    if (ofw_root == -1) {
+        puts("\r\nError: Unable to find / device, halted.\r\n");
+        halt();
+    }
+    if (ofw_get_property(ofw_chosen, "mmu",  &ofw_mmu, sizeof(ofw_mmu)) <= 0) {
+        puts("\r\nError: Unable to get mmu property, halted.\r\n");
+        halt();
+    }
+    ofw_memory = ofw_find_device("/memory");
+    if (ofw_memory == -1) {
+        puts("\r\nError: Unable to find /memory device, halted.\r\n");
+        halt();
+    }
+    ofw_aliases = ofw_find_device("/aliases");
+    if (ofw_aliases == -1) {
+        puts("\r\nError: Unable to find /aliases device, halted.\r\n");
+        halt();
+    }
+}
+void ofw_write(const char *str, const long len)
+{
+    if (ofw_stdout == 0)
+        return;
+    ofw_call("write", 3, 1, NULL, ofw_stdout, str, len);
+}
+void *ofw_translate(const void *virt)
+{
+    ofw_arg_t result[3];
+    if (ofw_call("call-method", 4, 4, result, "translate", ofw_mmu, (unsigned long) virt, 1) != 0) {
+        puts("Error: MMU method translate() failed, halting.\n");
+        halt();
+    }
+    return (void *) (unsigned long) result[2];
+}
+int ofw_map(const void *phys, const void *virt, const long size, const int mode)
+{
+    return ofw_call("call-method", 6, 1, NULL, "map", ofw_mmu, mode, size, virt, phys);
+}
+int ofw_memmap(memmap_t *map)
+{
+    unsigned int buf[BUF_SIZE];
+    int ret = ofw_get_property(ofw_memory, "reg", buf, sizeof(unsigned int) * BUF_SIZE);
+    if (ret <= 0)
+        return false;
+    unsigned int ac = ofw_get_address_cells(ofw_memory);
+    unsigned int sc = ofw_get_size_cells(ofw_memory);
+    int pos;
+    map->total = 0;
+    map->count = 0;
+    for (pos = 0; (pos < ret / sizeof(unsigned int)) && (map->count < MEMMAP_MAX_RECORDS); pos += ac + sc) {
+        void * start = (void *) (unsigned long) buf[pos + ac - 1];
+        unsigned int size = buf[pos + ac + sc - 1];
+        if (size > 0) {
+            map->zones[map->count].start = start;
+            map->zones[map->count].size = size;
+            map->count++;
+            map->total += size;
+        }
+    }
+}
+int ofw_screen(screen_t *screen)
+{
+    char device_name[BUF_SIZE];
+    if (ofw_get_property(ofw_aliases, "screen", device_name, sizeof(char) * BUF_SIZE) <= 0)
+        return false;
+    phandle device = ofw_find_device(device_name);
+    if (device == -1)
+        return false;
+    if (ofw_get_property(device, "address", &screen->addr, sizeof(screen->addr)) <= 0)
+        return false;
+    if (ofw_get_property(device, "width", &screen->width, sizeof(screen->width)) <= 0)
+        return false;
+    if (ofw_get_property(device, "height", &screen->height, sizeof(screen->height)) <= 0)
+        return false;
+    if (ofw_get_property(device, "depth", &screen->bpp, sizeof(screen->bpp)) <= 0)
+        return false;
+    if (ofw_get_property(device, "linebytes", &screen->scanline, sizeof(screen->scanline)) <= 0)
+        return false;
+    return true;
+}

 /tags/0.2.0.2/boot/arch/ppc64/loader/Makefile
 ,0 → 1,90
+#
+# Copyright (C) 2006 Martin Decky
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# - Redistributions of source code must retain the above copyright
+#   notice, this list of conditions and the following disclaimer.
+# - Redistributions in binary form must reproduce the above copyright
+#   notice, this list of conditions and the following disclaimer in the
+#   documentation and/or other materials provided with the distribution.
+# - The name of the author may not be used to endorse or promote products
+#   derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+## Toolchain configuration
+#
+TARGET = ppc64-linux-gnu
+TOOLCHAIN_DIR = /usr/local/ppc64/bin
+ifeq ($(COMPILER),native)
+    CC = gcc
+    AS = as
+    LD = ld
+    OBJCOPY = objcopy
+    OBJDUMP = objdump
+else
+    CC = $(TOOLCHAIN_DIR)/$(TARGET)-gcc
+    AS = $(TOOLCHAIN_DIR)/$(TARGET)-as
+    LD = $(TOOLCHAIN_DIR)/$(TARGET)-ld
+    OBJCOPY = $(TOOLCHAIN_DIR)/$(TARGET)-objcopy
+    OBJDUMP = $(TOOLCHAIN_DIR)/$(TARGET)-objdump
+endif
+CFLAGS = -nostdinc -nostdlib -fno-builtin -Werror-implicit-function-declaration -Wmissing-prototypes -Werror -O3 -mcpu=powerpc64 -msoft-float -m64
+DEFS =
+SOURCES = \
+    main.c \
+    ofw.c \
+    printf.c \
+    asm.S \
+    boot.S
+COMPONENTS = \
+    $(KERNELDIR)/kernel.bin \
+    $(USPACEDIR)/ns/ns \
+    $(USPACEDIR)/init/init \
+    $(USPACEDIR)/fb/fb
+OBJECTS := $(addsuffix .o,$(basename $(SOURCES)))
+COMPONENT_OBJECTS := $(addsuffix .o,$(basename $(notdir $(COMPONENTS))))
+.PHONY: all clean depend
+all: image.boot
+-include Makefile.depend
+image.boot: depend _components.h _link.ld $(COMPONENT_OBJECTS) $(OBJECTS) kernel.o
+    $(LD) -no-check-sections -N -T _link.ld $(COMPONENT_OBJECTS) $(OBJECTS) -o $@
+depend:
+    -makedepend $(DEFS) $(CFLAGS) -f - $(SOURCES) > Makefile.depend 2> /dev/null
+clean:
+    -rm -f _components.h _link.ld $(COMPONENT_OBJECTS) $(OBJECTS) image.boot Makefile.depend
+_components.h _link.ld $(COMPONENT_OBJECTS): $(COMPONENTS)
+    ./pack $(OBJCOPY) $(COMPONENTS)
+%.o: %.S
+    $(CC) $(DEFS) $(CFLAGS) -D__ASM__ -c $< -o $@
+%.o: %.c
+    $(CC) $(DEFS) $(CFLAGS) -c $< -o $@

 /tags/0.2.0.2/boot/arch/ppc64/loader/pack
 ,0 → 1,124
+#! /bin/sh
+#
+# Copyright (C) 2006 Martin Decky
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# - Redistributions of source code must retain the above copyright
+#   notice, this list of conditions and the following disclaimer.
+# - Redistributions in binary form must reproduce the above copyright
+#   notice, this list of conditions and the following disclaimer in the
+#   documentation and/or other materials provided with the distribution.
+# - The name of the author may not be used to endorse or promote products
+#   derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+[ "$#" -lt 1 ] && exit 1
+OBJCOPY="$1"
+LINK="_link.ld"
+HEADER="_components.h"
+shift
+echo 'OUTPUT_FORMAT("elf64-powerpc")
+OUTPUT_ARCH(powerpc:common64)
+ENTRY(start)
+SECTIONS {
+    .boot 0x0000000010000000: AT (0) {
+        *(BOOTSTRAP);
+        *(REALMODE);
+        *(.text);
+        *(.toc);
+        *(.opd);
+        *(.rodata);
+        *(.rodata.*);
+        *(.data);       /* initialized data */
+        *(.sdata);
+        *(.sdata2);
+        *(.sbss);
+        *(.bss);        /* uninitialized static variables */
+        *(COMMON);      /* global variables */
+        . = ALIGN(4096);
+        *(.kernel_image);' > "$LINK"
+echo '#ifndef ___COMPONENTS_H__
+#define ___COMPONENTS_H__
+typedef struct {
+    char *name;
+    void *start;
+    void *end;
+    unsigned long size;
+} component_t;' > "$HEADER"
+COUNT="0"
+DATA=""
+for TASK in "$@" ; do
+    BASENAME="`basename "$TASK" | sed 's/^\(.*\)\.[^.]*$/\1/'`"
+    OBJECT="${BASENAME}.o"
+    SYMBOL="`echo "_binary_$TASK" | tr "./" "__"`"
+    MACRO="`echo "$BASENAME" | tr [:lower:] [:upper:]`"
+    echo "$TASK -> $OBJECT"
+    echo "
+        . = ALIGN(4096);
+        *(.${BASENAME}_image);" >> "$LINK"
+    echo "
+extern int ${SYMBOL}_start;
+extern int ${SYMBOL}_end;
+#define ${MACRO}_START ((void *) &${SYMBOL}_start)
+#define ${MACRO}_END ((void *) &${SYMBOL}_end)
+#define ${MACRO}_SIZE ((unsigned long) ${MACRO}_END - (unsigned long) ${MACRO}_START)" >> "$HEADER"
+    "$OBJCOPY" -I binary -O elf64-powerpc -B powerpc:common64 --rename-section ".data=.${BASENAME}_image" "$TASK" "$OBJECT"
+    DATA="${DATA}
+    components[$COUNT].name = \"${BASENAME}\";
+    components[$COUNT].start = ${MACRO}_START;
+    components[$COUNT].end = ${MACRO}_END;
+    components[$COUNT].size = ${MACRO}_SIZE;";
+    COUNT="`expr "$COUNT" + 1`"
+done
+echo '}
+    /DISCARD/ : {
+        *(*);
+    }
+}' >> "$LINK"
+echo "
+#define COMPONENTS $COUNT
+component_t components[COMPONENTS];
+static void init_components(void)
+{
+$DATA
+}
+#endif
+" >> "$HEADER"
 Property changes:
 Added: svn:executable
 +*
 \ No newline at end of property

 /tags/0.2.0.2/boot/arch/ppc64/loader/asm.S
 ,0 → 1,215
+#
+# Copyright (C) 2006 Martin Decky
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# - Redistributions of source code must retain the above copyright
+#   notice, this list of conditions and the following disclaimer.
+# - Redistributions in binary form must reproduce the above copyright
+#   notice, this list of conditions and the following disclaimer in the
+#   documentation and/or other materials provided with the distribution.
+# - The name of the author may not be used to endorse or promote products
+#   derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+#include "asm.h"
+#include "regname.h"
+.text
+.global halt
+.global memcpy
+.global jump_to_kernel
+halt:
+    b halt
+memcpy:
+    srwi. r7, r5, 3
+    addi r6, r3, -4
+    addi r4, r4, -4
+    beq 2f
+    andi. r0, r6, 3
+    mtctr r7
+    bne 5f
+:
+    lwz r7, 4(r4)
+    lwzu r8, 8(r4)
+    stw r7, 4(r6)
+    stwu r8, 8(r6)
+    bdnz 1b
+    andi. r5, r5, 7
+:
+    cmplwi 0, r5, 4
+    blt 3f
+    lwzu r0, 4(r4)
+    addi r5, r5, -4
+    stwu r0, 4(r6)
+:
+    cmpwi 0, r5, 0
+    beqlr
+    mtctr r5
+    addi r4, r4, 3
+    addi r6, r6, 3
+:
+    lbzu r0, 1(r4)
+    stbu r0, 1(r6)
+    bdnz 4b
+    blr
+:
+    subfic r0, r0, 4
+    mtctr r0
+:
+    lbz r7, 4(r4)
+    addi r4, r4, 1
+    stb r7, 4(r6)
+    addi r6, r6, 1
+    bdnz 6b
+    subf r5, r0, r5
+    rlwinm. r7, r5, 32-3, 3, 31
+    beq 2b
+    mtctr r7
+    b 1b
+jump_to_kernel:
+    # r3 = bootinfo (pa)
+    # r4 = bootinfo_size
+    # r5 = trans (pa)
+    # r6 = bytes to copy
+    # r7 = real_mode (pa)
+    # disable interrupts
+    mfmsr r31
+    rlwinm r31, r31, 0, 17, 15
+    mtmsr r31
+    # set real_mode meeting point address
+    mtspr srr0, r7
+    # jumps to real_mode
+    mfmsr r31
+    lis r30, ~0@h
+    ori r30, r30, ~(msr_ir | msr_dr)@l
+    and r31, r31, r30
+    mtspr srr1, r31
+    sync
+    isync
+    rfid
+.section REALMODE, "ax"
+.align PAGE_WIDTH
+.global real_mode
+real_mode:
+    # copy kernel to proper location
+    #
+    # r5 = trans (pa)
+    # r6 = bytes to copy
+    li r31, PAGE_SIZE >> 2
+    li r30, 0
+    page_copy:
+        cmpwi r6, 0
+        beq copy_end
+        # copy page
+        mtctr r31
+        lwz r29, 0(r5)
+        copy_loop:
+            lwz r28, 0(r29)
+            stw r28, 0(r30)
+            addi r29, r29, 4
+            addi r30, r30, 4
+            subi r6, r6, 4
+            cmpwi r6, 0
+            beq copy_end
+            bdnz copy_loop
+        addi r5, r5, 4
+        b page_copy
+    copy_end:
+    # initially fill segment registers
+    li r31, 16
+    mtctr r31
+    li r31, 0
+    li r30, 0x2000
+    seg_fill:
+        mtsrin r30, r31
+        addi r30, r30, 0x111
+        addis r31, r31, 0x1000    # move to next SR
+        bdnz seg_fill
+    tlbia
+    tlbsync
+    # start the kernel
+    #
+    # r3 = bootinfo (pa)
+    lis r31, KERNEL_START_ADDR@ha
+    addi r31, r31, KERNEL_START_ADDR@l
+    mtspr srr0, r31
+    mfmsr r31
+    ori r31, r31, (msr_ir | msr_dr)@l
+    mtspr srr1, r31
+    sync
+    isync
+    rfid
+.align PAGE_WIDTH
+.global trans
+trans:
+    .space (TRANS_SIZE * TRANS_ITEM_SIZE)

 /tags/0.2.0.2/boot/arch/ppc64/loader/ofw.h
 ,0 → 1,71
+/*
+ * Copyright (C) 2005 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#ifndef __OFW_H__
+#define __OFW_H__
+#define NULL 0
+#define MEMMAP_MAX_RECORDS 32
+#define false 0
+#define true 1
+typedef __builtin_va_list va_list;
+#define va_start(ap, last)      __builtin_va_start(ap, last)
+#define va_arg(ap, type)        __builtin_va_arg(ap, type)
+#define va_end(ap)          __builtin_va_end(ap)
+typedef struct {
+    void *start;
+    unsigned long size;
+} memzone_t;
+typedef struct {
+    unsigned long total;
+    unsigned int count;
+    memzone_t zones[MEMMAP_MAX_RECORDS];
+} memmap_t;
+typedef struct {
+    void *addr;
+    unsigned int width;
+    unsigned int height;
+    unsigned int bpp;
+    unsigned int scanline;
+} screen_t;
+extern void init(void);
+extern void ofw_write(const char *str, const long len);
+extern void *ofw_translate(const void *virt);
+extern int ofw_map(const void *phys, const void *virt, const long size, const int mode);
+extern int ofw_memmap(memmap_t *map);
+extern int ofw_screen(screen_t *screen);
+#endif

 /tags/0.2.0.2/boot/arch/ppc64/loader/boot.S
 ,0 → 1,42
+#
+# Copyright (C) 2006 Martin Decky
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# - Redistributions of source code must retain the above copyright
+#   notice, this list of conditions and the following disclaimer.
+# - Redistributions in binary form must reproduce the above copyright
+#   notice, this list of conditions and the following disclaimer in the
+#   documentation and/or other materials provided with the distribution.
+# - The name of the author may not be used to endorse or promote products
+#   derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+#include "regname.h"
+.section BOOTSTRAP, "ax"
+.global start
+start:
+    lis r4, ofw@ha
+    addi r4, r4, ofw@l
+    stw r5, 0(r4)
+    bl init
+    b bootstrap

 /tags/0.2.0.2/boot/arch/ppc64/loader/regname.h
 ,0 → 1,204
+/*
+ * Copyright (C) 2005 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#ifndef __ppc32_REGNAME_H__
+#define __ppc32_REGNAME_H__
+/* Condition Register Bit Fields */
+#define cr0 0
+#define cr1 1
+#define cr2 2
+#define cr3 3
+#define cr4 4
+#define cr5 5
+#define cr6 6
+#define cr7 7
+/* General Purpose Registers (GPRs) */
+#define r0  0
+#define r1  1
+#define r2  2
+#define r3  3
+#define r4  4
+#define r5  5
+#define r6  6
+#define r7  7
+#define r8  8
+#define r9  9
+#define r10 10
+#define r11 11
+#define r12 12
+#define r13 13
+#define r14 14
+#define r15 15
+#define r16 16
+#define r17 17
+#define r18 18
+#define r19 19
+#define r20 20
+#define r21 21
+#define r22 22
+#define r23 23
+#define r24 24
+#define r25 25
+#define r26 26
+#define r27 27
+#define r28 28
+#define r29 29
+#define r30 30
+#define r31 31
+/* GPR Aliases */
+#define sp  1
+/* Floating Point Registers (FPRs) */
+#define fr0     0
+#define fr1     1
+#define fr2     2
+#define fr3     3
+#define fr4     4
+#define fr5     5
+#define fr6     6
+#define fr7     7
+#define fr8     8
+#define fr9     9
+#define fr10    10
+#define fr11    11
+#define fr12    12
+#define fr13    13
+#define fr14    14
+#define fr15    15
+#define fr16    16
+#define fr17    17
+#define fr18    18
+#define fr19    19
+#define fr20    20
+#define fr21    21
+#define fr22    22
+#define fr23    23
+#define fr24    24
+#define fr25    25
+#define fr26    26
+#define fr27    27
+#define fr28    28
+#define fr29    29
+#define fr30    30
+#define fr31    31
+#define vr0     0
+#define vr1     1
+#define vr2     2
+#define vr3     3
+#define vr4     4
+#define vr5     5
+#define vr6     6
+#define vr7     7
+#define vr8     8
+#define vr9     9
+#define vr10    10
+#define vr11    11
+#define vr12    12
+#define vr13    13
+#define vr14    14
+#define vr15    15
+#define vr16    16
+#define vr17    17
+#define vr18    18
+#define vr19    19
+#define vr20    20
+#define vr21    21
+#define vr22    22
+#define vr23    23
+#define vr24    24
+#define vr25    25
+#define vr26    26
+#define vr27    27
+#define vr28    28
+#define vr29    29
+#define vr30    30
+#define vr31    31
+#define evr0    0
+#define evr1    1
+#define evr2    2
+#define evr3    3
+#define evr4    4
+#define evr5    5
+#define evr6    6
+#define evr7    7
+#define evr8    8
+#define evr9    9
+#define evr10   10
+#define evr11   11
+#define evr12   12
+#define evr13   13
+#define evr14   14
+#define evr15   15
+#define evr16   16
+#define evr17   17
+#define evr18   18
+#define evr19   19
+#define evr20   20
+#define evr21   21
+#define evr22   22
+#define evr23   23
+#define evr24   24
+#define evr25   25
+#define evr26   26
+#define evr27   27
+#define evr28   28
+#define evr29   29
+#define evr30   30
+#define evr31   31
+/* Special Purpose Registers (SPRs) */
+#define xer     1
+#define lr      8
+#define ctr     9
+#define dec     22
+#define sdr1    25
+#define srr0    26
+#define srr1    27
+#define sprg0   272
+#define sprg1   273
+#define sprg2   274
+#define sprg3   275
+#define prv     287
+#define hid0    1008
+/* MSR bits */
+#define msr_ir  (1 << 4)
+#define msr_dr  (1 << 5)
+/* HID0 bits */
+#define hid0_ice    (1 << 15)
+#define hid0_dce    (1 << 14)
+#define hid0_icfi   (1 << 11)
+#define hid0_dci    (1 << 10)
+#endif

 /tags/0.2.0.2/boot/arch/ppc64/loader/main.c
 ,0 → 1,154
+/*
+ * Copyright (C) 2005 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#include "main.h"
+#include "printf.h"
+#include "asm.h"
+#include "_components.h"
+#define HEAP_GAP 1024000
+bootinfo_t bootinfo;
+static void check_align(const void *addr, const char *desc)
+{
+    if ((unsigned long) addr % PAGE_SIZE != 0) {
+        printf("Error: %s not on page boundary, halting.\n", desc);
+        halt();
+    }
+}
+static void fix_overlap(void *va, void **pa, const char *desc, unsigned long *top)
+{
+    if ((unsigned long) *pa + PAGE_SIZE < *top) {
+        printf("Warning: %s overlaps kernel physical area\n", desc);
+        void *new_va = (void *) (ALIGN_UP((unsigned long) KERNEL_END + HEAP_GAP, PAGE_SIZE) + *top);
+        void *new_pa = (void *) (HEAP_GAP + *top);
+        *top += PAGE_SIZE;
+        if (ofw_map(new_pa, new_va, PAGE_SIZE, 0) != 0) {
+            printf("Error: Unable to map page aligned memory at %L (physical %L), halting.\n", new_va, new_pa);
+            halt();
+        }
+        if ((unsigned long) new_pa + PAGE_SIZE < KERNEL_SIZE) {
+            printf("Error: %s cannot be relocated, halting.\n", desc);
+            halt();
+        }
+        printf("Relocating %L -> %L (physical %L -> %L)\n", va, new_va, *pa, new_pa);
+        *pa = new_pa;
+        memcpy(new_va, va, PAGE_SIZE);
+    }
+}
+void bootstrap(void)
+{
+    printf("\nHelenOS PPC Bootloader\n");
+    init_components();
+    unsigned int i;
+    for (i = 0; i < COMPONENTS; i++)
+        check_align(components[i].start, components[i].name);
+    check_align(&real_mode, "bootstrap trampoline");
+    check_align(&trans, "translation table");
+    if (!ofw_memmap(&bootinfo.memmap)) {
+        printf("Error: unable to get memory map, halting.\n");
+        halt();
+    }
+    if (bootinfo.memmap.total == 0) {
+        printf("Error: no memory detected, halting.\n");
+        halt();
+    }
+    if (!ofw_screen(&bootinfo.screen)) {
+        printf("Error: unable to get screen properties, halting.\n");
+        halt();
+    }
+    printf("\nDevice statistics\n");
+    printf(" screen at %L, resolution %dx%d, %d bpp (scanline %d bytes)\n", bootinfo.screen.addr, bootinfo.screen.width, bootinfo.screen.height, bootinfo.screen.bpp, bootinfo.screen.scanline);
+    void *real_mode_pa = ofw_translate(&real_mode);
+    void *trans_pa = ofw_translate(&trans);
+    void *bootinfo_pa = ofw_translate(&bootinfo);
+    printf("\nMemory statistics (total %d MB)\n", bootinfo.memmap.total >> 20);
+    printf(" %L: boot info structure (physical %L)\n", &bootinfo, bootinfo_pa);
+    printf(" %L: bootstrap trampoline (physical %L)\n", &real_mode, real_mode_pa);
+    printf(" %L: translation table (physical %L)\n", &trans, trans_pa);
+    for (i = 0; i < COMPONENTS; i++)
+        printf(" %L: %s image (size %d bytes)\n", components[i].start, components[i].name, components[i].size);
+    unsigned long top = 0;
+    for (i = 0; i < COMPONENTS; i++)
+        top += ALIGN_UP(components[i].size, PAGE_SIZE);
+    unsigned long pages = ALIGN_UP(KERNEL_SIZE, PAGE_SIZE) >> PAGE_WIDTH;
+    for (i = 0; i < pages; i++) {
+        void *pa = ofw_translate(KERNEL_START + (i << PAGE_WIDTH));
+        fix_overlap(KERNEL_START + (i << PAGE_WIDTH), &pa, "kernel", &top);
+        trans[i] = pa;
+    }
+    bootinfo.taskmap.count = 0;
+    for (i = 1; i < COMPONENTS; i++) {
+        unsigned long component_pages = ALIGN_UP(components[i].size, PAGE_SIZE) >> PAGE_WIDTH;
+        unsigned long j;
+        for (j = 0; j < component_pages; j++) {
+            void *pa = ofw_translate(components[i].start + (j << PAGE_WIDTH));
+            fix_overlap(components[i].start + (j << PAGE_WIDTH), &pa, components[i].name, &top);
+            trans[pages + j] = pa;
+            if (j == 0) {
+                bootinfo.taskmap.tasks[bootinfo.taskmap.count].addr = (void *) (pages << PAGE_WIDTH);
+                bootinfo.taskmap.tasks[bootinfo.taskmap.count].size = components[i].size;
+                bootinfo.taskmap.count++;
+            }
+        }
+        pages += component_pages;
+    }
+    fix_overlap(&real_mode, &real_mode_pa, "bootstrap trampoline", &top);
+    fix_overlap(&trans, &trans_pa, "translation table", &top);
+    fix_overlap(&bootinfo, &bootinfo_pa, "boot info", &top);
+    printf("\nBooting the kernel...\n");
+    jump_to_kernel(bootinfo_pa, sizeof(bootinfo), trans_pa, pages << PAGE_WIDTH, real_mode_pa);
+}

 /tags/0.2.0.2/boot/arch/ppc64/loader/asm.h
 ,0 → 1,52
+/*
+ * Copyright (C) 2006 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#ifndef __ASM_H__
+#define __ASM_H__
+#define PAGE_SIZE 4096
+#define PAGE_WIDTH 12
+#define TRANS_SIZE 1024
+#define TRANS_ITEM_SIZE 8
+#define KERNEL_START_ADDR 0x80004000
+#ifndef __ASM__
+#define memcpy(dst, src, cnt)  __builtin_memcpy((dst), (src), (cnt))
+extern void *trans[TRANS_SIZE];
+extern void halt();
+extern void jump_to_kernel(void *bootinfo, unsigned long bootinfo_size, void *trans, unsigned long kernel_size, void *real_mode) __attribute__((noreturn));
+extern void real_mode();
+#endif
+#endif

 /tags/0.2.0.2/boot/arch/ppc64/loader/main.h
 ,0 → 1,64
+/*
+ * Copyright (C) 2005 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#ifndef __MAIN_H__
+#define __MAIN_H__
+#include "ofw.h"
+/** Align to the nearest higher address.
+ *
+ * @param addr  Address or size to be aligned.
+ * @param align Size of alignment, must be power of 2.
+ */
+#define ALIGN_UP(addr, align) (((addr) + ((align) - 1)) & ~((align) - 1))
+#define TASKMAP_MAX_RECORDS 32
+typedef struct {
+    void *addr;
+    unsigned long size;
+} task_t;
+typedef struct {
+    unsigned int count;
+    task_t tasks[TASKMAP_MAX_RECORDS];
+} taskmap_t;
+typedef struct {
+    taskmap_t taskmap;
+    memmap_t memmap;
+    screen_t screen;
+} bootinfo_t;
+extern void start(void);
+extern void bootstrap(void);
+extern memmap_t memmap;
+#endif

 /tags/0.2.0.2/boot/arch/ppc64/loader/printf.c
 ,0 → 1,243
+/*
+ * Copyright (C) 2006 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#include "printf.h"
+#include "ofw.h"
+static char digits[] = "0123456789abcdef";  /**< Hexadecimal characters */
+void puts(const char *str)
+{
+    long len = 0;
+    while (str[len] != 0)
+        len++;
+    ofw_write(str, len);
+}
+/** Print hexadecimal digits
+ *
+ * Print fixed count of hexadecimal digits from
+ * the number num. The digits are printed in
+ * natural left-to-right order starting with
+ * the width-th digit.
+ *
+ * @param num   Number containing digits.
+ * @param width Count of digits to print.
+ *
+ */
+static void print_fixed_hex(const __u64 num, const int width)
+{
+    int i;
+    for (i = width * 8 - 4; i >= 0; i -= 4)
+        ofw_write(digits + ((num >> i) & 0xf), 1);
+}
+/** Print number in given base
+ *
+ * Print significant digits of a number in given
+ * base.
+ *
+ * @param num  Number to print.
+ * @param base Base to print the number in (should
+ *             be in range 2 .. 16).
+ *
+ */
+static void print_number(const __native num, const unsigned int base)
+{
+    int val = num;
+    char d[sizeof(__native) * 8 + 1];       /* this is good enough even for base == 2 */
+    int i = sizeof(__native) * 8 - 1;
+    do {
+        d[i--] = digits[val % base];
+    } while (val /= base);
+    d[sizeof(__native) * 8] = 0;
+    puts(&d[i + 1]);
+}
+/** General formatted text print
+ *
+ * Print text formatted according the fmt parameter
+ * and variant arguments. Each formatting directive
+ * begins with \% (percentage) character and one of the
+ * following character:
+ *
+ * \%    Prints the percentage character.
+ *
+ * s    The next variant argument is treated as char*
+ *      and printed as a NULL terminated string.
+ *
+ * c    The next variant argument is treated as a single char.
+ *
+ * p    The next variant argument is treated as a maximum
+ *      bit-width integer with respect to architecture
+ *      and printed in full hexadecimal width.
+ *
+ * P    As with 'p', but '0x' is prefixed.
+ *
+ * q    The next variant argument is treated as a 64b integer
+ *      and printed in full hexadecimal width.
+ *
+ * Q    As with 'q', but '0x' is prefixed.
+ *
+ * l    The next variant argument is treated as a 32b integer
+ *      and printed in full hexadecimal width.
+ *
+ * L    As with 'l', but '0x' is prefixed.
+ *
+ * w    The next variant argument is treated as a 16b integer
+ *      and printed in full hexadecimal width.
+ *
+ * W    As with 'w', but '0x' is prefixed.
+ *
+ * b    The next variant argument is treated as a 8b integer
+ *      and printed in full hexadecimal width.
+ *
+ * B    As with 'b', but '0x' is prefixed.
+ *
+ * d    The next variant argument is treated as integer
+ *      and printed in standard decimal format (only significant
+ *      digits).
+ *
+ * x    The next variant argument is treated as integer
+ *      and printed in standard hexadecimal format (only significant
+ *      digits).
+ *
+ * X    As with 'x', but '0x' is prefixed.
+ *
+ * All other characters from fmt except the formatting directives
+ * are printed in verbatim.
+ *
+ * @param fmt Formatting NULL terminated string.
+ */
+void printf(const char *fmt, ...)
+{
+    long i = 0;
+    va_list ap;
+    char c;
+    va_start(ap, fmt);
+    while ((c = fmt[i++])) {
+        switch (c) {
+            /* control character */
+            case '%':
+                switch (c = fmt[i++]) {
+                    /* percentile itself */
+                    case '%':
+                        break;
+                    /*
+                     * String and character conversions.
+                     */
+                    case 's':
+                        puts(va_arg(ap, char_ptr));
+                        goto loop;
+                    case 'c':
+                        c = (char) va_arg(ap, int);
+                        break;
+                    /*
+                     * Hexadecimal conversions with fixed width.
+                     */
+                    case 'P':
+                        puts("0x");
+                    case 'p':
+                        print_fixed_hex(va_arg(ap, __native), sizeof(__native));
+                        goto loop;
+                    case 'Q':
+                        puts("0x");
+                    case 'q':
+                        print_fixed_hex(va_arg(ap, __u64), INT64);
+                        goto loop;
+                    case 'L':
+                        puts("0x");
+                    case 'l':
+                        print_fixed_hex(va_arg(ap, __native), INT32);
+                        goto loop;
+                    case 'W':
+                        puts("0x");
+                    case 'w':
+                        print_fixed_hex(va_arg(ap, __native), INT16);
+                        goto loop;
+                    case 'B':
+                        puts("0x");
+                    case 'b':
+                        print_fixed_hex(va_arg(ap, __native), INT8);
+                        goto loop;
+                    /*
+                     * Decimal and hexadecimal conversions.
+                     */
+                    case 'd':
+                        print_number(va_arg(ap, __native), 10);
+                        goto loop;
+                    case 'X':
+                        puts("0x");
+                    case 'x':
+                        print_number(va_arg(ap, __native), 16);
+                        goto loop;
+                    /*
+                     * Bad formatting.
+                     */
+                    default:
+                        goto out;
+            }
+            default:
+                if (c == '\n')
+                    ofw_write("\r", 1);
+                ofw_write(&c, 1);
+        }
+loop:
+        ;
+    }
+out:
+    va_end(ap);
+}

 /tags/0.2.0.2/boot/arch/ppc64/loader/printf.h
 ,0 → 1,52
+/*
+ * Copyright (C) 2006 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#ifndef __PRINTF_H__
+#define __PRINTF_H__
+#define INT8    1
+#define INT16   2
+#define INT32   4
+#define INT64   8
+typedef signed char __s8;
+typedef unsigned char __u8;
+typedef unsigned short __u16;
+typedef unsigned int __u32;
+typedef unsigned long __u64;
+typedef __u64 __address;
+typedef __u64 __native;
+typedef char *char_ptr;
+void puts(const char *str);
+void printf(const char *fmt, ...);
+#endif

 /tags/0.2.0.2/boot/arch/ppc64/Makefile.inc
 ,0 → 1,39
+#
+# Copyright (C) 2006 Martin Decky
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# - Redistributions of source code must retain the above copyright
+#   notice, this list of conditions and the following disclaimer.
+# - Redistributions in binary form must reproduce the above copyright
+#   notice, this list of conditions and the following disclaimer in the
+#   documentation and/or other materials provided with the distribution.
+# - The name of the author may not be used to endorse or promote products
+#   derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+build: image.boot
+image.boot: kernel uspace
+    make -C arch/$(ARCH)/loader COMPILER=$(COMPILER) KERNELDIR=../../../$(KERNELDIR) USPACEDIR=../../../$(USPACEDIR)
+    cp arch/$(ARCH)/loader/image.boot image.boot
+clean: clean_kernel clean_uspace
+    make -C arch/$(ARCH)/loader clean KERNELDIR=../../../$(KERNELDIR) USPACEDIR=../../../$(USPACEDIR)
+    -rm -f image.boot
+arch_distclean: distclean_kernel distclean_uspace

 /tags/0.2.0.2/boot/arch/ia64/Makefile.inc
 ,0 → 1,43
+#
+# Copyright (C) 2006 Martin Decky
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# - Redistributions of source code must retain the above copyright
+#   notice, this list of conditions and the following disclaimer.
+# - Redistributions in binary form must reproduce the above copyright
+#   notice, this list of conditions and the following disclaimer in the
+#   documentation and/or other materials provided with the distribution.
+# - The name of the author may not be used to endorse or promote products
+#   derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+VMAXLMA_SRC=$(KERNELDIR)/contrib/arch/ia64/vmaxlma.c
+build: kernel.bin
+kernel.bin: kernel uspace vmaxlma
+    cp $(KERNELDIR)/kernel.bin .
+    ./vmaxlma kernel.bin
+vmaxlma: $(VMAXLMA_SRC)
+    gcc $(VMAXLMA_SRC) -o $@
+clean: clean_kernel clean_uspace
+    -rm -f kernel.bin vmaxlma
+arch_distclean: distclean_kernel distclean_uspace

 /tags/0.2.0.2/boot/arch/sparc64/Makefile.inc
 ,0 → 1,45
+#
+# Copyright (C) 2006 Martin Decky
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# - Redistributions of source code must retain the above copyright
+#   notice, this list of conditions and the following disclaimer.
+# - Redistributions in binary form must reproduce the above copyright
+#   notice, this list of conditions and the following disclaimer in the
+#   documentation and/or other materials provided with the distribution.
+# - The name of the author may not be used to endorse or promote products
+#   derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+TMP=distroot
+build: image.iso
+image.iso: kernel
+    mkdir -p $(TMP)/boot
+    mkdir -p $(TMP)/kernel
+    cat arch/$(ARCH)/silo/silo.tar.gz | (cd $(TMP)/boot; tar xvfz -)
+    cp arch/$(ARCH)/silo/README arch/$(ARCH)/silo/COPYING arch/$(ARCH)/silo/silo.conf $(TMP)/boot
+    ln -sf ../../$(KERNELDIR)/kernel.bin $(TMP)/kernel/kernel.bin
+    mkisofs -f -G $(TMP)/boot/isofs.b -B ... -r -o image.iso $(TMP)/
+clean: clean_kernel
+    -rm -fr $(TMP)
+    -rm -f image.iso
+arch_distclean: distclean_kernel

/tags/0.2.0.2/boot/arch/sparc64/silo/README
0,0 → 1,5
For licensing terms of SILO boot loader see the file COPYING contained
in this directory. Full version of SILO, including its source code,
can be downloaded from SILO's project page:

http://www.sparc-boot.org/

/tags/0.2.0.2/boot/arch/sparc64/silo/silo.tar.gz
Cannot display: file marked as a binary type.
svn:mime-type = application/octet-stream
Property changes:
Added: svn:mime-type
+application/octet-stream
\ No newline at end of property

 /tags/0.2.0.2/boot/arch/sparc64/silo/COPYING
 ,0 → 1,340
+            GNU GENERAL PUBLIC LICENSE
+               Version 2, June 1991
+ Copyright (C) 1989, 1991 Free Software Foundation, Inc.
+Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ Everyone is permitted to copy and distribute verbatim copies
+ of this license document, but changing it is not allowed.
+                Preamble
+  The licenses for most software are designed to take away your
+freedom to share and change it.  By contrast, the GNU General Public
+License is intended to guarantee your freedom to share and change free
+software--to make sure the software is free for all its users.  This
+General Public License applies to most of the Free Software
+Foundation's software and to any other program whose authors commit to
+using it.  (Some other Free Software Foundation software is covered by
+the GNU Library General Public License instead.)  You can apply it to
+your programs, too.
+  When we speak of free software, we are referring to freedom, not
+price.  Our General Public Licenses are designed to make sure that you
+have the freedom to distribute copies of free software (and charge for
+this service if you wish), that you receive source code or can get it
+if you want it, that you can change the software or use pieces of it
+in new free programs; and that you know you can do these things.
+  To protect your rights, we need to make restrictions that forbid
+anyone to deny you these rights or to ask you to surrender the rights.
+These restrictions translate to certain responsibilities for you if you
+distribute copies of the software, or if you modify it.
+  For example, if you distribute copies of such a program, whether
+gratis or for a fee, you must give the recipients all the rights that
+you have.  You must make sure that they, too, receive or can get the
+source code.  And you must show them these terms so they know their
+rights.
+  We protect your rights with two steps: (1) copyright the software, and
+(2) offer you this license which gives you legal permission to copy,
+distribute and/or modify the software.
+  Also, for each author's protection and ours, we want to make certain
+that everyone understands that there is no warranty for this free
+software.  If the software is modified by someone else and passed on, we
+want its recipients to know that what they have is not the original, so
+that any problems introduced by others will not reflect on the original
+authors' reputations.
+  Finally, any free program is threatened constantly by software
+patents.  We wish to avoid the danger that redistributors of a free
+program will individually obtain patent licenses, in effect making the
+program proprietary.  To prevent this, we have made it clear that any
+patent must be licensed for everyone's free use or not licensed at all.
+  The precise terms and conditions for copying, distribution and
+modification follow.
+            GNU GENERAL PUBLIC LICENSE
+   TERMS AND CONDITIONS FOR COPYING, DISTRIBUTION AND MODIFICATION
+. This License applies to any program or other work which contains
+a notice placed by the copyright holder saying it may be distributed
+under the terms of this General Public License.  The "Program", below,
+refers to any such program or work, and a "work based on the Program"
+means either the Program or any derivative work under copyright law:
+that is to say, a work containing the Program or a portion of it,
+either verbatim or with modifications and/or translated into another
+language.  (Hereinafter, translation is included without limitation in
+the term "modification".)  Each licensee is addressed as "you".
+Activities other than copying, distribution and modification are not
+covered by this License; they are outside its scope.  The act of
+running the Program is not restricted, and the output from the Program
+is covered only if its contents constitute a work based on the
+Program (independent of having been made by running the Program).
+Whether that is true depends on what the Program does.
+. You may copy and distribute verbatim copies of the Program's
+source code as you receive it, in any medium, provided that you
+conspicuously and appropriately publish on each copy an appropriate
+copyright notice and disclaimer of warranty; keep intact all the
+notices that refer to this License and to the absence of any warranty;
+and give any other recipients of the Program a copy of this License
+along with the Program.
+You may charge a fee for the physical act of transferring a copy, and
+you may at your option offer warranty protection in exchange for a fee.
+. You may modify your copy or copies of the Program or any portion
+of it, thus forming a work based on the Program, and copy and
+distribute such modifications or work under the terms of Section 1
+above, provided that you also meet all of these conditions:
+    a) You must cause the modified files to carry prominent notices
+    stating that you changed the files and the date of any change.
+    b) You must cause any work that you distribute or publish, that in
+    whole or in part contains or is derived from the Program or any
+    part thereof, to be licensed as a whole at no charge to all third
+    parties under the terms of this License.
+    c) If the modified program normally reads commands interactively
+    when run, you must cause it, when started running for such
+    interactive use in the most ordinary way, to print or display an
+    announcement including an appropriate copyright notice and a
+    notice that there is no warranty (or else, saying that you provide
+    a warranty) and that users may redistribute the program under
+    these conditions, and telling the user how to view a copy of this
+    License.  (Exception: if the Program itself is interactive but
+    does not normally print such an announcement, your work based on
+    the Program is not required to print an announcement.)
+These requirements apply to the modified work as a whole.  If
+identifiable sections of that work are not derived from the Program,
+and can be reasonably considered independent and separate works in
+themselves, then this License, and its terms, do not apply to those
+sections when you distribute them as separate works.  But when you
+distribute the same sections as part of a whole which is a work based
+on the Program, the distribution of the whole must be on the terms of
+this License, whose permissions for other licensees extend to the
+entire whole, and thus to each and every part regardless of who wrote it.
+Thus, it is not the intent of this section to claim rights or contest
+your rights to work written entirely by you; rather, the intent is to
+exercise the right to control the distribution of derivative or
+collective works based on the Program.
+In addition, mere aggregation of another work not based on the Program
+with the Program (or with a work based on the Program) on a volume of
+a storage or distribution medium does not bring the other work under
+the scope of this License.
+. You may copy and distribute the Program (or a work based on it,
+under Section 2) in object code or executable form under the terms of
+Sections 1 and 2 above provided that you also do one of the following:
+    a) Accompany it with the complete corresponding machine-readable
+    source code, which must be distributed under the terms of Sections
+and 2 above on a medium customarily used for software interchange; or,
+    b) Accompany it with a written offer, valid for at least three
+    years, to give any third party, for a charge no more than your
+    cost of physically performing source distribution, a complete
+    machine-readable copy of the corresponding source code, to be
+    distributed under the terms of Sections 1 and 2 above on a medium
+    customarily used for software interchange; or,
+    c) Accompany it with the information you received as to the offer
+    to distribute corresponding source code.  (This alternative is
+    allowed only for noncommercial distribution and only if you
+    received the program in object code or executable form with such
+    an offer, in accord with Subsection b above.)
+The source code for a work means the preferred form of the work for
+making modifications to it.  For an executable work, complete source
+code means all the source code for all modules it contains, plus any
+associated interface definition files, plus the scripts used to
+control compilation and installation of the executable.  However, as a
+special exception, the source code distributed need not include
+anything that is normally distributed (in either source or binary
+form) with the major components (compiler, kernel, and so on) of the
+operating system on which the executable runs, unless that component
+itself accompanies the executable.
+If distribution of executable or object code is made by offering
+access to copy from a designated place, then offering equivalent
+access to copy the source code from the same place counts as
+distribution of the source code, even though third parties are not
+compelled to copy the source along with the object code.
+. You may not copy, modify, sublicense, or distribute the Program
+except as expressly provided under this License.  Any attempt
+otherwise to copy, modify, sublicense or distribute the Program is
+void, and will automatically terminate your rights under this License.
+However, parties who have received copies, or rights, from you under
+this License will not have their licenses terminated so long as such
+parties remain in full compliance.
+. You are not required to accept this License, since you have not
+signed it.  However, nothing else grants you permission to modify or
+distribute the Program or its derivative works.  These actions are
+prohibited by law if you do not accept this License.  Therefore, by
+modifying or distributing the Program (or any work based on the
+Program), you indicate your acceptance of this License to do so, and
+all its terms and conditions for copying, distributing or modifying
+the Program or works based on it.
+. Each time you redistribute the Program (or any work based on the
+Program), the recipient automatically receives a license from the
+original licensor to copy, distribute or modify the Program subject to
+these terms and conditions.  You may not impose any further
+restrictions on the recipients' exercise of the rights granted herein.
+You are not responsible for enforcing compliance by third parties to
+this License.
+. If, as a consequence of a court judgment or allegation of patent
+infringement or for any other reason (not limited to patent issues),
+conditions are imposed on you (whether by court order, agreement or
+otherwise) that contradict the conditions of this License, they do not
+excuse you from the conditions of this License.  If you cannot
+distribute so as to satisfy simultaneously your obligations under this
+License and any other pertinent obligations, then as a consequence you
+may not distribute the Program at all.  For example, if a patent
+license would not permit royalty-free redistribution of the Program by
+all those who receive copies directly or indirectly through you, then
+the only way you could satisfy both it and this License would be to
+refrain entirely from distribution of the Program.
+If any portion of this section is held invalid or unenforceable under
+any particular circumstance, the balance of the section is intended to
+apply and the section as a whole is intended to apply in other
+circumstances.
+It is not the purpose of this section to induce you to infringe any
+patents or other property right claims or to contest validity of any
+such claims; this section has the sole purpose of protecting the
+integrity of the free software distribution system, which is
+implemented by public license practices.  Many people have made
+generous contributions to the wide range of software distributed
+through that system in reliance on consistent application of that
+system; it is up to the author/donor to decide if he or she is willing
+to distribute software through any other system and a licensee cannot
+impose that choice.
+This section is intended to make thoroughly clear what is believed to
+be a consequence of the rest of this License.
+. If the distribution and/or use of the Program is restricted in
+certain countries either by patents or by copyrighted interfaces, the
+original copyright holder who places the Program under this License
+may add an explicit geographical distribution limitation excluding
+those countries, so that distribution is permitted only in or among
+countries not thus excluded.  In such case, this License incorporates
+the limitation as if written in the body of this License.
+. The Free Software Foundation may publish revised and/or new versions
+of the General Public License from time to time.  Such new versions will
+be similar in spirit to the present version, but may differ in detail to
+address new problems or concerns.
+Each version is given a distinguishing version number.  If the Program
+specifies a version number of this License which applies to it and "any
+later version", you have the option of following the terms and conditions
+either of that version or of any later version published by the Free
+Software Foundation.  If the Program does not specify a version number of
+this License, you may choose any version ever published by the Free Software
+Foundation.
+. If you wish to incorporate parts of the Program into other free
+programs whose distribution conditions are different, write to the author
+to ask for permission.  For software which is copyrighted by the Free
+Software Foundation, write to the Free Software Foundation; we sometimes
+make exceptions for this.  Our decision will be guided by the two goals
+of preserving the free status of all derivatives of our free software and
+of promoting the sharing and reuse of software generally.
+                NO WARRANTY
+. BECAUSE THE PROGRAM IS LICENSED FREE OF CHARGE, THERE IS NO WARRANTY
+FOR THE PROGRAM, TO THE EXTENT PERMITTED BY APPLICABLE LAW.  EXCEPT WHEN
+OTHERWISE STATED IN WRITING THE COPYRIGHT HOLDERS AND/OR OTHER PARTIES
+PROVIDE THE PROGRAM "AS IS" WITHOUT WARRANTY OF ANY KIND, EITHER EXPRESSED
+OR IMPLIED, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.  THE ENTIRE RISK AS
+TO THE QUALITY AND PERFORMANCE OF THE PROGRAM IS WITH YOU.  SHOULD THE
+PROGRAM PROVE DEFECTIVE, YOU ASSUME THE COST OF ALL NECESSARY SERVICING,
+REPAIR OR CORRECTION.
+. IN NO EVENT UNLESS REQUIRED BY APPLICABLE LAW OR AGREED TO IN WRITING
+WILL ANY COPYRIGHT HOLDER, OR ANY OTHER PARTY WHO MAY MODIFY AND/OR
+REDISTRIBUTE THE PROGRAM AS PERMITTED ABOVE, BE LIABLE TO YOU FOR DAMAGES,
+INCLUDING ANY GENERAL, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES ARISING
+OUT OF THE USE OR INABILITY TO USE THE PROGRAM (INCLUDING BUT NOT LIMITED
+TO LOSS OF DATA OR DATA BEING RENDERED INACCURATE OR LOSSES SUSTAINED BY
+YOU OR THIRD PARTIES OR A FAILURE OF THE PROGRAM TO OPERATE WITH ANY OTHER
+PROGRAMS), EVEN IF SUCH HOLDER OR OTHER PARTY HAS BEEN ADVISED OF THE
+POSSIBILITY OF SUCH DAMAGES.
+             END OF TERMS AND CONDITIONS
+        How to Apply These Terms to Your New Programs
+  If you develop a new program, and you want it to be of the greatest
+possible use to the public, the best way to achieve this is to make it
+free software which everyone can redistribute and change under these terms.
+  To do so, attach the following notices to the program.  It is safest
+to attach them to the start of each source file to most effectively
+convey the exclusion of warranty; and each file should have at least
+the "copyright" line and a pointer to where the full notice is found.
+    <one line to give the program's name and a brief idea of what it does.>
+    Copyright (C) <year>  <name of author>
+    This program is free software; you can redistribute it and/or modify
+    it under the terms of the GNU General Public License as published by
+    the Free Software Foundation; either version 2 of the License, or
+    (at your option) any later version.
+    This program is distributed in the hope that it will be useful,
+    but WITHOUT ANY WARRANTY; without even the implied warranty of
+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+    GNU General Public License for more details.
+    You should have received a copy of the GNU General Public License
+    along with this program; if not, write to the Free Software
+    Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+Also add information on how to contact you by electronic and paper mail.
+If the program is interactive, make it output a short notice like this
+when it starts in an interactive mode:
+    Gnomovision version 69, Copyright (C) year  name of author
+    Gnomovision comes with ABSOLUTELY NO WARRANTY; for details type `show w'.
+    This is free software, and you are welcome to redistribute it
+    under certain conditions; type `show c' for details.
+The hypothetical commands `show w' and `show c' should show the appropriate
+parts of the General Public License.  Of course, the commands you use may
+be called something other than `show w' and `show c'; they could even be
+mouse-clicks or menu items--whatever suits your program.
+You should also get your employer (if you work as a programmer) or your
+school, if any, to sign a "copyright disclaimer" for the program, if
+necessary.  Here is a sample; alter the names:
+  Yoyodyne, Inc., hereby disclaims all copyright interest in the program
+  `Gnomovision' (which makes passes at compilers) written by James Hacker.
+  <signature of Ty Coon>, 1 April 1989
+  Ty Coon, President of Vice
+This General Public License does not permit incorporating your program into
+proprietary programs.  If your program is a subroutine library, you may
+consider it more useful to permit linking proprietary applications with the
+library.  If this is what you want to do, use the GNU Library General
+Public License instead of this License.

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