| 48,7 → 48,7 |
|---|
| asm volatile ( |
| "eor r1, r1\n" |
| "mcr p15, 0, r1, c8, c7, 0\n" |
| : : : "r1" |
| ::: "r1" |
| ); |
| } |
| |
| 68,9 → 68,8 |
|---|
| static inline void invalidate_page(uintptr_t page) |
| { |
| asm volatile ( |
| "mcr p15, 0, %0, c8, c7, 1" |
| : |
| : "r" (page) |
| "mcr p15, 0, %[page], c8, c7, 1\n" |
| :: [page] "r" (page) |
| ); |
| } |
| |
| 81,7 → 80,7 |
|---|
| * @param page Address of the first page whose entry is to be invalidated. |
| * @param cnt Number of entries to invalidate. |
| */ |
| void tlb_invalidate_pages(asid_t asid, uintptr_t page, count_t cnt) |
| void tlb_invalidate_pages(asid_t asid __attribute__((unused)), uintptr_t page, count_t cnt) |
| { |
| unsigned int i; |
| |
| 89,5 → 88,13 |
|---|
| invalidate_page(page + i * PAGE_SIZE); |
| } |
| |
| void tlb_arch_init(void) |
| { |
| } |
| |
| void tlb_print(void) |
| { |
| } |
| |
| /** @} |
| */ |