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/branches/sparc/kernel/doc/AUTHORS
0,0 → 1,12
Jakub Jermar
Martin Decky
Ondrej Palkovsky
Jiri Svoboda
Jakub Vana
Josef Cejka
Michal Kebrt
Sergey Bondari
Pavel Jancik
Petr Stepan
Michal Konopa
Vojtech Mencl
/branches/sparc/kernel/doc/arch/mips32
0,0 → 1,22
mips32 port
===========
 
mips32 is the second port of SPARTAN kernel originally written by Jakub Jermar.
It was first developed to run on MIPS R4000 32-bit simulator.
It can be compiled and run either as little- or big-endian.
 
HARDWARE REQUIREMENTS
o emulated MIPS 4K CPU
 
CPU
o QED R4600
 
EMULATORS AND VIRTUALIZERS
o msim 1.2.12
o gxemul - both big and little endian
o simics 2.2.19
 
TOOLCHAIN REQUIREMENTS
o binutils 2.16, 2.16.1
o gcc 4.0.1, 4.1.0, 4.1.1
o older versions may do as well, but are now obsoleted
/branches/sparc/kernel/doc/arch/arm32
0,0 → 1,16
arm32 port
==========
 
arm32 port is the ninth port of SPARTAN, originally written by Michal Kebrt,
Petr Stepan, Pavel Jancik. The goal is to support 32-bit ARM architecture.
So far, it runs only in emulator.
 
HARDWARE REQUIREMENTS
o no real hardware supported
 
EMULATORS AND VIRTUALIZERS
o GXemul
 
TOOLCHAIN REQUIREMENTS
o binutils 2.17
o gcc 4.1.1
/branches/sparc/kernel/doc/arch/sparc64
0,0 → 1,25
sparc64 port
============
 
Currently, this porting effort is subject to
Jakub Jermar's work on his master thesis.
 
The goal is to provide support for UltraSPARC
implementation of SPARC V9 architecture.
 
MACHINES
o Sun Ultra 5
o Sun Ultra 60
o Sun Enterprise E6500 (simulated)
CPU
o UltraSPARC II
o UltraSPARC IIi
 
SIMULATORS
o simics 2.2.19, simics 3.0.17, simics 3.0.21
TOOLCHAIN REQUIREMENTS
o binutils 2.17
o gcc 4.1.1
o older versions may do as well, but are now obsoleted
/branches/sparc/kernel/doc/arch/amd64
0,0 → 1,35
amd64 port
==========
 
The fifth port, amd64 port, was originally written by Ondrej Palkovsky.
The goal is to support AMD64 and Intel Extended Memory 64 Technology PC's.
The port makes use of portable parts of ia32.
Both uniprocessors and multiprocessors are supported.
The kernel runs on real hardware and in simulators too.
 
HARDWARE REQUIREMENTS
o AMD64 architecture processor
o Intel Extended Memory 64 Technology processor
 
CPU
o Intel Xeon with Intel Extended Memory 64 Technology
o AMD Athlon 64
 
SMP COMPATIBILITY
o Bochs 2.2.1 - 2.2.6
o 2x-8x AMD64 CPU
o Simics 2.2.19
o 2x-15x AMD hammer CPU
o QEMU 0.8.0 - QEMU 0.8.1
o 2x-15x CPU
o HP ProLiant ML350 (HyperThreading)
 
EMULATORS AND VIRTUALIZERS
o Bochs 2.2.6
o Simics 2.2.19
o QEMU 0.8.1
 
TOOLCHAIN REQUIREMENTS
o binutils 2.16, 2.16.1
o gcc 4.0.1, 4.1.0, 4.1.1
o older versions may do as well, but are now obsoleted
/branches/sparc/kernel/doc/arch/ia64
0,0 → 1,16
ia64 port
=========
 
ia64 port is the third port of SPARTAN originally written by Jakub Jermar.
It is still in its early stages. It runs on HP Ski simulator of IA-64 architecture.
 
HARDWARE REQUIREMENTS
o no real hardware supported
 
EMULATORS AND VIRTUALIZERS
o ski
 
TOOLCHAIN REQUIREMENTS
o binutils 2.15, 2.16, 2.16.1
o gcc 4.0.0, 4.0.1, 4.1.0, 4.1.1
o older versions may do as well, but are now obsoleted
/branches/sparc/kernel/doc/arch/ppc32
0,0 → 1,16
ppc32 port
==========
 
ppc32 port is the fourth port of SPARTAN, originally written by Martin Decky.
The goal is to support 32-bit PowerPC architecture.
So far, it runs only in emulator.
 
HARDWARE REQUIREMENTS
o no real hardware supported
 
EMULATORS AND VIRTUALIZERS
o PearPC
 
TOOLCHAIN REQUIREMENTS
o binutils 2.16
o gcc 4.0.1, 4.1.0, 4.1.1
/branches/sparc/kernel/doc/arch/ia32
0,0 → 1,40
ia32 port
=========
 
ia32 port is the oldest and the most advanced one.
It was originally written by Jakub Jermar.
It is meant to support ordinary PC's based on IA-32 architecture.
Both uniprocessor and multiprocessor modes are supported.
It runs both in emulated environment and on real hardware.
 
HARDWARE REQUIREMENTS
o IA-32 processor (Pentium and successors)
 
SMP COMPATIBILITY
o Bochs 2.0.2 - Bochs 2.2.6
o 2x-8x 686 CPU
o Simics 2.0.28 - Simics 2.2.19
o 2x-15x Pentium 4 CPU
o VMware Workstation 5.5
o 2x CPU
o QEMU 0.8.0 - QEMU 0.8.1
o 2x-15x CPU
o ASUS P/I-P65UP5 + ASUS C-P55T2D REV. 1.41
o 2x 200Mhz Pentium CPU
o ASUS PCH-DL
o 2x 3000Mhz Pentium 4 Xeon (HT) CPU
o MSI K7D Master-L
o 2x 2100MHz Athlon MP CPU
o ECS 865PE-A REV : 2.0
o 1x 2800MHz Pentium 4 Prescott (HT) CPU
 
EMULATORS AND VIRTUALIZERS
o Bochs 2.0.2 - Bochs 2.2.6
o VMware Workstation 4, VMware Workstation 5, VMware Workstation 5.5
o Simics 2.2.19
o QEMU 0.8.0 - QEMU 0.8.1
 
TOOLCHAIN REQUIREMENTS
o binutils 2.15, 2.16, 2.16.1
o gcc 3.3.5, 4.0.1, 4.1.0, 4.1.1
o older versions may do as well, but are now obsoleted
/branches/sparc/kernel/doc/doxygroups.h
0,0 → 1,433
 
/* Definitions of modules and its relations for generating Doxygen documentation */
 
/** @defgroup genericadt Data types
* @ingroup kernel
*/
 
/** @defgroup main Kernel initialization
* @ingroup others
*/
 
/** @defgroup genericconsole Kernel console
* @ingroup others
*/
 
/**
* @defgroup time Time management
* @ingroup kernel
*/
 
/**
* @defgroup proc Scheduling
* @ingroup kernel
*/
/** @defgroup genericproc generic
* @ingroup proc
*/
 
/**
* @cond amd64
* @defgroup amd64proc amd64
* @ingroup proc
* @endcond
*/
 
/**
* @cond arm32
* @defgroup arm32proc arm32
* @ingroup proc
* @endcond
*/
 
/**
* @cond ia32
* @defgroup ia32proc ia32
* @ingroup proc
* @endcond
*/
 
/**
* @cond ia64
* @defgroup ia64proc ia64
* @ingroup proc
* @endcond
*/
 
/**
* @cond mips32
* @defgroup mips32proc mips32
* @ingroup proc
* @endcond
*/
 
/**
* @cond ppc32
* @defgroup ppc32proc ppc32
* @ingroup proc
* @endcond
*/
 
/**
* @cond ppc64
* @defgroup ppc64proc ppc64
* @ingroup proc
* @endcond
*/
 
/**
* @cond sparc64
* @defgroup sparc64proc sparc64
* @ingroup proc
* @endcond
*/
 
 
/** @defgroup sync Synchronization
* @ingroup kernel
*/
 
 
/** @defgroup mm Memory management
* @ingroup kernel
*/
/**
* @defgroup genericmm generic
* @ingroup mm
*/
/**
* @defgroup genarchmm genarch
* @ingroup mm
*/
/**
* @cond amd64
* @defgroup amd64mm amd64
* @ingroup mm
* @endcond
*/
/**
* @cond arm32
* @defgroup arm32mm arm32
* @ingroup mm
* @endcond
*/
/**
* @cond ia32
* @defgroup ia32mm ia32
* @ingroup mm
* @endcond
*/
/**
* @cond ia64
* @defgroup ia64mm ia64
* @ingroup mm
* @endcond
*/
/**
* @cond mips32
* @defgroup mips32mm mips32
* @ingroup mm
* @endcond
*/
/**
* @cond ppc32
* @defgroup ppc32mm ppc32
* @ingroup mm
* @endcond
*/
/**
* @cond ppc64
* @defgroup ppc64mm ppc64
* @ingroup mm
* @endcond
*/
/**
* @cond sparc64
* @defgroup sparc64mm sparc64
* @ingroup mm
* @endcond
*/
 
/** @defgroup genericipc IPC
* @ingroup kernel
*/
/** @defgroup genericklog KLog
* @brief Kernel logging facility
* @ingroup genericconsole
*/
 
 
/** @defgroup ddi Device Driver Interface
* @ingroup kernel
*/
 
/** @defgroup genericddi generic
* @ingroup ddi
*/
 
/**
* @cond amd64
* @defgroup amd64ddi amd64
* @ingroup ddi
* @endcond
*/
/**
* @cond arm32
* @defgroup arm32ddi arm32
* @ingroup ddi
* @endcond
*/
 
/**
* @cond ia32
* @defgroup ia32ddi ia32
* @ingroup ddi
* @endcond
*/
 
/**
* @cond ia64
* @defgroup ia64ddi ia64
* @ingroup ddi
* @endcond
*/
 
/**
* @cond mips32
* @defgroup mips32ddi mips32
* @ingroup ddi
* @endcond
*/
 
/**
* @cond ppc32
* @defgroup ppc32ddi ppc32
* @ingroup ddi
* @endcond
*/
 
/**
* @cond ppc64
* @defgroup ppc64ddi ppc64
* @ingroup ddi
* @endcond
*/
 
/**
* @cond sparc64
* @defgroup sparc64ddi sparc64
* @ingroup ddi
* @endcond
*/
 
/** @defgroup debug Debugging
* @ingroup others
*/
/** @defgroup genericdebug generic
* @ingroup debug
*/
/**
* @cond amd64
* @defgroup amd64debug ia32/amd64
* @ingroup debug
* @endcond
*/
/**
* @cond arm32
* @defgroup arm32debug arm32
* @ingroup debug
* @endcond
*/
 
/**
* @cond ia32
* @defgroup amd64debug ia32/amd64
* @ingroup debug
* @endcond
*/
 
/**
* @cond ia64
* @defgroup ia64debug ia64
* @ingroup debug
* @endcond
*/
 
/**
* @cond mips32
* @defgroup mips32debug mips32
* @ingroup debug
* @endcond
*/
 
/**
* @cond ppc32
* @defgroup ppc32debug ppc32
* @ingroup debug
* @endcond
*/
 
/**
* @cond ppc64
* @defgroup ppc64debug ppc64
* @ingroup debug
* @endcond
*/
 
/**
* @cond sparc64
* @defgroup sparc64debug sparc64
* @ingroup debug
* @endcond
*/
 
/** @defgroup interrupt Interrupt handling and dispatching
* @ingroup kernel
*/
/**
* @defgroup genericinterrupt generic
* @ingroup interrupt
*/
 
/**
* @cond amd64
* @defgroup amd64interrupt amd64
* @ingroup interrupt
* @endcond
*/
/**
* @cond arm32
* @defgroup arm32interrupt arm32
* @ingroup interrupt
* @endcond
*/
 
/**
* @cond ia32
* @defgroup ia32interrupt ia32
* @ingroup interrupt
* @endcond
*/
 
/**
* @cond ia64
* @defgroup ia64interrupt ia64
* @ingroup interrupt
* @endcond
*/
 
/**
* @cond mips32
* @defgroup mips32interrupt mips32
* @ingroup interrupt
* @endcond
*/
 
/**
* @cond ppc32
* @defgroup ppc32interrupt ppc32
* @ingroup interrupt
* @endcond
*/
 
/**
* @cond ppc64
* @defgroup ppc64interrupt ppc64
* @ingroup interrupt
* @endcond
*/
 
/**
* @cond sparc64
* @defgroup sparc64interrupt sparc64
* @ingroup interrupt
* @endcond
*/
 
 
/** @defgroup others Miscellanea
* @ingroup kernel
*/
/** @defgroup generic generic
* @ingroup others
*/
 
/** @defgroup genarch genarch
* @ingroup others
*/
/**
* @cond amd64
* @defgroup amd64 amd64
* @ingroup others
* @endcond
*/
/**
* @cond arm32
* @defgroup arm32 arm32
* @ingroup others
* @endcond
*/
 
/**
* @cond ia32
* @defgroup ia32 ia32
* @ingroup others
* @endcond
*/
 
/**
* @cond ia64
* @defgroup ia64 ia64
* @ingroup others
* @endcond
*/
 
/**
* @cond mips32
* @defgroup mips32 mips32
* @ingroup others
* @endcond
*/
 
/**
* @cond ppc32
* @defgroup ppc32 ppc32
* @ingroup others
* @endcond
*/
 
/**
* @cond ppc64
* @defgroup ppc64 ppc64
* @ingroup others
* @endcond
*/
 
/**
* @cond sparc64
* @defgroup sparc64 sparc64
* @ingroup others
* @endcond
*/
/branches/sparc/kernel/doc/mm
0,0 → 1,87
Memory management
=================
 
1. Virtual Address Translation
 
1.1 Hierarchical 4-level per address space page tables
 
SPARTAN kernel deploys generic interface for 4-level page tables
for these architectures: amd64, ia32, mips32 and ppc32. In this
setting, page tables are hierarchical and are not shared by
address spaces (i.e. one set of page tables per address space).
 
 
VADDR
+-----------------------------------------------------------------------------+
| PTL0_INDEX | PTL1_INDEX | PTL2_INDEX | PTL3_INDEX | OFFSET |
+-----------------------------------------------------------------------------+
 
 
PTL0 PTL1 PTL2 PTL3
+--------+ +--------+ +--------+ +--------+
| | | | | PTL3 | -----\ | |
| | | | +--------+ | | |
| | +--------+ | | | | |
| | | PTL2 | -----\ | | | | |
| | +--------+ | | | | | |
| | | | | | | | +--------+
+--------+ | | | | | | | FRAME |
| PTL1 | -----\ | | | | | | +--------+
+--------+ | | | | | | | | |
| | | | | | | | | | |
| | | | | | | | | | |
+--------+ \----> +--------+ \----> +--------+ \----> +--------+
^
|
|
+--------+
| PTL0 |
+--------+
 
 
PTL0 Page Table Level 0 (Page Directory)
PTL1 Page Table Level 1
PTL2 Page Table Level 2
PTL3 Page Table Level 3
 
PTL0_INDEX Index into PTL0
PTL1_INDEX Index into PTL1
PTL2_INDEX Index into PTL2
PTL3_INDEX Index into PTL3
 
VADDR Virtual address for which mapping is looked up
FRAME Physical address of memory frame to which VADDR is mapped
 
 
On architectures whose hardware has fewer levels, PTL2 and, if need be, PTL1 are
left out. TLB-only architectures are to define custom format for software page
tables.
 
1.2 Single global page hash table
 
Generic page hash table interface is deployed on 64-bit architectures without
implied hardware support for hierarchical page tables, i.e. ia64 and sparc64.
There is only one global page hash table in the system shared by all address
spaces.
 
 
2. Memory allocators
 
2.1 General allocator
 
'malloc' function accepts flags as a second argument. The flags are directly
passed to the underlying frame_alloc function.
 
1) If the flags parameter contains FRAME_ATOMIC, the allocator will not sleep.
The allocator CAN return NULL, when memory is not directly available.
The caller MUST check if NULL was not returned
 
2) If the flags parameter does not contain FRAME_ATOMIC, the allocator
will never return NULL, but it CAN sleep indefinitely. The caller
does not have to check the return value.
 
3) The maximum size that can be allocated using malloc is 256K
 
Rules 1) and 2) apply to slab_alloc as well. Using SLAB allocator
to allocate too large values is not recommended.
 
/branches/sparc/kernel/doc/build
0,0 → 1,14
Following make targets are supported:
 
make, make all
- Check configuration, build
 
make config
- Start kernel configuration program
 
make clean
- Clean build temporary files
 
make distclean
- Clean everything including configuration
 
/branches/sparc/kernel/doc/synchronization
0,0 → 1,29
 
SPINNING LOCKS
spinlock_lock, spinlock_trylock, spinlock_unlock
+------------+
| spinlock_t |
+------------+
 
WAIT QUEUES
waitq_sleep_timeout, waitq_wakeup
+---------+
| waitq_t |
+---------+
/ \
SEMAPHORES / \ CONDITION VARIABLES
semaphore_down_timeout, semaphore_up condvar_wait_timeout, condvar_signal
+--------------+ / \ +-----------+
| semaphore_t |<-+ +->| condvar_t |
+--------------+ +-----------+
| ^
| |
| +------+
V /
MUTEXES / READERS/WRITERS LOCKS
mutex_lock_timeout, mutex_unlock rwlock_reader/writer_lock_timeout, rwlock_unlock
+---------+ / +----------+
| mutex_t |------------------------------->| rwlock_t |
+---------+ / +----------+
| /
+------------------------+