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Compare Revisions

• This comparison shows the changes necessary to convert path

  → /branches/sparc/kernel/arch/sparc64/src/mm/sun4v/tsb.c @ 4432

  → /branches/sparc/kernel/arch/sparc64/src/mm/sun4v/tsb.c @ 4433

  ↔ Reverse comparison

• Compare Path:	Rev

  With Path:	Rev

Ignore whitespace Rev 4432 → Rev 4433

/branches/sparc/kernel/arch/sparc64/src/mm/sun4v/tsb.c
71,7 → 71,7
cnt = pages;
for (i = 0; i < cnt; i++) {
((tsb_entry_t *) as->arch.tsb_description.tsb_base)[
((tsb_entry_t *) PA2KA(as->arch.tsb_description.tsb_base))[
(i0 + i) & (TSB_ENTRY_COUNT - 1)].data.v = false;
}
}
89,7 → 89,7
as = t->as;
entry = (t->page >> MMU_PAGE_WIDTH) & TSB_INDEX_MASK;
ASSERT(entry < TSB_ENTRY_COUNT);
tsb = &((tsb_entry_t *) as->arch.tsb_description.tsb_base)[entry];
tsb = &((tsb_entry_t *) PA2KA(as->arch.tsb_description.tsb_base))[entry];
/*
* We use write barriers to make sure that the TSB load
101,7 → 101,6
write_barrier();
tsb->tag.context = as->asid;
tsb->tag.va_tag = t->page >> VA_TAG_PAGE_SHIFT;
tsb->data.value = 0;
135,7 → 134,7
as = t->as;
entry = (t->page >> MMU_PAGE_WIDTH) & TSB_INDEX_MASK;
ASSERT(entry < TSB_ENTRY_COUNT);
tsb = &((tsb_entry_t *) as->arch.tsb_description.tsb_base)[entry];
tsb = &((tsb_entry_t *) PA2KA(as->arch.tsb_description.tsb_base))[entry];
/*
* We use write barriers to make sure that the TSB load
147,7 → 146,6
write_barrier();
tsb->tag.context = as->asid;
tsb->tag.va_tag = t->page >> VA_TAG_PAGE_SHIFT;
tsb->data.value = 0;