| /branches/sparc/kernel/arch/sparc64/src/cpu/cpu.c |
|---|
| 79,10 → 79,8 |
| { |
| ofw_tree_node_t *node; |
| uint32_t clock_frequency = 0; |
| icbus_config_t icbus_config; |
| icbus_config.value = icbus_config_read(); |
| CPU->arch.mid = icbus_config.mid; |
| CPU->arch.mid = read_mid(); |
| /* |
| * Detect processor frequency. |
| /branches/sparc/kernel/arch/sparc64/src/drivers/scr.c |
|---|
| 61,6 → 61,8 |
| if (strcmp(name, "SUNW,m64B") == 0) |
| scr_type = SCR_ATYFB; |
| else if (strcmp(name, "SUNW,XVR-100") == 0) |
| scr_type = SCR_XVR; |
| else if (strcmp(name, "SUNW,ffb") == 0) |
| scr_type = SCR_FFB; |
| else if (strcmp(name, "cgsix") == 0) |
| 67,7 → 69,7 |
| scr_type = SCR_CGSIX; |
| if (scr_type == SCR_UNKNOWN) { |
| printf("Unknown keyboard device.\n"); |
| printf("Unknown screen device.\n"); |
| return; |
| } |
| 142,6 → 144,50 |
| } |
| break; |
| case SCR_XVR: |
| { |
| if (prop->size / sizeof(ofw_pci_reg_t) < 2) { |
| printf("Too few screen registers.\n"); |
| return; |
| } |
| ofw_pci_reg_t *fb_reg = &((ofw_pci_reg_t *) prop->value)[1]; |
| ofw_pci_reg_t abs_reg; |
| if (!ofw_pci_reg_absolutize(node, fb_reg, &abs_reg)) { |
| printf("Failed to absolutize fb register.\n"); |
| return; |
| } |
| if (!ofw_pci_apply_ranges(node->parent, &abs_reg , &fb_addr)) { |
| printf("Failed to determine screen address.\n"); |
| return; |
| } |
| switch (fb_depth) { |
| case 8: |
| fb_scanline = fb_linebytes * (fb_depth >> 3); |
| visual = VISUAL_SB1500_PALETTE; |
| break; |
| case 16: |
| fb_scanline = fb_linebytes * (fb_depth >> 3); |
| visual = VISUAL_RGB_5_6_5; |
| break; |
| case 24: |
| fb_scanline = fb_linebytes * 4; |
| visual = VISUAL_RGB_8_8_8_0; |
| break; |
| case 32: |
| fb_scanline = fb_linebytes * (fb_depth >> 3); |
| visual = VISUAL_RGB_0_8_8_8; |
| break; |
| default: |
| printf("Unsupported bits per pixel.\n"); |
| return; |
| } |
| break; |
| } |
| case SCR_FFB: |
| fb_scanline = 8192; |
| visual = VISUAL_BGR_0_8_8_8; |
| /branches/sparc/kernel/arch/sparc64/src/drivers/tick.c |
|---|
| 45,11 → 45,11 |
| #define TICK_RESTART_TIME 50 /* Worst case estimate. */ |
| /** Initialize tick interrupt. */ |
| /** Initialize tick and stick interrupt. */ |
| void tick_init(void) |
| { |
| /* initialize TICK interrupt */ |
| tick_compare_reg_t compare; |
| interrupt_register(14, "tick_int", tick_interrupt); |
| compare.int_dis = false; |
| compare.tick_cmpr = CPU->arch.clock_frequency / HZ; |
| 56,6 → 56,21 |
| CPU->arch.next_tick_cmpr = compare.tick_cmpr; |
| tick_compare_write(compare.value); |
| tick_write(0); |
| #if defined (US3) |
| /* disable STICK interrupts and clear any pending ones */ |
| tick_compare_reg_t stick_compare; |
| softint_reg_t clear; |
| stick_compare.value = stick_compare_read(); |
| stick_compare.int_dis = true; |
| stick_compare.tick_cmpr = 0; |
| stick_compare_write(stick_compare.value); |
| clear.value = 0; |
| clear.stick_int = 1; |
| clear_softint_write(clear.value); |
| #endif |
| } |
| /** Process tick interrupt. |
| 65,9 → 80,10 |
| */ |
| void tick_interrupt(int n, istate_t *istate) |
| { |
| softint_reg_t softint, clear; |
| uint64_t drift; |
| softint.value = softint_read(); |
| /* |
| /branches/sparc/kernel/arch/sparc64/src/start.S |
|---|
| 27,6 → 27,7 |
| # |
| #include <arch/arch.h> |
| #include <arch/cpu.h> |
| #include <arch/regdef.h> |
| #include <arch/boot/boot.h> |
| #include <arch/stack.h> |
| 297,15 → 298,32 |
| nop |
| 1: |
| #ifdef CONFIG_SMP |
| /* |
| * Determine the width of the MID and save its mask to %g3. The width |
| * is |
| * * 5 for US and US-IIIi, |
| * * 10 for US3 except US-IIIi. |
| */ |
| #if defined(US) |
| mov 0x1f, %g3 |
| #elif defined(US3) |
| mov 0x3ff, %g3 |
| rdpr %ver, %g2 |
| sllx %g2, 16, %g2 |
| srlx %g2, 48, %g2 |
| cmp %g2, IMPL_ULTRASPARCIII_I |
| move %xcc, 0x1f, %g3 |
| #endif |
| /* |
| * Read MID from the processor. |
| */ |
| 1: |
| ldxa [%g0] ASI_ICBUS_CONFIG, %g1 |
| srlx %g1, ICBUS_CONFIG_MID_SHIFT, %g1 |
| and %g1, ICBUS_CONFIG_MID_MASK, %g1 |
| and %g1, %g3, %g1 |
| #ifdef CONFIG_SMP |
| /* |
| * Active loop for APs until the BSP picks them up. A processor cannot |
| * leave the loop until the global variable 'waking_up_mid' equals its |