| /branches/sparc/kernel/arch/sparc64/include/sun4v/regdef.h |
|---|
| 37,7 → 37,17 |
| #define KERN_sparc64_sun4v_REGDEF_H_ |
| #define PSTATE_PRIV_BIT (1 << 2) |
| #define PSTATE_PEF_BIT (1 << 4) |
| #define TSTATE_PSTATE_SHIFT 8 |
| #define TSTATE_PRIV_BIT (PSTATE_PRIV_BIT << TSTATE_PSTATE_SHIFT) |
| #define TSTATE_CWP_MASK 0x1f |
| #define WSTATE_NORMAL(n) (n) |
| #define WSTATE_OTHER(n) ((n) << 3) |
| #define TSTATE_PEF_BIT (PSTATE_PEF_BIT << TSTATE_PSTATE_SHIFT) |
| /* |
| #define PSTATE_IE_BIT (1 << 1) |
| /branches/sparc/kernel/arch/sparc64/include/cpu.h |
|---|
| 42,9 → 42,14 |
| #include <arch/register.h> |
| typedef struct { |
| #if defined (SUN4U) |
| uint32_t mid; /**< Processor ID as read from |
| UPA_CONFIG/FIREPLANE_CONFIG. */ |
| ver_reg_t ver; |
| #elif defined (SUN4V) |
| uint64_t id; /**< virtual processor ID */ |
| uint32_t mid; // TODO: left here only to keep the code compilable!!! |
| #endif |
| uint32_t clock_frequency; /**< Processor frequency in Hz. */ |
| uint64_t next_tick_cmpr; /**< Next clock interrupt should be |
| generated when the TICK register |