| 42,6 → 42,7 |
|---|
| #ifndef __ASM__ |
| |
| #include <arch/mm/tte.h> |
| #include <print.h> |
| #include <arch/mm/mmu.h> |
| #include <arch/mm/page.h> |
| #include <arch/asm.h> |
| 139,36 → 140,6 |
|---|
| __hypercall_fast5(MMU_DEMAP_PAGE, 0, 0, vaddr, context, mmu_flag); |
| } |
| |
| /** |
| * Installs a locked TLB entry in kernel address space. |
| * |
| * @param vaddr VA of the page to be demapped |
| * @param ra real address the page is mapped to |
| * @param cacheable should the page be cacheble? |
| * @param privileged should the mapping be privileged? |
| * @param executable should the memory mapped be executable? |
| * @param writable should the memory mapped be writable? |
| * @param size code of the page size |
| * @param mmu_flag MMU_FLAG_DTLB, MMU_FLAG_ITLB or a combination of both |
| */ |
| static inline void mmu_map_perm_addr(uintptr_t vaddr, uintptr_t ra, |
| bool cacheable, bool privileged, bool executable, |
| bool writable, unsigned size, unsigned mmu_flags) { |
| |
| tte_data_t data; |
| data.value = 0; |
| |
| data.v = true; |
| data.ra = ra; |
| data.cp = data.cv = cacheable; |
| data.p = privileged; |
| data.x = executable; |
| data.w = writable; |
| data.size = size; |
| |
| __hypercall_fast4(MMU_MAP_PERM_ADDR, vaddr, 0, data.value, mmu_flags); |
| } |
| |
| extern void fast_instruction_access_mmu_miss(unative_t, istate_t *); |
| extern void fast_data_access_mmu_miss(unative_t, istate_t *); |
| extern void fast_data_access_protection(unative_t, istate_t *); |