| /branches/sparc/kernel/arch/sparc64/include/mm/frame.h |
|---|
| 59,8 → 59,13 |
| union frame_address { |
| uintptr_t address; |
| struct { |
| #if defined (US) |
| unsigned : 23; |
| uint64_t pfn : 28; /**< Physical Frame Number. */ |
| #elif defined (US3) |
| unsigned : 21; |
| uint64_t pfn : 30; /**< Physical Frame Number. */ |
| #endif |
| unsigned offset : 13; /**< Offset. */ |
| } __attribute__ ((packed)); |
| }; |
| /branches/sparc/kernel/arch/sparc64/include/mm/tte.h |
|---|
| 50,7 → 50,7 |
| #include <arch/types.h> |
| // TODO find out what this means |
| /* TTE tag's VA_tag field contains bits <63:VA_TAG_PAGE_SHIFT> of the VA */ |
| #define VA_TAG_PAGE_SHIFT 22 |
| /** Translation Table Entry - Tag. */ |
| 101,4 → 101,4 |
| #endif |
| /** @} |
| */ |
| */ |
| /branches/sparc/kernel/arch/sparc64/include/mm/mmu.h |
|---|
| 35,8 → 35,10 |
| #ifndef KERN_sparc64_MMU_H_ |
| #define KERN_sparc64_MMU_H_ |
| #if defined(US) |
| /* LSU Control Register ASI. */ |
| #define ASI_LSU_CONTROL_REG 0x45 /**< Load/Store Unit Control Register. */ |
| #endif |
| /* I-MMU ASIs. */ |
| #define ASI_IMMU 0x50 |
| 80,6 → 82,7 |
| #include <arch/barrier.h> |
| #include <arch/types.h> |
| #if defined(US) |
| /** LSU Control Register. */ |
| typedef union { |
| uint64_t value; |
| 100,6 → 103,7 |
| } __attribute__ ((packed)); |
| } lsu_cr_reg_t; |
| #endif /* US */ |
| #endif /* !def __ASM__ */ |