| /branches/sparc/kernel/arch/sparc64/include/sun4v/md.h |
|---|
| 54,6 → 54,8 |
| const char *md_get_node_name(md_node_t node); |
| bool md_get_integer_property(md_node_t node, const char *key, |
| uint64_t *result); |
| bool md_get_string_property(md_node_t node, const char *key, |
| const char **result); |
| bool md_next_node(md_node_t *node, const char *name); |
| void md_init(void); |
| /branches/sparc/kernel/arch/sparc64/include/sun4v/ipi.h |
|---|
| 0,0 → 1,47 |
| /* |
| * Copyright (c) 2009 Pavel Rimsky |
| * All rights reserved. |
| * |
| * Redistribution and use in source and binary forms, with or without |
| * modification, are permitted provided that the following conditions |
| * are met: |
| * |
| * - Redistributions of source code must retain the above copyright |
| * notice, this list of conditions and the following disclaimer. |
| * - Redistributions in binary form must reproduce the above copyright |
| * notice, this list of conditions and the following disclaimer in the |
| * documentation and/or other materials provided with the distribution. |
| * - The name of the author may not be used to endorse or promote products |
| * derived from this software without specific prior written permission. |
| * |
| * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
| * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
| * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
| * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
| * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
| * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
| * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
| * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
| * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| */ |
| /** @addtogroup sparc64 |
| * @{ |
| */ |
| /** |
| * @file |
| * @brief sun4v-specific IPI functions |
| */ |
| #ifndef KERN_sparc64_sun4v_IPI_H_ |
| #define KERN_sparc64_sun4v_IPI_H_ |
| uint64_t ipi_brodcast_to(void (*func)(void), uint16_t cpu_list[MAX_NUM_STRANDS], |
| uint64_t list_size); |
| uint64_t ipi_unicast_to(void (*func)(void), uint16_t cpu_id); |
| #endif |
| /** @} |
| */ |
| /branches/sparc/kernel/arch/sparc64/include/sun4v/hypercall.h |
|---|
| 51,6 → 51,7 |
| #define CPU_START 0x10 |
| #define CPU_STOP 0x11 |
| #define CPU_YIELD 0x12 |
| #define CPU_QCONF 0x14 |
| #define CPU_MYID 0x16 |
| #define CPU_STATE 0x17 |
| #define CPU_SET_RTBA 0x18 |
| /branches/sparc/kernel/arch/sparc64/include/trap/sun4v/interrupt.h |
|---|
| 0,0 → 1,50 |
| /* |
| * Copyright (c) 2005 Jakub Jermar |
| * All rights reserved. |
| * |
| * Redistribution and use in source and binary forms, with or without |
| * modification, are permitted provided that the following conditions |
| * are met: |
| * |
| * - Redistributions of source code must retain the above copyright |
| * notice, this list of conditions and the following disclaimer. |
| * - Redistributions in binary form must reproduce the above copyright |
| * notice, this list of conditions and the following disclaimer in the |
| * documentation and/or other materials provided with the distribution. |
| * - The name of the author may not be used to endorse or promote products |
| * derived from this software without specific prior written permission. |
| * |
| * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
| * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
| * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
| * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
| * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
| * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
| * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
| * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
| * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| */ |
| /** @addtogroup sparc64interrupt |
| * @{ |
| */ |
| /** |
| * @file |
| * @brief This file contains interrupt vector trap handler. |
| */ |
| #ifndef KERN_sparc64_TRAP_SUN4V_INTERRUPT_H_ |
| #define KERN_sparc64_TRAP_SUN4V_INTERRUPT_H_ |
| #ifndef __ASM__ |
| void sun4v_ipi_init(void); |
| void cpu_mondo(void); |
| #endif |
| #endif |
| /** @} |
| */ |
| /branches/sparc/kernel/arch/sparc64/include/trap/sun4v/mmu.h |
|---|
| 54,6 → 54,7 |
| #define TT_FAST_INSTRUCTION_ACCESS_MMU_MISS 0x64 |
| #define TT_FAST_DATA_ACCESS_MMU_MISS 0x68 |
| #define TT_FAST_DATA_ACCESS_PROTECTION 0x6c |
| #define TT_CPU_MONDO 0x7c |
| #define FAST_MMU_HANDLER_SIZE 128 |
| /branches/sparc/kernel/arch/sparc64/include/trap/interrupt.h |
|---|
| 31,69 → 31,12 |
| */ |
| /** |
| * @file |
| * @brief This file contains interrupt vector trap handler. |
| * @brief This file contains level N interrupt and inter-processor interrupt |
| * trap handler. |
| */ |
| #ifndef KERN_sparc64_INTERRUPT_TRAP_H_ |
| #define KERN_sparc64_INTERRUPT_TRAP_H_ |
| #ifndef KERN_sparc64_TRAP_INTERRUPT_H_ |
| #define KERN_sparc64_TRAP_INTERRUPT_H_ |
| #include <arch/trap/trap_table.h> |
| #include <arch/stack.h> |
| /* IMAP register bits */ |
| #define IGN_MASK 0x7c0 |
| #define INO_MASK 0x1f |
| #define IMAP_V_MASK (1ULL << 31) |
| #define IGN_SHIFT 6 |
| /* Interrupt ASI registers. */ |
| #define ASI_INTR_W 0x77 |
| #define ASI_INTR_DISPATCH_STATUS 0x48 |
| #define ASI_INTR_R 0x7f |
| #define ASI_INTR_RECEIVE 0x49 |
| /* VA's used with ASI_INTR_W register. */ |
| #if defined (US) |
| #define ASI_UDB_INTR_W_DATA_0 0x40 |
| #define ASI_UDB_INTR_W_DATA_1 0x50 |
| #define ASI_UDB_INTR_W_DATA_2 0x60 |
| #elif defined (US3) |
| #define VA_INTR_W_DATA_0 0x40 |
| #define VA_INTR_W_DATA_1 0x48 |
| #define VA_INTR_W_DATA_2 0x50 |
| #define VA_INTR_W_DATA_3 0x58 |
| #define VA_INTR_W_DATA_4 0x60 |
| #define VA_INTR_W_DATA_5 0x68 |
| #define VA_INTR_W_DATA_6 0x80 |
| #define VA_INTR_W_DATA_7 0x88 |
| #endif |
| #define VA_INTR_W_DISPATCH 0x70 |
| /* VA's used with ASI_INTR_R register. */ |
| #if defined(US) |
| #define ASI_UDB_INTR_R_DATA_0 0x40 |
| #define ASI_UDB_INTR_R_DATA_1 0x50 |
| #define ASI_UDB_INTR_R_DATA_2 0x60 |
| #elif defined (US3) |
| #define VA_INTR_R_DATA_0 0x40 |
| #define VA_INTR_R_DATA_1 0x48 |
| #define VA_INTR_R_DATA_2 0x50 |
| #define VA_INTR_R_DATA_3 0x58 |
| #define VA_INTR_R_DATA_4 0x60 |
| #define VA_INTR_R_DATA_5 0x68 |
| #define VA_INTR_R_DATA_6 0x80 |
| #define VA_INTR_R_DATA_7 0x88 |
| #endif |
| /* Shifts in the Interrupt Vector Dispatch virtual address. */ |
| #define INTR_VEC_DISPATCH_MID_SHIFT 14 |
| /* Bits in the Interrupt Dispatch Status register. */ |
| #define INTR_DISPATCH_STATUS_NACK 0x2 |
| #define INTR_DISPATCH_STATUS_BUSY 0x1 |
| #define TT_INTERRUPT_LEVEL_1 0x41 |
| #define TT_INTERRUPT_LEVEL_2 0x42 |
| #define TT_INTERRUPT_LEVEL_3 0x43 |
| 110,22 → 53,23 |
| #define TT_INTERRUPT_LEVEL_14 0x4e |
| #define TT_INTERRUPT_LEVEL_15 0x4f |
| #define TT_INTERRUPT_VECTOR_TRAP 0x60 |
| #define INTERRUPT_LEVEL_N_HANDLER_SIZE TRAP_TABLE_ENTRY_SIZE |
| #define INTERRUPT_VECTOR_TRAP_HANDLER_SIZE TRAP_TABLE_ENTRY_SIZE |
| /* IMAP register bits */ |
| #define IGN_MASK 0x7c0 |
| #define INO_MASK 0x1f |
| #define IMAP_V_MASK (1ULL << 31) |
| #define IGN_SHIFT 6 |
| #ifdef __ASM__ |
| .macro INTERRUPT_LEVEL_N_HANDLER n |
| mov \n - 1, %g2 |
| PREEMPTIBLE_HANDLER exc_dispatch |
| .endm |
| #endif |
| .macro INTERRUPT_VECTOR_TRAP_HANDLER |
| PREEMPTIBLE_HANDLER interrupt |
| .endm |
| #endif /* __ASM__ */ |
| #ifndef __ASM__ |
| #include <arch/interrupt.h> |
| 133,7 → 77,14 |
| extern void interrupt(int n, istate_t *istate); |
| #endif /* !def __ASM__ */ |
| #if defined (SUN4U) |
| #include <arch/trap/sun4u/interrupt.h> |
| #elif defined (SUN4V) |
| #include <arch/trap/sun4v/interrupt.h> |
| #endif |
| #endif |
| /** @} |
| */ |
| /branches/sparc/kernel/arch/sparc64/include/trap/mmu.h |
|---|
| 34,8 → 34,8 |
| * @brief This file contains fast MMU trap handlers. |
| */ |
| #ifndef KERN_sparc64_sun4u_MMU_TRAP_H_ |
| #define KERN_sparc64_sun4u_MMU_TRAP_H_ |
| #ifndef KERN_sparc64_MMU_TRAP_H_ |
| #define KERN_sparc64_MMU_TRAP_H_ |
| #if defined (SUN4U) |
| #include <arch/trap/sun4u/mmu.h> |
| /branches/sparc/kernel/arch/sparc64/include/trap/sun4u/interrupt.h |
|---|
| 0,0 → 1,104 |
| /* |
| * Copyright (c) 2005 Jakub Jermar |
| * All rights reserved. |
| * |
| * Redistribution and use in source and binary forms, with or without |
| * modification, are permitted provided that the following conditions |
| * are met: |
| * |
| * - Redistributions of source code must retain the above copyright |
| * notice, this list of conditions and the following disclaimer. |
| * - Redistributions in binary form must reproduce the above copyright |
| * notice, this list of conditions and the following disclaimer in the |
| * documentation and/or other materials provided with the distribution. |
| * - The name of the author may not be used to endorse or promote products |
| * derived from this software without specific prior written permission. |
| * |
| * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
| * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
| * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
| * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
| * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
| * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
| * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
| * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
| * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| */ |
| /** @addtogroup sparc64interrupt |
| * @{ |
| */ |
| /** |
| * @file |
| * @brief This file contains interrupt vector trap handler. |
| */ |
| #ifndef KERN_sparc64_TRAP_SUN4U_INTERRUPT_H_ |
| #define KERN_sparc64_TRAP_SUN4U_INTERRUPT_H_ |
| #include <arch/trap/trap_table.h> |
| #include <arch/stack.h> |
| /* Interrupt ASI registers. */ |
| #define ASI_INTR_W 0x77 |
| #define ASI_INTR_DISPATCH_STATUS 0x48 |
| #define ASI_INTR_R 0x7f |
| #define ASI_INTR_RECEIVE 0x49 |
| /* VA's used with ASI_INTR_W register. */ |
| #if defined (US) |
| #define ASI_UDB_INTR_W_DATA_0 0x40 |
| #define ASI_UDB_INTR_W_DATA_1 0x50 |
| #define ASI_UDB_INTR_W_DATA_2 0x60 |
| #elif defined (US3) |
| #define VA_INTR_W_DATA_0 0x40 |
| #define VA_INTR_W_DATA_1 0x48 |
| #define VA_INTR_W_DATA_2 0x50 |
| #define VA_INTR_W_DATA_3 0x58 |
| #define VA_INTR_W_DATA_4 0x60 |
| #define VA_INTR_W_DATA_5 0x68 |
| #define VA_INTR_W_DATA_6 0x80 |
| #define VA_INTR_W_DATA_7 0x88 |
| #endif |
| #define VA_INTR_W_DISPATCH 0x70 |
| /* VA's used with ASI_INTR_R register. */ |
| #if defined(US) |
| #define ASI_UDB_INTR_R_DATA_0 0x40 |
| #define ASI_UDB_INTR_R_DATA_1 0x50 |
| #define ASI_UDB_INTR_R_DATA_2 0x60 |
| #elif defined (US3) |
| #define VA_INTR_R_DATA_0 0x40 |
| #define VA_INTR_R_DATA_1 0x48 |
| #define VA_INTR_R_DATA_2 0x50 |
| #define VA_INTR_R_DATA_3 0x58 |
| #define VA_INTR_R_DATA_4 0x60 |
| #define VA_INTR_R_DATA_5 0x68 |
| #define VA_INTR_R_DATA_6 0x80 |
| #define VA_INTR_R_DATA_7 0x88 |
| #endif |
| /* Shifts in the Interrupt Vector Dispatch virtual address. */ |
| #define INTR_VEC_DISPATCH_MID_SHIFT 14 |
| /* Bits in the Interrupt Dispatch Status register. */ |
| #define INTR_DISPATCH_STATUS_NACK 0x2 |
| #define INTR_DISPATCH_STATUS_BUSY 0x1 |
| #define TT_INTERRUPT_VECTOR_TRAP 0x60 |
| #define INTERRUPT_VECTOR_TRAP_HANDLER_SIZE TRAP_TABLE_ENTRY_SIZE |
| #ifdef __ASM__ |
| .macro INTERRUPT_VECTOR_TRAP_HANDLER |
| PREEMPTIBLE_HANDLER interrupt |
| .endm |
| #endif /* __ASM__ */ |
| #endif |
| /** @} |
| */ |