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Compare Revisions

• This comparison shows the changes necessary to convert path

  → /branches/sparc/kernel/arch/sparc64/include/ @ 3617

  → /branches/sparc/kernel/arch/sparc64/include/ @ 3618

  ↔ Reverse comparison

• Compare Path:	Rev

  With Path:	Rev

Ignore whitespace Rev 3617 → Rev 3618

/branches/sparc/kernel/arch/sparc64/include/mm/cache_spec.h
38,7 → 38,8
/*
* The following macros are valid for the following processors:
*
* UltraSPARC, UltraSPARC II, UltraSPARC IIi, UltraSPARC III Cu
* UltraSPARC, UltraSPARC II, UltraSPARC IIi, UltraSPARC III,
* UltraSPARC III+, UltraSPARC IV, UltraSPARC IV+
*
* Should we support other UltraSPARC processors, we need to make sure that
* the macros are defined correctly for them.

/branches/sparc/kernel/arch/sparc64/include/mm/tlb.h
176,7 → 176,6
/** I-/D-TLB Tag Read Register. */
union tlb_tag_read_reg {
// TODO have a look at how non-8kB pages will be treated
uint64_t value;
struct {
uint64_t vpn : 51; /**< Virtual Address bits 63:13. */
431,7 → 430,8
* @param entry TLB Entry index.
* @param value Value to be written.
*/
static inline void itlb_data_access_write(int tlb, index_t entry, uint64_t value)
static inline void itlb_data_access_write(int tlb, index_t entry,
uint64_t value)
{
itlb_data_access_addr_t reg;
465,7 → 465,8
* @param entry TLB Entry index.
* @param value Value to be written.
*/
static inline void dtlb_data_access_write(int tlb, index_t entry, uint64_t value)
static inline void dtlb_data_access_write(int tlb, index_t entry,
uint64_t value)
{
dtlb_data_access_addr_t reg;