| /branches/sparc/kernel/arch/sparc64/include/mm/mmu.h |
|---|
| 54,7 → 54,12 |
| #define VA_IMMU_SFSR 0x18 /**< IMMU sync fault status register. */ |
| #define VA_IMMU_TSB_BASE 0x28 /**< IMMU TSB base register. */ |
| #define VA_IMMU_TAG_ACCESS 0x30 /**< IMMU TLB tag access register. */ |
| #if defined (US3) |
| #define VA_IMMU_PRIMARY_EXTENSION 0x48 /**< IMMU TSB primary extension register */ |
| #define VA_IMMU_NUCLEUS_EXTENSION 0x58 /**< IMMU TSB nucleus extension register */ |
| #endif |
| /* D-MMU ASIs. */ |
| #define ASI_DMMU 0x58 |
| #define ASI_DMMU_TSB_8KB_PTR_REG 0x59 |
| 75,6 → 80,11 |
| #define VA_DMMU_TAG_ACCESS 0x30 /**< DMMU TLB tag access register. */ |
| #define VA_DMMU_VA_WATCHPOINT_REG 0x38 /**< DMMU VA data watchpoint register. */ |
| #define VA_DMMU_PA_WATCHPOINT_REG 0x40 /**< DMMU PA data watchpoint register. */ |
| #if defined (US3) |
| #define VA_DMMU_PRIMARY_EXTENSION 0x48 /**< DMMU TSB primary extension register */ |
| #define VA_DMMU_SECONDARY_EXTENSION 0x50 /**< DMMU TSB secondary extension register */ |
| #define VA_DMMU_NUCLEUS_EXTENSION 0x58 /**< DMMU TSB nucleus extension register */ |
| #endif |
| #ifndef __ASM__ |
| /branches/sparc/kernel/arch/sparc64/include/mm/tlb.h |
|---|
| 41,7 → 41,7 |
| #define DTLB_MAX_LOCKED_ENTRIES DTLB_ENTRY_COUNT |
| #endif |
| /** DT16 is the only of the three DMMU caches that can hold locked entries. */ |
| /** DT16 is the only of the three DMMUs that can hold locked entries. */ |
| #if defined (US3) |
| #define DTLB_MAX_LOCKED_ENTRIES 16 |
| #endif |
| 640,4 → 640,4 |
| #endif |
| /** @} |
| */ |
| */ |
| /branches/sparc/kernel/arch/sparc64/include/mm/tsb.h |
|---|
| 107,6 → 107,55 |
| asi_u64_write(ASI_DMMU, VA_DMMU_TSB_BASE, v); |
| } |
| #if defined (US3) |
| /** Write DTSB Primary Extension register. |
| * |
| * @param v New content of the DTSB Primary Extension register. |
| */ |
| static inline void dtsb_primary_extension_write(uint64_t v) |
| { |
| asi_u64_write(ASI_DMMU, VA_DMMU_PRIMARY_EXTENSION, v); |
| } |
| /** Write DTSB Secondary Extension register. |
| * |
| * @param v New content of the DTSB Secondary Extension register. |
| */ |
| static inline void dtsb_secondary_extension_write(uint64_t v) |
| { |
| asi_u64_write(ASI_DMMU, VA_DMMU_SECONDARY_EXTENSION, v); |
| } |
| /** Write DTSB Nucleus Extension register. |
| * |
| * @param v New content of the DTSB Nucleus Extension register. |
| */ |
| static inline void dtsb_nucleus_extension_write(uint64_t v) |
| { |
| asi_u64_write(ASI_DMMU, VA_DMMU_NUCLEUS_EXTENSION, v); |
| } |
| /** Write ITSB Primary Extension register. |
| * |
| * @param v New content of the ITSB Primary Extension register. |
| */ |
| static inline void itsb_primary_extension_write(uint64_t v) |
| { |
| asi_u64_write(ASI_IMMU, VA_IMMU_PRIMARY_EXTENSION, v); |
| } |
| /** Write ITSB Nucleus Extension register. |
| * |
| * @param v New content of the ITSB Nucleus Extension register. |
| */ |
| static inline void itsb_nucleus_extension_write(uint64_t v) |
| { |
| asi_u64_write(ASI_IMMU, VA_IMMU_NUCLEUS_EXTENSION, v); |
| } |
| #endif |
| /* Forward declarations. */ |
| struct as; |
| struct pte; |