| /branches/sparc/kernel/arch/sparc64/include/trap/interrupt.h |
|---|
| 54,7 → 54,7 |
| #define ASI_INTR_R 0x7f |
| #define ASI_INTR_RECEIVE 0x49 |
| /* VA's used with ASI_UDB_INTR_W register. */ |
| /* VA's used with ASI_INTR_W register. */ |
| #if defined (US) |
| #define ASI_UDB_INTR_W_DATA_0 0x40 |
| #define ASI_UDB_INTR_W_DATA_1 0x50 |
| 71,7 → 71,7 |
| #endif |
| #define VA_INTR_W_DISPATCH 0x70 |
| /* VA's used with ASI_UDB_INTR_R register. */ |
| /* VA's used with ASI_INTR_R register. */ |
| #if defined(US) |
| #define ASI_UDB_INTR_R_DATA_0 0x40 |
| #define ASI_UDB_INTR_R_DATA_1 0x50 |
| /branches/sparc/kernel/arch/sparc64/include/mm/tlb.h |
|---|
| 137,7 → 137,7 |
| * In US3, I-MMU and D-MMU have different formats of the data |
| * access register virtual address. In the corresponding |
| * structures the member variable for the entry number is |
| * called "local_tlb_entry" - it contrast with the "tlb_entry" |
| * called "local_tlb_entry" - it contrasts with the "tlb_entry" |
| * for the US data access register VA structure. The rationale |
| * behind this is to prevent careless mistakes in the code |
| * caused by setting only the entry number and not the TLB |
| 239,7 → 239,7 |
| */ |
| /** |
| * Determine the number od entries in the DMMU's small TLB. |
| * Determine the number of entries in the DMMU's small TLB. |
| */ |
| static inline uint16_t tlb_dsmall_size(void) |
| { |
| 247,7 → 247,7 |
| } |
| /** |
| * Determine the number od entries in each DMMU's big TLB. |
| * Determine the number of entries in each DMMU's big TLB. |
| */ |
| static inline uint16_t tlb_dbig_size(void) |
| { |
| 255,7 → 255,7 |
| } |
| /** |
| * Determine the number od entries in the IMMU's small TLB. |
| * Determine the number of entries in the IMMU's small TLB. |
| */ |
| static inline uint16_t tlb_ismall_size(void) |
| { |
| 263,7 → 263,7 |
| } |
| /** |
| * Determine the number od entries in the IMMU's big TLB. |
| * Determine the number of entries in the IMMU's big TLB. |
| */ |
| static inline uint16_t tlb_ibig_size(void) |
| { |
| 277,7 → 277,7 |
| /** Read MMU Primary Context Register. |
| * |
| * @return Current value of Primary Context Register. |
| * @return Current value of Primary Context Register. |
| */ |
| static inline uint64_t mmu_primary_context_read(void) |
| { |
| 286,7 → 286,7 |
| /** Write MMU Primary Context Register. |
| * |
| * @param v New value of Primary Context Register. |
| * @param v New value of Primary Context Register. |
| */ |
| static inline void mmu_primary_context_write(uint64_t v) |
| { |
| 296,7 → 296,7 |
| /** Read MMU Secondary Context Register. |
| * |
| * @return Current value of Secondary Context Register. |
| * @return Current value of Secondary Context Register. |
| */ |
| static inline uint64_t mmu_secondary_context_read(void) |
| { |
| 305,7 → 305,7 |
| /** Write MMU Primary Context Register. |
| * |
| * @param v New value of Primary Context Register. |
| * @param v New value of Primary Context Register. |
| */ |
| static inline void mmu_secondary_context_write(uint64_t v) |
| { |
| 317,9 → 317,10 |
| /** Read IMMU TLB Data Access Register. |
| * |
| * @param entry TLB Entry index. |
| * @param entry TLB Entry index. |
| * |
| * @return Current value of specified IMMU TLB Data Access Register. |
| * @return Current value of specified IMMU TLB Data Access |
| * Register. |
| */ |
| static inline uint64_t itlb_data_access_read(index_t entry) |
| { |
| 332,8 → 333,8 |
| /** Write IMMU TLB Data Access Register. |
| * |
| * @param entry TLB Entry index. |
| * @param value Value to be written. |
| * @param entry TLB Entry index. |
| * @param value Value to be written. |
| */ |
| static inline void itlb_data_access_write(index_t entry, uint64_t value) |
| { |
| 347,9 → 348,10 |
| /** Read DMMU TLB Data Access Register. |
| * |
| * @param entry TLB Entry index. |
| * @param entry TLB Entry index. |
| * |
| * @return Current value of specified DMMU TLB Data Access Register. |
| * @return Current value of specified DMMU TLB Data Access |
| * Register. |
| */ |
| static inline uint64_t dtlb_data_access_read(index_t entry) |
| { |
| 362,8 → 364,8 |
| /** Write DMMU TLB Data Access Register. |
| * |
| * @param entry TLB Entry index. |
| * @param value Value to be written. |
| * @param entry TLB Entry index. |
| * @param value Value to be written. |
| */ |
| static inline void dtlb_data_access_write(index_t entry, uint64_t value) |
| { |
| 377,9 → 379,9 |
| /** Read IMMU TLB Tag Read Register. |
| * |
| * @param entry TLB Entry index. |
| * @param entry TLB Entry index. |
| * |
| * @return Current value of specified IMMU TLB Tag Read Register. |
| * @return Current value of specified IMMU TLB Tag Read Register. |
| */ |
| static inline uint64_t itlb_tag_read_read(index_t entry) |
| { |
| 392,9 → 394,9 |
| /** Read DMMU TLB Tag Read Register. |
| * |
| * @param entry TLB Entry index. |
| * @param entry TLB Entry index. |
| * |
| * @return Current value of specified DMMU TLB Tag Read Register. |
| * @return Current value of specified DMMU TLB Tag Read Register. |
| */ |
| static inline uint64_t dtlb_tag_read_read(index_t entry) |
| { |
| 410,10 → 412,11 |
| /** Read IMMU TLB Data Access Register. |
| * |
| * @param tlb TLB number (one of TLB_ISMALL or TLB_IBIG) |
| * @param entry TLB Entry index. |
| * @param tlb TLB number (one of TLB_ISMALL or TLB_IBIG) |
| * @param entry TLB Entry index. |
| * |
| * @return Current value of specified IMMU TLB Data Access Register. |
| * @return Current value of specified IMMU TLB Data Access |
| * Register. |
| */ |
| static inline uint64_t itlb_data_access_read(int tlb, index_t entry) |
| { |
| 426,9 → 429,9 |
| } |
| /** Write IMMU TLB Data Access Register. |
| * @param tlb TLB number (one of TLB_ISMALL or TLB_IBIG) |
| * @param entry TLB Entry index. |
| * @param value Value to be written. |
| * @param tlb TLB number (one of TLB_ISMALL or TLB_IBIG) |
| * @param entry TLB Entry index. |
| * @param value Value to be written. |
| */ |
| static inline void itlb_data_access_write(int tlb, index_t entry, |
| uint64_t value) |
| 444,10 → 447,11 |
| /** Read DMMU TLB Data Access Register. |
| * |
| * @param tlb TLB number (one of TLB_DSMALL, TLB_DBIG, TLB_DBIG) |
| * @param entry TLB Entry index. |
| * @param tlb TLB number (one of TLB_DSMALL, TLB_DBIG, TLB_DBIG) |
| * @param entry TLB Entry index. |
| * |
| * @return Current value of specified DMMU TLB Data Access Register. |
| * @return Current value of specified DMMU TLB Data Access |
| * Register. |
| */ |
| static inline uint64_t dtlb_data_access_read(int tlb, index_t entry) |
| { |
| 461,9 → 465,9 |
| /** Write DMMU TLB Data Access Register. |
| * |
| * @param tlb TLB number (one of TLB_DSMALL, TLB_DBIG_0, TLB_DBIG_1) |
| * @param entry TLB Entry index. |
| * @param value Value to be written. |
| * @param tlb TLB number (one of TLB_DSMALL, TLB_DBIG_0, TLB_DBIG_1) |
| * @param entry TLB Entry index. |
| * @param value Value to be written. |
| */ |
| static inline void dtlb_data_access_write(int tlb, index_t entry, |
| uint64_t value) |
| 479,10 → 483,10 |
| /** Read IMMU TLB Tag Read Register. |
| * |
| * @param tlb TLB number (one of TLB_ISMALL or TLB_IBIG) |
| * @param entry TLB Entry index. |
| * @param tlb TLB number (one of TLB_ISMALL or TLB_IBIG) |
| * @param entry TLB Entry index. |
| * |
| * @return Current value of specified IMMU TLB Tag Read Register. |
| * @return Current value of specified IMMU TLB Tag Read Register. |
| */ |
| static inline uint64_t itlb_tag_read_read(int tlb, index_t entry) |
| { |
| 496,10 → 500,10 |
| /** Read DMMU TLB Tag Read Register. |
| * |
| * @param tlb TLB number (one of TLB_DSMALL, TLB_DBIG_0, TLB_DBIG_1) |
| * @param entry TLB Entry index. |
| * @param tlb TLB number (one of TLB_DSMALL, TLB_DBIG_0, TLB_DBIG_1) |
| * @param entry TLB Entry index. |
| * |
| * @return Current value of specified DMMU TLB Tag Read Register. |
| * @return Current value of specified DMMU TLB Tag Read Register. |
| */ |
| static inline uint64_t dtlb_tag_read_read(int tlb, index_t entry) |
| { |
| 516,7 → 520,7 |
| /** Write IMMU TLB Tag Access Register. |
| * |
| * @param v Value to be written. |
| * @param v Value to be written. |
| */ |
| static inline void itlb_tag_access_write(uint64_t v) |
| { |
| 526,7 → 530,7 |
| /** Read IMMU TLB Tag Access Register. |
| * |
| * @return Current value of IMMU TLB Tag Access Register. |
| * @return Current value of IMMU TLB Tag Access Register. |
| */ |
| static inline uint64_t itlb_tag_access_read(void) |
| { |
| 535,7 → 539,7 |
| /** Write DMMU TLB Tag Access Register. |
| * |
| * @param v Value to be written. |
| * @param v Value to be written. |
| */ |
| static inline void dtlb_tag_access_write(uint64_t v) |
| { |
| 545,7 → 549,7 |
| /** Read DMMU TLB Tag Access Register. |
| * |
| * @return Current value of DMMU TLB Tag Access Register. |
| * @return Current value of DMMU TLB Tag Access Register. |
| */ |
| static inline uint64_t dtlb_tag_access_read(void) |
| { |
| 555,7 → 559,7 |
| /** Write IMMU TLB Data in Register. |
| * |
| * @param v Value to be written. |
| * @param v Value to be written. |
| */ |
| static inline void itlb_data_in_write(uint64_t v) |
| { |
| 565,7 → 569,7 |
| /** Write DMMU TLB Data in Register. |
| * |
| * @param v Value to be written. |
| * @param v Value to be written. |
| */ |
| static inline void dtlb_data_in_write(uint64_t v) |
| { |
| 575,7 → 579,7 |
| /** Read ITLB Synchronous Fault Status Register. |
| * |
| * @return Current content of I-SFSR register. |
| * @return Current content of I-SFSR register. |
| */ |
| static inline uint64_t itlb_sfsr_read(void) |
| { |
| 584,7 → 588,7 |
| /** Write ITLB Synchronous Fault Status Register. |
| * |
| * @param v New value of I-SFSR register. |
| * @param v New value of I-SFSR register. |
| */ |
| static inline void itlb_sfsr_write(uint64_t v) |
| { |
| 594,7 → 598,7 |
| /** Read DTLB Synchronous Fault Status Register. |
| * |
| * @return Current content of D-SFSR register. |
| * @return Current content of D-SFSR register. |
| */ |
| static inline uint64_t dtlb_sfsr_read(void) |
| { |
| 603,7 → 607,7 |
| /** Write DTLB Synchronous Fault Status Register. |
| * |
| * @param v New value of D-SFSR register. |
| * @param v New value of D-SFSR register. |
| */ |
| static inline void dtlb_sfsr_write(uint64_t v) |
| { |
| 613,7 → 617,7 |
| /** Read DTLB Synchronous Fault Address Register. |
| * |
| * @return Current content of D-SFAR register. |
| * @return Current content of D-SFAR register. |
| */ |
| static inline uint64_t dtlb_sfar_read(void) |
| { |
| 622,12 → 626,11 |
| /** Perform IMMU TLB Demap Operation. |
| * |
| * @param type |
| * Selects between context and page demap |
| * (and entire MMU demap on US3). |
| * @param type Selects between context and page demap (and entire MMU |
| * demap on US3). |
| * @param context_encoding Specifies which Context register has Context ID for |
| * demap. |
| * @param page Address which is on the page to be demapped. |
| * demap. |
| * @param page Address which is on the page to be demapped. |
| */ |
| static inline void itlb_demap(int type, int context_encoding, uintptr_t page) |
| { |
| 641,20 → 644,19 |
| da.context = context_encoding; |
| da.vpn = pg.vpn; |
| asi_u64_write(ASI_IMMU_DEMAP, da.value, 0); /* da.value is the |
| * address within the |
| * ASI */ |
| /* da.value is the address within the ASI */ |
| asi_u64_write(ASI_IMMU_DEMAP, da.value, 0); |
| flush_pipeline(); |
| } |
| /** Perform DMMU TLB Demap Operation. |
| * |
| * @param type |
| * Selects between context and page demap |
| * (and entire MMU demap on US3). |
| * @param type Selects between context and page demap (and entire MMU |
| * demap on US3). |
| * @param context_encoding Specifies which Context register has Context ID for |
| * demap. |
| * @param page Address which is on the page to be demapped. |
| * demap. |
| * @param page Address which is on the page to be demapped. |
| */ |
| static inline void dtlb_demap(int type, int context_encoding, uintptr_t page) |
| { |
| 668,17 → 670,17 |
| da.context = context_encoding; |
| da.vpn = pg.vpn; |
| asi_u64_write(ASI_DMMU_DEMAP, da.value, 0); /* da.value is the |
| * address within the |
| * ASI */ |
| /* da.value is the address within the ASI */ |
| asi_u64_write(ASI_DMMU_DEMAP, da.value, 0); |
| membar(); |
| } |
| extern void fast_instruction_access_mmu_miss(unative_t unused, istate_t *istate); |
| extern void fast_data_access_mmu_miss(tlb_tag_access_reg_t tag, istate_t *istate); |
| extern void fast_data_access_protection(tlb_tag_access_reg_t tag , istate_t *istate); |
| extern void fast_instruction_access_mmu_miss(unative_t, istate_t *); |
| extern void fast_data_access_mmu_miss(tlb_tag_access_reg_t, istate_t *); |
| extern void fast_data_access_protection(tlb_tag_access_reg_t , istate_t *); |
| extern void dtlb_insert_mapping(uintptr_t page, uintptr_t frame, int pagesize, bool locked, bool cacheable); |
| extern void dtlb_insert_mapping(uintptr_t, uintptr_t, int, bool, bool); |
| extern void dump_sfsr_and_sfar(void); |
| /branches/sparc/kernel/arch/sparc64/include/barrier.h |
|---|
| 82,6 → 82,8 |
| asm volatile ("membar #Sync\n"); |
| } |
| #if defined (US) |
| #define smc_coherence(a) \ |
| { \ |
| write_barrier(); \ |
| 97,6 → 99,22 |
| flush((void *)(a) + i); \ |
| } |
| #elif defined (US3) |
| #define smc_coherence(a) \ |
| { \ |
| write_barrier(); \ |
| flush_pipeline(); \ |
| } |
| #define smc_coherence_block(a, l) \ |
| { \ |
| write_barrier(); \ |
| flush_pipeline(); \ |
| } |
| #endif /* defined(US3) */ |
| #endif |
| /** @} |
| /branches/sparc/kernel/arch/sparc64/src/smp/smp.c |
|---|
| 106,9 → 106,10 |
| waking_up_mid = mid; |
| if (waitq_sleep_timeout(&ap_completion_wq, 1000000, SYNCH_FLAGS_NONE) == ESYNCH_TIMEOUT) |
| printf("%s: waiting for processor (mid = %" PRIu32 ") timed out\n", |
| __func__, mid); |
| if (waitq_sleep_timeout(&ap_completion_wq, 1000000, SYNCH_FLAGS_NONE) == |
| ESYNCH_TIMEOUT) |
| printf("%s: waiting for processor (mid = %" PRIu32 |
| ") timed out\n", __func__, mid); |
| } |
| /** Wake application processors up. */ |
| /branches/sparc/kernel/arch/sparc64/src/console.c |
|---|
| 63,7 → 63,7 |
| /** |
| * Initialize kernel console to use framebuffer and keyboard directly. |
| * Called on UltraSPARC64 machines with standard keyboard and framebuffer. |
| * Called on UltraSPARC machines with standard keyboard and framebuffer. |
| * |
| * @param aliases the "/aliases" OBP node |
| */ |
| /branches/sparc/kernel/arch/sparc64/src/mm/tlb.c |
|---|
| 54,14 → 54,13 |
| #include <arch/mm/tsb.h> |
| #endif |
| static void dtlb_pte_copy(pte_t *t, index_t index, bool ro); |
| static void itlb_pte_copy(pte_t *t, index_t index); |
| static void do_fast_instruction_access_mmu_miss_fault(istate_t *istate, |
| const char *str); |
| static void do_fast_data_access_mmu_miss_fault(istate_t *istate, |
| tlb_tag_access_reg_t tag, const char *str); |
| static void do_fast_data_access_protection_fault(istate_t *istate, |
| tlb_tag_access_reg_t tag, const char *str); |
| static void dtlb_pte_copy(pte_t *, index_t, bool); |
| static void itlb_pte_copy(pte_t *, index_t); |
| static void do_fast_instruction_access_mmu_miss_fault(istate_t *, const char *); |
| static void do_fast_data_access_mmu_miss_fault(istate_t *, tlb_tag_access_reg_t, |
| const char *); |
| static void do_fast_data_access_protection_fault(istate_t *, |
| tlb_tag_access_reg_t, const char *); |
| char *context_encoding[] = { |
| "Primary", |
| 86,11 → 85,11 |
| /** Insert privileged mapping into DMMU TLB. |
| * |
| * @param page Virtual page address. |
| * @param frame Physical frame address. |
| * @param pagesize Page size. |
| * @param locked True for permanent mappings, false otherwise. |
| * @param cacheable True if the mapping is cacheable, false otherwise. |
| * @param page Virtual page address. |
| * @param frame Physical frame address. |
| * @param pagesize Page size. |
| * @param locked True for permanent mappings, false otherwise. |
| * @param cacheable True if the mapping is cacheable, false otherwise. |
| */ |
| void dtlb_insert_mapping(uintptr_t page, uintptr_t frame, int pagesize, |
| bool locked, bool cacheable) |
| 126,10 → 125,10 |
| /** Copy PTE to TLB. |
| * |
| * @param t Page Table Entry to be copied. |
| * @param index Zero if lower 8K-subpage, one if higher 8K-subpage. |
| * @param ro If true, the entry will be created read-only, regardless of its |
| * w field. |
| * @param t Page Table Entry to be copied. |
| * @param index Zero if lower 8K-subpage, one if higher 8K-subpage. |
| * @param ro If true, the entry will be created read-only, regardless |
| * of its w field. |
| */ |
| void dtlb_pte_copy(pte_t *t, index_t index, bool ro) |
| { |
| 165,8 → 164,8 |
| /** Copy PTE to ITLB. |
| * |
| * @param t Page Table Entry to be copied. |
| * @param index Zero if lower 8K-subpage, one if higher 8K-subpage. |
| * @param t Page Table Entry to be copied. |
| * @param index Zero if lower 8K-subpage, one if higher 8K-subpage. |
| */ |
| void itlb_pte_copy(pte_t *t, index_t index) |
| { |
| 235,10 → 234,11 |
| * Note that some faults (e.g. kernel faults) were already resolved by the |
| * low-level, assembly language part of the fast_data_access_mmu_miss handler. |
| * |
| * @param tag Content of the TLB Tag Access register as it existed when the |
| * trap happened. This is to prevent confusion created by clobbered |
| * Tag Access register during a nested DTLB miss. |
| * @param istate Interrupted state saved on the stack. |
| * @param tag Content of the TLB Tag Access register as it existed |
| * when the trap happened. This is to prevent confusion |
| * created by clobbered Tag Access register during a nested |
| * DTLB miss. |
| * @param istate Interrupted state saved on the stack. |
| */ |
| void fast_data_access_mmu_miss(tlb_tag_access_reg_t tag, istate_t *istate) |
| { |
| 287,10 → 287,11 |
| /** DTLB protection fault handler. |
| * |
| * @param tag Content of the TLB Tag Access register as it existed when the |
| * trap happened. This is to prevent confusion created by clobbered |
| * Tag Access register during a nested DTLB miss. |
| * @param istate Interrupted state saved on the stack. |
| * @param tag Content of the TLB Tag Access register as it existed |
| * when the trap happened. This is to prevent confusion |
| * created by clobbered Tag Access register during a nested |
| * DTLB miss. |
| * @param istate Interrupted state saved on the stack. |
| */ |
| void fast_data_access_protection(tlb_tag_access_reg_t tag, istate_t *istate) |
| { |
| 336,9 → 337,9 |
| * The diag field has been left out in order to make this function more generic |
| * (there is no diag field in US3 architeture). |
| * |
| * @param i TLB entry number |
| * @param t TLB entry tag |
| * @param d TLB entry data |
| * @param i TLB entry number |
| * @param t TLB entry tag |
| * @param d TLB entry data |
| */ |
| static void print_tlb_entry(int i, tlb_tag_read_reg_t t, tlb_data_t d) |
| { |
| 473,8 → 474,8 |
| sfsr.ow, sfsr.fv); |
| #elif defined (US3) |
| printf("DTLB SFSR: nf=%d, asi=%#x, tm=%d, ft=%#x, e=%d, ct=%d, pr=%d, " |
| "w=%d, ow=%d, fv=%d\n", sfsr.nf, sfsr.asi, sfsr.tm, sfsr.ft, |
| sfsr.e, sfsr.ct, sfsr.pr, sfsr.w, sfsr.ow, sfsr.fv); |
| "w=%d, ow=%d, fv=%d\n", sfsr.nf, sfsr.asi, sfsr.tm, sfsr.ft, |
| sfsr.e, sfsr.ct, sfsr.pr, sfsr.w, sfsr.ow, sfsr.fv); |
| #endif |
| printf("DTLB SFAR: address=%p\n", sfar); |
| 485,10 → 486,9 |
| #if defined (US3) |
| /** Invalidates given TLB entry if and only if it is non-locked or global. |
| * |
| * @param tlb |
| * TLB number (one of TLB_DSMALL, TLB_DBIG_0, TLB_DBIG_1, |
| * TLB_ISMALL, TLB_IBIG) |
| * @param entry entry index within the given TLB |
| * @param tlb TLB number (one of TLB_DSMALL, TLB_DBIG_0, TLB_DBIG_1, |
| * TLB_ISMALL, TLB_IBIG). |
| * @param entry Entry index within the given TLB. |
| */ |
| static void tlb_invalidate_entry(int tlb, index_t entry) |
| { |
| 596,9 → 596,9 |
| /** Invalidate all ITLB and DTLB entries for specified page range in specified |
| * address space. |
| * |
| * @param asid Address Space ID. |
| * @param page First page which to sweep out from ITLB and DTLB. |
| * @param cnt Number of ITLB and DTLB entries to invalidate. |
| * @param asid Address Space ID. |
| * @param page First page which to sweep out from ITLB and DTLB. |
| * @param cnt Number of ITLB and DTLB entries to invalidate. |
| */ |
| void tlb_invalidate_pages(asid_t asid, uintptr_t page, count_t cnt) |
| { |
| /branches/sparc/kernel/arch/sparc64/src/mm/as.c |
|---|
| 174,7 → 174,7 |
| * to have separate TSBs for primary, secondary and nucleus contexts. |
| * Clearing the extension registers will ensure that the value of the |
| * TSB Base register will be used as an address of TSB, making the code |
| * compatible with the US port. |
| * compatible with the US port. |
| */ |
| itsb_primary_extension_write(0); |
| itsb_nucleus_extension_write(0); |
| /branches/sparc/kernel/arch/sparc64/src/mm/tsb.c |
|---|
| 173,3 → 173,4 |
| /** @} |
| */ |
| /branches/sparc/kernel/arch/sparc64/src/mm/page.c |
|---|
| 165,4 → 165,5 |
| } |
| /** @} |
| */ |
| */ |
| /branches/sparc/kernel/arch/sparc64/src/drivers/kbd.c |
|---|
| 86,21 → 86,20 |
| */ |
| uint32_t interrupts; |
| prop = ofw_tree_getprop(node, "interrupts"); |
| if (!prop || !prop->value) |
| if ((!prop) || (!prop->value)) |
| panic("Can't find \"interrupts\" property.\n"); |
| interrupts = *((uint32_t *) prop->value); |
| /* |
| * Read 'reg' property. |
| */ |
| prop = ofw_tree_getprop(node, "reg"); |
| if (!prop || !prop->value) |
| if ((!prop) || (!prop->value)) |
| panic("Can't find \"reg\" property.\n"); |
| uintptr_t pa; |
| size_t size; |
| inr_t inr; |
| devno_t devno = device_assign_devno(); |
| switch (kbd_type) { |
| case KBD_Z8530: |
| 132,9 → 131,9 |
| return; |
| }; |
| break; |
| default: |
| panic("Unexpected type.\n"); |
| panic("Unexpected keyboard type.\n"); |
| } |
| /* |
| 145,17 → 144,18 |
| */ |
| aligned_addr = ALIGN_DOWN(pa, PAGE_SIZE); |
| offset = pa - aligned_addr; |
| uintptr_t vaddr = hw_map(aligned_addr, offset + size) + offset; |
| switch (kbd_type) { |
| #ifdef CONFIG_Z8530 |
| case KBD_Z8530: |
| z8530_init(devno, vaddr, inr, cir, cir_arg); |
| z8530_init(device_assign_devno(), |
| hw_map(aligned_addr, offset + size) + offset, inr, cir, cir_arg); |
| break; |
| #endif |
| #ifdef CONFIG_NS16550 |
| case KBD_NS16550: |
| ns16550_init(devno, (ioport_t)vaddr, inr, cir, cir_arg); |
| ns16550_init(device_assign_devno(), |
| (ioport_t) (hw_map(aligned_addr, offset + size) + offset), inr, cir, cir_arg); |
| break; |
| #endif |
| default: |
| /branches/sparc/kernel/arch/sparc64/src/drivers/scr.c |
|---|
| 55,6 → 55,10 |
| void scr_init(ofw_tree_node_t *node) |
| { |
| ofw_tree_property_t *prop; |
| ofw_pci_reg_t *pci_reg; |
| ofw_pci_reg_t pci_abs_reg; |
| ofw_upa_reg_t *upa_reg; |
| ofw_sbus_reg_t *sbus_reg; |
| const char *name; |
| name = ofw_tree_node_name(node); |
| 74,6 → 78,7 |
| } |
| uintptr_t fb_addr; |
| unsigned int fb_offset = 0; |
| uint32_t fb_width = 0; |
| uint32_t fb_height = 0; |
| uint32_t fb_depth = 0; |
| 108,15 → 113,15 |
| return; |
| } |
| ofw_pci_reg_t *fb_reg = &((ofw_pci_reg_t *) prop->value)[1]; |
| ofw_pci_reg_t abs_reg; |
| pci_reg = &((ofw_pci_reg_t *) prop->value)[1]; |
| if (!ofw_pci_reg_absolutize(node, fb_reg, &abs_reg)) { |
| if (!ofw_pci_reg_absolutize(node, pci_reg, &pci_abs_reg)) { |
| printf("Failed to absolutize fb register.\n"); |
| return; |
| } |
| if (!ofw_pci_apply_ranges(node->parent, &abs_reg , &fb_addr)) { |
| if (!ofw_pci_apply_ranges(node->parent, &pci_abs_reg, |
| &fb_addr)) { |
| printf("Failed to determine screen address.\n"); |
| return; |
| } |
| 145,29 → 150,30 |
| break; |
| case SCR_XVR: |
| { |
| if (prop->size / sizeof(ofw_pci_reg_t) < 2) { |
| printf("Too few screen registers.\n"); |
| return; |
| } |
| ofw_pci_reg_t *fb_reg = &((ofw_pci_reg_t *) prop->value)[1]; |
| ofw_pci_reg_t abs_reg; |
| pci_reg = &((ofw_pci_reg_t *) prop->value)[1]; |
| if (!ofw_pci_reg_absolutize(node, fb_reg, &abs_reg)) { |
| if (!ofw_pci_reg_absolutize(node, pci_reg, &pci_abs_reg)) { |
| printf("Failed to absolutize fb register.\n"); |
| return; |
| } |
| if (!ofw_pci_apply_ranges(node->parent, &abs_reg , &fb_addr)) { |
| if (!ofw_pci_apply_ranges(node->parent, &pci_abs_reg, |
| &fb_addr)) { |
| printf("Failed to determine screen address.\n"); |
| return; |
| } |
| fb_offset = 4 * 0x2000; |
| switch (fb_depth) { |
| case 8: |
| fb_scanline = fb_linebytes * (fb_depth >> 3); |
| visual = VISUAL_SB1500_PALETTE; |
| visual = VISUAL_INDIRECT_8; |
| break; |
| case 16: |
| fb_scanline = fb_linebytes * (fb_depth >> 3); |
| 187,13 → 193,12 |
| } |
| break; |
| } |
| case SCR_FFB: |
| fb_scanline = 8192; |
| visual = VISUAL_BGR_0_8_8_8; |
| ofw_upa_reg_t *reg = &((ofw_upa_reg_t *) prop->value)[FFB_REG_24BPP]; |
| if (!ofw_upa_apply_ranges(node->parent, reg, &fb_addr)) { |
| upa_reg = &((ofw_upa_reg_t *) prop->value)[FFB_REG_24BPP]; |
| if (!ofw_upa_apply_ranges(node->parent, upa_reg, &fb_addr)) { |
| printf("Failed to determine screen address.\n"); |
| return; |
| } |
| 210,8 → 215,8 |
| return; |
| } |
| ofw_sbus_reg_t *cg6_reg = &((ofw_sbus_reg_t *) prop->value)[0]; |
| if (!ofw_sbus_apply_ranges(node->parent, cg6_reg, &fb_addr)) { |
| sbus_reg = &((ofw_sbus_reg_t *) prop->value)[0]; |
| if (!ofw_sbus_apply_ranges(node->parent, sbus_reg, &fb_addr)) { |
| printf("Failed to determine screen address.\n"); |
| return; |
| } |
| 221,13 → 226,14 |
| panic("Unexpected type.\n"); |
| } |
| fb_properties_t props; |
| props.addr = fb_addr; |
| props.fb_start = 0; |
| props.x = fb_width; |
| props.y = fb_height; |
| props.scan = fb_scanline; |
| props.visual = visual; |
| fb_properties_t props = { |
| .addr = fb_addr, |
| .offset = fb_offset, |
| .x = fb_width, |
| .y = fb_height, |
| .scan = fb_scanline, |
| .visual = visual, |
| }; |
| fb_init(&props); |
| } |
| /branches/sparc/kernel/arch/sparc64/src/drivers/tick.c |
|---|
| 50,6 → 50,7 |
| { |
| /* initialize TICK interrupt */ |
| tick_compare_reg_t compare; |
| interrupt_register(14, "tick_int", tick_interrupt); |
| compare.int_dis = false; |
| compare.tick_cmpr = CPU->arch.clock_frequency / HZ; |
| 80,7 → 81,6 |
| */ |
| void tick_interrupt(int n, istate_t *istate) |
| { |
| softint_reg_t softint, clear; |
| uint64_t drift; |
| /branches/sparc/kernel/arch/ia64/src/ski/ski.c |
|---|
| 229,6 → 229,8 |
| sysinfo_set_item_val("kbd.inr", NULL, SKI_KBD_INR); |
| sysinfo_set_item_val("kbd.devno", NULL, ski_kbd_devno); |
| sysinfo_set_item_val("kbd.type", NULL, KBD_SKI); |
| sysinfo_set_item_val("fb", NULL, false); |
| } |
| void ski_kbd_grab(void) |
| /branches/sparc/kernel/arch/arm32/src/arm32.c |
|---|
| 86,7 → 86,15 |
| console_init(device_assign_devno()); |
| #ifdef CONFIG_FB |
| fb_init(machine_get_fb_address(), 640, 480, 1920, VISUAL_RGB_8_8_8); |
| fb_properties_t prop = { |
| .addr = machine_get_fb_address(), |
| .offset = 0, |
| .x = 640, |
| .y = 480, |
| .scan = 1920, |
| .visual = VISUAL_RGB_8_8_8, |
| }; |
| fb_init(&prop); |
| #endif |
| } |
| /branches/sparc/kernel/arch/arm32/src/mm/tlb.c |
|---|
| 81,7 → 81,7 |
| * @param page Address of the first page whose entry is to be invalidated. |
| * @param cnt Number of entries to invalidate. |
| */ |
| void tlb_invalidate_pages(asid_t asid, uintptr_t page, count_t cnt) |
| void tlb_invalidate_pages(asid_t asid __attribute__((unused)), uintptr_t page, count_t cnt) |
| { |
| unsigned int i; |
| /branches/sparc/kernel/arch/ppc32/src/ppc32.c |
|---|
| 94,7 → 94,15 |
| default: |
| panic("Unsupported bits per pixel"); |
| } |
| fb_init(bootinfo.screen.addr, bootinfo.screen.width, bootinfo.screen.height, bootinfo.screen.scanline, visual); |
| fb_properties_t prop = { |
| .addr = bootinfo.screen.addr, |
| .offset = 0, |
| .x = bootinfo.screen.width, |
| .y = bootinfo.screen.height, |
| .scan = bootinfo.screen.scanline, |
| .visual = visual, |
| }; |
| fb_init(&prop); |
| /* Initialize IRQ routing */ |
| irq_init(IRQ_COUNT, IRQ_COUNT); |
| 103,7 → 111,8 |
| pic_init(bootinfo.keyboard.addr, PAGE_SIZE); |
| /* Initialize I/O controller */ |
| cuda_init(device_assign_devno(), bootinfo.keyboard.addr + 0x16000, 2 * PAGE_SIZE); |
| cuda_init(device_assign_devno(), |
| bootinfo.keyboard.addr + 0x16000, 2 * PAGE_SIZE); |
| /* Merge all zones to 1 big zone */ |
| zone_merge_all(); |
| 128,7 → 137,10 |
| void userspace(uspace_arg_t *kernel_uarg) |
| { |
| userspace_asm((uintptr_t) kernel_uarg->uspace_uarg, (uintptr_t) kernel_uarg->uspace_stack + THREAD_STACK_SIZE - SP_DELTA, (uintptr_t) kernel_uarg->uspace_entry); |
| userspace_asm((uintptr_t) kernel_uarg->uspace_uarg, |
| (uintptr_t) kernel_uarg->uspace_stack + |
| THREAD_STACK_SIZE - SP_DELTA, |
| (uintptr_t) kernel_uarg->uspace_entry); |
| /* Unreachable */ |
| for (;;) |
| /branches/sparc/kernel/arch/ia32xen/src/mm/tlb.c |
|---|
| 63,7 → 63,7 |
| * @param page Address of the first page whose entry is to be invalidated. |
| * @param cnt Number of entries to invalidate. |
| */ |
| void tlb_invalidate_pages(asid_t asid, uintptr_t page, count_t cnt) |
| void tlb_invalidate_pages(asid_t asid __attribute__((unused)), uintptr_t page, count_t cnt) |
| { |
| unsigned int i; |
| /branches/sparc/kernel/arch/amd64/include/drivers/i8254.h |
|---|
| File deleted |
| \ No newline at end of file |
| Property changes: |
| Deleted: svn:special |
| -* |
| \ No newline at end of property |
| /branches/sparc/kernel/arch/amd64/include/drivers/ega.h |
|---|
| File deleted |
| \ No newline at end of file |
| Property changes: |
| Deleted: svn:special |
| -* |
| \ No newline at end of property |
| /branches/sparc/kernel/arch/amd64/include/drivers/vesa.h |
|---|
| File deleted |
| /branches/sparc/kernel/arch/amd64/include/drivers/i8259.h |
|---|
| File deleted |
| \ No newline at end of file |
| Property changes: |
| Deleted: svn:special |
| -* |
| \ No newline at end of property |
| /branches/sparc/kernel/arch/amd64/include/drivers/i8042.h |
|---|
| File deleted |
| \ No newline at end of file |
| Property changes: |
| Deleted: svn:special |
| -* |
| \ No newline at end of property |
| /branches/sparc/kernel/arch/amd64/src/amd64.c |
|---|
| 210,6 → 210,7 |
| { |
| i8042_grab(); |
| } |
| /** Return console to userspace |
| * |
| */ |
| /branches/sparc/kernel/arch/amd64/src/debugger.c |
|---|
| 54,6 → 54,8 |
| static bpinfo_t breakpoints[BKPOINTS_MAX]; |
| SPINLOCK_INITIALIZE(bkpoint_lock); |
| #ifdef CONFIG_KCONSOLE |
| static int cmd_print_breakpoints(cmd_arg_t *argv); |
| static cmd_info_t bkpts_info = { |
| .name = "bkpts", |
| 99,44 → 101,9 |
| .argv = &addw_argv |
| }; |
| #endif |
| #endif /* CONFIG_DEBUG_AS_WATCHPOINT */ |
| #endif /* CONFIG_KCONSOLE */ |
| /** Print table of active breakpoints */ |
| int cmd_print_breakpoints(cmd_arg_t *argv __attribute__((unused))) |
| { |
| unsigned int i; |
| char *symbol; |
| #ifdef __32_BITS__ |
| printf("# Count Address In symbol\n"); |
| printf("-- ----- ---------- ---------\n"); |
| #endif |
| #ifdef __64_BITS__ |
| printf("# Count Address In symbol\n"); |
| printf("-- ----- ------------------ ---------\n"); |
| #endif |
| for (i = 0; i < BKPOINTS_MAX; i++) |
| if (breakpoints[i].address) { |
| symbol = get_symtab_entry(breakpoints[i].address); |
| #ifdef __32_BITS__ |
| printf("%-2u %-5d %#10zx %s\n", i, |
| breakpoints[i].counter, breakpoints[i].address, |
| symbol); |
| #endif |
| #ifdef __64_BITS__ |
| printf("%-2u %-5d %#18zx %s\n", i, |
| breakpoints[i].counter, breakpoints[i].address, |
| symbol); |
| #endif |
| } |
| return 1; |
| } |
| /* Setup DR register according to table */ |
| static void setup_dr(int curidx) |
| { |
| 267,10 → 234,12 |
| } |
| printf("Reached breakpoint %d:%lx(%s)\n", slot, getip(istate), |
| get_symtab_entry(getip(istate))); |
| printf("***Type 'exit' to exit kconsole.\n"); |
| atomic_set(&haltstate,1); |
| kconsole((void *) "debug"); |
| atomic_set(&haltstate,0); |
| #ifdef CONFIG_KCONSOLE |
| atomic_set(&haltstate, 1); |
| kconsole("debug", "Debug console ready (type 'exit' to continue)\n", false); |
| atomic_set(&haltstate, 0); |
| #endif |
| } |
| void breakpoint_del(int slot) |
| 299,42 → 268,8 |
| #endif |
| } |
| #ifndef CONFIG_DEBUG_AS_WATCHPOINT |
| /** Remove breakpoint from table */ |
| int cmd_del_breakpoint(cmd_arg_t *argv) |
| { |
| unative_t bpno = argv->intval; |
| if (bpno > BKPOINTS_MAX) { |
| printf("Invalid breakpoint number.\n"); |
| return 0; |
| } |
| breakpoint_del(argv->intval); |
| return 1; |
| } |
| /** Add new breakpoint to table */ |
| static int cmd_add_breakpoint(cmd_arg_t *argv) |
| { |
| int flags; |
| int id; |
| if (argv == &add_argv) { |
| flags = BKPOINT_INSTR; |
| } else { /* addwatchp */ |
| flags = BKPOINT_WRITE; |
| } |
| printf("Adding breakpoint on address: %p\n", argv->intval); |
| id = breakpoint_add((void *)argv->intval, flags, -1); |
| if (id < 0) |
| printf("Add breakpoint failed.\n"); |
| else |
| printf("Added breakpoint %d.\n", id); |
| return 1; |
| } |
| #endif |
| static void debug_exception(int n __attribute__((unused)), istate_t *istate) |
| { |
| unative_t dr6; |
| 379,24 → 314,26 |
| for (i = 0; i < BKPOINTS_MAX; i++) |
| breakpoints[i].address = NULL; |
| #ifdef CONFIG_KCONSOLE |
| cmd_initialize(&bkpts_info); |
| if (!cmd_register(&bkpts_info)) |
| panic("could not register command %s\n", bkpts_info.name); |
| printf("Cannot register command %s\n", bkpts_info.name); |
| #ifndef CONFIG_DEBUG_AS_WATCHPOINT |
| cmd_initialize(&delbkpt_info); |
| if (!cmd_register(&delbkpt_info)) |
| panic("could not register command %s\n", delbkpt_info.name); |
| printf("Cannot register command %s\n", delbkpt_info.name); |
| cmd_initialize(&addbkpt_info); |
| if (!cmd_register(&addbkpt_info)) |
| panic("could not register command %s\n", addbkpt_info.name); |
| printf("Cannot register command %s\n", addbkpt_info.name); |
| cmd_initialize(&addwatchp_info); |
| if (!cmd_register(&addwatchp_info)) |
| panic("could not register command %s\n", addwatchp_info.name); |
| #endif |
| printf("Cannot register command %s\n", addwatchp_info.name); |
| #endif /* CONFIG_DEBUG_AS_WATCHPOINT */ |
| #endif /* CONFIG_KCONSOLE */ |
| exc_register(VECTOR_DEBUG, "debugger", debug_exception); |
| #ifdef CONFIG_SMP |
| 404,5 → 341,79 |
| #endif |
| } |
| #ifdef CONFIG_KCONSOLE |
| /** Print table of active breakpoints */ |
| int cmd_print_breakpoints(cmd_arg_t *argv __attribute__((unused))) |
| { |
| unsigned int i; |
| char *symbol; |
| #ifdef __32_BITS__ |
| printf("# Count Address In symbol\n"); |
| printf("-- ----- ---------- ---------\n"); |
| #endif |
| #ifdef __64_BITS__ |
| printf("# Count Address In symbol\n"); |
| printf("-- ----- ------------------ ---------\n"); |
| #endif |
| for (i = 0; i < BKPOINTS_MAX; i++) |
| if (breakpoints[i].address) { |
| symbol = get_symtab_entry(breakpoints[i].address); |
| #ifdef __32_BITS__ |
| printf("%-2u %-5d %#10zx %s\n", i, |
| breakpoints[i].counter, breakpoints[i].address, |
| symbol); |
| #endif |
| #ifdef __64_BITS__ |
| printf("%-2u %-5d %#18zx %s\n", i, |
| breakpoints[i].counter, breakpoints[i].address, |
| symbol); |
| #endif |
| } |
| return 1; |
| } |
| #ifndef CONFIG_DEBUG_AS_WATCHPOINT |
| /** Remove breakpoint from table */ |
| int cmd_del_breakpoint(cmd_arg_t *argv) |
| { |
| unative_t bpno = argv->intval; |
| if (bpno > BKPOINTS_MAX) { |
| printf("Invalid breakpoint number.\n"); |
| return 0; |
| } |
| breakpoint_del(argv->intval); |
| return 1; |
| } |
| /** Add new breakpoint to table */ |
| static int cmd_add_breakpoint(cmd_arg_t *argv) |
| { |
| int flags; |
| int id; |
| if (argv == &add_argv) { |
| flags = BKPOINT_INSTR; |
| } else { /* addwatchp */ |
| flags = BKPOINT_WRITE; |
| } |
| printf("Adding breakpoint on address: %p\n", argv->intval); |
| id = breakpoint_add((void *)argv->intval, flags, -1); |
| if (id < 0) |
| printf("Add breakpoint failed.\n"); |
| else |
| printf("Added breakpoint %d.\n", id); |
| return 1; |
| } |
| #endif /* CONFIG_DEBUG_AS_WATCHPOINT */ |
| #endif /* CONFIG_KCONSOLE */ |
| /** @} |
| */ |
| /branches/sparc/kernel/arch/mips32/include/mm/asid.h |
|---|
| 37,7 → 37,7 |
| #include <arch/types.h> |
| #define ASID_MAX_ARCH 255 /* 2^8 - 1 */ |
| #define ASID_MAX_ARCH 255 /* 2^8 - 1 */ |
| typedef uint8_t asid_t; |
| /branches/sparc/kernel/arch/mips32/src/exception.c |
|---|
| 45,7 → 45,6 |
| #include <print.h> |
| #include <interrupt.h> |
| #include <func.h> |
| #include <console/kconsole.h> |
| #include <ddi/irq.h> |
| #include <arch/debugger.h> |
| /branches/sparc/kernel/arch/mips32/src/cpu/cpu.c |
|---|
| 48,7 → 48,7 |
| { "MIPS", "R2000" }, /* 0x01 */ |
| { "MIPS", "R3000" }, /* 0x02 */ |
| { "MIPS", "R6000" }, /* 0x03 */ |
| { "MIPS", " R4000/R4400" }, /* 0x04 */ |
| { "MIPS", "R4000/R4400" }, /* 0x04 */ |
| { "LSI Logic", "R3000" }, /* 0x05 */ |
| { "MIPS", "R6000A" }, /* 0x06 */ |
| { "IDT", "3051/3052" }, /* 0x07 */ |
| 123,9 → 123,9 |
| data = &imp_data[m->arch.imp_num]; |
| } |
| printf("cpu%d: %s %s (rev=%d.%d, imp=%d)\n", |
| printf("cpu%u: %s %s (rev=%d.%d, imp=%d)\n", |
| m->id, data->vendor, data->model, m->arch.rev_num >> 4, |
| m->arch.rev_num & 0xf, m->arch.imp_num); |
| m->arch.rev_num & 0x0f, m->arch.imp_num); |
| } |
| /** @} |
| /branches/sparc/kernel/arch/mips32/src/mips32.c |
|---|
| 126,7 → 126,15 |
| console_init(device_assign_devno()); |
| #ifdef CONFIG_FB |
| /* GXemul framebuffer */ |
| fb_init(0x12000000, 640, 480, 1920, VISUAL_RGB_8_8_8); |
| fb_properties_t gxemul_prop = { |
| .addr = 0x12000000, |
| .offset = 0, |
| .x = 640, |
| .y = 480, |
| .scan = 1920, |
| .visual = VISUAL_RGB_8_8_8, |
| }; |
| fb_init(&gxemul_prop); |
| #endif |
| sysinfo_set_item_val("machine." STRING(MACHINE), NULL, 1); |
| } |
| /branches/sparc/kernel/arch/mips32/src/debugger.c |
|---|
| 47,6 → 47,8 |
| bpinfo_t breakpoints[BKPOINTS_MAX]; |
| SPINLOCK_INITIALIZE(bkpoint_lock); |
| #ifdef CONFIG_KCONSOLE |
| static int cmd_print_breakpoints(cmd_arg_t *argv); |
| static cmd_info_t bkpts_info = { |
| .name = "bkpts", |
| 123,10 → 125,12 |
| {0, 0} /* EndOfTable */ |
| }; |
| /** Test, if the given instruction is a jump or branch instruction |
| * |
| * @param instr Instruction code |
| * @return true - it is jump instruction, false otherwise |
| * |
| */ |
| static bool is_jump(unative_t instr) |
| { |
| 267,6 → 271,8 |
| return 1; |
| } |
| #endif |
| /** Initialize debugger */ |
| void debugger_init() |
| { |
| 274,22 → 280,24 |
| for (i = 0; i < BKPOINTS_MAX; i++) |
| breakpoints[i].address = NULL; |
| #ifdef CONFIG_KCONSOLE |
| cmd_initialize(&bkpts_info); |
| if (!cmd_register(&bkpts_info)) |
| panic("could not register command %s\n", bkpts_info.name); |
| printf("Cannot register command %s\n", bkpts_info.name); |
| cmd_initialize(&delbkpt_info); |
| if (!cmd_register(&delbkpt_info)) |
| panic("could not register command %s\n", delbkpt_info.name); |
| printf("Cannot register command %s\n", delbkpt_info.name); |
| cmd_initialize(&addbkpt_info); |
| if (!cmd_register(&addbkpt_info)) |
| panic("could not register command %s\n", addbkpt_info.name); |
| printf("Cannot register command %s\n", addbkpt_info.name); |
| cmd_initialize(&addbkpte_info); |
| if (!cmd_register(&addbkpte_info)) |
| panic("could not register command %s\n", addbkpte_info.name); |
| printf("Cannot register command %s\n", addbkpte_info.name); |
| #endif |
| } |
| /** Handle breakpoint |
| 367,19 → 375,20 |
| if (cur->bkfunc) |
| cur->bkfunc(cur, istate); |
| } else { |
| printf("***Type 'exit' to exit kconsole.\n"); |
| #ifdef CONFIG_KCONSOLE |
| /* This disables all other processors - we are not SMP, |
| * actually this gets us to cpu_halt, if scheduler() is run |
| * - we generally do not want scheduler to be run from debug, |
| * so this is a good idea |
| */ |
| atomic_set(&haltstate,1); |
| atomic_set(&haltstate, 1); |
| spinlock_unlock(&bkpoint_lock); |
| kconsole("debug"); |
| kconsole("debug", "Debug console ready (type 'exit' to continue)\n", false); |
| spinlock_lock(&bkpoint_lock); |
| atomic_set(&haltstate,0); |
| atomic_set(&haltstate, 0); |
| #endif |
| } |
| if (cur && cur->address == fireaddr && (cur->flags & BKPOINT_INPROG)) { |
| /* Remove one-shot breakpoint */ |
| /branches/sparc/kernel/arch/ia32/include/mm/as.h |
|---|
| 42,7 → 42,7 |
| #define USER_ADDRESS_SPACE_START_ARCH ((unsigned long) 0x00000000) |
| #define USER_ADDRESS_SPACE_END_ARCH ((unsigned long) 0x7fffffff) |
| #define USTACK_ADDRESS_ARCH (USER_ADDRESS_SPACE_END_ARCH-(PAGE_SIZE-1)) |
| #define USTACK_ADDRESS_ARCH (USER_ADDRESS_SPACE_END_ARCH - (PAGE_SIZE - 1)) |
| typedef struct { |
| } as_arch_t; |
| /branches/sparc/kernel/arch/ia32/include/cpu.h |
|---|
| 51,10 → 51,10 |
| #include <arch/asm.h> |
| typedef struct { |
| int vendor; |
| int family; |
| int model; |
| int stepping; |
| unsigned int vendor; |
| unsigned int family; |
| unsigned int model; |
| unsigned int stepping; |
| struct tss *tss; |
| count_t iomapver_copy; /** Copy of TASK's I/O Permission bitmap generation count. */ |
| /branches/sparc/kernel/arch/ia32/include/drivers/ega.h |
|---|
| 40,6 → 40,7 |
| #define ROWS 25 |
| #define SCREEN (ROW * ROWS) |
| extern void ega_redraw(void); |
| extern void ega_init(void); |
| #endif |
| /branches/sparc/kernel/arch/ia32/include/drivers/vesa.h |
|---|
| 36,6 → 36,7 |
| #define KERN_ia32_VESA_H_ |
| extern int vesa_present(void); |
| extern void vesa_redraw(void); |
| extern void vesa_init(void); |
| #endif |
| /branches/sparc/kernel/arch/ia32/src/ia32.c |
|---|
| 93,7 → 93,7 |
| vesa_init(); |
| else |
| #endif |
| ega_init(); /* video */ |
| ega_init(); /* video */ |
| /* Enable debugger */ |
| debugger_init(); |
| 159,8 → 159,15 |
| */ |
| void arch_grab_console(void) |
| { |
| #ifdef CONFIG_FB |
| vesa_redraw(); |
| #else |
| ega_redraw(); |
| #endif |
| i8042_grab(); |
| } |
| /** Return console to userspace |
| * |
| */ |
| /branches/sparc/kernel/arch/ia32/src/cpu/cpu.c |
|---|
| 65,8 → 65,8 |
| static char *vendor_str[] = { |
| "Unknown Vendor", |
| "AuthenticAMD", |
| "GenuineIntel" |
| "AMD", |
| "Intel" |
| }; |
| void fpu_disable(void) |
| 77,7 → 77,7 |
| "mov %%eax,%%cr0;" |
| : |
| : |
| :"%eax" |
| : "%eax" |
| ); |
| } |
| 89,7 → 89,7 |
| "mov %%eax,%%cr0;" |
| : |
| : |
| :"%eax" |
| : "%eax" |
| ); |
| } |
| 140,29 → 140,31 |
| /* |
| * Check for AMD processor. |
| */ |
| if (info.cpuid_ebx==AMD_CPUID_EBX && info.cpuid_ecx==AMD_CPUID_ECX && info.cpuid_edx==AMD_CPUID_EDX) { |
| if ((info.cpuid_ebx == AMD_CPUID_EBX) |
| && (info.cpuid_ecx == AMD_CPUID_ECX) |
| && (info.cpuid_edx == AMD_CPUID_EDX)) |
| CPU->arch.vendor = VendorAMD; |
| } |
| /* |
| * Check for Intel processor. |
| */ |
| if (info.cpuid_ebx==INTEL_CPUID_EBX && info.cpuid_ecx==INTEL_CPUID_ECX && info.cpuid_edx==INTEL_CPUID_EDX) { |
| if ((info.cpuid_ebx == INTEL_CPUID_EBX) |
| && (info.cpuid_ecx == INTEL_CPUID_ECX) |
| && (info.cpuid_edx == INTEL_CPUID_EDX)) |
| CPU->arch.vendor = VendorIntel; |
| } |
| cpuid(1, &info); |
| CPU->arch.family = (info.cpuid_eax>>8)&0xf; |
| CPU->arch.model = (info.cpuid_eax>>4)&0xf; |
| CPU->arch.stepping = (info.cpuid_eax>>0)&0xf; |
| CPU->arch.family = (info.cpuid_eax >> 8) & 0x0f; |
| CPU->arch.model = (info.cpuid_eax >> 4) & 0x0f; |
| CPU->arch.stepping = (info.cpuid_eax >> 0) & 0x0f; |
| } |
| } |
| void cpu_print_report(cpu_t* m) |
| void cpu_print_report(cpu_t* cpu) |
| { |
| printf("cpu%d: (%s family=%d model=%d stepping=%d) %dMHz\n", |
| m->id, vendor_str[m->arch.vendor], m->arch.family, m->arch.model, m->arch.stepping, |
| m->frequency_mhz); |
| printf("cpu%u: (%s family=%u model=%u stepping=%u) %" PRIu16 " MHz\n", |
| cpu->id, vendor_str[cpu->arch.vendor], cpu->arch.family, |
| cpu->arch.model, cpu->arch.stepping, cpu->frequency_mhz); |
| } |
| /** @} |
| /branches/sparc/kernel/arch/ia32/src/boot/vga323.pal |
|---|
| 1,256 → 1,256 |
| .byte 0x3f, 0x3f, 0x3f, 0x00 |
| .byte 0x36, 0x3f, 0x3f, 0x00 |
| .byte 0x2d, 0x3f, 0x3f, 0x00 |
| .byte 0x24, 0x3f, 0x3f, 0x00 |
| .byte 0x1b, 0x3f, 0x3f, 0x00 |
| .byte 0x12, 0x3f, 0x3f, 0x00 |
| .byte 0x09, 0x3f, 0x3f, 0x00 |
| .byte 0x00, 0x3f, 0x3f, 0x00 |
| .byte 0x3f, 0x2a, 0x3f, 0x00 |
| .byte 0x36, 0x2a, 0x3f, 0x00 |
| .byte 0x2d, 0x2a, 0x3f, 0x00 |
| .byte 0x24, 0x2a, 0x3f, 0x00 |
| .byte 0x1b, 0x2a, 0x3f, 0x00 |
| .byte 0x12, 0x2a, 0x3f, 0x00 |
| .byte 0x09, 0x2a, 0x3f, 0x00 |
| .byte 0x00, 0x2a, 0x3f, 0x00 |
| .byte 0x3f, 0x15, 0x3f, 0x00 |
| .byte 0x36, 0x15, 0x3f, 0x00 |
| .byte 0x2d, 0x15, 0x3f, 0x00 |
| .byte 0x24, 0x15, 0x3f, 0x00 |
| .byte 0x1b, 0x15, 0x3f, 0x00 |
| .byte 0x12, 0x15, 0x3f, 0x00 |
| .byte 0x09, 0x15, 0x3f, 0x00 |
| .byte 0x00, 0x15, 0x3f, 0x00 |
| .byte 0x3f, 0x00, 0x3f, 0x00 |
| .byte 0x36, 0x00, 0x3f, 0x00 |
| .byte 0x2d, 0x00, 0x3f, 0x00 |
| .byte 0x24, 0x00, 0x3f, 0x00 |
| .byte 0x1b, 0x00, 0x3f, 0x00 |
| .byte 0x12, 0x00, 0x3f, 0x00 |
| .byte 0x09, 0x00, 0x3f, 0x00 |
| .byte 0x00, 0x00, 0x3f, 0x00 |
| .byte 0x3f, 0x3f, 0x36, 0x00 |
| .byte 0x36, 0x3f, 0x36, 0x00 |
| .byte 0x2d, 0x3f, 0x36, 0x00 |
| .byte 0x24, 0x3f, 0x36, 0x00 |
| .byte 0x1b, 0x3f, 0x36, 0x00 |
| .byte 0x12, 0x3f, 0x36, 0x00 |
| .byte 0x09, 0x3f, 0x36, 0x00 |
| .byte 0x00, 0x3f, 0x36, 0x00 |
| .byte 0x3f, 0x2a, 0x36, 0x00 |
| .byte 0x36, 0x2a, 0x36, 0x00 |
| .byte 0x2d, 0x2a, 0x36, 0x00 |
| .byte 0x24, 0x2a, 0x36, 0x00 |
| .byte 0x1b, 0x2a, 0x36, 0x00 |
| .byte 0x12, 0x2a, 0x36, 0x00 |
| .byte 0x09, 0x2a, 0x36, 0x00 |
| .byte 0x00, 0x2a, 0x36, 0x00 |
| .byte 0x3f, 0x15, 0x36, 0x00 |
| .byte 0x36, 0x15, 0x36, 0x00 |
| .byte 0x2d, 0x15, 0x36, 0x00 |
| .byte 0x24, 0x15, 0x36, 0x00 |
| .byte 0x1b, 0x15, 0x36, 0x00 |
| .byte 0x12, 0x15, 0x36, 0x00 |
| .byte 0x09, 0x15, 0x36, 0x00 |
| .byte 0x00, 0x15, 0x36, 0x00 |
| .byte 0x3f, 0x00, 0x36, 0x00 |
| .byte 0x36, 0x00, 0x36, 0x00 |
| .byte 0x2d, 0x00, 0x36, 0x00 |
| .byte 0x24, 0x00, 0x36, 0x00 |
| .byte 0x1b, 0x00, 0x36, 0x00 |
| .byte 0x12, 0x00, 0x36, 0x00 |
| .byte 0x09, 0x00, 0x36, 0x00 |
| .byte 0x00, 0x00, 0x36, 0x00 |
| .byte 0x3f, 0x3f, 0x2d, 0x00 |
| .byte 0x36, 0x3f, 0x2d, 0x00 |
| .byte 0x2d, 0x3f, 0x2d, 0x00 |
| .byte 0x24, 0x3f, 0x2d, 0x00 |
| .byte 0x1b, 0x3f, 0x2d, 0x00 |
| .byte 0x12, 0x3f, 0x2d, 0x00 |
| .byte 0x09, 0x3f, 0x2d, 0x00 |
| .byte 0x00, 0x3f, 0x2d, 0x00 |
| .byte 0x3f, 0x2a, 0x2d, 0x00 |
| .byte 0x36, 0x2a, 0x2d, 0x00 |
| .byte 0x2d, 0x2a, 0x2d, 0x00 |
| .byte 0x24, 0x2a, 0x2d, 0x00 |
| .byte 0x1b, 0x2a, 0x2d, 0x00 |
| .byte 0x12, 0x2a, 0x2d, 0x00 |
| .byte 0x09, 0x2a, 0x2d, 0x00 |
| .byte 0x00, 0x2a, 0x2d, 0x00 |
| .byte 0x3f, 0x15, 0x2d, 0x00 |
| .byte 0x36, 0x15, 0x2d, 0x00 |
| .byte 0x2d, 0x15, 0x2d, 0x00 |
| .byte 0x24, 0x15, 0x2d, 0x00 |
| .byte 0x1b, 0x15, 0x2d, 0x00 |
| .byte 0x12, 0x15, 0x2d, 0x00 |
| .byte 0x09, 0x15, 0x2d, 0x00 |
| .byte 0x00, 0x15, 0x2d, 0x00 |
| .byte 0x3f, 0x00, 0x2d, 0x00 |
| .byte 0x36, 0x00, 0x2d, 0x00 |
| .byte 0x2d, 0x00, 0x2d, 0x00 |
| .byte 0x24, 0x00, 0x2d, 0x00 |
| .byte 0x1b, 0x00, 0x2d, 0x00 |
| .byte 0x12, 0x00, 0x2d, 0x00 |
| .byte 0x09, 0x00, 0x2d, 0x00 |
| .byte 0x00, 0x00, 0x2d, 0x00 |
| .byte 0x3f, 0x3f, 0x24, 0x00 |
| .byte 0x36, 0x3f, 0x24, 0x00 |
| .byte 0x2d, 0x3f, 0x24, 0x00 |
| .byte 0x24, 0x3f, 0x24, 0x00 |
| .byte 0x1b, 0x3f, 0x24, 0x00 |
| .byte 0x12, 0x3f, 0x24, 0x00 |
| .byte 0x09, 0x3f, 0x24, 0x00 |
| .byte 0x00, 0x3f, 0x24, 0x00 |
| .byte 0x3f, 0x2a, 0x24, 0x00 |
| .byte 0x36, 0x2a, 0x24, 0x00 |
| .byte 0x2d, 0x2a, 0x24, 0x00 |
| .byte 0x24, 0x2a, 0x24, 0x00 |
| .byte 0x1b, 0x2a, 0x24, 0x00 |
| .byte 0x12, 0x2a, 0x24, 0x00 |
| .byte 0x09, 0x2a, 0x24, 0x00 |
| .byte 0x00, 0x2a, 0x24, 0x00 |
| .byte 0x3f, 0x15, 0x24, 0x00 |
| .byte 0x36, 0x15, 0x24, 0x00 |
| .byte 0x2d, 0x15, 0x24, 0x00 |
| .byte 0x24, 0x15, 0x24, 0x00 |
| .byte 0x1b, 0x15, 0x24, 0x00 |
| .byte 0x12, 0x15, 0x24, 0x00 |
| .byte 0x09, 0x15, 0x24, 0x00 |
| .byte 0x00, 0x15, 0x24, 0x00 |
| .byte 0x3f, 0x00, 0x24, 0x00 |
| .byte 0x36, 0x00, 0x24, 0x00 |
| .byte 0x2d, 0x00, 0x24, 0x00 |
| .byte 0x24, 0x00, 0x24, 0x00 |
| .byte 0x1b, 0x00, 0x24, 0x00 |
| .byte 0x12, 0x00, 0x24, 0x00 |
| .byte 0x09, 0x00, 0x24, 0x00 |
| .byte 0x00, 0x00, 0x24, 0x00 |
| .byte 0x3f, 0x3f, 0x1b, 0x00 |
| .byte 0x36, 0x3f, 0x1b, 0x00 |
| .byte 0x2d, 0x3f, 0x1b, 0x00 |
| .byte 0x24, 0x3f, 0x1b, 0x00 |
| .byte 0x1b, 0x3f, 0x1b, 0x00 |
| .byte 0x12, 0x3f, 0x1b, 0x00 |
| .byte 0x09, 0x3f, 0x1b, 0x00 |
| .byte 0x00, 0x3f, 0x1b, 0x00 |
| .byte 0x3f, 0x2a, 0x1b, 0x00 |
| .byte 0x36, 0x2a, 0x1b, 0x00 |
| .byte 0x2d, 0x2a, 0x1b, 0x00 |
| .byte 0x24, 0x2a, 0x1b, 0x00 |
| .byte 0x1b, 0x2a, 0x1b, 0x00 |
| .byte 0x12, 0x2a, 0x1b, 0x00 |
| .byte 0x09, 0x2a, 0x1b, 0x00 |
| .byte 0x00, 0x2a, 0x1b, 0x00 |
| .byte 0x3f, 0x15, 0x1b, 0x00 |
| .byte 0x36, 0x15, 0x1b, 0x00 |
| .byte 0x2d, 0x15, 0x1b, 0x00 |
| .byte 0x24, 0x15, 0x1b, 0x00 |
| .byte 0x1b, 0x15, 0x1b, 0x00 |
| .byte 0x12, 0x15, 0x1b, 0x00 |
| .byte 0x09, 0x15, 0x1b, 0x00 |
| .byte 0x00, 0x15, 0x1b, 0x00 |
| .byte 0x3f, 0x00, 0x1b, 0x00 |
| .byte 0x36, 0x00, 0x1b, 0x00 |
| .byte 0x2d, 0x00, 0x1b, 0x00 |
| .byte 0x24, 0x00, 0x1b, 0x00 |
| .byte 0x1b, 0x00, 0x1b, 0x00 |
| .byte 0x12, 0x00, 0x1b, 0x00 |
| .byte 0x09, 0x00, 0x1b, 0x00 |
| .byte 0x00, 0x00, 0x1b, 0x00 |
| .byte 0x3f, 0x3f, 0x12, 0x00 |
| .byte 0x36, 0x3f, 0x12, 0x00 |
| .byte 0x2d, 0x3f, 0x12, 0x00 |
| .byte 0x24, 0x3f, 0x12, 0x00 |
| .byte 0x1b, 0x3f, 0x12, 0x00 |
| .byte 0x12, 0x3f, 0x12, 0x00 |
| .byte 0x09, 0x3f, 0x12, 0x00 |
| .byte 0x00, 0x3f, 0x12, 0x00 |
| .byte 0x3f, 0x2a, 0x12, 0x00 |
| .byte 0x36, 0x2a, 0x12, 0x00 |
| .byte 0x2d, 0x2a, 0x12, 0x00 |
| .byte 0x24, 0x2a, 0x12, 0x00 |
| .byte 0x1b, 0x2a, 0x12, 0x00 |
| .byte 0x12, 0x2a, 0x12, 0x00 |
| .byte 0x09, 0x2a, 0x12, 0x00 |
| .byte 0x00, 0x2a, 0x12, 0x00 |
| .byte 0x3f, 0x15, 0x12, 0x00 |
| .byte 0x36, 0x15, 0x12, 0x00 |
| .byte 0x2d, 0x15, 0x12, 0x00 |
| .byte 0x24, 0x15, 0x12, 0x00 |
| .byte 0x1b, 0x15, 0x12, 0x00 |
| .byte 0x12, 0x15, 0x12, 0x00 |
| .byte 0x09, 0x15, 0x12, 0x00 |
| .byte 0x00, 0x15, 0x12, 0x00 |
| .byte 0x3f, 0x00, 0x12, 0x00 |
| .byte 0x36, 0x00, 0x12, 0x00 |
| .byte 0x2d, 0x00, 0x12, 0x00 |
| .byte 0x24, 0x00, 0x12, 0x00 |
| .byte 0x1b, 0x00, 0x12, 0x00 |
| .byte 0x12, 0x00, 0x12, 0x00 |
| .byte 0x09, 0x00, 0x12, 0x00 |
| .byte 0x00, 0x00, 0x12, 0x00 |
| .byte 0x3f, 0x3f, 0x09, 0x00 |
| .byte 0x36, 0x3f, 0x09, 0x00 |
| .byte 0x2d, 0x3f, 0x09, 0x00 |
| .byte 0x24, 0x3f, 0x09, 0x00 |
| .byte 0x1b, 0x3f, 0x09, 0x00 |
| .byte 0x12, 0x3f, 0x09, 0x00 |
| .byte 0x09, 0x3f, 0x09, 0x00 |
| .byte 0x00, 0x3f, 0x09, 0x00 |
| .byte 0x3f, 0x2a, 0x09, 0x00 |
| .byte 0x36, 0x2a, 0x09, 0x00 |
| .byte 0x2d, 0x2a, 0x09, 0x00 |
| .byte 0x24, 0x2a, 0x09, 0x00 |
| .byte 0x1b, 0x2a, 0x09, 0x00 |
| .byte 0x12, 0x2a, 0x09, 0x00 |
| .byte 0x09, 0x2a, 0x09, 0x00 |
| .byte 0x00, 0x2a, 0x09, 0x00 |
| .byte 0x3f, 0x15, 0x09, 0x00 |
| .byte 0x36, 0x15, 0x09, 0x00 |
| .byte 0x2d, 0x15, 0x09, 0x00 |
| .byte 0x24, 0x15, 0x09, 0x00 |
| .byte 0x1b, 0x15, 0x09, 0x00 |
| .byte 0x12, 0x15, 0x09, 0x00 |
| .byte 0x09, 0x15, 0x09, 0x00 |
| .byte 0x00, 0x15, 0x09, 0x00 |
| .byte 0x3f, 0x00, 0x09, 0x00 |
| .byte 0x36, 0x00, 0x09, 0x00 |
| .byte 0x2d, 0x00, 0x09, 0x00 |
| .byte 0x24, 0x00, 0x09, 0x00 |
| .byte 0x1b, 0x00, 0x09, 0x00 |
| .byte 0x12, 0x00, 0x09, 0x00 |
| .byte 0x09, 0x00, 0x09, 0x00 |
| .byte 0x00, 0x00, 0x09, 0x00 |
| .byte 0x3f, 0x3f, 0x00, 0x00 |
| .byte 0x36, 0x3f, 0x00, 0x00 |
| .byte 0x2d, 0x3f, 0x00, 0x00 |
| .byte 0x24, 0x3f, 0x00, 0x00 |
| .byte 0x1b, 0x3f, 0x00, 0x00 |
| .byte 0x12, 0x3f, 0x00, 0x00 |
| .byte 0x09, 0x3f, 0x00, 0x00 |
| .byte 0x00, 0x3f, 0x00, 0x00 |
| .byte 0x3f, 0x2a, 0x00, 0x00 |
| .byte 0x36, 0x2a, 0x00, 0x00 |
| .byte 0x2d, 0x2a, 0x00, 0x00 |
| .byte 0x24, 0x2a, 0x00, 0x00 |
| .byte 0x1b, 0x2a, 0x00, 0x00 |
| .byte 0x12, 0x2a, 0x00, 0x00 |
| .byte 0x09, 0x2a, 0x00, 0x00 |
| .byte 0x00, 0x2a, 0x00, 0x00 |
| .byte 0x3f, 0x15, 0x00, 0x00 |
| .byte 0x36, 0x15, 0x00, 0x00 |
| .byte 0x2d, 0x15, 0x00, 0x00 |
| .byte 0x24, 0x15, 0x00, 0x00 |
| .byte 0x1b, 0x15, 0x00, 0x00 |
| .byte 0x12, 0x15, 0x00, 0x00 |
| .byte 0x09, 0x15, 0x00, 0x00 |
| .byte 0x00, 0x15, 0x00, 0x00 |
| .byte 0x3f, 0x00, 0x00, 0x00 |
| .byte 0x36, 0x00, 0x00, 0x00 |
| .byte 0x2d, 0x00, 0x00, 0x00 |
| .byte 0x24, 0x00, 0x00, 0x00 |
| .byte 0x1b, 0x00, 0x00, 0x00 |
| .byte 0x12, 0x00, 0x00, 0x00 |
| .byte 0x09, 0x00, 0x00, 0x00 |
| .byte 0x00, 0x00, 0x00, 0x00 |
| .byte 0x09, 0x00, 0x00, 0x00 |
| .byte 0x12, 0x00, 0x00, 0x00 |
| .byte 0x1b, 0x00, 0x00, 0x00 |
| .byte 0x24, 0x00, 0x00, 0x00 |
| .byte 0x2d, 0x00, 0x00, 0x00 |
| .byte 0x36, 0x00, 0x00, 0x00 |
| .byte 0x3f, 0x00, 0x00, 0x00 |
| .byte 0x00, 0x15, 0x00, 0x00 |
| .byte 0x09, 0x15, 0x00, 0x00 |
| .byte 0x12, 0x15, 0x00, 0x00 |
| .byte 0x1b, 0x15, 0x00, 0x00 |
| .byte 0x24, 0x15, 0x00, 0x00 |
| .byte 0x2d, 0x15, 0x00, 0x00 |
| .byte 0x36, 0x15, 0x00, 0x00 |
| .byte 0x3f, 0x15, 0x00, 0x00 |
| .byte 0x00, 0x2a, 0x00, 0x00 |
| .byte 0x09, 0x2a, 0x00, 0x00 |
| .byte 0x12, 0x2a, 0x00, 0x00 |
| .byte 0x1b, 0x2a, 0x00, 0x00 |
| .byte 0x24, 0x2a, 0x00, 0x00 |
| .byte 0x2d, 0x2a, 0x00, 0x00 |
| .byte 0x36, 0x2a, 0x00, 0x00 |
| .byte 0x3f, 0x2a, 0x00, 0x00 |
| .byte 0x00, 0x3f, 0x00, 0x00 |
| .byte 0x09, 0x3f, 0x00, 0x00 |
| .byte 0x12, 0x3f, 0x00, 0x00 |
| .byte 0x1b, 0x3f, 0x00, 0x00 |
| .byte 0x24, 0x3f, 0x00, 0x00 |
| .byte 0x2d, 0x3f, 0x00, 0x00 |
| .byte 0x36, 0x3f, 0x00, 0x00 |
| .byte 0x3f, 0x3f, 0x00, 0x00 |
| .byte 0x00, 0x00, 0x09, 0x00 |
| .byte 0x09, 0x00, 0x09, 0x00 |
| .byte 0x12, 0x00, 0x09, 0x00 |
| .byte 0x1b, 0x00, 0x09, 0x00 |
| .byte 0x24, 0x00, 0x09, 0x00 |
| .byte 0x2d, 0x00, 0x09, 0x00 |
| .byte 0x36, 0x00, 0x09, 0x00 |
| .byte 0x3f, 0x00, 0x09, 0x00 |
| .byte 0x00, 0x15, 0x09, 0x00 |
| .byte 0x09, 0x15, 0x09, 0x00 |
| .byte 0x12, 0x15, 0x09, 0x00 |
| .byte 0x1b, 0x15, 0x09, 0x00 |
| .byte 0x24, 0x15, 0x09, 0x00 |
| .byte 0x2d, 0x15, 0x09, 0x00 |
| .byte 0x36, 0x15, 0x09, 0x00 |
| .byte 0x3f, 0x15, 0x09, 0x00 |
| .byte 0x00, 0x2a, 0x09, 0x00 |
| .byte 0x09, 0x2a, 0x09, 0x00 |
| .byte 0x12, 0x2a, 0x09, 0x00 |
| .byte 0x1b, 0x2a, 0x09, 0x00 |
| .byte 0x24, 0x2a, 0x09, 0x00 |
| .byte 0x2d, 0x2a, 0x09, 0x00 |
| .byte 0x36, 0x2a, 0x09, 0x00 |
| .byte 0x3f, 0x2a, 0x09, 0x00 |
| .byte 0x00, 0x3f, 0x09, 0x00 |
| .byte 0x09, 0x3f, 0x09, 0x00 |
| .byte 0x12, 0x3f, 0x09, 0x00 |
| .byte 0x1b, 0x3f, 0x09, 0x00 |
| .byte 0x24, 0x3f, 0x09, 0x00 |
| .byte 0x2d, 0x3f, 0x09, 0x00 |
| .byte 0x36, 0x3f, 0x09, 0x00 |
| .byte 0x3f, 0x3f, 0x09, 0x00 |
| .byte 0x00, 0x00, 0x12, 0x00 |
| .byte 0x09, 0x00, 0x12, 0x00 |
| .byte 0x12, 0x00, 0x12, 0x00 |
| .byte 0x1b, 0x00, 0x12, 0x00 |
| .byte 0x24, 0x00, 0x12, 0x00 |
| .byte 0x2d, 0x00, 0x12, 0x00 |
| .byte 0x36, 0x00, 0x12, 0x00 |
| .byte 0x3f, 0x00, 0x12, 0x00 |
| .byte 0x00, 0x15, 0x12, 0x00 |
| .byte 0x09, 0x15, 0x12, 0x00 |
| .byte 0x12, 0x15, 0x12, 0x00 |
| .byte 0x1b, 0x15, 0x12, 0x00 |
| .byte 0x24, 0x15, 0x12, 0x00 |
| .byte 0x2d, 0x15, 0x12, 0x00 |
| .byte 0x36, 0x15, 0x12, 0x00 |
| .byte 0x3f, 0x15, 0x12, 0x00 |
| .byte 0x00, 0x2a, 0x12, 0x00 |
| .byte 0x09, 0x2a, 0x12, 0x00 |
| .byte 0x12, 0x2a, 0x12, 0x00 |
| .byte 0x1b, 0x2a, 0x12, 0x00 |
| .byte 0x24, 0x2a, 0x12, 0x00 |
| .byte 0x2d, 0x2a, 0x12, 0x00 |
| .byte 0x36, 0x2a, 0x12, 0x00 |
| .byte 0x3f, 0x2a, 0x12, 0x00 |
| .byte 0x00, 0x3f, 0x12, 0x00 |
| .byte 0x09, 0x3f, 0x12, 0x00 |
| .byte 0x12, 0x3f, 0x12, 0x00 |
| .byte 0x1b, 0x3f, 0x12, 0x00 |
| .byte 0x24, 0x3f, 0x12, 0x00 |
| .byte 0x2d, 0x3f, 0x12, 0x00 |
| .byte 0x36, 0x3f, 0x12, 0x00 |
| .byte 0x3f, 0x3f, 0x12, 0x00 |
| .byte 0x00, 0x00, 0x1b, 0x00 |
| .byte 0x09, 0x00, 0x1b, 0x00 |
| .byte 0x12, 0x00, 0x1b, 0x00 |
| .byte 0x1b, 0x00, 0x1b, 0x00 |
| .byte 0x24, 0x00, 0x1b, 0x00 |
| .byte 0x2d, 0x00, 0x1b, 0x00 |
| .byte 0x36, 0x00, 0x1b, 0x00 |
| .byte 0x3f, 0x00, 0x1b, 0x00 |
| .byte 0x00, 0x15, 0x1b, 0x00 |
| .byte 0x09, 0x15, 0x1b, 0x00 |
| .byte 0x12, 0x15, 0x1b, 0x00 |
| .byte 0x1b, 0x15, 0x1b, 0x00 |
| .byte 0x24, 0x15, 0x1b, 0x00 |
| .byte 0x2d, 0x15, 0x1b, 0x00 |
| .byte 0x36, 0x15, 0x1b, 0x00 |
| .byte 0x3f, 0x15, 0x1b, 0x00 |
| .byte 0x00, 0x2a, 0x1b, 0x00 |
| .byte 0x09, 0x2a, 0x1b, 0x00 |
| .byte 0x12, 0x2a, 0x1b, 0x00 |
| .byte 0x1b, 0x2a, 0x1b, 0x00 |
| .byte 0x24, 0x2a, 0x1b, 0x00 |
| .byte 0x2d, 0x2a, 0x1b, 0x00 |
| .byte 0x36, 0x2a, 0x1b, 0x00 |
| .byte 0x3f, 0x2a, 0x1b, 0x00 |
| .byte 0x00, 0x3f, 0x1b, 0x00 |
| .byte 0x09, 0x3f, 0x1b, 0x00 |
| .byte 0x12, 0x3f, 0x1b, 0x00 |
| .byte 0x1b, 0x3f, 0x1b, 0x00 |
| .byte 0x24, 0x3f, 0x1b, 0x00 |
| .byte 0x2d, 0x3f, 0x1b, 0x00 |
| .byte 0x36, 0x3f, 0x1b, 0x00 |
| .byte 0x3f, 0x3f, 0x1b, 0x00 |
| .byte 0x00, 0x00, 0x24, 0x00 |
| .byte 0x09, 0x00, 0x24, 0x00 |
| .byte 0x12, 0x00, 0x24, 0x00 |
| .byte 0x1b, 0x00, 0x24, 0x00 |
| .byte 0x24, 0x00, 0x24, 0x00 |
| .byte 0x2d, 0x00, 0x24, 0x00 |
| .byte 0x36, 0x00, 0x24, 0x00 |
| .byte 0x3f, 0x00, 0x24, 0x00 |
| .byte 0x00, 0x15, 0x24, 0x00 |
| .byte 0x09, 0x15, 0x24, 0x00 |
| .byte 0x12, 0x15, 0x24, 0x00 |
| .byte 0x1b, 0x15, 0x24, 0x00 |
| .byte 0x24, 0x15, 0x24, 0x00 |
| .byte 0x2d, 0x15, 0x24, 0x00 |
| .byte 0x36, 0x15, 0x24, 0x00 |
| .byte 0x3f, 0x15, 0x24, 0x00 |
| .byte 0x00, 0x2a, 0x24, 0x00 |
| .byte 0x09, 0x2a, 0x24, 0x00 |
| .byte 0x12, 0x2a, 0x24, 0x00 |
| .byte 0x1b, 0x2a, 0x24, 0x00 |
| .byte 0x24, 0x2a, 0x24, 0x00 |
| .byte 0x2d, 0x2a, 0x24, 0x00 |
| .byte 0x36, 0x2a, 0x24, 0x00 |
| .byte 0x3f, 0x2a, 0x24, 0x00 |
| .byte 0x00, 0x3f, 0x24, 0x00 |
| .byte 0x09, 0x3f, 0x24, 0x00 |
| .byte 0x12, 0x3f, 0x24, 0x00 |
| .byte 0x1b, 0x3f, 0x24, 0x00 |
| .byte 0x24, 0x3f, 0x24, 0x00 |
| .byte 0x2d, 0x3f, 0x24, 0x00 |
| .byte 0x36, 0x3f, 0x24, 0x00 |
| .byte 0x3f, 0x3f, 0x24, 0x00 |
| .byte 0x00, 0x00, 0x2d, 0x00 |
| .byte 0x09, 0x00, 0x2d, 0x00 |
| .byte 0x12, 0x00, 0x2d, 0x00 |
| .byte 0x1b, 0x00, 0x2d, 0x00 |
| .byte 0x24, 0x00, 0x2d, 0x00 |
| .byte 0x2d, 0x00, 0x2d, 0x00 |
| .byte 0x36, 0x00, 0x2d, 0x00 |
| .byte 0x3f, 0x00, 0x2d, 0x00 |
| .byte 0x00, 0x15, 0x2d, 0x00 |
| .byte 0x09, 0x15, 0x2d, 0x00 |
| .byte 0x12, 0x15, 0x2d, 0x00 |
| .byte 0x1b, 0x15, 0x2d, 0x00 |
| .byte 0x24, 0x15, 0x2d, 0x00 |
| .byte 0x2d, 0x15, 0x2d, 0x00 |
| .byte 0x36, 0x15, 0x2d, 0x00 |
| .byte 0x3f, 0x15, 0x2d, 0x00 |
| .byte 0x00, 0x2a, 0x2d, 0x00 |
| .byte 0x09, 0x2a, 0x2d, 0x00 |
| .byte 0x12, 0x2a, 0x2d, 0x00 |
| .byte 0x1b, 0x2a, 0x2d, 0x00 |
| .byte 0x24, 0x2a, 0x2d, 0x00 |
| .byte 0x2d, 0x2a, 0x2d, 0x00 |
| .byte 0x36, 0x2a, 0x2d, 0x00 |
| .byte 0x3f, 0x2a, 0x2d, 0x00 |
| .byte 0x00, 0x3f, 0x2d, 0x00 |
| .byte 0x09, 0x3f, 0x2d, 0x00 |
| .byte 0x12, 0x3f, 0x2d, 0x00 |
| .byte 0x1b, 0x3f, 0x2d, 0x00 |
| .byte 0x24, 0x3f, 0x2d, 0x00 |
| .byte 0x2d, 0x3f, 0x2d, 0x00 |
| .byte 0x36, 0x3f, 0x2d, 0x00 |
| .byte 0x3f, 0x3f, 0x2d, 0x00 |
| .byte 0x00, 0x00, 0x36, 0x00 |
| .byte 0x09, 0x00, 0x36, 0x00 |
| .byte 0x12, 0x00, 0x36, 0x00 |
| .byte 0x1b, 0x00, 0x36, 0x00 |
| .byte 0x24, 0x00, 0x36, 0x00 |
| .byte 0x2d, 0x00, 0x36, 0x00 |
| .byte 0x36, 0x00, 0x36, 0x00 |
| .byte 0x3f, 0x00, 0x36, 0x00 |
| .byte 0x00, 0x15, 0x36, 0x00 |
| .byte 0x09, 0x15, 0x36, 0x00 |
| .byte 0x12, 0x15, 0x36, 0x00 |
| .byte 0x1b, 0x15, 0x36, 0x00 |
| .byte 0x24, 0x15, 0x36, 0x00 |
| .byte 0x2d, 0x15, 0x36, 0x00 |
| .byte 0x36, 0x15, 0x36, 0x00 |
| .byte 0x3f, 0x15, 0x36, 0x00 |
| .byte 0x00, 0x2a, 0x36, 0x00 |
| .byte 0x09, 0x2a, 0x36, 0x00 |
| .byte 0x12, 0x2a, 0x36, 0x00 |
| .byte 0x1b, 0x2a, 0x36, 0x00 |
| .byte 0x24, 0x2a, 0x36, 0x00 |
| .byte 0x2d, 0x2a, 0x36, 0x00 |
| .byte 0x36, 0x2a, 0x36, 0x00 |
| .byte 0x3f, 0x2a, 0x36, 0x00 |
| .byte 0x00, 0x3f, 0x36, 0x00 |
| .byte 0x09, 0x3f, 0x36, 0x00 |
| .byte 0x12, 0x3f, 0x36, 0x00 |
| .byte 0x1b, 0x3f, 0x36, 0x00 |
| .byte 0x24, 0x3f, 0x36, 0x00 |
| .byte 0x2d, 0x3f, 0x36, 0x00 |
| .byte 0x36, 0x3f, 0x36, 0x00 |
| .byte 0x3f, 0x3f, 0x36, 0x00 |
| .byte 0x00, 0x00, 0x3f, 0x00 |
| .byte 0x09, 0x00, 0x3f, 0x00 |
| .byte 0x12, 0x00, 0x3f, 0x00 |
| .byte 0x1b, 0x00, 0x3f, 0x00 |
| .byte 0x24, 0x00, 0x3f, 0x00 |
| .byte 0x2d, 0x00, 0x3f, 0x00 |
| .byte 0x36, 0x00, 0x3f, 0x00 |
| .byte 0x3f, 0x00, 0x3f, 0x00 |
| .byte 0x00, 0x15, 0x3f, 0x00 |
| .byte 0x09, 0x15, 0x3f, 0x00 |
| .byte 0x12, 0x15, 0x3f, 0x00 |
| .byte 0x1b, 0x15, 0x3f, 0x00 |
| .byte 0x24, 0x15, 0x3f, 0x00 |
| .byte 0x2d, 0x15, 0x3f, 0x00 |
| .byte 0x36, 0x15, 0x3f, 0x00 |
| .byte 0x3f, 0x15, 0x3f, 0x00 |
| .byte 0x00, 0x2a, 0x3f, 0x00 |
| .byte 0x09, 0x2a, 0x3f, 0x00 |
| .byte 0x12, 0x2a, 0x3f, 0x00 |
| .byte 0x1b, 0x2a, 0x3f, 0x00 |
| .byte 0x24, 0x2a, 0x3f, 0x00 |
| .byte 0x2d, 0x2a, 0x3f, 0x00 |
| .byte 0x36, 0x2a, 0x3f, 0x00 |
| .byte 0x3f, 0x2a, 0x3f, 0x00 |
| .byte 0x00, 0x3f, 0x3f, 0x00 |
| .byte 0x09, 0x3f, 0x3f, 0x00 |
| .byte 0x12, 0x3f, 0x3f, 0x00 |
| .byte 0x1b, 0x3f, 0x3f, 0x00 |
| .byte 0x24, 0x3f, 0x3f, 0x00 |
| .byte 0x2d, 0x3f, 0x3f, 0x00 |
| .byte 0x36, 0x3f, 0x3f, 0x00 |
| .byte 0x3f, 0x3f, 0x3f, 0x00 |
| /branches/sparc/kernel/arch/ia32/src/drivers/vesa.c |
|---|
| 86,9 → 86,22 |
| panic("Unsupported bits per pixel"); |
| } |
| fb_init(vesa_ph_addr, vesa_width, vesa_height, vesa_scanline, visual); |
| fb_properties_t vesa_props = { |
| .addr = vesa_ph_addr, |
| .offset = 0, |
| .x = vesa_width, |
| .y = vesa_height, |
| .scan = vesa_scanline, |
| .visual = visual, |
| }; |
| fb_init(&vesa_props); |
| } |
| void vesa_redraw(void) |
| { |
| fb_redraw(); |
| } |
| #endif |
| /** @} |