| 47,6 → 47,16 |
|---|
| #define BSP_FLAG 1 |
| |
| /* |
| * 2^PHYSMEM_ADDR_SIZE is the size of the physical address space on |
| * a given processor. |
| */ |
| #if defined (US2) |
| #define PHYSMEM_ADDR_SIZE 41 |
| #elif defined (US3) |
| #define PHYSMEM_ADDR_SIZE 43 |
| #endif |
| |
| /* |
| * Here is where the kernel is passed control from the boot loader. |
| * |
| * The registers are expected to be in this state: |
| 67,11 → 77,13 |
|---|
| and %o0, %l0, %l7 ! l7 <= bootstrap processor? |
| andn %o0, %l0, %l6 ! l6 <= start of physical memory |
| |
| ! Get bits 40:13 of physmem_base. |
| ! Get bits (PHYSMEM_ADDR_SIZE - 1):13 of physmem_base. |
| srlx %l6, 13, %l5 |
| sllx %l5, 13 + (63 - 40), %l5 |
| srlx %l5, 63 - 40, %l5 ! l5 <= physmem_base[40:13] |
| |
| ! l5 <= physmem_base[(PHYSMEM_ADDR_SIZE - 1):13] |
| sllx %l5, 13 + (63 - (PHYSMEM_ADDR_SIZE - 1)), %l5 |
| srlx %l5, 63 - (PHYSMEM_ADDR_SIZE - 1), %l5 |
| |
| /* |
| * Setup basic runtime environment. |
| */ |
| 83,6 → 95,8 |
|---|
| ! consistent |
| wrpr %g0, NWINDOWS - 1, %cleanwin ! prevent needless clean_window |
| ! traps for kernel |
| |
| wrpr %g0, 0, %wstate ! use the default spill/fill trap |
| |
| wrpr %g0, 0, %tl ! TL = 0, primary context |
| ! register is used |
| 244,7 → 258,8 |
|---|
| |
| /* |
| * Precompute kernel 8K TLB data template. |
| * %l5 contains starting physical address bits [40:13] |
| * %l5 contains starting physical address |
| * bits [(PHYSMEM_ADDR_SIZE - 1):13] |
| */ |
| sethi %hi(kernel_8k_tlb_data_template), %l4 |
| ldx [%l4 + %lo(kernel_8k_tlb_data_template)], %l3 |