| /branches/sparc/boot/arch/sparc64/loader/asm.S |
|---|
| 107,6 → 107,7 |
| * 3. Flush instruction pipeline. |
| */ |
| #if defined (SUN4U) |
| /* |
| * US3 processors have a write-invalidate cache, so explicitly |
| * invalidating it is not required. Whether to invalidate I-cache |
| 113,6 → 114,7 |
| * or not is decided according to the value of the global |
| * "subarchitecture" variable (set in the bootstrap). |
| */ |
| set subarchitecture, %g2 |
| ldub [%g2], %g2 |
| cmp %g2, 3 |
| 121,6 → 123,8 |
| 0: |
| call icache_flush |
| nop |
| #endif |
| 1: |
| membar #StoreStore |