/branches/dynload/uspace/app/iloader/arch/arm32/_link.ld.in |
---|
6,11 → 6,16 |
ENTRY(__entry) |
PHDRS { |
interp PT_INTERP; |
text PT_LOAD FLAGS(5); |
data PT_LOAD FLAGS(6); |
} |
SECTIONS { |
.interp : { |
*(.interp); |
} : interp |
. = 0x70001000; |
.init ALIGN(0x1000): SUBALIGN(0x1000) { |
/branches/dynload/uspace/app/iloader/arch/ppc32/_link.ld.in |
---|
6,11 → 6,16 |
ENTRY(__entry) |
PHDRS { |
interp PT_INTERP; |
text PT_LOAD FLAGS(5); |
data PT_LOAD FLAGS(6); |
} |
SECTIONS { |
.interp : { |
*(.interp); |
} :interp |
. = 0x70001000; |
.init ALIGN(0x1000) : SUBALIGN(0x1000) { |
/branches/dynload/uspace/app/iloader/arch/amd64/_link.ld.in |
---|
6,11 → 6,16 |
ENTRY(__entry) |
PHDRS { |
interp PT_INTERP; |
text PT_LOAD FLAGS(5); |
data PT_LOAD FLAGS(6); |
} |
SECTIONS { |
.interp : { |
*(.interp); |
} : interp |
/* . = 0x0000700000001000;*/ |
. = 0x70001000; |
/branches/dynload/uspace/app/iloader/arch/mips32/_link.ld.in |
---|
6,11 → 6,16 |
ENTRY(__entry) |
PHDRS { |
interp PT_INTERP; |
text PT_LOAD FLAGS(5); |
data PT_LOAD FLAGS(6); |
} |
SECTIONS { |
.interp : { |
*(.interp); |
} :interp |
. = 0x70004000; |
.init ALIGN(0x4000) : SUBALIGN(0x4000) { |
/branches/dynload/uspace/app/iloader/arch/ia32/_link.ld.in |
---|
14,7 → 14,7 |
SECTIONS { |
.interp : { |
*(.interp); |
} : interp |
} :interp |
. = 0x70001000; |