Subversion Repositories HelenOS

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Ignore whitespace Rev 4343 → Rev 4344

/branches/dynload/kernel/genarch/include/kbd/z8530.h
37,19 → 37,90
#ifndef KERN_Z8530_H_
#define KERN_Z8530_H_
 
#include <console/chardev.h>
#include <ipc/irq.h>
#include <ddi/irq.h>
#include <arch/types.h>
 
extern bool z8530_belongs_to_kernel;
#define WR0 0
#define WR1 1
#define WR2 2
#define WR3 3
#define WR4 4
#define WR5 5
#define WR6 6
#define WR7 7
#define WR8 8
#define WR9 9
#define WR10 10
#define WR11 11
#define WR12 12
#define WR13 13
#define WR14 14
#define WR15 15
 
extern void z8530_init(devno_t, uintptr_t, inr_t, cir_t, void *);
extern void z8530_poll(void);
extern void z8530_grab(void);
extern void z8530_release(void);
extern void z8530_interrupt(void);
extern char z8530_key_read(chardev_t *);
extern irq_ownership_t z8530_claim(void *);
#define RR0 0
#define RR1 1
#define RR2 2
#define RR3 3
#define RR8 8
#define RR10 10
#define RR12 12
#define RR13 13
#define RR14 14
#define RR15 15
 
/** Reset pending TX interrupt. */
#define WR0_TX_IP_RST (0x5 << 3)
#define WR0_ERR_RST (0x6 << 3)
 
/** Receive Interrupts Disabled. */
#define WR1_RID (0x0 << 3)
/** Receive Interrupt on First Character or Special Condition. */
#define WR1_RIFCSC (0x1 << 3)
/** Interrupt on All Receive Characters or Special Conditions. */
#define WR1_IARCSC (0x2 << 3)
/** Receive Interrupt on Special Condition. */
#define WR1_RISC (0x3 << 3)
/** Parity Is Special Condition. */
#define WR1_PISC (0x1 << 2)
 
/** Rx Enable. */
#define WR3_RX_ENABLE (0x1 << 0)
/** 8-bits per character. */
#define WR3_RX8BITSCH (0x3 << 6)
 
/** Master Interrupt Enable. */
#define WR9_MIE (0x1 << 3)
 
/** Receive Character Available. */
#define RR0_RCA (0x1 << 0)
 
/** z8530's registers. */
struct z8530 {
union {
ioport8_t ctl_b;
ioport8_t status_b;
} __attribute__ ((packed));
uint8_t pad1;
ioport8_t data_b;
uint8_t pad2;
union {
ioport8_t ctl_a;
ioport8_t status_a;
} __attribute__ ((packed));
uint8_t pad3;
ioport8_t data_a;
} __attribute__ ((packed));
typedef struct z8530 z8530_t;
 
/** Structure representing the z8530 device. */
typedef struct {
devno_t devno;
irq_t irq;
z8530_t *z8530;
} z8530_instance_t;
 
extern bool z8530_init(z8530_t *, devno_t, inr_t, cir_t, void *);
extern irq_ownership_t z8530_claim(irq_t *);
extern void z8530_irq_handler(irq_t *);
 
#endif
/branches/dynload/kernel/genarch/include/kbd/ns16550.h
37,30 → 37,10
#ifndef KERN_NS16550_H_
#define KERN_NS16550_H_
 
#include <console/chardev.h>
#include <ddi/irq.h>
#include <ipc/irq.h>
 
extern void ns16550_init(devno_t, uintptr_t, inr_t, cir_t, void *);
extern void ns16550_poll(void);
extern void ns16550_grab(void);
extern void ns16550_release(void);
extern char ns16550_key_read(chardev_t *);
extern irq_ownership_t ns16550_claim(void *);
extern void ns16550_irq_handler(irq_t *);
 
#include <arch/types.h>
#include <arch/drivers/kbd.h>
 
/* NS16550 registers */
#define RBR_REG 0 /** Receiver Buffer Register. */
#define IER_REG 1 /** Interrupt Enable Register. */
#define IIR_REG 2 /** Interrupt Ident Register (read). */
#define FCR_REG 2 /** FIFO control register (write). */
#define LCR_REG 3 /** Line Control register. */
#define MCR_REG 4 /** Modem Control Register. */
#define LSR_REG 5 /** Line Status Register. */
 
#define IER_ERBFI 0x01 /** Enable Receive Buffer Full Interrupt. */
 
#define LCR_DLAB 0x80 /** Divisor Latch Access bit. */
67,67 → 47,31
 
#define MCR_OUT2 0x08 /** OUT2. */
 
/** NS16550 registers. */
struct ns16550 {
ioport8_t rbr; /**< Receiver Buffer Register. */
ioport8_t ier; /**< Interrupt Enable Register. */
union {
ioport8_t iir; /**< Interrupt Ident Register (read). */
ioport8_t fcr; /**< FIFO control register (write). */
} __attribute__ ((packed));
ioport8_t lcr; /**< Line Control register. */
ioport8_t mcr; /**< Modem Control Register. */
ioport8_t lsr; /**< Line Status Register. */
} __attribute__ ((packed));
typedef struct ns16550 ns16550_t;
 
/** Structure representing the ns16550 device. */
typedef struct {
typedef struct ns16550_instance {
devno_t devno;
/** Memory mapped registers of the ns16550. */
volatile ioport_t io_port;
} ns16550_t;
ns16550_t *ns16550;
irq_t irq;
} ns16550_instance_t;
 
static inline uint8_t ns16550_rbr_read(ns16550_t *dev)
{
return pio_read_8(dev->io_port + RBR_REG);
}
static inline void ns16550_rbr_write(ns16550_t *dev, uint8_t v)
{
pio_write_8(dev->io_port + RBR_REG, v);
}
extern bool ns16550_init(ns16550_t *, devno_t, inr_t, cir_t, void *);
extern irq_ownership_t ns16550_claim(irq_t *);
extern void ns16550_irq_handler(irq_t *);
 
static inline uint8_t ns16550_ier_read(ns16550_t *dev)
{
return pio_read_8(dev->io_port + IER_REG);
}
 
static inline void ns16550_ier_write(ns16550_t *dev, uint8_t v)
{
pio_write_8(dev->io_port + IER_REG, v);
}
 
static inline uint8_t ns16550_iir_read(ns16550_t *dev)
{
return pio_read_8(dev->io_port + IIR_REG);
}
 
static inline void ns16550_fcr_write(ns16550_t *dev, uint8_t v)
{
pio_write_8(dev->io_port + FCR_REG, v);
}
 
static inline uint8_t ns16550_lcr_read(ns16550_t *dev)
{
return pio_read_8(dev->io_port + LCR_REG);
}
 
static inline void ns16550_lcr_write(ns16550_t *dev, uint8_t v)
{
pio_write_8(dev->io_port + LCR_REG, v);
}
 
static inline uint8_t ns16550_lsr_read(ns16550_t *dev)
{
return pio_read_8(dev->io_port + LSR_REG);
}
 
static inline uint8_t ns16550_mcr_read(ns16550_t *dev)
{
return pio_read_8(dev->io_port + MCR_REG);
}
 
static inline void ns16550_mcr_write(ns16550_t *dev, uint8_t v)
{
pio_write_8(dev->io_port + MCR_REG, v);
}
 
#endif
 
/** @}
/branches/dynload/kernel/genarch/include/kbd/i8042.h
35,15 → 35,25
#ifndef KERN_I8042_H_
#define KERN_I8042_H_
 
#include <ddi/irq.h>
#include <arch/types.h>
#include <console/chardev.h>
#include <typedefs.h>
 
extern void i8042_init(devno_t kbd_devno, inr_t kbd_inr, devno_t mouse_devno, inr_t mouse_inr);
extern void i8042_poll(void);
extern void i8042_grab(void);
extern void i8042_release(void);
extern char i8042_key_read(chardev_t *d);
struct i8042 {
ioport8_t data;
uint8_t pad[3];
ioport8_t status;
} __attribute__ ((packed));
typedef struct i8042 i8042_t;
 
typedef struct i8042_instance {
devno_t devno;
irq_t irq;
i8042_t *i8042;
} i8042_instance_t;
 
extern bool i8042_init(i8042_t *, devno_t, inr_t);
 
#endif
 
/** @}