| 69,7 → 69,11 |
|---|
| |
| static inline void cpu_halt(void) |
| { |
| asm volatile ("hlt\n"); |
| asm volatile ( |
| "0:\n" |
| " hlt\n" |
| " jmp 0b\n" |
| ); |
| } |
| |
| |
| 338,7 → 342,7 |
|---|
| * @param gdtr_reg Address of memory from where to load GDTR. |
| * |
| */ |
| static inline void gdtr_load(struct ptr_16_64 *gdtr_reg) |
| static inline void gdtr_load(ptr_16_64_t *gdtr_reg) |
| { |
| asm volatile ( |
| "lgdtq %[gdtr_reg]\n" |
| 351,7 → 355,7 |
|---|
| * @param gdtr_reg Address of memory to where to load GDTR. |
| * |
| */ |
| static inline void gdtr_store(struct ptr_16_64 *gdtr_reg) |
| static inline void gdtr_store(ptr_16_64_t *gdtr_reg) |
| { |
| asm volatile ( |
| "sgdtq %[gdtr_reg]\n" |
| 364,7 → 368,7 |
|---|
| * @param idtr_reg Address of memory from where to load IDTR. |
| * |
| */ |
| static inline void idtr_load(struct ptr_16_64 *idtr_reg) |
| static inline void idtr_load(ptr_16_64_t *idtr_reg) |
| { |
| asm volatile ( |
| "lidtq %[idtr_reg]\n" |