WebSVN – HelenOS – Path Comparison – / – /branches/dynload/kernel/ Rev 4337 and /branches/dynload/kernel/ Rev 4338

Ignore whitespace Rev 4337 → Rev 4338

 /branches/dynload/kernel/genarch/include/drivers/ega/ega.h
 ,0 → 1,54
+/*
+ * Copyright (c) 2001-2004 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/** @addtogroup genarch_drivers
+ * @{
+ */
+/** @file
+ */
+#ifndef KERN_EGA_H_
+#define KERN_EGA_H_
+#include <arch/types.h>
+#define ROW     80
+#define ROWS        25
+#define SCREEN      (ROW * ROWS)
+/* EGA device registers. */
+#define EGA_INDEX_REG   0
+#define EGA_DATA_REG    1
+extern void ega_redraw(void);
+extern void ega_init(ioport_t, uintptr_t);
+#endif
+/** @}
+ */
 Property changes:
 Added: svn:mergeinfo

 /branches/dynload/kernel/genarch/Makefile.inc
 ,3 → 103,9
         genarch/src/ofw/sbus.c \
         genarch/src/ofw/upa.c
 endif
+## EGA
+ifeq ($(CONFIG_EGA), y)
+    GENARCH_SOURCES += \
+        genarch/src/drivers/ega/ega.c
+endif

 /branches/dynload/kernel/genarch/src/fb/fb.c
 ,7 → 254,7
         }
     }
-    memcpy(backbuf, backbuf + cols, cols * (rows - 1));
+    memmove(backbuf, backbuf + cols, cols * (rows - 1));
     memsetb(&backbuf[BB_POS(0, rows - 1)], cols, 0);
 }

 /branches/dynload/kernel/genarch/src/drivers/ega/ega.c
 ,0 → 1,175
+/*
+ * Copyright (c) 2001-2004 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/** @addtogroup genarch_drivers
+ * @{
+ */
+/**
+ * @file
+ * @brief EGA driver.
+ */
+#include <genarch/drivers/ega/ega.h>
+#include <putchar.h>
+#include <mm/page.h>
+#include <mm/as.h>
+#include <mm/slab.h>
+#include <arch/mm/page.h>
+#include <synch/spinlock.h>
+#include <arch/types.h>
+#include <arch/asm.h>
+#include <memstr.h>
+#include <console/chardev.h>
+#include <console/console.h>
+#include <sysinfo/sysinfo.h>
+#include <ddi/ddi.h>
+/*
+ * The EGA driver.
+ * Simple and short. Function for displaying characters and "scrolling".
+ */
+static parea_t ega_parea;   /**< Physical memory area for EGA video RAM. */
+SPINLOCK_INITIALIZE(egalock);
+static uint32_t ega_cursor;
+static uint8_t *videoram;
+static uint8_t *backbuf;
+static ioport_t ega_base;
+static void ega_putchar(chardev_t *d, const char ch);
+chardev_t ega_console;
+static chardev_operations_t ega_ops = {
+    .write = ega_putchar
+};
+static void ega_move_cursor(void);
+void ega_init(ioport_t base, uintptr_t videoram_phys)
+{
+    /* Initialize the software structure. */
+    ega_base = base;
+    backbuf = (uint8_t *) malloc(SCREEN * 2, 0);
+    if (!backbuf)
+        panic("Unable to allocate backbuffer.\n");
+    videoram = (uint8_t *) hw_map(videoram_phys, SCREEN * 2);
+    /* Clear the screen and set the cursor position. */
+    memsetw(videoram, SCREEN, 0x0720);
+    memsetw(backbuf, SCREEN, 0x0720);
+    ega_move_cursor();
+    chardev_initialize("ega_out", &ega_console, &ega_ops);
+    stdout = &ega_console;
+    ega_parea.pbase = videoram_phys;
+    ega_parea.vbase = (uintptr_t) videoram;
+    ega_parea.frames = 1;
+    ega_parea.cacheable = false;
+    ddi_parea_register(&ega_parea);
+    sysinfo_set_item_val("fb", NULL, true);
+    sysinfo_set_item_val("fb.kind", NULL, 2);
+    sysinfo_set_item_val("fb.width", NULL, ROW);
+    sysinfo_set_item_val("fb.height", NULL, ROWS);
+    sysinfo_set_item_val("fb.blinking", NULL, true);
+    sysinfo_set_item_val("fb.address.physical", NULL, videoram_phys);
+}
+static void ega_display_char(char ch)
+{
+    videoram[ega_cursor * 2] = ch;
+    backbuf[ega_cursor * 2] = ch;
+}
+/*
+ * This function takes care of scrolling.
+ */
+static void ega_check_cursor(void)
+{
+    if (ega_cursor < SCREEN)
+        return;
+    memmove((void *) videoram, (void *) (videoram + ROW * 2),
+        (SCREEN - ROW) * 2);
+    memmove((void *) backbuf, (void *) (backbuf + ROW * 2),
+        (SCREEN - ROW) * 2);
+    memsetw(videoram + (SCREEN - ROW) * 2, ROW, 0x0720);
+    memsetw(backbuf + (SCREEN - ROW) * 2, ROW, 0x0720);
+    ega_cursor = ega_cursor - ROW;
+}
+void ega_putchar(chardev_t *d __attribute__((unused)), const char ch)
+{
+    ipl_t ipl;
+    ipl = interrupts_disable();
+    spinlock_lock(&egalock);
+    switch (ch) {
+    case '\n':
+        ega_cursor = (ega_cursor + ROW) - ega_cursor % ROW;
+        break;
+    case '\t':
+        ega_cursor = (ega_cursor + 8) - ega_cursor % 8;
+        break;
+    case '\b':
+        if (ega_cursor % ROW)
+            ega_cursor--;
+        break;
+    default:
+        ega_display_char(ch);
+        ega_cursor++;
+        break;
+    }
+    ega_check_cursor();
+    ega_move_cursor();
+    spinlock_unlock(&egalock);
+    interrupts_restore(ipl);
+}
+void ega_move_cursor(void)
+{
+    outb(ega_base + EGA_INDEX_REG, 0xe);
+    outb(ega_base + EGA_DATA_REG, (uint8_t) ((ega_cursor >> 8) & 0xff));
+    outb(ega_base + EGA_INDEX_REG, 0xf);
+    outb(ega_base + EGA_DATA_REG, (uint8_t) (ega_cursor & 0xff));
+}
+void ega_redraw(void)
+{
+    memcpy(videoram, backbuf, SCREEN * 2);
+    ega_move_cursor();
+}
+/** @}
+ */
 Property changes:
 Added: svn:mergeinfo

 /branches/dynload/kernel/generic/include/memstr.h
 ,6 → 44,8
 extern void *_memcpy(void *dst, const void *src, size_t cnt);
 extern void _memsetb(void *dst, size_t cnt, uint8_t x);
 extern void _memsetw(void *dst, size_t cnt, uint16_t x);
+extern void *memmove(void *dst, const void *src, size_t cnt);
 extern char *strcpy(char *dest, const char *src);
 #endif

 /branches/dynload/kernel/generic/include/console/kconsole.h
 ,6 → 37,7
 #include <adt/list.h>
 #include <synch/spinlock.h>
+#include <ipc/irq.h>
 #define MAX_CMDLINE     256
 #define KCONSOLE_HISTORY 10
 ,10 → 84,14
     void (* help)(void);
 } cmd_info_t;
+extern bool kconsole_notify;
+extern irq_t kconsole_irq;
 SPINLOCK_EXTERN(cmd_lock);
 extern link_t cmd_head;
 extern void kconsole_init(void);
+extern void kconsole_notify_init(void);
 extern void kconsole(char *prompt, char *msg, bool kcon);
 extern void kconsole_thread(void *data);

 /branches/dynload/kernel/generic/include/ipc/irq.h
 ,6 → 53,8
  * User friendly wrappers for ipc_irq_send_msg(). They are in the form
  * ipc_irq_send_msg_m(), where m is the number of payload arguments.
  */
+#define ipc_irq_send_msg_0(irq) \
+    ipc_irq_send_msg((irq), 0, 0, 0, 0, 0)
 #define ipc_irq_send_msg_1(irq, a1) \
     ipc_irq_send_msg((irq), (a1), 0, 0, 0, 0)
 #define ipc_irq_send_msg_2(irq, a1, a2) \

 /branches/dynload/kernel/generic/src/main/main.c
 ,7 → 198,7
         "\nconfig.stack_base=%#" PRIp " config.stack_size=%" PRIs,
         config.base, config.kernel_size, config.stack_base,
         config.stack_size);
 #ifdef CONFIG_KCONSOLE
     /*
      * kconsole data structures must be initialized very early
 ,7 → 213,7
      * starts adding its own handlers
      */
     LOG_EXEC(exc_init());
     /*
      * Memory management subsystems initialization.
      */
 ,7 → 259,11
     LOG_EXEC(ipc_init());
     LOG_EXEC(klog_init());
+#ifdef CONFIG_KCONSOLE
+    LOG_EXEC(kconsole_notify_init());
+#endif
     /*
      * Create kernel task.
      */

 /branches/dynload/kernel/generic/src/console/cmd.c
 ,8 → 976,11
 int cmd_continue(cmd_arg_t *argv)
 {
     printf("The kernel will now relinquish the console.\n");
-    printf("Use userspace controls to redraw the screen.\n");
     arch_release_console();
+    if ((kconsole_notify) && (kconsole_irq.notif_cfg.notify))
+        ipc_irq_send_msg_0(&kconsole_irq);
     return 1;
 }

 /branches/dynload/kernel/generic/src/console/kconsole.c
 ,6 → 51,8
 #include <func.h>
 #include <symtab.h>
 #include <macros.h>
+#include <sysinfo/sysinfo.h>
+#include <ddi/device.h>
 /** Simple kernel console.
  *
 ,10 → 85,39
     index_t *end);
 static char history[KCONSOLE_HISTORY][MAX_CMDLINE] = {};
-/** Initialize kconsole data structures. */
+/*
+ * For now, we use 0 as INR.
+ * However, it is therefore desirable to have architecture specific
+ * definition of KCONSOLE_VIRT_INR in the future.
+ */
+#define KCONSOLE_VIRT_INR  0
+bool kconsole_notify = false;
+irq_t kconsole_irq;
+/** Allways refuse IRQ ownership.
+ *
+ * This is not a real IRQ, so we always decline.
+ *
+ * @return Always returns IRQ_DECLINE.
+ *
+ */
+static irq_ownership_t kconsole_claim(void)
+{
+    return IRQ_DECLINE;
+}
+/** Initialize kconsole data structures
+ *
+ * This is the most basic initialization, almost no
+ * other kernel subsystem is ready yet.
+ *
+ */
 void kconsole_init(void)
 {
-    int i;
+    unsigned int i;
     cmd_init();
     for (i = 0; i < KCONSOLE_HISTORY; i++)
 ,6 → 125,29
 }
+/** Initialize kconsole notification mechanism
+ *
+ * Initialize the virtual IRQ notification mechanism.
+ *
+ */
+void kconsole_notify_init(void)
+{
+    devno_t devno = device_assign_devno();
+    sysinfo_set_item_val("kconsole.present", NULL, true);
+    sysinfo_set_item_val("kconsole.devno", NULL, devno);
+    sysinfo_set_item_val("kconsole.inr", NULL, KCONSOLE_VIRT_INR);
+    irq_initialize(&kconsole_irq);
+    kconsole_irq.devno = devno;
+    kconsole_irq.inr = KCONSOLE_VIRT_INR;
+    kconsole_irq.claim = kconsole_claim;
+    irq_register(&kconsole_irq);
+    kconsole_notify = true;
+}
 /** Register kconsole command.
  *
  * @param cmd Structure describing the command.

 /branches/dynload/kernel/generic/src/lib/memstr.c
 ,5 → 1,6
 /*
  * Copyright (c) 2001-2004 Jakub Jermar
+ * Copyright (c) 2008 Jiri Svoboda
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
 ,6 → 77,51
     return (char *) dst;
 }
+/** Move memory block with possible overlapping.
+ *
+ * Copy cnt bytes from src address to dst address. The source and destination
+ * memory areas may overlap.
+ *
+ * @param src       Source address to copy from.
+ * @param dst       Destination address to copy to.
+ * @param cnt       Number of bytes to copy.
+ *
+ * @return      Destination address.
+ */
+void *memmove(void *dst, const void *src, size_t n)
+{
+    const uint8_t *sp;
+    uint8_t *dp;
+    /* Nothing to do? */
+    if (src == dst)
+        return dst;
+    /* Non-overlapping? */
+    if (dst >= src + n || src >= dst + n) {
+        return memcpy(dst, src, n);
+    }
+    /* Which direction? */
+    if (src > dst) {
+        /* Forwards. */
+        sp = src;
+        dp = dst;
+        while (n-- != 0)
+            *dp++ = *sp++;
+    } else {
+        /* Backwards. */
+        sp = src + (n - 1);
+        dp = dst + (n - 1);
+        while (n-- != 0)
+            *dp-- = *sp--;
+    }
+    return dst;
+}
 /** Fill block of memory
  *
  * Fill cnt bytes at dst address with the value x.  The filling is done

 /branches/dynload/kernel/arch/sparc64/include/types.h
 ,11 → 54,11
 typedef uint64_t ipl_t;
-typedef uint64_t ioport_t;
 typedef uint64_t unative_t;
 typedef int64_t native_t;
+typedef uintptr_t ioport_t;
 /**< Formats for uintptr_t, size_t, count_t and index_t */
 #define PRIp "llx"
 #define PRIs "llu"

 /branches/dynload/kernel/arch/sparc64/src/trap/trap_table.S
 ,10 → 606,10
     add %sp, PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_TNPC, %o1
 .else
     /*
-     * Call the higher-level syscall handler.
+     * Call the higher-level syscall handler and enable interrupts.
      */
     call syscall_handler
-    nop
+    wrpr %g0, PSTATE_PRIV_BIT | PSTATE_PEF_BIT | PSTATE_IE_BIT, %pstate
     mov %o0, %i0                ! copy the value returned by the syscall
 .endif

 /branches/dynload/kernel/arch/ia64/include/interrupt.h
 ,10 → 53,10
 #define VECTOR_TLB_SHOOTDOWN_IPI 0xf0
 #define INTERRUPT_TIMER     255
-#define IRQ_KBD         (0x01+LAGACY_INTERRUPT_BASE)
-#define IRQ_MOUSE       (0x0c+LAGACY_INTERRUPT_BASE)
+#define IRQ_KBD         (0x01 + LEGACY_INTERRUPT_BASE)
+#define IRQ_MOUSE       (0x0c + LEGACY_INTERRUPT_BASE)
 #define INTERRUPT_SPURIOUS  15
-#define LAGACY_INTERRUPT_BASE   0x20
+#define LEGACY_INTERRUPT_BASE   0x20
 /** General Exception codes. */
 #define GE_ILLEGALOP        0
 ,7 → 117,7
     /*
      * The following variables are defined only for break_instruction
-     * handler.
+     * handler.
      */
     uint64_t in0;
     uint64_t in1;
 ,7 → 153,6
 extern void external_interrupt(uint64_t vector, istate_t *istate);
 extern void disabled_fp_register(uint64_t vector, istate_t *istate);
 #endif
 /** @}

 /branches/dynload/kernel/arch/ia64/include/types.h
 ,6 → 65,8
 typedef uint64_t unative_t;
 typedef int64_t native_t;
+typedef uintptr_t ioport_t;
 #define PRIp "lx"   /**< Format for uintptr_t. */
 #define PRIs "lu"   /**< Format for size_t. */
 #define PRIc "lu"   /**< Format for count_t. */

 /branches/dynload/kernel/arch/ia64/include/atomic.h
 ,16 → 37,17
 /** Atomic addition.
  *
- * @param val Atomic value.
- * @param imm Value to add.
+ * @param val       Atomic value.
+ * @param imm       Value to add.
  *
- * @return Value before addition.
+ * @return      Value before addition.
  */
 static inline long atomic_add(atomic_t *val, int imm)
 {
     long v;
-    asm volatile ("fetchadd8.rel %0 = %1, %2\n" : "=r" (v), "+m" (val->count) : "i" (imm));
+    asm volatile ("fetchadd8.rel %0 = %1, %2\n" : "=r" (v),
+        "+m" (val->count) : "i" (imm));
     return v;
 }
 ,9 → 57,9
     uint64_t v;
     asm volatile (
-        "movl %0=0x01;;\n"
-        "xchg8 %0=%1,%0;;\n"
-        : "=r" (v),"+m" (val->count)
+        "movl %0 = 0x01;;\n"
+        "xchg8 %0 = %1, %0;;\n"
+        : "=r" (v), "+m" (val->count)
     );
     return v;
 ,15 → 66,36
 }
-static inline void atomic_inc(atomic_t *val) { atomic_add(val, 1); }
-static inline void atomic_dec(atomic_t *val) { atomic_add(val, -1); }
+static inline void atomic_inc(atomic_t *val)
+{
+    atomic_add(val, 1);
+}
-static inline long atomic_preinc(atomic_t *val) { return atomic_add(val, 1) + 1; }
-static inline long atomic_predec(atomic_t *val) { return atomic_add(val, -1) - 1; }
+static inline void atomic_dec(atomic_t *val)
+{
+    atomic_add(val, -1);
+}
-static inline long atomic_postinc(atomic_t *val) { return atomic_add(val, 1); }
-static inline long atomic_postdec(atomic_t *val) { return atomic_add(val, -1); }
+static inline long atomic_preinc(atomic_t *val)
+{
+    return atomic_add(val, 1) + 1;
+}
+static inline long atomic_predec(atomic_t *val)
+{
+    return atomic_add(val, -1) - 1;
+}
+static inline long atomic_postinc(atomic_t *val)
+{
+    return atomic_add(val, 1);
+}
+static inline long atomic_postdec(atomic_t *val)
+{
+    return atomic_add(val, -1);
+}
 #endif
 /** @}

 /branches/dynload/kernel/arch/ia64/include/proc/task.h
 ,7 → 43,7
 } task_arch_t;
-#define task_create_arch(t) {(t)->arch.iomap=NULL;}
+#define task_create_arch(t) { (t)->arch.iomap = NULL; }
 #define task_destroy_arch(t)
 #endif

/branches/dynload/kernel/arch/ia64/include/bootinfo.h
68,7 → 68,6
unsigned long freq_scale;
unsigned int wakeup_intno;
int hello_configured;

} bootinfo_t;

extern bootinfo_t *bootinfo;

 /branches/dynload/kernel/arch/ia64/include/asm.h
 ,38 → 39,38
 #include <arch/types.h>
 #include <arch/register.h>
-typedef uint64_t ioport_t;
 #define IA64_IOSPACE_ADDRESS 0xE001000000000000ULL
-static inline void  outb(ioport_t port,uint8_t v)
+static inline void  outb(ioport_t port, uint8_t v)
 {
-    *((uint8_t *)(IA64_IOSPACE_ADDRESS + ( (port & 0xfff) | ( (port >> 2) << 12 )))) = v;
+    *((uint8_t *)(IA64_IOSPACE_ADDRESS +
+        ((port & 0xfff) | ((port >> 2) << 12)))) = v;
     asm volatile ("mf\n" ::: "memory");
 }
-static inline void  outw(ioport_t port,uint16_t v)
+static inline void  outw(ioport_t port, uint16_t v)
 {
-    *((uint16_t *)(IA64_IOSPACE_ADDRESS + ( (port & 0xfff) | ( (port >> 2) << 12 )))) = v;
+    *((uint16_t *)(IA64_IOSPACE_ADDRESS +
+        ((port & 0xfff) | ((port >> 2) << 12)))) = v;
     asm volatile ("mf\n" ::: "memory");
 }
-static inline void  outl(ioport_t port,uint32_t v)
+static inline void  outl(ioport_t port, uint32_t v)
 {
-    *((uint32_t *)(IA64_IOSPACE_ADDRESS + ( (port & 0xfff) | ( (port >> 2) << 12 )))) = v;
+    *((uint32_t *)(IA64_IOSPACE_ADDRESS +
+        ((port & 0xfff) | ((port >> 2) << 12)))) = v;
     asm volatile ("mf\n" ::: "memory");
 }
 static inline uint8_t inb(ioport_t port)
 {
     asm volatile ("mf\n" ::: "memory");
-    return *((uint8_t *)(IA64_IOSPACE_ADDRESS + ( (port & 0xfff) | ( (port >> 2) << 12 ))));
+    return *((uint8_t *)(IA64_IOSPACE_ADDRESS +
+        ((port & 0xfff) | ((port >> 2) << 12))));
 }
 static inline uint16_t inw(ioport_t port)
 ,7 → 77,8
 {
     asm volatile ("mf\n" ::: "memory");
-    return *((uint16_t *)(IA64_IOSPACE_ADDRESS + ( (port & 0xffE) | ( (port >> 2) << 12 ))));
+    return *((uint16_t *)(IA64_IOSPACE_ADDRESS +
+        ((port & 0xffE) | ((port >> 2) << 12))));
 }
 static inline uint32_t inl(ioport_t port)
 ,11 → 85,10
 {
     asm volatile ("mf\n" ::: "memory");
-    return *((uint32_t *)(IA64_IOSPACE_ADDRESS + ( (port & 0xfff) | ( (port >> 2) << 12 ))));
+    return *((uint32_t *)(IA64_IOSPACE_ADDRESS +
+        ((port & 0xfff) | ((port >> 2) << 12))));
 }
 /** Return base address of current stack
  *
  * Return the base address of the current stack.
 ,7 → 342,8
 extern void cpu_sleep(void);
 extern void asm_delay_loop(uint32_t t);
-extern void switch_to_userspace(uintptr_t entry, uintptr_t sp, uintptr_t bsp, uintptr_t uspace_uarg, uint64_t ipsr, uint64_t rsc);
+extern void switch_to_userspace(uintptr_t, uintptr_t, uintptr_t, uintptr_t,
+    uint64_t, uint64_t);
 #endif

 /branches/dynload/kernel/arch/ia64/include/mm/frame.h
 ,6 → 41,10
 #ifdef KERNEL
 #ifndef __ASM__
+#include <arch/types.h>
+extern uintptr_t last_frame;
 extern void frame_arch_init(void);
 #define physmem_print()

 /branches/dynload/kernel/arch/ia64/include/mm/page.h
 ,22 → 51,20
 #define USPACE_IO_PAGE_WIDTH        12  /* 4K */
+/*
+ * Statically mapped IO spaces - offsets to 0xe...00 of virtual addresses
+ * because of "minimal virtual bits implemented is 51" it is possible to
+ * have values up to 0x0007000000000000
+ */
-/** Staticly mapped IO spaces - offsets to 0xe...00 of virtual adresses
-becauce of "minimal virtual bits implemented is 51"
-it is possible to have here values up to 0x0007000000000000
-*/
 /* Firmware area (bellow 4GB in phys mem) */
 #define FW_OFFSET             0x00000000F0000000
 /* Legacy IO space */
 #define IO_OFFSET             0x0001000000000000
-/* Videoram - now mapped to 0 as VGA text mode vram on 0xb8000*/
+/* Videoram - now mapped to 0 as VGA text mode vram on 0xb8000 */
 #define VIO_OFFSET            0x0002000000000000
 #define PPN_SHIFT           12
 #define VRN_SHIFT           61
 ,8 → 79,8
 #define REGION_REGISTERS        8
-#define KA2PA(x)    ((uintptr_t) (x-(VRN_KERNEL<<VRN_SHIFT)))
-#define PA2KA(x)    ((uintptr_t) (x+(VRN_KERNEL<<VRN_SHIFT)))
+#define KA2PA(x)    ((uintptr_t) (x - (VRN_KERNEL << VRN_SHIFT)))
+#define PA2KA(x)    ((uintptr_t) (x + (VRN_KERNEL << VRN_SHIFT)))
 #define VHPT_WIDTH          20  /* 1M */
 #define VHPT_SIZE           (1 << VHPT_WIDTH)

 /branches/dynload/kernel/arch/ia64/include/mm/vhpt.h
 ,8 → 44,8
 {
     vhpt_entry_t ventry;
-    ventry.word[0]=tentry.word[0];
-    ventry.word[1]=tentry.word[1];
+    ventry.word[0] = tentry.word[0];
+    ventry.word[1] = tentry.word[1];
     return ventry;
 }

 /branches/dynload/kernel/arch/ia64/include/register.h
 ,11 → 40,11
 #define PSR_I_MASK  0x4000
 #define PSR_PK_MASK 0x8000
-#define PSR_DT_MASK (1<<17)
-#define PSR_RT_MASK (1<<27)
+#define PSR_DT_MASK (1 << 17)
+#define PSR_RT_MASK (1 << 27)
-#define PSR_DFL_MASK    (1<<18)
-#define PSR_DFH_MASK    (1<<19)
+#define PSR_DFL_MASK    (1 << 18)
+#define PSR_DFH_MASK    (1 << 19)
 #define PSR_IT_MASK 0x0000001000000000

/branches/dynload/kernel/arch/ia64/include/debug.h
1,5 → 1,5
/*
* Copyright (c) 2005
* Copyright (c) 2005 Ondrej Palkovsky
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without

 /branches/dynload/kernel/arch/ia64/include/cpu.h
 ,16 → 83,13
 }
-static inline void ipi_send_ipi(int id,int eid,int intno)
+static inline void ipi_send_ipi(int id, int eid, int intno)
 {
-    (bootinfo->sapic)[2*(id*256+eid)]=intno;
+    (bootinfo->sapic)[2 * (id * 256 + eid)] = intno;
     srlz_d();
 }
 #endif
 /** @}

 /branches/dynload/kernel/arch/ia64/include/drivers/ega.h
 ,6 → 1,5
 /*
- * Copyright (c) 2001-2004 Jakub Jermar
- * 2007 Jakub Vana
+ * Copyright (c) 2008 Jakub Jermar
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
 ,7 → 26,7
  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  */
-/** @addtogroup ia32
+/** @addtogroup ia64
  * @{
  */
 /** @file
 ,14 → 35,9
 #ifndef KERN_ia64_EGA_H
 #define KERN_ia64_EGA_H
-#define VIDEORAM (0xe0020000000B8000LL)
+#define EGA_VIDEORAM    0xb8000
+#define EGA_BASE    0x3d4
-#define ROW     80
-#define ROWS        25
-#define SCREEN      (ROW * ROWS)
-extern void ega_init(void);
 #endif
 /** @}

 /branches/dynload/kernel/arch/ia64/Makefile.inc
 ,7 → 59,6
 CONFIG_ASID = y
 CONFIG_ASID_FIFO = y
 ## Compile with support for software integer division.
 #
 ,14 → 87,13
 ifeq ($(MACHINE),ski)
     ARCH_SOURCES += arch/$(ARCH)/src/ski/ski.c
     DEFS += -DSKI
-#   BFD = elf64-ia64-little
     BFD = binary
 endif
 ifeq ($(MACHINE),i460GX)
-    ARCH_SOURCES += arch/$(ARCH)/src/drivers/ega.c
     CONFIG_I8042 = y
-    DEFS += -DI460GX -DCONFIG_I8042
+    CONFIG_EGA = y
+    DEFS += -DI460GX -DCONFIG_I8042 -DCONFIG_EGA
     BFD = binary
 endif

/branches/dynload/kernel/arch/ia64/src/putchar.c
File deleted

 /branches/dynload/kernel/arch/ia64/src/fpu_context.c
 ,8 → 149,10
         "stf.spill [%7] = f127, 0x80\n;;"
         :
-        : "r" (&((fctx->fr)[0])), "r" (&((fctx->fr)[1])), "r" (&((fctx->fr)[2])), "r" (&((fctx->fr)[3])),
-          "r" (&((fctx->fr)[4])), "r" (&((fctx->fr)[5])), "r" (&((fctx->fr)[6])), "r" (&((fctx->fr)[7]))
+        : "r" (&((fctx->fr)[0])), "r" (&((fctx->fr)[1])),
+          "r" (&((fctx->fr)[2])), "r" (&((fctx->fr)[3])),
+          "r" (&((fctx->fr)[4])), "r" (&((fctx->fr)[5])),
+          "r" (&((fctx->fr)[6])), "r" (&((fctx->fr)[7]))
     );
 }
 ,14 → 269,16
         "ldf.fill f127 = [%7], 0x80\n;;"
         :
-        : "r" (&((fctx->fr)[0])), "r" (&((fctx->fr)[1])), "r" (&((fctx->fr)[2])), "r" (&((fctx->fr)[3])),
-          "r" (&((fctx->fr)[4])), "r" (&((fctx->fr)[5])), "r" (&((fctx->fr)[6])), "r" (&((fctx->fr)[7]))
+        : "r" (&((fctx->fr)[0])), "r" (&((fctx->fr)[1])),
+          "r" (&((fctx->fr)[2])), "r" (&((fctx->fr)[3])),
+          "r" (&((fctx->fr)[4])), "r" (&((fctx->fr)[5])),
+          "r" (&((fctx->fr)[6])), "r" (&((fctx->fr)[7]))
     );
 }
 void fpu_enable(void)
 {
-    uint64_t a = 0 ;
+    uint64_t a = 0;
     asm volatile (
         "rsm %0 ;;"

 /branches/dynload/kernel/arch/ia64/src/smp/smp.c
 ,126 → 61,108
 #include <panic.h>
 #include <print.h>
 #ifdef CONFIG_SMP
 extern char cpu_by_id_eid_list[256][256];
 static void sapic_init(void)
 {
-    bootinfo->sapic=(unative_t *)(PA2KA((unative_t)(bootinfo->sapic))|FW_OFFSET);
+    bootinfo->sapic = (unative_t *)(PA2KA((unative_t)(bootinfo->sapic)) |
+        FW_OFFSET);
 }
-static void ipi_broadcast_arch_all(int ipi )
+static void ipi_broadcast_arch_all(int ipi)
 {
-    int id,eid;
-    int myid,myeid;
+    int id, eid;
+    int myid, myeid;
-    myid=ia64_get_cpu_id();
-    myeid=ia64_get_cpu_eid();
+    myid = ia64_get_cpu_id();
+    myeid = ia64_get_cpu_eid();
-    for(id=0;id<256;id++)
-        for(eid=0;eid<256;eid++)
-            if((id!=myid) || (eid!=myeid))
-                ipi_send_ipi(id,eid,ipi);
+    for (id = 0; id < 256; id++)
+        for (eid = 0; eid < 256; eid++)
+            if ((id != myid) || (eid != myeid))
+                ipi_send_ipi(id, eid, ipi);
 }
 void ipi_broadcast_arch(int ipi )
 {
-    int id,eid;
-    int myid,myeid;
+    int id, eid;
+    int myid, myeid;
-    myid=ia64_get_cpu_id();
-    myeid=ia64_get_cpu_eid();
+    myid = ia64_get_cpu_id();
+    myeid = ia64_get_cpu_eid();
-    //printf("Sending ipi %d on %d\n",ipi,CPU->id);
-    for(id=0;id<256;id++)
-        for(eid=0;eid<256;eid++)
-            if((id!=myid) || (eid!=myeid))
-                if(cpu_by_id_eid_list[id][eid])
-                    ipi_send_ipi(id,eid,ipi);
+    for (id = 0; id < 256; id++)
+        for (eid = 0; eid < 256; eid++)
+            if ((id != myid) || (eid != myeid))
+                if (cpu_by_id_eid_list[id][eid])
+                    ipi_send_ipi(id, eid, ipi);
 }
 void smp_init(void)
 {
-    if(!bootinfo->hello_configured) return;
-    //If we have not system prepared by hello, we are not able to start AP's
-    //this means we are running on simulator
+    if (!bootinfo->hello_configured)
+        return;
+    /*
+     * If we have not got system prepared by hello, we are not able to start
+     * AP's. This means we are running on a simulator.
+     */
     sapic_init();
     ipi_broadcast_arch_all(bootinfo->wakeup_intno);
     volatile long long brk;
-        for(brk=0;brk<100LL*1024LL*1024LL;brk++); //wait a while before CPUs starts
+        for (brk = 0; brk < 100LL * 1024LL * 1024LL; brk++)
+        ;   /* wait a while before CPUs starts */
-    config.cpu_count=0;
-    int id,eid;
+    config.cpu_count = 0;
+    int id, eid;
-    for(id=0;id<256;id++)
-        for(eid=0;eid<256;eid++)
-                if(cpu_by_id_eid_list[id][eid]==1){
+    for (id = 0; id < 256; id++)
+        for (eid = 0; eid < 256; eid++)
+                if (cpu_by_id_eid_list[id][eid] == 1) {
                     config.cpu_count++;
-                    cpu_by_id_eid_list[id][eid]=2;
+                    cpu_by_id_eid_list[id][eid] = 2;
             }
 }
 void kmp(void *arg __attribute__((unused)))
 {
-    int id,eid;
-    int myid,myeid;
+    int id, eid;
+    int myid, myeid;
-    myid=ia64_get_cpu_id();
-    myeid=ia64_get_cpu_eid();
+    myid = ia64_get_cpu_id();
+    myeid = ia64_get_cpu_eid();
-    for(id=0;id<256;id++)
-        for(eid=0;eid<256;eid++)
-                if((id!=myid) || (eid!=myeid))
-                    if(cpu_by_id_eid_list[id][eid]!=0){
-                        if(cpu_by_id_eid_list[id][eid]==1){
-                            //config.cpu_count++;
-                            //cpu_by_id_eid_list[id][eid]=2;
-                            printf("Found Late CPU ID:%d EDI:%d Not added to system!!!\n",id,eid);
+    for (id = 0; id < 256; id++)
+        for (eid = 0; eid < 256; eid++)
+                if ((id != myid) || (eid != myeid))
+                    if (cpu_by_id_eid_list[id][eid] != 0) {
+                        if (cpu_by_id_eid_list[id][eid] == 1) {
+                            printf("Found Late CPU ID:%d "
+                            "EDI:%d Not added to "
+                            "system!!!\n", id, eid);
                             continue;
-                            }
-                    cpu_by_id_eid_list[id][eid]=3;
+                    }
+                    cpu_by_id_eid_list[id][eid] = 3;
                     /*
-                     * There may be just one AP being initialized at
-                     * the time. After it comes completely up, it is
+                     * There may be just one AP being
+                     * initialized at the time. After
+                     * it comes completely up, it is
                      * supposed to wake us up.
                      */
-                    if (waitq_sleep_timeout(&ap_completion_wq, 1000000,
-                        SYNCH_FLAGS_NONE) == ESYNCH_TIMEOUT) {
-                        printf("%s: waiting for cpu ID:%d EID:%d"
-                            "timed out\n", __FUNCTION__,
-                            id, eid);
-                        }
+                    if (waitq_sleep_timeout(
+                        &ap_completion_wq, 1000000,
+                        SYNCH_FLAGS_NONE) ==
+                        ESYNCH_TIMEOUT) {
+                        printf("%s: waiting for cpu "
+                            "ID:%d EID:%d timed out\n",
+                            __FUNCTION__, id, eid);
+                        }
                 }
 }
-#endif
-/*This is just a hack for linking with assembler - may be removed in future*/
-#ifndef CONFIG_SMP
-void main_ap(void);
-void main_ap(void)
-{
-    while(1);
-}
 #endif
 /** @}

 /branches/dynload/kernel/arch/ia64/src/ddi/ddi.c
 ,5 → 1,6
 /*
- * Copyright (c) 2006 Jakub Jermar, Jakub vana
+ * Copyright (c) 2006 Jakub Jermar
+ * Copyright (c) 2008 Jakub vana
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
 ,38 → 39,36
 #include <mm/slab.h>
 #include <errno.h>
-#define IO_MEMMAP_PAGES 16384
-#define PORTS_PER_PAGE 4
+#define IO_MEMMAP_PAGES 16384
+#define PORTS_PER_PAGE  4
 /** Enable I/O space range for task.
  *
  * Interrupts are disabled and task is locked.
  *
- * @param task Task.
- * @param ioaddr Startign I/O space address.
- * @param size Size of the enabled I/O range.
+ * @param task      Task.
+ * @param ioaddr    Starting I/O space address.
+ * @param size      Size of the enabled I/O range.
  *
  * @return 0 on success or an error code from errno.h.
  */
 int ddi_iospace_enable_arch(task_t *task, uintptr_t ioaddr, size_t size)
 {
+    if (!task->arch.iomap) {
+        uint8_t *map;
-    if(!task->arch.iomap)
-    {
-        uint8_t *map;
-        task->arch.iomap=malloc(sizeof(bitmap_t),0);
-        map=malloc(BITS2BYTES(IO_MEMMAP_PAGES),0);
+        task->arch.iomap = malloc(sizeof(bitmap_t), 0);
+        map = malloc(BITS2BYTES(IO_MEMMAP_PAGES), 0);
         if(!map)
             return ENOMEM;
-        bitmap_initialize(task->arch.iomap,map,IO_MEMMAP_PAGES);
-        bitmap_clear_range(task->arch.iomap,0,IO_MEMMAP_PAGES);
+        bitmap_initialize(task->arch.iomap, map, IO_MEMMAP_PAGES);
+        bitmap_clear_range(task->arch.iomap, 0, IO_MEMMAP_PAGES);
     }
     uintptr_t iopage = ioaddr / PORTS_PER_PAGE;
-    size = ALIGN_UP (size+ioaddr-4*iopage,PORTS_PER_PAGE);
-    bitmap_set_range(task->arch.iomap,iopage,size/4);
+    size = ALIGN_UP(size + ioaddr - 4 * iopage, PORTS_PER_PAGE);
+    bitmap_set_range(task->arch.iomap, iopage, size / 4);
     return 0;
 }

 /branches/dynload/kernel/arch/ia64/src/asm.S
 ,6 → 128,10
 memsetb:
     br _memsetb
+.global memsetw
+memsetw:
+    br _memsetw
 .global cpu_halt
 cpu_halt:
     br cpu_halt

 /branches/dynload/kernel/arch/ia64/src/proc/scheduler.c
 ,14 → 47,17
 {
 }
-/** Prepare kernel stack pointers in bank 0 r22 and r23 and make sure the stack is mapped in DTR. */
+/** Prepare kernel stack pointers in bank 0 r22 and r23 and make sure the stack
+ * is mapped in DTR.
+ */
 void before_thread_runs_arch(void)
 {
     uintptr_t base;
-    base = ALIGN_DOWN(config.base, 1<<KERNEL_PAGE_WIDTH);
+    base = ALIGN_DOWN(config.base, 1 << KERNEL_PAGE_WIDTH);
-    if ((uintptr_t) THREAD->kstack < base || (uintptr_t) THREAD->kstack > base + (1<<(KERNEL_PAGE_WIDTH))) {
+    if ((uintptr_t) THREAD->kstack < base ||
+        (uintptr_t) THREAD->kstack > base + (1 << (KERNEL_PAGE_WIDTH))) {
         /*
          * Kernel stack of this thread is not mapped by DTR[TR_KERNEL].
          * Use DTR[TR_KSTACK1] and DTR[TR_KSTACK2] to map it.
 ,8 → 67,11
         dtr_purge((uintptr_t) THREAD->kstack, PAGE_WIDTH+1);
         /* insert DTR[TR_STACK1] and DTR[TR_STACK2] */
-        dtlb_kernel_mapping_insert((uintptr_t) THREAD->kstack, KA2PA(THREAD->kstack), true, DTR_KSTACK1);
-        dtlb_kernel_mapping_insert((uintptr_t) THREAD->kstack + PAGE_SIZE, KA2PA(THREAD->kstack) + FRAME_SIZE, true, DTR_KSTACK2);
+        dtlb_kernel_mapping_insert((uintptr_t) THREAD->kstack,
+            KA2PA(THREAD->kstack), true, DTR_KSTACK1);
+        dtlb_kernel_mapping_insert((uintptr_t) THREAD->kstack +
+            PAGE_SIZE, KA2PA(THREAD->kstack) + FRAME_SIZE, true,
+            DTR_KSTACK2);
     }
     /*

 /branches/dynload/kernel/arch/ia64/src/ia64.c
 ,8 → 51,9
 #include <syscall/syscall.h>
 #include <ddi/irq.h>
 #include <ddi/device.h>
+#include <arch/bootinfo.h>
 #include <arch/drivers/ega.h>
-#include <arch/bootinfo.h>
+#include <genarch/drivers/ega/ega.h>
 #include <genarch/kbd/i8042.h>
 #include <genarch/kbd/ns16550.h>
 #include <smp/smp.h>
 ,52 → 63,36
 #include <print.h>
 #include <sysinfo/sysinfo.h>
-/*NS16550 as a COM 1*/
-#define NS16550_IRQ (4+LAGACY_INTERRUPT_BASE)
-#define NS16550_PORT 0x3f8
+/* NS16550 as a COM 1 */
+#define NS16550_IRQ (4 + LEGACY_INTERRUPT_BASE)
+#define NS16550_PORT    0x3f8
 bootinfo_t *bootinfo;
-static uint64_t iosapic_base=0xfec00000;
+static uint64_t iosapic_base = 0xfec00000;
 void arch_pre_main(void)
 {
     /* Setup usermode init tasks. */
-//#ifdef I460GX
     unsigned int i;
     init.cnt = bootinfo->taskmap.count;
     for (i = 0; i < init.cnt; i++) {
-        init.tasks[i].addr = ((unsigned long) bootinfo->taskmap.tasks[i].addr) | VRN_MASK;
+        init.tasks[i].addr =
+            ((unsigned long) bootinfo->taskmap.tasks[i].addr) |
+            VRN_MASK;
         init.tasks[i].size = bootinfo->taskmap.tasks[i].size;
     }
-/*
-#else
-    init.cnt = 8;
-    init.tasks[0].addr = INIT0_ADDRESS;
-    init.tasks[0].size = INIT0_SIZE;
-    init.tasks[1].addr = INIT0_ADDRESS + 0x400000;
-    init.tasks[1].size = INIT0_SIZE;
-    init.tasks[2].addr = INIT0_ADDRESS + 0x800000;
-    init.tasks[2].size = INIT0_SIZE;
-    init.tasks[3].addr = INIT0_ADDRESS + 0xc00000;
-    init.tasks[3].size = INIT0_SIZE;
-    init.tasks[4].addr = INIT0_ADDRESS + 0x1000000;
-    init.tasks[4].size = INIT0_SIZE;
-    init.tasks[5].addr = INIT0_ADDRESS + 0x1400000;
-    init.tasks[5].size = INIT0_SIZE;
-    init.tasks[6].addr = INIT0_ADDRESS + 0x1800000;
-    init.tasks[6].size = INIT0_SIZE;
-    init.tasks[7].addr = INIT0_ADDRESS + 0x1c00000;
-    init.tasks[7].size = INIT0_SIZE;
-#endif*/
 }
 void arch_pre_mm_init(void)
 {
-    /* Set Interruption Vector Address (i.e. location of interruption vector table). */
+    /*
+     * Set Interruption Vector Address (i.e. location of interruption vector
+     * table).
+     */
     iva_write((uintptr_t) &ivt);
     srlz_d();
 ,26 → 100,25
 static void iosapic_init(void)
 {
-    uint64_t IOSAPIC = PA2KA((unative_t)(iosapic_base))|FW_OFFSET;
+    uint64_t IOSAPIC = PA2KA((unative_t)(iosapic_base)) | FW_OFFSET;
     int i;
-    int myid,myeid;
+    int myid, myeid;
-    myid=ia64_get_cpu_id();
-    myeid=ia64_get_cpu_eid();
+    myid = ia64_get_cpu_id();
+    myeid = ia64_get_cpu_eid();
-    for(i=0;i<16;i++)
-    {
-        if(i==2) continue;   //Disable Cascade interrupt
-        ((uint32_t*)(IOSAPIC+0x00))[0]=0x10+2*i;
+    for (i = 0; i < 16; i++) {
+        if (i == 2)
+            continue;    /* Disable Cascade interrupt */
+        ((uint32_t *)(IOSAPIC + 0x00))[0] = 0x10 + 2 * i;
         srlz_d();
-        ((uint32_t*)(IOSAPIC+0x10))[0]=LAGACY_INTERRUPT_BASE+i;
+        ((uint32_t *)(IOSAPIC + 0x10))[0] = LEGACY_INTERRUPT_BASE + i;
         srlz_d();
-        ((uint32_t*)(IOSAPIC+0x00))[0]=0x10+2*i+1;
+        ((uint32_t *)(IOSAPIC + 0x00))[0] = 0x10 + 2 * i + 1;
         srlz_d();
-        ((uint32_t*)(IOSAPIC+0x10))[0]=myid<<(56-32) | myeid<<(48-32);
+        ((uint32_t *)(IOSAPIC + 0x10))[0] = myid << (56 - 32) |
+            myeid << (48 - 32);
         srlz_d();
     }
 ,15 → 127,13
 void arch_post_mm_init(void)
 {
-    if(config.cpu_active==1)
-    {
+    if (config.cpu_active == 1) {
         iosapic_init();
         irq_init(INR_COUNT, INR_COUNT);
 #ifdef SKI
         ski_init_console();
 #else
-        ega_init();
+        ega_init(EGA_BASE, EGA_VIDEORAM);
 #endif
     }
     it_init();
 ,57 → 169,38
 }
 #endif
-void end_of_irq_void(void *cir_arg __attribute__((unused)),inr_t inr __attribute__((unused)));
-void end_of_irq_void(void *cir_arg __attribute__((unused)),inr_t inr __attribute__((unused)))
-{
-    return;
-}
 void arch_post_smp_init(void)
 {
+    thread_t *t;
-    {
-        /*
-         * Create thread that polls keyboard.
-         */
+    /*
+     * Create thread that polls keyboard.
+     */
 #ifdef SKI
-        thread_t *t;
-        t = thread_create(kkbdpoll, NULL, TASK, 0, "kkbdpoll", true);
-        if (!t)
-            panic("cannot create kkbdpoll\n");
-        thread_ready(t);
+    t = thread_create(kkbdpoll, NULL, TASK, 0, "kkbdpoll", true);
+    if (!t)
+        panic("cannot create kkbdpoll\n");
+    thread_ready(t);
 #endif
 #ifdef I460GX
-        devno_t kbd = device_assign_devno();
-        /* keyboard controller */
+    devno_t kbd = device_assign_devno();
 #ifdef CONFIG_NS16550
-        ns16550_init(kbd, NS16550_PORT, NS16550_IRQ,end_of_irq_void,NULL); // as a COM 1
+    ns16550_init(kbd, NS16550_PORT, NS16550_IRQ, NULL, NULL);
 #else
-        devno_t mouse = device_assign_devno();
-        i8042_init(kbd, IRQ_KBD, mouse, IRQ_MOUSE);
+    devno_t mouse = device_assign_devno();
+    i8042_init(kbd, IRQ_KBD, mouse, IRQ_MOUSE);
 #endif
-        thread_t *t;
-        t = thread_create(i8042_kkbdpoll, NULL, TASK, 0, "kkbdpoll", true);
-        if (!t)
-            panic("cannot create kkbdpoll\n");
-        thread_ready(t);
+    t = thread_create(i8042_kkbdpoll, NULL, TASK, 0, "kkbdpoll", true);
+    if (!t)
+        panic("cannot create kkbdpoll\n");
+    thread_ready(t);
 #endif
-    }
     sysinfo_set_item_val("ia64_iospace", NULL, true);
     sysinfo_set_item_val("ia64_iospace.address", NULL, true);
     sysinfo_set_item_val("ia64_iospace.address.virtual", NULL, IO_OFFSET);
 }
 ,26 → 212,25
     psr.value = psr_read();
     psr.cpl = PL_USER;
-    psr.i = true;               /* start with interrupts enabled */
+    psr.i = true;           /* start with interrupts enabled */
     psr.ic = true;
-    psr.ri = 0;             /* start with instruction #0 */
-    psr.bn = 1;             /* start in bank 0 */
+    psr.ri = 0;         /* start with instruction #0 */
+    psr.bn = 1;         /* start in bank 0 */
     asm volatile ("mov %0 = ar.rsc\n" : "=r" (rsc.value));
     rsc.loadrs = 0;
     rsc.be = false;
     rsc.pl = PL_USER;
-    rsc.mode = 3;               /* eager mode */
+    rsc.mode = 3;           /* eager mode */
     switch_to_userspace((uintptr_t) kernel_uarg->uspace_entry,
-                ((uintptr_t) kernel_uarg->uspace_stack)+PAGE_SIZE-ALIGN_UP(STACK_ITEM_SIZE, STACK_ALIGNMENT),
-                ((uintptr_t) kernel_uarg->uspace_stack)+PAGE_SIZE,
-                (uintptr_t) kernel_uarg->uspace_uarg,
-                psr.value, rsc.value);
+        ((uintptr_t) kernel_uarg->uspace_stack) + PAGE_SIZE -
+        ALIGN_UP(STACK_ITEM_SIZE, STACK_ALIGNMENT),
+        ((uintptr_t) kernel_uarg->uspace_stack) + PAGE_SIZE,
+        (uintptr_t) kernel_uarg->uspace_uarg, psr.value, rsc.value);
-    while (1) {
+    while (1)
         ;
-    }
 }
 /** Set thread-local-storage pointer.
 ,13 → 250,14
 #ifdef SKI
     ski_kbd_grab();
 #else
-    #ifdef CONFIG_NS16550
-        ns16550_grab();
-    #else
-        i8042_grab();
-    #endif
+#ifdef CONFIG_NS16550
+    ns16550_grab();
+#else
+    i8042_grab();
 #endif
+#endif
 }
 /** Return console to userspace
  *
  */
 ,19 → 266,19
 #ifdef SKI
     ski_kbd_release();
 #else
-    #ifdef CONFIG_NS16550
-        ns16550_release();
-    #else
-        i8042_release();
-    #endif
+#ifdef CONFIG_NS16550
+    ns16550_release();
+#else
+    i8042_release();
+#endif
 #endif
 }
 void arch_reboot(void)
 {
-    outb(0x64,0xfe);
-    while (1);
+    outb(0x64, 0xfe);
+    while (1)
+        ;
 }
 /** @}

 /branches/dynload/kernel/arch/ia64/src/ski/ski.c
 ,7 → 118,7
     while(!(ch = ski_getchar()))
         ;
-    if(ch == '\r')
+    if (ch == '\r')
         ch = '\n';
     return (char) ch;
 }
 ,7 → 143,8
     if(ch == '\r')
         ch = '\n';
     if (ch) {
-        if (ski_kbd_irq.notif_cfg.notify && ski_kbd_irq.notif_cfg.answerbox) {
+        if (ski_kbd_irq.notif_cfg.notify &&
+            ski_kbd_irq.notif_cfg.answerbox) {
             chardev_push_character(&ski_uconsole, ch);
             ipc_irq_send_notif(&ski_kbd_irq);
         } else {
 ,7 → 157,8
     }
     if (last) {
-        if (ski_kbd_irq.notif_cfg.notify && ski_kbd_irq.notif_cfg.answerbox) {
+        if (ski_kbd_irq.notif_cfg.notify &&
+            ski_kbd_irq.notif_cfg.answerbox) {
             chardev_push_character(&ski_uconsole, 0);
             ipc_irq_send_notif(&ski_kbd_irq);
         }

 /branches/dynload/kernel/arch/ia64/src/cpu/cpu.c
 ,8 → 70,8
     }
     printf("cpu%d: %s (%s), archrev=%d, model=%d, revision=%d\n", CPU->id,
-        family_str, vendor, CPU->arch.cpuid3.archrev, CPU->arch.cpuid3.model,
-        CPU->arch.cpuid3.revision);
+        family_str, vendor, CPU->arch.cpuid3.archrev,
+        CPU->arch.cpuid3.model, CPU->arch.cpuid3.revision);
 }
 /** @}

 /branches/dynload/kernel/arch/ia64/src/mm/tlb.c
 ,7 → 92,7
 /** Invalidate entries belonging to an address space.
  *
- * @param asid Address space identifier.
+ * @param asid      Address space identifier.
  */
 void tlb_invalidate_asid(asid_t asid)
 {
 ,59 → 131,45
     uint64_t ps;
     switch (b) {
-    case 0: /*cnt 1-3*/
+    case 0: /* cnt 1 - 3 */
         ps = PAGE_WIDTH;
         break;
-    case 1: /*cnt 4-15*/
-        /*cnt=((cnt-1)/4)+1;*/
-        ps = PAGE_WIDTH+2;
-        va &= ~((1<<ps)-1);
+    case 1: /* cnt 4 - 15 */
+        ps = PAGE_WIDTH + 2;
+        va &= ~((1 << ps) - 1);
         break;
-    case 2: /*cnt 16-63*/
-        /*cnt=((cnt-1)/16)+1;*/
-        ps = PAGE_WIDTH+4;
-        va &= ~((1<<ps)-1);
+    case 2: /* cnt 16 - 63 */
+        ps = PAGE_WIDTH + 4;
+        va &= ~((1 << ps) - 1);
         break;
-    case 3: /*cnt 64-255*/
-        /*cnt=((cnt-1)/64)+1;*/
-        ps = PAGE_WIDTH+6;
-        va &= ~((1<<ps)-1);
+    case 3: /* cnt 64 - 255 */
+        ps = PAGE_WIDTH + 6;
+        va &= ~((1 << ps) - 1);
         break;
-    case 4: /*cnt 256-1023*/
-        /*cnt=((cnt-1)/256)+1;*/
-        ps = PAGE_WIDTH+8;
-        va &= ~((1<<ps)-1);
+    case 4: /* cnt 256 - 1023 */
+        ps = PAGE_WIDTH + 8;
+        va &= ~((1 << ps) - 1);
         break;
-    case 5: /*cnt 1024-4095*/
-        /*cnt=((cnt-1)/1024)+1;*/
-        ps = PAGE_WIDTH+10;
-        va &= ~((1<<ps)-1);
+    case 5: /* cnt 1024 - 4095 */
+        ps = PAGE_WIDTH + 10;
+        va &= ~((1 << ps) - 1);
         break;
-    case 6: /*cnt 4096-16383*/
-        /*cnt=((cnt-1)/4096)+1;*/
-        ps = PAGE_WIDTH+12;
-        va &= ~((1<<ps)-1);
+    case 6: /* cnt 4096 - 16383 */
+        ps = PAGE_WIDTH + 12;
+        va &= ~((1 << ps) - 1);
         break;
-    case 7: /*cnt 16384-65535*/
-    case 8: /*cnt 65536-(256K-1)*/
-        /*cnt=((cnt-1)/16384)+1;*/
-        ps = PAGE_WIDTH+14;
-        va &= ~((1<<ps)-1);
+    case 7: /* cnt 16384 - 65535 */
+    case 8: /* cnt 65536 - (256K - 1) */
+        ps = PAGE_WIDTH + 14;
+        va &= ~((1 << ps) - 1);
         break;
     default:
-        /*cnt=((cnt-1)/(16384*16))+1;*/
-        ps=PAGE_WIDTH+18;
-        va&=~((1<<ps)-1);
+        ps = PAGE_WIDTH + 18;
+        va &= ~((1 << ps) - 1);
         break;
     }
-    /*cnt+=(page!=va);*/
-    for(; va<(page+cnt*(PAGE_SIZE)); va += (1<<ps)) {
-        asm volatile (
-            "ptc.l %0,%1;;"
-            :
-            : "r" (va), "r" (ps<<2)
-        );
-    }
+    for(; va < (page + cnt * PAGE_SIZE); va += (1 << ps))
+        asm volatile ("ptc.l %0, %1;;" :: "r" (va), "r" (ps << 2));
     srlz_d();
     srlz_i();
 ,9 → 182,10
 /** Insert data into data translation cache.
  *
- * @param va Virtual page address.
- * @param asid Address space identifier.
- * @param entry The rest of TLB entry as required by TLB insertion format.
+ * @param va        Virtual page address.
+ * @param asid      Address space identifier.
+ * @param entry     The rest of TLB entry as required by TLB insertion
+ *          format.
  */
 void dtc_mapping_insert(uintptr_t va, asid_t asid, tlb_entry_t entry)
 {
 ,9 → 194,10
 /** Insert data into instruction translation cache.
  *
- * @param va Virtual page address.
- * @param asid Address space identifier.
- * @param entry The rest of TLB entry as required by TLB insertion format.
+ * @param va        Virtual page address.
+ * @param asid      Address space identifier.
+ * @param entry     The rest of TLB entry as required by TLB insertion
+ *          format.
  */
 void itc_mapping_insert(uintptr_t va, asid_t asid, tlb_entry_t entry)
 {
 ,10 → 206,12
 /** Insert data into instruction or data translation cache.
  *
- * @param va Virtual page address.
- * @param asid Address space identifier.
- * @param entry The rest of TLB entry as required by TLB insertion format.
- * @param dtc If true, insert into data translation cache, use instruction translation cache otherwise.
+ * @param va        Virtual page address.
+ * @param asid      Address space identifier.
+ * @param entry     The rest of TLB entry as required by TLB insertion
+ *          format.
+ * @param dtc       If true, insert into data translation cache, use
+ *          instruction translation cache otherwise.
  */
 void tc_mapping_insert(uintptr_t va, asid_t asid, tlb_entry_t entry, bool dtc)
 {
 ,19 → 234,20
     }
     asm volatile (
-        "mov r8=psr;;\n"
+        "mov r8 = psr;;\n"
         "rsm %0;;\n"            /* PSR_IC_MASK */
         "srlz.d;;\n"
         "srlz.i;;\n"
-        "mov cr.ifa=%1\n"       /* va */
-        "mov cr.itir=%2;;\n"        /* entry.word[1] */
-        "cmp.eq p6,p7 = %4,r0;;\n"  /* decide between itc and dtc */
+        "mov cr.ifa = %1\n"     /* va */
+        "mov cr.itir = %2;;\n"      /* entry.word[1] */
+        "cmp.eq p6,p7 = %4,r0;;\n"  /* decide between itc and dtc */
         "(p6) itc.i %3;;\n"
         "(p7) itc.d %3;;\n"
-        "mov psr.l=r8;;\n"
+        "mov psr.l = r8;;\n"
         "srlz.d;;\n"
         :
-        : "i" (PSR_IC_MASK), "r" (va), "r" (entry.word[1]), "r" (entry.word[0]), "r" (dtc)
+        : "i" (PSR_IC_MASK), "r" (va), "r" (entry.word[1]),
+            "r" (entry.word[0]), "r" (dtc)
         : "p6", "p7", "r8"
     );
 ,12 → 260,14
 /** Insert data into instruction translation register.
  *
- * @param va Virtual page address.
- * @param asid Address space identifier.
- * @param entry The rest of TLB entry as required by TLB insertion format.
- * @param tr Translation register.
+ * @param va        Virtual page address.
+ * @param asid      Address space identifier.
+ * @param entry     The rest of TLB entry as required by TLB insertion
+ *          format.
+ * @param tr        Translation register.
  */
-void itr_mapping_insert(uintptr_t va, asid_t asid, tlb_entry_t entry, index_t tr)
+void
+itr_mapping_insert(uintptr_t va, asid_t asid, tlb_entry_t entry, index_t tr)
 {
     tr_mapping_insert(va, asid, entry, false, tr);
 }
 ,12 → 274,14
 /** Insert data into data translation register.
  *
- * @param va Virtual page address.
- * @param asid Address space identifier.
- * @param entry The rest of TLB entry as required by TLB insertion format.
- * @param tr Translation register.
+ * @param va        Virtual page address.
+ * @param asid      Address space identifier.
+ * @param entry     The rest of TLB entry as required by TLB insertion
+ *          format.
+ * @param tr        Translation register.
  */
-void dtr_mapping_insert(uintptr_t va, asid_t asid, tlb_entry_t entry, index_t tr)
+void
+dtr_mapping_insert(uintptr_t va, asid_t asid, tlb_entry_t entry, index_t tr)
 {
     tr_mapping_insert(va, asid, entry, true, tr);
 }
 ,13 → 288,17
 /** Insert data into instruction or data translation register.
  *
- * @param va Virtual page address.
- * @param asid Address space identifier.
- * @param entry The rest of TLB entry as required by TLB insertion format.
- * @param dtr If true, insert into data translation register, use instruction translation register otherwise.
- * @param tr Translation register.
+ * @param va        Virtual page address.
+ * @param asid      Address space identifier.
+ * @param entry     The rest of TLB entry as required by TLB insertion
+ *          format.
+ * @param dtr       If true, insert into data translation register, use
+ *          instruction translation register otherwise.
+ * @param tr        Translation register.
  */
-void tr_mapping_insert(uintptr_t va, asid_t asid, tlb_entry_t entry, bool dtr, index_t tr)
+void
+tr_mapping_insert(uintptr_t va, asid_t asid, tlb_entry_t entry, bool dtr,
+    index_t tr)
 {
     region_register rr;
     bool restore_rr = false;
 ,19 → 319,20
     }
     asm volatile (
-        "mov r8=psr;;\n"
+        "mov r8 = psr;;\n"
         "rsm %0;;\n"            /* PSR_IC_MASK */
         "srlz.d;;\n"
         "srlz.i;;\n"
-        "mov cr.ifa=%1\n"           /* va */
-        "mov cr.itir=%2;;\n"        /* entry.word[1] */
-        "cmp.eq p6,p7=%5,r0;;\n"    /* decide between itr and dtr */
-        "(p6) itr.i itr[%4]=%3;;\n"
-        "(p7) itr.d dtr[%4]=%3;;\n"
-        "mov psr.l=r8;;\n"
+        "mov cr.ifa = %1\n"         /* va */
+        "mov cr.itir = %2;;\n"      /* entry.word[1] */
+        "cmp.eq p6,p7 = %5,r0;;\n"  /* decide between itr and dtr */
+        "(p6) itr.i itr[%4] = %3;;\n"
+        "(p7) itr.d dtr[%4] = %3;;\n"
+        "mov psr.l = r8;;\n"
         "srlz.d;;\n"
         :
-        : "i" (PSR_IC_MASK), "r" (va), "r" (entry.word[1]), "r" (entry.word[0]), "r" (tr), "r" (dtr)
+        : "i" (PSR_IC_MASK), "r" (va), "r" (entry.word[1]),
+            "r" (entry.word[0]), "r" (tr), "r" (dtr)
         : "p6", "p7", "r8"
     );
 ,12 → 345,15
 /** Insert data into DTLB.
  *
- * @param page Virtual page address including VRN bits.
- * @param frame Physical frame address.
- * @param dtr If true, insert into data translation register, use data translation cache otherwise.
- * @param tr Translation register if dtr is true, ignored otherwise.
+ * @param page      Virtual page address including VRN bits.
+ * @param frame     Physical frame address.
+ * @param dtr       If true, insert into data translation register, use data
+ *          translation cache otherwise.
+ * @param tr        Translation register if dtr is true, ignored otherwise.
  */
-void dtlb_kernel_mapping_insert(uintptr_t page, uintptr_t frame, bool dtr, index_t tr)
+void
+dtlb_kernel_mapping_insert(uintptr_t page, uintptr_t frame, bool dtr,
+    index_t tr)
 {
     tlb_entry_t entry;
 ,18 → 379,18
  *
  * Purge DTR entries used by the kernel.
  *
- * @param page Virtual page address including VRN bits.
- * @param width Width of the purge in bits.
+ * @param page      Virtual page address including VRN bits.
+ * @param width     Width of the purge in bits.
  */
 void dtr_purge(uintptr_t page, count_t width)
 {
-    asm volatile ("ptr.d %0, %1\n" : : "r" (page), "r" (width<<2));
+    asm volatile ("ptr.d %0, %1\n" : : "r" (page), "r" (width << 2));
 }
 /** Copy content of PTE into data translation cache.
  *
- * @param t PTE.
+ * @param t     PTE.
  */
 void dtc_pte_copy(pte_t *t)
 {
 ,7 → 416,7
 /** Copy content of PTE into instruction translation cache.
  *
- * @param t PTE.
+ * @param t     PTE.
  */
 void itc_pte_copy(pte_t *t)
 {
 ,8 → 443,8
 /** Instruction TLB fault handler for faults with VHPT turned off.
  *
- * @param vector Interruption vector.
- * @param istate Structure with saved interruption state.
+ * @param vector        Interruption vector.
+ * @param istate        Structure with saved interruption state.
  */
 void alternate_instruction_tlb_fault(uint64_t vector, istate_t *istate)
 {
 ,82 → 473,76
         page_table_unlock(AS, true);
         if (as_page_fault(va, PF_ACCESS_EXEC, istate) == AS_PF_FAULT) {
             fault_if_from_uspace(istate,"Page fault at %p",va);
-            panic("%s: va=%p, rid=%d, iip=%p\n", __func__, va, rid, istate->cr_iip);
+            panic("%s: va=%p, rid=%d, iip=%p\n", __func__, va, rid,
+                istate->cr_iip);
         }
     }
 }
 static int is_io_page_accessible(int page)
 {
-    if(TASK->arch.iomap) return bitmap_get(TASK->arch.iomap,page);
-    else return 0;
+    if (TASK->arch.iomap)
+        return bitmap_get(TASK->arch.iomap, page);
+    else
+        return 0;
 }
 #define IO_FRAME_BASE 0xFFFFC000000
-/** There is special handling of memmaped lagacy io, because
- * of 4KB sized access
- * only for userspace
+/**
+ * There is special handling of memory mapped legacy io, because of 4KB sized
+ * access for userspace.
  *
- * @param va virtual address of page fault
- * @param istate Structure with saved interruption state.
+ * @param va        Virtual address of page fault.
+ * @param istate    Structure with saved interruption state.
  *
- *
- * @return 1 on success, 0 on fail
+ * @return      One on success, zero on failure.
  */
 static int try_memmap_io_insertion(uintptr_t va, istate_t *istate)
 {
-    if((va >= IO_OFFSET ) && (va < IO_OFFSET + (1<<IO_PAGE_WIDTH)))
-        if(TASK){
-            uint64_t io_page=(va &  ((1<<IO_PAGE_WIDTH)-1)) >> (USPACE_IO_PAGE_WIDTH);
-            if(is_io_page_accessible(io_page)){
-                //printf("Insert %llX\n",va);
+    if ((va >= IO_OFFSET ) && (va < IO_OFFSET + (1 << IO_PAGE_WIDTH))) {
+        if (TASK) {
+            uint64_t io_page = (va & ((1 << IO_PAGE_WIDTH) - 1)) >>
+                USPACE_IO_PAGE_WIDTH;
-                uint64_t page,frame;
+            if (is_io_page_accessible(io_page)) {
+                uint64_t page, frame;
-                page = IO_OFFSET + (1 << USPACE_IO_PAGE_WIDTH) * io_page;
-                frame = IO_FRAME_BASE + (1 << USPACE_IO_PAGE_WIDTH) * io_page;
+                page = IO_OFFSET +
+                    (1 << USPACE_IO_PAGE_WIDTH) * io_page;
+                frame = IO_FRAME_BASE +
+                    (1 << USPACE_IO_PAGE_WIDTH) * io_page;
                 tlb_entry_t entry;
                 entry.word[0] = 0;
                 entry.word[1] = 0;
-                entry.p = true;         /* present */
+                entry.p = true;     /* present */
                 entry.ma = MA_UNCACHEABLE;
-                entry.a = true;         /* already accessed */
-                entry.d = true;         /* already dirty */
+                entry.a = true;     /* already accessed */
+                entry.d = true;     /* already dirty */
                 entry.pl = PL_USER;
                 entry.ar = AR_READ | AR_WRITE;
-                entry.ppn = frame >> PPN_SHIFT;    //MUSIM spocitat frame
+                entry.ppn = frame >> PPN_SHIFT;
                 entry.ps = USPACE_IO_PAGE_WIDTH;
-                dtc_mapping_insert(page, TASK->as->asid, entry); //Musim zjistit ASID
+                dtc_mapping_insert(page, TASK->as->asid, entry);
                 return 1;
-            }else {
-                fault_if_from_uspace(istate,"IO access fault at %p",va);
-                return 0;
-            }
-        } else
-            return 0;
-    else
-        return 0;
+            } else {
+                fault_if_from_uspace(istate,
+                    "IO access fault at %p", va);
+            }
+        }
+    }
     return 0;
 }
 /** Data TLB fault handler for faults with VHPT turned off.
  *
- * @param vector Interruption vector.
- * @param istate Structure with saved interruption state.
+ * @param vector    Interruption vector.
+ * @param istate    Structure with saved interruption state.
  */
 void alternate_data_tlb_fault(uint64_t vector, istate_t *istate)
 {
 ,13 → 576,16
         page_table_unlock(AS, true);
     } else {
         page_table_unlock(AS, true);
-        if (try_memmap_io_insertion(va,istate)) return;
+        if (try_memmap_io_insertion(va, istate))
+            return;
         /*
-         * Forward the page fault to the address space page fault handler.
+         * Forward the page fault to the address space page fault
+         * handler.
          */
         if (as_page_fault(va, PF_ACCESS_READ, istate) == AS_PF_FAULT) {
             fault_if_from_uspace(istate,"Page fault at %p",va);
-            panic("%s: va=%p, rid=%d, iip=%p\n", __func__, va, rid, istate->cr_iip);
+            panic("%s: va=%p, rid=%d, iip=%p\n", __func__, va, rid,
+                istate->cr_iip);
         }
     }
 }
 ,8 → 594,8
  *
  * This fault should not occur.
  *
- * @param vector Interruption vector.
- * @param istate Structure with saved interruption state.
+ * @param vector    Interruption vector.
+ * @param istate    Structure with saved interruption state.
  */
 void data_nested_tlb_fault(uint64_t vector, istate_t *istate)
 {
 ,8 → 604,8
 /** Data Dirty bit fault handler.
  *
- * @param vector Interruption vector.
- * @param istate Structure with saved interruption state.
+ * @param vector    Interruption vector.
+ * @param istate    Structure with saved interruption state.
  */
 void data_dirty_bit_fault(uint64_t vector, istate_t *istate)
 {
 ,9 → 631,8
     } else {
         if (as_page_fault(va, PF_ACCESS_WRITE, istate) == AS_PF_FAULT) {
             fault_if_from_uspace(istate,"Page fault at %p",va);
-            panic("%s: va=%p, rid=%d, iip=%p\n", __func__, va, rid, istate->cr_iip);
-            t->d = true;
-            dtc_pte_copy(t);
+            panic("%s: va=%p, rid=%d, iip=%p\n", __func__, va, rid,
+                istate->cr_iip);
         }
     }
     page_table_unlock(AS, true);
 ,8 → 640,8
 /** Instruction access bit fault handler.
  *
- * @param vector Interruption vector.
- * @param istate Structure with saved interruption state.
+ * @param vector    Interruption vector.
+ * @param istate    Structure with saved interruption state.
  */
 void instruction_access_bit_fault(uint64_t vector, istate_t *istate)
 {
 ,10 → 666,9
         itc_pte_copy(t);
     } else {
         if (as_page_fault(va, PF_ACCESS_EXEC, istate) == AS_PF_FAULT) {
-            fault_if_from_uspace(istate,"Page fault at %p",va);
-            panic("%s: va=%p, rid=%d, iip=%p\n", __func__, va, rid, istate->cr_iip);
-            t->a = true;
-            itc_pte_copy(t);
+            fault_if_from_uspace(istate, "Page fault at %p", va);
+            panic("%s: va=%p, rid=%d, iip=%p\n", __func__, va, rid,
+                istate->cr_iip);
         }
     }
     page_table_unlock(AS, true);
 ,10 → 702,9
         dtc_pte_copy(t);
     } else {
         if (as_page_fault(va, PF_ACCESS_READ, istate) == AS_PF_FAULT) {
-            fault_if_from_uspace(istate,"Page fault at %p",va);
-            panic("%s: va=%p, rid=%d, iip=%p\n", __func__, va, rid, istate->cr_iip);
-            t->a = true;
-            itc_pte_copy(t);
+            fault_if_from_uspace(istate, "Page fault at %p", va);
+            panic("%s: va=%p, rid=%d, iip=%p\n", __func__, va, rid,
+                istate->cr_iip);
         }
     }
     page_table_unlock(AS, true);
 ,7 → 743,7
     } else {
         page_table_unlock(AS, true);
         if (as_page_fault(va, PF_ACCESS_READ, istate) == AS_PF_FAULT) {
-            fault_if_from_uspace(istate,"Page fault at %p",va);
+            fault_if_from_uspace(istate, "Page fault at %p", va);
             panic("%s: va=%p, rid=%d\n", __func__, va, rid);
         }
     }

 /branches/dynload/kernel/arch/ia64/src/mm/vhpt.c
 ,7 → 41,8
 uintptr_t vhpt_set_up(void)
 {
-    vhpt_base = frame_alloc(VHPT_WIDTH - FRAME_WIDTH, FRAME_KA | FRAME_ATOMIC);
+    vhpt_base = frame_alloc(VHPT_WIDTH - FRAME_WIDTH,
+        FRAME_KA | FRAME_ATOMIC);
     if (!vhpt_base)
         panic("Kernel configured with VHPT but no memory for table.");
     vhpt_invalidate_all();

 /branches/dynload/kernel/arch/ia64/src/mm/as.c
 ,7 → 68,7
             continue;
         rr.word = rr_read(i);
-        rr.map.ve = false;          /* disable VHPT walker */
+        rr.map.ve = false;      /* disable VHPT walker */
         rr.map.rid = ASID2RID(as->asid, i);
         rr.map.ps = PAGE_WIDTH;
         rr_write(i, rr.word);

 /branches/dynload/kernel/arch/ia64/src/mm/frame.c
 ,57 → 40,50
 #include <align.h>
 #include <macros.h>
-/*
- * This is Ski-specific and certainly not sufficient
- * for real ia64 systems that provide memory map.
- */
-#define MEMORY_SIZE (256 * 1024 * 1024)
-#define MEMORY_BASE (0 * 64 * 1024 * 1024)
+#define KERNEL_RESERVED_AREA_BASE   (0x4400000)
+#define KERNEL_RESERVED_AREA_SIZE   (16 * 1024 * 1024)
-#define KERNEL_RESERVED_AREA_BASE (0x4400000)
-#define KERNEL_RESERVED_AREA_SIZE (16*1024*1024)
+#define ROM_BASE    0xa0000               /* for simulators */
+#define ROM_SIZE    (384 * 1024)          /* for simulators */
-#define ONE_TO_ONE_MAPPING_SIZE (256*1048576) // Mapped at start
+#define MIN_ZONE_SIZE   (64 * 1024)
-#define ROM_BASE    0xa0000               //For ski
-#define ROM_SIZE    (384 * 1024)          //For ski
-void poke_char(int x,int y,char ch, char c);
+#define MINCONF 1
-#define MIN_ZONE_SIZE (64*1024)
+uintptr_t last_frame = 0;
-uintptr_t last_frame;
-#define MINCONF 1
 void frame_arch_init(void)
 {
-    if(config.cpu_active==1){
+    if (config.cpu_active == 1) {
         unsigned int i;
-        for(i=0;i<bootinfo->memmap_items;i++){
-            if (bootinfo->memmap[i].type==EFI_MEMMAP_FREE_MEM){
-                uint64_t base=bootinfo->memmap[i].base;
-                uint64_t size=bootinfo->memmap[i].size;
-                uint64_t abase=ALIGN_UP(base,FRAME_SIZE);
-                if(size>FRAME_SIZE) size -=abase-base;
+        for (i = 0; i < bootinfo->memmap_items; i++) {
+            if (bootinfo->memmap[i].type == EFI_MEMMAP_FREE_MEM) {
+                uint64_t base = bootinfo->memmap[i].base;
+                uint64_t size = bootinfo->memmap[i].size;
+                uint64_t abase = ALIGN_UP(base, FRAME_SIZE);
-                if(size>MIN_ZONE_SIZE)  {
-                    zone_create(abase >> FRAME_WIDTH, (size) >> FRAME_WIDTH, max(MINCONF,((abase) >> FRAME_WIDTH)), 0);
-                }
+                if (size > FRAME_SIZE)
+                    size -= abase - base;
+                if (size > MIN_ZONE_SIZE) {
+                    zone_create(abase >> FRAME_WIDTH,
+                        size >> FRAME_WIDTH,
+                        max(MINCONF, abase >> FRAME_WIDTH),
+);
+                }
+                if (abase + size > last_frame)
+                    last_frame = abase + size;
             }
         }
-        //zone_create(MEMORY_BASE >> FRAME_WIDTH, SIZE2FRAMES(MEMORY_SIZE), (MEMORY_SIZE) >> FRAME_WIDTH, 0);
         /*
-        * Blacklist ROM regions.
-        */
-        frame_mark_unavailable(ADDR2PFN(ROM_BASE), SIZE2FRAMES(ROM_SIZE));
+         * Blacklist ROM regions.
+         */
+        frame_mark_unavailable(ADDR2PFN(ROM_BASE),
+            SIZE2FRAMES(ROM_SIZE));
-        frame_mark_unavailable(ADDR2PFN(KERNEL_RESERVED_AREA_BASE), SIZE2FRAMES(KERNEL_RESERVED_AREA_SIZE));
+        frame_mark_unavailable(ADDR2PFN(KERNEL_RESERVED_AREA_BASE),
+            SIZE2FRAMES(KERNEL_RESERVED_AREA_SIZE));
     }
 }

 /branches/dynload/kernel/arch/ia64/src/mm/page.c
 ,10 → 123,10
  *
  * Interrupts must be disabled.
  *
- * @param page Address of virtual page including VRN bits.
- * @param asid Address space identifier.
+ * @param page      Address of virtual page including VRN bits.
+ * @param asid      Address space identifier.
  *
- * @return VHPT entry address.
+ * @return      VHPT entry address.
  */
 vhpt_entry_t *vhpt_hash(uintptr_t page, asid_t asid)
 {
 ,10 → 167,11
  *
  * Interrupts must be disabled.
  *
- * @param page Address of virtual page including VRN bits.
- * @param asid Address space identifier.
+ * @param page      Address of virtual page including VRN bits.
+ * @param asid      Address space identifier.
  *
- * @return True if page and asid match the page and asid of t, false otherwise.
+ * @return      True if page and asid match the page and asid of t,
+ *          false otherwise.
  */
 bool vhpt_compare(uintptr_t page, asid_t asid, vhpt_entry_t *v)
 {
 ,12 → 212,15
 /** Set up one VHPT entry.
  *
  * @param v VHPT entry to be set up.
- * @param page Virtual address of the page mapped by the entry.
- * @param asid Address space identifier of the address space to which page belongs.
- * @param frame Physical address of the frame to wich page is mapped.
- * @param flags Different flags for the mapping.
+ * @param page      Virtual address of the page mapped by the entry.
+ * @param asid      Address space identifier of the address space to which
+ *          page belongs.
+ * @param frame     Physical address of the frame to wich page is mapped.
+ * @param flags     Different flags for the mapping.
  */
-void vhpt_set_record(vhpt_entry_t *v, uintptr_t page, asid_t asid, uintptr_t frame, int flags)
+void
+vhpt_set_record(vhpt_entry_t *v, uintptr_t page, asid_t asid, uintptr_t frame,
+    int flags)
 {
     region_register rr_save, rr;
     index_t vrn;
 ,7 → 254,8
     v->word[3] = 0;
     v->present.p = true;
-    v->present.ma = (flags & PAGE_CACHEABLE) ? MA_WRITEBACK : MA_UNCACHEABLE;
+    v->present.ma = (flags & PAGE_CACHEABLE) ?
+        MA_WRITEBACK : MA_UNCACHEABLE;
     v->present.a = false;   /* not accessed */
     v->present.d = false;   /* not dirty */
     v->present.pl = (flags & PAGE_USER) ? PL_USER : PL_KERNEL;
 ,27 → 268,11
     v->present.tag.tag_word = tag;
 }
-extern uintptr_t last_frame;
-uintptr_t hw_map(uintptr_t physaddr, size_t size)
+uintptr_t hw_map(uintptr_t physaddr, size_t size __attribute__ ((unused)))
 {
-    if (last_frame + ALIGN_UP(size, PAGE_SIZE) > KA2PA(KERNEL_ADDRESS_SPACE_END_ARCH))
-        panic("Unable to map physical memory %p (%d bytes)", physaddr, size)
-    uintptr_t virtaddr = PA2KA(last_frame);
-    pfn_t i;
-    for (i = 0; i < ADDR2PFN(ALIGN_UP(size, PAGE_SIZE)); i++) {
-        uintptr_t addr = PFN2ADDR(i);
-        page_mapping_insert(AS_KERNEL, virtaddr + addr, physaddr + addr, PAGE_NOT_CACHEABLE | PAGE_WRITE);
-    }
-    last_frame = ALIGN_UP(last_frame + size, FRAME_SIZE);
-    return virtaddr;
+    /* This is a dirty hack. */
+    return PA2KA(physaddr);
 }
 /** @}
  */

 /branches/dynload/kernel/arch/ia64/src/interrupt.c
 ,71 → 244,61
 void external_interrupt(uint64_t vector, istate_t *istate)
 {
     cr_ivr_t ivr;
+    irq_t *irq;
     ivr.value = ivr_read();
     srlz_d();
-        switch (ivr.vector) {
-        case INTERRUPT_SPURIOUS:
+    switch (ivr.vector) {
+    case INTERRUPT_SPURIOUS:
 #ifdef CONFIG_DEBUG
-            printf("cpu%d: spurious interrupt\n", CPU->id);
+        printf("cpu%d: spurious interrupt\n", CPU->id);
 #endif
-            break;
+        break;
 #ifdef CONFIG_SMP
-        case VECTOR_TLB_SHOOTDOWN_IPI:
-            tlb_shootdown_ipi_recv();
-            end_of_local_irq();
-            break;
+    case VECTOR_TLB_SHOOTDOWN_IPI:
+        tlb_shootdown_ipi_recv();
+        end_of_local_irq();
+        break;
 #endif
-        case INTERRUPT_TIMER:
-            {
-                irq_t *irq = irq_dispatch_and_lock(ivr.vector);
-                if (irq) {
-                    irq->handler(irq, irq->arg);
-                    spinlock_unlock(&irq->lock);
-                } else {
-                    panic("\nUnhandled Internal Timer Interrupt (%d)\n",ivr.vector);
-                }
-            }
-            break;
-        default:
-            {
-                int ack=false;
-                irq_t *irq = irq_dispatch_and_lock(ivr.vector);
-                if (irq) {
-                    /*
-                     * The IRQ handler was found.
-                     */
-                    if (irq->preack) {
-                        /* Send EOI before processing the interrupt */
-                        end_of_local_irq();
-                        ack=true;
-                    }
-                    irq->handler(irq, irq->arg);
-                    spinlock_unlock(&irq->lock);
-                } else {
-                    /*
-                     * Unhandled interrupt.
-                     */
-                    end_of_local_irq();
-                    ack=true;
+    case INTERRUPT_TIMER:
+        irq = irq_dispatch_and_lock(ivr.vector);
+        if (irq) {
+            irq->handler(irq, irq->arg);
+            spinlock_unlock(&irq->lock);
+        } else {
+            panic("\nUnhandled Internal Timer Interrupt (%d)\n",
+                ivr.vector);
+        }
+        break;
+    default:
+        irq = irq_dispatch_and_lock(ivr.vector);
+        if (irq) {
+            /*
+             * The IRQ handler was found.
+             */
+            if (irq->preack) {
+                /* Send EOI before processing the interrupt */
+                end_of_local_irq();
+            }
+            irq->handler(irq, irq->arg);
+            if (!irq->preack)
+                end_of_local_irq();
+            spinlock_unlock(&irq->lock);
+        } else {
+            /*
+             * Unhandled interrupt.
+             */
+            end_of_local_irq();
 #ifdef CONFIG_DEBUG
-                    printf("\nUnhandled External Interrupt Vector %d\n",ivr.vector);
+            printf("\nUnhandled External Interrupt Vector %d\n",
+                ivr.vector);
 #endif
-                }
-                if(!ack) end_of_local_irq();
-            }
-            break;
         }
+        break;
+    }
 }
 /** @}

 /branches/dynload/kernel/arch/ia64/src/start.S
 ,17 → 32,15
 #include <mm/asid.h>
 #define RR_MASK (0xFFFFFFFF00000002)
-#define RID_SHIFT 8
-#define PS_SHIFT 2
+#define RID_SHIFT   8
+#define PS_SHIFT    2
-#define KERNEL_TRANSLATION_I  0x0010000000000661
-#define KERNEL_TRANSLATION_D  0x0010000000000661
-#define KERNEL_TRANSLATION_VIO 0x0010000000000671
-#define KERNEL_TRANSLATION_IO 0x00100FFFFC000671
-#define KERNEL_TRANSLATION_FW 0x00100000F0000671
+#define KERNEL_TRANSLATION_I    0x0010000000000661
+#define KERNEL_TRANSLATION_D    0x0010000000000661
+#define KERNEL_TRANSLATION_VIO  0x0010000000000671
+#define KERNEL_TRANSLATION_IO   0x00100FFFFC000671
+#define KERNEL_TRANSLATION_FW   0x00100000F0000671
 .section K_TEXT_START, "ax"
 .global kernel_image_start
 ,18 → 49,19
 kernel_image_start:
     .auto
-#identifi self(CPU) in OS structures by ID / EID
-    mov r9=cr64
-    mov r10=1
-    movl r12=0xffffffff
-    movl r8=cpu_by_id_eid_list
-    and r8=r8,r12
-    shr r9=r9,16
-    add r8=r8,r9
-    st1 [r8]=r10
+#ifdef CONFIG_SMP
+    # Identify self(CPU) in OS structures by ID / EID
+    mov r9 = cr64
+    mov r10 = 1
+    movl r12 = 0xffffffff
+    movl r8 = cpu_by_id_eid_list
+    and r8 = r8, r12
+    shr r9 = r9, 16
+    add r8 = r8, r9
+    st1 [r8] = r10
+#endif
     mov psr.l = r0
     srlz.i
     srlz.d
 ,39 → 68,29
     # Fill TR.i and TR.d using Region Register #VRN_KERNEL
     movl r8 = (VRN_KERNEL << VRN_SHIFT)
     mov r9 = rr[r8]
     movl r10 = (RR_MASK)
     and r9 = r10, r9
     movl r10 = ((RID_KERNEL << RID_SHIFT) | (KERNEL_PAGE_WIDTH << PS_SHIFT))
     or  r9 = r10, r9
     mov rr[r8] = r9
     movl r8 = (VRN_KERNEL << VRN_SHIFT)
     mov cr.ifa = r8
-    mov r11 = cr.itir ;;
-    movl r10 = (KERNEL_PAGE_WIDTH << PS_SHIFT);;
-    or r10 =r10 , r11  ;;
-    mov cr.itir = r10;;
+    mov r11 = cr.itir
+    movl r10 = (KERNEL_PAGE_WIDTH << PS_SHIFT)
+    or r10 = r10, r11
+    mov cr.itir = r10
     movl r10 = (KERNEL_TRANSLATION_I)
     itr.i itr[r0] = r10
     movl r10 = (KERNEL_TRANSLATION_D)
     itr.d dtr[r0] = r10
     movl r7 = 1
     movl r8 = (VRN_KERNEL << VRN_SHIFT) | VIO_OFFSET
     mov cr.ifa = r8
 ,15 → 97,13
     movl r10 = (KERNEL_TRANSLATION_VIO)
     itr.d dtr[r7] = r10
+    mov r11 = cr.itir
+    movl r10 = ~0xfc
+    and r10 = r10, r11
+    movl r11 = (IO_PAGE_WIDTH << PS_SHIFT)
+    or r10 = r10, r11
+    mov cr.itir = r10
-    mov r11 = cr.itir ;;
-    movl r10 = ~0xfc;;
-    and r10 =r10 , r11  ;;
-    movl r11 = (IO_PAGE_WIDTH << PS_SHIFT);;
-    or r10 =r10 , r11  ;;
-    mov cr.itir = r10;;
     movl r7 = 2
     movl r8 = (VRN_KERNEL << VRN_SHIFT) | IO_OFFSET
     mov cr.ifa = r8
 ,16 → 110,15
     movl r10 = (KERNEL_TRANSLATION_IO)
     itr.d dtr[r7] = r10
+    # Setup mapping for fimware arrea (also SAPIC)
-#setup mapping for fimware arrea (also SAPIC)
-    mov r11 = cr.itir ;;
-    movl r10 = ~0xfc;;
-    and r10 =r10 , r11  ;;
-    movl r11 = (FW_PAGE_WIDTH << PS_SHIFT);;
-    or r10 =r10 , r11  ;;
-    mov cr.itir = r10;;
+    mov r11 = cr.itir
+    movl r10 = ~0xfc
+    and r10 = r10, r11
+    movl r11 = (FW_PAGE_WIDTH << PS_SHIFT)
+    or r10 = r10, r11
+    mov cr.itir = r10
     movl r7 = 3
     movl r8 = (VRN_KERNEL << VRN_SHIFT) | FW_OFFSET
     mov cr.ifa = r8
 ,13 → 125,11
     movl r10 = (KERNEL_TRANSLATION_FW)
     itr.d dtr[r7] = r10
+    # Initialize PSR
-    # initialize PSR
     movl r10 = (PSR_DT_MASK | PSR_RT_MASK | PSR_IT_MASK | PSR_IC_MASK)  /* Enable paging */
     mov r9 = psr
     or r10 = r10, r9
     mov cr.ipsr = r10
     mov cr.ifs = r0
 ,11 → 139,14
     srlz.i
     .explicit
     /*
-     * Return From Interupt is the only the way to fill upper half word of PSR.
+     * Return From Interrupt is the only way to
+     * fill the upper half word of PSR.
      */
-    rfi;;
+    rfi ;;
 .global paging_start
 paging_start:
 ,27 → 154,29
      * Now we are paging.
      */
-    # switch to register bank 1
+    # Switch to register bank 1
     bsw.1
-#Am'I BSP or AP
-    movl r20=bsp_started;;
-    ld8 r20=[r20];;
-    cmp.eq p3,p2=r20,r0;;
+#ifdef CONFIG_SMP
+    # Am I BSP or AP?
+    movl r20 = bsp_started ;;
+    ld8 r20 = [r20] ;;
+    cmp.eq p3, p2 = r20, r0 ;;
+#else
+    cmp.eq p3, p2 = r0, r0 ;;   /* you are BSP */
+#endif  /* CONFIG_SMP */
-    # initialize register stack
+    # Initialize register stack
     mov ar.rsc = r0
     movl r8 = (VRN_KERNEL << VRN_SHIFT) ;;
     mov ar.bspstore = r8
     loadrs
-    # initialize memory stack to some sane value
+    # Initialize memory stack to some sane value
     movl r12 = stack0 ;;
     add r12 = -16, r12  /* allocate a scratch area on the stack */
-    # initialize gp (Global Pointer) register
+    # Initialize gp (Global Pointer) register
     movl r20 = (VRN_KERNEL << VRN_SHIFT);;
     or r20 = r20,r1;;
     movl r1 = _hardcoded_load_address
 ,16 → 201,17
     srlz.i
     srlz.d ;;
+#ifdef CONFIG_SMP
 (p2)    movl r18 = main_ap ;;
 (p2)    mov b1 = r18 ;;
 (p2)    br.call.sptk.many b0 = b1
-#Mark that BSP is on
-    mov r20=1;;
-    movl r21=bsp_started;;
-    st8 [r21]=r20;;
+    # Mark that BSP is on
+    mov r20 = 1 ;;
+    movl r21 = bsp_started ;;
+    st8 [r21] = r20 ;;
+#endif
     br.call.sptk.many b0 = arch_pre_main
     movl r18 = main_bsp ;;
 ,49 → 218,51
     mov b1 = r18 ;;
     br.call.sptk.many b0 = b1
 :
     br 0b
+#ifdef CONFIG_SMP
 .align 4096
 kernel_image_ap_start:
     .auto
-#identifi self(CPU) in OS structures by ID / EID
-    mov r9=cr64
-    mov r10=1
-    movl r12=0xffffffff
-    movl r8=cpu_by_id_eid_list
-    and r8=r8,r12
-    shr r9=r9,16
-    add r8=r8,r9
-    st1 [r8]=r10
+    # Identify self(CPU) in OS structures by ID / EID
+    mov r9 = cr64
+    mov r10 = 1
+    movl r12 = 0xffffffff
+    movl r8 = cpu_by_id_eid_list
+    and r8 = r8, r12
+    shr r9 = r9, 16
+    add r8 = r8, r9
+    st1 [r8] = r10
-#wait for wakeup sychro signal (#3 in cpu_by_id_eid_list)
+    # Wait for wakeup synchro signal (#3 in cpu_by_id_eid_list)
 kernel_image_ap_start_loop:
-    movl r11=kernel_image_ap_start_loop
-    and r11=r11,r12
+    movl r11 = kernel_image_ap_start_loop
+    and r11 = r11, r12
     mov b1 = r11
-    ld1 r20=[r8];;
-    movl r21=3;;
-    cmp.eq p2,p3=r20,r21;;
-(p3)br.call.sptk.many b0 = b1
+    ld1 r20 = [r8] ;;
+    movl r21 = 3 ;;
+    cmp.eq p2, p3 = r20, r21 ;;
+(p3)    br.call.sptk.many b0 = b1
-    movl r11=kernel_image_start
-    and r11=r11,r12
-    mov b1 = r11
+    movl r11 = kernel_image_start
+    and r11 = r11, r12
+    mov b1 = r11
     br.call.sptk.many b0 = b1
 .align 16
 .global bsp_started
 bsp_started:
 .space 8
 .align 4096
 .global cpu_by_id_eid_list
 cpu_by_id_eid_list:
 .space 65536
+#endif  /* CONFIG_SMP */

/branches/dynload/kernel/arch/ia64/src/drivers/ega.c
File deleted

 /branches/dynload/kernel/arch/ia64/src/drivers/it.c
 ,18 → 44,16
 #include <ddi/device.h>
 #include <arch.h>
-#define IT_SERVICE_CLOCKS 64
+#define IT_SERVICE_CLOCKS   64
-#define FREQ_NUMERATOR_SHIFT 32
-#define FREQ_NUMERATOR_MASK 0xffffffff00000000LL
+#define FREQ_NUMERATOR_SHIFT    32
+#define FREQ_NUMERATOR_MASK 0xffffffff00000000ULL
-#define FREQ_DENOMINATOR_SHIFT 0
-#define FREQ_DENOMINATOR_MASK 0xffffffffLL
+#define FREQ_DENOMINATOR_SHIFT  0
+#define FREQ_DENOMINATOR_MASK   0xffffffffULL
 uint64_t it_delta;
 static irq_t it_irq;
 static irq_ownership_t it_claim(void);
 ,8 → 64,7
 {
     cr_itv_t itv;
-    if(config.cpu_active==1)
-    {
+    if (config.cpu_active == 1) {
         irq_initialize(&it_irq);
         it_irq.inr = INTERRUPT_TIMER;
         it_irq.devno = device_assign_devno();
 ,12 → 73,13
         irq_register(&it_irq);
         uint64_t base_freq;
-        base_freq  = ((bootinfo->freq_scale) & FREQ_NUMERATOR_MASK) >> FREQ_NUMERATOR_SHIFT;
+        base_freq  = ((bootinfo->freq_scale) & FREQ_NUMERATOR_MASK) >>
+            FREQ_NUMERATOR_SHIFT;
         base_freq *= bootinfo->sys_freq;
-        base_freq /= ((bootinfo->freq_scale) & FREQ_DENOMINATOR_MASK) >> FREQ_DENOMINATOR_SHIFT;
+        base_freq /= ((bootinfo->freq_scale) & FREQ_DENOMINATOR_MASK) >>
+            FREQ_DENOMINATOR_SHIFT;
-        it_delta = base_freq /HZ;
+        it_delta = base_freq / HZ;
     }
     /* initialize Interval Timer external interrupt vector */

 /branches/dynload/kernel/arch/amd64/include/types.h
 ,6 → 57,8
 typedef uint64_t unative_t;
 typedef int64_t native_t;
+typedef uintptr_t ioport_t;
 /**< Formats for uintptr_t, size_t, count_t and index_t */
 #define PRIp "llx"
 #define PRIs "llu"

 /branches/dynload/kernel/arch/amd64/Makefile.inc
 ,6 → 75,12
 CONFIG_I8042 = y
 DEFS += -DCONFIG_I8042
+## Compile with EGA support
+#
+CONFIG_EGA = y
+DEFS += -DCONFIG_EGA
 ## Accepted configuration directives
 #
 ,7 → 102,6
     arch/$(ARCH)/src/pm.c \
     arch/$(ARCH)/src/context.S \
     arch/$(ARCH)/src/ddi/ddi.c \
-    arch/$(ARCH)/src/drivers/ega.c \
     arch/$(ARCH)/src/drivers/vesa.c \
     arch/$(ARCH)/src/drivers/i8254.c \
     arch/$(ARCH)/src/drivers/i8259.c \

 /branches/dynload/kernel/arch/amd64/src/amd64.c
 ,6 → 40,7
 #include <proc/thread.h>
 #include <arch/drivers/ega.h>
+#include <genarch/drivers/ega/ega.h>
 #include <arch/drivers/vesa.h>
 #include <genarch/kbd/i8042.h>
 #include <arch/drivers/i8254.h>
 ,7 → 140,7
             vesa_init();
         else
 #endif
-            ega_init(); /* video */
+            ega_init(EGA_BASE, EGA_VIDEORAM);   /* video */
         /* Enable debugger */
         debugger_init();
 ,6 → 209,12
  */
 void arch_grab_console(void)
 {
+#ifdef CONFIG_FB
+    vesa_redraw();
+#else
+    ega_redraw();
+#endif
     i8042_grab();
 }

 /branches/dynload/kernel/arch/mips32/Makefile.inc
 ,8 → 66,8
 ifeq ($(MACHINE),bgxemul)
     BFD_NAME = elf32-bigmips
     BFD = ecoff-bigmips
+    TOOLCHAIN_DIR = $(CROSS_PREFIX)/mips
     TARGET = mips-sgi-irix5
-    TOOLCHAIN_DIR = $(CROSS_PREFIX)/mips/bin
     GCC_CFLAGS += -EB -DBIG_ENDIAN -DARCH_HAS_FPU -mips3
 endif
 ifeq ($(MACHINE),simics)

 /branches/dynload/kernel/arch/ia32/include/types.h
 ,6 → 57,8
 typedef uint32_t unative_t;
 typedef int32_t native_t;
+typedef uintptr_t ioport_t;
 #define PRIp "x"    /**< Format for uintptr_t. */
 #define PRIs "u"    /**< Format for size_t. */
 #define PRIc "u"    /**< Format for count_t. */

 /branches/dynload/kernel/arch/ia32/include/drivers/ega.h
 ,5 → 1,5
 /*
- * Copyright (c) 2001-2004 Jakub Jermar
+ * Copyright (c) 2008 Jakub Jermar
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
 ,23 → 26,18
  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  */
-/** @addtogroup ia32
+/** @addtogroup ia32
  * @{
  */
 /** @file
  */
-#ifndef KERN_ia32_EGA_H_
-#define KERN_ia32_EGA_H_
+#ifndef KERN_ia32_EGA_H
+#define KERN_ia32_EGA_H
-#define VIDEORAM    0xb8000
-#define ROW     80
-#define ROWS        25
-#define SCREEN      (ROW * ROWS)
+#define EGA_VIDEORAM    0xb8000
+#define EGA_BASE    0x3d4
-extern void ega_redraw(void);
-extern void ega_init(void);
 #endif
 /** @}

 /branches/dynload/kernel/arch/ia32/Makefile.inc
 ,6 → 110,12
 CONFIG_I8042 = y
 DEFS += -DCONFIG_I8042
+## Compile with EGA support
+#
+CONFIG_EGA = y
+DEFS += -DCONFIG_EGA
 ## Accepted configuration directives
 #
 ,7 → 161,6
     arch/$(ARCH)/src/ddi/ddi.c \
     arch/$(ARCH)/src/drivers/i8254.c \
     arch/$(ARCH)/src/drivers/i8259.c \
-    arch/$(ARCH)/src/drivers/ega.c \
     arch/$(ARCH)/src/drivers/vesa.c \
     arch/$(ARCH)/src/boot/boot.S \
     arch/$(ARCH)/src/boot/memmap.c \

 /branches/dynload/kernel/arch/ia32/src/ia32.c
 ,6 → 39,7
 #include <arch/pm.h>
 #include <arch/drivers/ega.h>
+#include <genarch/drivers/ega/ega.h>
 #include <arch/drivers/vesa.h>
 #include <genarch/kbd/i8042.h>
 #include <arch/drivers/i8254.h>
 ,7 → 94,7
             vesa_init();
         else
 #endif
-            ega_init(); /* video */
+            ega_init(EGA_BASE, EGA_VIDEORAM);   /* video */
         /* Enable debugger */
         debugger_init();

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