| 48,11 → 48,10 |
|---|
| asm volatile ( |
| "eor r1, r1\n" |
| "mcr p15, 0, r1, c8, c7, 0\n" |
| ::: "r1" |
| : : : "r1" |
| ); |
| } |
| |
| |
| /** Invalidate all entries in TLB that belong to specified address space. |
| * |
| * @param asid Ignored as the ARM architecture doesn't support ASIDs. |
| 62,7 → 61,6 |
|---|
| tlb_invalidate_all(); |
| } |
| |
| |
| /** Invalidate single entry in TLB |
| * |
| * @param page Virtual adress of the page |
| 70,15 → 68,14 |
|---|
| static inline void invalidate_page(uintptr_t page) |
| { |
| asm volatile ( |
| "mcr p15, 0, %0, c8, c7, 1" |
| |
| "mcr p15, 0, %0, c8, c7, 1" |
| : |
| : "r"(page) |
| : "r" (page) |
| ); |
| } |
| |
| |
| /** Invalidate TLB entries for specified page range belonging to specified address space. |
| /** Invalidate TLB entries for specified page range belonging to specified |
| * address space. |
| * |
| * @param asid Ignored as the ARM architecture doesn't support it. |
| * @param page Address of the first page whose entry is to be invalidated. |