36,50 → 36,51 |
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#include <arch/types.h> |
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/** |
* Decribes structure of fault status register in coprocessor 15 |
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/** Decribes CP15 "fault status register" (FSR). |
*/ |
typedef struct { |
unsigned status : 3; |
unsigned domain : 4; |
unsigned zero : 1; |
unsigned should_be_zero : 24; |
unsigned status : 3; |
unsigned domain : 4; |
unsigned zero : 1; |
unsigned should_be_zero : 24; |
} __attribute__ ((packed)) fault_status_t; |
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/** |
* Help union used for overcasting integer value into fault_status_t type |
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/** Help union used for casting integer value into #fault_status_t. |
*/ |
typedef union { |
fault_status_t fsr; |
uint32_t dummy; |
fault_status_t fs; |
uint32_t dummy; |
} fault_status_union_t; |
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/** |
* Very simplyfied description of instruction code structure intended for |
* recognising memmory access of instruction ( reads or writes into memmory) |
* more details: see ARM architecture preference |
* chapter:3.1 Instruction set encoding |
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/** Simplified description of instruction code. |
* |
* \note Used for recognizing memory access instructions. |
* \see ARM architecture reference (chapter 3.1) |
*/ |
typedef struct { |
unsigned dummy1 : 4; |
unsigned bit4 : 1; |
unsigned bits567 : 3; |
unsigned dummy : 12; |
unsigned access : 1; |
unsigned opcode : 4; |
unsigned instr_type : 3; |
unsigned condition : 4; |
unsigned dummy1 : 4; |
unsigned bit4 : 1; |
unsigned bits567 : 3; |
unsigned dummy : 12; |
unsigned access : 1; |
unsigned opcode : 4; |
unsigned type : 3; |
unsigned condition : 4; |
} __attribute__ ((packed)) instruction_t; |
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/** |
* Help union used for overcasting ip register (uint_32_t) value into |
* instruction_t pointer |
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/** Help union used for casting pc register (uint_32_t) value into |
* #instruction_t pointer. |
*/ |
typedef union { |
instruction_t* instr; |
uint32_t ip; |
instruction_t* instr; |
uint32_t pc; |
} instruction_union_t; |
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extern void prefetch_abort(int n, istate_t *istate); |
extern void data_abort(int n, istate_t *istate); |
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