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Ignore whitespace Rev 2465 → Rev 2462

/trunk/kernel/generic/include/mm/frame.h
45,9 → 45,7
 
#define ONE_FRAME 0
#define TWO_FRAMES 1
#define FOUR_FRAMES 2
 
 
#ifdef ARCH_STACK_FRAMES
#define STACK_FRAMES ARCH_STACK_FRAMES
#else
/trunk/kernel/generic/src/printf/printf.c
33,7 → 33,6
*/
 
#include <print.h>
int printf(const char *fmt, ...);
 
int printf(const char *fmt, ...)
{
/trunk/kernel/arch/ia32xen/include/mm/page.h
61,11 → 61,6
#define PTL2_ENTRIES_ARCH 0
#define PTL3_ENTRIES_ARCH 1024
 
#define PTL0_SIZE_ARCH ONE_FRAME
#define PTL1_SIZE_ARCH 0
#define PTL2_SIZE_ARCH 0
#define PTL3_SIZE_ARCH ONE_FRAME
 
#define PTL0_INDEX_ARCH(vaddr) (((vaddr) >> 22) & 0x3ff)
#define PTL1_INDEX_ARCH(vaddr) 0
#define PTL2_INDEX_ARCH(vaddr) 0
/trunk/kernel/arch/amd64/include/mm/page.h
82,11 → 82,6
#define PTL2_ENTRIES_ARCH 512
#define PTL3_ENTRIES_ARCH 512
 
#define PTL0_SIZE_ARCH ONE_FRAME
#define PTL1_SIZE_ARCH ONE_FRAME
#define PTL2_SIZE_ARCH ONE_FRAME
#define PTL3_SIZE_ARCH ONE_FRAME
 
#define PTL0_INDEX_ARCH(vaddr) (((vaddr)>>39)&0x1ff)
#define PTL1_INDEX_ARCH(vaddr) (((vaddr)>>30)&0x1ff)
#define PTL2_INDEX_ARCH(vaddr) (((vaddr)>>21)&0x1ff)
/trunk/kernel/arch/ia32/include/mm/page.h
61,11 → 61,6
#define PTL2_ENTRIES_ARCH 0
#define PTL3_ENTRIES_ARCH 1024
 
#define PTL0_SIZE_ARCH ONE_FRAME
#define PTL1_SIZE_ARCH 0
#define PTL2_SIZE_ARCH 0
#define PTL3_SIZE_ARCH ONE_FRAME
 
#define PTL0_INDEX_ARCH(vaddr) (((vaddr) >> 22) & 0x3ff)
#define PTL1_INDEX_ARCH(vaddr) 0
#define PTL2_INDEX_ARCH(vaddr) 0
/trunk/kernel/arch/mips32/include/mm/page.h
74,11 → 74,6
#define PTL2_ENTRIES_ARCH 0
#define PTL3_ENTRIES_ARCH 4096
 
#define PTL0_SIZE_ARCH ONE_FRAME
#define PTL1_SIZE_ARCH 0
#define PTL2_SIZE_ARCH 0
#define PTL3_SIZE_ARCH ONE_FRAME
 
#define PTL0_INDEX_ARCH(vaddr) ((vaddr)>>26)
#define PTL1_INDEX_ARCH(vaddr) 0
#define PTL2_INDEX_ARCH(vaddr) 0
/trunk/kernel/arch/arm32/Makefile.inc
1,5 → 1,6
#
# Copyright (c) 2007 Jakub Jermar, Michal Kebrt
# Copyright (c) 2005 Martin Decky
# Copyright (c) 2007 Jakub Jermar
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
31,26 → 32,14
 
BFD_NAME = elf32-little
BFD_ARCH = arm
BFD = binary
BFD = elf32-little
TARGET = arm-linux-gnu
TOOLCHAIN_DIR = /usr/local/arm
 
KERNEL_LOAD_ADDRESS = 0x80200000
GCC_CFLAGS +=
 
ifeq ($(MACHINE), gxemul_testarm)
DMACHINE = MACHINE_GXEMUL_TESTARM
endif
DEFS += -D__32_BITS__ -DMACHINE=$(MACHINE)
 
GCC_CFLAGS += -fno-zero-initialized-in-bss
 
DEFS += -D__32_BITS__ -DKERNEL_LOAD_ADDRESS=$(KERNEL_LOAD_ADDRESS) -D$(DMACHINE)
 
# Compile with framebuffer support
 
ifeq ($(CONFIG_FB), y)
DEFS += -DCONFIG_FB -DFB_INVERT_ENDIAN
endif
 
## Compile with hierarchical page tables support.
#
 
59,10 → 48,10
 
## Compile with support for address space identifiers.
#
# no HW support for ASIDs
#CONFIG_ASID = y
#CONFIG_ASID_FIFO = y
 
CONFIG_ASID = y
CONFIG_ASID_FIFO = y
 
## Compile with support with software division and multiplication.
#
 
69,27 → 58,13
CONFIG_SOFTINT = y
 
ARCH_SOURCES = \
arch/$(ARCH)/src/arm32.c \
arch/$(ARCH)/src/start.S \
arch/$(ARCH)/src/asm.S \
arch/$(ARCH)/src/arm32.c \
arch/$(ARCH)/src/context.S \
arch/$(ARCH)/src/dummy.S \
arch/$(ARCH)/src/panic.S \
arch/$(ARCH)/src/cpu/cpu.c \
arch/$(ARCH)/src/ddi/ddi.c \
arch/$(ARCH)/src/interrupt.c \
arch/$(ARCH)/src/debug/print.c \
arch/$(ARCH)/src/console.c \
arch/$(ARCH)/src/exception.c \
arch/$(ARCH)/src/userspace.c \
arch/$(ARCH)/src/mm/as.c \
arch/$(ARCH)/src/mm/frame.c \
arch/$(ARCH)/src/mm/page.c \
arch/$(ARCH)/src/mm/tlb.c \
arch/$(ARCH)/src/mm/memory_init.c \
arch/$(ARCH)/src/mm/page_fault.c
 
ifeq ($(MACHINE), gxemul_testarm)
ARCH_SOURCES += arch/$(ARCH)/src/drivers/gxemul.c
endif
 
arch/$(ARCH)/src/mm/page.c
/trunk/kernel/arch/arm32/src/userspace.c
File deleted
/trunk/kernel/arch/arm32/src/drivers/gxemul.c
File deleted
/trunk/kernel/arch/arm32/src/interrupt.c
File deleted
/trunk/kernel/arch/arm32/src/exception.c
File deleted
/trunk/kernel/arch/arm32/src/asm.S
File deleted
/trunk/kernel/arch/arm32/src/panic.S
File deleted
/trunk/kernel/arch/arm32/src/debug/print.c
File deleted
/trunk/kernel/arch/arm32/src/console.c
File deleted
/trunk/kernel/arch/arm32/src/arm32.c
1,5 → 1,5
/*
* Copyright (c) 2007 Michal Kebrt
* Copyright (c) 2003-2004 Jakub Jermar
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
30,135 → 30,63
* @{
*/
/** @file
* @brief ARM32 architecture specific functions.
*/
 
 
#include <arch.h>
#include <arch/boot.h>
#include <config.h>
#include <arch/console.h>
#include <ddi/device.h>
#include <genarch/fb/fb.h>
#include <genarch/fb/visuals.h>
#include <ddi/irq.h>
#include <arch/debug/print.h>
#include <print.h>
#include <config.h>
#include <interrupt.h>
#include <arch/regutils.h>
#include <arch/machine.h>
#include <userspace.h>
 
/** Information about loaded tasks. */
bootinfo_t bootinfo;
 
/** Performs arm32 specific initialization before main_bsp() is called. */
void arch_pre_main(void)
{
int i;
 
init.cnt = bootinfo.cnt;
 
for (i = 0; i < bootinfo.cnt; ++i) {
init.tasks[i].addr = bootinfo.tasks[i].addr;
init.tasks[i].size = bootinfo.tasks[i].size;
}
/* TODO */
}
 
/** Performs arm32 specific initialization before mm is initialized. */
void arch_pre_mm_init(void)
{
/* It is not assumed by default */
interrupts_disable();
/* TODO */
}
 
/** Performs arm32 specific initialization afterr mm is initialized. */
void arch_post_mm_init(void)
{
machine_hw_map_init();
 
/* Initialize exception dispatch table */
exception_init();
 
interrupt_init();
console_init(device_assign_devno());
 
#ifdef CONFIG_FB
fb_init(machine_get_fb_address(), 640, 480, 1920, VISUAL_RGB_8_8_8);
#endif
/* TODO */
}
 
/** Performs arm32 specific tasks needed after cpu is initialized.
*
* Currently the function is empty.
*/
void arch_post_cpu_init(void)
{
/* TODO */
}
 
 
/** Performs arm32 specific tasks needed before the multiprocessing is
* initialized.
*
* Currently the function is empty because SMP is not supported.
*/
void arch_pre_smp_init(void)
{
/* TODO */
}
 
 
/** Performs arm32 specific tasks needed after the multiprocessing is
* initialized.
*
* Currently the function is empty because SMP is not supported.
*/
void arch_post_smp_init(void)
{
/* TODO */
}
 
 
/** Performs arm32 specific tasks needed before the new task is run. */
/** Perform arm32 specific tasks needed before the new task is run. */
void before_task_runs_arch(void)
{
tlb_invalidate_all();
/* TODO */
}
 
 
/** Performs arm32 specific tasks needed before the new thread is scheduled.
*
* It sets supervisor_sp.
*/
/** Perform arm32 specific tasks needed before the new thread is scheduled. */
void before_thread_runs_arch(void)
{
uint8_t *stck;
stck = &THREAD->kstack[THREAD_STACK_SIZE - SP_DELTA];
supervisor_sp = (uintptr_t) stck;
/* TODO */
}
 
/** Performs arm32 specific tasks before a thread stops running.
*
* Currently the function is empty.
*/
void after_thread_ran_arch(void)
{
/* TODO */
}
 
/** Halts CPU. */
void cpu_halt(void)
void arch_reboot(void)
{
machine_cpu_halt();
// TODO
while (1);
}
 
/** Reboot. */
void arch_reboot()
{
/* not implemented */
for (;;)
;
}
 
/** @}
*/
/trunk/kernel/arch/arm32/src/ddi/ddi.c
30,7 → 30,6
* @{
*/
/** @file
* @brief DDI.
*/
 
#include <ddi/ddi.h>
/trunk/kernel/arch/arm32/src/context.S
1,5 → 1,5
#
# Copyright (c) 2007 Petr Stepan
# Copyright (c) 2003-2004 Jakub Jermar
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
32,28 → 32,7
.global context_restore_arch
 
context_save_arch:
stmfd sp!, {r1}
mrs r1, cpsr
and r1, r1, #0x1f
stmia r0!, {r1}
ldmfd sp!, {r1}
 
stmia r0!, {sp, lr}
stmia r0!, {r4-r11}
 
mov r0, #1
mov pc, lr
 
 
/* TODO */
context_restore_arch:
ldmia r0!, {r4}
mrs r5, cpsr
bic r5, r5, #0x1f
orr r5, r5, r4
msr cpsr_c, r5
 
ldmia r0!, {sp, lr}
ldmia r0!, {r4-r11}
mov r0, #0
mov pc, lr
/* TODO */
/trunk/kernel/arch/arm32/src/cpu/cpu.c
1,5 → 1,5
/*
* Copyright (c) 2007 Michal Kebrt
* Copyright (c) 2003-2004 Jakub Jermar
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
30,101 → 30,23
* @{
*/
/** @file
* @brief CPU identification.
*/
 
#include <arch/cpu.h>
#include <cpu.h>
#include <arch.h>
#include <print.h>
 
/** Number of indexes left out in the #imp_data array */
#define IMP_DATA_START_OFFSET 0x40
 
/** Implementators (vendor) names */
static char *imp_data[] = {
"?", /* IMP_DATA_START_OFFSET */
"ARM Ltd", /* 0x41 */
"", /* 0x42 */
"", /* 0x43 */
"Digital Equipment Corporation", /* 0x44 */
"", "", "", "", "", "", "", "", "", "", /* 0x45 - 0x4e */
"", "", "", "", "", "", "", "", "", "", /* 0x4f - 0x58 */
"", "", "", "", "", "", "", "", "", "", /* 0x59 - 0x62 */
"", "", "", "", "", "", /* 0x63 - 0x68 */
"Intel Corporation" /* 0x69 */
};
 
/** Length of the #imp_data array */
static int imp_data_length = sizeof(imp_data) / sizeof(char *);
 
/** Architecture names */
static char *arch_data[] = {
"?", /* 0x0 */
"4", /* 0x1 */
"4T", /* 0x2 */
"5", /* 0x3 */
"5T", /* 0x4 */
"5TE", /* 0x5 */
"5TEJ", /* 0x6 */
"6" /* 0x7 */
};
 
/** Length of the #arch_data array */
static int arch_data_length = sizeof(arch_data) / sizeof(char *);
 
 
/** Retrieves processor identification from CP15 register 0.
*
* @param cpu Structure for storing CPU identification.
*/
static void arch_cpu_identify(cpu_arch_t *cpu)
{
uint32_t ident;
asm volatile (
"mrc p15, 0, %0, c0, c0, 0\n"
: "=r" (ident)
);
 
cpu->imp_num = ident >> 24;
cpu->variant_num = (ident << 8) >> 28;
cpu->arch_num = (ident << 12) >> 28;
cpu->prim_part_num = (ident << 16) >> 20;
cpu->rev_num = (ident << 28) >> 28;
}
 
/** Does nothing on ARM. */
void cpu_arch_init(void)
{
}
 
/** Retrieves processor identification and stores it to #CPU.arch */
void cpu_identify(void)
void cpu_identify(void)
{
arch_cpu_identify(&CPU->arch);
/* TODO */
}
 
/** Prints CPU identification. */
void cpu_print_report(cpu_t *m)
{
char * vendor = imp_data[0];
char * architecture = arch_data[0];
cpu_arch_t * cpu_arch = &m->arch;
 
if ((cpu_arch->imp_num) > 0 &&
(cpu_arch->imp_num < (imp_data_length + IMP_DATA_START_OFFSET))) {
vendor = imp_data[cpu_arch->imp_num - IMP_DATA_START_OFFSET];
}
 
if ((cpu_arch->arch_num) > 0 &&
(cpu_arch->arch_num < arch_data_length)) {
architecture = arch_data[cpu_arch->arch_num];
}
 
printf("cpu%d: vendor=%s, architecture=ARM%s, part number=%x, "
"variant=%x, revision=%x\n",
m->id, vendor, architecture, cpu_arch->prim_part_num,
cpu_arch->variant_num, cpu_arch->rev_num);
/* TODO */
}
 
/** @}
/trunk/kernel/arch/arm32/src/mm/page_fault.c
File deleted
/trunk/kernel/arch/arm32/src/mm/tlb.c
File deleted
/trunk/kernel/arch/arm32/src/mm/memory_init.c
File deleted
/trunk/kernel/arch/arm32/src/mm/as.c
1,5 → 1,5
/*
* Copyright (c) 2007 Pavel Jancik, Michal Kebrt
* Copyright (c) 2005 Jakub Jermar
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
30,7 → 30,6
* @{
*/
/** @file
* @brief Address space functions.
*/
 
#include <arch/mm/as.h>
39,14 → 38,23
#include <mm/as.h>
#include <arch.h>
 
/** Architecture dependent address space init.
*
* Since ARM supports page tables, #as_pt_operations are used.
*/
/** Architecture dependent address space init. */
void as_arch_init(void)
{
as_operations = &as_pt_operations;
as_operations = &as_pt_operations;
asid_fifo_init();
}
 
/** Install address space.
*
* Install ASID.
*
* @param as Address space structure.
*/
void as_install_arch(as_t *as)
{
/* TODO */
}
 
/** @}
*/
/trunk/kernel/arch/arm32/src/mm/frame.c
1,5 → 1,5
/*
* Copyright (c) 2007 Pavel Jancik, Michal Kebrt
* Copyright (c) 2005 Jakub Jermar
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
30,38 → 30,15
* @{
*/
/** @file
* @brief Frame related functions.
*/
 
#include <mm/frame.h>
#include <arch/mm/frame.h>
#include <config.h>
#include <arch/debug/print.h>
 
/** Address of the last frame in the memory. */
uintptr_t last_frame = 0;
 
/** Creates memory zones. */
/** Create memory zones. */
void frame_arch_init(void)
{
/* all memory as one zone */
zone_create(0, ADDR2PFN(config.memory_size),
BOOT_PAGE_TABLE_START_FRAME + BOOT_PAGE_TABLE_SIZE_IN_FRAMES, 0);
last_frame = config.memory_size;
 
/* blacklist boot page table */
frame_mark_unavailable(BOOT_PAGE_TABLE_START_FRAME,
BOOT_PAGE_TABLE_SIZE_IN_FRAMES);
/* TODO */
}
 
/** Frees the boot page table. */
void boot_page_table_free(void)
{
int i;
for (i = 0; i < BOOT_PAGE_TABLE_SIZE_IN_FRAMES; i++) {
frame_free(i * FRAME_SIZE + BOOT_PAGE_TABLE_ADDRESS);
}
}
 
/** @}
*/
/trunk/kernel/arch/arm32/src/mm/page.c
1,5 → 1,5
/*
* Copyright (c) 2007 Pavel Jancik, Michal Kebrt
* Copyright (c) 2003-2004 Jakub Jermar
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
30,80 → 30,22
* @{
*/
/** @file
* @brief Paging related functions.
*/
 
#include <arch/mm/page.h>
#include <genarch/mm/page_pt.h>
#include <mm/page.h>
#include <align.h>
#include <config.h>
#include <arch/exception.h>
#include <typedefs.h>
#include <arch/types.h>
#include <interrupt.h>
#include <arch/mm/frame.h>
 
/** Initializes page tables.
*
* 1:1 virtual-physical mapping is created in kernel address space. Mapping
* for table with exception vectors is also created.
*/
void page_arch_init(void)
{
uintptr_t cur;
int flags;
 
page_mapping_operations = &pt_mapping_operations;
 
flags = PAGE_CACHEABLE;
 
/* PA2KA(identity) mapping for all frames until last_frame */
for (cur = 0; cur < last_frame; cur += FRAME_SIZE) {
page_mapping_insert(AS_KERNEL, PA2KA(cur), cur, flags);
}
/* create mapping for exception table at high offset */
#ifdef HIGH_EXCEPTION_VECTORS
void *virtaddr = frame_alloc(ONE_FRAME, FRAME_KA);
page_mapping_insert(AS_KERNEL, EXC_BASE_ADDRESS, KA2PA(virtaddr), flags);
#else
#error "Only high exception vector supported now"
#endif
 
as_switch(NULL, AS_KERNEL);
 
boot_page_table_free();
}
 
/** Maps device into the kernel space.
*
* Maps physical address of device into kernel virtual address space (so it can
* be accessed only by kernel through virtual address).
*
* @param physaddr Physical address where device is connected.
* @param size Length of area where device is present.
*
* @return Virtual address where device will be accessible.
*/
/** Map device into kernel space. */
uintptr_t hw_map(uintptr_t physaddr, size_t size)
{
if (last_frame + ALIGN_UP(size, PAGE_SIZE) >
KA2PA(KERNEL_ADDRESS_SPACE_END_ARCH)) {
panic("Unable to map physical memory %p (%d bytes)",
physaddr, size)
}
 
uintptr_t virtaddr = PA2KA(last_frame);
pfn_t i;
for (i = 0; i < ADDR2PFN(ALIGN_UP(size, PAGE_SIZE)); i++) {
page_mapping_insert(AS_KERNEL, virtaddr + PFN2ADDR(i),
physaddr + PFN2ADDR(i),
PAGE_NOT_CACHEABLE | PAGE_READ | PAGE_WRITE | PAGE_KERNEL);
}
 
last_frame = ALIGN_UP(last_frame + size, FRAME_SIZE);
return virtaddr;
/* TODO */
return NULL;
}
 
/** @}
/trunk/kernel/arch/arm32/src/dummy.S
1,5 → 1,5
#
# Copyright (c) 2007 Michal Kebry, Pavel Jancik, Petr Stepan
# Copyright (c) 2003-2004 Jakub Jermar
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
30,35 → 30,55
 
.global calibrate_delay_loop
.global asm_delay_loop
 
.global dummy
.global arch_grab_console
.global arch_release_console
.global cpu_halt
.global fpu_context_restore
.global fpu_context_save
.global fpu_enable
.global fpu_init
 
.global interrupts_disable
.global interrupts_enable
.global interrupts_read
.global interrupts_restore
.global memcpy
.global memcpy_from_uspace
.global memcpy_to_uspace
.global memsetb
.global panic_printf
.global symbol_table
.global sys_tls_set
.global dummy
 
.global tlb_invalidate_asid
.global tlb_invalidate_pages
.global userspace
calibrate_delay_loop:
mov pc, lr
 
asm_delay_loop:
mov pc, lr
 
arch_grab_console:
arch_release_console:
cpu_halt:
fpu_context_restore:
mov pc, lr
fpu_context_save:
mov pc, lr
fpu_enable:
mov pc, lr
 
fpu_init:
mov pc, lr
# not used on ARM
interrupts_disable:
interrupts_enable:
interrupts_read:
interrupts_restore:
memcpy:
memcpy_from_uspace:
memcpy_to_uspace:
memsetb:
panic_printf:
symbol_table:
sys_tls_set:
tlb_invalidate_asid:
tlb_invalidate_pages:
userspace:
 
dummy:
mov pc, lr
 
0:
b 0b
/trunk/kernel/arch/arm32/src/start.S
1,5 → 1,5
#
# Copyright (c) 2007 Michal Kebrt
# Copyright (c) 2003-2007 Jakub Jermar
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
26,52 → 26,10
# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#
 
#include <arch/asm/boot.h>
 
.text
 
.global kernel_image_start
.global exc_stack
.global supervisor_sp
 
kernel_image_start:
# switch to supervisor mode
mrs r3, cpsr
bic r3, r3, #0x1f
orr r3, r3, #0x13
msr cpsr_c, r3
ldr sp, =temp_stack
 
cmp r2, #0
beq bootinfo_end
 
ldr r3, =bootinfo
 
bootinfo_loop:
ldr r4, [r1]
str r4, [r3]
 
add r1, r1, #4
add r3, r3, #4
add r2, r2, #-4
 
cmp r2, #0
bne bootinfo_loop
/* TODO */
bootinfo_end:
 
bl arch_pre_main
 
bl main_bsp
 
.space TEMP_STACK_SIZE
temp_stack:
 
.space 1024
exc_stack:
 
supervisor_sp:
.space 4
 
0:
b 0b
/trunk/kernel/arch/arm32/include/asm/boot.h
File deleted
/trunk/kernel/arch/arm32/include/machine.h
File deleted
/trunk/kernel/arch/arm32/include/drivers/gxemul.h
File deleted
/trunk/kernel/arch/arm32/include/console.h
File deleted
/trunk/kernel/arch/arm32/include/stack.h
File deleted
/trunk/kernel/arch/arm32/include/regutils.h
File deleted
/trunk/kernel/arch/arm32/include/boot.h
File deleted
/trunk/kernel/arch/arm32/include/mainpage.h
File deleted
/trunk/kernel/arch/arm32/include/debug/print.h
File deleted
/trunk/kernel/arch/arm32/include/types.h
1,5 → 1,5
/*
* Copyright (c) 2007 Pavel Jancik, Michal Kebrt
* Copyright (c) 2003-2007 Jakub Jermar
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
30,18 → 30,11
* @{
*/
/** @file
* @brief Type definitions.
*/
 
#ifndef KERN_arm32_TYPES_H_
#define KERN_arm32_TYPES_H_
 
#ifndef DOXYGEN
# define ATTRIBUTE_PACKED __attribute__ ((packed))
#else
# define ATTRIBUTE_PACKED
#endif
 
#define NULL 0
#define false 0
#define true 1
76,14 → 69,9
typedef int32_t inr_t;
typedef int32_t devno_t;
 
 
/** Page table entry.
*
* We have different structs for level 0 and level 1 page table entries.
* See page.h for definition of pte_level*_t.
*/
/** Page Table Entry. */
typedef struct {
unsigned dummy : 32;
/* placeholder */
} pte_t;
 
#endif
/trunk/kernel/arch/arm32/include/interrupt.h
1,5 → 1,5
/*
* Copyright (c) 2007 Michal Kebrt
* Copyright (c) 2005 Jakub Jermar
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
27,31 → 27,18
*/
 
/** @addtogroup arm32interrupt
* @ingroup interrupt
* @{
*/
/** @file
* @brief Declarations of interrupt controlling routines.
*/
 
#ifndef KERN_arm32_INTERRUPT_H_
#define KERN_arm32_INTERRUPT_H_
 
#include <arch/types.h>
#define IVT_ITEMS 0 /* TODO */
#define IVT_FIRST 0 /* TODO */
 
/** Initial size of exception dispatch table. */
#define IVT_ITEMS 6
 
/** Index of the first item in exception dispatch table. */
#define IVT_FIRST 0
 
 
extern void interrupt_init(void);
extern ipl_t interrupts_disable(void);
extern ipl_t interrupts_enable(void);
extern void interrupts_restore(ipl_t ipl);
extern ipl_t interrupts_read(void);
 
 
#endif
 
/** @}
/trunk/kernel/arch/arm32/include/fpu_context.h
1,5 → 1,5
/*
* Copyright (c) 2007 Michal Kebrt
* Copyright (c) 2005 Jakub Vana
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
30,9 → 30,6
* @{
*/
/** @file
* @brief FPU context (not implemented).
*
* GXemul doesn't support FPU on its ARM CPU.
*/
 
#ifndef KERN_arm32_FPU_CONTEXT_H_
40,7 → 37,7
 
#include <arch/types.h>
 
#define FPU_CONTEXT_ALIGN 0
#define FPU_CONTEXT_ALIGN 0 /* TODO */
 
typedef struct {
} fpu_context_t;
/trunk/kernel/arch/arm32/include/exception.h
1,6 → 1,5
/*
* Copyright (c) 2007 Michal Kebrt, Petr Stepan
*
* Copyright (c) 2003-2004 Jakub Jermar
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
31,7 → 30,6
* @{
*/
/** @file
* @brief Exception declarations.
*/
 
#ifndef KERN_arm32_EXCEPTION_H_
38,106 → 36,28
#define KERN_arm32_EXCEPTION_H_
 
#include <arch/types.h>
#include <arch/regutils.h>
 
/** If defined, forces using of high exception vectors. */
#define HIGH_EXCEPTION_VECTORS
 
#ifdef HIGH_EXCEPTION_VECTORS
#define EXC_BASE_ADDRESS 0xffff0000
#else
#define EXC_BASE_ADDRESS 0x0
#endif
 
/* Exception Vectors */
#define EXC_RESET_VEC (EXC_BASE_ADDRESS + 0x0)
#define EXC_UNDEF_INSTR_VEC (EXC_BASE_ADDRESS + 0x4)
#define EXC_SWI_VEC (EXC_BASE_ADDRESS + 0x8)
#define EXC_PREFETCH_ABORT_VEC (EXC_BASE_ADDRESS + 0xc)
#define EXC_DATA_ABORT_VEC (EXC_BASE_ADDRESS + 0x10)
#define EXC_IRQ_VEC (EXC_BASE_ADDRESS + 0x18)
#define EXC_FIQ_VEC (EXC_BASE_ADDRESS + 0x1c)
 
/* Exception numbers */
#define EXC_RESET 0
#define EXC_UNDEF_INSTR 1
#define EXC_SWI 2
#define EXC_PREFETCH_ABORT 3
#define EXC_DATA_ABORT 4
#define EXC_IRQ 5
#define EXC_FIQ 6
 
 
/** Kernel stack pointer.
*
* It is set when thread switches to user mode,
* and then used for exception handling.
*/
extern uintptr_t supervisor_sp;
 
 
/** Temporary exception stack pointer.
*
* Temporary stack is used in exceptions handling routines
* before switching to thread's kernel stack.
*/
extern uintptr_t exc_stack;
 
 
/** Struct representing CPU state saved when an exception occurs. */
typedef struct {
uint32_t spsr;
uint32_t sp;
uint32_t lr;
 
uint32_t r0;
uint32_t r1;
uint32_t r2;
uint32_t r3;
uint32_t r4;
uint32_t r5;
uint32_t r6;
uint32_t r7;
uint32_t r8;
uint32_t r9;
uint32_t r10;
uint32_t r11;
uint32_t r12;
 
uint32_t pc;
/* TODO */
} istate_t;
 
 
/** Sets Program Counter member of given istate structure.
*
* @param istate istate structure
* @param retaddr new value of istate's PC member
*/
static inline void istate_set_retaddr(istate_t *istate, uintptr_t retaddr)
{
istate->pc = retaddr;
/* TODO */
}
 
 
/** Returns true if exception happened while in userspace. */
/** Return true if exception happened while in userspace */
static inline int istate_from_uspace(istate_t *istate)
{
return (istate->spsr & STATUS_REG_MODE_MASK) == USER_MODE;
/* TODO */
return 0;
}
 
 
/** Returns Program Counter member of given istate structure. */
static inline unative_t istate_get_pc(istate_t *istate)
{
return istate->pc;
/* TODO */
return 0;
}
 
 
extern void install_exception_handlers(void);
extern void exception_init(void);
extern void print_istate(istate_t *istate);
 
 
#endif
 
/** @}
/trunk/kernel/arch/arm32/include/cycle.h
1,5 → 1,5
/*
* Copyright (c) 2007 Michal Kebrt
* Copyright (c) 2006 Martin Decky
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
30,20 → 30,14
* @{
*/
/** @file
* @brief Count of CPU cycles.
*/
 
#ifndef KERN_arm32_CYCLE_H_
#define KERN_arm32_CYCLE_H_
 
/** Returns count of CPU cycles.
*
* No such instruction on ARM to get count of cycles.
*
* @return Count of CPU cycles.
*/
static inline uint64_t get_cycle(void)
{
/* TODO */
return 0;
}
 
/trunk/kernel/arch/arm32/include/byteorder.h
30,7 → 30,6
* @{
*/
/** @file
* @brief Endianness definitions.
*/
 
#ifndef KERN_arm32_BYTEORDER_H_
/trunk/kernel/arch/arm32/include/elf.h
30,7 → 30,6
* @{
*/
/** @file
* @brief ARM ELF constants.
*/
 
#ifndef KERN_arm32_ELF_H_
/trunk/kernel/arch/arm32/include/memstr.h
30,7 → 30,6
* @{
*/
/** @file
* @brief Memory manipulating functions declarations.
*/
 
#ifndef KERN_arm32_MEMSTR_H_
/trunk/kernel/arch/arm32/include/arg.h
30,7 → 30,6
* @{
*/
/** @file
* @brief Empty.
*/
 
#ifndef KERN_arm32_ARG_H_
/trunk/kernel/arch/arm32/include/atomic.h
1,5 → 1,5
/*
* Copyright (c) 2007 Michal Kebrt
* Copyright (c) 2005 Ondrej Palkovsky
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
29,99 → 29,34
/** @addtogroup arm32
* @{
*/
/** @file
* @brief Atomic operations.
/** @file
*/
 
#ifndef KERN_arm32_ATOMIC_H_
#define KERN_arm32_ATOMIC_H_
 
/** Atomic addition.
*
* @param val Where to add.
* @param i Value to be added.
*
* @return Value after addition.
*/
static inline long atomic_add(atomic_t *val, int i)
{
int ret;
volatile long *mem = &(val->count);
#define atomic_inc(x) ((void) atomic_add(x, 1))
#define atomic_dec(x) ((void) atomic_add(x, -1))
 
asm volatile (
"1:\n"
"ldr r2, [%1] \n"
"add r3, r2, %2 \n"
"str r3, %0 \n"
"swp r3, r3, [%1] \n"
"cmp r3, r2 \n"
"bne 1b \n"
#define atomic_postinc(x) (atomic_add(x, 1) - 1)
#define atomic_postdec(x) (atomic_add(x, -1) + 1)
 
: "=m" (ret)
: "r" (mem), "r" (i)
: "r3", "r2"
);
#define atomic_preinc(x) atomic_add(x, 1)
#define atomic_predec(x) atomic_add(x, -1)
 
return ret;
}
 
/** Atomic increment.
/* Atomic addition of immediate value.
*
* @param val Variable to be incremented.
*/
static inline void atomic_inc(atomic_t *val)
{
atomic_add(val, 1);
}
 
/** Atomic decrement.
* @param val Memory location to which will be the immediate value added.
* @param i Signed immediate that will be added to *val.
*
* @param val Variable to be decremented.
* @return Value after addition.
*/
static inline void atomic_dec(atomic_t *val) {
atomic_add(val, -1);
}
 
/** Atomic pre-increment.
*
* @param val Variable to be incremented.
* @return Value after incrementation.
*/
static inline long atomic_preinc(atomic_t *val)
static inline long atomic_add(atomic_t *val, int i)
{
return atomic_add(val, 1);
/* TODO */
return (val->count += i);
}
 
/** Atomic pre-decrement.
*
* @param val Variable to be decremented.
* @return Value after decrementation.
*/
static inline long atomic_predec(atomic_t *val)
{
return atomic_add(val, -1);
}
 
/** Atomic post-increment.
*
* @param val Variable to be incremented.
* @return Value before incrementation.
*/
static inline long atomic_postinc(atomic_t *val)
{
return atomic_add(val, 1) - 1;
}
 
/** Atomic post-decrement.
*
* @param val Variable to be decremented.
* @return Value before decrementation.
*/
static inline long atomic_postdec(atomic_t *val)
{
return atomic_add(val, -1) + 1;
}
 
#endif
 
/** @}
/trunk/kernel/arch/arm32/include/arch.h
30,7 → 30,6
* @{
*/
/** @file
* @brief Empty.
*/
 
#ifndef KERN_arm32_ARCH_H_
/trunk/kernel/arch/arm32/include/proc/task.h
30,7 → 30,6
* @{
*/
/** @file
* @brief Task related declarations.
*/
 
#ifndef KERN_arm32_TASK_H_
/trunk/kernel/arch/arm32/include/proc/thread.h
30,7 → 30,6
* @{
*/
/** @file
* @brief Thread related declarations.
*/
 
#ifndef KERN_arm32_THREAD_H_
47,3 → 46,4
 
/** @}
*/
 
/trunk/kernel/arch/arm32/include/faddr.h
30,7 → 30,6
* @{
*/
/** @file
* @brief Function address conversion.
*/
 
#ifndef KERN_arm32_FADDR_H_
38,10 → 37,6
 
#include <arch/types.h>
 
/** Calculate absolute address of function referenced by fptr pointer.
*
* @param fptr Function pointer.
*/
#define FADDR(fptr) ((uintptr_t) (fptr))
 
#endif
/trunk/kernel/arch/arm32/include/asm.h
1,5 → 1,5
/*
* Copyright (c) 2007 Michal Kebrt
* Copyright (c) 2003-2004 Jakub Jermar
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
29,8 → 29,7
/** @addtogroup arm32
* @{
*/
/** @file
* @brief Declarations of functions implemented in assembly.
/** @file
*/
 
#ifndef KERN_arm32_ASM_H_
37,16 → 36,13
#define KERN_arm32_ASM_H_
 
#include <arch/types.h>
#include <arch/stack.h>
#include <config.h>
#include <arch/interrupt.h>
 
/** No such instruction on ARM to sleep CPU. */
static inline void cpu_sleep(void)
{
/* TODO */
}
 
/** Return base address of current stack.
/** Return base address of current stack
*
* Return the base address of the current stack.
* The stack is assumed to be STACK_SIZE bytes long.
54,13 → 50,8
*/
static inline uintptr_t get_stack_base(void)
{
uintptr_t v;
asm volatile (
"and %0, sp, %1\n"
: "=r" (v)
: "r" (~(STACK_SIZE - 1))
);
return v;
/* TODO */
return NULL;
}
 
extern void cpu_halt(void);
68,6 → 59,11
extern void userspace_asm(uintptr_t ustack, uintptr_t uspace_uarg,
uintptr_t entry);
 
extern ipl_t interrupts_disable(void);
extern ipl_t interrupts_enable(void);
extern void interrupts_restore(ipl_t ipl);
extern ipl_t interrupts_read(void);
 
#endif
 
/** @}
/trunk/kernel/arch/arm32/include/mm/page_fault.h
File deleted
/trunk/kernel/arch/arm32/include/mm/frame.h
1,5 → 1,5
/*
* Copyright (c) 2007 Pavel Jancik, Michal Kebrt
* Copyright (c) 2005 Jakub Jermar
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
30,30 → 30,18
* @{
*/
/** @file
* @brief Frame related declarations.
*/
 
#ifndef KERN_arm32_FRAME_H_
#define KERN_arm32_FRAME_H_
 
#define FRAME_WIDTH 12 /* 4KB frames */
#define FRAME_WIDTH 0 /* TODO */
#define FRAME_SIZE (1 << FRAME_WIDTH)
 
#ifdef KERNEL
#ifndef __ASM__
 
#include <arch/types.h>
 
#define BOOT_PAGE_TABLE_SIZE 0x4000
#define BOOT_PAGE_TABLE_ADDRESS 0x4000
 
#define BOOT_PAGE_TABLE_START_FRAME (BOOT_PAGE_TABLE_ADDRESS >> FRAME_WIDTH)
#define BOOT_PAGE_TABLE_SIZE_IN_FRAMES (BOOT_PAGE_TABLE_SIZE >> FRAME_WIDTH)
 
extern uintptr_t last_frame;
 
extern void frame_arch_init(void);
extern void boot_page_table_free(void);
 
#endif /* __ASM__ */
#endif /* KERNEL */
/trunk/kernel/arch/arm32/include/mm/memory_init.h
1,5 → 1,5
/*
* Copyright (c) 2007 Pavel Jancik
* Copyright (c) 2005 Jakub Jermar
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
30,7 → 30,6
* @{
*/
/** @file
* @brief Memory information functions declarations.
*/
 
#ifndef KERN_arm32_MEMORY_INIT_H_
38,7 → 37,7
 
#include <config.h>
 
size_t get_memory_size(void);
#define get_memory_size() CONFIG_MEMORY_SIZE /* TODO */
 
#endif
 
/trunk/kernel/arch/arm32/include/mm/page.h
1,5 → 1,5
/*
* Copyright (c) 2007 Pavel Jancik, Michal Kebrt
* Copyright (c) 2003-2007 Jakub Jermar
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
30,7 → 30,6
* @{
*/
/** @file
* @brief Paging related declarations.
*/
 
#ifndef KERN_arm32_PAGE_H_
37,8 → 36,6
#define KERN_arm32_PAGE_H_
 
#include <arch/mm/frame.h>
#include <mm/mm.h>
#include <arch/exception.h>
 
#define PAGE_WIDTH FRAME_WIDTH
#define PAGE_SIZE FRAME_SIZE
55,261 → 52,62
 
#ifdef KERNEL
 
#define PTL0_ENTRIES_ARCH (2 << 12) /* 4096 */
#define PTL1_ENTRIES_ARCH 0
#define PTL2_ENTRIES_ARCH 0
#define PTL0_ENTRIES_ARCH 0 /* TODO */
#define PTL1_ENTRIES_ARCH 0 /* TODO */
#define PTL2_ENTRIES_ARCH 0 /* TODO */
#define PTL3_ENTRIES_ARCH 0 /* TODO */
 
/* coarse page tables used (256 * 4 = 1KB per page) */
#define PTL3_ENTRIES_ARCH (2 << 8) /* 256 */
#define PTL0_INDEX_ARCH(vaddr) 0 /* TODO */
#define PTL1_INDEX_ARCH(vaddr) 0 /* TODO */
#define PTL2_INDEX_ARCH(vaddr) 0 /* TODO */
#define PTL3_INDEX_ARCH(vaddr) 0 /* TODO */
 
#define PTL0_SIZE_ARCH FOUR_FRAMES
#define PTL1_SIZE_ARCH 0
#define PTL2_SIZE_ARCH 0
#define PTL3_SIZE_ARCH ONE_FRAME
#define SET_PTL0_ADDRESS_ARCH(ptl0)
 
#define PTL0_INDEX_ARCH(vaddr) (((vaddr) >> 20) & 0xfff)
#define PTL1_INDEX_ARCH(vaddr) 0
#define PTL2_INDEX_ARCH(vaddr) 0
#define PTL3_INDEX_ARCH(vaddr) (((vaddr) >> 12) & 0x0ff)
#define GET_PTL1_ADDRESS_ARCH(ptl0, i) 0 /* TODO */
#define GET_PTL2_ADDRESS_ARCH(ptl1, i) 0 /* TODO */
#define GET_PTL3_ADDRESS_ARCH(ptl2, i) 0 /* TODO */
#define GET_FRAME_ADDRESS_ARCH(ptl3, i) 0 /* TODO */
 
#define GET_PTL1_ADDRESS_ARCH(ptl0, i) \
((pte_t *) ((((pte_level0_t *)(ptl0))[(i)]).coarse_table_addr << 10))
#define GET_PTL2_ADDRESS_ARCH(ptl1, i) \
(ptl1)
#define GET_PTL3_ADDRESS_ARCH(ptl2, i) \
(ptl2)
#define GET_FRAME_ADDRESS_ARCH(ptl3, i) \
((uintptr_t) ((((pte_level1_t *)(ptl3))[(i)]).frame_base_addr << 12))
#define SET_PTL1_ADDRESS_ARCH(ptl0, i, a) /* TODO */
#define SET_PTL2_ADDRESS_ARCH(ptl1, i, a) /* TODO */
#define SET_PTL3_ADDRESS_ARCH(ptl2, i, a) /* TODO */
#define SET_FRAME_ADDRESS_ARCH(ptl3, i, a) /* TODO */
 
#define SET_PTL0_ADDRESS_ARCH(ptl0) \
(set_ptl0_addr((pte_level0_t *) (ptl0)))
#define SET_PTL1_ADDRESS_ARCH(ptl0, i, a) \
(((pte_level0_t *) (ptl0))[(i)].coarse_table_addr = (a) >> 10)
#define SET_PTL2_ADDRESS_ARCH(ptl1, i, a)
#define SET_PTL3_ADDRESS_ARCH(ptl2, i, a)
#define SET_FRAME_ADDRESS_ARCH(ptl3, i, a) \
(((pte_level1_t *) (ptl3))[(i)].frame_base_addr = (a) >> 12)
#define GET_PTL1_FLAGS_ARCH(ptl0, i) 0 /* TODO */
#define GET_PTL2_FLAGS_ARCH(ptl1, i) 0 /* TODO */
#define GET_PTL3_FLAGS_ARCH(ptl2, i) 0 /* TODO */
#define GET_FRAME_FLAGS_ARCH(ptl3, i) 0 /* TODO */
 
#define GET_PTL1_FLAGS_ARCH(ptl0, i) \
get_pt_level0_flags((pte_level0_t *) (ptl0), (index_t) (i))
#define GET_PTL2_FLAGS_ARCH(ptl1, i) \
PAGE_PRESENT
#define GET_PTL3_FLAGS_ARCH(ptl2, i) \
PAGE_PRESENT
#define GET_FRAME_FLAGS_ARCH(ptl3, i) \
get_pt_level1_flags((pte_level1_t *) (ptl3), (index_t) (i))
#define SET_PTL1_FLAGS_ARCH(ptl0, i, x) /* TODO */
#define SET_PTL2_FLAGS_ARCH(ptl1, i, x) /* TODO */
#define SET_PTL3_FLAGS_ARCH(ptl2, i, x) /* TODO */
#define SET_FRAME_FLAGS_ARCH(ptl3, i, x) /* TODO */
 
#define SET_PTL1_FLAGS_ARCH(ptl0, i, x) \
set_pt_level0_flags((pte_level0_t *) (ptl0), (index_t) (i), (x))
#define SET_PTL2_FLAGS_ARCH(ptl1, i, x)
#define SET_PTL3_FLAGS_ARCH(ptl2, i, x)
#define SET_FRAME_FLAGS_ARCH(ptl3, i, x) \
set_pt_level1_flags((pte_level1_t *) (ptl3), (index_t) (i), (x))
#define PTE_VALID_ARCH(pte) 0 /* TODO */
#define PTE_PRESENT_ARCH(pte) 0 /* TODO */
#define PTE_GET_FRAME_ARCH(pte) 0 /* TODO */
#define PTE_WRITABLE_ARCH(pte) 0 /* TODO */
#define PTE_EXECUTABLE_ARCH(pte) 0 /* TODO */
 
#define PTE_VALID_ARCH(pte) \
(*((uint32_t *) (pte)) != 0)
#define PTE_PRESENT_ARCH(pte) \
(((pte_level0_t *) (pte))->descriptor_type != 0)
 
/* pte should point into ptl3 */
#define PTE_GET_FRAME_ARCH(pte) \
(((pte_level1_t *) (pte))->frame_base_addr << FRAME_WIDTH)
 
/* pte should point into ptl3 */
#define PTE_WRITABLE_ARCH(pte) \
(((pte_level1_t *) (pte))->access_permission_0 == \
PTE_AP_USER_RW_KERNEL_RW)
 
#define PTE_EXECUTABLE_ARCH(pte) \
1
 
#ifndef __ASM__
 
/** Level 0 page table entry. */
typedef struct {
/* 0b01 for coarse tables, see below for details */
unsigned descriptor_type : 2;
unsigned impl_specific : 3;
unsigned domain : 4;
unsigned should_be_zero : 1;
#include <mm/mm.h>
#include <arch/exception.h>
 
/* Pointer to the coarse 2nd level page table (holding entries for small
* (4KB) or large (64KB) pages. ARM also supports fine 2nd level page
* tables that may hold even tiny pages (1KB) but they are bigger (4KB
* per table in comparison with 1KB per the coarse table)
*/
unsigned coarse_table_addr : 22;
} ATTRIBUTE_PACKED pte_level0_t;
 
/** Level 1 page table entry (small (4KB) pages used). */
typedef struct {
 
/* 0b10 for small pages */
unsigned descriptor_type : 2;
unsigned bufferable : 1;
unsigned cacheable : 1;
 
/* access permissions for each of 4 subparts of a page
* (for each 1KB when small pages used */
unsigned access_permission_0 : 2;
unsigned access_permission_1 : 2;
unsigned access_permission_2 : 2;
unsigned access_permission_3 : 2;
unsigned frame_base_addr : 20;
} ATTRIBUTE_PACKED pte_level1_t;
 
 
/* Level 1 page tables access permissions */
 
/** User mode: no access, privileged mode: no access. */
#define PTE_AP_USER_NO_KERNEL_NO 0
 
/** User mode: no access, privileged mode: read/write. */
#define PTE_AP_USER_NO_KERNEL_RW 1
 
/** User mode: read only, privileged mode: read/write. */
#define PTE_AP_USER_RO_KERNEL_RW 2
 
/** User mode: read/write, privileged mode: read/write. */
#define PTE_AP_USER_RW_KERNEL_RW 3
 
 
/* pte_level0_t and pte_level1_t descriptor_type flags */
 
/** pte_level0_t and pte_level1_t "not present" flag (used in descriptor_type). */
#define PTE_DESCRIPTOR_NOT_PRESENT 0
 
/** pte_level0_t coarse page table flag (used in descriptor_type). */
#define PTE_DESCRIPTOR_COARSE_TABLE 1
 
/** pte_level1_t small page table flag (used in descriptor type). */
#define PTE_DESCRIPTOR_SMALL_PAGE 2
 
 
/** Sets the address of level 0 page table.
*
* @param pt Pointer to the page table to set.
*/
static inline void set_ptl0_addr( pte_level0_t *pt)
static inline int get_pt_flags(pte_t *pt, index_t i)
{
asm volatile (
"mcr p15, 0, %0, c2, c0, 0 \n"
:
: "r"(pt)
);
return 0; /* TODO */
}
 
 
/** Returns level 0 page table entry flags.
*
* @param pt Level 0 page table.
* @param i Index of the entry to return.
*/
static inline int get_pt_level0_flags(pte_level0_t *pt, index_t i)
static inline void set_pt_flags(pte_t *pt, index_t i, int flags)
{
pte_level0_t *p = &pt[i];
int np = (p->descriptor_type == PTE_DESCRIPTOR_NOT_PRESENT);
 
return (np << PAGE_PRESENT_SHIFT) | (1 << PAGE_USER_SHIFT) |
(1 << PAGE_READ_SHIFT) | (1 << PAGE_WRITE_SHIFT) |
(1 << PAGE_EXEC_SHIFT) | (1 << PAGE_CACHEABLE_SHIFT);
/* TODO */
return;
}
 
/** Returns level 1 page table entry flags.
*
* @param pt Level 1 page table.
* @param i Index of the entry to return.
*/
static inline int get_pt_level1_flags(pte_level1_t *pt, index_t i)
{
pte_level1_t *p = &pt[i];
 
int dt = p->descriptor_type;
int ap = p->access_permission_0;
 
return ((dt == PTE_DESCRIPTOR_NOT_PRESENT) << PAGE_PRESENT_SHIFT) |
((ap == PTE_AP_USER_RO_KERNEL_RW) << PAGE_READ_SHIFT) |
((ap == PTE_AP_USER_RW_KERNEL_RW) << PAGE_READ_SHIFT) |
((ap == PTE_AP_USER_RW_KERNEL_RW) << PAGE_WRITE_SHIFT) |
((ap != PTE_AP_USER_NO_KERNEL_RW) << PAGE_USER_SHIFT) |
((ap == PTE_AP_USER_NO_KERNEL_RW) << PAGE_READ_SHIFT) |
((ap == PTE_AP_USER_NO_KERNEL_RW) << PAGE_WRITE_SHIFT) |
(1 << PAGE_EXEC_SHIFT) |
(p->bufferable << PAGE_CACHEABLE);
}
 
 
/** Sets flags of level 0 page table entry.
*
* @param pt level 0 page table
* @param i index of the entry to be changed
* @param flags new flags
*/
static inline void set_pt_level0_flags(pte_level0_t *pt, index_t i, int flags)
{
pte_level0_t *p = &pt[i];
 
if (flags & PAGE_NOT_PRESENT) {
p->descriptor_type = PTE_DESCRIPTOR_NOT_PRESENT;
/*
* Ensures that the entry will be recognized as valid when
* PTE_VALID_ARCH applied.
*/
p->should_be_zero = 1;
} else {
p->descriptor_type = PTE_DESCRIPTOR_COARSE_TABLE;
p->should_be_zero = 0;
}
}
 
 
/** Sets flags of level 1 page table entry.
*
* We use same access rights for the whole page. When page is not preset we
* store 1 in acess_rigts_3 so that at least one bit is 1 (to mark correct
* page entry, see #PAGE_VALID_ARCH).
*
* @param pt Level 1 page table.
* @param i Index of the entry to be changed.
* @param flags New flags.
*/
static inline void set_pt_level1_flags(pte_level1_t *pt, index_t i, int flags)
{
pte_level1_t *p = &pt[i];
if (flags & PAGE_NOT_PRESENT) {
p->descriptor_type = PTE_DESCRIPTOR_NOT_PRESENT;
p->access_permission_3 = 1;
} else {
p->descriptor_type = PTE_DESCRIPTOR_SMALL_PAGE;
p->access_permission_3 = p->access_permission_0;
}
p->cacheable = p->bufferable = (flags & PAGE_CACHEABLE) != 0;
 
/* default access permission */
p->access_permission_0 = p->access_permission_1 =
p->access_permission_2 = p->access_permission_3 =
PTE_AP_USER_NO_KERNEL_RW;
 
if (flags & PAGE_USER) {
if (flags & PAGE_READ) {
p->access_permission_0 = p->access_permission_1 =
p->access_permission_2 = p->access_permission_3 =
PTE_AP_USER_RO_KERNEL_RW;
}
if (flags & PAGE_WRITE) {
p->access_permission_0 = p->access_permission_1 =
p->access_permission_2 = p->access_permission_3 =
PTE_AP_USER_RW_KERNEL_RW;
}
}
}
 
 
extern void page_arch_init(void);
 
 
#endif /* __ASM__ */
 
#endif /* KERNEL */
/trunk/kernel/arch/arm32/include/mm/asid.h
1,5 → 1,5
/*
* Copyright (c) 2007 Pavel Jancik, Michal Kebrt
* Copyright (c) 2005 Martin Decky
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
30,9 → 30,6
* @{
*/
/** @file
* @brief ASIDs related declarations.
*
* ARM CPUs doesn't support ASIDs.
*/
 
#ifndef KERN_arm32_ASID_H_
40,18 → 37,10
 
#include <arch/types.h>
 
#define ASID_MAX_ARCH 3 /* minimal required number */
#define ASID_MAX_ARCH 3 /* TODO */
 
typedef uint8_t asid_t;
 
/*
* This works due to fact that this file is never included alone but only
* through "generic/include/mm/asid.h" where ASID_START is defined.
*/
#define asid_get() (ASID_START + 1)
 
#define asid_put(asid)
 
#endif
 
/** @}
/trunk/kernel/arch/arm32/include/mm/tlb.h
1,5 → 1,5
/*
* Copyright (c) 2007 Pavel Jancik
* Copyright (c) 2005 Jakub Jermar
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
30,7 → 30,6
* @{
*/
/** @file
* @brief TLB related declarations.
*/
 
#ifndef KERN_arm32_TLB_H_
/trunk/kernel/arch/arm32/include/mm/as.h
1,5 → 1,5
/*
* Copyright (c) 2007 Pavel Jancik, Michal Kebrt
* Copyright (c) 2005 Jakub Jermar
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
30,7 → 30,6
* @{
*/
/** @file
* @brief Address space manipulating functions declarations.
*/
 
#ifndef KERN_arm32_AS_H_
38,10 → 37,10
 
#define KERNEL_ADDRESS_SPACE_SHADOWED_ARCH 0
 
#define KERNEL_ADDRESS_SPACE_START_ARCH (unsigned long) 0x80000000
#define KERNEL_ADDRESS_SPACE_END_ARCH (unsigned long) 0xffffffff
#define USER_ADDRESS_SPACE_START_ARCH (unsigned long) 0x00000000
#define USER_ADDRESS_SPACE_END_ARCH (unsigned long) 0x7fffffff
#define KERNEL_ADDRESS_SPACE_START_ARCH (unsigned long) 0x80000000
#define KERNEL_ADDRESS_SPACE_END_ARCH (unsigned long) 0xffffffff
#define USER_ADDRESS_SPACE_START_ARCH (unsigned long) 0x00000000
#define USER_ADDRESS_SPACE_END_ARCH (unsigned long) 0x7fffffff
 
#define USTACK_ADDRESS_ARCH (0x80000000 - PAGE_SIZE)
 
53,7 → 52,6
#define as_constructor_arch(as, flags) (as != as)
#define as_destructor_arch(as) (as != as)
#define as_create_arch(as, flags) (as != as)
#define as_install_arch(as)
#define as_deinstall_arch(as)
#define as_invalidate_translation_cache(as, page, cnt)
 
/trunk/kernel/arch/arm32/include/context.h
1,5 → 1,5
/*
* Copyright (c) 2007 Michal Kebrt
* Copyright (c) 2003-2004 Jakub Jermar
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
30,43 → 30,30
* @{
*/
/** @file
* @brief Thread context.
*/
 
#ifndef KERN_arm32_CONTEXT_H_
#define KERN_arm32_CONTEXT_H_
 
#include <align.h>
#include <arch/stack.h>
/*
* Put one item onto the stack to support get_stack_base() and align it up.
*/
#define SP_DELTA 0 /* TODO */
 
/* Put one item onto the stack to support get_stack_base() and align it up. */
#define SP_DELTA (0 + ALIGN_UP(STACK_ITEM_SIZE, STACK_ALIGNMENT))
 
#ifndef __ASM__
 
#include <arch/types.h>
 
/** Thread context containing registers that must be preserved across function
* calls.
/*
* Only save registers that must be preserved across function calls.
*/
typedef struct {
uint32_t cpu_mode;
uintptr_t sp;
uintptr_t pc;
uint32_t r4;
uint32_t r5;
uint32_t r6;
uint32_t r7;
uint32_t r8;
uint32_t r9;
uint32_t r10;
uint32_t r11;
ipl_t ipl;
} context_t;
 
 
#endif /* __ASM__ */
 
#endif
/trunk/kernel/arch/arm32/include/debug.h
30,7 → 30,6
* @{
*/
/** @file
* @brief Empty.
*/
 
#ifndef KERN_arm32_DEBUG_H_
/trunk/kernel/arch/arm32/include/barrier.h
30,7 → 30,6
* @{
*/
/** @file
* @brief Memory barriers.
*/
 
#ifndef KERN_arm32_BARRIER_H_
/trunk/kernel/arch/arm32/include/cpu.h
1,5 → 1,5
/*
* Copyright (c) 2007 Michal Kebrt
* Copyright (c) 2003-2004 Jakub Jermar
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
30,7 → 30,6
* @{
*/
/** @file
* @brief CPU identification.
*/
 
#ifndef KERN_arm32_CPU_H_
39,25 → 38,9
#include <arch/types.h>
#include <arch/asm.h>
 
 
/** Struct representing ARM CPU identifiaction. */
typedef struct {
/** Implementator (vendor) number. */
uint32_t imp_num;
 
/** Variant number. */
uint32_t variant_num;
 
/** Architecture number. */
uint32_t arch_num;
 
/** Primary part number. */
uint32_t prim_part_num;
 
/** Revision number. */
uint32_t rev_num;
} cpu_arch_t;
 
#endif
 
/** @}
/trunk/kernel/arch/arm32/_link.ld.in
6,12 → 6,9
*
*/
 
OUTPUT_ARCH(arm)
ENTRY(kernel_image_start)
 
 
SECTIONS {
. = KERNEL_LOAD_ADDRESS;
.text : {
ktext_start = .;
*(.text);
25,20 → 22,23
hardcoded_kdata_size = .;
LONG(kdata_end - kdata_start);
hardcoded_load_address = .;
LONG(KERNEL_LOAD_ADDRESS);
*(.bss); /* uninitialized static variables */
*(COMMON); /* global variables */
 
LONG(0); /* TODO */
*(.rodata*);
*(.sdata);
*(.reginfo);
symbol_table = .;
*(symtab.*);
}
_gp = . + 0x8000;
.lit8 : { *(.lit8) }
.lit4 : { *(.lit4) }
.sbss : {
*(.sbss);
*(.scommon);
}
.bss : {
*(.bss); /* uninitialized static variables */
*(COMMON); /* global variables */
}
 
kdata_end = .;
 
48,5 → 48,4
*(.comment);
*(.note);
}
 
}
/trunk/kernel/arch/ppc32/include/mm/page.h
70,11 → 70,6
#define PTL2_ENTRIES_ARCH 0
#define PTL3_ENTRIES_ARCH 1024
 
#define PTL0_SIZE_ARCH ONE_FRAME
#define PTL1_SIZE_ARCH 0
#define PTL2_SIZE_ARCH 0
#define PTL3_SIZE_ARCH ONE_FRAME
 
#define PTL0_INDEX_ARCH(vaddr) (((vaddr) >> 22) & 0x3ff)
#define PTL1_INDEX_ARCH(vaddr) 0
#define PTL2_INDEX_ARCH(vaddr) 0
/trunk/kernel/arch/ppc64/include/mm/page.h
70,11 → 70,6
#define PTL2_ENTRIES_ARCH 0
#define PTL3_ENTRIES_ARCH 1024
 
#define PTL0_SIZE_ARCH ONE_FRAME
#define PTL1_SIZE_ARCH 0
#define PTL2_SIZE_ARCH 0
#define PTL3_SIZE_ARCH ONE_FRAME
 
#define PTL0_INDEX_ARCH(vaddr) (((vaddr) >> 22) & 0x3ff)
#define PTL1_INDEX_ARCH(vaddr) 0
#define PTL2_INDEX_ARCH(vaddr) 0
/trunk/kernel/doc/AUTHORS
1,10 → 1,8
Jakub Jermar <jermar@helenos.eu>
Ondrej Palkovsky <palkovsky@helenos.eu>
Martin Decky <decky@helenos.eu>
Ondrej Palkovsky <palkovsky@helenos.eu>
Jakub Vana <vana@helenos.eu>
Josef Cejka <cejka@helenos.eu>
Michal Kebrt <michalek.k@seznam.cz>
Sergey Bondari <bondari@helenos.eu>
Pavel Jancik <alfik.009@seznam.cz>
Petr Stepan <stepan.petr@volny.cz>
Michal Konopa <mkonopa@seznam.cz>
 
/trunk/kernel/doc/arch/arm32
File deleted
/trunk/kernel/doc/doxygroups.h
27,7 → 27,6
* @ingroup proc
*/
 
/**
* @cond amd64
* @defgroup amd64proc amd64
35,13 → 34,6
* @endcond
*/
 
/**
* @cond arm32
* @defgroup arm32proc arm32
* @ingroup proc
* @endcond
*/
 
/**
* @cond ia32
* @defgroup ia32proc ia32
110,13 → 102,6
* @ingroup mm
* @endcond
*/
/**
* @cond arm32
* @defgroup arm32mm arm32
* @ingroup mm
* @endcond
*/
/**
* @cond ia32
186,13 → 171,6
* @ingroup ddi
* @endcond
*/
/**
* @cond arm32
* @defgroup arm32ddi arm32
* @ingroup ddi
* @endcond
*/
 
/**
* @cond ia32
250,13 → 228,6
* @ingroup debug
* @endcond
*/
/**
* @cond arm32
* @defgroup arm32debug arm32
* @ingroup debug
* @endcond
*/
 
/**
* @cond ia32
314,13 → 285,6
* @ingroup interrupt
* @endcond
*/
/**
* @cond arm32
* @defgroup arm32interrupt arm32
* @ingroup interrupt
* @endcond
*/
 
/**
* @cond ia32
382,13 → 346,6
* @ingroup others
* @endcond
*/
/**
* @cond arm32
* @defgroup arm32 arm32
* @ingroup others
* @endcond
*/
 
/**
* @cond ia32
/trunk/kernel/kernel.config
49,6 → 49,10
! [ARCH=amd64] MACHINE (choice)
 
# Machine type
@ "gxemul" GXEmul
! [ARCH=arm32] MACHINE (choice)
 
# Machine type
@ "msim" MSIM Simulator
@ "simics" Virtutech Simics simulator
@ "lgxemul" GXEmul Little Endian
57,16 → 61,12
! [ARCH=mips32] MACHINE (choice)
 
# Machine type
@ "gxemul_testarm" GXEmul testarm
! [ARCH=arm32] MACHINE (choice)
 
# Machine type
@ "ski" Ski ia64 simulator
@ "i460GX" i460GX chipset machine
! [ARCH=ia64] MACHINE (choice)
 
# Framebuffer support
! [(ARCH=mips32&MACHINE=lgxemul)|(ARCH=mips32&MACHINE=bgxemul)|(ARCH=ia32)|(ARCH=amd64)|(ARCH=arm32&MACHINE=gxemul_testarm)] CONFIG_FB (y/n)
! [(ARCH=mips32&MACHINE=lgxemul)|(ARCH=mips32&MACHINE=bgxemul)|(ARCH=ia32)|(ARCH=amd64)] CONFIG_FB (y/n)
 
# Framebuffer width
@ "640"
/trunk/kernel/genarch/src/mm/as_pt.c
97,13 → 97,11
{
pte_t *src_ptl0, *dst_ptl0;
ipl_t ipl;
int table_size;
 
dst_ptl0 = (pte_t *) frame_alloc(PTL0_SIZE, FRAME_KA);
table_size = FRAME_SIZE << PTL0_SIZE;
dst_ptl0 = (pte_t *) frame_alloc(ONE_FRAME, FRAME_KA);
 
if (flags & FLAG_AS_KERNEL) {
memsetb((uintptr_t) dst_ptl0, table_size, 0);
memsetb((uintptr_t) dst_ptl0, PAGE_SIZE, 0);
} else {
uintptr_t src, dst;
118,8 → 116,8
src = (uintptr_t) &src_ptl0[PTL0_INDEX(KERNEL_ADDRESS_SPACE_START)];
dst = (uintptr_t) &dst_ptl0[PTL0_INDEX(KERNEL_ADDRESS_SPACE_START)];
 
memsetb((uintptr_t) dst_ptl0, table_size, 0);
memcpy((void *) dst, (void *) src, table_size - (src - (uintptr_t) src_ptl0));
memsetb((uintptr_t) dst_ptl0, PAGE_SIZE, 0);
memcpy((void *) dst, (void *) src, PAGE_SIZE - (src - (uintptr_t) src_ptl0));
mutex_unlock(&AS_KERNEL->lock);
interrupts_restore(ipl);
}
/trunk/kernel/genarch/src/mm/page_pt.c
75,8 → 75,8
ptl0 = (pte_t *) PA2KA((uintptr_t) as->genarch.page_table);
 
if (GET_PTL1_FLAGS(ptl0, PTL0_INDEX(page)) & PAGE_NOT_PRESENT) {
newpt = (pte_t *)frame_alloc(PTL1_SIZE, FRAME_KA);
memsetb((uintptr_t)newpt, FRAME_SIZE << PTL1_SIZE, 0);
newpt = (pte_t *)frame_alloc(ONE_FRAME, FRAME_KA);
memsetb((uintptr_t)newpt, PAGE_SIZE, 0);
SET_PTL1_ADDRESS(ptl0, PTL0_INDEX(page), KA2PA(newpt));
SET_PTL1_FLAGS(ptl0, PTL0_INDEX(page), PAGE_PRESENT | PAGE_USER | PAGE_EXEC | PAGE_CACHEABLE | PAGE_WRITE);
}
84,8 → 84,8
ptl1 = (pte_t *) PA2KA(GET_PTL1_ADDRESS(ptl0, PTL0_INDEX(page)));
 
if (GET_PTL2_FLAGS(ptl1, PTL1_INDEX(page)) & PAGE_NOT_PRESENT) {
newpt = (pte_t *)frame_alloc(PTL2_SIZE, FRAME_KA);
memsetb((uintptr_t)newpt, FRAME_SIZE << PTL2_SIZE, 0);
newpt = (pte_t *)frame_alloc(ONE_FRAME, FRAME_KA);
memsetb((uintptr_t)newpt, PAGE_SIZE, 0);
SET_PTL2_ADDRESS(ptl1, PTL1_INDEX(page), KA2PA(newpt));
SET_PTL2_FLAGS(ptl1, PTL1_INDEX(page), PAGE_PRESENT | PAGE_USER | PAGE_EXEC | PAGE_CACHEABLE | PAGE_WRITE);
}
93,8 → 93,8
ptl2 = (pte_t *) PA2KA(GET_PTL2_ADDRESS(ptl1, PTL1_INDEX(page)));
 
if (GET_PTL3_FLAGS(ptl2, PTL2_INDEX(page)) & PAGE_NOT_PRESENT) {
newpt = (pte_t *)frame_alloc(PTL3_SIZE, FRAME_KA);
memsetb((uintptr_t)newpt, FRAME_SIZE << PTL3_SIZE, 0);
newpt = (pte_t *)frame_alloc(ONE_FRAME, FRAME_KA);
memsetb((uintptr_t)newpt, PAGE_SIZE, 0);
SET_PTL3_ADDRESS(ptl2, PTL2_INDEX(page), KA2PA(newpt));
SET_PTL3_FLAGS(ptl2, PTL2_INDEX(page), PAGE_PRESENT | PAGE_USER | PAGE_EXEC | PAGE_CACHEABLE | PAGE_WRITE);
}
/trunk/kernel/genarch/include/mm/page_pt.h
55,12 → 55,6
#define PTL2_ENTRIES PTL2_ENTRIES_ARCH
#define PTL3_ENTRIES PTL3_ENTRIES_ARCH
 
/* Table sizes in each level */
#define PTL0_SIZE PTL0_SIZE_ARCH
#define PTL1_SIZE PTL1_SIZE_ARCH
#define PTL2_SIZE PTL2_SIZE_ARCH
#define PTL3_SIZE PTL3_SIZE_ARCH
 
/*
* These macros process vaddr and extract those portions
* of it that function as indices to respective page tables.
/trunk/uspace/libc/arch/arm32/_link.ld.in
7,46 → 7,46
}
 
SECTIONS {
. = 0x1000;
. = 0x2000;
 
.init ALIGN(0x1000): SUBALIGN(0x1000) {
.init ALIGN(0x2000): SUBALIGN(0x2000) {
*(.init);
} : text
.text : {
*(.text);
*(.rodata*);
*(.rodata*);
} :text
.data ALIGN(0x1000) : SUBALIGN(0x1000) {
 
.got ALIGN(0x2000) : SUBALIGN(0x2000) {
_gp = .;
*(.got*);
} :data
.data : {
*(.opd);
*(.data .data.*);
*(.sdata);
} :data
 
.tdata : {
_tdata_start = .;
*(.tdata);
_tdata_end = .;
} :data
 
.tbss : {
_tbss_start = .;
*(.tbss);
_tbss_end = .;
} :data
 
.bss : {
*(.sbss);
*(.scommon);
*(COMMON);
*(.bss);
*(COMMON);
*(.bss);
} :data
. = ALIGN(0x1000);
 
. = ALIGN(0x2000);
_heap = .;
/DISCARD/ : {
*(*);
}
 
}
}
/trunk/uspace/libc/arch/arm32/include/psthread.h
1,5 → 1,5
/*
* Copyright (c) 2007 Michal Kebrt
* Copyright (c) 2006 Ondrej Palkovsky
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
29,8 → 29,8
/** @addtogroup libcarm32
* @{
*/
/** @file
* @brief psthread related declarations.
/** @file
* @ingroup libcarm32
*/
 
#ifndef LIBC_arm32_PSTHREAD_H_
37,53 → 37,15
#define LIBC_arm32_PSTHREAD_H_
 
#include <types.h>
#include <align.h>
#include "thread.h"
 
/** Size of a stack item */
#define STACK_ITEM_SIZE 4
#define SP_DELTA 0 /* TODO */
 
/** Stack alignment - see <a href="http://www.arm.com/support/faqdev/14269.html">ABI</a> for details */
#define STACK_ALIGNMENT 8
 
#define SP_DELTA (0 + ALIGN_UP(STACK_ITEM_SIZE, STACK_ALIGNMENT))
 
 
/** Sets data to the context.
*
* @param c Context (#context_t).
* @param _pc Program counter.
* @param stack Stack address.
* @param size Stack size.
* @param ptls Pointer to the TCB.
*/
#define context_set(c, _pc, stack, size, ptls) \
(c)->pc = (sysarg_t) (_pc); \
(c)->sp = ((sysarg_t) (stack)) + (size) - SP_DELTA; \
(c)->tls = ((sysarg_t)(ptls)) + sizeof(tcb_t) + ARM_TP_OFFSET;
 
 
/** Thread context.
*
* Only registers preserved accross function calls are included. r9 is used
* to store a TLS address. -ffixed-r9 gcc forces gcc not to use this
* register. -mtp=soft forces gcc to use #__aeabi_read_tp to obtain
* TLS address.
*/
typedef struct {
uint32_t sp;
uint32_t pc;
uint32_t r4;
uint32_t r5;
uint32_t r6;
uint32_t r7;
uint32_t r8;
uint32_t tls;
uint32_t r10;
uint32_t r11;
} context_t;
 
 
#endif
 
/** @}
/trunk/uspace/libc/arch/arm32/include/syscall.h
1,5 → 1,5
/*
* Copyright (c) 2007 Michal Kebrt
* Copyright (c) 2005 Martin Decky
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
26,11 → 26,11
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup libcarm32
/** @addtogroup libc
* @{
*/
/** @file
* @brief Empty.
/**
* @file
*/
 
#ifndef LIBC_arm32_SYSCALL_H_
/trunk/uspace/libc/arch/arm32/include/atomic.h
1,5 → 1,5
/*
* Copyright (c) 2007 Michal Kebrt
* Copyright (c) 2005 Jakub Jermar
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
30,7 → 30,6
* @{
*/
/** @file
* @brief Atomic operations.
*/
 
#ifndef LIBC_arm32_ATOMIC_H_
38,80 → 37,26
 
/** Atomic addition.
*
* @param val Where to add.
* @param i Value to be added.
* @param val Atomic value.
* @param imm Value to add.
*
* @return Value after addition.
*/
static inline long atomic_add(atomic_t *val, int i)
static inline long atomic_add(atomic_t *val, int imm)
{
int ret;
volatile long * mem = &(val->count);
 
asm volatile (
"1: \n"
"ldr r2, [%1] \n"
"add r3, r2, %2 \n"
"str r3, %0 \n"
"swp r3, r3, [%1] \n"
"cmp r3, r2 \n"
"bne 1b \n"
 
: "=m" (ret)
: "r" (mem), "r" (i)
: "r3", "r2"
);
 
return ret;
/* TODO */
return (val->count += imm);
}
 
 
/** Atomic increment.
*
* @param val Variable to be incremented.
*/
static inline void atomic_inc(atomic_t *val) { atomic_add(val, 1); }
 
 
/** Atomic decrement.
*
* @param val Variable to be decremented.
*/
static inline void atomic_dec(atomic_t *val) { atomic_add(val, -1); }
 
static inline long atomic_preinc(atomic_t *val) { return atomic_add(val, 1) + 1; }
static inline long atomic_predec(atomic_t *val) { return atomic_add(val, -1) - 1; }
 
/** Atomic pre-increment.
*
* @param val Variable to be incremented.
* @return Value after incrementation.
*/
static inline long atomic_preinc(atomic_t *val) { return atomic_add(val, 1); }
static inline long atomic_postinc(atomic_t *val) { return atomic_add(val, 1); }
static inline long atomic_postdec(atomic_t *val) { return atomic_add(val, -1); }
 
 
/** Atomic pre-decrement.
*
* @param val Variable to be decremented.
* @return Value after decrementation.
*/
static inline long atomic_predec(atomic_t *val) { return atomic_add(val, -1); }
 
 
/** Atomic post-increment.
*
* @param val Variable to be incremented.
* @return Value before incrementation.
*/
static inline long atomic_postinc(atomic_t *val) { return atomic_add(val, 1) - 1; }
 
 
/** Atomic post-decrement.
*
* @param val Variable to be decremented.
* @return Value before decrementation.
*/
static inline long atomic_postdec(atomic_t *val) { return atomic_add(val, -1) + 1; }
 
 
#endif
 
/** @}
/trunk/uspace/libc/arch/arm32/include/endian.h
29,8 → 29,7
/** @addtogroup libcarm32
* @{
*/
/** @file
* @brief Endianness definition.
/** @file
*/
 
#ifndef LIBC_arm32_ENDIAN_H_
/trunk/uspace/libc/arch/arm32/include/stackarg.h
1,5 → 1,5
/*
* Copyright (c) 2007 Michal Kebrt
* Copyright (c) 2006 Josef Cejka
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
30,7 → 30,6
* @{
*/
/** @file
* @brief Empty.
*/
 
#ifndef LIBC_arm32_STACKARG_H_
/trunk/uspace/libc/arch/arm32/include/faddr.h
1,5 → 1,5
/*
* Copyright (c) 2007 Michal Kebrt
* Copyright (c) 2005 Jakub Jermar
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
29,8 → 29,7
/** @addtogroup libcarm32
* @{
*/
/** @file
* @brief Function address conversion.
/** @file
*/
 
#ifndef LIBC_arm32_FADDR_H_
38,9 → 37,13
 
#include <libarch/types.h>
 
/** Calculate absolute address of function referenced by fptr pointer.
/**
*
* Calculate absolute address of function
* referenced by fptr pointer.
*
* @param f Function pointer.
*
*/
#define FADDR(f) (f)
 
/trunk/uspace/libc/arch/arm32/include/limits.h
1,5 → 1,5
/*
* Copyright (c) 2007 Michal Kebrt
* Copyright (c) 2006 Josef Cejka
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
29,17 → 29,17
/** @addtogroup libcarm32
* @{
*/
/** @file
* @brief Limits declarations.
/** @file
* @ingroup libcarm32
*/
 
#ifndef LIBC_arm32__LIMITS_H_
#define LIBC_arm32__LIMITS_H_
 
#define LONG_MIN MIN_INT32
#define LONG_MAX MAX_INT32
#define ULONG_MIN MIN_UINT32
#define ULONG_MAX MAX_UINT32
# define LONG_MIN MIN_INT32
# define LONG_MAX MAX_INT32
# define ULONG_MIN MIN_UINT32
# define ULONG_MAX MAX_UINT32
 
#endif
 
/trunk/uspace/libc/arch/arm32/include/types.h
29,8 → 29,8
/** @addtogroup libcarm32
* @{
*/
/** @file
* @brief Definitions of basic types like #uintptr_t.
/** @file
* @ingroup libcarm32
*/
 
#ifndef LIBC_arm32_TYPES_H_
/trunk/uspace/libc/arch/arm32/include/config.h
29,8 → 29,7
/** @addtogroup libcarm32
* @{
*/
/** @file
* @brief Configuration constants.
/** @file
*/
 
#ifndef LIBC_arm32_CONFIG_H_
/trunk/uspace/libc/arch/arm32/include/thread.h
1,5 → 1,5
/*
* Copyright (c) 2007 Pavel Jancik, Michal Kebrt
* Copyright (c) 2006 Jakub Jermar
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
26,11 → 26,10
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup libcarm32
/** @addtogroup libcia64
* @{
*/
/** @file
* @brief Uspace threads and TLS.
*/
 
#ifndef LIBC_arm32_THREAD_H_
38,61 → 37,24
 
#include <unistd.h>
 
/** Stack initial size. */
#define THREAD_INITIAL_STACK_PAGES_NO 1
 
/** Offsets for accessing __thread variables are shifted 8 bytes higher. */
#define ARM_TP_OFFSET (-8)
 
/** TCB (Thread Control Block) struct.
*
* TLS starts just after this struct.
*/
typedef struct {
/** psthread data. */
void *pst_data;
/* TODO */
} tcb_t;
 
 
/** Sets TLS address to the r9 register.
*
* @param tcb TCB (TLS starts behind)
*/
static inline void __tcb_set(tcb_t *tcb)
{
void *tls = (void *)tcb;
tls += sizeof(tcb_t) + ARM_TP_OFFSET;
asm volatile (
"mov r9, %0"
:
: "r"(tls)
);
/* TODO */
}
 
 
/** Returns TCB address.
*
* @return TCB address (starts before TLS which address is stored in r9 register).
*/
static inline tcb_t *__tcb_get(void)
{
void *ret;
asm volatile (
"mov %0, r9"
: "=r"(ret)
);
return (tcb_t *)(ret - ARM_TP_OFFSET - sizeof(tcb_t));
/* TODO */
return NULL;
}
 
 
/** Returns TLS address stored.
*
* Implemented in assembly.
*
* @return TLS address stored in r9 register
*/
extern uintptr_t __aeabi_read_tp(void);
 
#endif
 
/** @}
/trunk/uspace/libc/arch/arm32/Makefile.inc
1,5 → 1,5
#
# Copyright (c) 2007 Michal Kebrt, Pavel Jancik
# Copyright (c) 2005 Martin Decky
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
31,7 → 31,7
 
TARGET = arm-linux-gnu
TOOLCHAIN_DIR = /usr/local/arm/bin
CFLAGS += -ffixed-r9 -mtp=soft
CFLAGS +=
LFLAGS += -N ../softint/libsoftint.a
AFLAGS +=
 
38,7 → 38,7
ARCH_SOURCES += arch/$(ARCH)/src/syscall.c \
arch/$(ARCH)/src/psthread.S \
arch/$(ARCH)/src/thread.c \
arch/$(ARCH)/src/eabi.S
arch/$(ARCH)/src/dummy.S
 
BFD_NAME = elf32-little
BFD_ARCH = arm
/trunk/uspace/libc/arch/arm32/src/eabi.S
File deleted
/trunk/uspace/libc/arch/arm32/src/entry.s
1,5 → 1,5
#
# Copyright (c) 2007 Michal Kebrt, Pavel Jancik
# Copyright (c) 2006 Jakub Jermar
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
28,8 → 28,6
 
.section .init, "ax"
 
.org 0
 
.global __entry
.global __entry_driver
 
37,13 → 35,7
#
#
__entry:
bl __main
bl __io_init
bl main
bl __exit
 
__entry_driver:
bl __main
bl main
bl __exit
 
#
# TODO
#
/trunk/uspace/libc/arch/arm32/src/thread.c
1,5 → 1,5
/*
* Copyright (c) 2007 Pavel Jancik
* Copyright (c) 2006 Ondrej Palkovsky
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
32,35 → 32,25
* @{
*/
/** @file
* @brief Uspace threads and TLS.
*/
 
#include <thread.h>
#include <malloc.h>
 
/** Allocates TLS & TCB.
/** Allocate TLS & TCB for initial module threads
*
* @param data Start of data section (output parameter).
* @param size Size of (tbss + tdata) sections.
* @return Pointer to the allocated #tcb_t structure.
* @param data Start of data section
* @return pointer to tcb_t structure
*/
tcb_t * __alloc_tls(void **data, size_t size)
{
tcb_t *result;
 
result = malloc(sizeof(tcb_t) + size);
*data = ((void *)result) + sizeof(tcb_t);
return result;
/* TODO */
return NULL;
}
 
/** Deallocates TLS & TCB.
*
* @param tcb TCB structure to be deallocated (along with corresponding TLS).
* @param size Not used.
*/
void __free_tls_arch(tcb_t *tcb, size_t size)
{
free(tcb);
/* TODO */
}
 
/** @}
/trunk/uspace/libc/arch/arm32/src/thread_entry.s
34,4 → 34,7
#
#
__thread_entry:
b __thread_main
 
#
# TODO
#
/trunk/uspace/libc/arch/arm32/src/psthread.S
1,5 → 1,5
#
# Copyright (c) 2007 Michal Kebrt
# Copyright (c) 2005 Jakub Jermar
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
32,18 → 32,7
.global context_restore
 
context_save:
stmia r0!, {sp, lr}
stmia r0!, {r4-r11}
/* TODO */
 
# return 1
mov r0, #1
mov pc, lr
 
context_restore:
ldmia r0!, {sp, lr}
ldmia r0!, {r4-r11}
 
#return 0
mov r0, #0
mov pc, lr
 
/* TODO */
/trunk/uspace/libc/arch/arm32/src/syscall.c
1,5 → 1,5
/*
* Copyright (c) 2007 Pavel Jancik
* Copyright (c) 2005 Martin Decky
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
30,44 → 30,16
* @{
*/
/** @file
* @brief Syscall routine.
* @ingroup libcarm32
*/
 
#include <libc.h>
 
 
/** Syscall routine.
*
* Stores p1-p4, id to r0-r4 registers and calls <code>swi</code>
* instruction. Returned value is read from r0 register.
*
* @param p1 Parameter 1.
* @param p2 Parameter 2.
* @param p3 Parameter 3.
* @param p4 Parameter 4.
* @param id Number of syscall.
*
* @return Syscall return value.
*/
sysarg_t __syscall(const sysarg_t p1, const sysarg_t p2, const sysarg_t p3,
const sysarg_t p4, const syscall_t id)
{
register sysarg_t __arm_reg_r0 asm("r0") = p1;
register sysarg_t __arm_reg_r1 asm("r1") = p2;
register sysarg_t __arm_reg_r2 asm("r2") = p3;
register sysarg_t __arm_reg_r3 asm("r3") = p4;
register sysarg_t __arm_reg_r4 asm("r4") = id;
 
asm volatile ( "swi"
: "=r" (__arm_reg_r0)
: "r" (__arm_reg_r0),
"r" (__arm_reg_r1),
"r" (__arm_reg_r2),
"r" (__arm_reg_r3),
"r" (__arm_reg_r4)
);
 
return __arm_reg_r0;
/* TODO */
return 0;
}
 
/** @}
/trunk/uspace/libc/arch/arm32/src/dummy.S
0,0 → 1,35
#
# Copyright (c) 2007 Jakub Jermar
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions
# are met:
#
# - Redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer.
# - Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in the
# documentation and/or other materials provided with the distribution.
# - The name of the author may not be used to endorse or promote products
# derived from this software without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#
 
.text
 
.global __aeabi_read_tp
__aeabi_read_tp:
 
0:
b 0b
/trunk/uspace/kbd/arch/arm32/include/kbd.h
1,5 → 1,5
/*
* Copyright (c) 2007 Michal Kebrt
* Copyright (c) 2006 Josef Cejka
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
26,11 → 26,12
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup kbdarm32
/** @addtogroup kbdarm32 arm32
* @brief HelenOS arm32 arch dependent parts of uspace keyboard handler.
* @ingroup kbd
* @{
*/
/** @file
* @brief Empty.
*/
 
#ifndef KBD_arm32_KBD_H_
/trunk/uspace/kbd/arch/arm32/src/kbd_gxemul.c
File deleted
/trunk/uspace/kbd/arch/arm32/src/kbd.c
1,5 → 1,5
/*
* Copyright (c) 2007 Michal Kebrt
* Copyright (c) 2006 Martin Decky
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
32,9 → 32,24
* @{
*/
/** @file
* @brief Empty, required by generic Makefile.
*/
 
#include <arch/kbd.h>
#include <ipc/ipc.h>
#include <sysinfo.h>
#include <kbd.h>
#include <keys.h>
 
int kbd_arch_init(void)
{
return 0;
}
 
 
int kbd_arch_process(keybuffer_t *keybuffer, ipc_call_t *call)
{
return 1;
}
 
/** @}
*/
/trunk/uspace/kbd/Makefile
32,7 → 32,6
LIBC_PREFIX = ../libc
SOFTINT_PREFIX = ../softint
include $(LIBC_PREFIX)/Makefile.toolchain
include ../../Makefile.config
 
CFLAGS += -Iinclude -I../libadt/include
 
71,12 → 70,6
GENARCH_SOURCES = \
genarch/src/kbd.c
endif
ifeq ($(ARCH), arm32)
ifeq ($(MACHINE), gxemul_testarm)
ARCH_SOURCES += \
arch/$(ARCH)/src/kbd_gxemul.c
endif
endif
 
 
GENERIC_OBJECTS := $(addsuffix .o,$(basename $(GENERIC_SOURCES)))
/trunk/uspace/softfloat/arch/arm32/include/functions.h
28,11 → 28,10
 
/** @addtogroup softfloatarm32 arm32
* @ingroup sfl
* @brief Softfloat architecture dependent definitions.
* @brief softfloat architecture dependent definitions
* @{
*/
/** @file
* @brief Softfloat architecture dependent definitions.
/** @file
*/
 
#ifndef __SOFTFLOAT_FUNCTIONS_H__
/trunk/HelenOS.config
20,10 → 20,6
@ "indy" Sgi Indy
! [PLATFORM=mips32] MACHINE (choice)
 
# Machine
@ "gxemul_testarm" GXEmul testarm
! [PLATFORM=arm32] MACHINE (choice)
 
# Compiler
@ "gcc_cross" GCC Cross-compiler
@ "gcc_native" GCC Native
/trunk/boot/doc/doxygroups.h
File deleted
/trunk/boot/boot.config
49,4 → 49,3
@ "binary" Binary image (MSIM)
@ "ecoff" Ecoff image (GXEmul)
! [ARCH=mips32] IMAGE (choice)
 
/trunk/boot/arch/arm32/loader/boot.S
File deleted
/trunk/boot/arch/arm32/loader/main.c
File deleted
/trunk/boot/arch/arm32/loader/asm.h
File deleted
/trunk/boot/arch/arm32/loader/mm.c
File deleted
/trunk/boot/arch/arm32/loader/types.h
File deleted
/trunk/boot/arch/arm32/loader/main.h
File deleted
/trunk/boot/arch/arm32/loader/print/gxemul.c
File deleted
/trunk/boot/arch/arm32/loader/Makefile
File deleted
/trunk/boot/arch/arm32/loader/pack
File deleted
Property changes:
Deleted: svn:executable
-*
\ No newline at end of property
/trunk/boot/arch/arm32/loader/mm.h
File deleted
/trunk/boot/arch/arm32/loader/asm.S
File deleted
/trunk/boot/arch/arm32/Makefile.inc
1,5 → 1,5
#
# Copyright (c) 2006 Martin Decky
# Copyright (c) 2007 Jakub Jermar
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
26,17 → 26,6
# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#
 
build: $(BASE)/image.boot
 
$(BASE)/image.boot: depend arch/$(ARCH)/loader/image.boot
cp arch/$(ARCH)/loader/image.boot $(BASE)/image.boot
 
depend:
-rm arch/$(ARCH)/loader/image.boot
 
arch/$(ARCH)/loader/image.boot:
make -C arch/$(ARCH)/loader COMPILER=$(COMPILER) KERNELDIR=../../../$(KERNELDIR) USPACEDIR=../../../$(USPACEDIR) IMAGE=$(IMAGE)
 
clean:
make -C arch/$(ARCH)/loader clean COMPILER=$(COMPILER) KERNELDIR=../../../$(KERNELDIR) USPACEDIR=../../../$(USPACEDIR) IMAGE=$(IMAGE)
-rm -f $(BASE)/image.boot
#
# So far, this is just a placeholder.
#
/trunk/boot/genarch/include/softint
File deleted
\ No newline at end of file
Property changes:
Deleted: svn:special
-*
\ No newline at end of property
/trunk/boot/genarch/division.c
File deleted
\ No newline at end of file
Property changes:
Deleted: svn:special
-*
\ No newline at end of property
/trunk/boot/generic/genarch
File deleted
\ No newline at end of file
Property changes:
Deleted: svn:special
-*
\ No newline at end of property
/trunk/boot/generic/align.h
26,12 → 26,6
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup generic
* @{
*/
/** @file
*/
 
#ifndef BOOT_ALIGN_H_
#define BOOT_ALIGN_H_
 
43,6 → 37,3
#define ALIGN_UP(addr, align) (((addr) + ((align) - 1)) & ~((align) - 1))
 
#endif
 
/** @}
*/
/trunk/boot/generic/printf.c
26,12 → 26,6
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup generic
* @{
*/
/** @file
*/
 
#include "printf.h"
#include "stdarg.h"
#include <types.h>
247,6 → 241,3
va_end(ap);
}
 
/** @}
*/
/trunk/boot/generic/gentypes.h
26,12 → 26,6
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup generic
* @{
*/
/** @file
*/
 
#ifndef BOOT_GENTYPES_H_
#define BOOT_GENTYPES_H_
 
42,6 → 36,3
typedef unsigned long size_t;
 
#endif
 
/** @}
*/
/trunk/boot/generic/printf.h
26,12 → 26,6
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup generic
* @{
*/
/** @file
*/
 
#ifndef BOOT_PRINTF_H_
#define BOOT_PRINTF_H_
 
46,6 → 40,3
extern void write(const char *str, const int len);
 
#endif
 
/** @}
*/
/trunk/boot/generic/stdarg.h
26,12 → 26,6
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup generic
* @{
*/
/** @file
*/
 
#ifndef STDARG_H__
#define STDARG_H__
 
42,6 → 36,3
#define va_end(ap) __builtin_va_end(ap)
 
#endif
 
/** @}
*/
/trunk/tools/cygwin_symlink_patch.sh
File deleted