| /trunk/kernel/test/test.c |
|---|
| 35,49 → 35,15 |
| #include <test.h> |
| test_t tests[] = { |
| #include <atomic/atomic1.def> |
| #include <btree/btree1.def> |
| #include <debug/mips1.def> |
| #include <fault/fault1.def> |
| #include <fpu/fpu1.def> |
| #include <fpu/sse1.def> |
| #include <fpu/mips2.def> |
| /* |
| { |
| "atomic1", |
| "Test atomic operations", |
| &test_atomic1, |
| true |
| }, |
| { |
| "btree1", |
| "Test B-tree operations", |
| &test_btree1, |
| true |
| }, |
| { |
| "mips1", |
| "MIPS debug test", |
| &test_mips1, |
| true |
| }, |
| { |
| "fault1", |
| "Write to NULL (maybe page fault)", |
| &test_fault1, |
| false |
| }, |
| { |
| "fpu1", |
| "Intel FPU test", |
| &test_fpu1, |
| true |
| }, |
| { |
| "sse1", |
| "Intel SEE test", |
| &test_sse1, |
| true |
| }, |
| { |
| "mips2", |
| "MIPS FPU test", |
| &test_mips2, |
| true |
| }, |
| { |
| "falloc1", |
| "Frame allocator test 1", |
| &test_falloc1, |
| 172,7 → 138,7 |
| "Sysinfo test", |
| &test_sysinfo1, |
| true |
| }, |
| },*/ |
| {NULL, NULL, NULL} |
| }; |
| /trunk/kernel/test/btree/btree1.def |
|---|
| 0,0 → 1,6 |
| { |
| "btree1", |
| "Test B-tree operations", |
| &test_btree1, |
| true |
| }, |
| /trunk/kernel/test/btree/btree1.c |
|---|
| 31,17 → 31,10 |
| #include <adt/btree.h> |
| #include <debug.h> |
| #ifdef CONFIG_BENCH |
| #include <arch/cycle.h> |
| #endif |
| static void *data = (void *) 0xdeadbeef; |
| void test_btree1(void) |
| char * test_btree1(void) |
| { |
| #ifdef CONFIG_BENCH |
| uint64_t t0 = get_cycle(); |
| #endif |
| btree_t t; |
| int i; |
| 163,8 → 156,6 |
| btree_remove(&t, 36, NULL); |
| btree_print(&t); |
| #ifdef CONFIG_BENCH |
| uint64_t dt = get_cycle() - t0; |
| printf("Time: %.*d cycles\n", sizeof(dt) * 2, dt); |
| #endif |
| return NULL; |
| } |
| /trunk/kernel/test/synch/rwlock5.def |
|---|
| --- test.h (revision 2026) |
| +++ test.h (revision 2027) |
| @@ -38,20 +38,22 @@ |
| #include <arch/types.h> |
| #include <typedefs.h> |
| +typedef char * (* test_entry_t)(); |
| + |
| typedef struct { |
| char * name; |
| char * desc; |
| - function entry; |
| + test_entry_t entry; |
| bool safe; |
| } test_t; |
| -extern void test_atomic1(void); |
| -extern void test_btree1(void); |
| -extern void test_mips1(void); |
| -extern void test_fault1(void); |
| -extern void test_fpu1(void); |
| -extern void test_sse1(void); |
| -extern void test_mips2(void); |
| +extern char * test_atomic1(void); |
| +extern char * test_btree1(void); |
| +extern char * test_mips1(void); |
| +extern char * test_fault1(void); |
| +extern char * test_fpu1(void); |
| +extern char * test_sse1(void); |
| +extern char * test_mips2(void); |
| extern void test_falloc1(void); |
| extern void test_falloc2(void); |
| extern void test_mapping1(void); |
| /trunk/kernel/test/debug/mips1.def |
|---|
| 0,0 → 1,8 |
| #ifdef mips32 |
| { |
| "mips1", |
| "MIPS debug test", |
| &test_mips1, |
| false |
| }, |
| #endif |
| /trunk/kernel/test/debug/mips1.c |
|---|
| 26,6 → 26,8 |
| * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| */ |
| #ifdef mips32 |
| #include <print.h> |
| #include <debug.h> |
| #include <panic.h> |
| 37,18 → 39,15 |
| #include <arch.h> |
| void test_mips1(void) |
| char * test_mips1(void) |
| { |
| #ifdef mips32 |
| printf("MIPS debug test #1\n"); |
| printf("You should enter kconsole debug mode now.\n"); |
| asm __volatile__ ("break"); |
| asm volatile ( |
| "break\n" |
| ); |
| printf("Test passed.\n"); |
| #else |
| printf("This test is availaible only on MIPS32 platform.\n"); |
| return "Back from debug mode"; |
| } |
| #endif |
| } |
| /trunk/kernel/test/mm/falloc1.def |
|---|
| --- fpu/mips2.def (nonexistent) |
| +++ fpu/mips2.def (revision 2027) |
| @@ -0,0 +1,8 @@ |
| +#ifdef mips32 |
| +{ |
| + "mips2", |
| + "MIPS FPU test", |
| + &test_mips2, |
| + true |
| +}, |
| +#endif |
| /trunk/kernel/test/fpu/fpu1.def |
|---|
| 0,0 → 1,8 |
| #if (defined(ia32) || defined(amd64) || defined(ia64) || defined(ia32xen)) |
| { |
| "fpu1", |
| "Intel FPU test", |
| &test_fpu1, |
| true |
| }, |
| #endif |
| /trunk/kernel/test/fpu/sse1.def |
|---|
| 0,0 → 1,8 |
| #if (defined(ia32) || defined(amd64) || defined(ia32xen)) |
| { |
| "sse1", |
| "Intel SEE test", |
| &test_sse1, |
| true |
| }, |
| #endif |
| /trunk/kernel/test/fpu/mips2.c |
|---|
| 26,6 → 26,8 |
| * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| */ |
| #ifdef mips32 |
| #include <print.h> |
| #include <debug.h> |
| #include <panic.h> |
| 37,13 → 39,12 |
| #include <arch.h> |
| #ifdef mips32 |
| #define THREADS 50 |
| #define DELAY 10000L |
| #define ATTEMPTS 5 |
| static atomic_t threads_ok; |
| static atomic_t threads_fault; |
| static waitq_t can_start; |
| static void testit1(void *data) |
| 57,22 → 58,24 |
| waitq_sleep(&can_start); |
| for (i = 0; i<ATTEMPTS; i++) { |
| __asm__ volatile ( |
| asm volatile ( |
| "mtc1 %0,$1" |
| :"=r"(arg) |
| ); |
| delay(DELAY); |
| __asm__ volatile ( |
| asm volatile ( |
| "mfc1 %0, $1" |
| :"=r"(after_arg) |
| ); |
| if(arg != after_arg) |
| panic("General reg tid%d: arg(%d) != %d\n", |
| THREAD->tid, arg, after_arg); |
| if (arg != after_arg) { |
| printf("General reg tid%d: arg(%d) != %d\n", THREAD->tid, arg, after_arg); |
| atomic_inc(&threads_fault); |
| break; |
| } |
| } |
| atomic_inc(&threads_ok); |
| } |
| 87,61 → 90,67 |
| waitq_sleep(&can_start); |
| for (i = 0; i<ATTEMPTS; i++) { |
| __asm__ volatile ( |
| asm volatile ( |
| "mtc1 %0,$1" |
| :"=r"(arg) |
| ); |
| scheduler(); |
| __asm__ volatile ( |
| asm volatile ( |
| "mfc1 %0,$1" |
| :"=r"(after_arg) |
| ); |
| if(arg != after_arg) |
| panic("General reg tid%d: arg(%d) != %d\n", |
| THREAD->tid, arg, after_arg); |
| if (arg != after_arg) { |
| panic("General reg tid%d: arg(%d) != %d\n", THREAD->tid, arg, after_arg); |
| atomic_inc(&threads_fault); |
| break; |
| } |
| } |
| atomic_inc(&threads_ok); |
| } |
| void test_mips2(void) |
| char * test_mips2(void) |
| { |
| thread_t *t; |
| int i; |
| unsigned int i, total = 0; |
| waitq_initialize(&can_start); |
| atomic_set(&threads_ok, 0); |
| atomic_set(&threads_fault, 0); |
| printf("Creating %d threads... ", 2 * THREADS); |
| printf("MIPS test #1\n"); |
| printf("Creating %d threads... ", THREADS); |
| for (i = 0; i < THREADS; i++) { |
| thread_t *t; |
| for (i=0; i<THREADS/2; i++) { |
| if (!(t = thread_create(testit1, (void *)((unative_t)i*2), TASK, 0, "testit1"))) |
| panic("could not create thread\n"); |
| if (!(t = thread_create(testit1, (void *) ((unative_t) 2 * i), TASK, 0, "testit1"))) { |
| printf("could not create thread %d\n", 2 * i); |
| break; |
| } |
| thread_ready(t); |
| if (!(t = thread_create(testit2, (void *)((unative_t)i*2+1), TASK, 0, "testit2"))) |
| panic("could not create thread\n"); |
| total++; |
| if (!(t = thread_create(testit2, (void *) ((unative_t) 2 * i + 1), TASK, 0, "testit2"))) { |
| printf("could not create thread %d\n", 2 * i + 1); |
| break; |
| } |
| thread_ready(t); |
| total++; |
| } |
| printf("ok\n"); |
| thread_sleep(1); |
| waitq_wakeup(&can_start, WAKEUP_ALL); |
| while (atomic_get(&threads_ok) != THREADS) |
| ; |
| printf("Test passed.\n"); |
| while (atomic_get(&threads_ok) != total) { |
| printf("Threads left: %d\n", total - atomic_get(&threads_ok)); |
| thread_sleep(1); |
| } |
| #else |
| if (atomic_get(&threads_fault) == 0) |
| return NULL; |
| void test_mips2(void) |
| { |
| printf("This test is availaible only on MIPS32 platform.\n"); |
| return "Test failed"; |
| } |
| #endif |
| /trunk/kernel/test/fpu/fpu1.c |
|---|
| 27,6 → 27,8 |
| * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| */ |
| #if (defined(ia32) || defined(amd64) || defined(ia64) || defined(ia32xen)) |
| #include <print.h> |
| #include <debug.h> |
| #include <panic.h> |
| 38,13 → 40,8 |
| #include <arch.h> |
| #include <arch/arch.h> |
| #ifdef CONFIG_BENCH |
| #include <arch/cycle.h> |
| #endif |
| #if (defined(ia32) || defined(amd64) || defined(ia64) || defined(ia32xen)) |
| #define THREADS 150*2 |
| #define THREADS 150 |
| #define ATTEMPTS 100 |
| #define E_10e8 271828182 |
| 52,33 → 49,60 |
| #ifdef KERN_ia32_ARCH_H_ |
| static inline double sqrt(double x) { double v; __asm__ ("fsqrt\n" : "=t" (v) : "0" (x)); return v; } |
| static inline double sqrt(double x) |
| { |
| double v; |
| asm ( |
| "fsqrt\n" |
| : "=t" (v) |
| : "0" (x) |
| ); |
| return v; |
| } |
| #endif |
| #ifdef KERN_amd64_ARCH_H_ |
| static inline double sqrt(double x) { double v; __asm__ ("fsqrt\n" : "=t" (v) : "0" (x)); return v; } |
| static inline double sqrt(double x) |
| { |
| double v; |
| asm ( |
| "fsqrt\n" |
| : "=t" (v) |
| : "0" (x) |
| ); |
| return v; |
| } |
| #endif |
| #ifdef KERN_ia64_ARCH_H_ |
| #undef PI_10e8 |
| #define PI_10e8 3141592 |
| static inline long double sqrt(long double a) |
| { |
| long double x = 1; |
| long double lx = 0; |
| if(a<0.00000000000000001) return 0; |
| if (a < 0.00000000000000001) |
| return 0; |
| while(x!=lx) |
| { |
| while(x != lx) { |
| lx=x; |
| x=(x+(a/x))/2; |
| } |
| return x; |
| } |
| #endif |
| static atomic_t threads_ok; |
| static atomic_t threads_fault; |
| static waitq_t can_start; |
| static void e(void *data) |
| 100,23 → 124,17 |
| e=e+1/d; |
| } |
| if((int)(100000000*e)!=E_10e8) |
| panic("tid%d: e*10e8=%zd should be %zd\n", THREAD->tid, (unative_t) (100000000*e),(unative_t) E_10e8); |
| if ((int) (100000000 * e) != E_10e8) { |
| printf("tid%d: e*10e8=%zd should be %zd\n", THREAD->tid, (unative_t) (100000000 * e), (unative_t) E_10e8); |
| atomic_inc(&threads_fault); |
| break; |
| } |
| printf("tid%d: e*10e8=%zd should be %zd\n", THREAD->tid, (unative_t) (100000000*e),(unative_t) E_10e8); |
| } |
| atomic_inc(&threads_ok); |
| } |
| static void pi(void *data) |
| { |
| #ifdef KERN_ia64_ARCH_H_ |
| #undef PI_10e8 |
| #define PI_10e8 3141592 |
| #endif |
| int i; |
| double lpi, pi; |
| double n, ab, ad; |
| 125,7 → 143,6 |
| waitq_sleep(&can_start); |
| for (i = 0; i<ATTEMPTS; i++) { |
| lpi = -1; |
| pi = 0; |
| 141,39 → 158,47 |
| } |
| #ifdef KERN_ia64_ARCH_H_ |
| if((int)(1000000*pi)!=PI_10e8) |
| panic("tid%d: pi*10e8=%zd should be %zd\n", THREAD->tid, (unative_t) (1000000*pi),(unative_t) (PI_10e8/100)); |
| if ((int) (1000000 * pi) != PI_10e8) { |
| printf("tid%d: pi*10e8=%zd should be %zd\n", THREAD->tid, (unative_t) (1000000 * pi), (unative_t) (PI_10e8 / 100)); |
| atomic_inc(&threads_fault); |
| break; |
| } |
| #else |
| if((int)(100000000*pi)!=PI_10e8) |
| panic("tid%d: pi*10e8=%zd should be %zd\n", THREAD->tid, (unative_t) (100000000*pi),(unative_t) PI_10e8); |
| if ((int) (100000000 * pi) != PI_10e8) { |
| printf("tid%d: pi*10e8=%zd should be %zd\n", THREAD->tid, (unative_t) (100000000 * pi), (unative_t) PI_10e8); |
| atomic_inc(&threads_fault); |
| break; |
| } |
| #endif |
| } |
| printf("tid%d: pi*10e8=%zd should be %zd\n", THREAD->tid, (unative_t) (100000000*pi),(unative_t) PI_10e8); |
| atomic_inc(&threads_ok); |
| } |
| void test_fpu1(void) |
| char * test_fpu1(void) |
| { |
| #ifdef CONFIG_BENCH |
| uint64_t t0 = get_cycle(); |
| #endif |
| thread_t *t; |
| int i; |
| unsigned int i, total = 0; |
| waitq_initialize(&can_start); |
| atomic_set(&threads_ok, 0); |
| atomic_set(&threads_fault, 0); |
| printf("Creating %d threads... ", 2 * THREADS); |
| printf("FPU test #1\n"); |
| printf("Creating %d threads... ", THREADS); |
| for (i = 0; i < THREADS; i++) { |
| thread_t *t; |
| for (i=0; i<THREADS/2; i++) { |
| if (!(t = thread_create(e, NULL, TASK, 0, "e"))) |
| panic("could not create thread\n"); |
| if (!(t = thread_create(e, NULL, TASK, 0, "e"))) { |
| printf("could not create thread %d\n", 2 * i); |
| break; |
| } |
| thread_ready(t); |
| if (!(t = thread_create(pi, NULL, TASK, 0, "pi"))) |
| panic("could not create thread\n"); |
| total++; |
| if (!(t = thread_create(pi, NULL, TASK, 0, "pi"))) { |
| printf("could not create thread %d\n", 2 * i + 1); |
| break; |
| } |
| thread_ready(t); |
| total++; |
| } |
| printf("ok\n"); |
| 180,21 → 205,15 |
| thread_sleep(1); |
| waitq_wakeup(&can_start, WAKEUP_ALL); |
| while (atomic_get(&threads_ok) != THREADS) |
| ; |
| printf("Test passed.\n"); |
| #ifdef CONFIG_BENCH |
| uint64_t dt = get_cycle() - t0; |
| printf("Time: %.*d cycles\n", sizeof(dt) * 2, dt); |
| #endif |
| while (atomic_get(&threads_ok) != total) { |
| printf("Threads left: %d\n", total - atomic_get(&threads_ok)); |
| thread_sleep(1); |
| } |
| #else |
| if (atomic_get(&threads_fault) == 0) |
| return NULL; |
| void test_fpu1(void) |
| { |
| printf("This test is available only on Intel/AMD platforms."); |
| return "Test failed"; |
| } |
| #endif |
| /trunk/kernel/test/fpu/sse1.c |
|---|
| 26,6 → 26,8 |
| * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| */ |
| #if (defined(ia32) || defined(amd64) || defined(ia32xen)) |
| #include <print.h> |
| #include <debug.h> |
| #include <panic.h> |
| 37,17 → 39,12 |
| #include <arch.h> |
| #ifdef CONFIG_BENCH |
| #include <arch/cycle.h> |
| #endif |
| #if (defined(ia32) || defined(amd64) || defined(ia32xen)) |
| #define THREADS 50 |
| #define THREADS 25 |
| #define DELAY 10000L |
| #define ATTEMPTS 5 |
| static atomic_t threads_ok; |
| static atomic_t threads_fault; |
| static waitq_t can_start; |
| static void testit1(void *data) |
| 61,22 → 58,23 |
| waitq_sleep(&can_start); |
| for (i = 0; i<ATTEMPTS; i++) { |
| __asm__ volatile ( |
| "movlpd %0, %%xmm2" |
| asm volatile ( |
| "movlpd %0, %%xmm2\n" |
| :"=m"(arg) |
| ); |
| delay(DELAY); |
| __asm__ volatile ( |
| "movlpd %%xmm2, %0" |
| asm volatile ( |
| "movlpd %%xmm2, %0\n" |
| :"=m"(after_arg) |
| ); |
| if(arg != after_arg) |
| panic("tid%d: arg(%d) != %d\n", |
| THREAD->tid, arg, after_arg); |
| if (arg != after_arg) { |
| printf("tid%d: arg(%d) != %d\n", THREAD->tid, arg, after_arg); |
| atomic_inc(&threads_fault); |
| break; |
| } |
| } |
| atomic_inc(&threads_ok); |
| } |
| 91,68 → 89,67 |
| waitq_sleep(&can_start); |
| for (i = 0; i<ATTEMPTS; i++) { |
| __asm__ volatile ( |
| "movlpd %0, %%xmm2" |
| asm volatile ( |
| "movlpd %0, %%xmm2\n" |
| :"=m"(arg) |
| ); |
| scheduler(); |
| __asm__ volatile ( |
| "movlpd %%xmm2, %0" |
| asm volatile ( |
| "movlpd %%xmm2, %0\n" |
| :"=m"(after_arg) |
| ); |
| if(arg != after_arg) |
| panic("tid%d: arg(%d) != %d\n", |
| THREAD->tid, arg, after_arg); |
| if (arg != after_arg) { |
| printf("tid%d: arg(%d) != %d\n", THREAD->tid, arg, after_arg); |
| atomic_inc(&threads_fault); |
| break; |
| } |
| } |
| atomic_inc(&threads_ok); |
| } |
| void test_sse1(void) |
| char * test_sse1(void) |
| { |
| #ifdef CONFIG_BENCH |
| uint64_t t0 = get_cycle(); |
| #endif |
| thread_t *t; |
| int i; |
| unsigned int i, total = 0; |
| waitq_initialize(&can_start); |
| atomic_set(&threads_ok, 0); |
| atomic_set(&threads_fault, 0); |
| printf("Creating %d threads... ", 2 * THREADS); |
| printf("SSE test #1\n"); |
| printf("Creating %d threads... ", THREADS); |
| for (i = 0; i < THREADS; i++) { |
| thread_t *t; |
| for (i=0; i<THREADS/2; i++) { |
| if (!(t = thread_create(testit1, (void *)((unative_t)i*2), TASK, 0, "testit1"))) |
| panic("could not create thread\n"); |
| if (!(t = thread_create(testit1, (void *) ((unative_t) 2 * i), TASK, 0, "testit1"))) { |
| printf("could not create thread %d\n", 2 * i); |
| break; |
| } |
| thread_ready(t); |
| if (!(t = thread_create(testit2, (void *)((unative_t)i*2+1), TASK, 0, "testit2"))) |
| panic("could not create thread\n"); |
| total++; |
| if (!(t = thread_create(testit2, (void *) ((unative_t) 2 * i + 1), TASK, 0, "testit2"))) { |
| printf("could not create thread %d\n", 2 * i + 1); |
| break; |
| } |
| thread_ready(t); |
| total++; |
| } |
| printf("ok\n"); |
| thread_sleep(1); |
| waitq_wakeup(&can_start, WAKEUP_ALL); |
| while (atomic_get(&threads_ok) != THREADS) |
| ; |
| printf("Test passed.\n"); |
| #ifdef CONFIG_BENCH |
| uint64_t dt = get_cycle() - t0; |
| printf("Time: %.*d cycles\n", sizeof(dt) * 2, dt); |
| #endif |
| while (atomic_get(&threads_ok) != total) { |
| printf("Threads left: %d\n", total - atomic_get(&threads_ok)); |
| thread_sleep(1); |
| } |
| #else |
| if (atomic_get(&threads_fault) == 0) |
| return NULL; |
| void test_sse1(void) |
| { |
| printf("This test is available only on SSE enabled platforms."); |
| return "Test failed"; |
| } |
| #endif |
| /trunk/kernel/test/sysinfo/sysinfo1.def |
|---|
| --- fault/fault1.def (nonexistent) |
| +++ fault/fault1.def (revision 2027) |
| @@ -0,0 +1,6 @@ |
| +{ |
| + "fault1", |
| + "Write to NULL (maybe page fault)", |
| + &test_fault1, |
| + false |
| +}, |
| /trunk/kernel/test/fault/fault1.c |
|---|
| 38,9 → 38,9 |
| #include <arch.h> |
| void test_fault1(void) |
| char * test_fault1(void) |
| { |
| ((int *)(0))[1]=0; |
| return "Written to NULL"; |
| } |
| /trunk/kernel/test/atomic/atomic1.def |
|---|
| 0,0 → 1,6 |
| { |
| "atomic1", |
| "Test atomic operations", |
| &test_atomic1, |
| true |
| }, |
| /trunk/kernel/test/atomic/atomic1.c |
|---|
| 31,36 → 31,33 |
| #include <atomic.h> |
| #include <debug.h> |
| #ifdef CONFIG_BENCH |
| #include <arch/cycle.h> |
| #endif |
| void test_atomic1(void) |
| char * test_atomic1(void) |
| { |
| #ifdef CONFIG_BENCH |
| uint64_t t0 = get_cycle(); |
| #endif |
| atomic_t a; |
| atomic_set(&a, 10); |
| printf("Testing atomic_set() and atomic_get().\n"); |
| ASSERT(atomic_get(&a) == 10); |
| printf("Testing atomic_postinc()\n"); |
| ASSERT(atomic_postinc(&a) == 10); |
| ASSERT(atomic_get(&a) == 11); |
| printf("Testing atomic_postdec()\n"); |
| ASSERT(atomic_postdec(&a) == 11); |
| ASSERT(atomic_get(&a) == 10); |
| printf("Testing atomic_preinc()\n"); |
| ASSERT(atomic_preinc(&a) == 11); |
| ASSERT(atomic_get(&a) == 11); |
| printf("Testing atomic_predec()\n"); |
| ASSERT(atomic_postdec(&a) == 11); |
| ASSERT(atomic_get(&a) == 10); |
| if (atomic_get(&a) != 10) |
| return "Failed atomic_set()/atomic_get()"; |
| printf("Test passed.\n"); |
| #ifdef CONFIG_BENCH |
| uint64_t dt = get_cycle() - t0; |
| printf("Time: %.*d cycles\n", sizeof(dt) * 2, dt); |
| #endif |
| if (atomic_postinc(&a) != 10) |
| return "Failed atomic_postinc()"; |
| if (atomic_get(&a) != 11) |
| return "Failed atomic_get() after atomic_postinc()"; |
| if (atomic_postdec(&a) != 11) |
| return "Failed atomic_postdec()"; |
| if (atomic_get(&a) != 10) |
| return "Failed atomic_get() after atomic_postdec()"; |
| if (atomic_preinc(&a) != 11) |
| return "Failed atomic_preinc()"; |
| if (atomic_get(&a) != 11) |
| return "Failed atomic_get() after atomic_preinc()"; |
| if (atomic_predec(&a) != 10) |
| return "Failed atomic_predec()"; |
| if (atomic_get(&a) != 10) |
| return "Failed atomic_get() after atomic_predec()"; |
| return NULL; |
| } |
| /trunk/kernel/test/print/print1.def |
|---|