| /trunk/kernel/arch/amd64/src/boot/boot.S |
|---|
| 54,7 → 54,6 |
| .long multiboot_image_start |
| multiboot_image_start: |
| cld |
| movl $START_STACK, %esp # initialize stack pointer |
| lgdtl bootstrap_gdtr # initialize Global Descriptor Table register |
| 127,6 → 126,7 |
| mov $vesa_init, %esi |
| mov $VESA_INIT_SEGMENT << 4, %edi |
| mov $e_vesa_init - vesa_init, %ecx |
| cld |
| rep movsb |
| mov $VESA_INIT_SEGMENT << 4, %edi |
| 282,6 → 282,7 |
| movq $BOOT_OFFSET, %rsi |
| movq $AP_BOOT_OFFSET, %rdi |
| movq $_hardcoded_unmapped_size, %rcx |
| cld |
| rep movsb |
| #endif |
| 555,6 → 556,7 |
| addl %eax, %edi |
| movw $0x0c00, %ax # black background, light red foreground |
| cld |
| ploop: |
| lodsb |
| /trunk/kernel/arch/amd64/src/syscall.c |
|---|
| 62,11 → 62,9 |
| write_msr(AMD_MSR_LSTAR, (uint64_t)syscall_entry); |
| /* Mask RFLAGS on syscall |
| * - disable interrupts, until we exchange the stack register |
| * (mask the IF bit) |
| * - clear DF so that the string instructions operate in |
| * the right direction |
| * (mask the IE bit) |
| */ |
| write_msr(AMD_MSR_SFMASK, RFLAGS_IF | RFLAGS_DF); |
| write_msr(AMD_MSR_SFMASK, 0x200); |
| } |
| /** @} |
| /trunk/kernel/arch/amd64/src/asm_utils.S |
|---|
| 248,7 → 248,6 |
| .endif |
| save_all_gpr |
| cld |
| movq $(\i), %rdi # %rdi - first parameter |
| movq %rsp, %rsi # %rsi - pointer to istate |
| /trunk/kernel/arch/amd64/include/cpu.h |
|---|
| 35,9 → 35,8 |
| #ifndef KERN_amd64_CPU_H_ |
| #define KERN_amd64_CPU_H_ |
| #define RFLAGS_IF (1 << 9) |
| #define RFLAGS_DF (1 << 10) |
| #define RFLAGS_RF (1 << 16) |
| #define RFLAGS_IF (1 << 9) |
| #define RFLAGS_RF (1 << 16) |
| #define EFER_MSR_NUM 0xc0000080 |
| #define AMD_SCE_FLAG 0 |