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Regard whitespace Rev 3773 → Rev 3774

/trunk/kernel/arch/ia64/include/interrupt.h
153,7 → 153,6
extern void external_interrupt(uint64_t vector, istate_t *istate);
extern void disabled_fp_register(uint64_t vector, istate_t *istate);
 
 
#endif
 
/** @}
/trunk/kernel/arch/ia64/include/atomic.h
46,7 → 46,8
{
long v;
 
asm volatile ("fetchadd8.rel %0 = %1, %2\n" : "=r" (v), "+m" (val->count) : "i" (imm));
asm volatile ("fetchadd8.rel %0 = %1, %2\n" : "=r" (v),
"+m" (val->count) : "i" (imm));
return v;
}
65,15 → 66,36
}
 
 
static inline void atomic_inc(atomic_t *val) { atomic_add(val, 1); }
static inline void atomic_dec(atomic_t *val) { atomic_add(val, -1); }
static inline void atomic_inc(atomic_t *val)
{
atomic_add(val, 1);
}
 
static inline long atomic_preinc(atomic_t *val) { return atomic_add(val, 1) + 1; }
static inline long atomic_predec(atomic_t *val) { return atomic_add(val, -1) - 1; }
static inline void atomic_dec(atomic_t *val)
{
atomic_add(val, -1);
}
 
static inline long atomic_postinc(atomic_t *val) { return atomic_add(val, 1); }
static inline long atomic_postdec(atomic_t *val) { return atomic_add(val, -1); }
static inline long atomic_preinc(atomic_t *val)
{
return atomic_add(val, 1) + 1;
}
 
static inline long atomic_predec(atomic_t *val)
{
return atomic_add(val, -1) - 1;
}
 
static inline long atomic_postinc(atomic_t *val)
{
return atomic_add(val, 1);
}
 
static inline long atomic_postdec(atomic_t *val)
{
return atomic_add(val, -1);
}
 
#endif
 
/** @}
/trunk/kernel/arch/ia64/include/bootinfo.h
68,7 → 68,6
unsigned long freq_scale;
unsigned int wakeup_intno;
int hello_configured;
 
} bootinfo_t;
 
extern bootinfo_t *bootinfo;
/trunk/kernel/arch/ia64/include/asm.h
45,7 → 45,8
 
static inline void outb(ioport_t port,uint8_t v)
{
*((uint8_t *)(IA64_IOSPACE_ADDRESS + ( (port & 0xfff) | ( (port >> 2) << 12 )))) = v;
*((uint8_t *)(IA64_IOSPACE_ADDRESS +
((port & 0xfff) | ((port >> 2) << 12)))) = v;
 
asm volatile ("mf\n" ::: "memory");
}
52,7 → 53,8
 
static inline void outw(ioport_t port,uint16_t v)
{
*((uint16_t *)(IA64_IOSPACE_ADDRESS + ( (port & 0xfff) | ( (port >> 2) << 12 )))) = v;
*((uint16_t *)(IA64_IOSPACE_ADDRESS +
((port & 0xfff) | ((port >> 2) << 12)))) = v;
 
asm volatile ("mf\n" ::: "memory");
}
59,18 → 61,18
 
static inline void outl(ioport_t port,uint32_t v)
{
*((uint32_t *)(IA64_IOSPACE_ADDRESS + ( (port & 0xfff) | ( (port >> 2) << 12 )))) = v;
*((uint32_t *)(IA64_IOSPACE_ADDRESS +
((port & 0xfff) | ((port >> 2) << 12)))) = v;
 
asm volatile ("mf\n" ::: "memory");
}
 
 
 
static inline uint8_t inb(ioport_t port)
{
asm volatile ("mf\n" ::: "memory");
 
return *((uint8_t *)(IA64_IOSPACE_ADDRESS + ( (port & 0xfff) | ( (port >> 2) << 12 ))));
return *((uint8_t *)(IA64_IOSPACE_ADDRESS +
((port & 0xfff) | ((port >> 2) << 12))));
}
 
static inline uint16_t inw(ioport_t port)
77,7 → 79,8
{
asm volatile ("mf\n" ::: "memory");
 
return *((uint16_t *)(IA64_IOSPACE_ADDRESS + ( (port & 0xffE) | ( (port >> 2) << 12 ))));
return *((uint16_t *)(IA64_IOSPACE_ADDRESS +
((port & 0xffE) | ((port >> 2) << 12))));
}
 
static inline uint32_t inl(ioport_t port)
84,11 → 87,10
{
asm volatile ("mf\n" ::: "memory");
 
return *((uint32_t *)(IA64_IOSPACE_ADDRESS + ( (port & 0xfff) | ( (port >> 2) << 12 ))));
return *((uint32_t *)(IA64_IOSPACE_ADDRESS +
((port & 0xfff) | ((port >> 2) << 12))));
}
 
 
 
/** Return base address of current stack
*
* Return the base address of the current stack.
342,7 → 344,8
extern void cpu_sleep(void);
extern void asm_delay_loop(uint32_t t);
 
extern void switch_to_userspace(uintptr_t entry, uintptr_t sp, uintptr_t bsp, uintptr_t uspace_uarg, uint64_t ipsr, uint64_t rsc);
extern void switch_to_userspace(uintptr_t, uintptr_t, uintptr_t, uintptr_t,
uint64_t, uint64_t);
 
#endif
 
/trunk/kernel/arch/ia64/include/mm/page.h
51,10 → 51,10
#define USPACE_IO_PAGE_WIDTH 12 /* 4K */
 
 
 
/** Staticly mapped IO spaces - offsets to 0xe...00 of virtual adresses
becauce of "minimal virtual bits implemented is 51"
it is possible to have here values up to 0x0007000000000000
/*
* Statically mapped IO spaces - offsets to 0xe...00 of virtual addresses
* because of "minimal virtual bits implemented is 51" it is possible to
* have values up to 0x0007000000000000
*/
 
/* Firmware area (bellow 4GB in phys mem) */
65,8 → 65,6
#define VIO_OFFSET 0x0002000000000000
 
 
 
 
#define PPN_SHIFT 12
 
#define VRN_SHIFT 61
/trunk/kernel/arch/ia64/include/debug.h
1,5 → 1,5
/*
* Copyright (c) 2005
* Copyright (c) 2005 Ondrej Palkovsky
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
/trunk/kernel/arch/ia64/include/cpu.h
83,7 → 83,6
}
 
 
 
static inline void ipi_send_ipi(int id,int eid,int intno)
{
(bootinfo->sapic)[2*(id*256+eid)]=intno;
91,8 → 90,6
 
}
 
 
 
#endif
 
/** @}