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Ignore whitespace Rev 3582 → Rev 3581

/branches/sparc/kernel/arch/sparc64/include/cpu_family.h
File deleted
\ No newline at end of file
/branches/sparc/kernel/arch/sparc64/include/regdef.h
60,11 → 60,7
* FIREPLANE_CONFIG register on US3.
*/
#define ICBUS_CONFIG_MID_SHIFT 17
#if defined (US)
#define ICBUS_CONFIG_MID_MASK 0x1f
#elif defined (US3)
#define ICBUS_CONFIG_MID_MASK 0x3ff
#endif
 
#endif
 
/branches/sparc/kernel/arch/sparc64/include/register.h
126,16 → 126,10
union icbus_config {
uint64_t value;
struct {
#if defined (US)
uint64_t : 34;
unsigned pcon : 8; /**< Processor configuration. */
unsigned mid : 5; /**< Module (processor) ID register. */
unsigned pcap : 17; /**< Processor capabilities. */
#elif defined (US3)
uint64_t : 37;
unsigned mid : 10; /**< Module (processor) ID register. */
uint64_t : 17;
#endif
} __attribute__ ((packed));
};
typedef union icbus_config icbus_config_t;
/branches/sparc/kernel/arch/sparc64/include/cpu_node.h
37,11 → 37,19
 
#include <genarch/ofw/ofw_tree.h>
 
/*
* Name of the CPU OFW node property, which holds the MID (processor ID).
* US uses UPA, US3 uses Fireplane, hence the properties names are different.
*/
#if defined (US)
#define PORTID_NAME "upa-portid"
#elif defined (US3)
#define PORTID_NAME "portid"
#endif
 
/** Finds the parent node of all the CPU nodes (nodes named "cpu" or "cmp").
/** Finds the parent node of all the CPU nodes.
*
* Depending on the machine type (and possibly the OFW version), CPUs can be
* at "/" or at "/ssm@0,0".
* Depending on the OFW version, CPUS can be at "/" or at "/ssm@0,0".
*/
static inline ofw_tree_node_t *cpus_parent(void)
{