WebSVN – HelenOS – Path Comparison – / – /branches/sparc/kernel/arch/ Rev 3492 and /branches/sparc/kernel/arch/ Rev 3491

Ignore whitespace Rev 3492 → Rev 3491

 /branches/sparc/kernel/arch/sparc64/include/trap/syscall.h
 ,14 → 31,26
  */
 /**
  * @file
- * @brief
+ * @brief This file contains the trap_instruction handler.
+ *
+ * The trap_instruction trap is used to implement syscalls.
  */
 #ifndef KERN_sparc64_SYSCALL_TRAP_H_
 #define KERN_sparc64_SYSCALL_TRAP_H_
-#define TT_TRAP_INSTRUCTION_0       0x100
+#define TT_TRAP_INSTRUCTION(n)      (0x100 + (n))
+#define TT_TRAP_INSTRUCTION_LAST    TT_TRAP_INSTRUCTION(127)
+#ifdef __ASM__
+.macro TRAP_INSTRUCTION n
+    ba trap_instruction_handler
+    mov TT_TRAP_INSTRUCTION(\n) - TT_TRAP_INSTRUCTION(0), %g2
+.endm
+#endif /* __ASM__ */
 #endif
 /** @}

 /branches/sparc/kernel/arch/sparc64/include/trap/regwin.h
 ,7 → 39,6
 #include <arch/stack.h>
 #include <arch/arch.h>
-#include <align.h>
 #define TT_CLEAN_WINDOW         0x24
 #define TT_SPILL_0_NORMAL       0x80    /* kernel spills */
 ,11 → 72,6
 #define I6_OFFSET   112
 #define I7_OFFSET   120
-/* Uspace Window Buffer constants. */
-#define UWB_SIZE    ((NWINDOWS - 1) * STACK_WINDOW_SAVE_AREA_SIZE)
-#define UWB_ALIGNMENT   1024
-#define UWB_ASIZE   ALIGN_UP(UWB_SIZE, UWB_ALIGNMENT)
 #ifdef __ASM__
 /*

 /branches/sparc/kernel/arch/sparc64/src/trap/trap_table.S
 ,22 → 329,198
 fill_1_normal_tl0:
     FILL_NORMAL_HANDLER_USERSPACE
-/* TT = 0x100 - 0x17f, TL = 0, trap_instruction_0 - trap_instruction_7f */
-.irp cur, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19,\
-, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38,\
-, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57,\
-, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76,\
-, 78, 79, 80, 81, 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, 93, 94, 95,\
-, 97, 98, 99, 100, 101, 102, 103, 104, 105, 106, 107, 108, 109, 110, 111,\
-, 113, 114, 115, 116, 117, 118, 119, 120, 121, 122, 123, 124, 125, 126,\
-.org trap_table + (TT_TRAP_INSTRUCTION_0+\cur)*ENTRY_SIZE
-.global trap_instruction_\cur\()_tl0
-trap_instruction_\cur\()_tl0:
-    ba trap_instruction_handler
-    mov \cur, %g2
-.endr
+/* TT = 0x100, TL = 0, trap_instruction_0 */
+.org trap_table + TT_TRAP_INSTRUCTION(0)*ENTRY_SIZE
+.global trap_instruction_0_tl0
+trap_instruction_0_tl0:
+    TRAP_INSTRUCTION 0
+/* TT = 0x101, TL = 0, trap_instruction_1 */
+.org trap_table + TT_TRAP_INSTRUCTION(1)*ENTRY_SIZE
+.global trap_instruction_1_tl0
+trap_instruction_1_tl0:
+    TRAP_INSTRUCTION 1
+/* TT = 0x102, TL = 0, trap_instruction_2 */
+.org trap_table + TT_TRAP_INSTRUCTION(2)*ENTRY_SIZE
+.global trap_instruction_2_tl0
+trap_instruction_2_tl0:
+    TRAP_INSTRUCTION 2
+/* TT = 0x103, TL = 0, trap_instruction_3 */
+.org trap_table + TT_TRAP_INSTRUCTION(3)*ENTRY_SIZE
+.global trap_instruction_3_tl0
+trap_instruction_3_tl0:
+    TRAP_INSTRUCTION 3
+/* TT = 0x104, TL = 0, trap_instruction_4 */
+.org trap_table + TT_TRAP_INSTRUCTION(4)*ENTRY_SIZE
+.global trap_instruction_4_tl0
+trap_instruction_4_tl0:
+    TRAP_INSTRUCTION 4
+/* TT = 0x105, TL = 0, trap_instruction_5 */
+.org trap_table + TT_TRAP_INSTRUCTION(5)*ENTRY_SIZE
+.global trap_instruction_5_tl0
+trap_instruction_5_tl0:
+    TRAP_INSTRUCTION 5
+/* TT = 0x106, TL = 0, trap_instruction_6 */
+.org trap_table + TT_TRAP_INSTRUCTION(6)*ENTRY_SIZE
+.global trap_instruction_6_tl0
+trap_instruction_6_tl0:
+    TRAP_INSTRUCTION 6
+/* TT = 0x107, TL = 0, trap_instruction_7 */
+.org trap_table + TT_TRAP_INSTRUCTION(7)*ENTRY_SIZE
+.global trap_instruction_7_tl0
+trap_instruction_7_tl0:
+    TRAP_INSTRUCTION 7
+/* TT = 0x108, TL = 0, trap_instruction_8 */
+.org trap_table + TT_TRAP_INSTRUCTION(8)*ENTRY_SIZE
+.global trap_instruction_8_tl0
+trap_instruction_8_tl0:
+    TRAP_INSTRUCTION 8
+/* TT = 0x109, TL = 0, trap_instruction_9 */
+.org trap_table + TT_TRAP_INSTRUCTION(9)*ENTRY_SIZE
+.global trap_instruction_9_tl0
+trap_instruction_9_tl0:
+    TRAP_INSTRUCTION 9
+/* TT = 0x10a, TL = 0, trap_instruction_10 */
+.org trap_table + TT_TRAP_INSTRUCTION(10)*ENTRY_SIZE
+.global trap_instruction_10_tl0
+trap_instruction_10_tl0:
+    TRAP_INSTRUCTION 10
+/* TT = 0x10b, TL = 0, trap_instruction_11 */
+.org trap_table + TT_TRAP_INSTRUCTION(11)*ENTRY_SIZE
+.global trap_instruction_11_tl0
+trap_instruction_11_tl0:
+    TRAP_INSTRUCTION 11
+/* TT = 0x10c, TL = 0, trap_instruction_12 */
+.org trap_table + TT_TRAP_INSTRUCTION(12)*ENTRY_SIZE
+.global trap_instruction_12_tl0
+trap_instruction_12_tl0:
+    TRAP_INSTRUCTION 12
+/* TT = 0x10d, TL = 0, trap_instruction_13 */
+.org trap_table + TT_TRAP_INSTRUCTION(13)*ENTRY_SIZE
+.global trap_instruction_13_tl0
+trap_instruction_13_tl0:
+    TRAP_INSTRUCTION 13
+/* TT = 0x10e, TL = 0, trap_instruction_14 */
+.org trap_table + TT_TRAP_INSTRUCTION(14)*ENTRY_SIZE
+.global trap_instruction_14_tl0
+trap_instruction_14_tl0:
+    TRAP_INSTRUCTION 14
+/* TT = 0x10f, TL = 0, trap_instruction_15 */
+.org trap_table + TT_TRAP_INSTRUCTION(15)*ENTRY_SIZE
+.global trap_instruction_15_tl0
+trap_instruction_15_tl0:
+    TRAP_INSTRUCTION 15
+/* TT = 0x110, TL = 0, trap_instruction_16 */
+.org trap_table + TT_TRAP_INSTRUCTION(16)*ENTRY_SIZE
+.global trap_instruction_16_tl0
+trap_instruction_16_tl0:
+    TRAP_INSTRUCTION 16
+/* TT = 0x111, TL = 0, trap_instruction_17 */
+.org trap_table + TT_TRAP_INSTRUCTION(17)*ENTRY_SIZE
+.global trap_instruction_17_tl0
+trap_instruction_17_tl0:
+    TRAP_INSTRUCTION 17
+/* TT = 0x112, TL = 0, trap_instruction_18 */
+.org trap_table + TT_TRAP_INSTRUCTION(18)*ENTRY_SIZE
+.global trap_instruction_18_tl0
+trap_instruction_18_tl0:
+    TRAP_INSTRUCTION 18
+/* TT = 0x113, TL = 0, trap_instruction_19 */
+.org trap_table + TT_TRAP_INSTRUCTION(19)*ENTRY_SIZE
+.global trap_instruction_19_tl0
+trap_instruction_19_tl0:
+    TRAP_INSTRUCTION 19
+/* TT = 0x114, TL = 0, trap_instruction_20 */
+.org trap_table + TT_TRAP_INSTRUCTION(20)*ENTRY_SIZE
+.global trap_instruction_20_tl0
+trap_instruction_20_tl0:
+    TRAP_INSTRUCTION 20
+/* TT = 0x115, TL = 0, trap_instruction_21 */
+.org trap_table + TT_TRAP_INSTRUCTION(21)*ENTRY_SIZE
+.global trap_instruction_21_tl0
+trap_instruction_21_tl0:
+    TRAP_INSTRUCTION 21
+/* TT = 0x116, TL = 0, trap_instruction_22 */
+.org trap_table + TT_TRAP_INSTRUCTION(22)*ENTRY_SIZE
+.global trap_instruction_22_tl0
+trap_instruction_22_tl0:
+    TRAP_INSTRUCTION 22
+/* TT = 0x117, TL = 0, trap_instruction_23 */
+.org trap_table + TT_TRAP_INSTRUCTION(23)*ENTRY_SIZE
+.global trap_instruction_23_tl0
+trap_instruction_23_tl0:
+    TRAP_INSTRUCTION 23
+/* TT = 0x118, TL = 0, trap_instruction_24 */
+.org trap_table + TT_TRAP_INSTRUCTION(24)*ENTRY_SIZE
+.global trap_instruction_24_tl0
+trap_instruction_24_tl0:
+    TRAP_INSTRUCTION 24
+/* TT = 0x119, TL = 0, trap_instruction_25 */
+.org trap_table + TT_TRAP_INSTRUCTION(25)*ENTRY_SIZE
+.global trap_instruction_25_tl0
+trap_instruction_25_tl0:
+    TRAP_INSTRUCTION 25
+/* TT = 0x11a, TL = 0, trap_instruction_26 */
+.org trap_table + TT_TRAP_INSTRUCTION(26)*ENTRY_SIZE
+.global trap_instruction_26_tl0
+trap_instruction_26_tl0:
+    TRAP_INSTRUCTION 26
+/* TT = 0x11b, TL = 0, trap_instruction_27 */
+.org trap_table + TT_TRAP_INSTRUCTION(27)*ENTRY_SIZE
+.global trap_instruction_27_tl0
+trap_instruction_27_tl0:
+    TRAP_INSTRUCTION 27
+/* TT = 0x11c, TL = 0, trap_instruction_28 */
+.org trap_table + TT_TRAP_INSTRUCTION(28)*ENTRY_SIZE
+.global trap_instruction_28_tl0
+trap_instruction_28_tl0:
+    TRAP_INSTRUCTION 28
+/* TT = 0x11d, TL = 0, trap_instruction_29 */
+.org trap_table + TT_TRAP_INSTRUCTION(29)*ENTRY_SIZE
+.global trap_instruction_29_tl0
+trap_instruction_29_tl0:
+    TRAP_INSTRUCTION 29
+/* TT = 0x11e, TL = 0, trap_instruction_30 */
+.org trap_table + TT_TRAP_INSTRUCTION(30)*ENTRY_SIZE
+.global trap_instruction_30_tl0
+trap_instruction_30_tl0:
+    TRAP_INSTRUCTION 30
+/* TT = 0x11f, TL = 0, trap_instruction_31 */
+.org trap_table + TT_TRAP_INSTRUCTION(31)*ENTRY_SIZE
+.global trap_instruction_31_tl0
+trap_instruction_31_tl0:
+    TRAP_INSTRUCTION 31
 /*
  * Handlers for TL>0.
  */
 ,8 → 924,9
      * Fill all windows stored in the buffer.
      */
     clr %g4
-:  andcc %g7, UWB_ALIGNMENT - 1, %g0   ! alignment check
-    bz 0f                   ! %g7 is UWB_ALIGNMENT-aligned, no more windows to refill
+    set PAGE_SIZE - 1, %g5
+:  andcc %g7, %g5, %g0         ! PAGE_SIZE alignment check
+    bz 0f                   ! %g7 is page-aligned, no more windows to refill
     nop
     add %g7, -STACK_WINDOW_SAVE_AREA_SIZE, %g7

 /branches/sparc/kernel/arch/sparc64/src/proc/thread.c
 ,8 → 34,9
 #include <proc/thread.h>
 #include <arch/proc/thread.h>
-#include <mm/slab.h>
-#include <arch/trap/regwin.h>
+#include <mm/frame.h>
+#include <mm/page.h>
+#include <arch/mm/page.h>
 #include <align.h>
 void thr_constructor_arch(thread_t *t)
 ,12 → 50,12
 void thr_destructor_arch(thread_t *t)
 {
     if (t->arch.uspace_window_buffer) {
-        uintptr_t uw_buf = (uintptr_t) t->arch.uspace_window_buffer;
         /*
          * Mind the possible alignment of the userspace window buffer
          * belonging to a killed thread.
          */
-        free((uint8_t *) ALIGN_DOWN(uw_buf, UWB_ALIGNMENT));
+        frame_free(KA2PA(ALIGN_DOWN((uintptr_t)
+            t->arch.uspace_window_buffer, PAGE_SIZE)));
     }
 }
 ,7 → 67,7
          * The thread needs userspace window buffer and the object
          * returned from the slab allocator doesn't have any.
          */
-        t->arch.uspace_window_buffer = malloc(UWB_ASIZE, 0);
+        t->arch.uspace_window_buffer = frame_alloc(ONE_FRAME, FRAME_KA);
     } else {
         uintptr_t uw_buf = (uintptr_t) t->arch.uspace_window_buffer;
 ,7 → 76,7
          * belonging to a killed thread.
          */
         t->arch.uspace_window_buffer = (uint8_t *) ALIGN_DOWN(uw_buf,
-            UWB_ASIZE);
+            PAGE_SIZE);
     }
 }

 /branches/sparc/kernel/arch/ia64/include/asm.h
 ,50 → 44,21
 static inline void  outb(uint64_t port,uint8_t v)
 {
-    *((uint8_t *)(IA64_IOSPACE_ADDRESS + ( (port & 0xfff) | ( (port >> 2) << 12 )))) = v;
+    *((char *)(IA64_IOSPACE_ADDRESS + ( (port & 0xfff) | ( (port >> 2) << 12 )))) = v;
     asm volatile ("mf\n" ::: "memory");
 }
-static inline void  outw(uint64_t port,uint16_t v)
-{
-    *((uint16_t *)(IA64_IOSPACE_ADDRESS + ( (port & 0xfff) | ( (port >> 2) << 12 )))) = v;
-    asm volatile ("mf\n" ::: "memory");
-}
-static inline void  outl(uint64_t port,uint32_t v)
-{
-    *((uint32_t *)(IA64_IOSPACE_ADDRESS + ( (port & 0xfff) | ( (port >> 2) << 12 )))) = v;
-    asm volatile ("mf\n" ::: "memory");
-}
 static inline uint8_t inb(uint64_t port)
 {
     asm volatile ("mf\n" ::: "memory");
-    return *((uint8_t *)(IA64_IOSPACE_ADDRESS + ( (port & 0xfff) | ( (port >> 2) << 12 ))));
+    return *((char *)(IA64_IOSPACE_ADDRESS + ( (port & 0xfff) | ( (port >> 2) << 12 ))));
 }
-static inline uint16_t inw(uint64_t port)
-{
-    asm volatile ("mf\n" ::: "memory");
-    return *((uint16_t *)(IA64_IOSPACE_ADDRESS + ( (port & 0xffE) | ( (port >> 2) << 12 ))));
-}
-static inline uint32_t inl(uint64_t port)
-{
-    asm volatile ("mf\n" ::: "memory");
-    return *((uint32_t *)(IA64_IOSPACE_ADDRESS + ( (port & 0xfff) | ( (port >> 2) << 12 ))));
-}
 /** Return base address of current stack
  *
  * Return the base address of the current stack.

/branches/sparc/kernel/arch/arm32/include/interrupt.h
37,7 → 37,6
#define KERN_arm32_INTERRUPT_H_

#include <arch/types.h>
#include <arch/exception.h>

/** Initial size of exception dispatch table. */
#define IVT_ITEMS 6

 /branches/sparc/kernel/arch/ppc32/include/exception.h
 ,7 → 36,6
 #define KERN_ppc32_EXCEPTION_H_
 #include <arch/types.h>
-#include <arch/regutils.h>
 typedef struct {
     uint32_t r0;
 ,10 → 84,11
 }
 /** Return true if exception happened while in userspace */
+#include <panic.h>
 static inline int istate_from_uspace(istate_t *istate)
 {
-    /* true if privilege level PR (copied from MSR) == 1 */
-    return (istate->srr1 & MSR_PR) != 0;
+    panic("istate_from_uspace not yet implemented");
+    return 0;
 }
 static inline unative_t istate_get_pc(istate_t *istate)

 /branches/sparc/kernel/arch/ppc32/include/asm/regname.h
 ,8 → 214,8
 #define hid0    1008
 /* MSR bits */
-#define msr_dr  (1 << 4)
-#define msr_ir  (1 << 5)
+#define msr_ir  (1 << 4)
+#define msr_dr  (1 << 5)
 #define msr_pr  (1 << 14)
 #define msr_ee  (1 << 15)

 /branches/sparc/kernel/arch/amd64/include/syscall.h
 ,6 → 35,8
 #ifndef KERN_amd64_SYSCALL_H_
 #define KERN_amd64_SYSCALL_H_
+#include <arch/types.h>
 extern void syscall_setup_cpu(void);
 #endif

/branches/sparc/kernel/arch/ia32/include/syscall.h
File deleted
\ No newline at end of file
Property changes:
Deleted: svn:special
-*
\ No newline at end of property

 /branches/sparc/kernel/arch/ia32/include/asm.h
 ,22 → 247,6
     return v;
 }
-/** Write to MSR */
-static inline void write_msr(uint32_t msr, uint64_t value)
-{
-    asm volatile ("wrmsr" : : "c" (msr), "a" ((uint32_t)(value)),
-        "d" ((uint32_t)(value >> 32)));
-}
-static inline uint64_t read_msr(uint32_t msr)
-{
-    uint32_t ax, dx;
-    asm volatile ("rdmsr" : "=a"(ax), "=d"(dx) : "c" (msr));
-    return ((uint64_t)dx << 32) | ax;
-}
 /** Return base address of current stack
  *
  * Return the base address of the current stack.

 /branches/sparc/kernel/arch/ia32/include/cpu.h
 ,21 → 35,12
 #ifndef KERN_ia32_CPU_H_
 #define KERN_ia32_CPU_H_
+#include <arch/pm.h>
+#include <arch/asm.h>
 #define EFLAGS_IF       (1 << 9)
 #define EFLAGS_RF       (1 << 16)
-#define CR4_OSFXSR_MASK (1<<9)
-/* Support for SYSENTER and SYSEXIT */
-#define IA32_MSR_SYSENTER_CS    0x174
-#define IA32_MSR_SYSENTER_ESP   0x175
-#define IA32_MSR_SYSENTER_EIP   0x176
-#ifndef __ASM__
-#include <arch/pm.h>
-#include <arch/asm.h>
 typedef struct {
     int vendor;
     int family;
 ,8 → 51,9
     count_t iomapver_copy;  /** Copy of TASK's I/O Permission bitmap generation count. */
 } cpu_arch_t;
-#endif
+#define CR4_OSFXSR_MASK (1<<9)
 #endif
 /** @}

/branches/sparc/kernel/arch/ia32/Makefile.inc
160,5 → 160,4
arch/$(ARCH)/src/boot/boot.S \
arch/$(ARCH)/src/boot/memmap.c \
arch/$(ARCH)/src/fpu_context.c \
arch/$(ARCH)/src/debugger.c \
arch/$(ARCH)/src/syscall.c
arch/$(ARCH)/src/debugger.c

 /branches/sparc/kernel/arch/ia32/src/asm.S
 ,45 → 147,6
     popfl
 .endm
-/*
- * The SYSENTER syscall mechanism can be used for syscalls with
- * four or fewer arguments. To pass these four arguments, we
- * use four registers: EDX, ECX, EBX, ESI. The syscall number
- * is passed in EAX. We use EDI to remember the return address
- * and EBP to remember the stack. The INT-based syscall mechanism
- * can actually handle six arguments plus the syscall number
- * entirely in registers.
- */
-.global sysenter_handler
-sysenter_handler:
-    pushl %ebp  # remember user stack
-    pushl %edi  # remember return user address
-    pushl %gs   # remember TLS
-    pushl %eax  # syscall number
-    subl $8, %esp   # unused sixth and fifth argument
-    pushl %esi  # fourth argument
-    pushl %ebx  # third argument
-    pushl %ecx  # second argument
-    pushl %edx  # first argument
-    movw $16, %ax
-    movw %ax, %ds
-    movw %ax, %es
-    cld
-    call syscall_handler
-    addl $28, %esp  # remove arguments from stack
-    pop %gs     # restore TLS
-    pop %edx    # prepare return EIP for SYSEXIT
-    pop %ecx    # prepare userspace ESP for SYSEXIT
-    sysexit     # return to userspace
 ## Declare interrupt handlers
 #
 # Declare interrupt handlers for n interrupt

 /branches/sparc/kernel/arch/ia32/src/proc/scheduler.c
 ,14 → 58,8
  */
 void before_thread_runs_arch(void)
 {
-    uintptr_t kstk = (uintptr_t) &THREAD->kstack[THREAD_STACK_SIZE -
+    CPU->arch.tss->esp0 = (uintptr_t) &THREAD->kstack[THREAD_STACK_SIZE -
         SP_DELTA];
-    /* Set kernel stack for CP3 -> CPL0 switch via SYSENTER */
-    write_msr(IA32_MSR_SYSENTER_ESP, kstk);
-    /* Set kernel stack for CPL3 -> CPL0 switch via interrupt */
-    CPU->arch.tss->esp0 = kstk;
     CPU->arch.tss->ss0 = selector(KDATA_DES);
     /* Set up TLS in GS register */

 /branches/sparc/kernel/arch/ia32/src/cpu/cpu.c
 ,7 → 42,6
 #include <fpu_context.h>
 #include <arch/smp/apic.h>
-#include <arch/syscall.h>
 /*
  * Identification of CPUs.
 ,9 → 123,6
             : "i" (CR4_OSFXSR_MASK|(1<<10))
         );
     }
-    /* Setup fast SYSENTER/SYSEXIT syscalls */
-    syscall_setup_cpu();
 }
 void cpu_identify(void)

Subversion Repositories HelenOS

Compare Revisions

Ignore whitespace Rev 3492 → Rev 3491