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Ignore whitespace Rev 2128 → Rev 2465

/trunk/uspace/libc/arch/arm32/src/dummy.S
File deleted
/trunk/uspace/libc/arch/arm32/src/eabi.S
0,0 → 1,35
#
# Copyright (c) 2007 Pavel Jancik
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions
# are met:
#
# - Redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer.
# - Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in the
# documentation and/or other materials provided with the distribution.
# - The name of the author may not be used to endorse or promote products
# derived from this software without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#
 
.text
 
.global __aeabi_read_tp
 
__aeabi_read_tp:
mov r0, r9
mov pc, lr
/trunk/uspace/libc/arch/arm32/src/entry.s
1,5 → 1,5
#
# Copyright (c) 2006 Jakub Jermar
# Copyright (c) 2007 Michal Kebrt, Pavel Jancik
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
28,6 → 28,8
 
.section .init, "ax"
 
.org 0
 
.global __entry
.global __entry_driver
 
35,7 → 37,13
#
#
__entry:
bl __main
bl __io_init
bl main
bl __exit
 
#
# TODO
#
__entry_driver:
bl __main
bl main
bl __exit
 
/trunk/uspace/libc/arch/arm32/src/thread.c
1,5 → 1,5
/*
* Copyright (c) 2006 Ondrej Palkovsky
* Copyright (c) 2007 Pavel Jancik
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
32,25 → 32,35
* @{
*/
/** @file
* @brief Uspace threads and TLS.
*/
 
#include <thread.h>
#include <malloc.h>
 
/** Allocate TLS & TCB for initial module threads
/** Allocates TLS & TCB.
*
* @param data Start of data section
* @return pointer to tcb_t structure
* @param data Start of data section (output parameter).
* @param size Size of (tbss + tdata) sections.
* @return Pointer to the allocated #tcb_t structure.
*/
tcb_t * __alloc_tls(void **data, size_t size)
{
/* TODO */
return NULL;
tcb_t *result;
 
result = malloc(sizeof(tcb_t) + size);
*data = ((void *)result) + sizeof(tcb_t);
return result;
}
 
/** Deallocates TLS & TCB.
*
* @param tcb TCB structure to be deallocated (along with corresponding TLS).
* @param size Not used.
*/
void __free_tls_arch(tcb_t *tcb, size_t size)
{
/* TODO */
free(tcb);
}
 
/** @}
/trunk/uspace/libc/arch/arm32/src/thread_entry.s
34,7 → 34,4
#
#
__thread_entry:
 
#
# TODO
#
b __thread_main
/trunk/uspace/libc/arch/arm32/src/psthread.S
1,5 → 1,5
#
# Copyright (c) 2005 Jakub Jermar
# Copyright (c) 2007 Michal Kebrt
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
32,7 → 32,18
.global context_restore
 
context_save:
/* TODO */
stmia r0!, {sp, lr}
stmia r0!, {r4-r11}
 
# return 1
mov r0, #1
mov pc, lr
 
context_restore:
/* TODO */
ldmia r0!, {sp, lr}
ldmia r0!, {r4-r11}
 
#return 0
mov r0, #0
mov pc, lr
 
/trunk/uspace/libc/arch/arm32/src/syscall.c
1,5 → 1,5
/*
* Copyright (c) 2005 Martin Decky
* Copyright (c) 2007 Pavel Jancik
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
30,16 → 30,44
* @{
*/
/** @file
* @ingroup libcarm32
* @brief Syscall routine.
*/
 
#include <libc.h>
 
 
/** Syscall routine.
*
* Stores p1-p4, id to r0-r4 registers and calls <code>swi</code>
* instruction. Returned value is read from r0 register.
*
* @param p1 Parameter 1.
* @param p2 Parameter 2.
* @param p3 Parameter 3.
* @param p4 Parameter 4.
* @param id Number of syscall.
*
* @return Syscall return value.
*/
sysarg_t __syscall(const sysarg_t p1, const sysarg_t p2, const sysarg_t p3,
const sysarg_t p4, const syscall_t id)
{
/* TODO */
return 0;
register sysarg_t __arm_reg_r0 asm("r0") = p1;
register sysarg_t __arm_reg_r1 asm("r1") = p2;
register sysarg_t __arm_reg_r2 asm("r2") = p3;
register sysarg_t __arm_reg_r3 asm("r3") = p4;
register sysarg_t __arm_reg_r4 asm("r4") = id;
 
asm volatile ( "swi"
: "=r" (__arm_reg_r0)
: "r" (__arm_reg_r0),
"r" (__arm_reg_r1),
"r" (__arm_reg_r2),
"r" (__arm_reg_r3),
"r" (__arm_reg_r4)
);
 
return __arm_reg_r0;
}
 
/** @}