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Ignore whitespace Rev 2128 → Rev 2465

/trunk/uspace/libc/arch/arm32/include/psthread.h
1,5 → 1,5
/*
* Copyright (c) 2006 Ondrej Palkovsky
* Copyright (c) 2007 Michal Kebrt
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
29,8 → 29,8
/** @addtogroup libcarm32
* @{
*/
/** @file
* @ingroup libcarm32
/** @file
* @brief psthread related declarations.
*/
 
#ifndef LIBC_arm32_PSTHREAD_H_
37,15 → 37,53
#define LIBC_arm32_PSTHREAD_H_
 
#include <types.h>
#include <align.h>
#include "thread.h"
 
#define SP_DELTA 0 /* TODO */
/** Size of a stack item */
#define STACK_ITEM_SIZE 4
 
/** Stack alignment - see <a href="http://www.arm.com/support/faqdev/14269.html">ABI</a> for details */
#define STACK_ALIGNMENT 8
 
#define SP_DELTA (0 + ALIGN_UP(STACK_ITEM_SIZE, STACK_ALIGNMENT))
 
 
/** Sets data to the context.
*
* @param c Context (#context_t).
* @param _pc Program counter.
* @param stack Stack address.
* @param size Stack size.
* @param ptls Pointer to the TCB.
*/
#define context_set(c, _pc, stack, size, ptls) \
(c)->pc = (sysarg_t) (_pc); \
(c)->sp = ((sysarg_t) (stack)) + (size) - SP_DELTA; \
(c)->tls = ((sysarg_t)(ptls)) + sizeof(tcb_t) + ARM_TP_OFFSET;
 
 
/** Thread context.
*
* Only registers preserved accross function calls are included. r9 is used
* to store a TLS address. -ffixed-r9 gcc forces gcc not to use this
* register. -mtp=soft forces gcc to use #__aeabi_read_tp to obtain
* TLS address.
*/
typedef struct {
uint32_t sp;
uint32_t pc;
uint32_t r4;
uint32_t r5;
uint32_t r6;
uint32_t r7;
uint32_t r8;
uint32_t tls;
uint32_t r10;
uint32_t r11;
} context_t;
 
 
#endif
 
/** @}
/trunk/uspace/libc/arch/arm32/include/syscall.h
1,5 → 1,5
/*
* Copyright (c) 2005 Martin Decky
* Copyright (c) 2007 Michal Kebrt
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
26,11 → 26,11
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup libc
/** @addtogroup libcarm32
* @{
*/
/**
* @file
/** @file
* @brief Empty.
*/
 
#ifndef LIBC_arm32_SYSCALL_H_
/trunk/uspace/libc/arch/arm32/include/atomic.h
1,5 → 1,5
/*
* Copyright (c) 2005 Jakub Jermar
* Copyright (c) 2007 Michal Kebrt
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
30,6 → 30,7
* @{
*/
/** @file
* @brief Atomic operations.
*/
 
#ifndef LIBC_arm32_ATOMIC_H_
37,26 → 38,80
 
/** Atomic addition.
*
* @param val Atomic value.
* @param imm Value to add.
* @param val Where to add.
* @param i Value to be added.
*
* @return Value after addition.
*/
static inline long atomic_add(atomic_t *val, int imm)
static inline long atomic_add(atomic_t *val, int i)
{
/* TODO */
return (val->count += imm);
int ret;
volatile long * mem = &(val->count);
 
asm volatile (
"1: \n"
"ldr r2, [%1] \n"
"add r3, r2, %2 \n"
"str r3, %0 \n"
"swp r3, r3, [%1] \n"
"cmp r3, r2 \n"
"bne 1b \n"
 
: "=m" (ret)
: "r" (mem), "r" (i)
: "r3", "r2"
);
 
return ret;
}
 
 
/** Atomic increment.
*
* @param val Variable to be incremented.
*/
static inline void atomic_inc(atomic_t *val) { atomic_add(val, 1); }
 
 
/** Atomic decrement.
*
* @param val Variable to be decremented.
*/
static inline void atomic_dec(atomic_t *val) { atomic_add(val, -1); }
 
static inline long atomic_preinc(atomic_t *val) { return atomic_add(val, 1) + 1; }
static inline long atomic_predec(atomic_t *val) { return atomic_add(val, -1) - 1; }
 
static inline long atomic_postinc(atomic_t *val) { return atomic_add(val, 1); }
static inline long atomic_postdec(atomic_t *val) { return atomic_add(val, -1); }
/** Atomic pre-increment.
*
* @param val Variable to be incremented.
* @return Value after incrementation.
*/
static inline long atomic_preinc(atomic_t *val) { return atomic_add(val, 1); }
 
 
/** Atomic pre-decrement.
*
* @param val Variable to be decremented.
* @return Value after decrementation.
*/
static inline long atomic_predec(atomic_t *val) { return atomic_add(val, -1); }
 
 
/** Atomic post-increment.
*
* @param val Variable to be incremented.
* @return Value before incrementation.
*/
static inline long atomic_postinc(atomic_t *val) { return atomic_add(val, 1) - 1; }
 
 
/** Atomic post-decrement.
*
* @param val Variable to be decremented.
* @return Value before decrementation.
*/
static inline long atomic_postdec(atomic_t *val) { return atomic_add(val, -1) + 1; }
 
 
#endif
 
/** @}
/trunk/uspace/libc/arch/arm32/include/endian.h
29,7 → 29,8
/** @addtogroup libcarm32
* @{
*/
/** @file
/** @file
* @brief Endianness definition.
*/
 
#ifndef LIBC_arm32_ENDIAN_H_
/trunk/uspace/libc/arch/arm32/include/stackarg.h
1,5 → 1,5
/*
* Copyright (c) 2006 Josef Cejka
* Copyright (c) 2007 Michal Kebrt
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
30,6 → 30,7
* @{
*/
/** @file
* @brief Empty.
*/
 
#ifndef LIBC_arm32_STACKARG_H_
/trunk/uspace/libc/arch/arm32/include/faddr.h
1,5 → 1,5
/*
* Copyright (c) 2005 Jakub Jermar
* Copyright (c) 2007 Michal Kebrt
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
29,7 → 29,8
/** @addtogroup libcarm32
* @{
*/
/** @file
/** @file
* @brief Function address conversion.
*/
 
#ifndef LIBC_arm32_FADDR_H_
37,13 → 38,9
 
#include <libarch/types.h>
 
/**
/** Calculate absolute address of function referenced by fptr pointer.
*
* Calculate absolute address of function
* referenced by fptr pointer.
*
* @param f Function pointer.
*
*/
#define FADDR(f) (f)
 
/trunk/uspace/libc/arch/arm32/include/limits.h
1,5 → 1,5
/*
* Copyright (c) 2006 Josef Cejka
* Copyright (c) 2007 Michal Kebrt
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
29,17 → 29,17
/** @addtogroup libcarm32
* @{
*/
/** @file
* @ingroup libcarm32
/** @file
* @brief Limits declarations.
*/
 
#ifndef LIBC_arm32__LIMITS_H_
#define LIBC_arm32__LIMITS_H_
 
# define LONG_MIN MIN_INT32
# define LONG_MAX MAX_INT32
# define ULONG_MIN MIN_UINT32
# define ULONG_MAX MAX_UINT32
#define LONG_MIN MIN_INT32
#define LONG_MAX MAX_INT32
#define ULONG_MIN MIN_UINT32
#define ULONG_MAX MAX_UINT32
 
#endif
 
/trunk/uspace/libc/arch/arm32/include/types.h
29,8 → 29,8
/** @addtogroup libcarm32
* @{
*/
/** @file
* @ingroup libcarm32
/** @file
* @brief Definitions of basic types like #uintptr_t.
*/
 
#ifndef LIBC_arm32_TYPES_H_
/trunk/uspace/libc/arch/arm32/include/config.h
29,7 → 29,8
/** @addtogroup libcarm32
* @{
*/
/** @file
/** @file
* @brief Configuration constants.
*/
 
#ifndef LIBC_arm32_CONFIG_H_
/trunk/uspace/libc/arch/arm32/include/thread.h
1,5 → 1,5
/*
* Copyright (c) 2006 Jakub Jermar
* Copyright (c) 2007 Pavel Jancik, Michal Kebrt
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
26,10 → 26,11
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup libcia64
/** @addtogroup libcarm32
* @{
*/
/** @file
* @brief Uspace threads and TLS.
*/
 
#ifndef LIBC_arm32_THREAD_H_
37,24 → 38,61
 
#include <unistd.h>
 
/** Stack initial size. */
#define THREAD_INITIAL_STACK_PAGES_NO 1
 
/** Offsets for accessing __thread variables are shifted 8 bytes higher. */
#define ARM_TP_OFFSET (-8)
 
/** TCB (Thread Control Block) struct.
*
* TLS starts just after this struct.
*/
typedef struct {
/** psthread data. */
void *pst_data;
/* TODO */
} tcb_t;
 
 
/** Sets TLS address to the r9 register.
*
* @param tcb TCB (TLS starts behind)
*/
static inline void __tcb_set(tcb_t *tcb)
{
/* TODO */
void *tls = (void *)tcb;
tls += sizeof(tcb_t) + ARM_TP_OFFSET;
asm volatile (
"mov r9, %0"
:
: "r"(tls)
);
}
 
 
/** Returns TCB address.
*
* @return TCB address (starts before TLS which address is stored in r9 register).
*/
static inline tcb_t *__tcb_get(void)
{
/* TODO */
return NULL;
void *ret;
asm volatile (
"mov %0, r9"
: "=r"(ret)
);
return (tcb_t *)(ret - ARM_TP_OFFSET - sizeof(tcb_t));
}
 
 
/** Returns TLS address stored.
*
* Implemented in assembly.
*
* @return TLS address stored in r9 register
*/
extern uintptr_t __aeabi_read_tp(void);
 
#endif
 
/** @}