0,0 → 1,149 |
## General configuration directives |
|
# Architecture |
@ "amd64" AMD64/Intel EM64T |
@ "ia32" Intel IA-32 |
@ "ia32xen" Intel IA-32 on Xen hypervisor |
@ "ia64" Intel IA-64 |
@ "mips32" MIPS 32-bit |
@ "ppc32" PowerPC 32-bit |
@ "ppc64" PowerPC 64-bit |
@ "sparc64" Sun UltraSPARC 64-bit |
! ARCH (choice) |
|
# Compiler |
@ "cross" Cross-compiler |
@ "native" Native |
! COMPILER (choice) |
|
# CPU type |
@ "pentium4" Pentium 4 |
@ "pentium3" Pentium 3 |
@ "athlon-xp" Athlon XP |
@ "athlon-mp" Athlon MP |
@ "prescott" Prescott |
! [ARCH=ia32|ARCH=ia32xen] MACHINE (choice) |
|
# CPU type |
@ "opteron" Opteron |
! [ARCH=amd64] MACHINE (choice) |
|
# Machine type |
@ "msim" MSIM Simulator |
@ "simics" Virtutech Simics simulator |
@ "lgxemul" GXEmul Little Endian |
@ "bgxemul" GXEmul Big Endian |
@ "indy" SGI Indy |
! [ARCH=mips32] MACHINE (choice) |
|
# Framebuffer support |
! [(ARCH=mips32&MACHINE=lgxemul)|(ARCH=mips32&MACHINE=bgxemul)|(ARCH=ia32)|(ARCH=amd64)] CONFIG_FB (y/n) |
|
# Framebuffer width |
@ "640" |
@ "800" |
@ "1024" |
@ "1152" |
@ "1280" |
@ "1400" |
@ "1440" |
@ "1600" |
@ "2048" |
! [(ARCH=ia32|ARCH=amd64)&CONFIG_FB=y] CONFIG_VESA_WIDTH (choice) |
|
# Framebuffer height |
@ "480" |
@ "600" |
@ "768" |
@ "852" |
@ "900" |
@ "960" |
@ "1024" |
@ "1050" |
@ "1200" |
@ "1536" |
! [(ARCH=ia32|ARCH=amd64)&CONFIG_FB=y] CONFIG_VESA_HEIGHT (choice) |
|
# Framebuffer depth |
@ "8" |
@ "16" |
@ "24" |
! [(ARCH=ia32|ARCH=amd64)&CONFIG_FB=y] CONFIG_VESA_BPP (choice) |
|
# Support for SMP |
! [ARCH=ia32|ARCH=amd64|ARCH=ia32xen|ARCH=sparc64] CONFIG_SMP (y/n) |
|
# Improved support for hyperthreading |
! [(ARCH=ia32|ARCH=amd64|ARCH=ia32xen)&CONFIG_SMP=y] CONFIG_HT (y/n) |
|
# Simics BIOS AP boot fix |
! [(ARCH=ia32|ARCH=amd64)&CONFIG_SMP=y] CONFIG_SIMICS_FIX (y/n) |
|
# Lazy FPU context switching |
! [(ARCH=mips32&MACHINE!=msim&MACHINE!=simics)|ARCH=amd64|ARCH=ia32|ARCH=ia64|ARCH=sparc64|ARCH=ia32xen] CONFIG_FPU_LAZY (y/n) |
|
# Power off on halt |
! [ARCH=ppc32] CONFIG_POWEROFF (n/y) |
|
# Use VHPT |
! [ARCH=ia64] CONFIG_VHPT (n/y) |
|
# Use TSB |
! [ARCH=sparc64] CONFIG_TSB (y/n) |
|
# Support for Z8530 serial port |
! [ARCH=sparc64] CONFIG_Z8530 (y/n) |
|
# Support for NS16550 serial port |
! [ARCH=sparc64] CONFIG_NS16550 (y/n) |
|
# Virtually indexed cache support |
! [ARCH=sparc64] CONFIG_VIRT_IDX_SUPPORT (n/y) |
|
|
## Debugging configuration directives |
|
# General debuging and assert checking |
! CONFIG_DEBUG (y/n) |
|
# Deadlock detection support for spinlocks |
! [CONFIG_DEBUG=y&CONFIG_SMP=y] CONFIG_DEBUG_SPINLOCK (y/n) |
|
# Watchpoint on rewriting AS with zero |
! [CONFIG_DEBUG=y&(ARCH=amd64|ARCH=ia32|ARCH=ia32xen)] CONFIG_DEBUG_AS_WATCHPOINT (y/n) |
|
# Save all interrupt registers |
! [CONFIG_DEBUG=y&(ARCH=amd64|ARCH=mips32|ARCH=ia32|ARCH=ia32xen)] CONFIG_DEBUG_ALLREGS (y/n) |
|
|
## Run-time configuration directives |
|
# Kernel test type |
@ "" No test |
@ "atomic/atomic1" Test of atomic operations. |
@ "btree/btree1" B-tree test. |
@ "synch/rwlock1" Read write test 1 |
@ "synch/rwlock2" Read write test 2 |
@ "synch/rwlock3" Read write test 3 |
@ "synch/rwlock4" Read write test 4 |
@ "synch/rwlock5" Read write test 5 |
@ "synch/semaphore1" Semaphore test 1 |
@ "synch/semaphore2" Sempahore test 2 |
@ [ARCH=ia32|ARCH=amd64|ARCH=ia64|ARCH=ia32xen] "fpu/fpu1" Intel FPU test 1 |
@ [ARCH=ia32|ARCH=amd64|ARCH=ia32xen] "fpu/sse1" Intel SSE test 1 |
@ [ARCH=mips32&MACHINE!=msim&MACHINE!=simics] "fpu/mips1" MIPS FPU test 1 |
@ "print/print1" Printf test 1 |
@ "thread/thread1" Thread test 1 |
@ "mm/mapping1" Mapping test 1 |
@ "mm/falloc1" Frame Allocation test 1 |
@ "mm/falloc2" Frame Allocation test 2 |
@ "mm/slab1" SLAB test1 - No CPU cache |
@ "mm/slab2" SLAB test2 - SMP CPU cache |
@ "fault/fault1" Write to NULL (maybe page fault) |
@ "sysinfo" Sysinfo fill and dump test |
@ [ARCH=ia64] "mm/purge1" Itanium TLB purge test |
@ [ARCH=mips32] "debug/mips1" MIPS breakpoint-debug test |
! CONFIG_TEST (choice) |
|
# Benchmark test |
! [CONFIG_TEST!=] CONFIG_BENCH (y/n) |