/trunk/kernel/genarch/include/kbd/z8530.h |
---|
42,7 → 42,7 |
extern bool z8530_belongs_to_kernel; |
extern void z8530_init(void); |
extern void z8530_init(devno_t devno, inr_t inr, uintptr_t vaddr); |
extern void z8530_poll(void); |
extern void z8530_grab(void); |
extern void z8530_release(void); |
/trunk/kernel/genarch/include/kbd/ns16550.h |
---|
40,7 → 40,7 |
#include <typedefs.h> |
#include <ddi/irq.h> |
extern void ns16550_init(void); |
extern void ns16550_init(devno_t devno, inr_t inr, uintptr_t vaddr); |
extern void ns16550_poll(void); |
extern void ns16550_grab(void); |
extern void ns16550_release(void); |
/trunk/kernel/genarch/src/kbd/ns16550.c |
---|
1,5 → 1,5 |
/* |
* Copyright (C) 2001-2004 Jakub Jermar |
* Copyright (C) 2001-2006 Jakub Jermar |
* All rights reserved. |
* |
* Redistribution and use in source and binary forms, with or without |
52,6 → 52,12 |
#define LSR_DATA_READY 0x01 |
/** Structure representing the ns16550. */ |
static ns16550_t ns16550; |
/** Structure for ns16550's IRQ. */ |
static irq_t ns16550_irq; |
/* |
* These codes read from ns16550 data register are silently ignored. |
*/ |
81,21 → 87,37 |
/* TODO */ |
} |
/** Initialize ns16550. */ |
void ns16550_init(void) |
/** Initialize ns16550. |
* |
* @param devno Device number. |
* @param inr Interrupt number. |
* @param vaddr Virtual address of device's registers. |
*/ |
void ns16550_init(devno_t devno, inr_t inr, uintptr_t vaddr) |
{ |
ns16550_grab(); |
chardev_initialize("ns16550_kbd", &kbrd, &ops); |
stdin = &kbrd; |
ns16550.devno = devno; |
ns16550.reg = (uint8_t *) vaddr; |
irq_initialize(&ns16550_irq); |
ns16550_irq.devno = devno; |
ns16550_irq.inr = inr; |
ns16550_irq.claim = ns16550_claim; |
ns16550_irq.handler = ns16550_irq_handler; |
irq_register(&ns16550_irq); |
sysinfo_set_item_val("kbd", NULL, true); |
sysinfo_set_item_val("kbd.irq", NULL, 0); |
sysinfo_set_item_val("kbd.address.virtual", NULL, (uintptr_t) kbd_virt_address); |
sysinfo_set_item_val("kbd.devno", NULL, devno); |
sysinfo_set_item_val("kbd.inr", NULL, inr); |
sysinfo_set_item_val("kbd.address.virtual", NULL, vaddr); |
ns16550_ier_write(IER_ERBFI); /* enable receiver interrupt */ |
ns16550_ier_write(&ns16550, IER_ERBFI); /* enable receiver interrupt */ |
while (ns16550_lsr_read() & LSR_DATA_READY) |
(void) ns16550_rbr_read(); |
while (ns16550_lsr_read(&ns16550) & LSR_DATA_READY) |
(void) ns16550_rbr_read(&ns16550); |
} |
/** Process ns16550 interrupt. |
129,9 → 151,9 |
while(!(ch = active_read_buff_read())) { |
uint8_t x; |
while (!(ns16550_lsr_read() & LSR_DATA_READY)) |
while (!(ns16550_lsr_read(&ns16550) & LSR_DATA_READY)) |
; |
x = ns16550_rbr_read(); |
x = ns16550_rbr_read(&ns16550); |
if (x != IGNORE_CODE) { |
if (x & KEY_RELEASE) |
key_released(x ^ KEY_RELEASE); |
150,8 → 172,8 |
{ |
uint8_t x; |
while (ns16550_lsr_read() & LSR_DATA_READY) { |
x = ns16550_rbr_read(); |
while (ns16550_lsr_read(&ns16550) & LSR_DATA_READY) { |
x = ns16550_rbr_read(&ns16550); |
if (x != IGNORE_CODE) { |
if (x & KEY_RELEASE) |
key_released(x ^ KEY_RELEASE); |
/trunk/kernel/genarch/src/kbd/z8530.c |
---|
60,6 → 60,9 |
bool z8530_belongs_to_kernel = true; |
static z8530_t z8530; /**< z8530 device structure. */ |
static irq_t z8530_irq; /**< z8530's IRQ. */ |
static void z8530_suspend(chardev_t *); |
static void z8530_resume(chardev_t *); |
84,29 → 87,40 |
} |
/** Initialize z8530. */ |
void z8530_init(void) |
void z8530_init(devno_t devno, inr_t inr, uintptr_t vaddr) |
{ |
chardev_initialize("z8530_kbd", &kbrd, &ops); |
stdin = &kbrd; |
z8530.devno = devno; |
z8530.reg = (uint8_t *) vaddr; |
irq_initialize(&z8530_irq); |
z8530_irq.devno = devno; |
z8530_irq.inr = inr; |
z8530_irq.claim = z8530_claim; |
z8530_irq.handler = z8530_irq_handler; |
irq_register(&z8530_irq); |
sysinfo_set_item_val("kbd", NULL, true); |
sysinfo_set_item_val("kbd.irq", NULL, 0); |
sysinfo_set_item_val("kbd.address.virtual", NULL, (uintptr_t) kbd_virt_address); |
sysinfo_set_item_val("kbd.devno", NULL, devno); |
sysinfo_set_item_val("kbd.inr", NULL, inr); |
sysinfo_set_item_val("kbd.address.virtual", NULL, vaddr); |
(void) z8530_read_a(RR8); |
(void) z8530_read_a(&z8530, RR8); |
/* |
* Clear any pending TX interrupts or we never manage |
* to set FHC UART interrupt state to idle. |
*/ |
z8530_write_a(WR0, WR0_TX_IP_RST); |
z8530_write_a(&z8530, WR0, WR0_TX_IP_RST); |
z8530_write_a(WR1, WR1_IARCSC); /* interrupt on all characters */ |
z8530_write_a(&z8530, WR1, WR1_IARCSC); /* interrupt on all characters */ |
/* 8 bits per character and enable receiver */ |
z8530_write_a(WR3, WR3_RX8BITSCH | WR3_RX_ENABLE); |
z8530_write_a(&z8530, WR3, WR3_RX8BITSCH | WR3_RX_ENABLE); |
z8530_write_a(WR9, WR9_MIE); /* Master Interrupt Enable. */ |
z8530_write_a(&z8530, WR9, WR9_MIE); /* Master Interrupt Enable. */ |
} |
/** Process z8530 interrupt. |
139,9 → 153,9 |
while(!(ch = active_read_buff_read())) { |
uint8_t x; |
while (!(z8530_read_a(RR0) & RR0_RCA)) |
while (!(z8530_read_a(&z8530, RR0) & RR0_RCA)) |
; |
x = z8530_read_a(RR8); |
x = z8530_read_a(&z8530, RR8); |
if (x != IGNORE_CODE) { |
if (x & KEY_RELEASE) |
key_released(x ^ KEY_RELEASE); |
160,8 → 174,8 |
{ |
uint8_t x; |
while (z8530_read_a(RR0) & RR0_RCA) { |
x = z8530_read_a(RR8); |
while (z8530_read_a(&z8530, RR0) & RR0_RCA) { |
x = z8530_read_a(&z8530, RR8); |
if (x != IGNORE_CODE) { |
if (x & KEY_RELEASE) |
key_released(x ^ KEY_RELEASE); |
173,7 → 187,7 |
irq_ownership_t z8530_claim(void) |
{ |
return (z8530_read_a(RR0) & RR0_RCA); |
return (z8530_read_a(&z8530, RR0) & RR0_RCA); |
} |
void z8530_irq_handler(irq_t *irq, void *arg, ...) |