/trunk/kernel/arch/amd64/include/debugger.h |
---|
48,7 → 48,7 |
extern void debugger_init(void); |
extern int breakpoint_add(void * where, int flags, int curidx); |
extern int breakpoint_add(const void *where, const int flags, int curidx); |
extern void breakpoint_del(int slot); |
#endif |
/trunk/kernel/arch/amd64/src/debugger.c |
---|
102,7 → 102,7 |
#endif |
/** Print table of active breakpoints */ |
int cmd_print_breakpoints(cmd_arg_t *argv) |
int cmd_print_breakpoints(cmd_arg_t *argv __attribute__((unused))) |
{ |
int i; |
char *symbol; |
111,7 → 111,7 |
for (i=0; i < BKPOINTS_MAX; i++) |
if (breakpoints[i].address) { |
symbol = get_symtab_entry(breakpoints[i].address); |
printf("%d. %p in %s\n",i, |
printf("%d. %lx in %s\n", i, |
breakpoints[i].address, symbol); |
printf(" Count(%d) ", breakpoints[i].counter); |
printf("\n"); |
173,18 → 173,17 |
/** Enable hardware breakpoint |
* |
* |
* @param where Address of HW breakpoint |
* @param flags Type of breakpoint (EXECUTE, WRITE) |
* @return Debug slot on success, -1 - no available HW breakpoint |
*/ |
int breakpoint_add(void * where, int flags, int curidx) |
int breakpoint_add(const void *where, const int flags, int curidx) |
{ |
ipl_t ipl; |
int i; |
bpinfo_t *cur; |
ASSERT( flags & (BKPOINT_INSTR | BKPOINT_WRITE | BKPOINT_READ_WRITE)); |
ASSERT(flags & (BKPOINT_INSTR | BKPOINT_WRITE | BKPOINT_READ_WRITE)); |
ipl = interrupts_disable(); |
spinlock_lock(&bkpoint_lock); |
191,7 → 190,7 |
if (curidx == -1) { |
/* Find free space in slots */ |
for (i=0; i<BKPOINTS_MAX; i++) |
for (i = 0; i < BKPOINTS_MAX; i++) |
if (!breakpoints[i].address) { |
curidx = i; |
break; |
223,9 → 222,9 |
} |
#ifdef amd64 |
# define getip(x) ((x)->rip) |
# define getip(x) ((x)->rip) |
#else |
# define getip(x) ((x)->eip) |
# define getip(x) ((x)->eip) |
#endif |
static void handle_exception(int slot, istate_t *istate) |
237,14 → 236,14 |
if ((breakpoints[slot].flags & BKPOINT_CHECK_ZERO)) { |
if (*((unative_t *) breakpoints[slot].address) != 0) |
return; |
printf("**** Found ZERO on address %p ****\n", |
slot, breakpoints[slot].address); |
printf("**** Found ZERO on address %lx (slot %d) ****\n", |
breakpoints[slot].address, slot); |
} else { |
printf("Data watchpoint - new data: %p\n", |
printf("Data watchpoint - new data: %lx\n", |
*((unative_t *) breakpoints[slot].address)); |
} |
} |
printf("Reached breakpoint %d:%p(%s)\n", slot, getip(istate), |
printf("Reached breakpoint %d:%lx(%s)\n", slot, getip(istate), |
get_symtab_entry(getip(istate))); |
printf("***Type 'exit' to exit kconsole.\n"); |
atomic_set(&haltstate,1); |
313,7 → 312,7 |
} |
#endif |
static void debug_exception(int n, istate_t *istate) |
static void debug_exception(int n __attribute__((unused)), istate_t *istate) |
{ |
unative_t dr6; |
int i; |
337,12 → 336,12 |
} |
#ifdef CONFIG_SMP |
static void debug_ipi(int n, istate_t *istate) |
static void debug_ipi(int n __attribute__((unused)), istate_t *istate __attribute__((unused))) |
{ |
int i; |
spinlock_lock(&bkpoint_lock); |
for (i=0; i < BKPOINTS_MAX; i++) |
for (i = 0; i < BKPOINTS_MAX; i++) |
setup_dr(i); |
spinlock_unlock(&bkpoint_lock); |
} |
/trunk/kernel/arch/ia32/include/smp/apic.h |
---|
346,7 → 346,7 |
extern uint32_t io_apic_read(uint8_t address); |
extern void io_apic_write(uint8_t address , uint32_t x); |
extern void io_apic_change_ioredtbl(int pin, int dest, uint8_t v, int flags); |
extern void io_apic_change_ioredtbl(uint8_t pin, uint8_t dest, uint8_t v, int flags); |
extern void io_apic_disable_irqs(uint16_t irqmask); |
extern void io_apic_enable_irqs(uint16_t irqmask); |
/trunk/kernel/arch/ia32/include/asm.h |
---|
257,7 → 257,11 |
{ |
uintptr_t v; |
asm volatile ("andl %%esp, %0\n" : "=r" (v) : "0" (~(STACK_SIZE-1))); |
asm volatile ( |
"andl %%esp, %0\n" |
: "=r" (v) |
: "0" (~(STACK_SIZE - 1)) |
); |
return v; |
} |
/trunk/kernel/arch/ia32/include/mm/frame.h |
---|
36,7 → 36,7 |
#define KERN_ia32_FRAME_H_ |
#define FRAME_WIDTH 12 /* 4K */ |
#define FRAME_SIZE (1<<FRAME_WIDTH) |
#define FRAME_SIZE (1 << FRAME_WIDTH) |
#ifdef KERNEL |
#ifndef __ASM__ |
/trunk/kernel/arch/ia32/include/context.h |
---|
45,7 → 45,7 |
* |
* One item is put onto stack to support get_stack_base(). |
*/ |
#define SP_DELTA (8+STACK_ITEM_SIZE) |
#define SP_DELTA (8 + STACK_ITEM_SIZE) |
/* |
* Only save registers that must be preserved across |
/trunk/kernel/arch/ia32/src/smp/mps.c |
---|
54,19 → 54,19 |
#define FS_SIGNATURE 0x5f504d5f |
#define CT_SIGNATURE 0x504d4350 |
int mps_fs_check(uint8_t *base); |
int mps_ct_check(void); |
static int mps_fs_check(uint8_t *base); |
static int mps_ct_check(void); |
int configure_via_ct(void); |
int configure_via_default(uint8_t n); |
static int configure_via_ct(void); |
static int configure_via_default(uint8_t n); |
int ct_processor_entry(struct __processor_entry *pr); |
void ct_bus_entry(struct __bus_entry *bus); |
void ct_io_apic_entry(struct __io_apic_entry *ioa); |
void ct_io_intr_entry(struct __io_intr_entry *iointr); |
void ct_l_intr_entry(struct __l_intr_entry *lintr); |
static int ct_processor_entry(struct __processor_entry *pr); |
static void ct_bus_entry(struct __bus_entry *bus); |
static void ct_io_apic_entry(struct __io_apic_entry *ioa); |
static void ct_io_intr_entry(struct __io_intr_entry *iointr); |
static void ct_l_intr_entry(struct __l_intr_entry *lintr); |
void ct_extended_entries(void); |
static void ct_extended_entries(void); |
static struct mps_fs *fs; |
static struct mps_ct *ct; |
108,13 → 108,13 |
bool is_cpu_enabled(index_t i) |
{ |
ASSERT(i < processor_entry_cnt); |
return processor_entries[i].cpu_flags & 0x1; |
return (bool) ((processor_entries[i].cpu_flags & 0x01) == 0x01); |
} |
bool is_bsp(index_t i) |
{ |
ASSERT(i < processor_entry_cnt); |
return processor_entries[i].cpu_flags & 0x2; |
return (bool) ((processor_entries[i].cpu_flags & 0x02) == 0x02); |
} |
uint8_t get_cpu_apic_id(index_t i) |
133,7 → 133,7 |
uint8_t sum; |
for (i = 0, sum = 0; i < 16; i++) |
sum += base[i]; |
sum = (uint8_t) (sum + base[i]); |
return !sum; |
} |
150,7 → 150,7 |
/* count the checksum for the base table */ |
for (i=0,sum=0; i < ct->base_table_length; i++) |
sum += base[i]; |
sum = (uint8_t) (sum + base[i]); |
if (sum) |
return 0; |
157,7 → 157,7 |
/* count the checksum for the extended table */ |
for (i=0,sum=0; i < ct->ext_table_length; i++) |
sum += ext[i]; |
sum = (uint8_t) (sum + ext[i]); |
return sum == ct->ext_table_checksum; |
} |
286,7 → 286,7 |
return cnt; |
} |
int configure_via_default(uint8_t n) |
int configure_via_default(uint8_t n __attribute__((unused))) |
{ |
/* |
* Not yet implemented. |
296,7 → 296,7 |
} |
int ct_processor_entry(struct __processor_entry *pr) |
int ct_processor_entry(struct __processor_entry *pr __attribute__((unused))) |
{ |
/* |
* Ignore processors which are not marked enabled. |
308,7 → 308,7 |
return 1; |
} |
void ct_bus_entry(struct __bus_entry *bus) |
void ct_bus_entry(struct __bus_entry *bus __attribute__((unused))) |
{ |
#ifdef MPSCT_VERBOSE |
char buf[7]; |
337,7 → 337,7 |
} |
//#define MPSCT_VERBOSE |
void ct_io_intr_entry(struct __io_intr_entry *iointr) |
void ct_io_intr_entry(struct __io_intr_entry *iointr __attribute__((unused))) |
{ |
#ifdef MPSCT_VERBOSE |
switch (iointr->intr_type) { |
368,7 → 368,7 |
#endif |
} |
void ct_l_intr_entry(struct __l_intr_entry *lintr) |
void ct_l_intr_entry(struct __l_intr_entry *lintr __attribute__((unused))) |
{ |
#ifdef MPSCT_VERBOSE |
switch (lintr->intr_type) { |
/trunk/kernel/arch/ia32/src/smp/smp.c |
---|
98,7 → 98,7 |
* BSP initialization (prior the very first call to scheduler()) will be used |
* as an initialization stack for each AP.) |
*/ |
void kmp(void *arg) |
void kmp(void *arg __attribute__((unused))) |
{ |
unsigned int i; |
112,8 → 112,8 |
/* |
* Set the warm-reset vector to the real-mode address of 4K-aligned ap_boot() |
*/ |
*((uint16_t *) (PA2KA(0x467 + 0))) = ((uintptr_t) ap_boot) >> 4; /* segment */ |
*((uint16_t *) (PA2KA(0x467 + 2))) = 0; /* offset */ |
*((uint16_t *) (PA2KA(0x467 + 0))) = (uint16_t) (((uintptr_t) ap_boot) >> 4); /* segment */ |
*((uint16_t *) (PA2KA(0x467 + 2))) = 0; /* offset */ |
/* |
* Save 0xa to address 0xf of the CMOS RAM. |
124,6 → 124,8 |
pic_disable_irqs(0xffff); |
apic_init(); |
uint8_t apic = l_apic_id(); |
for (i = 0; i < ops->cpu_count(); i++) { |
struct descriptor *gdt_new; |
140,8 → 142,8 |
if (ops->cpu_bootstrap(i)) |
continue; |
if (ops->cpu_apic_id(i) == l_apic_id()) { |
printf("%s: bad processor entry #%d, will not send IPI to myself\n", __FUNCTION__, i); |
if (ops->cpu_apic_id(i) == apic) { |
printf("%s: bad processor entry #%u, will not send IPI to myself\n", __FUNCTION__, i); |
continue; |
} |
148,7 → 150,7 |
/* |
* Prepare new GDT for CPU in question. |
*/ |
if (!(gdt_new = (struct descriptor *) malloc(GDT_ITEMS*sizeof(struct descriptor), FRAME_ATOMIC))) |
if (!(gdt_new = (struct descriptor *) malloc(GDT_ITEMS * sizeof(struct descriptor), FRAME_ATOMIC))) |
panic("couldn't allocate memory for GDT\n"); |
memcpy(gdt_new, gdt, GDT_ITEMS * sizeof(struct descriptor)); |
163,8 → 165,10 |
* the time. After it comes completely up, it is |
* supposed to wake us up. |
*/ |
if (waitq_sleep_timeout(&ap_completion_wq, 1000000, SYNCH_FLAGS_NONE) == ESYNCH_TIMEOUT) |
printf("%s: waiting for cpu%d (APIC ID = %d) timed out\n", __FUNCTION__, config.cpu_active > i ? config.cpu_active : i, ops->cpu_apic_id(i)); |
if (waitq_sleep_timeout(&ap_completion_wq, 1000000, SYNCH_FLAGS_NONE) == ESYNCH_TIMEOUT) { |
unsigned int cpu = (config.cpu_active > i) ? config.cpu_active : i; |
printf("%s: waiting for cpu%u (APIC ID = %d) timed out\n", __FUNCTION__, cpu, ops->cpu_apic_id(i)); |
} |
} else |
printf("INIT IPI for l_apic%d failed\n", ops->cpu_apic_id(i)); |
} |
/trunk/kernel/arch/ia32/src/smp/apic.c |
---|
125,10 → 125,10 |
* @param n Interrupt vector. |
* @param istate Interrupted state. |
*/ |
static void apic_spurious(int n, istate_t *istate) |
static void apic_spurious(int n __attribute__((unused)), istate_t *istate __attribute__((unused))) |
{ |
#ifdef CONFIG_DEBUG |
printf("cpu%d: APIC spurious interrupt\n", CPU->id); |
printf("cpu%u: APIC spurious interrupt\n", CPU->id); |
#endif |
} |
137,7 → 137,7 |
return IRQ_ACCEPT; |
} |
static void l_apic_timer_irq_handler(irq_t *irq, void *arg, ...) |
static void l_apic_timer_irq_handler(irq_t *irq, void *arg __attribute__((unused)), ...) |
{ |
/* |
* Holding a spinlock could prevent clock() from preempting |
153,8 → 153,7 |
void apic_init(void) |
{ |
io_apic_id_t idreg; |
unsigned int i; |
exc_register(VECTOR_APIC_SPUR, "apic_spurious", (iroutine) apic_spurious); |
enable_irqs_function = io_apic_enable_irqs; |
176,11 → 175,12 |
l_apic_timer_irq.handler = l_apic_timer_irq_handler; |
irq_register(&l_apic_timer_irq); |
uint8_t i; |
for (i = 0; i < IRQ_COUNT; i++) { |
int pin; |
if ((pin = smp_irq_to_pin(i)) != -1) |
io_apic_change_ioredtbl(pin, DEST_ALL, IVT_IRQBASE + i, LOPRI); |
io_apic_change_ioredtbl((uint8_t) pin, DEST_ALL, (uint8_t) (IVT_IRQBASE + i), LOPRI); |
} |
/* |
328,7 → 328,7 |
*/ |
for (i = 0; i<2; i++) { |
icr.lo = l_apic[ICRlo]; |
icr.vector = ((uintptr_t) ap_boot) / 4096; /* calculate the reset vector */ |
icr.vector = (uint8_t) (((uintptr_t) ap_boot) >> 12); /* calculate the reset vector */ |
icr.delmod = DELMOD_STARTUP; |
icr.destmod = DESTMOD_PHYS; |
icr.level = LEVEL_ASSERT; |
425,9 → 425,9 |
l_apic[ICRT] = t1-t2; |
/* Program Logical Destination Register. */ |
ASSERT(CPU->id < 8) |
ldr.value = l_apic[LDR]; |
if (CPU->id < sizeof(CPU->id)*8) /* size in bits */ |
ldr.id = (1<<CPU->id); |
ldr.id = (uint8_t) (1 << CPU->id); |
l_apic[LDR] = ldr.value; |
/* Program Destination Format Register for Flat mode. */ |
513,7 → 513,7 |
* @param v Interrupt vector to trigger. |
* @param flags Flags. |
*/ |
void io_apic_change_ioredtbl(int pin, int dest, uint8_t v, int flags) |
void io_apic_change_ioredtbl(uint8_t pin, uint8_t dest, uint8_t v, int flags) |
{ |
io_redirection_reg_t reg; |
int dlvr = DELMOD_FIXED; |
521,8 → 521,8 |
if (flags & LOPRI) |
dlvr = DELMOD_LOWPRI; |
reg.lo = io_apic_read(IOREDTBL + pin*2); |
reg.hi = io_apic_read(IOREDTBL + pin*2 + 1); |
reg.lo = io_apic_read((uint8_t) (IOREDTBL + pin * 2)); |
reg.hi = io_apic_read((uint8_t) (IOREDTBL + pin * 2 + 1)); |
reg.dest = dest; |
reg.destmod = DESTMOD_LOGIC; |
531,8 → 531,8 |
reg.delmod = dlvr; |
reg.intvec = v; |
io_apic_write(IOREDTBL + pin*2, reg.lo); |
io_apic_write(IOREDTBL + pin*2 + 1, reg.hi); |
io_apic_write((uint8_t) (IOREDTBL + pin * 2), reg.lo); |
io_apic_write((uint8_t) (IOREDTBL + pin * 2 + 1), reg.hi); |
} |
/** Mask IRQs in IO APIC. |
553,9 → 553,9 |
*/ |
pin = smp_irq_to_pin(i); |
if (pin != -1) { |
reg.lo = io_apic_read(IOREDTBL + pin * 2); |
reg.lo = io_apic_read((uint8_t) (IOREDTBL + pin * 2)); |
reg.masked = true; |
io_apic_write(IOREDTBL + pin * 2, reg.lo); |
io_apic_write((uint8_t) (IOREDTBL + pin * 2), reg.lo); |
} |
} |
572,7 → 572,7 |
int pin; |
io_redirection_reg_t reg; |
for (i = 0;i < 16; i++) { |
for (i = 0; i < 16; i++) { |
if (irqmask & (1 << i)) { |
/* |
* Unmask the signal input in IO APIC if there is a |
580,9 → 580,9 |
*/ |
pin = smp_irq_to_pin(i); |
if (pin != -1) { |
reg.lo = io_apic_read(IOREDTBL + pin * 2); |
reg.lo = io_apic_read((uint8_t) (IOREDTBL + pin * 2)); |
reg.masked = false; |
io_apic_write(IOREDTBL + pin * 2, reg.lo); |
io_apic_write((uint8_t) (IOREDTBL + pin * 2), reg.lo); |
} |
} |
/trunk/kernel/arch/ia32/src/ddi/ddi.c |
---|
125,10 → 125,11 |
ver = TASK->arch.iomapver; |
if ((bits = TASK->arch.iomap.bits)) { |
bitmap_t iomap; |
task_t *task = TASK; |
ASSERT(TASK->arch.iomap.map); |
bitmap_initialize(&iomap, CPU->arch.tss->iomap, TSS_IOMAP_SIZE * 8); |
bitmap_copy(&iomap, &TASK->arch.iomap, TASK->arch.iomap.bits); |
bitmap_copy(&iomap, &task->arch.iomap, task->arch.iomap.bits); |
/* |
* It is safe to set the trailing eight bits because of the extra |
* convenience byte in TSS_IOMAP_SIZE. |
/trunk/kernel/arch/ia32/src/proc/scheduler.c |
---|
66,10 → 66,11 |
#ifdef CONFIG_DEBUG_AS_WATCHPOINT |
/* Set watchpoint on AS to ensure that nobody sets it to zero */ |
if (CPU->id < BKPOINTS_MAX) |
breakpoint_add(&((the_t *) THREAD->kstack)->as, |
BKPOINT_WRITE | BKPOINT_CHECK_ZERO, |
CPU->id); |
if (CPU->id < BKPOINTS_MAX) { |
the_t *the = THE; |
breakpoint_add(&((the_t *) the->thread->kstack)->as, |
BKPOINT_WRITE | BKPOINT_CHECK_ZERO, the->cpu->id); |
} |
#endif |
} |
/trunk/kernel/arch/ia32/src/mm/page.c |
---|
83,8 → 83,10 |
uintptr_t virtaddr = PA2KA(last_frame); |
pfn_t i; |
for (i = 0; i < ADDR2PFN(ALIGN_UP(size, PAGE_SIZE)); i++) |
page_mapping_insert(AS_KERNEL, virtaddr + PFN2ADDR(i), physaddr + PFN2ADDR(i), PAGE_NOT_CACHEABLE | PAGE_WRITE); |
for (i = 0; i < ADDR2PFN(ALIGN_UP(size, PAGE_SIZE)); i++) { |
uintptr_t addr = PFN2ADDR(i); |
page_mapping_insert(AS_KERNEL, virtaddr + addr, physaddr + addr, PAGE_NOT_CACHEABLE | PAGE_WRITE); |
} |
last_frame = ALIGN_UP(last_frame + size, FRAME_SIZE); |
91,7 → 93,7 |
return virtaddr; |
} |
void page_fault(int n, istate_t *istate) |
void page_fault(int n __attribute__((unused)), istate_t *istate) |
{ |
uintptr_t page; |
pf_access_t access; |
110,7 → 112,7 |
fault_if_from_uspace(istate, "Page fault: %#x", page); |
decode_istate(istate); |
printf("page fault address: %#x\n", page); |
printf("page fault address: %#lx\n", page); |
panic("page fault\n"); |
} |
} |