/trunk/kernel/arch/sparc64/src/ddi/ddi.c |
---|
26,7 → 26,7 |
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
*/ |
/** @addtogroup sparc64ddi |
/** @addtogroup sparc64ddi |
* @{ |
*/ |
/** @file |
52,6 → 52,5 |
return 0; |
} |
/** @} |
/** @} |
*/ |
/trunk/kernel/arch/sparc64/src/asm.S |
---|
28,6 → 28,7 |
#include <arch/stack.h> |
#include <arch/regdef.h> |
#include <arch/mm/mmu.h> |
.text |
143,3 → 144,39 |
.global read_from_ag_g7 |
read_from_ag_g7: |
READ_ALTERNATE_REGISTER %g7, PSTATE_AG_BIT |
/** Switch to userspace. |
* |
* %o0 Userspace entry address. |
* %o1 Userspace stack pointer address. |
*/ |
.global switch_to_userspace |
switch_to_userspace: |
flushw |
wrpr %g0, 0, %cleanwin ! avoid information leak |
save %o1, -STACK_WINDOW_SAVE_AREA_SIZE, %sp |
clr %i2 |
clr %i3 |
clr %i4 |
clr %i5 |
clr %i6 |
wrpr %g0, 1, %tl ! enforce mapping via nucleus |
rdpr %cwp, %g1 |
wrpr %g1, TSTATE_IE_BIT, %tstate |
wrpr %i0, 0, %tnpc |
/* |
* Set primary context according to secondary context. |
* Secondary context has been already installed by |
* higher-level functions. |
*/ |
wr %g0, ASI_DMMU, %asi |
ldxa [VA_SECONDARY_CONTEXT_REG] %asi, %g1 |
stxa %g1, [VA_PRIMARY_CONTEXT_REG] %asi |
flush %i7 |
done ! jump to userspace |
/trunk/kernel/arch/sparc64/src/proc/scheduler.c |
---|
91,8 → 91,10 |
* Write kernel stack address to %g6 and a pointer to the last item |
* in the userspace window buffer to %g7 in the alternate and interrupt sets. |
*/ |
write_to_ig_g6((uintptr_t) THREAD->kstack + STACK_SIZE - STACK_BIAS); |
write_to_ag_g6((uintptr_t) THREAD->kstack + STACK_SIZE - STACK_BIAS); |
uint64_t sp = (uintptr_t) THREAD->kstack + STACK_SIZE |
- (STACK_BIAS + ALIGN_UP(STACK_ITEM_SIZE, STACK_ALIGNMENT)); |
write_to_ig_g6(sp); |
write_to_ag_g6(sp); |
write_to_ag_g7((uintptr_t) THREAD->arch.uspace_window_buffer); |
} |
} |
/trunk/kernel/arch/sparc64/src/sparc64.c |
---|
34,6 → 34,7 |
#include <arch.h> |
#include <debug.h> |
#include <config.h> |
#include <arch/trap/trap.h> |
#include <arch/console.h> |
#include <arch/drivers/tick.h> |
41,8 → 42,9 |
#include <console/console.h> |
#include <arch/boot/boot.h> |
#include <arch/arch.h> |
#include <arch/mm/tlb.h> |
#include <mm/asid.h> |
#include <arch/mm/page.h> |
#include <arch/stack.h> |
#include <userspace.h> |
bootinfo_t bootinfo; |
91,5 → 93,17 |
{ |
} |
/** Switch to userspace. */ |
void userspace(uspace_arg_t *kernel_uarg) |
{ |
switch_to_userspace((uintptr_t) kernel_uarg->uspace_entry, |
((uintptr_t) kernel_uarg->uspace_stack) + STACK_SIZE |
- (ALIGN_UP(STACK_ITEM_SIZE, STACK_ALIGNMENT) + STACK_BIAS)); |
for (;;) |
; |
/* not reached */ |
} |
/** @} |
*/ |
/trunk/kernel/arch/sparc64/src/trap/trap_table.S |
---|
40,6 → 40,7 |
#include <arch/trap/interrupt.h> |
#include <arch/trap/exception.h> |
#include <arch/trap/mmu.h> |
#include <arch/mm/mmu.h> |
#include <arch/mm/page.h> |
#include <arch/stack.h> |
#include <arch/regdef.h> |
348,15 → 349,15 |
rdpr %cansave, %l0 |
wrpr %l0, %otherwin |
wrpr %g0, %cansave |
wrpr %g0, NWINDOW-1, %cleanwin |
wrpr %g0, NWINDOW - 1, %cleanwin |
/* |
* Switch to primary context 0. |
*/ |
mov VA_PRIMARY_CONTEXT_REG, %l0 |
stxa %g0, [%l0] ASI_DMMU |
set kernel_image_start, %l0 |
flush %l0 |
stxa %g0, [%l0] ASI_DMMU |
rd %pc, %l0 |
flush %l0 |
ba 1f |
nop |
497,6 → 498,14 |
* handlers. |
*/ |
wrpr %g0, WSTATE_OTHER(0) | WSTATE_NORMAL(1), %wstate |
/* |
* Set primary context according to secondary context. |
*/ |
wr %g0, ASI_DMMU, %asi |
ldxa [VA_SECONDARY_CONTEXT_REG] %asi, %g1 |
stxa %g1, [VA_PRIMARY_CONTEXT_REG] %asi |
flush %o7 |
rdpr %cwp, %g1 |
rdpr %otherwin, %g2 |
/trunk/kernel/arch/sparc64/src/mm/tlb.c |
---|
374,9 → 374,16 |
*/ |
void tlb_invalidate_asid(asid_t asid) |
{ |
/* TODO: write asid to some Context register and encode the register in second parameter below. */ |
itlb_demap(TLB_DEMAP_CONTEXT, TLB_DEMAP_NUCLEUS, 0); |
dtlb_demap(TLB_DEMAP_CONTEXT, TLB_DEMAP_NUCLEUS, 0); |
tlb_context_reg_t sc_save, ctx; |
ctx.v = sc_save.v = mmu_secondary_context_read(); |
ctx.context = asid; |
mmu_secondary_context_write(ctx.v); |
itlb_demap(TLB_DEMAP_CONTEXT, TLB_DEMAP_SECONDARY, 0); |
dtlb_demap(TLB_DEMAP_CONTEXT, TLB_DEMAP_SECONDARY, 0); |
mmu_secondary_context_write(sc_save.v); |
} |
/** Invalidate all ITLB and DTLB entries for specified page range in specified address space. |
388,12 → 395,18 |
void tlb_invalidate_pages(asid_t asid, uintptr_t page, count_t cnt) |
{ |
int i; |
tlb_context_reg_t sc_save, ctx; |
ctx.v = sc_save.v = mmu_secondary_context_read(); |
ctx.context = asid; |
mmu_secondary_context_write(ctx.v); |
for (i = 0; i < cnt; i++) { |
/* TODO: write asid to some Context register and encode the register in second parameter below. */ |
itlb_demap(TLB_DEMAP_PAGE, TLB_DEMAP_NUCLEUS, page + i * PAGE_SIZE); |
dtlb_demap(TLB_DEMAP_PAGE, TLB_DEMAP_NUCLEUS, page + i * PAGE_SIZE); |
itlb_demap(TLB_DEMAP_PAGE, TLB_DEMAP_SECONDARY, page + i * PAGE_SIZE); |
dtlb_demap(TLB_DEMAP_PAGE, TLB_DEMAP_SECONDARY, page + i * PAGE_SIZE); |
} |
mmu_secondary_context_write(sc_save.v); |
} |
/** @} |
/trunk/kernel/arch/sparc64/src/mm/as.c |
---|
26,7 → 26,7 |
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
*/ |
/** @addtogroup sparc64mm |
/** @addtogroup sparc64mm |
* @{ |
*/ |
/** @file |
33,6 → 33,7 |
*/ |
#include <arch/mm/as.h> |
#include <arch/mm/tlb.h> |
#include <genarch/mm/as_ht.h> |
#include <genarch/mm/asid_fifo.h> |
43,6 → 44,22 |
asid_fifo_init(); |
} |
/** @} |
void as_install_arch(as_t *as) |
{ |
tlb_context_reg_t ctx; |
/* |
* Write ASID to secondary context register. |
* The primary context register has to be set |
* from TL>0 so it will be filled from the |
* secondary context register from the TL=1 |
* code just before switch to userspace. |
*/ |
ctx.v = 0; |
ctx.context = as->asid; |
mmu_secondary_context_write(ctx.v); |
} |
/** @} |
*/ |
/trunk/kernel/arch/sparc64/src/dummy.s |
---|
39,7 → 39,6 |
.global fpu_context_save |
.global fpu_enable |
.global fpu_init |
.global userspace |
.global sys_tls_set |
.global dummy |
55,7 → 54,6 |
fpu_context_save: |
fpu_enable: |
fpu_init: |
userspace: |
sys_tls_set: |
dummy: |
/trunk/kernel/arch/sparc64/src/start.S |
---|
68,7 → 68,7 |
and %g1, ~(PSTATE_AM_BIT|PSTATE_IE_BIT), %g1 |
wrpr %g1, 0, %pstate |
wrpr %r0, 0, %pil ! intialize %pil |
wrpr %g0, 0, %pil ! intialize %pil |
/* |
* Copy the bootinfo structure passed from the boot loader |