/trunk/kernel/arch/sparc64/src/mm/tlb.c |
---|
54,8 → 54,8 |
#include <arch/mm/tsb.h> |
#endif |
static void dtlb_pte_copy(pte_t *, size_t, bool); |
static void itlb_pte_copy(pte_t *, size_t); |
static void dtlb_pte_copy(pte_t *, index_t, bool); |
static void itlb_pte_copy(pte_t *, index_t); |
static void do_fast_instruction_access_mmu_miss_fault(istate_t *, const char *); |
static void do_fast_data_access_mmu_miss_fault(istate_t *, tlb_tag_access_reg_t, |
const char *); |
130,7 → 130,7 |
* @param ro If true, the entry will be created read-only, regardless |
* of its w field. |
*/ |
void dtlb_pte_copy(pte_t *t, size_t index, bool ro) |
void dtlb_pte_copy(pte_t *t, index_t index, bool ro) |
{ |
tlb_tag_access_reg_t tag; |
tlb_data_t data; |
167,7 → 167,7 |
* @param t Page Table Entry to be copied. |
* @param index Zero if lower 8K-subpage, one if higher 8K-subpage. |
*/ |
void itlb_pte_copy(pte_t *t, size_t index) |
void itlb_pte_copy(pte_t *t, index_t index) |
{ |
tlb_tag_access_reg_t tag; |
tlb_data_t data; |
200,7 → 200,7 |
void fast_instruction_access_mmu_miss(unative_t unused, istate_t *istate) |
{ |
uintptr_t page_16k = ALIGN_DOWN(istate->tpc, PAGE_SIZE); |
size_t index = (istate->tpc >> MMU_PAGE_WIDTH) % MMU_PAGES_PER_PAGE; |
index_t index = (istate->tpc >> MMU_PAGE_WIDTH) % MMU_PAGES_PER_PAGE; |
pte_t *t; |
page_table_lock(AS, true); |
245,7 → 245,7 |
{ |
uintptr_t page_8k; |
uintptr_t page_16k; |
size_t index; |
index_t index; |
pte_t *t; |
page_8k = (uint64_t) tag.vpn << MMU_PAGE_WIDTH; |
309,7 → 309,7 |
void fast_data_access_protection(tlb_tag_access_reg_t tag, istate_t *istate) |
{ |
uintptr_t page_16k; |
size_t index; |
index_t index; |
pte_t *t; |
page_16k = ALIGN_DOWN((uint64_t) tag.vpn << MMU_PAGE_WIDTH, PAGE_SIZE); |
579,7 → 579,7 |
* @param page First page which to sweep out from ITLB and DTLB. |
* @param cnt Number of ITLB and DTLB entries to invalidate. |
*/ |
void tlb_invalidate_pages(asid_t asid, uintptr_t page, size_t cnt) |
void tlb_invalidate_pages(asid_t asid, uintptr_t page, count_t cnt) |
{ |
unsigned int i; |
tlb_context_reg_t pc_save, ctx; |
/trunk/kernel/arch/sparc64/src/mm/as.c |
---|
89,7 → 89,7 |
* The count must be calculated with respect to the emualted 16K page |
* size. |
*/ |
size_t cnt = ((ITSB_ENTRY_COUNT + DTSB_ENTRY_COUNT) * |
count_t cnt = ((ITSB_ENTRY_COUNT + DTSB_ENTRY_COUNT) * |
sizeof(tsb_entry_t)) >> FRAME_WIDTH; |
frame_free(KA2PA((uintptr_t) as->arch.itsb)); |
return cnt; |
101,7 → 101,7 |
int as_create_arch(as_t *as, int flags) |
{ |
#ifdef CONFIG_TSB |
tsb_invalidate(as, 0, (size_t) -1); |
tsb_invalidate(as, 0, (count_t) -1); |
#endif |
return 0; |
} |
/trunk/kernel/arch/sparc64/src/mm/tsb.c |
---|
50,14 → 50,13 |
* |
* @param as Address space. |
* @param page First page to invalidate in TSB. |
* @param pages Number of pages to invalidate. Value of (size_t) -1 means the |
* @param pages Number of pages to invalidate. Value of (count_t) -1 means the |
* whole TSB. |
*/ |
void tsb_invalidate(as_t *as, uintptr_t page, size_t pages) |
void tsb_invalidate(as_t *as, uintptr_t page, count_t pages) |
{ |
size_t i0; |
size_t i; |
size_t cnt; |
index_t i0, i; |
count_t cnt; |
ASSERT(as->arch.itsb && as->arch.dtsb); |
64,7 → 63,7 |
i0 = (page >> MMU_PAGE_WIDTH) & TSB_INDEX_MASK; |
ASSERT(i0 < ITSB_ENTRY_COUNT && i0 < DTSB_ENTRY_COUNT); |
if (pages == (size_t) -1 || (pages * 2) > ITSB_ENTRY_COUNT) |
if (pages == (count_t) -1 || (pages * 2) > ITSB_ENTRY_COUNT) |
cnt = ITSB_ENTRY_COUNT; |
else |
cnt = pages * 2; |
82,11 → 81,11 |
* @param t Software PTE. |
* @param index Zero if lower 8K-subpage, one if higher 8K subpage. |
*/ |
void itsb_pte_copy(pte_t *t, size_t index) |
void itsb_pte_copy(pte_t *t, index_t index) |
{ |
as_t *as; |
tsb_entry_t *tsb; |
size_t entry; |
index_t entry; |
ASSERT(index <= 1); |
128,11 → 127,11 |
* @param index Zero if lower 8K-subpage, one if higher 8K-subpage. |
* @param ro If true, the mapping is copied read-only. |
*/ |
void dtsb_pte_copy(pte_t *t, size_t index, bool ro) |
void dtsb_pte_copy(pte_t *t, index_t index, bool ro) |
{ |
as_t *as; |
tsb_entry_t *tsb; |
size_t entry; |
index_t entry; |
ASSERT(index <= 1); |