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Ignore whitespace Rev 3654 → Rev 3649

/trunk/kernel/arch/sparc64/src/drivers/psycho.c
0,0 → 1,102
/*
* Copyright (c) 2008 Jakub Jermar
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup sparc64
* @{
*/
/**
* @file
* @brief Driver for the UPA to PCI bridge (Psycho).
*/
 
#include <arch/drivers/psycho.h>
#include <arch/trap/interrupt.h>
#include <mm/page.h>
#include <mm/slab.h>
#include <arch/types.h>
#include <genarch/ofw/ofw_tree.h>
#include <byteorder.h>
 
#define PSYCHO_INTERNAL_REG 2
 
#define PSYCHO_OBIO_IMR_BASE (0x1000 / sizeof(uint64_t))
#define PSYCHO_OBIO_IMR(ino) (PSYCHO_OBIO_IMR_BASE + ((ino) & INO_MASK))
 
#define PSYCHO_OBIO_CIR_BASE (0x1800 / sizeof(uint64_t))
#define PSYCHO_OBIO_CIR(ino) (PSYCHO_OBIO_CIR_BASE + ((ino) & INO_MASK))
 
psycho_t *psycho_a = NULL;
psycho_t *psycho_b = NULL;
 
psycho_t *psycho_init(ofw_tree_node_t *node)
{
psycho_t *psycho;
ofw_tree_property_t *prop;
 
prop = ofw_tree_getprop(node, "reg");
if (!prop || !prop->value)
return NULL;
count_t regs = prop->size / sizeof(ofw_upa_reg_t);
if (regs < PSYCHO_INTERNAL_REG + 1)
return NULL;
ofw_upa_reg_t *reg =
&((ofw_upa_reg_t *) prop->value)[PSYCHO_INTERNAL_REG];
 
uintptr_t paddr;
if (!ofw_upa_apply_ranges(node->parent, reg, &paddr))
return NULL;
 
psycho = (psycho_t *) malloc(sizeof(psycho_t), FRAME_ATOMIC);
if (!psycho)
return NULL;
 
psycho->regs = (uint64_t *) hw_map(paddr, reg->size);
return psycho;
}
 
void psycho_enable_interrupt(psycho_t *psycho, int inr)
{
int ino = inr & ~IGN_MASK;
uint64_t imr = psycho->regs[PSYCHO_OBIO_IMR(ino)];
imr |= host2uint64_t_le(IMAP_V_MASK);
psycho->regs[PSYCHO_OBIO_IMR(ino)] = imr;
}
 
void psycho_clear_interrupt(psycho_t *psycho, int inr)
{
int ino = inr & ~IGN_MASK;
uint64_t idle = host2uint64_t_le(0);
psycho->regs[PSYCHO_OBIO_CIR(ino)] = idle;
}
 
/** @}
*/
/trunk/kernel/arch/sparc64/src/drivers/pci.c
45,37 → 45,40
#include <func.h>
#include <arch/asm.h>
 
#define SABRE_INTERNAL_REG 0
#define PSYCHO_INTERNAL_REG 2
#define PCI_SABRE_REGS_REG 0
 
#define OBIO_IMR_BASE 0x200
#define OBIO_IMR(ino) (OBIO_IMR_BASE + ((ino) & INO_MASK))
#define PCI_SABRE_IMAP_BASE 0x200
#define PCI_SABRE_ICLR_BASE 0x300
 
#define OBIO_CIR_BASE 0x300
#define OBIO_CIR(ino) (OBIO_CIR_BASE + ((ino) & INO_MASK))
#define PCI_PSYCHO_REGS_REG 2
 
static void obio_enable_interrupt(pci_t *pci, int inr);
static void obio_clear_interrupt(pci_t *pci, int inr);
#define PCI_PSYCHO_IMAP_BASE 0x200
#define PCI_PSYCHO_ICLR_BASE 0x300
 
static pci_t *pci_sabre_init(ofw_tree_node_t *node);
static void pci_sabre_enable_interrupt(pci_t *pci, int inr);
static void pci_sabre_clear_interrupt(pci_t *pci, int inr);
 
static pci_t *pci_psycho_init(ofw_tree_node_t *node);
static void pci_psycho_enable_interrupt(pci_t *pci, int inr);
static void pci_psycho_clear_interrupt(pci_t *pci, int inr);
 
/** PCI operations for Sabre model. */
static pci_operations_t pci_sabre_ops = {
.enable_interrupt = obio_enable_interrupt,
.clear_interrupt = obio_clear_interrupt
.enable_interrupt = pci_sabre_enable_interrupt,
.clear_interrupt = pci_sabre_clear_interrupt
};
/** PCI operations for Psycho model. */
static pci_operations_t pci_psycho_ops = {
.enable_interrupt = obio_enable_interrupt,
.clear_interrupt = obio_clear_interrupt
.enable_interrupt = pci_psycho_enable_interrupt,
.clear_interrupt = pci_psycho_clear_interrupt
};
 
/** Initialize PCI controller (model Sabre).
*
* @param node OpenFirmware device tree node of the Sabre.
* @param node OpenFirmware device tree node of the Sabre.
*
* @return Address of the initialized PCI structure.
* @return Address of the initialized PCI structure.
*/
pci_t *pci_sabre_init(ofw_tree_node_t *node)
{
92,12 → 95,11
ofw_upa_reg_t *reg = prop->value;
count_t regs = prop->size / sizeof(ofw_upa_reg_t);
 
if (regs < SABRE_INTERNAL_REG + 1)
if (regs < PCI_SABRE_REGS_REG + 1)
return NULL;
 
uintptr_t paddr;
if (!ofw_upa_apply_ranges(node->parent, &reg[SABRE_INTERNAL_REG],
&paddr))
if (!ofw_upa_apply_ranges(node->parent, &reg[PCI_SABRE_REGS_REG], &paddr))
return NULL;
 
pci = (pci_t *) malloc(sizeof(pci_t), FRAME_ATOMIC);
106,7 → 108,7
 
pci->model = PCI_SABRE;
pci->op = &pci_sabre_ops;
pci->reg = (uint64_t *) hw_map(paddr, reg[SABRE_INTERNAL_REG].size);
pci->reg = (uint64_t *) hw_map(paddr, reg[PCI_SABRE_REGS_REG].size);
 
return pci;
}
114,9 → 116,9
 
/** Initialize the Psycho PCI controller.
*
* @param node OpenFirmware device tree node of the Psycho.
* @param node OpenFirmware device tree node of the Psycho.
*
* @return Address of the initialized PCI structure.
* @return Address of the initialized PCI structure.
*/
pci_t *pci_psycho_init(ofw_tree_node_t *node)
{
133,12 → 135,11
ofw_upa_reg_t *reg = prop->value;
count_t regs = prop->size / sizeof(ofw_upa_reg_t);
 
if (regs < PSYCHO_INTERNAL_REG + 1)
if (regs < PCI_PSYCHO_REGS_REG + 1)
return NULL;
 
uintptr_t paddr;
if (!ofw_upa_apply_ranges(node->parent, &reg[PSYCHO_INTERNAL_REG],
&paddr))
if (!ofw_upa_apply_ranges(node->parent, &reg[PCI_PSYCHO_REGS_REG], &paddr))
return NULL;
 
pci = (pci_t *) malloc(sizeof(pci_t), FRAME_ATOMIC);
147,21 → 148,31
 
pci->model = PCI_PSYCHO;
pci->op = &pci_psycho_ops;
pci->reg = (uint64_t *) hw_map(paddr, reg[PSYCHO_INTERNAL_REG].size);
pci->reg = (uint64_t *) hw_map(paddr, reg[PCI_PSYCHO_REGS_REG].size);
 
return pci;
}
 
void obio_enable_interrupt(pci_t *pci, int inr)
void pci_sabre_enable_interrupt(pci_t *pci, int inr)
{
pci->reg[OBIO_IMR(inr & INO_MASK)] |= IMAP_V_MASK;
pci->reg[PCI_SABRE_IMAP_BASE + (inr & INO_MASK)] |= IMAP_V_MASK;
}
 
void obio_clear_interrupt(pci_t *pci, int inr)
void pci_sabre_clear_interrupt(pci_t *pci, int inr)
{
pci->reg[OBIO_CIR(inr & INO_MASK)] = 0; /* set IDLE */
pci->reg[PCI_SABRE_ICLR_BASE + (inr & INO_MASK)] = 0;
}
 
void pci_psycho_enable_interrupt(pci_t *pci, int inr)
{
pci->reg[PCI_PSYCHO_IMAP_BASE + (inr & INO_MASK)] |= IMAP_V_MASK;
}
 
void pci_psycho_clear_interrupt(pci_t *pci, int inr)
{
pci->reg[PCI_PSYCHO_ICLR_BASE + (inr & INO_MASK)] = 0;
}
 
/** Initialize PCI controller. */
pci_t *pci_init(ofw_tree_node_t *node)
{
204,6 → 215,7
 
void pci_enable_interrupt(pci_t *pci, int inr)
{
ASSERT(pci->model);
ASSERT(pci->op && pci->op->enable_interrupt);
pci->op->enable_interrupt(pci, inr);
}
210,6 → 222,7
 
void pci_clear_interrupt(pci_t *pci, int inr)
{
ASSERT(pci->model);
ASSERT(pci->op && pci->op->clear_interrupt);
pci->op->clear_interrupt(pci, inr);
}