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Ignore whitespace Rev 1854 → Rev 1855

/trunk/kernel/arch/sparc64/include/asm.h
315,6 → 315,12
__asm__ volatile ("stxa %0, [%1] %2\n" : : "r" (v), "r" (va), "i" (asi) : "memory");
}
 
/** Flush all valid register windows to memory. */
static inline void flushw(void)
{
__asm__ volatile ("flushw\n");
}
 
void cpu_halt(void);
void cpu_sleep(void);
void asm_delay_loop(uint32_t t);
/trunk/kernel/arch/sparc64/include/trap/trap_table.h
81,10 → 81,19
* The following needs to be in sync with the
* definition of the istate structure.
*/
#define PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE (STACK_WINDOW_SAVE_AREA_SIZE+(4*8))
#define PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE (STACK_WINDOW_SAVE_AREA_SIZE+(12*8))
#define SAVED_TSTATE -(1*8)
#define SAVED_TPC -(2*8)
#define SAVED_TNPC -(3*8)
#define SAVED_TNPC -(3*8) /* <-- istate_t begins here */
/* alignment gap */
#define SAVED_I0 -(5*8)
#define SAVED_I1 -(6*8)
#define SAVED_I2 -(7*8)
#define SAVED_I3 -(8*8)
#define SAVED_I4 -(9*8)
#define SAVED_I5 -(10*8)
#define SAVED_I6 -(11*8)
#define SAVED_I7 -(12*8)
 
.macro PREEMPTIBLE_HANDLER f
sethi %hi(\f), %g1