35,17 → 35,13 |
#ifndef __sparc64_TLB_H__ |
#define __sparc64_TLB_H__ |
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#include <arch/mm/tte.h> |
#include <arch/mm/mmu.h> |
#include <arch/mm/page.h> |
#include <arch/asm.h> |
#include <arch/barrier.h> |
#include <arch/types.h> |
#include <typedefs.h> |
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#define ITLB_ENTRY_COUNT 64 |
#define DTLB_ENTRY_COUNT 64 |
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#define MEM_CONTEXT_KERNEL 0 |
#define MEM_CONTEXT_TEMP 1 |
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/** Page sizes. */ |
#define PAGESIZE_8K 0 |
#define PAGESIZE_64K 1 |
55,6 → 51,33 |
/** Bit width of the TLB-locked portion of kernel address space. */ |
#define KERNEL_PAGE_WIDTH 22 /* 4M */ |
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/* TLB Demap Operation types. */ |
#define TLB_DEMAP_PAGE 0 |
#define TLB_DEMAP_CONTEXT 1 |
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#define TLB_DEMAP_TYPE_SHIFT 6 |
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/* TLB Demap Operation Context register encodings. */ |
#define TLB_DEMAP_PRIMARY 0 |
#define TLB_DEMAP_SECONDARY 1 |
#define TLB_DEMAP_NUCLEUS 2 |
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#define TLB_DEMAP_CONTEXT_SHIFT 4 |
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/* TLB Tag Access shifts */ |
#define TLB_TAG_ACCESS_CONTEXT_SHIFT 0 |
#define TLB_TAG_ACCESS_VPN_SHIFT 13 |
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#ifndef __ASM__ |
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#include <arch/mm/tte.h> |
#include <arch/mm/mmu.h> |
#include <arch/mm/page.h> |
#include <arch/asm.h> |
#include <arch/barrier.h> |
#include <arch/types.h> |
#include <typedefs.h> |
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union tlb_context_reg { |
uint64_t v; |
struct { |
90,15 → 113,7 |
typedef union tlb_tag_read_reg tlb_tag_read_reg_t; |
typedef union tlb_tag_read_reg tlb_tag_access_reg_t; |
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/** TLB Demap Operation types. */ |
#define TLB_DEMAP_PAGE 0 |
#define TLB_DEMAP_CONTEXT 1 |
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/** TLB Demap Operation Context register encodings. */ |
#define TLB_DEMAP_PRIMARY 0 |
#define TLB_DEMAP_SECONDARY 1 |
#define TLB_DEMAP_NUCLEUS 2 |
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/** TLB Demap Operation Address. */ |
union tlb_demap_addr { |
uint64_t value; |
384,7 → 399,7 |
da.context = context_encoding; |
da.vpn = pg.vpn; |
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asi_u64_write(ASI_IMMU_DEMAP, da.value, 0); |
asi_u64_write(ASI_IMMU_DEMAP, da.value, 0); /* da.value is the address within the ASI */ |
flush(); |
} |
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406,7 → 421,7 |
da.context = context_encoding; |
da.vpn = pg.vpn; |
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asi_u64_write(ASI_DMMU_DEMAP, da.value, 0); |
asi_u64_write(ASI_DMMU_DEMAP, da.value, 0); /* da.value is the address within the ASI */ |
membar(); |
} |
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416,6 → 431,8 |
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extern void dtlb_insert_mapping(uintptr_t page, uintptr_t frame, int pagesize, bool locked, bool cacheable); |
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#endif /* !def __ASM__ */ |
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#endif |
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/** @} |