/trunk/kernel/arch/sparc64/include/asm.h |
---|
321,18 → 321,6 |
__asm__ volatile ("flushw\n"); |
} |
/** Switch to nucleus by setting TL to 1. */ |
static inline void nucleus_enter(void) |
{ |
__asm__ volatile ("wrpr %g0, 1, %tl\n"); |
} |
/** Switch from nucleus by setting TL to 0. */ |
static inline void nucleus_leave(void) |
{ |
__asm__ volatile ("wrpr %g0, %g0, %tl\n"); |
} |
extern void cpu_halt(void); |
extern void cpu_sleep(void); |
extern void asm_delay_loop(uint32_t t); |
/trunk/kernel/arch/sparc64/include/trap/mmu.h |
---|
121,11 → 121,6 |
PREEMPTIBLE_HANDLER fast_data_access_protection |
.endm |
.macro MEM_ADDRESS_NOT_ALIGNED_HANDLER |
ba mem_address_not_aligned_handler |
nop |
.endm |
/* |
* Macro used to lower TL when a MMU trap is caused by |
* the userspace register window spill or fill handler. |